Logic interpretation of dynamic machine learning model

Abstract

Described is a system for generating logic interpretations of a machine learning model by accessing a machine learning model, generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model, accessing a database that includes representations of logic gates, based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network, and generating pseudocode or non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to generate the binary output signals from the mapped binary input signals of the logic network.

Description

LOGIC INTERPRETATION OF DYNAMIC MACHINE LEARNINGMODELTECHNICAL FIELD

[0001] The present disclosure relates generally to machine learning models and, more particularly, to interpreting machine learning models into representative logic, such as logic gates, higher level logic, or any suitable combination thereof.BACKGROUND

[0002] Machine learning models are models configure computer hardware and are designed to enable models to learn from data and make predictions or decisions without explicit programming. These models utilize statistical methods, mathematical optimization, and pattern recognition to identify patterns and relationships within data, allowing them to generalize and adapt to new information. Machine learning models are widely used across various domains, such as image and speech recognition, natural language processing, recommendation systems, and anomaly detection. In traditional models, the model is trained using historical and labeled information, and then, the trained model is applied to new unlabeled data to generate inferences.BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

[0003] Some non-limiting examples are illustrated in the figures of the accompanying drawings in which:

[0004] FIG. 1 illustrates a network architecture of a machine learning model, according to some examples.

[0005] FIG. 2 illustrates a network including first node, second node, and third node, according to some examples.

[0006] FIG. 3 illustrates an example method for generating a logic network of logic gate representations for nodes of a machine learning model, according to some examples.

[0007] FIG. 4 illustrates a machine learning architecture configured to generate a logic network of a node in a machine learning model, according to some examples.

[0008] FIG. 5 illustrates the generation of a logic network that includes multiple logic gates representative of a group of nodes, according to some examples.

[0009] FIG. 6 illustrates an interpreter configured to convert nodes, groups of nodes, or truth tables into logic gates, logic networks, and higher order logic, according to some examples.

[0010] FIG. 7 illustrates unidirectional and bidirectional logic gate interpretation, according to some examples.

[0011] FIG. 8 illustrates binary node outputs and logic gate interpretations, according to some examples.

[0012] FIG. 9 illustrates a split screen user interface displaying the internal architecture of the machine learning model on one side and logic gate representations on the other side, according to some examples.

[0013] FIG. 10 illustrates initial values of weights of a node of a network, according to some examples.

[0014] FIG. 11 illustrates initial values of weights of the Bo submatrix, according to some examples.

[0015] FIG. 12 illustrates differentiated values of weights of the Bo submatrix, according to some examples.

[0016] FIG. 13 illustrates initial values of weights of the Bi submatrix, according to some examples.

[0017] FIG. 14 illustrates differentiated values of weights of the Bi submatrix, according to some examples.

[0018] FIG. 15 illustrates initial weight values and three different sets of differentiated values of weights of the B matrix, according to some examples.

[0019] FIG. 16 illustrates weight values of an example Bo submatrix of a node configured to operate as an AND logic gate, according to some examples.

[0020] FIG. 17 illustrates weight values of an example Bi submatrix of a node, according to some examples.

[0021] FIG. 18 illustrates weight values of example B matrices of nodes configured to operate as OR, XOR, and NOT logic gates, according to some examples.

[0022] FIG. 19 illustrates weight values of example B matrices of nodes configured to operate as NAND, NOR, and XNOR logic gates, according to some examples.

[0023] FIG. 20 illustrates a machine-learning pipeline, providing context for examples described herein.

[0024] FIG. 21 illustrates training and use of an example machine-learning program, providing context for examples described herein.

[0025] FIG. 22 is a diagrammatic representation of a machine in the form of a computer system within which a set of instructions may be executed to cause the machine to perform any one or more of the methodologies discussed herein, according to some examples.

[0026] FIG. 23 illustrates translation among node topology, pseudocode, and software code, according to some examples.DETAILED DESCRIPTION

[0027] Traditional machine learning models have several pitfalls that hinder the models’ ability to adapt and grow. Traditional machine learning models often lack clear interpretability. While they may provide accurate predictions, understanding the reasons behind those predictions can be challenging. Interpreting what a particular node or group of nodes in the model is doing and how it contributes to the overall decisionmaking process is often obscure.

[0028] Many traditional machine learning models take inputs and produce outputs, but the internal workings are not easily understandable. Thislack of transparency can be problematic, especially in critical applications where understanding model behavior is crucial.

[0029] Traditional models can learn complex mappings from inputs to outputs, but the way these mappings are learned is often difficult to explain or comprehend. As a result, determining how specific inputs lead to certain outputs can be non-trivial.

[0030] Moreover, traditional machine learning models usually don't directly generate logical expressions or human-understandable rules. This makes it challenging to extract meaningful logical insights from the model's internal processes, hindering the ability to describe the model's behavior in terms of recognizable logic gates.

[0031] Traditional machine learning models and systems using such models do not have the ability to translate the models into executable code or logical expressions. This can lead to a gap between the model's operation and its practical implementation, making it harder to integrate the model into real-world applications.

[0032] As traditional machine learning models become larger and more complex, their interpretability often suffers. It becomes increasingly challenging to understand the roles and contributions of individual nodes or groups of nodes in the overall model architecture.

[0033] The inability to easily validate that certain nodes in a traditional model are indeed functioning as specific logic gates can lead to difficulties in ensuring the correctness of the model's behavior.

[0034] These pitfalls highlight the challenges that traditional machine learning models face in terms of interpretability, transparency, and the ability to extract meaningful logic from their operations. They set the stage for understanding the advantages of the herein-described new and improved machine learning model that focuses on mapping logic gates and higher-order logic, as well as the enhanced interpretability it offers.

[0035] Examples of the Artificial Intelligence (Al) system described herein mitigate or eliminate the pitfalls described above (e.g., by including or otherwise implementing one or more examples of the Al system described herein). Unlike traditional models, the Al system identifieslogic gates and higher-order logic within the model's internal architecture. This means that the model's behavior can be understood in terms of recognizable logic operations, making it easier to interpret how specific inputs contribute to the model's predictions.

[0036] By mapping logic gates to specific nodes or groups of nodes, the Al system provides a clear and understandable representation of the internal workings of the machine learning model. This transparency eliminates the "black box" nature of traditional models, enabling users to comprehend the decision-making process and increasing trust in the model's outcomes.

[0037] The Al system focuses on identifying logic gates and their corresponding functions in the machine learning model enabling complex mappings from inputs to outputs to be explainable. Users can grasp how specific inputs lead to particular logical outcomes, enhancing the overall understanding of the model's behavior.

[0038] Through the direct identification of logic gates, the Al system generates logical expressions and human-understandable rules that describe the machine learning model's behavior. This capability significantly improves the extraction of meaningful insights from the model's internal processes, promoting better communication between machine and human understanding.

[0039] One of the remarkable advantages of the Al system is the ability to translate the logic gates and higher-order logic identified within the model into executable code or logical expressions. This bridge between the model's operations and real-world implementation eliminates the gap that often exists in traditional models.

[0040] The Al system mapping logic functions to individual node components remains viable even as the model becomes larger and more complex. This ensures that interpretability scales alongside model complexity, enabling users to understand contributions of various nodes in intricate architectures.

[0041] The Al system's capability to identify nodes functioning as specific logic gates enhances the validation process. This means that thecorrectness of the model's behavior can be more effectively assessed, contributing to the overall reliability of the model.

[0042] Overall, the Al system implements improved processes and machine learning models addressing the limitations of traditional models by offering transparent, interpretable, and explainable logic-based behavior. This approach not only enhances the understanding of the model's decision-making but also provides a bridge to practical implementation through code translation.NODES AND CONNECTIONS OF A MACHINE LEARNINGMODEL

[0043] FIG. 1 illustrates an example of a three-node machine learning model, according to some examples. The network includes a set of nodes, shown as node 102, second node 104, and third node 106. The nodes are connected to each other by unidirectional connections, shown as first connection 108 (from node 102 to second node 104) and second connection 110 (from second node 104 to third node 106). Each connection conveys or designates outputs of a transmitting node as inputs to a receiving node.

[0044] The connections for which a given node is a transmitting node may be referred to as outgoing connections of that node; by the same token, those connections for which a node is the receiving node may be referred to as incoming connections of that node. In network, the transmitting node of first connection 108 is node 102, and the receiving node of first connection 108 is second node 104; the transmitting node of second connection 110 is second node 104, and the receiving node of second connection 110 is third node 106.

[0045] The nodes of the network (and other networks of machine learning models described herein) may be described herein as receiving inputs, processing data, and generating outputs. Similarly, the connections of the described networks may be described as conveying, transmitting, or providing data from one node to another node. In some examples, these terms may refer to the operation of nodes or connection embodied as logical circuit components or other physical data processing or datacommunication components. For example, the nodes and connections of a network of a machine learning model as described herein may be implemented as circuit components of a field programmable gate array (FPGA) or another dynamically reconfigurable logical circuit.

[0046] However, in some examples, the nodes or connections may be implemented as data, for example, as data structures or instructions stored in a memory and manipulated by a physical processor. The machine described herein provides an example of a computing system suitable for such an implementation. For example, a node may be implemented as a data structure associated with one or more parameters (e.g., weights, as described below), and processing the inputs of a node to generate the node's outputs may be performed by the physical processor processing the parameter values of the node and the inputs of the node to generate the outputs of the node.

[0047] A connection may be implemented as data designating or identifying a relationship between a transmitting node and a receiving node, such that the outputs of the transmitting node are treated by the physical processor as inputs to the receiving node. In some examples, the nodes or connections may include instructions executed by the processor to perform these operations, whereas in other examples, the instructions are separate from the nodes and connections, and cause the processor to process the data corresponding to the nodes and connections.

[0048] Thus, in some examples, each node may be said to include or be associated with parameter values (or priors), and these parameter values may be used to control the processing of the inputs of the node in order to generate the outputs of the node. It will be appreciated that all references herein to a node processing data, to a connection conveying data, and so on, are all intended to encompass all suitable implementations of the nodes or connections as any combination of hardware or software.

[0049] The nodes of the network (and other networks of machine learning models described herein) may be described herein as receiving inputs, processing data, and generating outputs. Similarly, the connections of thedescribed networks may be described as conveying, transmitting, or providing data from one node to another node. In some examples, these terms may refer to the operation of nodes or connection embodied as logical circuit components or other physical data processing or data communication components.

[0050] However, in some examples, the nodes or connections may be implemented as data, for example, as data structures or instructions stored in a memory and manipulated by a physical processor. For example, a node may be implemented as a data structure associated with one or more parameters (e.g., weights, as described below), and processing the inputs of a node to generate the node's outputs may be performed by the physical processor processing the parameter values of the node and the inputs of the node to generate the outputs of the node.

[0051] A connection may be implemented as data designating or identifying a relationship between a transmitting node and a receiving node, such that the outputs of the transmitting node are treated by the physical processor as inputs to the receiving node. In some examples, the nodes or connections may include instructions executed by the processor to perform these operations, whereas in other examples, the instructions are separate from the nodes and connections, and cause the processor to process the data corresponding to the nodes and connections. It will be appreciated that all references herein to a node processing data, to a connection conveying data, and so on, are all intended to encompass all suitable implementations of the nodes or connections as any combination of hardware or software.

[0052] In some examples, the nodes of the network operate to process their inputs and generate their outputs at each of a sequence of time steps. In some examples, all nodes of the network operate at each time step; in other examples, some nodes may have different rates of operation such that some nodes of the network may only process their inputs and generate (or update) their outputs at some time steps, such as every n time steps or at different intervals, where n is a positive integer.

[0053] In some cases, the network operations continuously, performing continuous-time inferences. For example, the Al system operates analog machines running the algorithms which can continuously perform inferences in a floating-point time delay tefor node e.

[0054] In some examples, a node generates its outputs at a current time step t by processing its inputs at a previous or prior time step M. The inputs may be processed by applying various parameters or weights, such as matrices of weights, to the inputs, and computing one or more output values based on the weighted inputs. In some examples, a node may generate only a single output value that is conveyed as an input to all connected nodes; in other examples, a node may generate multiple outputs to be conveyed to multiple connected nodes or as multiple output values conveyed to a single node.

[0055] In some examples, a single output generated by a node may be an activation value. An activation value may include a measure of how active the node is at the current time step based on its inputs from the previous time step. In some examples, the activation value may be continuous (such as a floating point value) - such as in an artificial neural networks such as CNNs, in which a given node (e.g., an artificial neuron in an artificial neural network) generates a floating-point output activation value as part of an activation map generated by the neural network layer inhabited by the neuron.

[0056] In other examples, the activation value of a given node may be discrete, such as a binary value (e.g., 0 or 1, corresponding to inactive or active, or “not firing” and “firing” in the context of an analogy of neuronal firing). The discrete activation value may be determined by either a stochastic quantization process or a deterministic quantization process. In a stochastic quantization process, for example, a probability distribution over all possible discrete output values may be generated by processing the weighted inputs, and a random or pseudo-random value may be used to select a discrete output value (or set of output values) from the probability distribution. In a deterministic quantization process, a single discrete output value (or set of output values) may instead beselected from the probability distribution as the value or values having the highest probability.

[0057] In some examples, nodes may have connections to themselves, referred to as self-connections, in which they serve as both transmitting node and receiving node. In some such examples, a node may generate a single or multiple outputs for propagation to its connected nodes, and another output or set of outputs to itself, called self-outputs (or selfsignals, or self-inputs), via its self-connection(s). In some cases, the node has the same number of self-connections as connections with other nodes. In some examples, a node may pass through its current inputs, or a computation performed on its current inputs, as self-outputs, thereby providing a one-time-step memory of its own inputs or processed inputs. This may enable the node to evaluate the accuracy of its own previous predictions of state transitions of the observed system.

[0058] It will be appreciated that the three-node network shown in FIG. 1 is intended as a simplified example, and that actual machine learning models may include networks having much larger number of nodes, such as thousands or millions of nodes. Thus, the network may be regarded as a small section of a larger network, in which one or more of the illustrated nodes 102, 104, or 106 may have connections to or from one or more other unseen nodes of the larger network. In one such example, in the context of CNNs, the node 102 could be regarded as a neuron of a convolution layer, the second node 104 could be regarded as a neuron of a rectified linear unit (ReLU) layer receiving an activation outputs map from the convolution layer, and third node 106 could be regarded as a neuron of a pooling layer receiving the ReLU layer output.

[0059] In some cases, the network includes one or more cycles. Cycles include a plurality of unique nodes in an ordered sequence, each node of the sequence sharing a connection with a next node in the sequence, and a final node of the sequence sharing a connection with an initial node of the sequence. In some cases, the network includes a directed graph having no directed cycles, understood as a plurality of unique nodes in an ordered sequence, each node of the sequence having a connection (in thiscase, a directed connection) to a next node in the sequence, and a final node of the sequence having a connection to an initial node of the sequence. The output of each node is propagated in a forward direction from node 102 to second node 104 to third node 106 without any feedback to previous nodes. In some cases, the network includes a mix of directed networks and cycles.

[0060] The network includes a third connection 112 that is added from third node 106 to first node 102 to create a cycle. In some examples, the new connection (e.g., third connection 112) is added to the network after the model has been generated and at least partially trained, during a runtime period in which the machine learning model, including the network, has been deployed to repeatedly perform the inference task for which the machine learning model has been trained. By adding a new connection and thereby forming a new cycle during runtime, the operation of the network may be reconfigured dynamically while performing an inference task, thereby potentially enhancing the performance of the machine learning model to perform its inference task or dynamically adapting the machine learning model to new conditions, e.g., new types of input data that benefit from adding cycles to the network.

[0061] In some examples, instead of adding a new connection to the network, a connection may be removed from the network. As with adding a connection, in some examples, the previous connection (e.g., third connection 112) is removed from the network after the model has been generated and at least partially trained, during the runtime period. By removing a connection and thereby removing a cycle during runtime, the operation of the network may be reconfigured dynamically while performing the inference task, thereby potentially enhancing the performance of the machine learning model or dynamically adapting the machine learning model to new conditions. In some examples, removing even a small subset of the connections within a highly connected network may dramatically reduce resources used by the machine learning model, such as storage, memory, processor, and power usage.

[0062] Thus, various examples described herein may add or remove connections of a network. Such addition or removal of a connection may be referred to collectively as changing presence of the connection.NETWORK WITH NODES CONNECTED TO THE ENVIRONMENT

[0063] FIG. 2 illustrates a further example network, including first node 202, second node 204, and third node 206. In network, the connections between nodes are in bidirectional pairs: first connection 208 from first node 202 to second node 204 and first connection back 214 from second node 204 to first node 202; and second connection 210 from second node 204 to third node 206 and second connection back 216 from third node 206 to second node 204, and a third connection 212 from the third node 206 to the first node 202 and the third connection back 218 from the first node 202 to the third node 206.

[0064] The network also shows first node 202 having a bidirectional pair of connections to an environment 220: a connection from environment 222, and a connection to environment 224. In some examples, the environment 220 can represent an entity outside of the network, such that a node connected to the environment 220 (such as first node 202), also referred to as an environment-facing node, acts as an input node or an output node for the network. The connections to or from the environment 220 may act as connections to another node insofar as they convey inputs to, or receive outputs from, the environment-facing node.

[0065] In some cases, the node sends a self-message to itself. For example, node 206 sends a self-message 226 to itself and node 204 sends selfmessage 228 to itself. In some cases, the node can send multiple messages to itself, such as the same number of self-messages as other input messages from other nodes or environments. For example, node 204 can send two self-messages to itself for the input message from node 202 and 206, respectively.

[0066] In some examples, a network with bidirectional pairs of connections may be configured to perform inference according to the principles of active inference and the minimization of variational free energy (VFE).In some cases, inferences are performed based on Expected Free Energy (EFE), which is a measure of the free energy of the future. Active inference is a framework for modeling Bayes-optimal behavior of an agent. In some cases, an agent - such as a machine learning model, or even a node of a network driving the behavior of the machine learning model - acts to minimize the “surprise” resulting from the agent's observations. Surprise includes a measure of the degree to which an agent’s current observations differ from its preferred observations. In most active inference frameworks, agents seeking to minimize their surprise act on the observed system to solicit feedback that accords with the agent's desired observations: this activity of the agent is why the framework is referred to as “active” inference.

[0067] The active inference framework proposes that, even if an agent does not have the capability to directly minimize its surprise, it can at least seek to minimize a proxy for surprise, called variational free energy. The agent may minimize VFE by performing computation in response to, and in anticipation of, its observations. Implementation of active inference thus rely on the free energy principle, by which an agent reduces its surprise by generating inferences using an internal model and updating its internal model to align with the observed (and acted-upon) system.

[0068] In some examples, a network may be used to implement a machine learning model operating according to an active inference framework (also referred to as an active inference model). Each node of the network may be associated with parameters or weights organized into one or more tensors (e.g., scalars, vectors, or matrices), each tensor modeling a different aspect of the node's behavior.

[0069] In some examples, the active inference behavior of the nodes of the network may be modeled as a partially observable Markov decision process (POMDP), characterized by the equation:POMDP equation wherein:• “T” indicates the time step, from a first time step T=1 to a final (or current) time step T=T,• “ot” indicates the observations o of the node (e.g., its inputs) at a given time step i=t,• “st” indicates the actual state 5 of the observed system (e.g., a hidden state that may differ from the observations of the node) at time step i=t,• "K" indicates a policy for the node, e.g., a possible sequence of actions (e.g., outputs to generate in response to inputs) that the node can take, and• “(|)” indicates an expected reward, e.g., a similarity between inputs received by the node and the node's preferred inputs.

[0070] The active inference behavior of a node may be implemented using three to five sets of weights organized into four tensors.LOGIC NETWORK OF LOGIC GATE REPRESENTATIONS FOR NODES OF A MACHINE LEARNING MODEL

[0071] FIG. 3 illustrates an example method 300 for generating a logic network of logic gate representations for nodes of a machine learning model, according to some examples. Although the example method 300 depicts a particular sequence of operations, the sequence may be altered without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different sequence that does not materially affect the function of the method 300. In other examples, different components of an example device or system that implements the method 300 may perform functions at substantially the same time or in a specific sequence.

[0072] FIG. 3 and other examples described herein are described as being performed by certain systems or applying certain processes, such as a particular machine learning model, but the processes described herein can be performed by one or more machine learning models.

[0073] Examples described herein refer to a node or a group of nodes, or a logic gate or multiple logic gates for simplicity. However, it is appreciated that examples that refer to a node can apply to a group of nodes, and those that apply to a logic gate can apply to multiple logic gates, and vice versa.

[0074] At block 302, the Artificial Intelligence (Al) system accesses a machine learning model with an internal architecture. In some cases, the machine learning model including at least a first group of nodes 304 configured to perform a corresponding first function of the machine learning model and a second group of nodes 306 configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting a binary signal.

[0075] FIG. 4 illustrates a machine learning architecture configured to generate a logic network of a node in a machine learning model, according to some examples. The machine learning architecture includes a number of interconnected nodes that process data to make inferences or predictions. Specifically, the machine learning architecture can include multiple groups of nodes, such as a first group 410 of nodes, a second group 422 of nodes, and a third group 436 of nodes (including nodes 426, 428, 430, 432, and 434).

[0076] In some cases, the network begins with or prunes to include only a single node. The machine learning model expands to create other nodes and clusters of nodes, such as first group 410. The network can add or delete nodes and layers based on certain characteristics, as further described herein.

[0077] Initially, the external data source 402 provides input data to the first node 404 of the machine learning architecture. The external data source 402 can be any component, database, system, server, computing system, or the like, capable of providing or receiving data to the machine learning architecture. For example, the external data source 402 may be a sensor that detects real-world information, a database that stores data for processing, a transmission module that receives data from a remote system, or any other component that can supply data to the architecture.

[0078] Moreover in some cases, the machine learning model is part of or connected to another machine. As such, the output of the machine learning model changes the operation of the other machine. For example, the machine is connected to the external data source 402, whereby characteristics of the machine are transmitted to the external data source 402 and responses from the machine learning model are passed back to the external data source 402. The responses can affect the operations of the connected machine.

[0079] The improved dynamic architecture of the machine learning model described herein dynamically restructures its internal architecture during runtime based on certain characteristics, such as certain characteristics of the network, environmental influences, system performance requirements and limitations, or changes thereof over time. As such, the machine learning model dynamically modifies its internal architecture to adapt to the needs and requirements of the machine.

[0080] For example, the external data source is connected to a physical real-world machine (such as a robot) that sends sensory inputs into the machine learning model and adapts its movements and actions based on output of the machine learning model. Machine learning models can be connected to self-driving cars, enabling the machine learning model to interpret sensor data, make real-time decisions, and send responses to self-driving cars on changing road conditions.

[0081] In some cases, the machine learning models can be connected to a wide range of Internet of Things (loT) devices, including cameras, thermometers, and seismographs enabling smart and adaptive automation in smart homes, cities, and industries.

[0082] In some cases, machine learning models can be connected to recommendation engines, providing personalized suggestions for products, content, or services. Machine learning models can be connected to and providing instructions to computer vision applications, enabling object detection, facial recognition, and image understanding. Machine learning models can be connected to gaming environments,providing adaptive gameplay, opponent Al, and personalized experiences.

[0083] The machine learning models described herein can interact with other systems and machines, and the model adapts to its new or changing environment dynamically by restructuring its internal architecture during runtime. The model can adapt its structure to better suit new data or tasks by adding / pruning nodes and layers.

[0084] In some cases, the model reduces its size and computational requirements by pruning redundant or unnecessary nodes and connections. This allows the model to run faster and on lower power budgets. The model can grow certain areas such as adding nodes to a layer to specialize on a complex task while shrinking other areas. This lets the model focus computation where more attention is needed.

[0085] In some cases, the model can route around failed nodes or layers by restructuring the internal architecture. This makes the system more robust and stable in the face of hardware and network faults or noise. In some cases, the model can rapidly adapt to new tasks by transferring and reusing previously learned features and nodes.

[0086] In some cases, the model dynamically grows areas and prunes others reflecting the demands of the current task. The model can compress unimportant nodes and connections to reduce storage footprint and memory requirements. The model can be personalized for different users by learning unique sub-structures that specialize to each user.

[0087] When the architecture is initialized, a first node 404 serves as the entry point for data from the external data source 402. The external data source 402 is configured, connected, or programmed to transmit, stream, or otherwise feed data into the first node 404.

[0088] In some cases, more than one node is connected to the same external data source, such as external data source 402. In some cases, a node can be connected to more than one external data source. In some cases, the machine learning model has multiple external data sources connected to or from one or more nodes.

[0089] In the example of FIG. 3, node 404 is the starting node that performs initial processing on the input data received from the external data source 402. The external data source 402 provides input data to node 404. Node 404 processes the input data and generates an output. The output of node 404 is transmitted to connected nodes 406 and 408.

[0090] Nodes 404, 406, and 408 are interconnected through connections that allow the output of one node to be passed as input to another node. Together these nodes 404, 406, and 408 comprise the first group of nodes 410. The first group of nodes 410 can be determined based on one or more characteristics, as defined further herein.

[0091] In some cases, the nodes are connected unidirectionally where one node transmits output to another node. In some cases, the nodes are connected bidirectionally where each node's output is transmitted to the other node as inputs. In some cases, nodes are initially connected one way and later become connected a different way.

[0092] Node 406 processes the input data and transmits its output to nodes 404 and 408. Node 408 processes its input data and transmits the output data to nodes 404, 406, and 412, where node 412 is part of a different cluster of nodes.

[0093] Node 412 is one node in a second group of nodes 422 (such as a second group of nodes that performs a second function). Node 412 processes the output data received from node 408 and generates its own output. The output of node 412 is transmitted to other nodes within the second group of nodes 422 - specifically nodes 414, 416, 418, and 420. Nodes 414, 416, 418, and 420 process the output data they receive from node 412 and in turn transmit their respective outputs to other interconnected nodes of the group 422. Node 420 also transmits its output to node 424.

[0094] In some examples, the machine learning model does not define a node to be a part of a group, such as node 424. Node 424 receives the output data from node 420 and generates its own output data which is transmitted to the first node 426 of a third group of nodes 436. The third group of nodes 436 can perform a third function collectively.

[0095] Group 436 processes the output received from node 424 and transmits the corresponding output to other interconnected nodes within the group 436. This process continues, with nodes of a group passing data between themselves and to nodes external to the group of nodes. As data is passed through the machine learning model, the initial node 404 can send a response back to the external data source 402.

[0096] The Al system configures the machine learning model by dynamically restructuring its internal architecture during inference or presentation of the internal architecture of the machine learning model. For example, the machine learning model can be configured to, in response to receiving input data, (1) restructure an internal architecture of the machine learning model, and (2) generate an inference output based on the restructured internal architecture. The machine learning model can restructure an internal architecture of the machine learning model by adding or removing nodes in a group of nodes, connecting or disconnecting groups of nodes, merging or interchanging nodes, or the like as further described herein. In some cases, the machine learning model can restructure the internal architecture during presentation of the internal architecture based on user input (as further described herein).

[0097] At block 308, the Al system generates a table that maps binary input signals to binary output signals for a subset of the first group of nodes in the machine learning model. For example, the table 448 of FIG. 4 maps the two input signals to an output signal. In some cases, all node outputs are in binary form, such as transmitting a 0 or 1. The table includes all permutations of possible input signals to node 424. For example, the inputs (A, B) can be (0,0) which result in an output of 1, (0,1) which result in an output of 1, (1,0) which result in an output of 1, and (1,1) which result in an output of 0.

[0098] In some cases, the Al system accesses historical input and output data that was used to process data through the node or group of nodes. The Al system assesses real input examples that were fed into the nodes and the corresponding outputs that were produced to populate the table. The Al system record these input-output pairs in the mapping table.

[0099] In some cases, the Al system accesses historical input / output data to populate the table. Then the Al system identifies missing table entries and processes inputs corresponding to the missing table entries to generate outputs.

[0100] In some cases, the Al system identifies the node's input-output mapping based on the weights and parameters of the node. For example, the Al system analyzes the weights to deduce the input / output logic and add deterministic or likely input-output pairs to the table even if not directly observed by processing data through the nodes.

[0101] At block 310, the Al system accesses a database that includes representations of logic gates and corresponding inputs and outputs to the representations of the logic gates. The Al system accesses a database containing representations of standard logic gates such as an AND gate, an OR gate, a NOT gate, an XOR gate, a NAND gate, a NOR gate, an XNOR gate, etc.

[0102] In some cases, the database stores logic gate representations that includes, a visual symbol for the gate (e.g. an AND gate symbol), inputs to the gate (e.g. 2 inputs for an AND gate), outputs from the gate (e.g. 1 output for an AND gate), and a truth table showing the gate's inputoutput logic. For example, the AND gate representation includes: the AND symbol, 2 inputs labeled A and B, 1 output labeled Q, A truth table storing AB inputs mapped to output Q (e.g., 0 0 | 0, 0 1 | 0, 1 0 | 0, 1 1 | 1).

[0103] This database provides a library of standard logic gates that the Al system can reference. The table maps the gate symbols and inputs / outputs to the underlying Boolean logic behavior defined in the truth tables.

[0104] At block 312, the Al system, based on the table that maps the binary input signals to the binary output signals of the subset of the machine learning model, generates a logic network including one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the repository.For example, the Al system identifies that the table of inputs and outputs for node 424 behave as a NAND gate 446.

[0105] The Al system compares the input-output mapping table generated for node 424 with data in the database. The Al system analyzes the truth table to determine what logic gate or combination of logic gates could reproduce the same input-output behavior. For example, if the table showed: Input A | Input B | Output Q (0 0 | 1, 0 1 | 1, 1 0 | 1, 1 1 | 0), the Al system recognize the node as a NAND gate which produces the same logic. A NAND gate outputs 1 unless both inputs are 1, in which case it outputs 0.

[0106] The Al system selects the NAND gate representation from the database. The Al system configures the NAND gate to accept the two inputs A and B. This NAND gate then reproduces the input-output logic defined in the table for node 424. In this example, the Al system determined that the truth table for node 424 matched the behavior of a NAND gate and generates a NAND gate 446 to reproduce the logic of node 424.

[0107] In some cases, this process is repeated to construct a full logic network that replicates the input-output logic of other nodes, for an entire group of nodes, or the entire network.

[0108] At block 314, the tokenization system generates code, pseudocode, or non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to generate the binary output signals from the mapped binary input signals of the logic network. For example, the machine learning model identifies three composites of nodes or logic gates, which perform three distinct functions f(x), g(x), and h(x) where f(x) = x + 3, g(x) = x % 4, and h(x, y) = max(x - y, y - x). The tokenization system generates software code that is represented by the following network function: network_fn(x, y) = f(x) + g(y) + h(x, y) as a result of the generated logic network and its subnetworks.

[0109] In some cases, the Al system presents a portion of the machine learning model, the portion replacing the subset of the first group ofnodes with a graphical representation of the logic network on a user interface. This table shows what binary output is produced for each possible combination of binary inputs. After generating the logic network that mimics the input-output behavior of the node, the Al system displays this logic network visually within the machine learning model topology.

[0110] The Al system identifies a subset of nodes that were analyzed and mapped to a logic network (such as node 424). The Al system removes the visual representation of those original nodes from the displayed model topology. The Al system inserts a visual representation of the generated logic network in their place. For example, if node 424 was analyzed, the Al system removes the visual symbols for node 424. The Al system displays the logic network visualization (e.g. interconnected NAND and AND gates) in place of the removed node.[oni] The Al system replaces the original node visualization with a graphical logic network that replicates their input-output behavior, such as the NAND gate 446. The user can now view the model topology with the logic network inserted. This provides intuitive visual insight into the underlying logic being performed within that portion of the model.

[0112] In some cases, the logic network is presented on another portion of the user interface and visual indicators linking the assessed node or group of nodes and the logic network, such as visual indicator 458. In some cases, the user interface enables the user to interact with the logic network visualization, such as clicking gates to see the logic tables, probing inputs / outputs, swapping between logic gates and nodes, editing the network, or the like.

[0113] In some cases, the Al system receives the input data. The Al system is provided with new data that the Al system applies to the machine learning model to further analyze and process. The input data can come from an external source and be fed into the machine learning model via the external data source 402.

[0114] The Al system applies the input data to the machine learning model. The application of the input data causes the machine learning model toidentify a first value for a first characteristic of at least a first node of the first group of nodes corresponding to the first function. The machine learning model determines that the first value meets a threshold value corresponding to the first function and changes a node topology for the machine learning model.

[0115] In some cases, the machine learning model identifies the characteristic for a particular node. In some cases, the machine learning model identifies the characteristic for a subset or all of the nodes in a group of nodes. In some cases, the machine learning model identifies the characteristic for each node in the machine learning model or for an individual node.

[0116] In some cases, the machine learning model determines a characteristic for a plurality of nodes (e.g., in a group or in the entire model) and determines an overall characteristic, such as based on a sum, an average, or other derived metric. In some cases, the characteristic is of a specific node. In some cases, the characteristic is a relative metric of a node or group of nodes compared to another node or group of nodes.

[0117] In some cases, the machine learning model identifies a characteristic indicative of a self-efficacy metric, a variational or expected free energy metric, a characteristic of the node itself (number of connections, weightings, parameters, time since the node was created), computational operations for the node, a latency metric, or the like to determine when and how to modify the internal architecture of the model.

[0118] In response, the machine learning model can add or prune nodes in a misaligned group of nodes to rebalance representations across group of nodes. In some cases, the machine learning model triggers architectural changes on a fixed schedule.

[0119] For example, in a speech recognition model, the input audio processing group of nodes are restructured based on changing properties of the input audio data, such as background noise or accents. In another example, in a medical image diagnosis model, the group of nodes performing lesion detection are modified based on metrics about lesion identification accuracy. In yet another example, in a weather forecastingmodel, the atmospheric data preprocessing group of nodes are altered based on the distribution of temperatures and precipitation. The function of the group of nodes ties directly to the relevant characteristic.

[0120] Nodes or groups of nodes can perform certain functions for the machine learning model. For example, a group of nodes can perform input representation encoding raw data into a suitable format, feature extraction transforming input data to higher level features, classification or regression producing predictions based on learned features, local feature extraction, pooling, down or up sampling, object localization, or the like.

[0121] The machine learning model restructures the internal architecture of the machine learning model by changing a number of nodes in the first group of nodes corresponding to the first function. The number of nodes in the first group of nodes can be changed by adding a node or group of nodes, deleting a node or group of nodes, merging a node or group of nodes, interchanging a node or group of nodes, or the like.

[0122] The machine learning model is configured to dynamically change its internal architecture during run-time. As the Al system is processing real input data and making predictions, the model can modify its nodes and connections on-the-fly. As the model makes these architectural changes, the logic mapping and visualization are continually updated to reflect the new node behaviors and node topology.

[0123] In response to the model modifying its internal architecture during run-time, the Al system regenerates the input-output logic mapping table for the modified nodes. The Al system processes new test data through the nodes to observe their updated input-output relationships based on the new architecture.

[0124] The Al system uses this updated logic mapping table to identify if the nodes now implement different logic gates or structures than before the architecture change. The Al system constructs an updated logic network visualization that accurately reflects the nodes' newest inputoutput logic based on the on-the-fly architectural changes made by themodel during live inference, including in some implementations visually highlighting the areas which changed or didn’t change.

[0125] This updated logic network is displayed to the user, providing realtime visibility into how the model's live reasoning and decision making processes are changing in response to architecture modifications during active usage. Thus, the Al system dynamically updates the transparent logic view in real-time as the model itself evolves its architecture during live predictions on real-world data.

[0126] In some cases, the Al system displays a control, such as a button or user selectable interface element, that enables a user to modify the internal architecture of the machine learning model. For example, the control can be configured to add or remove logic gates or nodes, connect gates or nodes in a different order, swap gates or nodes for different gate or node types, or the like.

[0127] When the user selects the control to confirm the edits to the logic network visualization, the Al system identifies how the inputs and outputs for the overall network have changed based on the user's modifications. For example, certain inputs may now be connected to different gates.

[0128] The Al system updates the actual nodes in the machine learning model to match the new modified input and output connections defined by the user's edited logic network, such as the new logic gates. The Al system can access a database storing a mapping between a logic gate or a collection of logic gates with nodes. This essentially allows the user to manipulate and restructure the displayed logic network and have the underlying nodes in the model directly updated to implement that new user-defined logic flow.

[0129] The machine learning model applies the input data to the machine learning model with the restructured internal architecture to generate the inference output. As such, the restructuring of the model and generating an inference output occurs entirely on the fly during runtime inference or during run-time of the presentation of the user interface.

[0130] The Al system uses a combined order of specific procedures that displays internal architectures of the machine learning model and enables altering of the structure of the machine learning model in real time or during inference. The Al system displays logic gate representations of nodes and the user can replace logic gates with other logic gates, which can in turn, cause the Al system to automatically modify the nodes to perform the functions of the new logic gates. The Al system does not simply automate traditional systems and concepts. By leveraging dynamic architectural restructuring, the Al system is able to modify the inner topology of a machine learning model in a very useful and specific manner.

[0131] Although examples described herein describe one type of model, such as a machine learning model, it is appreciated that such features apply to other types of models, such as an artificial intelligence model or a graphical machine learning model, and vice versa. For example, types of artificial intelligence models includes a graphical machine learning model and a machine learning model. An artificial intelligence model includes models used to simulate human intelligence in machines, such as understanding natural language, recognizing patterns in data, making decisions, and solving complex problems. A machine learning model is a subset of artificial intelligence models that includes using algorithms and statistical techniques to enable computers to improve performance on a task through learning from data. A graphical machine learning model is a type of machine learning model that uses graphical representations to model dependencies between variables.

[0132] Although examples described herein describe one type of a collection of nodes, such as a group of nodes, it is appreciated that such features apply to other types of nodes, such as a cluster of nodes or a group of interconnected nodes, and vice versa. For example, a group of nodes includes a collection of nodes that share a common purpose or are organized together within the machine learning model. A cluster of nodes includes a localized or cohesive set of nodes that work together to perform a specific function within the machine learning model. A groupof interconnected nodes includes nodes that are linked or connected to each other.

[0133] Although examples described herein describe the restructuring of an internal architecture for the machine learning model, it is appreciated that such features apply to other types of changes, such as modifying a network or reconfiguring a topology, and vice versa. For example, modifying a network includes changes made to the network by changing its group of nodes, nodes, parameters, or structure. Restructuring internal architecture includes making changes to the organization and composition of the model's components. Reconfiguring topology includes changing the arrangement or connections between groups of nodes or nodes within the model.REPRESENTATIVE LOGIC NETWORK FOR GROUP OFNODES

[0134] FIG. 5 illustrates the generation of a logic network that includes multiple logic gates representative of a group of nodes, according to some examples. The Al system can analyze inputs and outputs of an entire group of nodes, such as group 510 that receives input from the external data source 502, or group 544 that includes nodes 512, 514, 516, 518, and 520, or group 536 that includes nodes 526, 528, 530, 532, and 534.

[0135] The Al system records or inputs all the inputs entering the group of nodes (e.g. nodes 512-520) over many examples. The Al system records the final outputs exiting the group of nodes 522 for each set of inputs into a truth table. This captures the overall input-output logic for the node group.

[0136] The Al system accesses a database to identify a logic network that generates the input-output logic of the truth table. For example, the nodes of group 522 implement a logic network 522 that includes an AND gate 556, a NOT gate 558, and a NAND gate 554.

[0137] In some cases, the Al system records or inputs input data into each node individually and records the output of each node individually, capturing the input-output logic for each node. The Al system determinesconnections between the internal nodes (512-520), and identifies distinct logic paths from inputs to outputs through various node combinations. Each path represents a sub-logic function that contributes to the overall group output. The Al system analyzes each internal logic path in isolation and determines which gate or gates replicate the node's inputoutput behavior.

[0138] The Al system identifies the connections between nodes and connects the representative logic gates based on the connections between nodes. For example, if node 512 represents a NAND gate and node 514 represents an OR gate, and the output of node 512 is entered into the input of node 514, then the logic network illustrates the output of the NAND gate transmitted as an input to the OR gate.

[0139] The nodes of a group of nodes are connected to at least another node in the group of nodes. As such, each logic gate in the representative logic network is connected to another logic gate in the representative logic network.

[0140] In some examples, the machine learning model identifies a group of nodes based on the nodes performing a common function. For example, a group of nodes can be aligned or differentiated to perform a particular function, as further described herein.

[0141] In some examples, the machine learning model identifies a group of nodes based on an architecture of the network of nodes. For example, the machine learning model identifies a group of nodes based on how the nodes are connected. In some cases, the machine learning model identifies a group of nodes based on a cycle by determining an ordered sequence of nodes where a final node transmits the output data to another node in the sequence, or determining that nodes are or are not a directed graph.

[0142] In some cases, the machine learning model identifies a group of nodes based on how certain nodes are connected with other nodes. For example, the machine learning model can identify a portion of a group of nodes when an initial node is connected to at least three other nodes (first connected nodes). The machine learning model identifies the group ofnodes to include at least the initial node and the first connected nodes. The machine learning model identifies the nodes that the first connected nodes are further connected to (the second connected nodes) and determines whether to include the second connected nodes with the group of nodes. For example, the machine learning model identifies which nodes the second connected nodes are connected to (the third connected nodes) and determines whether to add the second connected node based on its own connected nodes (the third connected nodes).

[0143] In the example of FIG. 4, the machine learning model identifies that the initial node 404 is connected with nodes 406 and 408 (the second connected nodes) and the external data source 402. Thus, the machine learning model identifies nodes 404, 406, and 408 as a first group of nodes 410. The machine learning model identifies that the second connected nodes are connected to each other as well as node 412 (third connected node). However, the machine learning model identifies that such a node (nor any of its further connections) is reconnected back to the nodes identified in the first group of nodes. Thus, the machine learning model completes the definition of the first group of nodes as nodes 404, 406, and 408.

[0144] In some examples, the machine learning model identifies a group of nodes at least based on the historical information related to the node. For example, the node can be created symmetrically or asymmetrically from a parent node. In some cases, a node is symmetrically created from another node by inheriting at least a subset or at least two or all of the connections the parent node has with other nodes. In some cases, a node is symmetrically created from another node by inheriting the node's type, weighting, or the like.

[0145] In some cases, a node is asymmetrically created from another node by only being connected with the parent node initially or including a connection with a node that the parent node is not connected with. In some cases, a node is asymmetrically created from another node by having a different node parameter from the parent node, such as node type, weighting, or the like.

[0146] The machine learning model can identify a start or end of a group based on whether a node was symmetrically or asymmetrically created. For example, a node that is symmetrically created can be added to the group of nodes that is associated with the parent node or start a new group of nodes with the parent node. A node that is asymmetrically created can be determined to not be included in to the group of nodes of the parent and initiate the start of a group. In some cases, a child node is born either symmetrically or asymmetrically and becomes associated with a parent’s group of nodes. In some cases, a network or group can be split into sub-groups by clustering cells based on similar self-efficacy, similar VFE or EFE, correlated outputs, or the like.

[0147] Although examples described herein refer to applying VFE, it is appreciated that the features described herein apply also to EFE, and vice versa. For simplicity of the disclosure, some examples are described as applying VFE or EFE.

[0148] In some cases, the machine learning model identifies a group of nodes based on depth that indicates a position of the node within the model. The position can be relative to a reference point, such as an external data source, such as external data source 402. For example, node 404 is in one depth value, nodes 406 and 408 are of two depth value. As such, nodes 404, 406, and 408 are grouped as one cluster of nodes.

[0149] In some cases, the machine learning model identifies a group of nodes based on an indication of self-efficacy between nodes, wherein an indication of self-efficacy is indicative of a measurement of, an extent to which, or a degree to which one node’s output affects the input it receives from another node. The machine learning model identifies the group of nodes based on a self-efficacy indicator of a node meeting a certain threshold or certain nodes having a higher or similar self-efficacy indicator among each other in the group than other connected nodes. In some cases, the self-efficacy indicator is a measurement metric or identified value (as further described herein).

[0150] In some cases, the machine learning model identifies a group of nodes based on the layer that the node is in. In multi-layer neural networks and other layered machine learning models, the layers provide a natural way to group nodes. Nodes within the same layer have similar roles and connectivity patterns. For example, in a feedforward neural network, the input layer nodes may process and normalize the raw input data. The hidden layer nodes identify features and patterns in the data. The output layer nodes make predictions and inferences.

[0151] In some cases, the control enables a user to add a node. The control enables a user to add a new node from an existing node via asymmetric or symmetric division. Asymmetric division creates a child node with different connectivity or initialization than its parent node. In some cases, if a node divides asymmetrically, the new child node will only have a connection to its parent node. The new node does not inherit any of the parent node's other connections. In some cases, the (child) node inherits only a subset of (parent) node's weights in a partially symmetric fashion.

[0152] In some cases, the connections to and from the new nodes are formed randomly or based on some programmed heuristics. For example, each new node could connect to a random subset of nodes in the adjacent layers. The parameters (weights, biases) of the new nodes can be initialized randomly or using pre-defined schemes.

[0153] In some cases, a machine learning model creates nodes that are taken from another model. Nodes could be copied over or transferred from another pre-trained model, leveraging prior learned representations. For example, a machine learning model or user identifies a desired function (e.g., a newly desired function based on changing environmental data). The machine learning model identifies another machine learning model that has been trained to perform such a function and copies nodes over to the architecture.

[0154] In some cases, the control enables a user to delete a node from the group of nodes. In some cases, all incoming and outgoing connections to the deleted node are removed. Any weight parameters associatedspecifically with the connections to and from the deleted node are removed. Any parameters associated just with the deleted node, such as bias terms, are removed from the model. Parameters associated with connections (e.g. weights) or other nodes can remain unchanged.

[0155] In some cases, new connections are formed between the remaining nodes, such as connecting the nodes within the group that the deleted node was originally connected with to a node external to the group of nodes that the deleted node was originally connected to.

[0156] In some cases, the control enables a user to create a new connection within a group of nodes. The new connection provides an additional pathway for information to flow between the nodes. This can improve signal propagation through the group, enable higher-dimensional computations, or enable redundancy between nodes in the case of hardware or network failures.

[0157] In some cases, the new connection has its weight parameter randomly initialized, such as in a normal distribution or a uniform distribution. In some cases, the new connection is initialized with a weight parameter that is based on one or more prior existing connections of other nodes.

[0158] In some cases, the control enables a user to replace a node with a different node, replace a single node with a group of nodes, replace a group of nodes with a single node, interchange nodes or groups of nodes, or the like. In some cases, the control enables a user to split two nodes or merge two nodes together.

[0159] In some cases, the control enables a user to skip over a node or an entire group of nodes by connecting or disconnecting nodes within the group. In some cases, the control enables a user to reroute signals among node groups by connecting and disconnecting certain connections. In some cases, the machine learning model activates and deactivates certain connections to reroute signals. The model can control the order in which the external data source signal is processed by nodes or groups of nodes. In the default configuration, the signal flows from the external data source 402 through group 410, then group 422, and finally group 436.The user can use the controls to change the processing order to group 410, then group 436, and finally group 422.LOGIC GATE AND HIGHER ORDER LOGIC INTERPRETER

[0160] FIG. 6 illustrates an interpreter configured to convert nodes, groups of nodes, or truth tables into logic gates, logic networks, and higher order logic, according to some examples. In some cases, the Al system or the machine learning model includes an interpreter 610 that can receive as input a node, a group of nodes, a different subset of nodes, an entire machine learning model, one or more truth tables (e.g., of nodes or groups of nodes), or the like. For example, the input can be a selection of a node or group of nodes from the user or a request from the user to see a user interface of the machine learning model. In some cases, the inputted machine learning model can be a snapshot of the model or a subset of the model taken at a particular time step.

[0161] The interpreter 610 can be a component of the machine learning model or a separate machine learning model 616 trained to convert information related to a node, a group of nodes, or a truth table to output a logic gate, a group of connected logic gates, or higher order logic.

[0162] The interpreter 610 can accept different inputs to perform the node logic mapping and visualization, providing flexibility to the Al system. The interpreter can analyze and visualize the logic of a single node 524, a group of nodes 510 such as nodes 504, 506, and 508, a different subset of nodes from a model, or the entire end-to-end model. The input can be the nodes themselves, pre-generated truth tables describing their input-output logic, generated truth tables 448 by inputting permutations of the inputs, a combination thereof, or the like. This allows the logic mapping to be performed at different granularities, focused on specific portions of the model or the full model pipeline.

[0163] The interpreter 610 can generate truth tables for the node or groups of nodes, as further described herein. A truth table includes a mapping between all possible combinations of inputs and the resulting output. The interpreter can automatically generate truth tables that capture the inputoutput logic for a node or group of interconnected nodes. This involvesfeeding many different input combinations through the nodes and recording the outputs to map the complete function. The truth table is an unambiguous representation of the node's logic that can then be used to identify matching logic gates.

[0164] In some cases, the interpreter 610 access a library of logic gates 614 to map the truth tables to one or more nodes to identify a representative logic gate or a circuit of connected logic gates that, when inputted with input data, generate the output data in the truth table. The interpreter accesses a library containing the definitions of standard logic gates (AND, OR, NOT, etc.) and their corresponding truth tables. It compares the truth table generated for a node or a group of nodes to the library to identify which logic gate or sequence of connected gates produces the same input-output mapping. This allows the interpreter 610 to identify known logic gates representing the function of the node or groups of nodes.

[0165] In some cases, the interpreter 610 can combine logic gates to generate higher order functions, such as converting the NAND gate 554, the AND gate 556, and the NOT gate 558 into an adder 606. Higher- order logic elements include an adder, a subtractor, a multiplier, a divider, a counter, a shift register, a multiplexer, a demultiplexer, or a comparator, or the like.

[0166] The interpreter is not limited to just replicating the exact logic of a node or group of nodes. The interpreter can combine multiple gates together in different ways to implement higher level functions. For example, a half-adder for binary addition can be constructed by connecting an AND and XOR gate in a particular configuration. This allows the node's logic to be represented at a higher, more abstract level when appropriate rather than just the basic gate level.

[0167] In some cases, the interpreter can map to the simplest function that accurately captures the essence of the node's computation. In some cases, the interpreter can map to the fewest logic gates, to available hardware or hardware restrictions, user preferences, or one or morecharacteristics as described herein (such as latency or computational load).

[0168] In some cases, the interpreter 610 performs logic mapping to convert the computations performed by nodes or groups of nodes into representations using basic logic gates (AND, OR, NOT, etc.) or higher- order logic functions. In some cases, the interpreter can directly map the nodes to a group of logic gates or directly to higher order logic without first identifying individual logic gates.

[0169] The input-output relationship of the nodes may closely match that of known groups of logic gates or higher order logic. Certain combinations of nodes may implement standard logic functions like adders, multiplexers, encoders, etc. If the overall input-output logic of a group of nodes matches one of these definitions, the interpreter can directly convert the group to that higher-level function or a group of logic gates, rather than decomposing the nodes into basic gates.

[0170] In some cases, the Al system generates code, pseudocode, or non- transitory computer-readable storage medium storing instructions 620 that, when executed by a processor, cause the processor to generate the binary output signals from the mapped binary input signals of the logic network. For example, the Al system generates and displays software code, pseudo code, or object code that can be compiled or executed to perform the identification of logic gate representations. For example, the Al system generates software code that can take input data from the external data source and process the data in software to perform the functions of a NAND gate, an AND gate, a collection of the NAND, AND, and NOT gates, determinations performed by a node, such as node 524. In some cases, the machine learning model generates code or pseudocode from the logic network.

[0171] In some cases, the machine learning model can generate representations directly or indirectly from information related to the machine learning model to various representations, or vice versa. For example, the machine learning model generates representations of logic gates from characteristics of a node, can directly identify representationsof higher order logic from truth tables, can generate software code directly from logic gates, can generate pseudocode directly from truth tables, or the like.

[0172] Pseudocode can include an expression of the logic of a computer program or algorithm in a human-readable and structured format, such as by using a mixture of natural language and programming-like constructs. Pseudocode does not have to be tied to any specific programming language syntax, but rather includes a step-by-step sequence of actions and decisions that need to be taken to solve a problem or accomplish a task. In some cases, pseudocode includes an outline of the overall logic and flow of a program before actual coding begins. In some cases, instead or in addition to pseudocode, the machine learning model generates actual computer code in a particular language (e.g. Python, C, JavaScript, Rust), where the language and code conventions may be fixed or adjustable by the user.

[0173] As later shown in FIG. 9, various representations of the machine learning model can be displayed. For the sake of simplicity, FIG. 9 illustrates displaying a node topology converted to a logic network of logic gates. However, it is appreciated that other user interfaces can be displayed, as further described herein. The user interface can display a representation replacing nodes of a machine learning model. For example, the user interface displays one or more logic gates in place of one or more nodes, a group of logic gates in place of a group of nodes, higher order logic such as an adder in place of one or more nodes, pseudocode or software in place of one or more nodes, or the like. In some examples, the user interface displays one or more of node topology, logic gates, groups of logic gates, higher order logic, pseudocode, or software, such as in a split screen.

[0174] In some cases, the Al system displays the change over time. A user or the machine learning model can delete a node (or otherwise reconfigure the node topology as further described herein). As a result, logic for the machine learning model may have changed from f(x) = x+3 to f(x) = x+2. Traditional machine learning models have no practicalway to show how such a deletion of the node changes the functional behavior of the machine learning model. However, the Al system of the present disclosure generates representative logic gates, higher order logic, pseudocode, and / or software. Thus, the Al system can display that the deletion of the node reduced the added number from 3 to 2, such as via code or pseudocode.UNIDIRECTIONAL AND BIDIRECTIONAL LOGIC GATE INTERPRETATION

[0175] FIG. 7 illustrates unidirectional and bidirectional logic gate interpretation, according to some examples. In some cases, the machine learning model has unidirectional connections between nodes. A unidirectional connection includes a connection that transmits signals in only one direction - from a transmitting node to a receiving node.

[0176] In some cases, the machine learning model includes unidirectional connections, such as connections 214, 216, and 218 sending signals in one direction among the nodes 202, 204, and 206. For each connection, one node is designated the transmitter and the other is the receiver. The transmitting node sends binary signals along the connection which are received by the receiving node. The signals cannot travel in the reverse direction.

[0177] The truth table generated by the interpreter maps inputs to outputs in this single direction. For example, the table maps inputs and generated outputs at each particular node. For example, node 206 receives a signal from 202 via connection 218, node 204 receives a signal from 206 via connection 216, and node 202 receives a signal from node 204 via connection 214. The Al system determines based on the truth table that node 204 has a truth table that can be represented by a NOT gate 558.

[0178] In some cases, the machine learning model has bidirectional connections between nodes. A bidirectional connection can transmit signals in both directions between the connected nodes.

[0179] The machine learning model includes connections that each link two nodes together. For each connection, the two linked nodes can act astransmitter and receiver in both directions. For example, node 206 receives a signal from 202 via connection 218, node 204 receives a signal from 206 via connection 216, and node 202 receives a signal from node 204 via connection 214 in one direction, which as noted above can be represented by the NOT gate 558.

[0180] In the other direction, node 206 receives a signal from node 204 via connection 210, node 202 receives a signal from node 206 via connection 212, and node 204 receives a signal from node 202 via connection 208. The Al system determines based on the truth table that node 204 has a truth table in the other direction that can be represented by a NAND gate 446.NON-BINARY NODE OUTPUT AND LOGIC GATEINTERPRETATIONS

[0181] FIG. 8 illustrates possible binary node outputs over a distribution and logic gate interpretations, according to some examples. In some machine learning models, the nodes output binary 0 / 1 signals but respond to different inputs over a distribution. For example, instead of a NAND gate which always outputs a 0 when both inputs are one, a particular node might behave 90% like a NAND gate, where the node responds as a NAND gate 90% of the time, but responds with different output 10% of the time. In such cases, the logic gate representations of nodes may be a probability distribution over several logic gates.

[0182] For example, node 504, 506, and 508 of groups 510 output binary outputs that can change based on the binary inputs. Based on the inputs from nodes 504 and 506, node 508 may be acting as certain logic gates over a probability distribution 804. For example, node 508 behaves as a NAND gate 70% of the time, 20% as a AND gate, and 10% as a NOT gate in terms of its logic behavior.

[0183] The output values reflect the likelihood of the node behaving as each type of logic gate. In some cases, the interpreter system generates a probabilistic selector 806 when generating the logic network for the node. The interpreter identifies the probabilities of the node acting as each logic gate based on its input values.

[0184] The interpreter then constructs a selector 806 that will randomly pick one of the logic gates to use each time. In some cases, the selector 806 randomly picks one of the logic gates based on those probability weights. For example, the selector would choose the NAND gate 70% of the time, the AND gate 20% of the time, and the NOT gate 10% of the time.

[0185] This selector 806 is inserted before the three logic gates when visualizing the node's logic mapping. During operation, the selector 806 dynamically selects which logic gate to use on each evaluation according to the probability distribution. Then the output node 814 receives the output from either the NAND gate 446, the AND gate 808, or the NOT gate 558, and transmits the output to the following node.

[0186] In some cases, the visualized logic gate is the logic gate with the highest probability. In the example above, the NAND gate is 70% so the visualization displays the NAND gate. In some cases, the user interface includes a visualization of an indication of the different probabilities.For example, the user interface displays a pie chart 818 with a visual icon of the logic gate corresponding to the piece of the pie chart, each piece of the pie chart representative of the percentages. In some cases, the user interface displays the different probabilities or logic gates using visual indicators, such as a size (larger probabilities include larger logic gates), shapes, color (from a lighter color to a darker color as probabilities increase), or the like.

[0187] This allows the Al system to model nodes that exhibit stochastic logic behaviors. The selector captures the distributed probabilistic nature of the node's computation. The logic mapping visualization thus remains accurate to the node's behavior.SPLIT SCREEN OF LOGIC GATE INTERPRETATION

[0188] FIG. 9 illustrates a split screen user interface displaying the internal architecture of the machine learning model on one side and logic gate representations on the other side, according to some examples. In FIG.9, the machine learning model includes 3 groups of nodes: group 910 (that includes nodes 904, 906, and 908), group 922 (that includes nodes912, 914, 916, 918, 920), and group 936 (that includes nodes 926, 928, 930, 932, and 934). For example, the node topology of the machine learning model is displayed adjacent to the logic gate representations.

[0189] The interpreter first generates a truth table for each group of nodes and tries to identify representative a logic gate or set of logic gates for each group as a whole. The interpreter generates the truth table for group 910 and identifies a single NAND gate 446 to represent group 910. The interpreter generates the truth table and identifies a single AND gate 808 to represent group 922.

[0190] In some cases, the interpreter cannot find a mapping that represents the entire group of nodes with logic gates. For example, the interpreter cannot find representative logic gates the truth table corresponding to group 936. When this occurs, the interpreter can start break the group into smaller subsets of nodes and try different combinations of such nodes to try and identify representative logic gates.

[0191] The interpreter identifies representative logic gates for the subset of nodes that include nodes 926, 928, 932, and 934. The truth table for the collective group of nodes 926, 928, 932, and 934 can be represented by a combination of the logic gates: NAND gate 554, NOT gate 558, AND gate 556.

[0192] In some cases, nodes may not be able to be represented by logic gates. As shown in FIG. 9, node 930 is not converted into a logic gate representation because the Al system cannot identify a representative logic gate. As such, the user interface keeps the node as a node and does not display a logic gate representation.

[0193] The interpreter stitches together the logic mappings. Group 910 maps to NAND gate 446, group 922 maps to AND gate, the subset of group 936 maps to NAND 554, NOT 558, and AND 556 gates, and node 930 remains as a node.

[0194] The Al system displays group 910 replaced with NAND gate 446, group 922 replaced with AND gate, the subset of group 936 replaced with its logic gates, and node 930 remaining in place unmapped and displayed as a node.

[0195] In some cases, the Al system generates non-transitory computer- readable storage medium storing instructions that, when executed by a processor, cause the processor to generate the binary output signals from the mapped binary input signals of the logic network. For example, the Al system generates and displays pseudocode, software code or object code that can be compiled or executed to perform the identification of logic gate representations. For example, the Al system generates software code that can take input data from the external data source 902 and process the data in software to perform the functions of a NAND gate, an AND gate, a collection of the NAND, AND, and NOT gates, determinations performed by node 924, and determinations performed by node 930.

[0196] The Al system identifies how each logic gate should be connected based on the connections on the node topology. For example, group 910 can be represented by the NAND gate 446. Group 910 was connected to the external data source 902 and node 912 of group 922. As such, the NAND gate is also connected to the external data source 902 and the logic gate representative of group 922.TENSORS

[0197] FIG. 10 shows four tensors used by a POMDP of a node. The A tensor 1002, B matrix 1012 (consisting of the Bo submatrix 1004 and Bi submatrix 1006), C vector 1008, and D vector 1010 indicate four sets of weights maintained by the node. Each of these sets of weights is used to contribute to the performance of an active inference task by the network (e.g., network). The values of the weights shown in the example of FIG. 10 are initial weight values that may be assigned to a newly-initialized node of the network (e.g., network), also referred to as an undifferentiated node or a stem node. The node may be deployed within the network to contribute to an inference task during a runtime period, during which the node may differentiate itself by adjusting its weight values to diverge from their initial values in response to interactions with other nodes of the network. A node that has undergone at least partial differentiation may be referred to as a differentiated node.

[0198] In some examples, the inference task performed by the network is an active inference task. In active inference, as described herein, a machine learning model acts upon a system and observes the system.

[0199] In some examples, the A tensor 1002 may be regarded as modeling a probabilistic mapping of the node's observations (e.g., its inputs at a given time step) to an inferred hidden state of the observed system (e.g., a node or set of nodes). This mapping may be referred to as an observational model, denoted as:Observational Model

[0200] In the example shown in FIG. 10, the A tensor 1002 is initialized as an identity matrix mapping observed inputs to exactly equivalent hidden states. In some examples, the inputs received by a node are equivalent to the state of the observed system; thus, there are no hidden states, and the A tensor 1002 may remain unchanged during differentiation.

[0201] In some examples, the B matrix 1012 may be regarded as modeling a probabilistic mapping of the node's observations (e.g., its inputs) at a given time step T-1 to a predicted set of observations at a subsequent time step T. This mapping may be referred to as a transition model, denoted as:Transition Model

[0202] In some examples, the B matrix 1012 includes a separate submatrix for each set of outputs of the node at the first time step. Thus, the predicted inputs at the second time step are conditioned on the outputs of the node at the first time step. In the example shown in FIG. 10, the node has only a single output (e.g., a binary activation value) having only two possible states, 1 or 0. The B matrix 1012 therefore consists of twosubmatrices: a Bo submatrix 1004 corresponding to output 0, and a Bi submatrix 1006 corresponding to output 1.

[0203] In the example shown in FIG. 10, Bo submatrix 1004 and Bi submatrix 1006 are both initialized as homogeneous matrices (e.g., all matrix elements set to a value of 0.5) mapping all observed inputs at the first time step with equal probabilities to predicted inputs at the second time step.

[0204] In some examples, the C vector 1008 may be regarded as modeling a prior probability distribution (also referred to simply as a prior) over the node's observations (e.g., its inputs). This prior over observations may be referred to as the node's preferences or prior preferences, and is denoted as:Prior Over Observations

[0205] In the example shown in FIG. 10, the C vector 1008 is initialized as a zero vector mapping all observations to a zero reward. Thus, a node initialized according to the initial values shown in FIG. 10 has no preferred values for its inputs.

[0206] In some examples, the D vector 1010 may be regarded as modeling a prior over an initial hidden state at initial time step T=1. This prior over the initial hidden state is denoted as:Prior Over Initial Hidden State

[0207] In the example shown in FIG. 10, the D vector 1010 is initialized as a homogeneous vector (e.g., all vector components set to a value of 0.5) weighting all initial state values equally. Thus, a node initializedaccording to the initial values shown in FIG. 10 has no a priori beliefs about an initial state of the observed system.

[0208] In some examples, the B matrix 1012 may be the primary or the only set of weights to be adjusted during differentiation of the node: in other words, each of the other sets of weights (the A tensor 1002, C vector 1008, and D vector 1010) remains constant, whereas the transition model (implemented by the B matrix 1012) is adjusted to attempt to predict state transitions by the observed system (e.g., other connected nodes), conditioned on the actions (e.g., outputs) of the node. However, in some examples, one or more of the other sets of weights may also be adjusted during differentiation.

[0209] In some cases, the C vector 1008 is used to guide the system's determination of variable free energy. Variable free energy can be determined based on a pragmatic term ("does the node get what is expected") or an epistemic term ("does the node learn?"). The C vector can be used to adjust the balance between the pragmatic and epistemic term. For example, the C vector can be set to 0 whereby the node is maximizing epistemic gain.

[0210] In some cases, the system applies a pragmatic term that focuses on the practical use or application of a concept, emphasizing its utility in real-world scenarios. The system can prioritize pragmatic terms to enable the machine learning model to focus on action, decision-making, and achieving specific outcomes. For example, the system increases the pragmatic term in the C vector 1008 such that the model focuses more on improving accuracy, efficiency, performance, or the like.

[0211] In some cases, the system applies an epistemic term that pertains to knowledge, understanding, and information. The system can prioritize epistemic terms such that the machine learning model focuses on gaining insight on the functions performed by the machine learning model and updating the model to learn from current inferences. For instance, the system increases the epistemic terms in the C vector 1008 such that the model focuses on certainty, uncertainty, and knowledge of the machine learning model.

[0212] FIG. 11 through FIG. 15 illustrate examples of how the weights of the B matrix 1012 of a node may change during differentiation to adapt to different systems exhibiting different behaviors in response to the node's own actions.

[0213] FIG. 11 shows an initial Bo submatrix 1702, equivalent to the initial state of the Bo submatrix 1004 shown in FIG. 10. The initial Bo submatrix 1702 is the matrix of predictions for a future observation on the state of a system. In the illustrated example, the observed system is a single other node connected to the node associated with the initial Bo submatrix 1702, and the observed node generates a single binary output of one bit value at each time step.

[0214] The initial Bo submatrix 1702 includes two columns of weights corresponding to two first time step inputs 1706. The first time step inputs 1706 are observation of two different states of the system at a previous time step T-1 (also referred to herein as the first time step). The weights for 0 input at first time step 1708 are in the left column, and the weights for 1 input at first time step 1710 are in the right column.

[0215] These columns are split into two rows, the second time step inputs 1704, corresponding to observation of two different states of the system at a current time step T (also referred to herein as the second time step). The weights for 0 input at second time step 1712 are in the top row, and the weights for 1 input at second time step 1714 are in the bottom row.

[0216] It will be appreciated that, for nodes observing systems with more complex outputs (e.g., multiple connected nodes or nodes generating outputs more complex than a single bit per time step), the initial Bo submatrix 1702 would include more columns and rows. For example, a node connected to three other nodes, each outputting a single bit at each time step, would need an initial Bo submatrix 1702 with 23= 8 columns and 8 rows to map all previously observed system states to all predicted current systems states.

[0217] As described above, the initial Bo submatrix 1702 is a probabilistic mapping of previous observations to predicted current observations, conditioned on the output of the node at time step T-1 having been thebinary value 0. The Bi submatrix 1006, by contrast, stores the weight values mapping previous observations to predicted current observations conditioned on the output of the node at time step T-1 having been the binary value 1. It will be appreciated that, for nodes having a more complex output than a single bit at each time step, a greater number of B submatrices would be required, equal to the number of possible output states (e.g., 8 submatrices for a 3 -bit binary output).

[0218] Because the nodes of the network generate their outputs for a given time step T prior to receiving their neighboring nodes' outputs for time step T, the computations informed by the weights of the initial Bo submatrix 1702 are performed after time step T-1 and before time step T. Thus, time step T may either be referred to as the “current” time step (meaning the time step for which the current outputs are being computed) or as the “next” or “future” time step (because the observations at time step T are not yet known).

[0219] During the runtime period, the node uses the weight values of initial Bo submatrix 1702 to perform active inference, in which the initial Bo submatrix 1702 predicts the state of the observed system, conditioned on the previous observed state of the system and conditioned on the node's own previous output. To the extent that observations diverge from the predicted observations of the second time step inputs 1704, the node may adjust the weights of the B submatrices in an attempt to minimize future VFE resulting from the uncertainty of the predictions. In this way, the initial Bo submatrix 1702 may have its weights adjusted over time to align with the observed system, and thereby differentiate itself from its initial neutral or naive state.

[0220] FIG. 12 shows the initial Bo submatrix 1702 after having undergone differentiation to align itself with an observed system - in this example, another node - that is configured to employ a “tit for tat” strategy in an iterated prisoner's dilemma task. The tit for tat strategy is one in which an agent will defect (in this example, output a “1”) immediately after an opponent defects, and will cooperate (in this example, output a “0”) immediately after an opponent cooperates. Thus, the output of theobserved node is a deterministic function of this node's own previous action: in this example, if the node output a “1” at time step T-1, then the observed node will output a “1” at time step T, and if the node output a “0” at time step T-1, then the observed node will output a “0” at time step T.

[0221] Thus, after the node has undergone differentiation to align with the observed node employing the tit for tat strategy, the node will adjust the weights of its initial Bo submatrix 1702 to the values shown in the differentiated Bo submatrix 1202: the weights for 0 input at second time step 1712 are all 1, indicating a 100% probability that a previous output of “0” will result in a current observation of a “0”, and the weights for 1 input at second time step 1714 are all 0, indicating a 0% probability that a previous output of “0” will result in a current observation of a “1”. These weight values are set across both columns, indicating that they apply regardless of the previous observed state of the system.

[0222] By differentiating nodes to align them with their observed systems, some examples described herein may train the nodes of the network to generate inferences about the behavior of the rest of the system including (for environment-facing nodes) the environment outside of the machine learning model.

[0223] FIG. 13 and FIG. 14 show the same process of differentiation to align with a “tit for tat” observed node as the differentiation adjusts the weight values of the Bi submatrix 1006. Initial Bi submatrix 1802 has the same values as initial Bo submatrix 1702. The first time step inputs 1806 are mapped to the second time step inputs 1804 using weights split into two columns (weights for 0 input at first time step 1808 and weights for 1 input at first time step 1810) and two rows (weights for 0 input at second time step 1812 and weights for 1 input at second time step 1814). The mapping of initial Bi submatrix 1802 is conditioned on the output of the node at time step T-1 being “1”.

[0224] As the node differentiates to align with the observed tit for tat strategy of its neighboring node, the initial Bi submatrix 1802 adjusts its weight values to those shown in the differentiated Bi submatrix 1402: theweights for 0 input at second time step 1812 are all 0, indicating a 0% probability that a previous output of “1” will result in a current observation of a “0”, and the weights for 1 input at second time step 1814 are all 1, indicating a 100% probability that a previous output of “1” will result in a current observation of a “1”. These weight values are set across both columns, indicating that they apply regardless of the previous observed state of the system.

[0225] FIG. 15 shows an initial B matrix 1502 (equivalent to B matrix 1012 shown in FIG. 10), and its potential to differentiate into multiple possible differentiated values depending on the behavior of the observed system. In this example, the observed system is a single node playing an iterated prisoner's dilemma task, as in the examples of FIG. 11 through FIG. 14.

[0226] If the observed node employs a tit for tat strategy, the initial B matrix 1502 will differentiate over time into the tit-for-tat differentiated B matrix 1504, whose Bo and Bi submatrices are equivalent to differentiated Bo submatrix 1202 and differentiated Bi submatrix 1402 shown in FIG. 12 and FIG. 14. The tit-for-tat differentiated B matrix 1504 exhibits absolute certainty in its predictions: the previous action of the node is determinative of the next observed state of the system, due to the nature of the tit for tat strategy.

[0227] If the observed node employs an “always defect” strategy, the initial B matrix 1502 will differentiate over time into the defector differentiated B matrix 1506. In an always defect strategy, the observed node always outputs “1”, irrespective of previous outputs and irrespective of inputs. As a result, the node observing the defector node will have complete certainty (weights 0 and 1) about the next observed state: it can predict with 100% confidence that the next observed state will always be “1”. Notably, this prediction is premised on the previous observed state being “1” as well: the 1 and 0 weight values are only in the right column of the Bo submatrix 1004 and Bi submatrix 1006. Because the node has never observed a system state of “0”, the weights in the left columns are completely undifferentiated from their initial values of 0.5.

[0228] In the final illustrated example, if the observed node employs a “random” strategy, the initial B matrix 1502 will differentiate over time into a form resembling the random differentiated B matrix 1508. In a random strategy, the observed node outputs “0” or “1” randomly, irrespective of previous outputs and irrespective of inputs. As a result, the node observing the random node will remain largely undifferentiated (weights all at approximately 0.5) about the next observed state: it cannot predict the next observed state with any confidence.

[0229] Each of these differentiated states in the matrices 1504, 1506, or 1508 of the B matrix 1012 of a node presents an example of a different degree of two capabilities of the node: predictive certainty and self- efficacy. Predictive certainty refers to the degree of certainty in the node's predictions: the tit-for-tat differentiated B matrix 1504 exhibits perfect predictive certainty, the defector differentiated B matrix 1506 exhibits perfect predictive certainty only under some conditions (it is certain as long as the observed state is “1”, but would be completely uncertain at the next time step if it ever observed a “0”), and the random differentiated B matrix 1508 has no predictive certainty.

[0230] The second capability of the node, self-efficacy, refers to a measure of the ability of the output of the node at the previous time step T-1 to affect the observations of the node at the current time step T. The self- efficacy of a node is high if the state of its previous outputs result in highly certain current observations. Thus, the tit-for-tat differentiated B matrix 1504 has very high self-efficacy, because its own action is completely determinative of the next observation, which will always be exactly equal to the node's own previous output. The self-efficacy of the defector differentiated B matrix 1506, by contrast, is very low, even though its predictive certainty is perfect for half of the possible observed previous states; the previous output of the node has no effect on its next observation. Finally, the self-efficacy of the random differentiated B matrix 1508 is also very low, because its outputs also have no effect on later observations.

[0231] Thus, predictive certainty may be regarded as a precondition for self-efficacy, but insufficient in itself to secure high self-efficacy.

[0232] In nodes having no preferences, such as the initial POMDP tensors described with reference to FIG. 10 above having zero values for the C vector 1008, high self-efficacy maps directly to low VFE. However, in examples having preferences, minimizing VFE may require preferences to be satisfied, which requires not only self-efficacy but specifically self- efficacy with respect to soliciting preferred observations. For example, a node with preference (e.g., with non-zero values for the weights of the C vector 1008) may learn how to reliably solicit a current “1” observation under certain previous output and observation states; however, if the node prefers to observe “0” states of the observed system, and has not learned a way to reliably solicit “0” observations, the self-efficacy of the node will be very low.

[0233] In some examples, predictive certainty or self-efficacy may be measured with respect to individual connections of a node. The certainty with which a node can predict inputs received via a given connection may be regarded as the node's predictive certainty with respect to that connection. Similarly, the extent to which a node's outputs via a given connection affect the state of one or more inputs subsequently observed may be regarded as the self-efficacy of that connection. In some examples, self-efficacy is computed for pairs of connections, such that the self-efficacy of a bidirectional pair of connections between a first node and a second node measures the degree to which the first node's output(s) to the second node affect the first node's subsequent observation of the second node's output(s). In some examples, the self- efficacy of a connection from the first node to the second node may instead be a measure of the degree to which the first node's output(s) to the second node affect all observations of the first node with respect to all of its connected nodes.

[0234] In some examples, the self-efficacy of each of a node's connections can be combined to generate a nodal self-efficacy measure. In some examples, the nodal self-efficacy of a node is computed as the sum of theself-efficacy of each of its outbound connections. In other examples, the nodal self-efficacy of a node is computed as an average (such as an arithmetic or geometric mean, a median, or another averaging function), or as some other combination of the self-efficacy measures of each of its outbound connections.

[0235] In some examples, the self-efficacy of a connection can be computed as the mean of the absolute difference between the submatrices conditioned on each action, e.g., Bo submatrix 1004 and Bi submatrix 1006. (For nodes having multiple connections, self-efficacy for a given connection may be computed by isolating the observations and predictions of the B matrix 1012 for the connection being measured.) Thus, the self-efficacy for tit-for-tat differentiated B matrix 1504 is the maximum value of 1 :Self-efficacy (S) for tit-for-tat differentiated B matrix 1504

[0236] In contrast, the self-efficacy for defector differentiated B matrix 1506 is the minimum value of 0:Self-efficacy (S) for defector differentiated B matrix 1506

[0237] As described above, a node receiving binary inputs and generating binary outputs may in some cases operate according to the behavior of a Boolean operator or a logic gate. In some cases, a node may receive multiple binary inputs or outputs and may instead replicate the behavior of multiple Boolean operators or multiple logic gates. However, examples described herein that use a single node to reproduce thebehavior of a logic gate may realize potential benefits, such as the ability to generate mappings from the logic of the network to the machine learning model (and its constituent nodes a connections). For example, these mappings may enable the identification of representative logic gates or higher order logic.

[0238] Example submatrices of a B matrix 1502 of a node configured to act as a logic gate are described with reference to FIG. 16 and FIG. 17 below.

[0239] FIG. 16 and FIG. 17 shows weight values of an example Bo submatrix 1602 and an example Bi submatrix 1702 of a node configured to operate as an AND logic gate. In some examples, the parameter values of the Bo submatrix 1602 and Bi submatrix 1702 may be manually configured to an initial state as shown in FIG. 16 and FIG. 17 in order to intentionally replicate the behavior of an AND gate. In some examples, the parameter values may converge on the illustrated configuration during a training, optimization, or inference period as a result of adjustment (e.g., alignment to an observed system).

[0240] The parameter values of the Bo submatrix 1602 and Bi submatrix 1702 as shown in FIG. 16 and FIG. 17 may cause the node to replicate or simulate the behavior of an AND gate in a system based on active inference and minimization of VFE, because by outputting outputs in response to observed inputs that correspond to the input-output mapping of an AND gate, the node minimizes its VFE. In some examples, VFE is an upper bound on statistical surprise - thus, the parameter values of the Bo submatrix 1602 and Bi submatrix 1702 may be regarded as a set of parameter values that minimize surprise of the node, or maximize the certainty of the node, when the node generates outputs corresponding to outputs of an AND gate.

[0241] The B matrix 1502 for a node simulating an AND gate cam have rows and columns corresponding to each possible transition between hidden states, conditioned on the output of the node. This example assumes a perfect correspondence between the node's observations and any hidden states (represented by making the A tensor an identity matrix,as described above). This means that each parameter value in the B matrix 1502 can be equivalent to both the node's prediction about transitions between hidden states and transitions between observations.

[0242] The inputs from the previous time step T-1 (first time step inputs) fall into four possible input states corresponding to the four columns of Bo submatrix 1602 or Bi submatrix 1702: the weights for 00 input at first time step 1612 correspond to an input state of 00 (e.g., False and False), the weights for 01 input at first time step 1614 correspond to an input state of 01 (e.g., False and True), the weights for 10 input at first time step 1616 correspond to an input state of 10 (e.g., True and False), and weights for 11 input at first time step 1618 correspond to an input state of 11 (e.g., True and True).

[0243] The expected inputs from the current time step T (second time step inputs) also fall into the same four input states as the first time step inputs, and correspond to four rows: the weights for 00 input at second time step 1604 correspond to an expected next input state of 00 (e.g., False and False), the weights for 01 input at second time step 1606 correspond to an expected next input state of 01 (e.g., False and True), the weights for 10 input at second time step 1608 correspond to an expected next input state of 10 (e.g., True and False), and weights for 11 input at second time step 1610 correspond to an expected next input state of 11 (e.g., True and True).

[0244] The B matrix has a number of submatrices equal to the number of possible output states of the node. In this example, the node has a single one-bit binary output; thus, there are only two submatrices conditioned on the different output states, namely Bo submatrix 1602 and Bi submatrix 1702. If the node had two binary outputs, there would be four different submatrices corresponding to the (2 x 2) possible output states, and so on.

[0245] Thus, Bo submatrix 1602 represents the node's predictions about observed state transitions conditioned on the node outputting 0, whereas Bi submatrix 1702 represents the node's predictions about observed state transitions conditioned on the node outputting 1. It will be appreciatedthat the submatrices of the B matrix may be regarded as slices through a larger B matrix in some examples.

[0246] As described above, in some cases VFE may be decomposed into a pragmatic term and an epistemic term. In the example Bo submatrix 1602 and Bi submatrix 1702 shown in FIG. 16 and FIG. 17, the pragmatic term is minimized (e.g., by setting the entire C vector to 0), so that the node's behavior is dictated by a goal of maximizing epistemic gain. In this example, a node that deterministically acts to pursue maximum information gain will reproduce the behavior of an AND gate if the B matrix exhibits the following characteristics:• In response to observing an input state of 11 (True, True), then outputting 0 should lead to much greater uncertainty about the next timestep than outputting 1 (because True AND True = True, so the node should be biased toward outputting a 1 in this case).• In response to observing any other input state (e.g., 00, 01, or 10), then outputting 1 should lead to much greater uncertainty about the next timestep than outputting 0 (because an AND operation applied to any other two inputs = False, so the node should be biased toward outputting a 0 in this case).

[0247] In order to achieve these characteristics, the B matrix should:• Maximize uncertainty (and, from the node's perspective, future learning) by presenting a uniform probability distribution (e.g., parameter values of 0.25 across all predicted next input states).• Minimize uncertainty by presenting a one-hot probability distribution. (A one-hot is a group of bits among which the legal combinations of values are only those with a single high bit (e.g., 1) and all the other bits low (e.g., 0)).

[0248] The Bo submatrix 1602 shown in FIG. 16 therefore maximizes uncertainty for an output of 0 if the input state is 11, because the weights for 11 input at first time step 1618 are a uniform set of parameter weights {0.25, 0.25, 0.25, 0.25}. Similarly, the Bi submatrix 1702 shown in FIG.17 maximizes uncertainty for an output of 1 if the input state is 00, 01, or 10, because the weights for weights for 00 input at first time step 1612, weights for 01 input at first time step 1614, and weights for 10 input at first time step 1616 are a uniform set of parameter weights {0.25, 0.25, 0.25, 0.25}. All other columns of the Bo submatrix 1602 and Bi submatrix 1702 are one-hot sets of parameter values {0, 0, 0, 1 }, thereby minimizing uncertainty for an output of 0 if the input state is 00, 01, or 10 and minimizing uncertainty for an output of 1 if the input state is 11.

[0249] When processing the input state according to an active inference framework using the POMDP equation set out above, these parameter values for the B matrix result in behavior for the node that replicates the behavior of an AND gate. Similar approaches are described below for replicating the behavior of other digital logic gates. Thus, in some examples of a network of a machine learning model operating to minimize the VFE of each node, the nodes can be configured to replicate the behavior of digital logic gates through the minimization of VFE.

[0250] One further potential benefit of this capacity of the network and its nodes, when operating according to an active inference framework to minimize the VFE of each node, is that a node may be examined at a point in time to compare the current value of its parameters to those of a digital logic gate, in order to understand the logical operation of the node and the extent to which the node is simulating or approximating the behavior of a given type of logic gate. This may assist in interpreting the state of the machine learning model at a given point in time and characterizing or approximating the behavior of the machine learning model using digital logic gates. For example, if a set of nodes are observed at time t to have parameters that are close to the values shown in FIG. 16 and FIG. 17, then those nodes may be considered to approximate the logical or functional behavior of AND gates, and a digital circuit may be designed that approximates the function or behavior of these nodes using a corresponding set of AND gates. Furthermore, even if the logic of the nodes is not used to construct a corresponding digital circuit, the function of the machine learning model as a whole may be better understood by a human observer throughgenerating and presenting to the human observer a digital logic equivalent (or approximation) of the network of the machine learning model.

[0251] FIG. 18 illustrates parameter values of example B matrices of nodes configured to operate as OR, XOR, and NOT logic gates. The node simulating an OR gate has an OR gate Bo submatrix 1802 and an OR gate Bi submatrix 1804 as depicted. The node simulating an XOR gate has an XOR gate Bo submatrix 1806 and an XOR gate Bi submatrix 1808 as depicted. The node simulating a NOT gate has a NOT gate Bo submatrix 1810 and a NOT gate Bi submatrix 1812 as depicted, and receives only a single input, unlike the two-bit inputs of the other logic gates depicted.

[0252] FIG. 19 illustrates parameter values of further example B matrices of nodes configured to operate as NAND, NOR, and XNOR logic gates. The node simulating a NAND gate has a NAND gate Bo submatrix 1902 and a NAND gate Bi submatrix 1904 as depicted. The node simulating a NOR gate has a NOR gate Bo submatrix 1906 and 1 NOR gate Bi submatrix 1908 as depicted. The node simulating an XNOR gate has an XNOR gate Bo submatrix 1910 and an XNOR gate Bi submatrix 1912 as depicted.

[0253] The examples of B matrixes shown in FIG. 16 to FIG. 19 demonstrate a potential benefit of machine learning models in which the nodes of the network generate one-bit binary outputs: namely, these nodes can be assessed to identify representative logic gates or higher order logic.MACHINE-LEARNING PIPELINE

[0254] FIG. 20 is a flowchart depicting a machine-learning pipeline 2100, and FIG. 21 is a schematic diagram illustrating the training and use of an example machine-learning program. FIG. 20 and FIG. 21 provide context for examples described herein by describing various techniques and approaches to structuring, training, validating, and or deploying a machine learning model. One or more features of the machine learning models described in FIG. 20 and FIG. 21 are example features can be applied to the examples described herein, where applicable. In somecases, the features described herein can be applied to one or more machine learning models described in FIG. 20 and FIG. 21.

[0255] The machine-learning pipeline 2100 may be used to generate a trained machine learning model, for example the trained machinelearning program 2102 of FIG. 21, to perform operations associated with searches and query responses.Overview

[0256] Broadly, machine learning may involve using computer algorithms to automatically learn patterns and relationships in data, potentially without the need for explicit programming. Machine learning algorithms can be divided into three main categories: supervised learning, unsupervised learning, and reinforcement learning.• Supervised learning involves training a model using labeled data to predict an output for new, unseen inputs. Examples of supervised learning algorithms include linear regression, decision trees, and neural networks.• Unsupervised learning involves training a model on unlabeled data to find hidden patterns and relationships in the data. Examples of unsupervised learning algorithms include clustering, principal component analysis, and generative models like autoencoders.• Reinforcement learning involves training a model to make decisions in a dynamic environment by receiving feedback in the form of rewards or penalties. Examples of reinforcement learning algorithms include Q- learning and policy gradient methods.

[0249] Examples of specific machine learning algorithms that may be deployed, according to some examples, include logistic regression, which is a type of supervised learning algorithm used for binary classification tasks. Logistic regression models the probability of a binary response variable based on one or more predictor variables. Another example type of machine learning algorithm is Naive Bayes, which is another supervised learning algorithm used for classification tasks. Naive Bayes is based on Bayes' theorem and assumes that the predictor variables are independent of each other. Random Forest is another type of supervisedlearning algorithm used for classification, regression, and other tasks. Random Forest builds a collection of decision trees and combines their outputs to make predictions. Further examples include neural networks, which consist of interconnected layers of nodes (or neurons) that process information and make predictions based on the input data. Matrix factorization is another type of machine learning algorithm used for recommender systems and other tasks. Matrix factorization decomposes a matrix into two or more matrices to uncover hidden patterns or relationships in the data. Support Vector Machines (SVM) are a type of supervised learning algorithm used for classification, regression, and other tasks. SVM finds a hyperplane that separates the different classes in the data. Other types of machine learning algorithms include decision trees, k-nearest neighbors, clustering algorithms, and deep learning algorithms such as convolutional neural networks (CNN), recurrent neural networks (RNN), and transformer models. The choice of algorithm depends on the nature of the data, the complexity of the problem, and the performance requirements of the application.

[0250] The performance of machine learning models is typically evaluated on a separate test set of data that was not used during training to ensure that the model can generalize to new, unseen data.

[0251] Although several specific examples of machine learning algorithms are discussed herein, the principles discussed herein can be applied to other machine learning algorithms as well. Deep learning algorithms such as convolutional neural networks, recurrent neural networks, and transformers, as well as more traditional machine learning algorithms like decision trees, random forests, and gradient boosting may be used in various machine learning applications.

[0252] Machine learning models are trained to perform specific types of inference tasks. Two example types of inference tasks in machine learning are classification tasks and regression tasks. Classification tasks, also referred to as categorization tasks, aim at classifying items into one of several category values (for example, is this object an apple or an orange?). Regression algorithms aim at quantifying some items (forexample, by providing a value that is a real number) to perform a regression task.

[0253] Generating a trained machine-learning program 2102 may include multiple phases that form part of the machine-learning pipeline 2100, including for example the following phases illustrated in FIG. 20:• Data collection and preprocessing 2002: This phase may include acquiring and cleaning data to ensure that it is suitable for use in the machine learning model. This phase may also include removing duplicates, handling missing values, and converting data into a suitable format.• Feature engineering 2004: This phase may include selecting and transforming the training data 2106 to create features that are useful for predicting the target variable. Feature engineering may include (1) receiving features 2108 (e.g., as structured or labeled data in supervised learning) or (2) identifying features 2108 (e.g., unstructured or unlabeled data for unsupervised learning) in training data 2106.• Model selection and training 2006: This phase may include selecting an appropriate machine learning algorithm and training it on the preprocessed data. This phase may further involve splitting the data into training and testing sets, using cross-validation to evaluate the model, and tuning hyperparameters to improve performance.• Model evaluation 2008: This phase may include evaluating the performance of a trained model (e.g., the trained machine-learning program 2102) on a separate testing dataset. This phase can help determine if the model is overfitting or underfitting and determine whether the model is suitable for deployment.• Prediction 2010: This phase involves using a trained model (e.g., trained machine-learning program 2102) to generate predictions on new, unseen data.• Validation, refinement or retraining 2012: This phase may include updating a model based on feedback generated from the prediction phase, such as new data or user feedback.• Deployment 2014: This phase may include integrating the trained model (e.g., the trained machine-learning program 2102) into a more extensive system or application, such as a web service, mobile app, or loT device. This phase can involve setting up APIs, building a user interface, and ensuring that the model is scalable and can handle large volumes of data.

[0254] FIG. 21 illustrates further details of two example phases, namely a training phase 2104 (e.g., part of the model selection and trainings model selection and training 2006) and a prediction phase 2110 (part of prediction 2010). Prior to the training phase 2104, feature engineering 2004 is used to identify features 2108. This may include identifying informative, discriminating, and independent features for effectively operating the trained machine-learning program 2102 in pattern recognition, classification, and regression. In some examples, the training data 2106 includes labeled data, known for pre-identified features 2108 and one or more outcomes. Each of the features 2108 may be a variable or attribute, such as an individual measurable property of a process, article, system, or phenomenon represented by a data set (e.g., the training data 2106). Features 2108 may also be of different types, such as numeric features, strings, and graphs, and may include one or more of content 2112, concepts 2114, attributes 2116, historical data 2118 , or user data 2120, merely for example.

[0255] In training phase 2104, also referred to herein as a training period, the machine-learning pipeline 2100 uses the training data 2106 to find correlations among the features 2108 that affect a predicted outcome or prediction / inference data 2122. The training data may also be referred to herein as reference data, because it is used as a reference for setting the trained parameter values of the model.

[0256] With the training data 2106 and the identified features 2108, the trained machine-learning program 2102 is trained during the training phase 2104 during machine-learning program training 2124. The machine-learning program training 2124 appraises values of the features 2108 as they correlate to the training data 2106. The result of the trainingis the trained machine-learning program 2102 (e.g., a trained or learned model).

[0257] Further, the training phase 2104 may involve machine learning, in which the training data 2106 is structured (e.g., labeled during preprocessing operations). The trained machine-learning program 2102 implements a neural network 2126 capable of performing, for example, classification and clustering operations. In other examples, the training phase 2104 may involve deep learning, in which the training data 2106 is unstructured, and the trained machine-learning program 2102 implements a deep neural network 2126 that can perform both feature extraction and classification / clustering operations.

[0258] In some examples, a neural network may be generated during the training phase 2104, and implemented within the trained machinelearning program 2102. The neural network 2126 includes a hierarchical (e.g., layered) organization of neurons, with each layer consisting of multiple neurons or nodes. Neurons in the input layer receive the input data, while neurons in the output layer produce the final output of the network. Between the input and output layers, there may be one or more hidden layers, each consisting of multiple neurons.

[0259] Each neuron in the neural network 2126 operationally computes a function, such as an activation function, which takes as input the weighted sum of the outputs of the neurons in the previous layer, as well as a bias term. The output of this function is then passed as input to the neurons in the next layer. If the output of the activation function exceeds a certain threshold, an output is communicated from that neuron (e.g., transmitting neuron) to a connected neuron (e.g., receiving neuron) in successive layers. The connections between neurons have associated weights, which define the influence of the input from a transmitting neuron to a receiving neuron. During the training phase, these weights are adjusted by the learning algorithm to optimize the performance of the network. Different types of neural networks may use different activation functions and learning algorithms, affecting their performance on different tasks. The layered organization of neurons and the use ofactivation functions and weights enable neural networks to model complex relationships between inputs and outputs, and to generalize to new inputs that were not seen during training.

[0260] In some examples, the neural network 2126 may also be one of several different types of neural networks, such as a single-layer feedforward network, a Multilayer Perceptron (MLP), an Artificial Neural Network (ANN), a Recurrent Neural Network (RNN), a Long Short- Term Memory Network (LSTM), a Bidirectional Neural Network, a symmetrically connected neural network, a Deep Belief Network (DBN), a Convolutional Neural Network (CNN), a Generative Adversarial Network (GAN), an Autoencoder Neural Network (AE), a Restricted Boltzmann Machine (RBM), a Hopfield Network, a Self-Organizing Map (SOM), a Radial Basis Function Network (RBFN), a Spiking Neural Network (SNN), a Liquid State Machine (LSM), an Echo State Network (ESN), a Neural Turing Machine (NTM), or a Transformer Network, merely for example.

[0261] In addition to the training phase 2104, a validation phase may be performed on a separate dataset known as the validation dataset. The validation dataset is used to tune the hyperparameters of a model, such as the learning rate and the regularization parameter. The hyperparameters are adjusted to improve the model's performance on the validation dataset.

[0262] Once a model is fully trained and validated, in a testing phase, the model may be tested on a new dataset. The testing dataset is used to evaluate the model's performance and ensure that the model has not overfitted the training data.

[0263] In prediction phase 2110, also referred to herein as a runtime period, the trained machine-learning program 2102 uses the features 2108 for analyzing query data 2128 to generate inferences, outcomes, or predictions, as examples of a prediction / inference data 2122. For example, during prediction phase 2110, the trained machine-learning program 2102 generates an output. Query data 2128 is provided as an input to the trained machine-learning program 2102, and the trainedmachine-learning program 2102 generates the predict! on / inference data 2122 as output, responsive to receipt of the query data 2128. Query data processed by the model during the runtime phase may also be referred to herein as candidate data, because it is data that is a priori not associated with any particular inference output.

[0264] In some examples, the trained machine-learning program 2102 may be a generative Al model. Generative Al is a term that may refer to any type of artificial intelligence that can create new content from training data 2106. For example, generative Al can produce text, images, video, audio, code, or synthetic data similar to the original data but not identical.

[0265] Some of the techniques that may be used in generative Al are:• Convolutional Neural Networks (CNNs): CNNs may be used for image recognition and computer vision tasks. CNNs may, for example, be designed to extract features from images by using filters or kernels that scan the input image and highlight important patterns.• Recurrent Neural Networks (RNNs): RNNs may be used for processing sequential data, such as speech, text, and time series data, for example. RNNs employ feedback loops that allow them to capture temporal dependencies and remember past inputs. The feedback loops of an RNN can be considered a cycle within its network.• Generative adversarial networks (GANs): GNNs may include two neural networks: a generator and a discriminator. The generator network attempts to create realistic content that can “fool” the discriminator network, while the discriminator network attempts to distinguish between real and fake content. The generator and discriminator networks compete with each other and improve over time.• Variational autoencoders (VAEs): VAEs may encode input data into a latent space (e.g., a compressed representation) and then decode it back into output data. The latent space can be manipulated to generate new variations of the output data. VAEs may use self-attention mechanisms to process input data, allowing them to handle long text sequences and capture complex dependencies.• Transformer models: Transformer models may use attention mechanisms to learn the relationships between different parts of input data (such as words or pixels) and generate output data based on these relationships. Transformer models can handle sequential data, such as text or speech, as well as non-sequential data, such as images or code.

[0266] In generative Al examples, the output prediction / inference data 2122 include predictions, translations, summaries or media content.MACHINE ARCHITECTURE

[0267] FIG. 22 is a diagrammatic representation of the machine 2200 within which instructions 2202 (e.g., software, a program, an application, an applet, an app, or other executable code) for causing the machine 2200 to perform any one or more of the methodologies discussed herein may be executed. For example, the instructions 2202 may cause the machine 2200 to execute any one or more of the methods described herein. The instructions 2202 transform the general, nonprogrammed machine 2200 into a particular machine 2200 programmed to carry out the described and illustrated functions in the manner described. The machine 2200 may operate as a standalone device or may be coupled (e.g., networked) to other machines. In a networked deployment, the machine 2200 may operate in the capacity of a server machine or a client machine in a server-client network environment, or as a peer machine in a peer-to-peer (or distributed) network environment. The machine 2200 may comprise, but not be limited to, a server computer, a client computer, a personal computer (PC), a tablet computer, a laptop computer, a netbook, a set-top box (STB), a personal digital assistant (PDA), an entertainment media system, a cellular telephone, a smartphone, a mobile device, a wearable device (e.g., a smartwatch), a smart home device (e.g., a smart appliance), other smart devices, a web appliance, a network router, a network switch, a network bridge, or any machine capable of executing the instructions 2202, sequentially or otherwise, that specify actions to be taken by the machine 2200. Further, while a single machine 2200 is illustrated, the term “machine" shall also be taken to include a collection of machines thatindividually or jointly execute the instructions 2202 to perform any one or more of the methodologies discussed herein. In some examples, the machine 2200 may comprise both client and server systems, with certain operations of a particular method or algorithm being performed on the server-side and with certain operations of the particular method or algorithm being performed on the client-side.

[0268] The machine 2200 may include processors 2204, memory 2206, and input / output I / O components 2208, which may be configured to communicate with each other via a bus 2210. In an example, the processors 2204 (e.g., a Central Processing Unit (CPU), a Reduced Instruction Set Computing (RISC) Processor, a Complex Instruction Set Computing (CISC) Processor, a Graphics Processing Unit (GPU), a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Radio-Frequency Integrated Circuit (RFIC), another processor, or any suitable combination thereof) may include, for example, a processor 2212 and a processor 2214 that execute the instructions 2202. The term "processor" is intended to include multi-core processors that may comprise two or more independent processors (sometimes referred to as “cores”) that may execute instructions contemporaneously. Although FIG. 22 shows multiple processors 2204, the machine 2200 may include a single processor with a single-core, a single processor with multiple cores (e.g., a multi-core processor), multiple processors with a single core, multiple processors with multiples cores, or any combination thereof.

[0269] The memory 2206 includes a main memory 2216, a static memory 2218, and a storage unit 2220, both accessible to the processors 2204 via the bus 2210. The main memory 2206, the static memory 2218, and storage unit 2220 store the instructions 2202 embodying any one or more of the methodologies or functions described herein. The instructions 2202 may also reside, completely or partially, within the main memory 2216, within the static memory 2218, within machine-readable medium 2222 within the storage unit 2220, within at least one of the processors 2204 (e.g., within the processor’s cache memory), or any suitable combination thereof, during execution thereof by the machine 2200.

[0270] The I / O components 2208 may include a wide variety of components to receive input, provide output, produce output, transmit information, exchange information, capture measurements, and so on. The specific I / O components 2208 that are included in a particular machine will depend on the type of machine. For example, portable machines such as mobile phones may include a touch input device or other such input mechanisms, while a headless server machine will likely not include such a touch input device. It will be appreciated that the I / O components 2208 may include many other components that are not shown in FIG. 22. In various examples, the VO components 2208 may include user output components 2224 and user input components 2226. The user output components 2224 may include visual components (e.g., a display such as a plasma display panel (PDP), a light-emitting diode (LED) display, a liquid crystal display (LCD), a projector, or a cathode ray tube (CRT)), acoustic components (e.g., speakers), haptic components (e.g., a vibratory motor, resistance mechanisms), other signal generators, and so forth. The user input components 2226 may include alphanumeric input components (e.g., a keyboard, a touch screen configured to receive alphanumeric input, a photo-optical keyboard, or other alphanumeric input components), point-based input components (e.g., a mouse, a touchpad, a trackball, a joystick, a motion sensor, or another pointing instrument), tactile input components (e.g., a physical button, a touch screen that provides location and force of touches or touch gestures, or other tactile input components), audio input components (e.g., a microphone), and the like.

[0271] Communication may be implemented using a wide variety of technologies. The I / O components 2208 further include communication components 2228 operable to couple the machine 2200 to a network 2230 or devices 2232 via respective coupling or connections. For example, the communication components 2228 may include a network interface component or another suitable device to interface with the network 2230. In further examples, the communication components 2228 may include wired communication components, wireless communication components, cellular communication components, NearField Communication (NFC) components, Bluetooth® components (e.g., Bluetooth® Low Energy), Wi-Fi® components, and other communication components to provide communication via other modalities. The devices 2232 may be another machine or any of a wide variety of peripheral devices (e.g., a peripheral device coupled via a USB).

[0272] Moreover, the communication components 2228 may detect identifiers or include components operable to detect identifiers. For example, the communication components 2228 may include Radio Frequency Identification (RFID) tag reader components, NFC smart tag detection components, optical reader components (e.g., an optical sensor to detect one-dimensional bar codes such as Universal Product Code (UPC) bar code, multi-dimensional bar codes such as Quick Response (QR) code, Aztec code, Data Matrix, Dataglyph™, MaxiCode, PDF417, Ultra Code, UCC RSS-2D bar code, and other optical codes), or acoustic detection components (e.g., microphones to identify tagged audio signals). In addition, a variety of information may be derived via the communication components 2228, such as location via Internet Protocol (IP) geolocation, location via Wi-Fi® signal triangulation, location via detecting an NFC beacon signal that may indicate a particular location, and so forth.

[0273] The various memories (e.g., main memory 2216, static memory 2218, and memory of the processors 2204) and storage unit 2220 may store one or more sets of instructions and data structures (e.g., software) embodying or used by any one or more of the methodologies or functions described herein. These instructions (e.g., the instructions 2202), when executed by processors 2204, cause various operations to implement the disclosed examples.

[0274] The instructions 2202 may be transmitted or received over the network 2230, using a transmission medium, via a network interface device (e.g., a network interface component included in the communication components 2228) and using any one of several well- known transfer protocols (e.g., hypertext transfer protocol (HTTP)). Similarly, the instructions 2202 may be transmitted or received using atransmission medium via a coupling (e.g., a peer-to-peer coupling) to the devices 2232.TRANSLATING NODE TOPOLOGY TO PSEUDOCODE OR CODE

[0275] FIG. 23 illustrates translation among node topology, pseudocode, and software code, according to some examples. In some cases, the Al system can convert a node (such as node 504), a group of nodes (such as nodes 504, 506, 508), a truth table 448 for a node or group of nodes, a logic gate 446, a group of logic gates 2306 (such as logic gates 554, 556, 558), higher order logic, a combination of any of the above (collectively referred to herein as machine learning model representation), or the like to software code 620 or pseudocode 2304.

[0276] For example, the Al system converts from higher order logic to software code or pseudocode. For example, the higher order logic includes an adder. The Al system converts the adder logic to Python code such as “# Function implemented by this network: \n f(a, b) = a + b \n # Run this function on the given input values: \n return f(a = True, b = True).” In some cases, the Al system converts higher order logic to pseudocode such as “Add input a to input b ”

[0277] The Al system initially begins by understanding the logical behavior of the machine learning model representation. The Al system begins by collecting information on inputs, outputs, and the relationships between them. The Al system determines what each element in the machine learning model representation represents and how they interact.

[0278] The Al system determines what the inputs and outputs of the machine learning model representation are. Inputs include values or conditions that affect the behavior of the machine learning model representation, and outputs include the results from processing the inputs via the machine learning model representation.

[0279] Once the Al system identifies the logic flow from the machine learning model representation, the Al system generates pseudocode by outlining the logical behavior. The Al system describes the logic, such as by using conditional statements (if-else), loops (while, for), or other programming constructs to capture the behavior of the machine learning modelrepresentation. The Al system applies variable names to represent inputs, intermediate values, and outputs.

[0280] In some cases, the Al system break downs complex logic behaviors into smaller steps. For example, if the machine learning model representation has a complex group of nodes, the Al system describes each sub-component's behavior in detail. In some cases, the Al system uses indentation to show nested structures and maintain readability.

[0281] To explain in an example, the machine learning model representation includes the logic of an AND gate using pseudocode. An AND gate takes two inputs and outputs true only if both inputs are true. The Al system identifies such behavior between the inputs and outputs and generates pseudocode 2304 that recites “Input A; Input B; If A is true and B is true: Set Output to true ; Else: Set Output to false.”

[0282] In some cases, the Al system can convert the pseudocode to actual programming code using the appropriate programming language. The Al system uses the syntax of the chosen programming language and convert the pseudocode constructs into the equivalent programming constructs (if-else statements, loops, etc.). The Al system declares variables and assign values according to the pseudocode, and generates code based on data types, function calls, and other language-specific requirements. In some cases, the Al system converts a node topology to logic gates, then from logic gates to software code. In some cases, the Al system converts node topology to logic gates, then to pseudocode.

[0283] In some cases, the Al system identifies a machine learning model with many nodes, such as in the hundreds of millions. The Al system converts the node topology into a complex web of logic gates (such as based on the truth tables as further described herein). In some cases, the Al system is able to identify higher order logic from at least some of the logic gates. The Al system converts the logic network of representative logic gates (and / or higher order logic) and converts the logic network into software code or pseudocode.

[0284] Continuing with the AND gate example, the Al system translates the pseudocode of the AND gate into Python code that recites “# Input values A= True B = True # Logic implementation if A and B: Output = True else: Output = False.”

[0285] In some cases, the Al system converts between software languages by deriving the underlying logic and converting to the appropriate syntax of the desired programming code. In some cases, the Al system converts from software code to pseudocode or to any of the machine learning model representations, and vice versa. In some cases, the Al system converts from pseudocode to software code or any of the machine learning model representations, and vice versa.

[0286] In some cases, the Al system, after generating the software code, tests the code with various inputs, such as using the inputs of the truth table 448, to ensure that the logical behavior is accurately implemented. If the Al system encounter any issues, the Al system can debug and refine code in subsections, such as by debugging a group of nodes, a logic gate, a group of logic gates, or the like.

[0287] In some cases, the Al system breaks down complex logic derived from pseudocode, software code, or machine learning model representations into smaller components. The Al system can create modular pieces of software code, pseudocode, or machine learning representations that can be reused in different contexts.

[0288] By translating logic into code, the Al system can abstract away the intricate details of the underlying logic. This allows developers to interact with and use complex behaviors without needing to understand every detail. Developers can modify pseudocode, logic gates, or higher order logic, and the Al system can generate software code in any language, modify node topology of a machine learning model, or the like.

[0289] In some cases, the Al system displays one or more of a machine learning model representation, pseudocode, or software. For example, the Al system can display a split screen of a logic gate representation and code where a developer can swap logic gates and see how the code changes. In some cases, the Al system displays a node topology with an option to switch back and forth with software code. A developer can split nodes, delete nodes, copy groups of nodes, or perform some other restructuring of the node topology and generate software code in one programming language, changethe node topology again, and generate code in another programming language.EXAMPLES

[0290] In view of the above-described implementations of subject matter this application discloses the following list of examples, wherein one feature of an example in isolation or more than one feature of an example, taken in combination and, optionally, in combination with one or more features of one or more further examples are further examples also falling within the disclosure of this application.

[0291] Example 1 is a system comprising: at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the at least one processor to perform operations comprising: accessing a machine learning model with an internal architecture that includes: a first group of nodes configured to perform a corresponding first function of the machine learning model; and a second group of nodes configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting one or more binary signals; generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model; accessing a database that includes representations of logic gates, each of the representations defining a corresponding logic gate along with inputs and outputs of that corresponding logic gate; based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network that includes one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the database; and generating a graphical user interface that depicts a portion of the machine learning model with the generated logic network in place of the subset of the first group of nodes in the machine learning model.

[0292] In Example 2, the subject matter of Example 1 includes, wherein the generating of the table comprises accessing historical binary inputsignals and historical binary output signals of the subset of the first group of nodes and storing the historical input and output signals in the table.

[0293] In Example 3, the subject matter of Examples 1-2 includes, wherein the generating of the table comprises inputting all permutations of the input signals, once or more each, to the subset of the first group of nodes and storing the corresponding output signals in the table.

[0294] In Example 4, the subject matter of Examples 1-3 includes, wherein the subset of the first group of nodes is a single node in the first group of nodes.

[0295] In Example 5, the subject matter of Example 4 includes, wherein the logic network includes a single logic gate.

[0296] In Example 6, the subject matter of Examples 1-5 includes, wherein the subset of the first group of nodes comprises at least two nodes in the first group of nodes.

[0297] In Example 7, the subject matter of Example 6 includes, wherein the logic network includes representations of a plurality of representations of logic gates, wherein each logic gate is connected to another logic gate or to a node within the first group of nodes.

[0298] In Example 8, the subject matter of Examples 1-7 includes, wherein the operations further comprise: identifying a higher-order logic element configured to generate the binary output signals from the mapped binary input signals of the logic network based on the one or more representations of logic gates.

[0299] In Example 9, the subject matter of Examples 1-8 includes, wherein the machine learning model includes unidirectional connections, each unidirectional connection connecting at least two nodes within the machine learning model, each unidirectional connection being configured to transmit binary signals from a transmitting node to a receiving node, wherein the table maps the binary input signals to the binary output signals in a single direction.

[0300] In Example 10, the subject matter of Examples 1-9 includes, wherein the machine learning model includes bidirectional connections, each bidirectional connection connecting at least two nodes within themachine learning model, each bidirectional connection being configured to transmit signals from a first node to a second node and from the second node to the first node, wherein the table maps the binary input signals to the binary output signals in one direction and maps the binary input signals to the binary output signals in another direction.

[0301] In Example 11, the subject matter of Examples 1-10 includes, wherein the generation of the graphical user interface is performed during run-time while the machine learning model is performing inferences with input data, wherein the machine learning model is trained to dynamically change the internal architecture of the machine learning model and perform the operations during run-time, and in response to the internal architecture being changed by the machine learning model during run-time, the operations further comprise generating an updated table that maps updated binary input signals to updated binary output signals based on the changed internal architecture and identifying an updated logic network based on the updated table.

[0302] In Example 12, the subject matter of Examples 1-11 includes, wherein the accessing of the machine learning model comprises generating a representation of the internal architecture of the machine learning model at a particular time step, wherein the generating of the table comprises generating the table using the representation of the internal architecture of the machine learning model.

[0303] In Example 13, the subject matter of Examples 1-12 includes, wherein the operations further comprise presenting the subset of the first group of nodes adjacent to the graphical representation of the logic network.

[0304] In Example 14, the subject matter of Examples 1-13 includes, wherein the operations further comprise: presenting a control; in response to a user selection of the control, modifying the logic network; and in response to the modifying of the logic network, identifying modified inputs and modified outputs of the modified logic network and updating the internal architecture of nodes in the machine learning modelto correspond to the modified inputs and modified outputs of the modified logic network.

[0305] In Example 15, the subject matter of Examples 1-14 includes, wherein the operations further comprise generating non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to generate the binary output signals from the mapped binary input signals of the logic network.

[0306] In Example 16, the subject matter of Examples 1-15 includes, wherein the operations further comprise receiving a user selection of the logic network, and in response to the receiving of the user selection, presenting the portion of the machine learning model, the portion replacing the graphical representation of the logic network with the subset of the first group of nodes on the user interface.

[0307] Example 17 is a method comprising: accessing a machine learning model with an internal architecture that includes: a first group of nodes configured to perform a corresponding first function of the machine learning model; and a second group of nodes configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting one or more binary signals; generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model; accessing a database that includes, representations of logic gates, each of the representations defining a corresponding logic gate along with inputs and outputs of that corresponding logic gate; based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network that includes one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the database; and generating a graphical user interface that depicts a portion of the machine learning model with the generated logic network in place of the subset of the first group of nodes in the machine learning model.

[0308] Example 18 is a non-transitory computer-readable storage medium storing instructions that, when executed by at least one processor, cause the at least one processor to perform operations comprising: accessing a machine learning model with an internal architecture that includes: a first group of nodes configured to perform a corresponding first function of the machine learning model; and a second group of nodes configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting one or more binary signals; generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model; accessing a database that includes representations of logic gates, each of the representations defining a corresponding logic gate along with inputs and outputs of that corresponding logic gate; based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network that includes one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the database; and generating a graphical user interface that depicts a portion of the machine learning model with the generated logic network in place of the subset of the first group of nodes in the machine learning model.

[0309] Example 19 is at least one machine-readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations to implement any of Examples 1-18.

[0310] Example 20 is an apparatus comprising means to implement any of Examples 1-18.

[0311] Example 21 is a system to implement any of Examples 1-18.

[0312] Example 22 is a method to implement any of Examples 1-18.CONCLUSION

[0313] Unless the context clearly requires otherwise, throughout the description and the claims, the words “comprise,” “comprising,” and the like are to be construed in an inclusive sense, as opposed to an exclusiveor exhaustive sense, i.e., in the sense of “including, but not limited to.” As used herein, the terms “connected,” “coupled,” or any variant thereof means any connection or coupling, either direct or indirect, between two or more elements; the coupling or connection between the elements can be physical, logical, or a combination thereof. Additionally, the words “herein,” “above,” “below,” and words of similar import, when used in this application, refer to this application as a whole and not to any particular portions of this application. Where the context permits, words using the singular or plural number may also include the plural or singular number respectively. The word “or” in reference to a list of two or more items, covers all of the following interpretations of the word: any one of the items in the list, all of the items in the list, and any combination of the items in the list. Likewise, the term “or” in reference to a list of two or more items, covers all of the following interpretations of the word: any one of the items in the list, all of the items in the list, and any combination of the items in the list.

[0314] Although some examples, e.g., those depicted in the drawings, include a particular sequence of operations, the sequence may be altered without departing from the scope of the present disclosure. For example, some of the operations depicted may be performed in parallel or in a different sequence that does not materially affect the functions as described in the examples. In other examples, different components of an example device or system that implements an example method may perform functions at substantially the same time or in a specific sequence.

[0315] The various features, steps, and processes described herein may be used independently of one another, or may be combined in various ways. All possible combinations and subcombinations are intended to fall within the scope of this disclosure. In addition, certain method or process blocks may be omitted in some implementations.

[0316] A “non-transitory” machine-readable medium, as used herein, specifically excludes propagating signals per se. According to various example embodiments, the instructions for execution by a machine orprocessor can be communicated via a carrier medium (e.g., a machine- readable carrier medium). Examples of such a carrier medium include a non-transient carrier medium (e.g., a non-transitory machine-readable storage medium, such as a solid-state memory that is physically movable from one place to another place) and a transient carrier medium (e.g., a carrier wave or other propagating signal that communicates the instructions to the machine or processor).

Claims

CLAIMSWhat is claimed is:

1. A system comprising: at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the at least one processor to perform operations comprising: accessing a machine learning model with an internal architecture that includes: a first group of nodes configured to perform a corresponding first function of the machine learning model; and a second group of nodes configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting one or more binary signals; generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model; accessing a database that includes representations of logic gates, each of the representations defining a corresponding logic gate along with inputs and outputs of that corresponding logic gate; based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network that includes one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the database; and generating code, pseudocode, or non-transitory computer- readable storage medium storing instructions that, when executed by a processor, cause the processor to generate the binary output signals from the mapped binary input signals of the logic network.

2. The system of claim 1, wherein the generating of the table comprises accessing historical binary input signals and historical binary output signals of the subset of the first group of nodes and storing the historical input and output signals in the table.

3. The system of claim 1, wherein the generating of the table comprises inputting all permutations of the input signals to the subset of the first group of nodes and storing the corresponding output signals in the table.

4. The system of claim 1, wherein the subset of the first group of nodes is a single node in the first group of nodes.

5. The system of claim 4, wherein the logic network includes a single logic gate.

6. The system of claim 1, wherein the subset of the first group of nodes comprises at least two nodes in the first group of nodes.

7. The system of claim 6, wherein the logic network includes representations of a plurality of representations of logic gates, wherein each logic gate is connected to another logic gate or to a node within the first group of nodes.

8. The system of claim 1, wherein the operations further comprise: identifying a higher-order logic element configured to generate the binary output signals from the mapped binary input signals of the logic network based on the one or more representations of logic gates.

9. The system of claim 1, wherein the machine learning model includes unidirectional connections, each unidirectional connection connecting at least two nodes within the machine learning model, each unidirectional connection being configured to transmit binary signals from a transmitting node to a receiving node, wherein the table maps the binary input signals to the binary output signals in a single direction.

10. The system of claim 1, wherein the machine learning model includes bidirectional connections, each bidirectional connection connecting at least two nodes within the machine learning model, each bidirectional connectionbeing configured to transmit signals from a first node to a second node and from the second node to the first node, wherein the table maps the binary input signals to the binary output signals in one direction and maps the binary input signals to the binary output signals in another direction.

11. The system of claim 1, wherein the generation of the graphical user interface is performed during run-time while the machine learning model is performing inferences with input data, wherein the machine learning model is trained to dynamically change the internal architecture of the machine learning model and perform the operations during run-time, and in response to the internal architecture being changed by the machine learning model during run-time, the operations further comprise generating an updated table that maps updated binary input signals to updated binary output signals based on the changed internal architecture and identifying an updated logic network based on the updated table.

12. The system of claim 1, wherein the accessing of the machine learning model comprises generating a representation of the internal architecture of the machine learning model at a particular time step, wherein the generating of the table comprises generating the table using the representation of the internal architecture of the machine learning model.

13. The system of claim 1, wherein the operations further comprise presenting the subset of the first group of nodes adjacent to the graphical representation of the logic network.

14. The system of claim 1, wherein the operations further comprise: presenting a control; in response to a user selection of the control, modifying the logic network; and in response to the modifying of the logic network, identifying modified inputs and modified outputs of the modified logic network and updating the internal architecture of nodes in the machine learning model to correspond to the modified inputs and modified outputs of the modified logic network.

15. The system of claim 1, wherein the operations further comprise generating a graphical user interface that depicts a portion of the machine learning model with the generated logic network in place of the subset of the first group of nodes in the machine learning model.

16. The system of claim 1, wherein the operations further comprise receiving a user selection of the logic network, and in response to the receiving of the user selection, presenting the portion of the machine learning model, the portion replacing the graphical representation of the logic network with the subset of the first group of nodes on the user interface.

17. A method comprising: accessing a machine learning model with an internal architecture that includes: a first group of nodes configured to perform a corresponding first function of the machine learning model; and a second group of nodes configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting one or more binary signals; generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model; accessing a database that includes representations of logic gates, each of the representations defining a corresponding logic gate along with inputs and outputs of that corresponding logic gate; based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network that includes one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the database; and generating code, pseudocode, or non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to generate the binary output signals from the mapped binary input signals of the logic network.

18. A non-transitory computer-readable storage medium storing instructions that, when executed by at least one processor, cause the at least one processor to perform operations comprising: accessing a machine learning model with an internal architecture that includes: a first group of nodes configured to perform a corresponding first function of the machine learning model; and a second group of nodes configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting one or more binary signals; generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model; accessing a database that includes representations of logic gates, each of the representations defining a corresponding logic gate along with inputs and outputs of that corresponding logic gate; based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network that includes one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the database; and generating code, pseudocode, or non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to generate the binary output signals from the mapped binary input signals of the logic network.

19. A system comprising: at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the at least one processor to perform operations comprising: accessing a machine learning model with an internal architecture that includes:a first group of nodes configured to perform a corresponding first function of the machine learning model; and a second group of nodes configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting one or more binary signals; generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model; accessing a database that includes representations of logic gates, each of the representations defining a corresponding logic gate along with inputs and outputs of that corresponding logic gate; based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network that includes one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the database; and generating a graphical user interface that depicts a portion of the machine learning model with the generated logic network in place of the subset of the first group of nodes in the machine learning model.

20. A method comprising: accessing a machine learning model with an internal architecture that includes: a first group of nodes configured to perform a corresponding first function of the machine learning model; and a second group of nodes configured to perform a corresponding second function of the machine learning model, each node of the machine learning model outputting one or more binary signals;generating a table that maps binary input signals to binary output signals of a subset of the first group of nodes in the machine learning model; accessing a database that includes representations of logic gates, each of the representations defining a corresponding logic gate along with inputs and outputs of that corresponding logic gate; based on the table that maps the binary input signals to the binary output signals of the subset of the first group of nodes in the machine learning model, generating a logic network that includes one or more representations of logic gates configured to generate the binary output signals from the mapped binary input signals based on the database; and generating a graphical user interface that depicts a portion of the machine learning model with the generated logic network in place of the subset of the first group of nodes in the machine learning model.

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