Pixel driving circuit, display panel and display device

By introducing a compensation module into the pixel driving circuit, adjusting the driving voltage, so that the driving current of each pixel driving circuit is equal to the preset target value, the problem of uneven brightness in the OLED display panel is solved, and a more uniform display effect is achieved.

WO2025051064A1PCT designated stage expired Publication Date: 2025-03-13HKC CORP LTD
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Patent Information

Application Number
PCT/CN2024/115908
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-07
Filing Date
2024-08-30
Publication Date
2025-03-13

AI Technical Summary

Technical Problem

In the large-size OLED display panel, due to the different power trace lengths of the pixel driving circuits at different locations, the impedance and attenuation are different, resulting in different actual power supply voltages of each pixel unit, which makes the driving current flowing through each light emitting unit different from the target current, resulting in uneven brightness.

Method used

A pixel driving circuit is provided, including a sub-pixel driving module and a compensation module, and adjusts the driving voltage through a compensation signal so that the driving current is equal to a preset target value. The pixel driving circuit ensures that the driving voltage of each pixel driving circuit is equal to the target driving voltage by connecting the compensation module and the sub-pixel driving module, and processing the compensation signal and the first power supply signal.

Benefits of technology

Through this technical means, the brightness uneven problem caused by the power supply voltage drop is solved, the brightness uniformity of the display panel is ensured, and the display quality is improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

A pixel driving circuit (100), a display panel (1) and a display device. The pixel driving circuit (100) comprises a sub-pixel driving module (10), a compensation signal end (Cm), and a compensation module (20), wherein the compensation module (20) comprises a compensation control end (P2), a compensation signal input end (P1), a first signal input end (P3), and a driving signal output end (P4); the compensation control end (P2) is connected to a scanning line (Sn), the compensation signal input end (P1) is connected to the compensation signal end (Cm), the first signal input end (P3) is connected to a first power supply signal line (41), and the driving signal output end (P4) is connected to a second node (N2) of the sub-pixel driving module (10); the compensation module (20) is used for processing a compensation signal and a first power supply signal and then outputting a driving voltage to the second node (N2), so that a driving current flows through a light-emitting unit (14); and the driving voltage at the second node (N2) is adjusted by adjusting the compensation signal, so that the driving current is equal to a preset target value. The pixel driving circuit (100) can compensate for the driving voltage to avoid the influence of the power supply voltage drop on the display.
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Description

Pixel driving circuit, display panel and display device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority based on Chinese patent application 2023111510651 filed on September 7, 2023, and all of its contents are incorporated herein by reference. Technical Field

[0003] The present application relates to the field of display technology, and in particular to a pixel driving circuit, a display panel, and a display device. Background Art

[0004] With the development and progress of display technology, organic light-emitting diodes (OLEDs) are considered to be the next generation display technology due to their advantages over liquid crystal displays (LCDs). These include not requiring a backlight, high contrast, self-luminescence, fast response, wide viewing angle, high brightness, vivid colors, thinness, compatibility with flexible panels, wide operating temperature range, and simpler structure and manufacturing process.

[0005] Currently, active-matrix organic light-emitting diode (AMOLED) display technology typically uses storage capacitors to maintain the operation of the drive transistor until the next scanning cycle. Because AMOLED uses storage capacitors to store information and light up and extinguish each pixel, each pixel continuously emits light within a frame cycle. Compared to passive-matrix organic light-emitting diode (PMOLED) display technology, AMOLED display technology has lower requirements for the efficiency and stability of the luminescent material, and relatively low power consumption. Therefore, AMOLED is more suitable for large-scale, high-resolution display panels than PMOLED.

[0006] However, in large-size OLED display panels, the same power supply usually provides power voltage to multiple pixel driving circuits. The power supply trace lengths of pixel driving circuits at different locations are different, resulting in different impedances and attenuation, making the actual power supply voltage acting on each pixel unit different. In turn, the driving current flowing through each light-emitting unit is different from the target driving current, causing uneven brightness and affecting the display effect.

[0007] Summary of the Invention

[0008] The present application provides a pixel driving circuit, a display panel and a display device, aiming to solve the problem in the prior art of uneven brightness of the display panel caused by a difference between the driving current flowing through each light-emitting unit and the target current due to a power supply voltage drop.

[0009] In order to solve the above technical problems, the first technical solution provided by this application is to provide a pixel driving circuit. The pixel driving circuit includes:

[0010] The sub-pixel driving module includes a data writing unit, a data storage unit, a sub-pixel driving unit, and a light-emitting unit; in the data writing unit, a control end is connected to a scan line, a first end is connected to a data line, and a second end is connected to a first node; in the sub-pixel driving unit, a control end is connected to the first node, a first end is connected to a second node, and a second end is connected to a first electrode of the light-emitting unit; a first end and a second end of the data storage unit are connected to the first node and the second node, respectively; and a second electrode of the light-emitting unit is connected to a second power signal line.

[0011] The pixel circuit further includes a compensation signal terminal and a compensation module; the compensation module includes a compensation control terminal, a compensation signal input terminal, a first signal input terminal, and a drive signal output terminal; the compensation control terminal is connected to the scan line, the compensation signal input terminal is connected to the compensation signal terminal, the first signal input terminal is connected to the first power signal line, and the drive signal output terminal is connected to the second node;

[0012] The data writing unit and the compensation module are controlled in response to the signal of the scan line, the data writing unit controls the on and off of the control terminal of the sub-pixel driving unit, and writes the data signal of the data line into the data storage unit;

[0013] The compensation signal terminal is used to provide a compensation signal to the compensation module, and the compensation module is used to process the compensation signal and the first power signal provided by the first power signal line and then output a driving voltage;

[0014] After the sub-pixel driving unit is turned on, the compensation module transmits the driving voltage to the second node to make the driving current pass through the light-emitting unit; and adjusts the driving voltage at the second node by adjusting the compensation signal to make the driving current equal to a preset target value.

[0015] The compensation module includes a compensation writing unit, a compensation driving unit, and a compensation storage unit; in the compensation writing unit, a control end is connected to the scan line as the compensation control end, a first end is connected to the compensation signal end as the compensation signal input end, and a second end is connected to a third node; in the compensation driving unit, a control end is connected to the third node, a first end is connected to the first power signal line as the first signal input end, and a second end is connected to the second node as the drive signal output end; a first end and a second end of the compensation storage unit are connected to the third node and the fourth node respectively, and the fourth node is arranged between the first power signal line and the first signal input end;

[0016] The data writing unit and the compensation writing unit are controlled in response to the signal of the scan line, so that the data writing unit and the compensation writing unit are turned on at the same time when the signal of the scan line is at a valid level, and the data signal of the data line is written into the data storage unit, and the compensation signal provided by the compensation signal end is written into the compensation storage unit; the data writing unit controls the sub-pixel driving unit to turn on, and the compensation writing unit controls the compensation driving unit to turn on, so as to output the driving signal of the first power signal line and the compensation signal to the second node.

[0017] The compensation module further includes a voltage dividing unit, a first end of the voltage dividing unit is connected to the fourth node, and a second end of the voltage dividing unit is connected to the first power signal line, and the voltage dividing unit is used to adjust the voltage of the second node.

[0018] In which, the sub-pixel driving unit includes a first driving transistor, the compensation driving unit includes a second driving transistor, the data writing unit includes a first switching transistor, and the compensation writing unit includes a second switching transistor; the data storage unit includes a first storage capacitor, the compensation storage unit includes a second storage capacitor, and the voltage divider unit includes a voltage divider resistor.

[0019] In order to solve the above technical problems, the second technical solution provided by this application is to provide a display panel. The display panel includes:

[0020] A plurality of pixel driving circuits, wherein the plurality of the driving circuits are arranged in a matrix, and the pixel driving circuits are the pixel driving circuits involved in the above technical solution;

[0021] A plurality of scan lines are respectively arranged between two adjacent rows of the pixel driving circuits and extend along the row direction, and the pixel driving circuits in the same row are connected to the corresponding same scan line;

[0022] A plurality of data lines are respectively arranged between two adjacent columns of the pixel driving circuits and extend along the column direction, and the pixel driving circuits in the same column are connected to the corresponding same data line;

[0023] a plurality of first power signal lines, respectively provided between two adjacent rows or two adjacent columns of pixel driving circuits, extending along the row direction or the column direction, wherein the pixel driving circuit is connected to an adjacent one of the first power signal lines;

[0024] A plurality of compensation lines correspond to and are electrically connected to the pixel driving circuits one by one, and are used to provide compensation signals to the pixel driving circuits to adjust the driving voltages of the pixel driving circuits so that the driving voltages of each pixel driving circuit are equal to the target driving voltage.

[0025] The display panel further includes a voltage acquisition module, which includes an acquisition control unit and a control signal generating unit. The control signal generating unit is connected to a control terminal of the acquisition control unit, and the acquisition terminal of the acquisition control unit is connected to the pixel driving circuit.

[0026] The acquisition control unit acquires the driving voltage of the pixel driving circuit in the driving phase in response to the control signal of the control signal generating unit.

[0027] Among them, the acquisition control unit includes multiple acquisition control subunits, the control ends of the multiple acquisition control subunits are respectively connected to the control signal generation unit, and the first ends of the multiple acquisition control units are respectively connected to the corresponding pixel driving circuits; the control signal generation unit includes a shift register for generating a time-sharing control signal to time-sharingly control the acquisition control subunit to sequentially acquire the driving voltage of each row or column of the pixel driving circuit.

[0028] In which, the display panel also includes a data processing module and a power management module. The two ends of the data processing module are respectively connected to the output end of the acquisition control unit and the pixel driving circuit. The data processing module is used to obtain the driving voltage collected by the acquisition control unit, and calculate the value of the compensation signal based on the acquired driving voltage, and transmit the calculated value of the compensation signal to the power management module. The power management module transmits the compensation signal to the corresponding pixel driving circuit based on the obtained value of the compensation signal.

[0029] In which, the first end of the acquisition control subunit is connected to the second node of the pixel driving circuit, and some signal connection lines between the pixel driving circuit and the acquisition control subunit have a straight portion and a bent portion. The length of the bent portion of the signal connection line gradually increases as the pixel driving circuit approaches the acquisition control unit, so that the total length of each signal connection line is the same.

[0030] In order to solve the above technical problems, the third technical solution provided by this application is to provide a display device. The display device includes:

[0031] A display panel, wherein the display panel is the display panel involved in the above technical solution;

[0032] A scanning driving module, configured to provide a scanning signal to the display panel;

[0033] The data driving module is used to provide a data signal to the display panel.

[0034] Beneficial effects of the present application: Different from the prior art, the present application provides a pixel driving circuit, a display panel and a display device, wherein the pixel driving circuit includes a sub-pixel driving module, a compensation signal terminal and a compensation module. By connecting the compensation control terminal of the compensation module and the sub-pixel driving module to the same scanning line, the compensation module and the sub-pixel driving module are turned on at the same time. By connecting the first signal input terminal of the compensation module to the first power signal line, the driving signal output terminal to the second node of the sub-pixel driving circuit, and connecting the compensation signal input terminal of the compensation module to the compensation signal terminal, during the driving stage of the sub-pixel driving module, the compensation module can adjust the driving signal of the first power supply and the corresponding compensation signal of the compensation signal terminal, and transmit them to the sub-pixel driving circuit through the driving signal output terminal, thereby compensating for the power supply voltage drop caused by the length of the first power supply signal line, so that the driving current flowing through the light-emitting unit is equal to the preset target value, avoiding the problem of uneven brightness of the display panel caused by the difference between the driving current flowing through the light-emitting unit and the target current due to the power supply voltage drop, and improving the display quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0036] FIG1 is a schematic structural diagram of a pixel driving circuit provided by an embodiment of the prior art;

[0037] FIG2 is a schematic structural diagram of a pixel driving circuit provided in a first embodiment of the present application;

[0038] FIG3 is a schematic structural diagram of a pixel driving circuit provided in a second embodiment of the present application;

[0039] FIG4 is a schematic structural diagram of a pixel driving circuit provided in a third embodiment of the present application;

[0040] FIG5 is a schematic structural diagram of a display panel provided in the first embodiment of the present application;

[0041] FIG6 is a schematic structural diagram of a display panel provided in a second embodiment of the present application;

[0042] FIG7 is a schematic structural diagram of a display panel provided in a third embodiment of the present application;

[0043] FIG8 is a schematic structural diagram of a display panel provided in a fourth embodiment of the present application;

[0044] FIG9 is a schematic structural diagram of a display device provided in an embodiment of the present application.

[0045] Reference numerals:

[0046] 1-display panel; 2-scanning drive module; 3-data drive module; 100a, 100-pixel drive circuit; 10-subpixel drive module; 11-data writing unit; 12-subpixel drive unit; 13-data storage unit; 14-light-emitting unit; 20-compensation module; 21-compensation writing unit; 22-compensation drive unit; 23-compensation storage unit; 24-voltage divider unit; 41-first power signal line; 42-second power signal line; 43-signal connection line; 431-straight portion; 432-bend portion; 50-voltage acquisition module; 51-acquisition control unit; 511-acquisition control subunit; 52-control signal generation unit; 521-D flip-flop; 60-data processing module; 70-power management module;

[0047] Sn-scan line; Dm-data line; M01-driving transistor; M02-switching transistor; C01-storage capacitor; Cm-compensation signal terminal; P1-compensation signal input terminal; P2-compensation control terminal; P3-first signal input terminal; P4-driving signal output terminal; N1-first node; N2-second node; N3-third node; N4-fourth node; M1-first driving transistor; M2-first switching transistor; M3-second driving transistor; M4-second switching transistor; M5-third switching transistor; R-voltage dividing resistor. DETAILED DESCRIPTION

[0048] The following describes the embodiments of the present application in detail with reference to the accompanying drawings.

[0049] In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures, interfaces, and technologies are provided to facilitate a thorough understanding of the present application.

[0050] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0051] The terms "first," "second," and "third" in this application are used only for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of such features. In the description of this application, "multiple" means at least two, for example, two, three, etc., unless otherwise specifically defined. All directional indications in the embodiments of this application (such as up, down, left, right, front, back...) are only used to explain the relative positional relationship, movement, etc. between the components under a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications also change accordingly. In addition, the terms "including" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products, or devices.

[0052] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0053] Please refer to Figure 1, which is a structural diagram of a pixel driving circuit provided by an embodiment of the prior art. The pixel driving circuit 100a provided by this embodiment is a common 2T1C driving circuit, including a switching transistor M02, a driving transistor M01 and a storage capacitor C01; its working principle is that when the scanning signal Vgate is at an effective level, the switching transistor M02 is turned on, and at the same time, the data line Dm inputs a data signal, the data signal Vdata is written into the storage capacitor C01, and the driving transistor M01 is controlled to be turned on, and the light-emitting unit emits light. When the scanning signal Vgate is at an invalid level, the storage capacitor C01 discharges, keeping the driving transistor M02 turned on, and the VDD signal continuously provides current to the light-emitting unit. The current flowing through the light-emitting unit is controlled by the driving transistor M02, and the current specifically satisfies the following formula (1):

[0054] Where VDD is the voltage of the constant current source, W and L are the width and length of the channel of the driving transistor respectively, μ is the effective carrier mobility, C ox is the capacitance per unit area of ​​the gate insulating layer of the driving transistor, Vdata is the data signal input by the data line, and Vth is the threshold voltage of the driving transistor.

[0055] Among them, W, L, are determined when the driver transistor is designed, and C ox These parameters are fixed and determined by the thickness and material of the gate insulation layer. Therefore, the parameters that affect the drive current, and therefore the brightness of the light-emitting unit, are μ, VDD, Vdata, and Vth. μ and Vth are key parameters for measuring the performance of the drive transistor, while VDD and Vdata depend on external inputs.

[0056] Currently, since all pixel driving circuits 100a in a panel are connected to the same power supply, the paths through which VDD reaches the pixel driving circuits 100a at each level are different, i.e., the lengths of the VDD signal traces of the pixel driving circuits 100a at each level are different. This results in different actual VDD values ​​for the pixel driving circuits 100a at each level, thereby causing different currents flowing through the OLEDs, and ultimately resulting in different luminous brightness, which affects the display uniformity of the panel.

[0057] In order to solve the above technical problems, the present application proposes a pixel driving circuit to overcome the above defects.

[0058] The present application will be described in detail below with reference to the accompanying drawings and embodiments.

[0059] 2 is a schematic diagram of a pixel driving circuit according to a first embodiment of the present invention. In this embodiment, a pixel driving circuit 100 is provided, comprising a sub-pixel driving circuit 100, a compensation module 20, and a compensation signal terminal Cm.

[0060] The sub-pixel driving module 10 includes a data writing unit 11, a data storage unit 13, a sub-pixel driving unit 12, and a light-emitting unit 14. In the data writing unit 11, the control terminal is connected to the scan line Sn, the first terminal is connected to the data line Dm, and the second terminal is connected to the first node N1. In the sub-pixel driving unit 12, the control terminal is connected to the first node N1, the first terminal is connected to the second node N2, and the second terminal is connected to the first electrode of the light-emitting unit 14. The first terminal and the second terminal of the data storage unit 13 are connected to the first node N1 and the second node N2, respectively. The second electrode of the light-emitting unit 14 is connected to the second power signal line 42.

[0061] The compensation module 20 includes a compensation control terminal P2, a compensation signal input terminal P1, a first signal input terminal P3, and a drive signal output terminal P4. Specifically, the compensation control terminal P2 is connected to the scan line Sn, the compensation signal input terminal P1 is connected to the compensation signal terminal Cm, the first signal input terminal P3 is connected to the first power signal line 41, and the drive signal output terminal P4 is connected to the second node N2.

[0062] When the pixel driving circuit 100 is driven, the scan line Sn provides a scan signal Vgate to the sub-pixel module and the compensation module 20. The data writing unit 11 and the compensation module 20 respond to the signal control of the scan line Sn. The data writing unit 11 controls the on and off of the control end of the sub-pixel driving unit 12 and writes the data signal Vdata of the data line Dm into the data storage unit 13. At the same time, the compensation signal of the compensation signal end Cm is written into the compensation module 20. The compensation module 20 processes the compensation signal with the first power signal provided by the first power signal line 41 and outputs a driving voltage. After the sub-pixel driving unit 12 is turned on, the compensation module 20 transmits the driving voltage to the second node N2 so that the driving current passes through the light-emitting unit 14, causing the light-emitting unit 14 to emit light. The driving voltage at the second node N2 can be adjusted by adjusting the compensation signal so that the driving current flowing through the light-emitting unit 14 is equal to the preset target value.

[0063] In this embodiment, the compensation module 20 and the sub-pixel driving module 10 are connected to the same scan line Sn, that is, the compensation module 20 and the sub-pixel driving module 10 are controlled by the same scan signal Vgate, so that during the driving phase of the sub-pixel driving module 10, the compensation module 20 synchronously provides a driving voltage signal to the sub-pixel driving module 10. The scan line Sn provides a scan signal Vgate to the compensation module 20 and the sub-pixel driving module 10. When the scan signal Vgate is at a valid level, the data writing unit 11 in the sub-pixel driving module 10 is turned on, and the compensation module 20 is turned on synchronously; the data line Dm provides a data signal Vdata to the data writing unit 11, and the data writing unit 11 writes the data signal Vdata into the storage unit and controls the sub-pixel driving unit 12 to be turned on; the compensation signal terminal Cm provides a compensation signal to the compensation module 20, and the first power signal line 41 provides a first power signal to the compensation module 20. After being turned on, the compensation module 20 processes the first power signal and the compensation signal and outputs a driving voltage, and outputs the driving voltage to the second node N2, so that the driving current can pass through the light-emitting unit 14, and then the light-emitting unit 14 emits light.

[0064] In this embodiment, the first power signal is a power VDD signal, and the second power signal is a power VSS signal. Specifically, the magnitude of the compensation signal can be adjusted to compensate for the driving voltage of the sub-pixel driving module 10 accordingly, so that the driving voltage provided by the compensation module 20 to the sub-pixel driving module 10 is equal to the target driving voltage, thereby making the driving current flowing through the light-emitting unit 14 equal to the preset target value. Due to the different lengths of the first power signal line 41 in the pixel driving circuit 100 of the display panel 1, the driving voltage of the pixel driving circuit 100 at different positions is different, which in turn causes the display brightness of different pixels to be different, resulting in uneven display of the display panel 1. Through the above-mentioned configuration, the embodiment of the present application can compensate for the difference between the driving voltage of the pixel driving circuit 100 and the target driving voltage, thereby overcoming the deviation of the driving voltage of the pixel driving circuit 100 caused by the different lengths of the first power signal line 41, so that the display brightness of each pixel unit in the display panel 1 is more balanced.

[0065] Please refer to Figure 3, which is a schematic diagram of the structure of the pixel driving circuit provided by the second embodiment of the present application. In this embodiment, the compensation module 20 includes a compensation writing unit 21, a compensation driving unit 22, and a compensation storage unit 23. In the compensation writing unit 21, the control end is connected to the scan line Sn as the compensation control end P2, the first top end is connected to the compensation signal end Cm as the compensation signal input end P1, and the second end is connected to the third node N3; in the compensation driving unit 22, the control end is connected to the third node N3, the first end is connected as the first signal input end P3, and the second end is connected to the second node N2 as the drive signal output end P4; the first end and the second end of the compensation storage unit 23 are respectively connected to the third node N3 and the fourth node N4, and the fourth node N4 is arranged between the first power signal line 41 and the first signal input end P3.

[0066] The specific structure and function of the sub-pixel driving module 10 are the same as or similar to the specific structure and function of the sub-pixel driving module 10 designed in the above embodiment, and the details can be referred to the above detailed introduction.

[0067] Specifically, during display driving, the scan line Sn provides a scan signal Vgate. When the scan signal Vgate is at an effective level, the compensation writing unit 21 and the data writing unit 11 are turned on. The data line Dm provides a data signal Vdata. The data writing unit 11 writes the data signal Vdata into the data storage unit 13. The compensation signal terminal Cm provides a compensation signal. The compensation writing unit 21 writes the compensation signal into the compensation storage unit 23. In the next period, the compensation writing unit 21 controls the compensation driving unit 22 to be turned on. The data writing unit 11 controls the sub-pixel driving unit 12 to be turned on. The first A path is formed between the power signal line 41, the first and second ends of the compensation drive unit 22, the first and second ends of the sub-pixel drive unit 12, the light-emitting unit 14, and the second power signal line 42, so that the light-emitting unit 14 emits light; in the next period, the scanning signal Vgate becomes an invalid level, the compensation write unit 21 and the data write unit 11 are turned off, the compensation storage unit 23 is discharged, the compensation drive unit 22 is kept turned on, the data storage unit 13 is discharged, and the sub-pixel drive unit 12 is kept turned on, so that the first power signal can continuously provide driving current to the light-emitting unit 14, and the light-emitting unit 14 maintains brightness.

[0068] In this embodiment, a compensation signal is introduced to compensate for the first power signal so that the drive current flowing through the light-emitting unit 14 is equal to a preset target value. This avoids the problem of the drive current flowing through the light-emitting unit 14 deviating from the preset target value due to the first power signal deviation caused by the different lengths of the first power signal lines 41 of the pixel driving circuit 100, thereby improving the display uniformity of the display panel 1. Furthermore, in the display panel 1, due to the different positions of the pixel driving circuits 100, the lengths of their first power signal lines 41 vary, resulting in different deviations between the drive current and the target value. In this embodiment, the magnitude of the compensation signal is adjusted to compensate for the first power signal of the pixel driving circuit 100 accordingly, so that the drive current is equal to the preset target value, thereby overcoming the above-mentioned problem and compensating for the brightness difference between different pixel driving circuits 100.

[0069] Specifically, in this embodiment, the compensation module 20 also includes a voltage divider unit 24, the first end of the voltage divider unit 24 is connected to the fourth node N4, and the second end is connected to the first power signal line 41, that is, the first signal input terminal P3 is connected to the first power signal line 41 through the voltage divider unit 24, and the voltage divider unit 24 is used to adjust the voltage of the second node N2, and can also be used to protect the compensation driving unit 22 and the sub-pixel driving unit 12.

[0070] Please refer to Figure 4, which is a schematic diagram of the structure of the pixel driving circuit provided in the third embodiment of the present application. In this embodiment, the sub-pixel driving unit 12 includes a first driving transistor M1, the compensation driving unit 22 includes a second driving transistor M3, the data writing unit 11 includes a first switching transistor M2, and the compensation writing unit 21 includes a second switching transistor M4; the data storage unit 13 includes a first storage capacitor C1, the compensation storage unit 23 includes a second storage capacitor C2, and the voltage divider unit 24 includes a voltage divider resistor R. Specifically, the first driving transistor M1, the second driving transistor M3, the first switching transistor M2, and the second switching transistor M4 can be thin film transistors or field effect transistors. In this embodiment, they are configured as metal oxide semiconductor field effect transistors, specifically P-type or N-type, which can be configured according to actual needs. In this embodiment, a P-type transistor is used as an example for description. In this embodiment, the light-emitting unit 14 is a current-driven light-emitting device, such as a light-emitting diode (LED), a micro light-emitting diode (Micro LED), a sub-millimeter light-emitting diode (Mini LED), or an organic light-emitting diode (OLED). It can be configured according to actual needs. In this embodiment, an organic light-emitting diode (OLED) is used as an example for description.

[0071] In this embodiment, the second switch transistor M4 and the second drive transistor M3 are switches for controlling the first power supply signal, the second storage capacitor C2 is a switch for controlling the opening of the second drive transistor M3, the second switch transistor M4 is a switch for controlling the charging voltage of the second storage capacitor C2, and the compensation signal is a compensation data signal Vdata for compensating the first power supply signal. Specifically, the second switch transistor M4 is turned on by the scan signal Vgate. When the scan signal Vgate changes to an effective level, the first switch transistor M2 and the second switch transistor M4 are turned on, the data line Dm charges the first storage capacitor C1, and the compensation signal terminal Cm charges the second storage capacitor C2; at the same time, the first drive transistor M1 and the third drive transistor are turned on, and the drive current flows from the first power supply signal line 41 through the voltage divider resistor R, the second drive transistor M3, the first drive transistor M1 and the light-emitting unit 14 to the second power supply signal line 42, forming a light-emitting path. Among them, the drive current determines the opening degree of the second drive transistor M3, that is: VDDm=VDD-Ic×R-Vth……(2);

[0072] Among them, VDDm is the voltage at the second node N2 of the pixel driving circuit 100, Ic is the driving current, R is the resistance of the voltage divider resistor R, Vth is the threshold voltage of the second driving transistor M3; Vcm is the compensation voltage of the compensation signal, W, L, μ, Cox, and VDD are the same as those described in the above embodiment and are not repeated here.

[0073] Substituting formula (3) into formula (2), we have:

[0074] The voltage value of VDDm can be obtained by the above formula (4). Since the VDD in different pixel driving circuits 100 is different, VDDm can be adjusted by controlling the value of the compensation voltage Vcm of the compensation signal so that the voltage value of the second node N2 in each pixel driving circuit 100 is equal to the target driving voltage.

[0075] In this embodiment, a compensation signal is introduced to compensate for the first power supply signal of the pixel driving circuit 100, so that the driving voltage of the sub-pixel driving circuit 100 (i.e., the voltage at the second node N2) is equal to the target driving voltage, thereby making the driving current flowing through the light-emitting unit 14 equal to the preset target value; thereby avoiding the problem of a deviation between the driving voltage and the target driving voltage caused by the power supply voltage drop caused by the first power supply signal line 41, which causes the display brightness to decrease. Furthermore, by adjusting the compensation voltage of the compensation signal, the driving voltage of the pixel circuit can be always maintained at the target driving voltage, thereby avoiding the problem of brightness reduction due to circuit aging.

[0076] Referring to Figure 5, which is a schematic diagram of the structure of a display panel 1 provided in a first embodiment of the present application, a display panel 1 is provided in this embodiment. The display panel 1 includes a plurality of pixel driving circuits 100, a plurality of scan lines Sn, a plurality of data lines Dm, a plurality of first power signal lines 41, and a plurality of compensation lines.

[0077] Among them, multiple pixel driving circuits 100 are arranged in a matrix. The specific structure and function of the pixel driving circuit 100 are the same or similar to the pixel driving circuit 100 involved in the above implementation, and can achieve the same technical effect. For details, please refer to the detailed introduction above and will not be repeated here.

[0078] The scan lines Sn are used to provide scan signals Vgate to the pixel driving circuits 100 . The multiple scan lines Sn are respectively arranged between two adjacent rows of pixel driving circuits 100 and extend along the row direction. The pixel driving circuits 100 in the same row are connected to the same scan line Sn.

[0079] The data lines Dm are used to provide data signals Vdata to the pixel driving circuits 100 . The data lines Dm are respectively disposed between two adjacent columns of pixel driving circuits 100 and extend along the column direction. The pixel driving circuits 100 in the same column are connected to the same corresponding data line Dm.

[0080] Among them, the first power signal line 41 is used to provide a first power signal to the pixel driving circuit 100. Multiple first power signal lines 41 are respectively arranged between two adjacent rows or two adjacent columns of pixel driving circuits 100, extending along the row direction or column direction, and the pixel driving circuit 100 is connected to an adjacent first power signal line 41.

[0081] Among them, multiple compensation lines correspond to the pixel driving circuit 100 one by one and are electrically connected, and are used to provide compensation signals to the pixel driving circuit 100 to adjust the driving voltage of the pixel driving circuit 100 so that the driving voltage of each pixel driving circuit 100 is equal to the target driving voltage.

[0082] In this embodiment, the display panel 1 introduces multiple compensation lines and makes the multiple compensation lines correspond to the pixel driving circuit 100 one by one and electrically connected to each other, so as to independently compensate the driving voltage of each pixel driving circuit 100, so that the driving voltage of each driving circuit is equal to the target driving voltage, thereby making the brightness of each pixel driving circuit 100 the same, improving the display uniformity of the display panel 1, and avoiding the problem of uneven display brightness of the display panel 1 due to the different power supply voltage drops caused by the different lengths of the first power signal lines 41 of the pixel driving circuits 100 at different positions, resulting in different driving voltages of the pixel driving circuits 100 at different positions.

[0083] Please refer to FIG6 , which is a schematic diagram of the structure of a display panel provided in a second embodiment of the present application. In this embodiment, the display panel 1 further includes a voltage acquisition module 50 , a data processing module 60 and a power management module 70 .

[0084] Among them, the voltage acquisition module 50 includes an acquisition control unit 51 and a control signal generating unit 52. The control signal generating unit 52 is connected to the control end of the acquisition control unit 51, and the acquisition end of the acquisition control unit 51 is connected to the pixel driving circuit 100; the acquisition control unit 51 responds to the control signal of the control signal generating unit 52 to acquire the driving voltage of the pixel driving circuit 100 in the driving stage.

[0085] Among them, the two ends of the data processing module 60 are respectively connected to the output end of the acquisition control unit 51 and the pixel driving circuit 100. The data processing module 60 is used to obtain the driving voltage collected by the acquisition control unit 51, and calculate the value of the compensation signal based on the obtained driving voltage, and transmit the calculated value of the compensation signal to the power management module 70. The power management module 70 transmits the compensation signal to the corresponding pixel driving circuit 100 through the corresponding compensation line based on the obtained value of the compensation signal to compensate for the driving voltage of each pixel driving circuit 100.

[0086] Specifically, as described above, since the first power supply voltage VDD of each pixel driving circuit 100 is different when the first power supply signal reaches the pixel driving circuit 100, while other parameters are the same, according to the above formula (4), the driving voltage VDDm of the pixel driving circuit 100 at different positions will be different, where m represents the position of the pixel driving circuit 100. Therefore, the driving voltage VDDm needs to be compensated by the value of the compensation voltage Vcm of the compensation signal.

[0087] In this embodiment, during the driving phase of the pixel driving circuit 100, the driving voltage of the pixel driving circuit 100 is collected by the voltage acquisition module 50 to obtain the actual value of the driving voltage VDDm of the pixel driving circuit 100. The data processing module 60 obtains the collected actual value of the driving voltage VDDm and performs calculation processing based on the actual value of the driving voltage VDDm and a preset value of the first power supply voltage to obtain a compensation voltage corresponding to the compensation signal of the pixel driving circuit 100.

[0088] Specifically, according to the above formula (4), the calculation formula of the compensation signal can be obtained as follows:

[0089] The data processing unit can calculate the value of the compensation voltage required by the pixel driving circuit 100 according to the above formula (5), and transmit the calculated value of the compensation voltage to the power management module 70. The power management module 70 outputs the corresponding compensation signal to the pixel driving circuit 100 through the corresponding compensation line according to the value of the compensation voltage to compensate for the driving voltage of the pixel driving circuit 100.

[0090] Specifically, during the test development phase or the initial display phase of the display panel 1, an initial compensation signal can be provided to each level of pixel driving circuit 100. The compensation signal can be calculated according to the above formula (5), specifically: VDD is the preset target value of the first power signal, VDDm can be obtained by collecting the pixel driving circuit 100 with the shortest first power signal line 41 through the voltage acquisition module 50, and then an initial value of the compensation signal can be calculated according to the above formula (5); the initial compensation signal is then compensated to each pixel driving circuit 100, and then the voltage acquisition module 50 is used to obtain the target value of each pixel driving circuit 100. The actual value of the driving voltage VDDm of the pixel driving circuit 100 is calculated, and the actual value of the first power signal reaching each pixel driving circuit 100 is calculated according to formula (4). Then, the compensation voltage Vcm of the compensation signal actually required by each pixel driving circuit 100 is calculated according to the above formula (5), and the compensation voltage is compensated to the corresponding pixel driving circuit 100 through the power management module 70, so that the driving voltage of each pixel driving circuit 100 reaches the target driving voltage, so that the driving voltage of each pixel driving circuit 100 is the same, avoiding the driving voltage difference and display difference caused by the different positions of the pixel.

[0091] In a specific embodiment, the display panel 1 can collect the driving voltage of each pixel driving circuit 100 once at a certain interval by the voltage acquisition module 50, and adjust the compensation signal once according to the collected voltage value, so that the driving voltage value of each pixel driving circuit 100 always maintains the target driving voltage value.

[0092] Alternatively, since the length of the first power signal line 41 of each level of pixel driving circuit 100 is fixed and does not change over time, the first power supply voltage drop of each pixel driving circuit 100 remains essentially unchanged. Therefore, after the first detection and compensation, there is no need to detect and adjust the compensation signal. Furthermore, during the test and development phase of the display panel 1, after obtaining the required compensation signal for each pixel driving circuit 100 through the above-mentioned detection and compensation method, the driving voltage of each pixel driving circuit 100 of all sample panels can be compensated according to the compensation signal. That is, the display panel 1 after leaving the factory does not need to be provided with a voltage detection module and a data processing module 60, so as to simplify the display panel 1.

[0093] Please refer to Figure 7, which is a schematic diagram of the structure of a display panel provided in a third embodiment of the present application. In this embodiment, the acquisition control unit 51 includes multiple acquisition control subunits 511. The control terminals of the multiple acquisition control subunits 511 are respectively connected to the control signal generation unit 52. The first terminals of the multiple acquisition control units 51 are respectively connected to the corresponding pixel driving circuits 100. The control signal generation unit 52 includes a shift register for generating a time-sharing control signal to control the acquisition control subunits 511 to sequentially acquire the driving voltage of each row or column of the pixel driving circuits 100.

[0094] Specifically, the acquisition control subunit 511 includes a third switching transistor M05, the gate of the third switching transistor M05 is connected to the corresponding output end of the shift register, the source of the third switching transistor M05 is connected to the data processing module 60, and the drain of the third switching transistor M05 is connected to the second node N2 of the corresponding pixel driving circuit 100.

[0095] Specifically, the control signal generating unit 52 generates a time-sharing control signal based on the frame start signal STV and the pulse trigger signal CPV. The frame start signal STV is the same as the frame start signal STV used to generate the scan signal Vgate. This allows each pixel driving circuit 100 to be driven. When the first switching transistor M2 and the second driving transistor M3 are turned on, the control signal generating unit 52 also controls the corresponding third transistor to be turned on. This allows the actual value of the driving voltage at the second node N2 to be collected during the driving interval of the pixel driving circuit 100, ensuring the accuracy of the collected driving voltage.

[0096] Specifically, the control signal generating unit 52 includes a plurality of cascaded D flip-flops 521, the specific number of which is the same as the number of the pixel driving circuits 100, and the Q output terminals of the D flip-flops 521 are connected one-to-one with the control terminals of the third switching transistors M5, so that the third switching transistors are turned on when the corresponding pixel driving circuits 100 are driven, thereby collecting the driving voltages of the respective pixel driving circuits 100.

[0097] Please refer to FIG8 , which is a schematic diagram of the structure of a display panel provided in a fourth embodiment of the present application. In the fourth embodiment, a first end of the acquisition control subunit 511 is connected to the second node N2 of the pixel driving circuit 100. The signal connection lines 43 between some pixel driving circuits 100 and the acquisition control subunit 511 have straight sections 431 and curved sections 432. As the pixel driving circuit 100 approaches the acquisition control unit 51, the total length of the curved sections 432 of the signal connection lines 43 of the pixel driving circuit 100 gradually increases, so that the total length of each signal connection line 43 is the same. For example, a signal connection line 43 at a distal end may not have a curved section 432, while a signal connection line 43 at a proximal end may have one or more curved sections 432 depending on its specific length. The length of each curved section 432 can be set according to actual needs. For example, if the area available for the curved section 432 is larger, the length of the curved section 432 can be slightly longer, while if the area available for the curved section 432 is more limited, the length of the curved section 432 can be slightly shorter.

[0098] Because the VDDm voltage detection points vary in distance, some signal lines connecting the pixel driver circuit 100 and the acquisition control subunit 511 have curved sections to minimize the impact of the routing. Specifically, the curved sections can be serpentine. Far-end detection points are directly routed back, while near-end detection points, because their paths are longer than those at the far end, are routed in a serpentine pattern through blank areas of the panel to increase their length. Ultimately, each detection point has a consistent path, resulting in a higher detected voltage level.

[0099] Please refer to FIG9 , which is a schematic diagram of the structure of a display device provided in an embodiment of the present application. In this embodiment, a display device is provided, which includes a display panel 1 , a scan driver module 2 , and a data driver module 3 .

[0100] Among them, the specific structure and function of the display panel 1 are the same or similar to the structure and function of the display panel 1 involved in the above embodiment, and can achieve the same technical effects. Please refer to the detailed introduction above for details, which will not be repeated here.

[0101] Among them, the scan driving module 2 is electrically connected to the display panel 1 through the scan line Sn, and is used to provide a scan signal Vgate to the display panel 1; the data driving module 3 is electrically connected to the display panel 1 through the data line Dm, and is used to provide a data signal Vdata to the display panel 1 so that the display panel 1 displays the corresponding picture.

[0102] The above is only an implementation method of the present application and does not limit the scope of patent protection of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the scope of patent protection of the present application.

Claims

1. A pixel driving circuit, comprising: A sub-pixel driving module comprises a data writing unit, a data storage unit, a sub-pixel driving unit and a light emitting unit; in the data writing unit, a control end is connected to a scan line, a first end is connected to a data line, and a second end is connected to a first node; in the sub-pixel driving unit, a control end is connected to the first node, a first end is connected to a second node, and a second end is connected to a first electrode of the light emitting unit; a first end and a second end of the data storage unit are connected to the first node and the second node respectively; and a second electrode of the light emitting unit is connected to a second power signal line; Wherein, the pixel driving circuit further includes a compensation signal terminal and a compensation module; the compensation module includes a compensation control terminal, a compensation signal input terminal, a first signal input terminal and a driving signal output terminal; the compensation control terminal is connected to the scanning line, the compensation signal input terminal is connected to the compensation signal terminal, the first signal input terminal is connected to the first power signal line, and the driving signal output terminal is connected to the second node; The data writing unit and the compensation module are controlled in response to the signal of the scanning line, the data writing unit controls the on and off of the control terminal of the sub-pixel driving unit, and writes the data signal of the data line into the data storage unit; The compensation signal terminal is used to provide a compensation signal to the compensation module, and the compensation module is used to process the compensation signal and the first power signal provided by the first power signal line and then output a driving voltage; After the sub-pixel driving unit is turned on, the compensation module transmits the driving voltage to the second node so that the driving current passes through the light-emitting unit; and adjusts the driving voltage at the second node by adjusting the compensation signal so that the driving current is equal to a preset target value.

2. The pixel driving circuit according to claim 1, wherein: The compensation module and the sub-pixel driving module are connected to the same scanning line, so that during the driving phase of the sub-pixel driving module, the compensation module synchronously provides the driving voltage to the sub-pixel driving module.

3. The pixel driving circuit according to claim 2, wherein: The compensation module includes a compensation writing unit, a compensation driving unit and a compensation storage unit; in the compensation writing unit, the control end is connected to the scan line as the compensation control end, the first end is connected to the compensation signal end as the compensation signal input end, and the second end is connected to the third node; in the compensation driving unit, the control end is connected to the third node, the first end is connected to the first power signal line as the first signal input end, and the second end is connected to the second node as the drive signal output end; the first end and the second end of the compensation storage unit are connected to the third node and the fourth node respectively, and the fourth node is arranged between the first power signal line and the first signal input end; The data writing unit and the compensation writing unit are controlled in response to the signal of the scanning line, so that the data writing unit and the compensation writing unit are turned on at the same time when the signal of the scanning line is at a valid level, and the data signal of the data line is written into the data storage unit, and the compensation signal provided by the compensation signal terminal is written into the compensation storage unit; the data writing unit controls the sub-pixel driving unit to be turned on, and the compensation writing unit controls the compensation driving unit to be turned on, so as to output the driving signal of the first power signal line and the compensation signal to the second node.

4. The pixel driving circuit according to claim 3, wherein: When the signal of the scan line becomes an invalid level, the compensation writing unit and the data writing unit are turned off, and the compensation storage unit is discharged to keep the compensation driving unit turned on; The data storage unit is discharged to keep the sub-pixel driving unit turned on, so that the first power signal continuously provides the driving current to the light-emitting unit to keep the brightness of the light-emitting unit.

5. The pixel driving circuit according to claim 3, wherein: The compensation module further includes a voltage dividing unit, a first end of the voltage dividing unit is connected to the fourth node, a second end of the voltage dividing unit is connected to the first power signal line, and the voltage dividing unit is used to adjust the voltage of the second node.

6. The pixel driving circuit according to claim 5, wherein: The sub-pixel driving unit includes a first driving transistor, the compensation driving unit includes a second driving transistor, the data writing unit includes a first switching transistor, and the compensation writing unit includes a second switching transistor; the data storage unit includes a first storage capacitor, the compensation storage unit includes a second storage capacitor, and the voltage dividing unit includes a voltage dividing resistor.

7. The pixel driving circuit according to claim 6, wherein: The first driving transistor, the second driving transistor, the first switching transistor and the second switching transistor are thin film transistors or field effect transistors; and the light emitting unit is a current driven light emitting device.

8. A display panel, wherein: include: A plurality of pixel driving circuits, wherein the plurality of the driving circuits are arranged in a matrix, and the pixel driving circuit is the pixel driving circuit as claimed in claim 1; A plurality of scanning lines are respectively arranged between two adjacent rows of the pixel driving circuits and extend along the row direction, and the pixel driving circuits in the same row are connected to the corresponding same scanning line; A plurality of data lines are respectively arranged between two adjacent columns of the pixel driving circuits and extend along the column direction, and the pixel driving circuits in the same column are connected to the corresponding same data line; A plurality of first power signal lines are respectively arranged between two adjacent rows or two adjacent columns of pixel driving circuits and extend along the row direction or the column direction, and the pixel driving circuit is connected to an adjacent one of the first power signal lines; A plurality of compensation lines correspond to and are electrically connected to the pixel driving circuits one by one, and are used to provide compensation signals to the pixel driving circuits to adjust the driving voltages of the pixel driving circuits so that the driving voltages of each of the pixel driving circuits are equal to the target driving voltage.

9. The display panel according to claim 8, wherein: The display panel further includes a voltage acquisition module, the voltage acquisition module includes an acquisition control unit and a control signal generating unit, the control signal generating unit is connected to the control end of the acquisition control unit, and the acquisition end of the acquisition control unit is connected to the pixel driving circuit; The acquisition control unit acquires the driving voltage of the pixel driving circuit in the driving stage in response to the control signal of the control signal generating unit.

10. The display panel according to claim 9, wherein: The acquisition control unit comprises a plurality of acquisition control subunits, the control ends of the plurality of acquisition control subunits are respectively connected to the control signal generating unit, and the first ends of the plurality of acquisition control units are respectively connected to the corresponding pixel driving circuits; The acquisition control subunit includes a third switch transistor; the control signal generating unit includes a shift register for generating a time-sharing control signal to control the acquisition control subunit to sequentially acquire the driving voltage of each row or each column of the pixel driving circuit in time-sharing.

11. The display panel according to claim 10, wherein: The control signal generating unit includes a plurality of cascaded D flip-flops, and the Q output terminals of the D flip-flops are connected to the control terminals of the third switch transistors in a one-to-one correspondence.

12. The display panel according to claim 10, wherein: The control signal generating unit is used to generate the time-sharing control signal according to the frame start signal and the pulse trigger signal.

13. The display panel according to claim 9, wherein: The display panel also includes a data processing module and a power management module. The two ends of the data processing module are respectively connected to the output end of the acquisition control unit and the pixel driving circuit. The data processing module is used to obtain the driving voltage collected by the acquisition control unit, and calculate the value of the compensation signal according to the acquired driving voltage, and transmit the calculated value of the compensation signal to the power management module. The power management module transmits the compensation signal to the corresponding pixel driving circuit according to the obtained value of the compensation signal.

14. The display panel according to claim 13, wherein: The gate of the third switch transistor is connected to the corresponding output end of the shift register, the source of the third switch transistor is connected to the data processing module, and the drain of the third switch transistor is connected to the corresponding second node of the pixel driving circuit.

15. The display panel according to claim 13, wherein: During the test development stage or the initial display stage of the display panel, the data processing module and the power management module are used to provide initial compensation signals to the pixel driving circuits at each level; after the actual value of the driving voltage of each pixel driving circuit is obtained through the litigation voltage acquisition module, the data processing module calculates the compensation voltage according to the actual value of the driving voltage, and compensates the compensation voltage to the corresponding pixel driving circuits through the power management module.

16. The display panel according to claim 15, wherein: The voltage acquisition module acquires the driving voltage of each pixel driving circuit once at regular intervals, and adjusts the compensation signal once according to the acquired voltage value.

17. The display panel according to claim 10, wherein: The first end of the acquisition control subunit is connected to the second node of the pixel driving circuit, and the signal connection line between part of the pixel driving circuit and the acquisition control subunit has a straight part and a bent part. The length of the bent part of the signal connection line gradually increases along the direction of the pixel driving circuit approaching the acquisition control unit so that the total length of each signal connection line is the same.

18. The display panel according to claim 17, wherein: The bent portion is a serpentine routing.

19. A display device, wherein: include: A display panel, wherein the display panel is the display panel according to claim 8; A scanning driving module, used for providing a scanning signal to the display panel; The data driving module is used to provide a data signal to the display panel.

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