Display device

Abstract

A display device according to one feature of the present invention includes: a display panel having an active area and a bezel area; a display panel; and a data driving unit arranged in the bezel area, wherein the bezel area includes: a first bezel area formed between the upper side of the data driving unit and the active area, the upper side of the data driving unit facing the active area; and a second bezel area formed to be further spaced apart from the active area than the first bezel area, and the data driving unit includes: a first bump terminal arranged between the upper side of the data driving unit and the lower side of the data driving unit, the lower side of the data driving unit being positioned on the opposite side of the upper side of the data driving unit; and a second bump terminal formed between the first bump terminal and the upper side of the data driving unit.

Description

display device

[0001] The embodiment relates to a display device.

[0002] As the information society develops, demand for display devices for displaying images is increasing in various forms. Display devices can be flat panel displays such as liquid crystal displays (LCDs), field emission displays (FEDs), and light-emitting display panels (LEDs).

[0003] The light-emitting display device may include an organic light-emitting display device including an organic light-emitting diode element as a light-emitting element or a light-emitting diode display device including an inorganic light-emitting diode element such as an LED (Light Emitting Diode) as a light-emitting element.

[0004] A display device includes an active area (or display area) in which pixels that display an image are displayed, and a bezel area (or non-display area) in which source driver chips and wires for driving the pixels are placed around the active area.

[0005] Recently released display devices have been reducing the bezel area to maximize the area of ​​the active area, but as display devices have become larger, there have been many problems in reducing the bezel area due to the increase in the number of wires and source driver chips connected to the active area.

[0006] The embodiment provides a display device capable of narrowing the size of a bezel area even when the integration of a data driver IC or a source driver IC is increased.

[0007] The tasks of the present invention are not limited to the tasks mentioned above, and other tasks not mentioned will be clearly understood by those skilled in the art from the description below.

[0008] A display device according to one feature of the present invention includes a display panel having an active area to be displayed and a bezel area disposed around the active area; and a data driver disposed in the bezel area and outputting an analog source signal to a plurality of data lines wired to the active area, wherein the bezel area includes a first bezel area formed between an upper side of the data driver facing the active area and the active area; and a second bezel area formed further away from the active area than the first bezel area; and the data driver includes a first bump terminal disposed between an upper side of the data driver and a lower side of the data driver located opposite the upper side of the data driver; and a second bump terminal formed between the first bump terminal and the upper side of the data driver or between the first bump terminal and the lower side of the data driver.

[0009] In addition, the second bump terminal may be formed to be electrically connected to the plurality of data lines, and may include a terminal formed to maintain a width between the data driver and the display panel.

[0010] Additionally, the thickness of the second bump terminal may be formed to be the same as or thicker than the thickness of the first bump terminal.

[0011] Additionally, the first bump terminal may include a pad that electrically connects the plurality of data lines and the data driver.

[0012] In addition, the active area may include a first active area disposed on one side of the display panel; a second active area disposed on the other side of the display panel; and a third active area disposed between the first active area and the second active area; and the plurality of data lines may include a first group of lines that are wired from the first bump terminal toward the second bezel area so as to pass through at least one of the first bezel area and the second bezel area to reach the first active area; a second group of lines that are wired from the first bump terminal toward the second bezel area so as to pass through at least one of the first bezel area and the second bezel area to reach the second active area; and a third group of lines that are wired from the first bump terminal toward the first bezel area so as to pass through the first bezel area to reach the third active area.

[0013] In addition, the data driving unit may include a first source region disposed on one side of the data driving unit and electrically connected to the first group line; a second source region disposed on the other side of the data driving unit and electrically connected to the second group line; and a third source region disposed between the first source region and the second source region and electrically connected to the third group line.

[0014] In addition, the first group line electrically connected to one side of the first active region may be wired to be electrically connected to the other side of the first source region, and the first group line electrically connected to the other side of the first active region may be wired to be electrically connected to one side of the first source region.

[0015] In addition, the second group line electrically connected to one side of the second active region may be wired to be electrically connected to the other side of the second source region, and the second group line electrically connected to the other side of the second active region may be wired to be electrically connected to one side of the second source region.

[0016] In addition, the third group line electrically connected to one side of the third active region may be wired to be electrically connected to one side of the third source region, and the third group line electrically connected to the other side of the third active region may be wired to be electrically connected to one side of the third source region.

[0017] In addition, when the input terminals of the first active region are sequentially arranged in a first direction (+X direction) that proceeds from one side of the first active region toward the other side of the first active region, the first group line electrically connected to the input terminals of the first active region may include being arranged in a second direction (-X direction) that proceeds from the other side of the first group line toward one side of the first group line.

[0018] In addition, when the input terminals of the second active region are sequentially arranged in a first direction (+X direction) that proceeds from one side of the second active region toward the other side of the second active region, the second group line electrically connected to the input terminals of the second active region may include being arranged in a second direction (-X direction) that proceeds from the other side of the second group line toward one side of the second group line.

[0019] In addition, when the input terminals of the third active region are sequentially arranged in a first direction (+X direction) that proceeds from one side of the third active region toward the other side of the third active region, the third group line electrically connected to the input terminals of the third active region may include being arranged in the first direction (+X direction) that proceeds from one side of the third group line toward the other side of the third group line.

[0020] According to an embodiment, the second bump terminal is arranged between the first bump terminal and the upper side of the data driving unit, thereby reducing deformation or damage that may occur during the manufacturing process of the data driving unit.

[0021] In addition, according to an embodiment, the second bump terminal is arranged between the first bump terminal and the upper side of the data driver, thereby maintaining the wiring density uniformly to satisfy the design rule or satisfying the constraints of the manufacturing process to increase the manufacturing yield of the chip.

[0022] Additionally, according to an embodiment, the second bump terminal is positioned between the first bump terminal and the upper side of the data drive unit, thereby effectively dispersing mechanical stress generated at the edge of the data drive unit, thereby preventing the data drive unit from being broken or damaged.

[0023] Additionally, according to the embodiment, the second bump terminal is arranged between the first bump terminal and the upper side of the data driver, thereby ensuring stability and uniformity of the manufacturing process and improving mechanical / electrical characteristics, thereby ultimately improving performance and yield.

[0024] The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description of the claims.

[0025] FIG. 1 is a drawing showing a display device including a touch sensing device according to one embodiment of the present invention.

[0026] FIG. 2 is a drawing showing in detail a display panel and a data driver according to one embodiment of the present invention.

[0027] FIG. 3 is a diagram illustrating a bump terminal and a data driving unit including the same according to an embodiment of the present invention.

[0028] FIG. 4a and FIG. 4b are diagrams for explaining a bump terminal according to an embodiment of the present invention.

[0029] FIG. 5a and FIG. 5b are diagrams for explaining a bump terminal according to another embodiment of the present invention.

[0030] FIG. 6 is a diagram for explaining a wiring method of a data line according to an embodiment of the present invention.

[0031] FIG. 7 is a diagram for explaining the connection relationship between the first group line and the first active area according to an embodiment of the present invention.

[0032] FIG. 8 is a diagram for explaining the connection relationship between the second group line and the second active area according to an embodiment of the present invention.

[0033] FIG. 9 is a diagram for explaining the connection relationship between the third group line and the third active area according to an embodiment of the present invention.

[0034] Fig. 10 is a diagram for explaining a display panel using a conventional wiring method and a display panel using a wiring method of the present invention.

[0035] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. The present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. The embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined solely by the scope of the claims.

[0036] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the details depicted in the drawings. Throughout the specification, the same reference numerals designate substantially the same components. Furthermore, in describing the present invention, detailed descriptions of related known technologies will be omitted if they are deemed to unnecessarily obscure the gist of the present invention.

[0037] In the specification, when “comprises,” “includes,” “has,” and “consists of,” other parts may be added unless “only” is used. When a component is expressed in the singular, it may be interpreted as plural unless otherwise explicitly stated.

[0038] When interpreting a component, it is interpreted as including the error range even if there is no separate explicit description.

[0039] When the positional relationship and interconnectedness between two components are described as ‘on’, ‘above’, ‘below’, ‘next to’, ‘connect, couple’, crossing, intersecting, etc., one or more other components may be interposed between the components unless there is a mention of ‘directly’ or ‘directly’.

[0040] When the temporal order is explained with phrases such as ‘after’, ‘following’, ‘next to’, or ‘before’, it may not be continuous on the time axis unless ‘right away’ or ‘directly’ is used.

[0041] To distinguish components, the ordinal numbers 1, 2, etc. may be used before the names of components; however, these ordinal numbers or names of components do not limit their function or structure. For convenience of explanation, the ordinal numbers preceding the names of the same components may differ between embodiments.

[0042] The following embodiments may be partially or fully combined or combined with one another, enabling various technically feasible interconnections and operations. Each embodiment may be implemented independently of the other, or may be implemented together in a related manner.

[0043] Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings.

[0044] Fig. 1 is a drawing showing a display device according to an embodiment of the present invention. Fig. 2 is a drawing showing in detail a display panel and a data driver according to an embodiment of the present invention.

[0045] Referring to FIG. 1, the display device (100) includes a display panel (110), a gate driver (120), a data driver (130), and a timing controller (140), and may further include a host system (not shown) that supplies various timing signals to the timing controller (140) of the display device.

[0046] The display panel (110) may include a plurality of gate lines (G1 to Gn) that are arranged crosswise to define a plurality of pixel areas, a plurality of data lines (D1 to Dm), and pixels (P) provided in each of the plurality of pixel areas.

[0047] A thin film transistor (TFT) can supply a source signal supplied through a data line (D1 to Dm) to a pixel in response to a scan pulse supplied through a gate line (G1 to Gn).

[0048] The gate driver (120) may include a shift register that sequentially generates scan pulses, i.e., gate high pulses, according to a gate control signal (GCS). In response to this scan pulse, a thin film transistor (TFT) may be turned on.

[0049] The gate driver (120) may be placed on one side of the display panel (110), for example, on the left side, as shown, but may also be placed on both one side and the other side of the display panel (110), for example, on both the left and right sides, facing each other, in some cases.

[0050] The gate driver (120) may include a plurality of gate driver ICs (Gate Driver Integrated Circuits, not shown). The gate driver (120) may be formed in the form of a tape carrier package in which the gate driver IC is mounted, but is not necessarily limited thereto, and the gate driver IC may be directly mounted on the display panel (110). For example, the gate driver IC may be mounted in the bezel area of ​​the display panel (110), which will be described later.

[0051] The data driving unit (130) can convert a digital image signal transmitted from the timing controller (140) into an analog source signal and output it to the display panel (110). Specifically, the data driving unit (130) outputs an analog source signal to the data lines (D1 to Dm) in response to a data control signal (DCS: Data Control Signal) transmitted from the timing controller (140).

[0052] The data driving unit (130) may be placed on one side of the display panel (110), for example, on the upper side, but in some cases, it may be placed on both one side and the other side of the display panel (110), for example, on both the upper side and the lower side, facing each other.

[0053] The data driver (130) may be formed in the form of a tape carrier package in which a source driver IC is mounted, but is not necessarily limited thereto. For example, the source driver IC may be mounted in the bezel area of ​​the display panel (110), which will be described later. A detailed description thereof will be provided later.

[0054] In one embodiment, the data driver (130) may include a plurality of source driver ICs (not shown) that convert a digital image signal transmitted from a timing controller (140) into an analog source signal and output it to a display panel (110).

[0055] The timing controller (140) can receive various timing signals including a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), a data enable (DE) signal, a clock signal (CLK), etc. from the host system (150) and generate a data control signal (DCS) for controlling the data driver (130) and a gate control signal (GCS) for controlling the gate driver (120). In addition, the timing controller (140) can receive an image signal (RGB) from the host system (150) and convert it into an image signal (RGB') in a form that can be processed by the data driver (130) and output it.

[0056] The data control signal (DCS) may include a source start pulse (SSP), a source sampling clock (SSC), and a source output enable signal (SOE), and the gate control signal (GCS) may include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE).

[0057] Although FIG. 1 illustrates that the timing controller (140) and the data driver (130) are arranged separately, this is not necessarily limited. For example, the timing controller (140) and the data driver (130) may be integrated into a single driver IC or driver chip. The driver IC in which the timing controller (140) and the data driver (130) are integrated may be mounted in the bezel area of ​​the display panel (110), which will be described later. A detailed description thereof will be provided later.

[0058] The host system (150) may be implemented as any one of a navigation system, a set-top box, a DVD player, a Blu-ray player, a personal computer (PC), a home theater system, a broadcast receiver, and a phone system.

[0059] The host system (150) can include a system on chip (SoC) with a built-in scaler to convert digital image data (RGB) of an input image into a format suitable for display on a display panel (110). The host system (150) can transmit digital image data (RGB) and timing signals to a timing controller (140).

[0060] In Fig. 2, the data driving unit (130) is illustrated as being integrated with the timing controller (140) into a single driver IC, but this is not limited thereto. In some cases, they may be arranged separately as described in Fig. 1.

[0061] In addition, although one driver IC is shown to be placed in the bezel area (112) of the display panel (110), it is not limited thereto, and depending on the size of the display panel (110), one or more driver ICs may be placed in the bezel area (112) of the display panel (110) described later.

[0062] Referring to FIG. 2, a display panel (110) according to one embodiment of the present invention may have an active area (111) and a bezel area (112).

[0063] The active area (111) may be a space where a plurality of data lines (D1 to Dm) and a plurality of gate lines (G1 to Gn) intersect, and where display elements are installed at the intersections. An image may be displayed in the active area (111) through various signals supplied to the plurality of data lines (D1 to Dm) and the plurality of gate lines (G1 to Gn).

[0064] The bezel area (112) may be formed to surround all outer edges of the active area (111) or adjacent to some outer edges. The bezel area (112) may be provided with a timing controller (140), a data driver (130), a gate driver (140), and various signal lines (e.g., data lines (D1 to Dm) and gate lines (G1 to Gn)) connected thereto.

[0065] It is desirable to form the bezel area (112) to be narrow because it is not an area where an image is displayed.

[0066] In addition, since the bezel area (112) is typically formed of glass, a configuration in which a driver IC is placed in the bezel area (112) may be a COG (Chip On the Glass) method. This COG method is clearly distinguished from the COF (Chip On the Film) method in which connection wiring is formed on a base film.

[0067] The above-described bezel area (112) may include a first bezel area (112a) and a second bezel area (112b).

[0068] The first bezel area (112a) may be an area formed between the upper edge of the data driving unit (130) facing the active area (111) and the active area (111). The first bezel area (112a) may be formed to surround the outer edge of the active area (111) while having a predetermined width (W1).

[0069] The first bezel area (112a) is an area between the active area (111) and the upper side of the data driver (130), where various signal lines (e.g., data lines and gate lines) can be mounted or arranged.

[0070] The second bezel area (112b) may be an area formed further away from the active area (111) than the first bezel area (112a). The second bezel area (112b) may be formed to surround the outer edge of the first bezel area (112a) while having a predetermined width (W2).

[0071] The second bezel area (112b) may be an area where a data driver (130) is placed. In some cases, a gate driver (140) or a timing controller (140) may be placed in the second bezel area (112b).

[0072] In addition, the width (W1) of the first bezel area (112a) where the data lines (D1 to Dm) are arranged may be formed to be relatively narrower than the width (W2) of the second bezel area (112b) where the data driver (130) is arranged. Accordingly, the width or width of the entire bezel area (112) may be narrowed.

[0073] FIG. 3 is a diagram illustrating a bump terminal and a data driving unit including the same according to an embodiment of the present invention. FIG. 4a and FIG. 4b are diagrams illustrating a bump terminal according to an embodiment of the present invention.

[0074] Referring to FIG. 3, the data driving unit (130) may have an upper side (130a) positioned facing the active area (111), a lower side (130b) positioned opposite the upper side (130a), and a left side (130c) and a right side (130d) connecting the upper side (130a) and the lower side (130b).

[0075] For example, the data driving unit (130) can be formed in a rectangular shape with the upper side (130a) and the lower side (130b) as long sides and the left side (130c) and the right side (130d) as short sides.

[0076] However, the shape of the data drive unit (130) is not limited to this, and may be a substantially rectangular shape with rounded corners, a substantially rectangular shape (octagonal shape) with cut corners, or other polygonal shape.

[0077] The left and right short sides (left side (130c), right side (130d)) of the above-described data driving unit (130) may be relatively shorter than the upper and lower long sides (upper side (130a), lower side (130b)).

[0078] In addition, the data driving unit (130) may include at least one first bump terminal (31) electrically connected to the data lines (D1 to Dm) and a second bump terminal (32) formed to maintain a width between the data driving unit (130) and the display panel (110).

[0079] For example, the first bump terminal (31) may be positioned between the upper side (130a) of the data driving unit (130) and the lower side (130b) of the data driving unit (130) located opposite the upper side (130a) of the data driving unit (130). Here, the first bump terminal (31) may be referred to as a connection terminal or a connection part.

[0080] The second bump terminal (32) may be arranged between the first bump terminal (31) and the upper side (130a) of the data driving unit. Alternatively, the second bump terminal (32) may be arranged between the first bump terminal (31) and the lower side (130b) of the data driving unit (130).

[0081] Here, the second bump terminal (32) may be referred to as a non-connected terminal or dummy portion.

[0082] As described above, by placing the second bump terminal (32) between the first bump terminal (31) and the upper side (130a) of the data driving unit (130), the resistance change occurring at the edge of the data driving unit (130) can be reduced, thereby maintaining the electrical characteristics constant.

[0083] For example, in the conventional case where the first bump terminal (31) is directly arranged on the upper side of the data driving unit without the second bump terminal (32), it may be difficult to maintain constant electrical characteristics due to the vulnerability to resistance changes occurring at the edge of the data driving unit. However, as in the present invention, by arranging the second bump terminal (32) between the first bump terminal (31) and the upper side (130a) of the data driving unit (130), the resistance changes occurring at the edge of the data driving unit (130) can be reduced, thereby maintaining constant electrical characteristics.

[0084] In addition, since the second bump terminal (32) is arranged between the first bump terminal (31) and the upper side (130a) of the data driving unit (130), it is possible to reduce deformation or damage that may occur in the manufacturing process of the data driving unit (130), and to maintain the wiring density uniformly to satisfy the design rules or to satisfy the constraints of the manufacturing process, thereby increasing the manufacturing yield of the data driving unit (130).

[0085] Referring to FIG. 4a, the first bump terminal (31) may include a pad (31a) that electrically connects a plurality of data lines (D1 to Dm) and a data driver (130).

[0086] The pad (31a) is arranged to penetrate the protective layer (135) of the data driving unit (130) and can be electrically connected to the first bump terminal (31) and the driving circuit of the data driving unit (130). Accordingly, the pad (31a) can supply an analog source signal generated in the data driving unit (130) to the data lines (D1 to Dm) in response to a data control signal (DCS: Data Control Signal) transmitted from the timing controller (140) through the first bump terminal (31).

[0087] The second bump terminal (32) does not include a pad (31a). This is because the second bump terminal (32) does not need to electrically connect a plurality of data lines (D1 to Dm) and the data driver (130).

[0088] Accordingly, the second bump terminal (32) can be placed on the surface of the protective layer (135) of the data driving unit (130).

[0089] Referring to FIG. 4b, the thickness (h2) of the second bump terminal (32) can be formed to be equal to or thicker than the thickness (h1) of the first bump terminal (31).

[0090] The thickness (h2) of the second bump terminal (32) may be formed to be equal to or thicker than the thickness (h1) of the first bump terminal (31). The thickness (h2) of the second bump terminal (32) may be substantially equal to the sum of the thickness (h1) of the first bump terminal (31) and the thickness of the pad (31a).

[0091] In this way, by forming the thickness (h2) of the second bump terminal (32) to be equal to or thicker than the thickness (h1) of the first bump terminal (31), the uneven portion of the surface of the data drive unit (130) before and after the manufacturing process can be minimized, making it easier to flatten.

[0092] FIG. 5a and FIG. 5b are diagrams for explaining a bump terminal according to another embodiment of the present invention.

[0093] Fig. 5a shows an enlarged view of a data driving unit (130) in which a first bump terminal (31) and a second bump terminal (32) are arranged, and Fig. 5b shows a cross-section of the enlarged view.

[0094] Referring to FIGS. 5a and 5b, the second bump terminal (32) is disposed on the surface of the protective layer (135) of the data driving unit (130), but is not electrically connected to the data driving unit (130).

[0095] Accordingly, the second bump terminal (32) can form a path (SL) of a signal line other than the data lines (D1 to Dm). For example, the second bump terminal (32) can form a power (VDD) line path or a ground (GND) line path.

[0096] The data driving unit (130) placed in the second bezel area (112) forms a path (SL) of another signal line using the second bump terminal (32), thereby increasing the degree of design freedom for the line path.

[0097] FIG. 6 is a diagram for explaining a wiring method of a data line according to an embodiment of the present invention.

[0098] Referring to FIG. 6, the active region (111) according to an embodiment of the present invention may include a first active region (11a) to a third active region (11c).

[0099] The first active area (11a) may be arranged on one side of the display panel (110). The first active area (11a) may be arranged on the left side of one side of the display panel (110).

[0100] The second active area (11b) may be arranged on the other side of the display panel (110). The second active area (11b) may be arranged on the right side of the other side of the display panel (110).

[0101] The third active region (11c) may be placed between the first active region (11a) and the second active region (11b). The third active region (11c) may be placed in the central region of the display panel (110).

[0102] The first active region (11a) may be arranged on the left side of the third active region (11c), and the second active region (11b) may be arranged on the right side of the third active region (11c). For example, one side of the third active region (11c) may be in contact with the other side of the first active region (11a), and one side of the second active region (11b) may be in contact with the other side of the third active region (11c).

[0103] Each of the first active region (11a) to the third active region (11c) may have a predetermined length (L1 to L3) in the horizontal direction (X direction or first direction). The length (L3) of the third active region (11c) may be longer than or substantially equal to the length (L1) of the first active region (11a). The length (L1) of the first active region (11a) may be substantially equal to the length (L2) of the second active region (11b).

[0104] For example, the length (L3) of the third active region (11c) may be longer than the sum of the length (L1) of the first active region (11a) and the length (L2) of the second active region (11b).

[0105] The plurality of data lines (D1 to Dm) may include first group lines (DL1) to third group lines (DL3).

[0106] The first group line (DL1) may be routed from the first bump terminal (31) toward the second bezel area (112b) so as to reach the first active area (11a) through at least one of the first bezel area (112a) and the second bezel area (112b). The first group line (DL1) may be routed to a left area, which is one side of the display panel (110).

[0107] The second group line (DL2) may be routed from the first bump terminal (31) toward the second bezel area (112b) so as to pass through at least one of the first bezel area (112a) and the second bezel area (112b) and reach the second active area (11b). The second group line (DL2) may be routed to the right area, which is the other side of the display panel (110).

[0108] The third group line (DL3) can be routed from the first bump terminal (31) toward the first bezel area (112a) so as to pass through the first bezel area (112a) and reach the third active area (11c). The third group line (DL3) can be arranged in the central area of ​​the display panel (110).

[0109] The first army line (DL1) can be placed to the left of the third army line (DL3), and the second army line (DL2) can be placed to the right of the third army line (DL3).

[0110] The data driving unit (130) may include a first source region (13a) to a third source region (13c).

[0111] The first source region (13a) may be arranged on one side of the data driving unit (130) and may be electrically connected to the first group line (DL1). That is, the first source region (13a) including the first bump terminal (31) arranged on one side of the data driving unit (130) may be electrically connected to the first group line (DL1) wired in the left region, which is one side of the display panel (110).

[0112] The second source region (13b) is arranged on the other side of the data driving unit (130) and can be electrically connected to the second group line (DL2). That is, the second source region (13b) including the first bump terminal (31) arranged on the other side of the data driving unit (130) can be electrically connected to the second group line (DL2) wired to the right side region of the other side of the display panel (110).

[0113] The third source region (13c) is positioned between the first source region (13a) and the second source region (13b) and can be electrically connected to the third group line (DL3). That is, the third source region (13c) including the first bump terminal (31) positioned in the central region of the data driver (130) can be electrically connected to the third group line (DL3) wired in the central region of the display panel (110).

[0114] FIG. 7 is a diagram for explaining the connection relationship between the first group line and the first active area according to an embodiment of the present invention.

[0115] Referring to FIG. 7, the first group line (DL1) can be electrically connected to the first active region (11a) and the first source region (13a).

[0116] One side (DL1_OS) of the first group line (DL1) can be wired to be electrically connected to one side (13a_OS) of the first source region (13a) and electrically connected to the other side (11a_TOS) of the first active region (11a).

[0117] The other side (DL1_TOS) of the first group line (DL1) can be wired to be electrically connected to the other side (13a_TOS) of the first source region (13a) and electrically connected to one side (11a_OS) of the first active region (11a).

[0118] For example, when the input terminals (not shown) of the first active region (11a) are sequentially arranged in a first direction (+X direction) that proceeds from one side (11a_OS) of the first active region (11a) toward the other side (11a_TOS) of the first active region (11a), the first group line (DL1) electrically connected to the input terminals of the first active region (11a) can be arranged in a second direction (-X direction) that proceeds from the other side (DL1_TOS) of the first group line (DL1) toward the one side (DL1_OS) of the first group line (DL1).

[0119] At this time, the first bump terminal (31) arranged in the first source area (13a) can be arranged in the same second direction as the first group line (DL1).

[0120] By arranging in this way, the first group line (DL1) electrically connecting the first active region (11a) and the first source region (13a) can be prevented from crossing (contradiction) with each other.

[0121] FIG. 8 is a diagram for explaining the connection relationship between the second group line and the second active area according to an embodiment of the present invention.

[0122] Referring to FIG. 8, the second group line (DL2) can be electrically connected to the second active region (11b) and the second source region (13b).

[0123] One side (DL2_OS) of the second group line (DL2) can be wired to be electrically connected to one side (13b_OS) of the second source region (13b) and electrically connected to the other side (11b_TOS) of the second active region (11b).

[0124] The other side (DL2_TOS) of the second group line (DL2) can be wired to be electrically connected to the other side (13b_TOS) of the second source region (13b) and electrically connected to one side (11b_OS) of the second active region (11b).

[0125] For example, when the input terminals (not shown) of the second active region (11b) are sequentially arranged in a first direction (+X direction) that proceeds from one side (11b_OS) of the second active region (11b) toward the other side (11b_TOS) of the second active region (11b), the second group line (DL2) electrically connected to the input terminal of the second active region (11b) may be arranged in a second direction (-X direction) that proceeds from the other side (DL2_TOS) of the second group line (DL2) toward one side (DL2_OS) of the second group line (DL2).

[0126] At this time, the first bump terminal (31) arranged in the second source area (13b) can be arranged in the same second direction as the second group line (DL2).

[0127] By arranging in this way, the second group line (DL2) electrically connecting the second active region (11b) and the second source region (13b) can be prevented from crossing (contradiction) with each other.

[0128] FIG. 9 is a diagram for explaining the connection relationship between the third group line and the third active area according to an embodiment of the present invention.

[0129] Referring to FIG. 9, the third group line (DL3) can be electrically connected to the third active region (11c) and the third source region (13c).

[0130] One side (DL3_OS) of the third group line (DL3) can be wired to be electrically connected to one side (13c_OS) of the third source region (13c) and electrically connected to one side (11c_OS) of the third active region (11c).

[0131] The other side (DL3_TOS) of the third group line (DL3) can be wired to be electrically connected to the other side (13c_TOS) of the third source region (13c) and electrically connected to the other side (11c_TOS) of the third active region (11c).

[0132] For example, when the input terminals (not shown) of the third active region (11c) are sequentially arranged in a first direction (+X direction) from one side (11c_OS) of the third active region (11c) toward the other side (11c_TOS) of the third active region (11c), the third group line (DL3) electrically connected to the input terminal of the third active region (11c) may be arranged in the first direction (+X direction). At this time, the first bump terminal (31) arranged in the third source region (13c) may be arranged in the same first direction (+X direction) as the third group line (DL3).

[0133] Fig. 10 is a diagram for explaining a display panel using a conventional wiring method and a display panel using a wiring method of the present invention.

[0134] As shown in Fig. 10, according to the wiring method of the present invention, the size of the bezel area (112) can be narrowed compared to the conventional wiring method.

[0135] Since the content of the specification described in the problem to be solved, the means for solving the problem, and the effect described above does not specify the essential features of the claim, the scope of the claim is not limited by the matters described in the content of the specification.

[0136] Although the embodiments have been described in more detail with reference to the attached drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be implemented without departing from the technical spirit of the present invention. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but rather to explain it, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive.

[0137] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. The present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. The embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined solely by the scope of the claims.

[0138] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the details depicted in the drawings. Throughout the specification, the same reference numerals designate substantially the same components. Furthermore, in describing the present invention, detailed descriptions of related known technologies will be omitted if they are deemed to unnecessarily obscure the gist of the present invention.

[0139] In the specification, when “comprises,” “includes,” “has,” and “consists of,” other parts may be added unless “only” is used. When a component is expressed in the singular, it may be interpreted as plural unless otherwise explicitly stated.

[0140] When interpreting a component, it is interpreted as including the error range even if there is no separate explicit description.

[0141] When the positional relationship and interconnectedness between two components are described as ‘on’, ‘above’, ‘below’, ‘next to’, ‘connect, couple’, crossing, intersecting, etc., one or more other components may be interposed between the components unless there is a mention of ‘directly’ or ‘directly’.

[0142] When the temporal order is explained with phrases such as ‘after’, ‘following’, ‘next to’, or ‘before’, it may not be continuous on the time axis unless ‘right away’ or ‘directly’ is used.

[0143] To distinguish components, the ordinal numbers 1, 2, etc. may be used before the names of components; however, these ordinal numbers or names of components do not limit their function or structure. For convenience of explanation, the ordinal numbers preceding the names of the same components may differ between embodiments.

[0144] The following embodiments may be partially or fully combined or combined with one another, enabling various technically feasible interconnections and operations. Each embodiment may be implemented independently of the other, or may be implemented together in a related manner.

[0145] Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings.

[0146] Fig. 1 is a drawing showing a display device according to an embodiment of the present invention. Fig. 2 is a drawing showing in detail a display panel and a data driver according to an embodiment of the present invention.

[0147] Referring to FIG. 1, the display device (100) includes a display panel (110), a gate driver (120), a data driver (130), and a timing controller (140), and may further include a host system (not shown) that supplies various timing signals to the timing controller (140) of the display device.

[0148] The display panel (110) may include a plurality of gate lines (G1 to Gn) that are arranged crosswise to define a plurality of pixel areas, a plurality of data lines (D1 to Dm), and pixels (P) provided in each of the plurality of pixel areas.

[0149] A thin film transistor (TFT) can supply a source signal supplied through a data line (D1 to Dm) to a pixel in response to a scan pulse supplied through a gate line (G1 to Gn).

[0150] The gate driver (120) may include a shift register that sequentially generates scan pulses, i.e., gate high pulses, according to a gate control signal (GCS). In response to this scan pulse, a thin film transistor (TFT) may be turned on.

[0151] The gate driver (120) may be placed on one side of the display panel (110), for example, on the left side, as shown, but may also be placed on both one side and the other side of the display panel (110), for example, on both the left and right sides, facing each other, in some cases.

[0152] The gate driver (120) may include a plurality of gate driver ICs (Gate Driver Integrated Circuits, not shown). The gate driver (120) may be formed in the form of a tape carrier package in which the gate driver IC is mounted, but is not necessarily limited thereto, and the gate driver IC may be directly mounted on the display panel (110). For example, the gate driver IC may be mounted in the bezel area of ​​the display panel (110), which will be described later.

[0153] The data driving unit (130) can convert a digital image signal transmitted from the timing controller (140) into an analog source signal and output it to the display panel (110). Specifically, the data driving unit (130) outputs an analog source signal to the data lines (D1 to Dm) in response to a data control signal (DCS: Data Control Signal) transmitted from the timing controller (140).

[0154] The data driving unit (130) may be placed on one side of the display panel (110), for example, on the upper side, but in some cases, it may be placed on both one side and the other side of the display panel (110), for example, on both the upper side and the lower side, facing each other.

[0155] The data driver (130) may be formed in the form of a tape carrier package in which a source driver IC is mounted, but is not necessarily limited thereto. For example, the source driver IC may be mounted in the bezel area of ​​the display panel (110), which will be described later. A detailed description thereof will be provided later.

[0156] In one embodiment, the data driver (130) may include a plurality of source driver ICs (not shown) that convert a digital image signal transmitted from a timing controller (140) into an analog source signal and output it to a display panel (110).

[0157] The timing controller (140) can receive various timing signals including a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), a data enable (DE) signal, a clock signal (CLK), etc. from the host system (150) and generate a data control signal (DCS) for controlling the data driver (130) and a gate control signal (GCS) for controlling the gate driver (120). In addition, the timing controller (140) can receive an image signal (RGB) from the host system (150) and convert it into an image signal (RGB') in a form that can be processed by the data driver (130) and output it.

[0158] The data control signal (DCS) may include a source start pulse (SSP), a source sampling clock (SSC), and a source output enable signal (SOE), and the gate control signal (GCS) may include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE).

[0159] Although FIG. 1 illustrates that the timing controller (140) and the data driver (130) are arranged separately, this is not necessarily limited. For example, the timing controller (140) and the data driver (130) may be integrated into a single driver IC or driver chip. The driver IC in which the timing controller (140) and the data driver (130) are integrated may be mounted in the bezel area of ​​the display panel (110), which will be described later. A detailed description thereof will be provided later.

[0160] The host system (150) may be implemented as any one of a navigation system, a set-top box, a DVD player, a Blu-ray player, a personal computer (PC), a home theater system, a broadcast receiver, and a phone system.

[0161] The host system (150) can include a system on chip (SoC) with a built-in scaler to convert digital image data (RGB) of an input image into a format suitable for display on a display panel (110). The host system (150) can transmit digital image data (RGB) and timing signals to a timing controller (140).

[0162] In Fig. 2, the data driving unit (130) is illustrated as being integrated with the timing controller (140) into a single driver IC, but this is not limited thereto. In some cases, they may be arranged separately as described in Fig. 1.

[0163] In addition, although one driver IC is shown to be placed in the bezel area (112) of the display panel (110), it is not limited thereto, and depending on the size of the display panel (110), one or more driver ICs may be placed in the bezel area (112) of the display panel (110) described later.

[0164] Referring to FIG. 2, a display panel (110) according to one embodiment of the present invention may have an active area (111) and a bezel area (112).

[0165] The active area (111) may be a space where a plurality of data lines (D1 to Dm) and a plurality of gate lines (G1 to Gn) intersect, and where display elements are installed at the intersections. An image may be displayed in the active area (111) through various signals supplied to the plurality of data lines (D1 to Dm) and the plurality of gate lines (G1 to Gn).

[0166] The bezel area (112) may be formed to surround all outer edges of the active area (111) or adjacent to some outer edges. The bezel area (112) may be provided with a timing controller (140), a data driver (130), a gate driver (140), and various signal lines (e.g., data lines (D1 to Dm) and gate lines (G1 to Gn)) connected thereto.

[0167] It is desirable to form the bezel area (112) to be narrow because it is not an area where an image is displayed.

[0168] In addition, since the bezel area (112) is typically formed of glass, a configuration in which a driver IC is placed in the bezel area (112) may be a COG (Chip On the Glass) method. This COG method is clearly distinguished from the COF (Chip On the Film) method in which connection wiring is formed on a base film.

[0169] The above-described bezel area (112) may include a first bezel area (112a) and a second bezel area (112b).

[0170] The first bezel area (112a) may be an area formed between the upper edge of the data driving unit (130) facing the active area (111) and the active area (111). The first bezel area (112a) may be formed to surround the outer edge of the active area (111) while having a predetermined width (W1).

[0171] The first bezel area (112a) is an area between the active area (111) and the upper side of the data driver (130), where various signal lines (e.g., data lines and gate lines) can be mounted or arranged.

[0172] The second bezel area (112b) may be an area formed further away from the active area (111) than the first bezel area (112a). The second bezel area (112b) may be formed to surround the outer edge of the first bezel area (112a) while having a predetermined width (W2).

[0173] The second bezel area (112b) may be an area where a data driver (130) is placed. In some cases, a gate driver (140) or a timing controller (140) may be placed in the second bezel area (112b).

[0174] In addition, the width (W1) of the first bezel area (112a) where the data lines (D1 to Dm) are arranged may be formed to be relatively narrower than the width (W2) of the second bezel area (112b) where the data driver (130) is arranged. Accordingly, the width or width of the entire bezel area (112) may be narrowed.

[0175] FIG. 3 is a diagram illustrating a bump terminal and a data driving unit including the same according to an embodiment of the present invention. FIG. 4a and FIG. 4b are diagrams illustrating a bump terminal according to an embodiment of the present invention.

[0176] Referring to FIG. 3, the data driving unit (130) may have an upper side (130a) positioned facing the active area (111), a lower side (130b) positioned opposite the upper side (130a), and a left side (130c) and a right side (130d) connecting the upper side (130a) and the lower side (130b).

[0177] For example, the data driving unit (130) can be formed in a rectangular shape with the upper side (130a) and the lower side (130b) as long sides and the left side (130c) and the right side (130d) as short sides.

[0178] However, the shape of the data drive unit (130) is not limited to this, and may be a substantially rectangular shape with rounded corners, a substantially rectangular shape (octagonal shape) with cut corners, or other polygonal shape.

[0179] The left and right short sides (left side (130c), right side (130d)) of the above-described data driving unit (130) may be relatively shorter than the upper and lower long sides (upper side (130a), lower side (130b)).

[0180] In addition, the data driving unit (130) may include at least one first bump terminal (31) electrically connected to the data lines (D1 to Dm) and a second bump terminal (32) formed to maintain a width between the data driving unit (130) and the display panel (110).

[0181] For example, the first bump terminal (31) may be positioned between the upper side (130a) of the data driving unit (130) and the lower side (130b) of the data driving unit (130) located opposite the upper side (130a) of the data driving unit (130). Here, the first bump terminal (31) may be referred to as a connection terminal or a connection part.

[0182] The second bump terminal (32) may be arranged between the first bump terminal (31) and the upper side (130a) of the data driving unit. Alternatively, the second bump terminal (32) may be arranged between the first bump terminal (31) and the lower side (130b) of the data driving unit (130).

[0183] Here, the second bump terminal (32) may be referred to as a non-connected terminal or dummy portion.

[0184] As described above, by placing the second bump terminal (32) between the first bump terminal (31) and the upper side (130a) of the data driving unit (130), it is possible to compensate for electrical characteristic changes occurring at the edge of the data driving unit (130).

[0185] For example, in the conventional case where the first bump terminal (31) is directly arranged on the upper side of the data driving unit without the second bump terminal (32), it may be difficult to maintain constant electrical characteristics due to the vulnerability to resistance changes occurring at the edge of the data driving unit. However, as in the present invention, by arranging the second bump terminal (32) between the first bump terminal (31) and the upper side (130a) of the data driving unit (130), the resistance changes occurring at the edge of the data driving unit (130) can be reduced, thereby maintaining constant electrical characteristics.

[0186] In addition, since the second bump terminal (32) is arranged between the first bump terminal (31) and the upper side (130a) of the data driving unit (130), it is possible to reduce deformation or damage that may occur in the manufacturing process of the data driving unit (130), and to maintain the wiring density uniformly to satisfy the design rules or to satisfy the constraints of the manufacturing process, thereby increasing the manufacturing yield of the data driving unit (130).

[0187] Referring to FIG. 4a, the first bump terminal (31) may include a pad (31a) that electrically connects a plurality of data lines (D1 to Dm) and a data driver (130).

[0188] The pad (31a) is arranged to penetrate the protective layer (135) of the data driving unit (130) and can be electrically connected to the first bump terminal (31) and the driving circuit of the data driving unit (130). Accordingly, the pad (31a) can supply an analog source signal generated in the data driving unit (130) to the data lines (D1 to Dm) in response to a data control signal (DCS: Data Control Signal) transmitted from the timing controller (140) through the first bump terminal (31).

[0189] The second bump terminal (32) does not include a pad (31a). This is because the second bump terminal (32) does not need to electrically connect a plurality of data lines (D1 to Dm) and the data driver (130).

[0190] Accordingly, the second bump terminal (32) can be placed on the surface of the protective layer (135) of the data driving unit (130).

[0191] Referring to FIG. 4b, the thickness (h2) of the second bump terminal (32) can be formed to be equal to or thicker than the thickness (h1) of the first bump terminal (31).

[0192] The thickness (h2) of the second bump terminal (32) may be formed to be equal to or thicker than the thickness (h1) of the first bump terminal (31). The thickness (h2) of the second bump terminal (32) may be substantially equal to the sum of the thickness (h1) of the first bump terminal (31) and the thickness of the pad (31a).

[0193] In this way, by forming the thickness (h2) of the second bump terminal (32) to be equal to or thicker than the thickness (h1) of the first bump terminal (31), the uneven portion of the surface of the data drive unit (130) before and after the manufacturing process can be minimized, making it easier to flatten.

[0194] FIG. 5a and FIG. 5b are diagrams for explaining a bump terminal according to another embodiment of the present invention.

[0195] Fig. 5a shows an enlarged view of a data driving unit (130) in which a first bump terminal (31) and a second bump terminal (32) are arranged, and Fig. 5b shows a cross-section of the enlarged view.

[0196] Referring to FIGS. 5a and 5b, the second bump terminal (32) is disposed on the surface of the protective layer (135) of the data driving unit (130), but is not electrically connected to the data driving unit (130).

[0197] Accordingly, the second bump terminal (32) can form a path (SL) of a signal line other than the data lines (D1 to Dm). For example, the second bump terminal (32) can form a power (VDD) line path or a ground (GND) line path.

[0198] The data driving unit (130) placed in the second bezel area (112) forms a path (SL) of another signal line using the second bump terminal (32), thereby increasing the degree of design freedom for the line path.

[0199] FIG. 6 is a diagram for explaining a wiring method of a data line according to an embodiment of the present invention.

[0200] Referring to FIG. 6, the active region (111) according to an embodiment of the present invention may include a first active region (11a) to a third active region (11c).

[0201] The first active area (11a) may be arranged on one side of the display panel (110). The first active area (11a) may be arranged on the left side of one side of the display panel (110).

[0202] The second active area (11b) may be arranged on the other side of the display panel (110). The second active area (11b) may be arranged on the right side of the other side of the display panel (110).

[0203] The third active region (11c) may be placed between the first active region (11a) and the second active region (11b). The third active region (11c) may be placed in the central region of the display panel (110).

[0204] The first active region (11a) may be arranged on the left side of the third active region (11c), and the second active region (11b) may be arranged on the right side of the third active region (11c). For example, one side of the third active region (11c) may be in contact with the other side of the first active region (11a), and one side of the second active region (11b) may be in contact with the other side of the third active region (11c).

[0205] Each of the first active region (11a) to the third active region (11c) may have a predetermined length (L1 to L3) in the horizontal direction (X direction or first direction). The length (L3) of the third active region (11c) may be longer than or substantially equal to the length (L1) of the first active region (11a). The length (L1) of the first active region (11a) may be substantially equal to the length (L2) of the second active region (11b).

[0206] For example, the length (L3) of the third active region (11c) may be longer than the sum of the length (L1) of the first active region (11a) and the length (L2) of the second active region (11b).

[0207] The plurality of data lines (D1 to Dm) may include first group lines (DL1) to third group lines (DL3).

[0208] The first group line (DL1) may be routed from the first bump terminal (31) toward the second bezel area (112b) so as to reach the first active area (11a) through at least one of the first bezel area (112a) and the second bezel area (112b). The first group line (DL1) may be routed to a left area, which is one side of the display panel (110).

[0209] The second group line (DL2) may be routed from the first bump terminal (31) toward the second bezel area (112b) so as to pass through at least one of the first bezel area (112a) and the second bezel area (112b) and reach the second active area (11b). The second group line (DL2) may be routed to the right area, which is the other side of the display panel (110).

[0210] The third group line (DL3) can be routed from the first bump terminal (31) toward the first bezel area (112a) so as to pass through the first bezel area (112a) and reach the third active area (11c). The third group line (DL3) can be arranged in the central area of ​​the display panel (110).

[0211] The first army line (DL1) can be placed to the left of the third army line (DL3), and the second army line (DL2) can be placed to the right of the third army line (DL3).

[0212] The data driving unit (130) may include a first source region (13a) to a third source region (13c).

[0213] The first source region (13a) may be arranged on one side of the data driving unit (130) and may be electrically connected to the first group line (DL1). That is, the first source region (13a) including the first bump terminal (31) arranged on one side of the data driving unit (130) may be electrically connected to the first group line (DL1) wired in the left region, which is one side of the display panel (110).

[0214] The second source region (13b) is arranged on the other side of the data driving unit (130) and can be electrically connected to the second group line (DL2). That is, the second source region (13b) including the first bump terminal (31) arranged on the other side of the data driving unit (130) can be electrically connected to the second group line (DL2) wired to the right side region of the other side of the display panel (110).

[0215] The third source region (13c) is positioned between the first source region (13a) and the second source region (13b) and can be electrically connected to the third group line (DL3). That is, the third source region (13c) including the first bump terminal (31) positioned in the central region of the data driver (130) can be electrically connected to the third group line (DL3) wired in the central region of the display panel (110).

[0216] FIG. 7 is a diagram for explaining the connection relationship between the first group line and the first active area according to an embodiment of the present invention.

[0217] Referring to FIG. 7, the first group line (DL1) can be electrically connected to the first active region (11a) and the first source region (13a).

[0218] One side (DL1_OS) of the first group line (DL1) can be wired to be electrically connected to one side (13a_OS) of the first source region (13a) and electrically connected to the other side (11a_TOS) of the first active region (11a).

[0219] The other side (DL1_TOS) of the first group line (DL1) can be wired to be electrically connected to the other side (13a_TOS) of the first source region (13a) and electrically connected to one side (11a_OS) of the first active region (11a).

[0220] For example, when the input terminals (not shown) of the first active region (11a) are sequentially arranged in a first direction (+X direction) that proceeds from one side (11a_OS) of the first active region (11a) toward the other side (11a_TOS) of the first active region (11a), the first group line (DL1) electrically connected to the input terminals of the first active region (11a) can be arranged in a second direction (-X direction) that proceeds from the other side (DL1_TOS) of the first group line (DL1) toward the one side (DL1_OS) of the first group line (DL1).

[0221] At this time, the first bump terminal (31) arranged in the first source area (13a) can be arranged in the same second direction as the first group line (DL1).

[0222] By arranging in this way, the first group line (DL1) electrically connecting the first active region (11a) and the first source region (13a) can be prevented from crossing (contradiction) with each other.

[0223] FIG. 8 is a diagram for explaining the connection relationship between the second group line and the second active area according to an embodiment of the present invention.

[0224] Referring to FIG. 8, the second group line (DL2) can be electrically connected to the second active region (11b) and the second source region (13b).

[0225] One side (DL2_OS) of the second group line (DL2) can be wired to be electrically connected to one side (13b_OS) of the second source region (13b) and electrically connected to the other side (11b_TOS) of the second active region (11b).

[0226] The other side (DL2_TOS) of the second group line (DL2) can be wired to be electrically connected to the other side (13b_TOS) of the second source region (13b) and electrically connected to one side (11b_OS) of the second active region (11b).

[0227] For example, when the input terminals (not shown) of the second active region (11b) are sequentially arranged in a first direction (+X direction) that proceeds from one side (11b_OS) of the second active region (11b) toward the other side (11b_TOS) of the second active region (11b), the second group line (DL2) electrically connected to the input terminal of the second active region (11b) may be arranged in a second direction (-X direction) that proceeds from the other side (DL2_TOS) of the second group line (DL2) toward one side (DL2_OS) of the second group line (DL2).

[0228] At this time, the first bump terminal (31) arranged in the second source area (13b) can be arranged in the same second direction as the second group line (DL2).

[0229] By arranging in this way, the second group line (DL2) electrically connecting the second active region (11b) and the second source region (13b) can be prevented from crossing (contradiction) with each other.

[0230] FIG. 9 is a diagram for explaining the connection relationship between the third group line and the third active area according to an embodiment of the present invention.

[0231] Referring to FIG. 9, the third group line (DL3) can be electrically connected to the third active region (11c) and the third source region (13c).

[0232] One side (DL3_OS) of the third group line (DL3) can be wired to be electrically connected to one side (13c_OS) of the third source region (13c) and electrically connected to one side (11c_OS) of the third active region (11c).

[0233] The other side (DL3_TOS) of the third group line (DL3) can be wired to be electrically connected to the other side (13c_TOS) of the third source region (13c) and electrically connected to the other side (11c_TOS) of the third active region (11c).

[0234] For example, when the input terminals (not shown) of the third active region (11c) are sequentially arranged in a first direction (+X direction) from one side (11c_OS) of the third active region (11c) toward the other side (11c_TOS) of the third active region (11c), the third group line (DL3) electrically connected to the input terminal of the third active region (11c) may be arranged in the first direction (+X direction). At this time, the first bump terminal (31) arranged in the third source region (13c) may be arranged in the same first direction (+X direction) as the third group line (DL3).

[0235] Fig. 10 is a diagram for explaining a display panel using a conventional wiring method and a display panel using a wiring method of the present invention.

[0236] As shown in Fig. 10, according to the wiring method of the present invention, the size of the bezel area (112) can be narrowed compared to the conventional wiring method.

[0237] Since the content of the specification described in the problem to be solved, the means for solving the problem, and the effect described above does not specify the essential features of the claim, the scope of the claim is not limited by the matters described in the content of the specification.

[0238] Although the embodiments have been described in more detail with reference to the attached drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be implemented without departing from the technical spirit of the present invention. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but rather to explain it, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive.

Claims

1. A display panel having an active area to be displayed and a bezel area arranged around the active area; and In a display device, a data driver is disposed in the bezel area and outputs an analog source signal to a plurality of data lines wired in the active area. The above bezel area is, A first bezel area formed between the upper side of the data driving unit facing the active area and the active area; and A second bezel area formed further apart from the active area than the first bezel area; The above data driving unit is, A first bump terminal disposed between the upper side of the data driving unit and the lower side of the data driving unit located opposite the upper side of the data driving unit; and A display device having a second bump terminal formed between the first bump terminal and the upper side of the data driving unit or between the first bump terminal and the lower side of the data driving unit.

2. In paragraph 1, The above first bump terminal, It is formed to be electrically connected to the above plurality of data lines, The above second bump terminal, A display device formed to maintain a width between the data driving unit and the display panel.

3. In paragraph 1, The thickness of the above second bump terminal is: A display device formed to have a thickness equal to or thicker than the first bump terminal.

4. In paragraph 1, The above first bump terminal, A display device including a pad electrically connecting the plurality of data lines and the data driver.

5. In paragraph 4, The above active area is, A first active area disposed on one side of the display panel; a second active area disposed on the other side of the display panel; and a third active region disposed between the first active region and the second active region; The above multiple data lines are, A first group line that is wired from the first bump terminal toward the second bezel area so as to reach the first active area through at least one of the first bezel area and the second bezel area; A second group line that is wired from the first bump terminal toward the second bezel area so as to pass through at least one of the first bezel area and the second bezel area to reach the second active area; and A display device comprising a third group line that is wired from the first bump terminal toward the first bezel area so as to pass through the first bezel area and reach the third active area.

6. In paragraph 4, The above data driving unit is, A first source region disposed on one side of the data driving unit and electrically connected to the first group line; A second source region disposed on the other side of the data driving unit and electrically connected to the second group line; and A display device comprising a third source region disposed between the first source region and the second source region and electrically connected to the third group line.

7. In paragraph 1, The first group line electrically connected to one side of the first active region is It is wired to be electrically connected to the other side of the first source area, The first group line electrically connected to the other side of the first active region is A display device wired to be electrically connected to one side of the first source area.

8. In paragraph 1, The second group line electrically connected to one side of the second active region, It is wired to be electrically connected to the other side of the second source area, The second group line electrically connected to the other side of the second active area is A display device wired to be electrically connected to one side of the second source area.

9. In paragraph 8, The third group line electrically connected to one side of the third active region is It is wired to be electrically connected to one side of the third source area, The third group line electrically connected to the other side of the third active area is A display device wired to be electrically connected to one side of the third source area.

10. In paragraph 7, When the input terminals of the first active region are sequentially arranged in a first direction (+X direction) that proceeds from one side of the first active region toward the other side of the first active region, The first group line electrically connected to the input terminal of the first active area, A display device arranged in a second direction (-X direction) that advances from the other side of the first group line toward one side of the first group line.

11. In paragraph 8, When the input terminals of the second active region are sequentially arranged in a first direction (+X direction) that proceeds from one side of the second active region toward the other side of the second active region, The second group line electrically connected to the input terminal of the second active area, A display device arranged in a second direction (-X direction) from the other side of the second group line toward one side of the second group line.

12. In paragraph 9, When the input terminals of the third active region are sequentially arranged in a first direction (+X direction) that proceeds from one side of the third active region toward the other side of the third active region, The third group line electrically connected to the input terminal of the third active area is A display device arranged in the first direction (+X direction) from one side of the third group line to the other side of the third group line.

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