Reclamation of hydrogen halides in dry development of photoresists

The method addresses the challenges of achieving small feature sizes and inefficient EUV photolithography by using a controlled amount of halogen-containing etchant in a plasma-free thermal process for dry development, optimizing results and reducing etchant usage.

WO2025064348A1PCT designated stage expired Publication Date: 2025-03-27LAM RES CORP
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Patent Information

Application Number
PCT/US2024/046887
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-19
Filing Date
2024-09-16
Publication Date
2025-03-27

AI Technical Summary

Technical Problem

Current photolithography processes face challenges with achieving small feature sizes due to the wavelength of light used, and EUV photolithographic processes suffer from low power output and inefficient absorption of EUV photons by thin resist layers.

Method used

The method involves providing a photopattemed metal oxide EUV resist on a semiconductor substrate and calculating a stoichiometric amount of a halogen-containing etchant to decompose the EUV-unexposed portions. The dry development process selectively removes the EUV-unexposed portions using a plasma-free thermal process with a controlled amount of halogen-containing etchant, optimizing results while reducing the etchant required per wafer.

Benefits of technology

This approach enhances the efficiency of EUV photoresist processes by optimizing dry development results, reducing the amount of etchant needed, and promoting the conservation and reuse of hydrogen halides, thereby improving the overall process efficiency and cost-effectiveness.

✦ Generated by Eureka AI based on patent content.

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Abstract

Methods and apparatuses for the utilization and / or recovery of a halogen-containing etchant in dry vapor phase development of metal oxide-based photoresists are provided. In particular, the methods specifically tailor a limited amount of etchant for dry development, supplied as a static amount. The etchant may be a hydrogen halide such as hydrogen bromide. Additionally, the methods and apparatuses facilitate recycling of etchants by techniques for capture, purification and re-use.
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Description

RECLAMATION OF HYDROGEN HALIDES IN DRY DEVELOPMENT OF PHOTORESISTSINCORPORATION BY REFERENCE

[0001] A PCT Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in its entirety and for all purposes.BACKGROUND

[0002] The fabrication of semiconductor devices such as integrated circuits is a multi-step process involving photolithography. In general, the process includes deposition of a material on a wafer and patterning the material through lithographic techniques to form structural features (e.g., transistors and circuitry) of the semiconductor device. The steps of a typical photolithography process include: preparing the substrate; applying a photoresist, such as by spin coating; exposing the photoresist to light in a desired pattern, causing the exposed areas of the photoresist to become more or less soluble in a developer solution; developing the photoresist pattern by applying a developer solution to remove either the exposed or the unexposed areas of the photoresist; and subsequent processing to create features on the areas of the substrate from which the photoresist has been removed, such as by etching or material deposition.

[0003] The evolution of semiconductor design has created the need and has been driven by the ability to create ever smaller features on semiconductor substrate materials. One challenge in manufacturing devices having such small features is the ability to reliably and reproducibly create photolithographic masks having sufficient resolution. Current photolithography processes typically use 193 nm ultraviolet (UV) light to expose a photoresist. The fact that the light has a wavelength significantly greater than the desired size of the features to be produced on the semiconductor substrate creates inherent issues. Achieving feature sizes smaller than the wavelength of the light requires use of complex resolution enhancement techniques such as multipatteming. Thus, there is significant interest and research towards developing photolithographic techniques using shorter wavelength light, such as extreme ultraviolet radiation (EUV), having a wavelength of from 10 nm to 15 nm, e.g., 13.5 nm.

[0004] EUV photolithographic processes can present challenges however, including low power output and inefficient absorption of EUV photons by thin resist layers. Accordingly, there remains a need for improved EUV photoresist processes that will produce materials having desired properties in a more efficient manner.

[0005] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.SUMMARY

[0006] The present disclosure relates to methods and apparatuses for the efficient utilization, recycling and / or recovery of halogen-containing etchants used for the dry vapor phase development of metal oxide-based photoresists. In particular, the methods specifically tailor and limit the amount of etchant reagent for dry development to a static amount, optimizing dry development results while substantially reducing the amount of etchant required per wafer. The etchant may be a hydrogen halide. With the methods, a continuous flow of hydrogen halide such as hydrogen bromide that consume an excess quantity of the etchant are avoided. The methods and apparatuses also promote conservation of hydrogen halide reagent by either recirculating or capturing excess reagent from dry development, which can then be purified and re-used. In particular, any excess of hydrogen halide can be trapped either upstream of a process chamber’s vacuum pump and then recirculated back to the process chamber for re-use or trapped downstream of the vacuum pump for further processing. The etchant may be hydrogen bromide, hydrogen chloride, trimethyl silyl bromide or trimethyl silyl chloride.

[0007] Accordingly, in a first aspect, the present disclosure encompasses a method of dry developing a semiconductor substrate. In some embodiments, the method includes providing a photopattemed metal oxide EUV resist on a substrate layer of a semiconductor substrate in a process chamber, the photopatterned metal oxide EUV resist including EUV-exposed portions and EUV-unexposed portions; calculating a stoichiometric amount of a halogen-containing etchant to decompose the EUV-unexposed portion of the photopattemed metal oxide EUV resist into water and a volatile metal halide; and dry developing the photopatterned metal oxide EUV resist by selectively removing the EUV-unexposed portions of the photopattemed metal oxide EUV resist by exposure to an amount of a halogen-containing etchant to form a resist hard mask from the EUV-exposed portion; where the amount of the halogen-containing etchant is less than 50 times of the stoichiometric amount calculated in step b); and wherein step c) is a plasma-free thermal process.

[0008] In some embodiments, the amount of the halogen-containing etchant is less than 10 timesthe stoichiometric amount.

[0009] In some embodiments, the amount of the halogen-containing etchant of step c) is supplied at a rate of about 300 seem to about 2,000 seem for about 1 to 15 seconds.

[0010] In some embodiments, the method also includes soaking the photopattemed metal oxide EUV resist in the amount of the halogen-containing etchant for about 1 to about 120 seconds.

[0011] In some embodiments, the process chamber includes a pedestal, sidewalls and a showerhead.

[0012] In some embodiments, the sidewalls and the showerhead are maintained at a first temperature; and the pedestal is maintained at a second temperature, where the first temperature is higher than the second temperature.

[0013] In some embodiments, the photopattemed metal oxide EUV resist is an organotin oxide.

[0014] In some embodiments, the halogen-containing etchant is a hydrogen halide.

[0015] In some embodiments, the hydrogen halide is hydrogen bromide or hydrogen chloride.

[0016] In some embodiments, the halogen-containing etchant is trimethyl silyl bromide or trimethyl silyl chloride.

[0017] In a second aspect, the present disclosure encompasses a method for recycling halogencontaining etchant from dry development of a resist. In some embodiments, the method includes providing a photopatterned metal oxide EUV resist on a substrate layer of a semiconductor substrate in a process chamber, the photopatterned metal oxide EUV resist including EUV- exposed portions and EUV-unexposed portions; dry developing the photopattemed metal oxide EUV resist by selectively removing the EUV-unexposed portions of the photopattemed metal oxide EUV resist by exposure to a halogen-containing etchant to form a resist hard mask from the EUV-exposed portion, whereby volatile byproducts and excess halogen-containing etchant are generated; removing the volatile byproducts and the excess halogen-containing etchant from the process chamber; purifying the excess halogen-containing etchant through condensation, absorption or a combination thereof to remove the volatile byproducts and reclaim the excess halogen-containing etchant, forming a reclaimed halogen-containing etchant; and returning the reclaimed halogen-containing etchant to the process chamber for reuse; and where step b) is a plasma-free thermal process.

[0018] In some embodiments, the volatile byproducts include water, a metal halide or a combination thereof.

[0019] In some embodiments, the photopattemed metal oxide EUV resist is an organotin oxide.

[0020] In some embodiments, the halogen-containing etchant is a hydrogen halide.

[0021] In some embodiments, the hydrogen halide is hydrogen bromide or hydrogen chloride.

[0022] In some embodiments, the halogen-containing etchant is trimethyl silyl chloride or trimethyl silyl bromide.

[0023] In some embodiments, exposure to a halogen-containing etchant of step b) is exposure to an amount of less than 50 times of a stoichiometric amount of a halogen-containing etchant calculated to decompose the EUV-unexposed portions of the photopatterned metal oxide EUV resist into water and a volatile metal halide.

[0024] In a third aspect, the present disclosure encompasses a method of reclaiming halogencontaining etchant from dry development of a resist. In some embodiments, the method includes providing a photopatterned metal oxide EUV resist on a substrate layer of a semiconductor substrate in a process chamber, the photopatterned metal oxide EUV resist including EUV- exposed portions and EUV-unexposed portions; dry developing the photopattemed metal oxide EUV resist by selectively removing the EUV-unexposed portions of the photopattemed metal oxide EUV resist by exposure to a halogen-containing etchant to form a resist hard mask from the EUV-exposed portion, whereby impure excess halogen-containing etchant is generated, where the impure excess halogen-containing etchant is a halogen-containing etchant contaminated with volatile byproducts; removing the impure excess halogen-containing etchant from the process chamber; optionally separating the volatile byproducts from the halogen-containing etchant by condensation, absorption or a combination thereof; and collecting the impure excess halogencontaining etchant through condensation; and where step b) is a plasma-free thermal process.

[0025] In some embodiments, the excess impure halogen-containing etchant collected in step e) is purified for re-use.

[0026] In some embodiments, the volatile byproducts include water, a metal halide or a combination thereof.

[0027] In some embodiments, the photopattemed metal oxide EUV resist is an organotin oxide.

[0028] In some embodiments, wherein the halogen-containing etchant is a hydrogen halide.

[0029] In some embodiments, the hydrogen halide is hydrogen bromide or hydrogen chloride.

[0030] In some embodiments, the halogen-containing etchant is trimethyl silyl chloride or trimethyl silyl bromide.

[0031] In some embodiments, exposure to a halogen-containing etchant of step b) is exposure to an amount less than 50 times of a stoichiometric amount of a halogen-containing etchant calculated to decompose the EUV-unexposed portions of the photopatterned metal oxide EUV resist into water and a volatile metal halide.

[0032] In a fourth aspect, the present disclosure encompasses a method for processing byproducts of dry development of a resist. In some embodiments, the method includes providing a photopatterned metal oxide EUV resist on a substrate layer of a semiconductor substrate in a process chamber operably linked to a vacuum pump, the photopattemed metal oxide EUV resist including EUV-exposed portions and EUV-unexposed portions; dry developing the photopattemed metal oxide EUV resist by selectively removing the EUV-unexposed portions of the photopatterned metal oxide EUV resist by exposure to a halogen-containing etchant to form a resist hard mask from the EUV-exposed portion, whereby volatile byproducts and excess halogencontaining etchant are generated and then expelled from the process chamber through an exhaust from the vacuum pump; and processing the exhaust from the vacuum pump to treat the volatile byproducts and excess halogen-containing etchant, forming neutralized byproducts and neutralized halogen-containing etchant; and where step b) is a plasma-free thermal process.

[0033] In some embodiments, step c) is exposing the exhaust to an alkaline spray treatment.

[0034] In some embodiments, the photopattemed metal oxide EUV resist is an organotin oxide.

[0035] In some embodiments, the halogen-containing etchant is a hydrogen halide.

[0036] In some embodiments, the hydrogen halide is hydrogen bromide or hydrogen chloride.

[0037] In some embodiments, the halogen-containing etchant is trimethyl silyl bromide or trimethyl silyl chloride.

[0038] In some embodiments, after step c), the neutralized halogen-containing etchant is converted to halogen-containing etchant for re-use in step b).

[0039] In some embodiments, exposure to a halogen-containing etchant of step b) is exposure to an amount less than 50 times of a stoichiometric amount of a halogen-containing etchant calculated to decompose the EUV-unexposed portions of the photopatterned metal oxide EUV resist into water and a volatile metal halide.

[0040] In a fifth aspect, the present disclosure encompasses an apparatus for recycling halogencontaining etchant during dry development of a resist. In some embodiments, the apparatus includes a process chamber with a substrate support, a gas recirculation inlet and a gas recirculation outlet; a halogen-containing etchant delivery line coupled to the process chamber; at least a first condenser and a second condenser, the first condenser and the second condenser each individually coupled to the process chamber, the first condenser and the second condenser comprising an inner water absorbent liner material and an outer temperature-adjustable jacket; a recirculation line configured to connect the first condenser, the second condenser, the gas recirculation inlet and the gas recirculation outlet; a gas agitation module connected to therecirculation line; a vacuum pump and a vacuum line coupled to the process chamber; and a controller configured with instructions for processing a semiconductor substrate, the instructions comprising code for: providing in the process chamber a photopattemed metal oxide EUV resist on a substrate; developing the photopatterned metal oxide EUV resist by selectively removing a portion of the resist by exposure to a halogen-containing etchant to form a resist mask; directing process gas and byproduct vapors from the process chamber to the first condenser or the second condenser; cooling the first condenser or the second condenser to trap water and form a purified halogen-containing etchant stream; and recirculating the purified halogen-containing etchant stream back into the process chamber through the recirculation line.

[0041] In some embodiments, the gas agitation module is a magnetically coupled turbofan.

[0042] In some embodiments, the first condenser is configured to receive process gas and byproduct vapors from the process chamber and wherein the first condenser is cooled.

[0043] In some embodiments, the first condenser is cooled to collect water and recycle hydrogen halide while the second condenser is heated for cleaning.

[0044] In some embodiments, the first condenser and the second condenser are operably linked to the vacuum pump.

[0045] In some embodiments, the first condenser and the second condenser are upstream of the vacuum pump.

[0046] In some embodiments, the inner water absorbent liner material is anhydrous aluminum oxide, silica gel, an aluminosilicate or a combination thereof.

[0047] In a sixth aspect, the present disclosure encompasses an apparatus for reclaiming halogen-containing etchant during dry development of a resist. In some embodiments, the apparatus includes a process chamber with a substrate support; a halogen-containing etchant delivery line coupled to the process chamber; a vacuum pump, the vacuum pump comprising a vacuum pump inlet line coupled to the process chamber and a vacuum pump outlet line for eliminating exhaust; at least one low temperature condenser coupled to the vacuum pump outlet line; and a controller configured with instructions for processing a semiconductor substrate, the instructions comprising code for: providing in the process chamber a photopattemed metal oxide EUV resist on a substrate; developing the photopattemed metal oxide EUV resist by selectively removing a portion of the resist by exposure to a halogen-containing etchant to form a resist mask; and directing exhaust from the process chamber from the vacuum pump outlet line to the low temperature condenser to collect excess halogen-containing etchant.

[0048] In some embodiments, the apparatus also includes a trap disposed between the vacuum pump and the low temperature condenser, wherein the trap is configured to collect liquid byproducts.

[0049] In a seventh aspect, the present disclosure encompasses an apparatus for processing byproducts of dry development of a resist. In some embodiments, the apparatus includes a process chamber with a substrate support; a halogen-containing etchant delivery line coupled to the process chamber; a vacuum pump, the vacuum pump comprising a vacuum pump inlet line coupled to the process chamber and a vacuum pump outlet line for eliminating exhaust; an abatement module coupled to the vacuum pump outlet line; and a controller configured with instructions for processing a semiconductor substrate, the instructions comprising code for: providing in the process chamber a photopatterned metal oxide EUV resist on a substrate; developing the photopattemed metal oxide EUV resist by selectively removing a portion of the resist by exposure to a halogen-containing etchant to form a resist mask; and directing exhaust from the process chamber from the vacuum pump outlet line to the abatement module to neutralize byproducts.

[0050] In some embodiments, the abatement module is an alkaline spray treatment system.

[0051] In some embodiments, the byproducts comprise halogen-containing etchant.

[0052] These and other aspects are described further below with reference to the drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0053] FIG. 1 presents a flow diagram of a conventional process for depositing, development, and treating a photoresist.

[0054] FIGS. 2A-2C are cross-sectional schematic illustrations of various processing stages including development and treatment of photoresist.

[0055] FIG. 3A presents scanning electron microscope (SEM) images of photoresists after dry development with hydrogen bromide in accordance with certain disclosed embodiments.

[0056] FIG. 3B presents scanning electron microscope (SEM) images of photoresists after dry development with trimethyl silyl chloride in accordance with certain disclosed embodiments.

[0057] FIG. 4A depicts a schematic illustration of an example system for recycling hydrogen halide from dry development in a process chamber and upstream of a vacuum pump in accordance with certain disclosed embodiments.

[0058] FIG. 4B depicts a schematic illustration of an example system for reclaiming hydrogenhalide from dry development in a process chamber and downstream of a vacuum pump in accordance with certain disclosed embodiments.

[0059] FIG. 5 depicts a schematic illustration of an example system for processing byproducts from dry development in a process chamber and downstream of a vacuum pump in accordance with certain disclosed embodiments.

[0060] FIG. 6 depicts a schematic illustration of an example process station for maintaining an environment that is suitable for performing photoresist development and other photoresist treatment operations in accordance with certain disclosed embodiments.

[0061] FIG. 7 depicts a schematic illustration of an example multi-station processing tool suitable for implementation of photoresist development and other photoresist treatment operations described herein in accordance with certain disclosed embodiments.

[0062] FIG. 8 shows a cross-sectional schematic view of an example inductively-coupled plasma apparatus for implementing certain embodiments and operations described herein in accordance with certain disclosed embodiments.

[0063] FIG. 9 depicts a semiconductor process cluster tool architecture with vacuum-integrated deposition and patterning modules that interface with a vacuum transfer module, suitable for implementations of processes described herein in accordance with certain disclosed embodiments.DETAILED DESCRIPTION

[0064] In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments.Definitions

[0065] By “alkyl” and the prefix “alk” is meant a branched or unbranched saturated hydrocarbon group of 1 to 24 carbon atoms, such as methyl (Me), ethyl (Et), n-propyl (n-Pr or nPr), isopropyl (i-Pr or iPr), cyclopropyl, n-butyl (n-Bu or nBu), isobutyl (i-Bu or iBu), s-butyl (s-Bu or sBu), t- butyl (t-Bu or tBu), cyclobutyl, n-pentyl, isopentyl, s-pentyl, neopentyl, hexyl, heptyl, octyl, nonyl, decyl, dodecyl, tetradecyl, hexadecyl, eicosyl, tetracosyl, and the like. The alkyl group can be cyclic (e.g., C3-24 cycloalkyl) or acyclic. The alkyl group can be branched or unbranched. The alkyl group can also be substituted or unsubstituted. For example, the alkyl group can includehaloalkyl, in which the alkyl group is substituted by one or more halo groups, as described herein. In another example, the alkyl group can be substituted with one, two, three or, in the case of alkyl groups of two carbons or more, four substituents independently selected from the group consisting of: (1) Ci-6 alkoxy (e.g., -O-Ak, wherein Ak is optionally substituted Ci-6 alkyl); (2) amino (e.g., -NRN1RN2, where each of RN1and RN2is, independently, H or optionally substituted alkyl, or RN1and RN2, taken together with the nitrogen atom to which each are attached, form a heterocyclyl group); (3) aryl; (4) arylalkoxy (e.g., -O-Lk-Ar, wherein Lk is a bivalent form of optionally substituted alkyl and Ar is optionally substituted aryl); (5) aryloyl (e.g., -C(O)-Ar, wherein Ar is optionally substituted aryl); (6) cyano (e.g., -CN); (7) carboxyaldehyde (e.g., -C(O)H); (8) carboxyl (e.g., -CO2H); (9) C3-8 cycloalkyl (e.g., a monovalent saturated or unsaturated non-aromatic cyclic C3-8 hydrocarbon group); (10) halo (e.g., F, Cl, Br, or I); (11) heterocyclyl (e.g., a 3-, 4-, 5-, 6- or 7-membered ring, unless otherwise specified, containing one, two, three, or four non-carbon heteroatoms, such as nitrogen, oxygen, phosphorous, sulfur, or halo); (12) heterocyclyloxy (e.g., -O-Het, wherein Het is heterocyclyl, as described herein); (13) heterocyclyl oyl (e.g., -C(O)-Het, wherein Het is heterocyclyl, as described herein); (14) hydroxyl (e.g., -OH); (15) N-protected amino; (16) nitro (e.g., -NO2); (17) oxo (e.g., =0); (18) -CO2RA, where RAis selected from the group consisting of (a) C1-6 alkyl, (b) C4-18 aryl, and (c) (C4-18 aryl) C1-6 alkyl (e.g., -Lk-Ar, wherein Lk is a bivalent form of optionally substituted alkyl group and Ar is optionally substituted aryl); (19) -C(0)NRBRc, where each of RBand Rcis, independently, selected from the group consisting of (a) hydrogen, (b) C1-6 alkyl, (c) C4-18 aryl, and (d) (C4-18 aryl) C1-6 alkyl (e.g., -Lk-Ar, wherein Lk is a bivalent form of optionally substituted alkyl group and Ar is optionally substituted aryl); and (20) -NRGRH, where each of RGand RHis, independently, selected from the group consisting of (a) hydrogen, (b) an N-protecting group, (c) C1-6 alkyl, (d) C2-6 alkenyl (e.g., optionally substituted alkyl having one or more double bonds), (e) C2-6 alkynyl (e.g., optionally substituted alkyl having one or more triple bonds), (f) C4-18 aryl, (g) (C4-18 aryl) C1-6 alkyl (e.g., Lk-Ar, wherein Lk is a bivalent form of optionally substituted alkyl group and Ar is optionally substituted aryl), (h) C3-8 cycloalkyl, and (i) (C3-8 cycloalkyl) C1-6 alkyl (e.g., -Lk-Cy, wherein Lk is a bivalent form of optionally substituted alkyl group and Cy is optionally substituted cycloalkyl, as described herein), wherein in one embodiment no two groups are bound to the nitrogen atom through a carbonyl group. The alkyl group can be a primary, secondary, or tertiary alkyl group substituted with one or more substituents (e.g., one or more halo or alkoxy). In some embodiments, the unsubstituted alkyl group is a C1-2, C1-3, C1-6, C1-12, C1-16, Cuis, C1-20, C1-24, C2- 3, C2-6, C2-12, C2-16, C2-18, C2-20, or C2-24 alkyl group.

[0066] The term “flow control hardware” generally represents components configured to place one or more chemical sources in fluid connection with a processing chamber. Flow control hardware can comprise one or more mass flow controllers and / or valves, for example. Example chemical sources include dielectric film precursor sources, halogen-containing precursor sources, reactant gas sources, and inert gas sources.

[0067] The term “forming a gas mixture” generally represents either of or both of mixing a plurality of gases before introducing the plurality of gases into the processing chamber, or mixing a plurality of gases in the processing chamber.

[0068] The term “inert gas” generally represents a gas phase material that does not react with other chemicals in a processing chamber during substrate processing. Example inert gases include helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe), as well as nitrogen (N2) in some processes.

[0069] The term “plasma” generally represents a gas comprising cations, free radicals and free electrons. The term "in-situ plasma” generally represents a plasma formed at a processing station in a processing chamber. The term “remote plasma” generally represents a plasma formed at a location away from a processing station in a processing chamber.

[0070] The term “plasma generator” generally represents a combination of components that can be used to form a plasma. Example components include a radiofrequency power source, an impedance matching network, and one or more electrodes.

[0071] The term “precursor” generally represents a chemical species that adsorbs to a substrate surface in a deposition process. The precursor is reacted with a reactant to convert the adsorbed precursor to a film layer.

[0072] The term “processing chamber” or “process chamber” generally represents an enclosure in which chemical and / or physical processes are performed on substrates. The pressure, substrate temperature and atmospheric composition within a processing chamber can be controllable to perform the chemical and / or physical processes.

[0073] The term “processing tool” may generally represent a machine comprising a processing chamber and other hardware configured to enable processing to be carried out in the processing chamber.

[0074] The term “processing station” generally represents a location in a processing chamber at which a substrate is positioned during processing.

[0075] The term “semiconductor substrate” as used herein refers to a substrate at any stage of semiconductor device fabrication containing a semiconductor material anywhere within its structure. It is understood that the semiconductor material in the semiconductor substrate does not need to be exposed. Semiconductor wafers having a plurality of layers of other materials (e.g., dielectrics) covering the semiconductor material, are examples of semiconductor substrates. The following detailed description assumes the disclosed implementations are implemented on a semiconductor wafer, such as on a 200 mm, 300 mm, or 450 mm semiconductor wafer. However, the disclosed implementations are not so limited. The work piece may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other work pieces that may take advantage of the disclosed implementations include various articles such as printed circuit boards and the like.

[0076] The implementations disclosed below describe deposition of a material on a substrate such as a wafer, substrate, or other work piece. The work piece may be of various shapes, sizes, and materials. In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially fabricated integrated circuit” are used interchangeably. One of ordinary skill in the art would understand that the term “partially fabricated integrated circuit” can refer to a silicon wafer during any of many stages of integrated circuit fabrication thereon. A wafer or substrate used in the semiconductor device industry typically has a diameter of 200 mm, or 300 mm, or 450 mm. Unless otherwise stated, the processing details recited herein (e.g., flow rates, power levels, etc.) are relevant for processing 300 mm diameter substrates, or for treating chambers that are configured to process 300 mm diameter substrates and can be scaled as appropriate for substrates or chambers of other sizes. In addition to semiconductor wafers, other work pieces that may be used implementations disclosed herein include various articles such as printed circuit boards and the like. The processes and apparatuses can be used in the fabrication of semiconductor devices, displays, LEDs, photovoltaic panels and the like.

[0077] As used herein, the term “photoresist” and derivatives thereof refer to a light-sensitive material used in processes such as photolithography, photoetching or photoengraving to form a patterned coating on a surface. Photoresist materials change solubility with respect to a developer solution when exposed to certain wavelengths of light. Photoresist layers may be composed of positive (exposed region becomes soluble) or negative (exposed region becomes insoluble) photoresist material.

[0078] For the purposes of this disclosure, “metal” used in this context should be understood to mean conductor with a maximum resistivity of 500 micro Ohm cm, including metals and conductive metal salts, in particular conductive metal nitrides, e.g., TiN.

[0079] As used herein, “metal oxide photoresist” or “metal oxide EUV resist” includes, but is not limited to a metalloid oxide photoresist, a metal oxide photoresist or an organometal oxide photoresist.

[0080] “ Tin oxide” is referred to herein as including any and all stoichiometric possibilities for SnxOy, including integer values of x and y and non-integer values of x and y. For example, “tin oxide” includes compounds having the formula SnOn, where 1 < n < 2, where n can be an integer or non-integer values. “Tin oxide” can include sub-stoichiometric compounds such as SnOi.s. “Tin oxide” also includes tin dioxide (SnCh or stannic oxide) and tin monoxide (SnO or stannous oxide). “Tin oxide” also includes both natural and synthetic variations and also includes any and all crystalline and molecular structures. “Tin oxide” also includes amorphous tin oxide.

[0081] As used herein, the phrase “at least one of A, B, and C” should be construed to mean a logical (A or B or C), using a non-exclusive logical “or”, and should not be construed to mean “at least one of A, at least one of B and at least one of C”.

[0082] As used herein, the term “about” is understood to account for minor increases and / or decreases beyond a recited value, which changes do not significantly impact the desired function of the parameter beyond the recited value(s). In some cases, “about” encompasses + / - 10% of any recited value. As used herein, this term modifies any recited value, range of values, or endpoints of one or more ranges.

[0083] As used herein, the terms “top,” “bottom,” “upper,” “lower,” “above,” and “below” are used to provide a relative relationship between structures. The use of these terms does not indicate or require that a particular structure must be located at a particular location in the apparatus.Introduction and Context

[0084] Thermal dry development processes employ a halogen-containing reagent such as hydrogen bromide (HBr), hydrogen chloride (HC1), chlorine (CI2), bromine (Br2), trimethylsilylchloride ((QTQsSiCl), or trimethylsilylbromide ((QTQsSiBr) to treat a metal oxidebased photoresist. The vapor etch of a metal oxide photoresist may utilize a large excess of hydrogen halogen-containing reagent to remove bridging oxide and hydroxides attached to tin (converting them to water) with formation of tin halides. When the halogen-containing reagent is HBr gas, an excess of more than 500 times the required amount may conventionally be utilized, which increases cost and the amount of chemical waste to be disposed of. Efficient dry development techniques whereby hydrogen halide containing reagents can be reclaimed and / or the amount of hydrogen halide-containing reagents can be reduced would be advantageous not only from a cost perspective, but also from an environmental perspective.Development of EUV Resist

[0085] According to various aspects of the present disclosure, a photopattemed metalcontaining photoresist is developed by exposure to hydrogen halide-containing chemistries. An EUV-sensitive metal or metal oxide-containing film, e.g., an organotin oxide, is disposed on a semiconductor substrate. Various potential metal-containing photoresists may, for example, include photoresists that include tin, tellurium, hafnium with an organic ligand attached thereto that is an alkyl group having from 1 to 12 carbon atoms. The EUV-sensitive metal or metal oxide-containing film is patterned directly by EUV exposure in vacuum ambient. A pattern is then developed to form a resist mask using a development chemistry. In some embodiments, the development chemistry is a dry development chemistry. In some embodiments, the dry development chemistry may include hydrogen chloride (HC1), hydrogen bromide (HBr), or trimethyl silyl halides (or mixtures of two or more thereof), usually mixed with an inert carrier gas such as argon (Ar), helium (He), or nitrogen (N2) (or mixtures of two or more thereof) and, in some instances, less than 5% of oxygen and / or hydrogen. Such a dry development chemistry, e.g., containing hydrogen halide donating gases such as those, for example, listed above, may be flowed across or over a wafer with a latent image (a photopatterned metal-containing photoresist) with the wafer being held to a temperature in the -40° to 40°C range after the wafer has been exposed to an EUV patterning operation. Such dry development techniques may be done in chamber pressure environments in approximately the 5 mTorr to 600 mTorr range while flowing a dry development chemistry, e.g., a hydrogen and halide dry development chemistry.

[0086] Once the metal-containing photoresist has been exposed to the desired lithographic pattern, e.g., in an EUV scanner or similar patterning equipment, the exposed wafer may be moved to a dry development chamber for performance of a dry development process in order to remove the unexposed areas thereof. In some implementations, the exposed wafer may be subjected to a post-exposure bake (PEB) — a thermal process that may cause cleaved metal bonds, e.g., tin bonds in a tin-based alkoxy resist, to convert to metal-oxygen, e.g., tin-oxygen, bonds to form a material that is stoichiometrically close to a metal-oxide, e.g., tin-oxide, in the exposed areas. The unexposed areas during such a PEB may retain an alkyl ligand in one of the exposed valences of the metal, e.g., in one of the four valences of tin. The PEB may be performed after the wafer has been exposed but prior to performance of the dry development process. Typical PEBs may include, for example, PEBs in which the wafer is heated to a temperature or temperatures between 130°C to 250°C for a period of time between 30 seconds to 240 seconds. In some instances, a PEB process may include the performance of multiple PEBs,e.g., an initial PEB such as that discussed above, followed by a second PEB in which the wafer may be heated to a temperature or temperatures between 200°C to 300°C in a controlled ambient environment for a period of time between 30 seconds and 240 seconds.

[0087] During the dry development process, a set of one or more dry development gases may be flowed across the exposed surface of the wafer. The dry development gases may be selected so as to selectively attack / etch either the exposed areas or the unexposed areas of the wafer. For example, a halide-containing chemistry, e.g., hydrogen bromide, may be used to selectively remove the unexposed areas of a photoresist, e.g., an organotin resist, as described above. Such a halide-containing chemistry may preferentially attack tin-oxygen moieties to which alkyl groups are still connected to the tin atom - i.e. the non-EUV exposed and modified areas. In contrast, the alkyl groups that may have existed in the exposed areas may have previously been driven out of those exposed regions during the exposure process and the halide-containing chemistry may therefore generally not attack (or minimally attack) the exposed regions. For example, in an organotin based resist, the development chemistry may cause the tin alkyl that may remain in the unexposed areas to be etched away, while the more tin oxide like moieties that may remain in the exposed regions may remain generally intact.

[0088] FIG. 1 presents a flow diagram of the steps of a conventional method for depositing, development, and treating a photoresist. At block 102 of the process 100, a layer of photoresist is deposited. This may be either a dry deposition process such as a vapor deposition process or a wet deposition process such as a spin-on deposition process. In one embodiment, a metalcontaining precursor is deposited as a solution by using a liquid-based spin-on technique. In another embodiment, a metal-containing precursor is deposited in vapor form by using a dry technique (e.g., chemical vapor deposition).

[0089] A photoresist film can be deposited on a substrate. Such a film can be deposited by using wet or dry deposition processes, in which a metal-containing precursor (e.g., a tin-containing precursor, such as any described herein) is provided in proximity to a substrate. In one embodiment, the metal-containing precursor is deposited as a solution by using a liquid-based spin-on technique. In another embodiment, the metal -containing precursor is deposited in vapor form by using a dry technique (e.g., chemical vapor deposition). While the present disclosure often shows the metal-containing precursor being a tin-containing precursor, other metal atoms can be employed.

[0090] The layers and films described herein may include an element (e.g., a metal atom or a non-metal atom) having a high photoabsorption cross-section, such as equal to or greater thanIxlO7cm2 / mol. Such elements can be provided by depositing one or more precursor(s) to provide the imaging layer.

[0091] In some embodiments, the film is a radiation-sensitive film (e.g., an EUV-sensitive film). This film, in turn, can serve as an EUV resist, as further described herein. In particular embodiments, the layer or film can include one or more ligands (e.g., EUV labile ligands) that can be removed, cleaved, or cross-linked by radiation (e.g., EUV or DUV radiation).

[0092] The precursor can provide a pattemable film that is sensitive to radiation (or a patterning radiation-sensitive film or a photopattemable film). Such radiation can include EUV radiation, DUV radiation, or UV radiation that is provided by irradiating through a patterned mask, thereby being a patterned radiation. The film itself can be altered by being exposed to such radiation, such that the film is radiation-sensitive or photosensitive. In particular embodiments, the precursor is an organometallic compound, which includes at least one metal center.

[0093] The precursor can have any useful number and type of ligand(s). In some embodiments, the ligand can be characterized by its ability to react in the presence of a counter-reactant, or in the presence of patterned radiation. For instance, the precursor can include a ligand that reacts with a counter-reactant, which can introduce linkages between metal centers (e.g., an -O- linkage). In another instance, the precursor can include a ligand that eliminates in the presence of patterned radiation.

[0094] The precursor may include a metal or a metalloid or an atom with a high patterning radiation-absorption cross-section. In some embodiments, M is tin (Sn), bismuth (Bi), tellurium (Te), cesium (Cs), antimony (Sb), indium (In), molybdenum (Mo), hafnium (Hf), iodine (I), zirconium (Zr), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), zinc (Zn), silver (Ag), platinum (Pt), and lead (Pb).

[0095] In particular embodiments, the precursor includes tin. Non-limiting tin precursors include SnF2, SnEE, SnB , SnCE, SnE, tetramethyl tin (SnMe4), tetraethyl tin (SnEE), trimethyl tin chloride (SnMesCl), dimethyl tin dichloride (SnMe2Ch), methyl tin trichloride (SnMeCE), tetraallyltin, tetravinyl tin, hexaphenyl ditin (IV) (PhsSn-SnPhs, in which Ph is phenyl), dibutyldiphenyltin (SnBu2Ph2), trimethyl(phenyl) tin (SnMesPh), trimethyl(phenylethynyl) tin, tricyclohexyl tin hydride, tributyl tin hydride (SnBusH), dibutyltin diacetate (SnBu2(CEECOO)2), tin(II) acetylacetonate (Sn(acac)2), tributyltin ethoxide (SnBus(OEt)), dibutyltin dimethoxide (SnBu2(OMe)2), tributyltin methoxide (SnBus(OMe)), tin(IV) tert-butoxide (Sn(t-BuO)4), n- butyltin tributoxide (Sn( / / -Bu)( / -BuO)3), tetrakis(dimethylamino)tin (Sn(NMe2)4), tetrakis(ethylmethylamino)tin (Sn(NMeEt)4), tetrakis(diethylamino)tin(IV) (Sn(NEt2)4),(dimethylamino)trimethyl tin(IV) (Sn(Me)3(NMe2), Sn(z-Pr)(NMe2)3, Sn(zz-Bu)(NMe2)3, Sn(.s- Bu)(NMe2)3, Sn(z-Bu)(NMe2)3, Sn(LBu)(NMe2)3, Sn(LBu)2(NMe2)2, Sn(LBu)(NEt2)3, Sn(tbba), Sn(II) (l,3-bis(l,l-dimethylethyl)-4,5-dimethyl-(4 / ?,5 / ?)-l,3,2-diazastannolidin-2-ylidene), or bis[bis(trimethylsilyl)amino] tin (Sn[N(SiMe3)2]2).

[0096] Exemplary deposition techniques (e.g., for a film) include any described herein, such as ALD (e.g., thermal ALD and plasma-enhanced ALD), spin-coat deposition, PVD including PVD co-sputtering, CVD (e.g., PE-CVD or LP-CVD), sputter deposition, e-beam deposition including e-beam co-evaporation, etc., or a combination thereof, such as ALD with a CVD component, such as a discontinuous, ALD-like process in which precursors and counter-reactants are separated in either time or space.

[0097] Further description of precursors and methods for their deposition as EUV photoresist films applicable to this disclosure may be found in International Application No. PCT / US 19 / 31618, published as International Publication No. WO 2019 / 217749, filed May 9, 2019, and titled METHODS FOR MAKING EUV PATTERNABLE HARD MASKS. The thin films may include optional materials in addition to a precursor and a counter-reactant to modify the chemical or physical properties of the film, such as to modify the sensitivity of the film to EUV or enhancing etch resistance. Such optional materials may be introduced, such as by doping during vapor phase formation prior to deposition on the substrate, during deposition on the substrate, and / or after deposition of the film. In some embodiments, a gentle remote H2 plasma may be introduced so as to replace some Sn-L bonds with Sn-H, for example, which can increase reactivity of the resist under EUV. In other embodiments, CO2 may be introduced to replace some Sn-0 bonds with Sn-CCL bonds, which can be more resistant to wet development.

[0098] Various atoms present in the precursor and / or counter-reactant can be provided within a capping layer, which in turn is disposed on any useful layer or structure. The capping layer can be any useful thickness (e.g., any thickness described herein, including from about 0.1 nm to about 5 nm).

[0099] Furthermore, two or more different precursors can be employed within each layer (e.g., a film or a capping layer). For instance, two or more of any metal-containing precursors herein can be employed to form an alloy. Yet other exemplary EUV-sensitive materials, as well as processing methods and apparatuses, are described in U.S. Patent No. 9,996,004; International Patent Publication No. WO 2020 / 102085; and International Patent Publication No. WO 2019 / 217749, each of which is incorporated herein by reference in its entirety.

[0100] At block 104 of the process 100, the backside surface or bevel of the substrate can beoptionally cleaned, and / or an edge bead of the photoresist that was deposited in the prior step can be removed. Such cleaning or removing steps can be useful for removing particles that may be present after depositing a photoresist layer. The removing step can include processing the wafer with a wet metal oxide (MeOx) edge bead removal (EBR) step.

[0101] At block 106 of the process 100, a post-application bake (PAB) or a post-application treatment can be optionally performed. Such treatment can improve etch resistance of unexposed material to aqueous or non-aqueous solution. In one instance, such treatment can enhance the chemical composition difference (or contrast) between unexposed and exposed regions, thus the PAB operation is conducted. In another instance, such treatment can reduce the chemical composition difference (or contrast) between unexposed and exposed regions, thus the PAB operation is not conducted. In yet another instance, use of PAB removes residual moisture from the layer to form a hardened resist film. The PAB can involve some combination of thermal treatment, chemical exposure, and / or moisture to increase the EUV sensitivity of the film, thereby reducing the EUV dose to develop a pattern in the film. In particular embodiments, the PAB step is conducted at a temperature greater than about 100°C or at a temperature of from about 100°C to about 200°C or from about 100°C to about 250°C. In other embodiments, the PAB step is conducted at a temperature from about 190°C to about 350°C in the absence of an O-containing gas. In another instance, post-application treatment includes exposing the film to an inert gas or CO2, which can optionally include cooling or heating. Use of an inert gas can provide metal- oxygen-metal species, and use of CO2 can provide metal carbonate species within the film.

[0102] At block 108 of the process 100, the film is exposed to EUV radiation to develop a pattern. Generally, the EUV exposure causes a change in the chemical composition of the film, creating a contrast in etch selectivity that can be used to remove a portion of the film. Such a contrast can provide a positive tone resist. However, it will be understood that the EUV exposure can alternatively cause a contrast such that unexposed regions are selectively removed. Such a contrast can provide a negative tone resist, as described herein. EUV exposure can include, e.g., an exposure having a wavelength in the range of about 10 nm to about 20 nm in a vacuum ambient (e.g., about 13.5 nm in a vacuum ambient).

[0103] At block 110 of the process 100, a post-exposure bake (PEB) is performed on the exposed film, thereby further removing residual moisture, promoting chemical condensation within the film, or increasing contrast in etch selectivity of the exposed film; or post-treating the film in any useful manner. In one instance, such treatment can reduce the chemical composition difference (or contrast) between unexposed and exposed regions, thus the PEB operation is not conducted.

[0104] At block 112 of the process 100, the photoresist pattern is developed by way of positive tone development or negative tone development. In various embodiments of development, the unexposed regions are selectively removed (to provide a pattern within a negative tone resist). These steps may be wet processes using one or more developers or developing solutions, followed by an optional rinse operation (e.g., with deionized water or another solvent) or an optional dry operation (e.g., with air or under inert conditions with optional heat). In particular embodiments, the development step is a wet process applied to a tin-based film. In other embodiments, the development step is a dry process applied to a tin-based film. For example, the dry process includes a halide-containing chemistry.

[0105] After block 112, an after-development inspection may be performed. If needed, rework is performed by returning to repeat operation 102.

[0106] At block 114 of the process 100, the photoresist undergoes treatment prior to pattern transfer. The treatment may be a thermal treatment, plasma treatment, chemical treatment, selective deposition treatment, or a combination of the aforementioned treatments. Thermal treatment may expose the photoresist to an elevated temperature between about 200°C and about 300°C to reduce defectivity and LWR. Plasma treatment may expose the photoresist to plasma such as a direct (iri-situ) plasma or remote plasma in order to densify the photoresist and reduce LWR. Chemical treatment may expose the photoresist to reactive chemical species such as halide- based species (e.g., tungsten hexafluoride) or carbon-containing precursor (e.g., carbon monoxide, metal organic precursors) to improve etch resistance, reduce outgassing, and increase line CD. Selective deposition treatment may expose the photoresist to chemical precursors for selectively depositing a protective coating on the photoresist to reduce DtS, improve etch resistance, reduce outgassing, and increase line CD. Any one or more of the foregoing treatments are applied to the photoresist after development to improve the performance of the photoresist during pattern transfer.

[0107] At block 116 of the process 100, one or more substrate layers are etched using the photoresist mask for pattern transfer. Such substrate layers are underlying the photoresist mask and may be removable by lithographic etching. Pattern transfer etching may etch material to a desired depth to form a plurality of patterned features. In some embodiments, the one or more substrate layers may include amorphous carbon (a-C), amorphous silicon (a-Si), tin oxide (e.g., SnOx), silicon oxide (e.g., SiCh), silicon oxynitride (e.g., SiOxNy), silicon oxycarbide (e.g., SiOxCy), silicon nitride (e.g., SisN^, titanium oxide (e.g., TiCh), titanium nitride (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxide (e.g., WOS), hafnium oxide(e.g., HfCh), zirconium oxide (e.g., ZrCE), and aluminum oxide (e.g., AI2O3). Any defects or variations in CD in the photoresist mask are replicated in the material being patterned during pattern transfer etching. Additionally, poor etch resistance adversely impacts transfer of patterns to underlying substrate layers over the course of etching. Post-development treatment of the photoresist mask mitigates the foregoing issues to ensure successful pattern transfer during pattern transfer etching.

[0108] After pattern transfer, an after etch inspection may be performed. If needed, rework is performed by returning to repeat operation 102.

[0109] FIGS. 2A-2C show cross-sectional schematic illustrations providing an overview of the various processing stages including development and treatment of photoresist. As shown in FIG. 2A, a wafer 200 includes a substrate 202 and a substrate layer 204 to be etched. The patterning structure can include any useful substrate. For instance, an incoming wafer can be prepared with a substrate surface of a desired material, with the uppermost material being the layer into which the resist pattern is transferred. While the material selection may vary depending on integration, it is generally desired to select a material which can be etched with high selectivity to (i.e., much faster than) the EUV resist or imaging layer.

[0110] In some embodiments, the substrate is a hardmask which is used in lithographic etching of an underlying semiconductor material. The hardmask may comprise any of a variety of materials, including amorphous carbon (a-C), silicon oxide (e.g., SiOx, including SiCh), silicon oxynitride (e.g., SiOxNy), silicon oxycarbide (e.g., SiOxCy), silicon nitride (e.g., SisN^, titanium oxide (e.g., TiCh), titanium nitride (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxide (e.g., WOX), hafnium oxide (e.g., HfCh), zirconium oxide (e.g., ZrCE), and aluminum oxide (e.g., AI2O3). Suitable substrate materials can include various carbon-based films (e.g., ashable hardmask (AHM), silicon-based films (e.g., SiOx, SiCx, SiOxCy, SiOxNy, SiOxCyNz), a-Si:H, poly-Si, or SiN), or any other (generally sacrificial) film applied to facilitate the patterning process). In various embodiments, the layer may be from 1 nm to 100 nm thick, or from 2 nm to 10 nm thick.

[0111] In some embodiments, the substrate layer 204 includes an ashable hard mask such as CVD amorphous carbon spin-on carbon or other material, (e.g., silicon, silicon oxide, silicon nitride, silicon carbide, etc). In some embodiments, the substrate layer 204 may be a layer stack disposed on the substrate 202. The wafer 200 further includes a photopatterned metal -containing EUV resist film 206. For example, the photopatterned metal-containing EUV resist film 206 may be an organometal-containing layer disposed on the substrate layer 204 to be etched. Thephotopattemed metal-containing EUV resist film 206 may have a thickness between about 5 nm and about 50 nm or between about 10 nm and about 30 nm. The photopattemed metal -containing EUV resist film 206 may be provided in a process chamber after photopatteming in an EUV scanner and / or after a PEB treatment. The photopatterned metal-containing EUV resist film 206 includes non-EUV exposed regions 206a and EUV exposed regions 206b.

[0112] As shown in FIG. 2B, the non-EUV exposed regions 206a of the photopattemed metal - containing EUV resist film 206 is removed in a development process. The development may use a wet development chemistry or dry development chemistry. Where dry development chemistry is applied, the dry development may proceed with or without striking a plasma. In some implementations, the dry development chemistry may include a hydrogen halide-containing chemistry. A photoresist mask of the photopattemed metal -containing EUV resist film 206 is formed after development by removal of the non-EUV exposed regions 206a.

[0113] As shown in FIG. 2C, the substrate layer 204 is etched using the photoresist mask 208 to form recessed features in the wafer 200 defined by the photoresist mask 208. The wafer 200 undergoes pattern transfer etching so that an etchant selectively removes the substrate layer 204 relative to the chemically modified photoresist mask 208. Pattern transfer etching may be performed with dry etching or wet etching. For example, dry etching may utilize a fluorine-based plasma etch process or oxygen-based plasma etch process. Pattern transfer etching may etch through the substrate layer 204 according to a pattern defined by the photoresist mask 208. In some embodiments, the photoresist mask 208 preserves or at least substantially preserves the increased line CD after pattern transfer etching.The Hydrogen Halide Reclamation Methods for Dry Development

[0114] The conventional methods described above with reference to FIGS. 1 and 2A-2C may be made more efficient by a focus upon the hydrogen halide reagent used in dry development, both in terms of pre-dry development (how much reagent is supplied to a process chamber) and postdry development (how excess reagent is managed after a wafer has been etched). A vapor phase hydrogen halide dry development of a metal oxide photoresist may be represented by the following equation, when the hydrogen halide is HBr and the metal oxide photoresist is an organotin oxide:

[0115] HBr (excess) + [alkyl-Sn(O)OH]n-> alkyl-SnBrs + H2O (Equation 1)

[0116] A large excess of halide is utilized in order to drive the reaction to the right side of the equation. HBr is conventionally continuously flowed into the process chamber and may be provided in an amount which is several hundred times in excess of the stoichiometric amount necessary. The halide is usually flowed into a process chamber for 30 seconds to one minute ormore, at a flow rate of about 300 seem to about 2,000 seem along with an inert gas. Use of such a large excess of halide is expensive and may in some circumstances lead to corrosion of equipment. In turn, the corrosion may cause system downtime to clean and / or replace corroded parts. Therefore, more efficient dry development processes would be advantageous.

[0117] To improve the dry development process, the methods described herein focus on 1) reducing the amount of hydrogen halide utilized and / or 2) efficiently managing the excess hydrogen halide. Techniques for efficient management include, but are not limited to, i) purifying in situ and recycling excess hydrogen halide back to the process chamber; ii) capturing and optionally purifying the hydrogen halide in a separate process or iii) neutralizing hydrogen halide in alkaline spray abatement module and optionally reconstituting the neutralized hydrogen halide for re-use as explained in the following paragraphs.

[0118] To avoid excess hydrogen halide as generated from supplying a continuous flow to the process chamber, a static amount which is limited to only up to 50 times the stoichiometric amount of hydrogen halide required to decompose the EUV-unexposed portion of the photopatterned metal oxide EUV resist into water and a volatile metal halide is utilized in certain embodiments.

[0119] The static amount may be delivered for from about 1 to about 60 seconds, from about 5 to about 10 seconds, from about 5 to about 15 seconds or for as long as, but no more than 15 seconds. The static dose is supplied to the process chamber at a flow rate of about 1 seem to about 100 seem, about 10 seem to about 75 seem or about 25 to about 50 seem. After the static amount has been delivered, soaking the photopatterned metal oxide EUV resist in the amount of hydrogen halide for about 1 to about 60 seconds, about 5 to about 45 seconds or about 10 to about 40 seconds is performed.

[0120] In some embodiments, the dose may be less than 50 times the stoichiometric amount of hydrogen halide, less than 10 times the stoichiometric amount of hydrogen halide, from about 2 to about 10 times the stoichiometric amount of halide, or from about 3 to about 7 times the stoichiometric amount of halide, or from about 4 to about 6 times the stoichiometric amount of halide. In some embodiments, the partial pressure of HBr may be adjusted to further optimize the process.

[0121] FIG. 3A presents scanning electron microscope (SEM) images of example photoresists after dry development with hydrogen bromide in accordance with the methods in certain disclosed embodiments. They were formed by co-flowing 200 seem HBr and N2 into a processing chamber containing an organotin oxide photoresist for 15 seconds, reaching a chamber pressure of 3.8 Torr, at which point the system was closed off from any inlet gasses and from vacuum. Then thecoupons soaked in the HBr / N2-filled chamber for 40 seconds at approximately 30 °C. At the end of the soak step the chamber was pumped down prior to removing the coupon and then subsequently imaging the resultant pattern using a CD SEM. The images below show clean dense line / space arrays with roughness < 3.1 nm, as well as open areas that show no residue.

[0122] FIG. 3B presents scanning electron microscope (SEM) images of photoresists after dry development with trimethyl silyl chloride in accordance with certain disclosed embodiments. Stoichiometric calculations for the appropriate amount of trimethyl silyl chloride to utilize in the methods described herein can be based upon the following equation in certain embodiments:

[0123] [alkyl-Sn(O)OH]n+ 3n MesSiCl — n alkylSnCh + 3n / 2 (SiMes^O [Equation 2]

[0124] The examples were formed by placing 0.2 mL of (CEh^SiCl contained in a small vial and a EUV patterned organotin oxide photoresist in a nitrogen purged 100 mL closed bottle. The exposure time of the photoresist to TMS-C1 vapor was in the range of 10 - 30 min. The vapor pressure of (CEh^SiCl in the bottle was assumed to be 100 Torr which is the known vapor pressure of (CH3)3SiCl at room temperature. At the end of the soak step the photoresists were removed from the bottle and pumped down in a vacuum transfer chamber of a glovebox for 5 min. Subsequently, the resultant patterns were imaged using a CD SEM. The images below show dense line / space arrays with line width and space width controlled by exposure time, as well as open areas that show no residue after a 30 min exposure. The P30 line / space patterns in organotin oxide photoresist were generated with a EUV dose of 45 mJ / cm2. After EUV exposure, the photoresist was baked in air for 4 min at 180 °C then in 9 Torr of N2 for 3min at 195 °C.

[0125] The above results demonstrate that line / space patterns can be observed after a simple static dry development process. The amount of etchant used in the experiment was a combination of the stoichiometric amount necessary to etch away the unexposed photoresist plus the additional partial pressure of etchant in the volume of the bottle. The amount of etchant that would have been required to continuously flow for 30 min would reasonably be greater than the amount used in the experiment. The conditions were limited by the experimental setup and dependent upon the laboratory temperature, volume of the bottle, vapor pressure of trimethyl silyl chloride. Reaction time was used to control the development process. In a high volume manufacturing process additional process conditions could be varied.

[0126] In certain embodiments, this small-scale example could be transferred to a larger process chamber where process conditions for dry development (pressure, temperature, and time) could be optimized for high volume manufacturing. The photoresist would be placed into a vacuum chamber and pumped down to base pressure followed by closing of the chamber isolation valve.Subsequently a flow of about 100 seem to about 2,000 seem containing trimethyl silyl chloride or trimethyl silyl bromide would fill the chamber volume to a determined pressure such as from about 100 mTorr to about 500 mTorr, or up to 2 Torr in certain embodiments. A co-flow of an inert gas such as argon, nitrogen, or helium at a rate of from about 100 seem to about 2,000 seem could be used to dilute the etchant to a determined partial pressure such as from about 5% to about 90% of the total chamber pressure and assist in reaching the desired chamber pressure. The photoresist would soak inside the chamber exposed to the vapors of trimethyl silyl chloride or trimethyl silyl bromide for a set amount of time such as from about 20 seconds to about 300 seconds after which the chamber would be evacuated and purged to remove etch by-products. The temperature of the photoresist during the soak would be controlled by placing the photoresist wafer on a heated or cooled pedestal in a temperature range of from about -20 °C to about 75 °C. Additionally, the container temperature holding the reservoir of trimethyl silyl chloride or trimethyl silyl bromide could be heated to between 35 °C and 100 °C to increase the vapor pressure and rate of vaporization of the etchant sufficiently to decrease the time required to fill the process chamber with the desired partial pressure of the etchant.

[0127] Methods which recycle hydrogen halides utilized in the dry development process are another technique to effectively manage and control the amount of hydrogen halide utilized by recirculating, purifying in situ and recycling excess halide back to the process chamber. During dry development, an effluent process stream which includes volatile byproducts such as organometal halides, water and metal halides as well as the large excess of hydrogen halide may be generated. The organometal halide may be for example isopropyltin tribromide, and the metal halide may be for example tin tetrabromide. These byproducts can be separated from the excess hydrogen bromide through condensation and / or absorption, and then the purified hydrogen bromide can be cycled back into the process chamber for re-use as shown in FIG. 4A, which is described in greater detail below. Beyond the advantages offered by recycling the hydrogen halide, the method is also useful because the removal of water from the process chamber may assist in driving the reaction shown in Equation 1 to the right, thus lowering the amount of hydrogen halide required.

[0128] Moreover, this method can be used in conjunction with the method described above wherein only a specified dose of HBr is supplied to the process chamber.

[0129] One alternative for efficiently utilizing halides in a dry development process is to reclaim halide by capturing it and then optionally purifying it in a separate process. Excess halide can bereclaimed downstream of the vacuum pump through condensation in a pressure-compatible collection vessel within a low temperature condenser as shown in FIG. 4B, which is described in greater detail below. Optionally, the less volatile byproducts (for example water and isopropyl- SnBr?) may be removed by a trap positioned between the vacuum pump and the condenser. When the pressure-compatible collection vessel is full, it can be sealed and processed elsewhere (either within the facility or by a chemical vendor / partner offsite). Off-site purification may be performed by returning the impure hydrogen halide to the supplier in some embodiments.

[0130] A second alternative method to indirectly recover hydrogen halide used in dry development is to neutralize the excess halide in an alkaline spray abatement system. In one embodiment, an alkaline solution such as a lime solution is sprayed over the process gas effluent stream (exhaust from the vacuum pump) converting the halide such as HBr to CaBr2 and water for example. HBr can then optionally be reconstituted for re-use, such as by treating the CaBr2 with H2SO4 to form CaSO4 and HBr. A suitable apparatus is shown in FIG. 5 and described in greater detail below.

[0131] Moreover, this method can be used in conjunction with the method described above wherein only a specified dose of HBr is supplied to the process chamber, to capture the smaller amount of excess of hydrogen halide which will still be present in the vacuum pump exhaust.Apparatus

[0132] FIG. 4A depicts a schematic illustration of an example system 400 for recycling hydrogen halide from dry development in a process chamber and upstream of a vacuum pump in accordance with certain disclosed embodiments.

[0133] The schematic shown is for a system 400 including a process chamber 401 having an HBr inlet valve 415, an air agitation module 406 to circulate process gases 408, two identical condensers 402 and 403, and recirculation conduit 407. Condensers 402 and 403 can be alternatively employed for removing the etch byproducts (H2O, i-PrSnBrs and SnB ) from process gases 408 including excess HBr. Process gasses 408 may be transported from process chamber 401 through conduit 409 when valve 412b, a gas recirculation inlet, is open. Condensers 402 and 403 include an inner water absorbent liner material 404 and outer temperature-adjustable jackets 405a and 405b.

[0134] The inner water absorbent liner material 404 captures water. The absorbents suitable for the liner material would be materials selective for adsorbing / removing H2O vapor; while remaining relatively inert towards HBr or HC1. Examples include, but are not limited to, anhydrous aluminum oxide, silica gel, and / or various aluminosilicates and molecular sieveformulations targeting water removal. Suitable methods and materials include those as described in U.S. Patent 4,853,148 in certain embodiments.

[0135] Condenser 402 includes temperature-adjustable jacket 405a and condenser 403 includes temperature adjustable jacket 405b. When condenser 402 is in use, temperature-adjustable jacket 405a is operated in a cooling mode to condense HBr. Condenser 402 is in use when valves 412a and 412b are open, while valve 416 is closed.

[0136] As the process gases flow into condenser 402, water, organotin B and SnBr4 are removed while the then purified HBr is cycled back to the process chamber where it can continue the selective etching of unexposed resist material. This recycled HBr is flowed through open valve 412a and recirculation conduit 404 and back into the process chamber through inlet 411.

[0137] When condenser 402 is in use, condenser 403 can be cleaned. To clean condenser 403, temperature-adjustable jacket 405b is operated in a heating mode to drive off any contaminants or residual byproducts. Valves 413a and 413b are closed, while valve 417 is opened to allow the volatilized contaminants to be removed from condenser 403.

[0138] Conversely, condenser 403 can be used for recycling while condenser 402 is being cleaned. In this way, the system can be continuously operated without the need to stop dry development for cleaning. When condenser 403 is in use, temperature-adjustable jacket 405b is operated in a cooling mode to trap impurities. Condenser 403 is in use when valves 413a and 413b are open, while valve 417 is closed.

[0139] When condenser 403 is in use, condenser 402 can be cleaned. To clean condenser 402, temperature-adjustable jacket 405a is operated in a heating mode to drive off any contaminants or residual byproducts. Valves 412a and 412b are closed, while valve 416 is opened to allow the volatilized contaminants to be removed from condenser 402.

[0140] During recycling and / or cleaning operations valve 414 is closed. When valve 414 is opened, process gases flow from the process chamber to the vacuum pump.

[0141] While a system having two condensers is depicted, in other embodiments, four condensers may be used.

[0142] The system 400 can be integrated with the process chambers or tools of FIGS. 6-9 and may be associated with the main controller or an auxiliary controller configured to perform the hydrogen halide reagent recycling technique described herein.

[0143] FIG. 4B depicts a schematic illustration of an example system 450 for reclaiming hydrogen halide from dry development in a process chamber and downstream of a vacuum pump in accordance with certain disclosed embodiments.

[0144] The system 450 is configured downstream of the process chamber (not shown) and vacuum pump 455. Vacuum pump 455 receives effluent from the process chamber through flow path 460 which may include various byproducts and hydrogen halide such as HBr. Exhaust from the vacuum pump is supplied to a low temperature condenser 480 through flow paths 465 and 475. Suitable temperatures may be about -80 °C or less. Optionally, a trap 470 may be placed between the vacuum pump 455 and the condenser 480 to capture volatile metal halide byproducts. Trap 470 may be cooled below ambient temperature to enhance capture of the unwanted byproducts.

[0145] Condenser 480 is equipped with a pressure-compatible collection vessel to hold condensed impure hydrogen halide 485. Once the vessel is full it can be removed for futher purification, for example off-site by a chemical supplier.

[0146] Flow path 490 is to flow any remaining gases or vapors out of the system.

[0147] The system 450 can be integrated with the process chambers or tools of FIGS. 6-9 and may be associated with the main controller or an auxiliary controller configured to perform the reclamation technique described herein.

[0148] FIG. 5 depicts a schematic illustration of an example system 500 for processing byproducts from dry development in a process chamber and downstream of a vacuum pump in accordance with certain disclosed embodiments. Process gasses 501 from dry development including byproducts and excess hydrogen halide reagent are transported from the process chamber through vacuum pump 502. The exhaust from the vacuum pump flows through conduit 503 and into an abatement module 504 where an aqueous alkaline solution 505 such as a CaO / Ca(OH)2 solution is sprayed over it. The spraying neutralizes the hydrogen halide (such as HBr) and other volatile byproducts which are collected in abatement module 504 as a neutralized solution 505 which may include CaBr2 in some embodiments, while scrubbed exhaust 507 is released from the abatement module. The neutralized solution may be further processed and converted back to a usable hydrogen halide reagent such as by treating the CaBr2 with H2SO4 to obtain HBr.

[0149] The system 500 can be integrated with the process chambers or tools of FIGS. 6-9 and may be associated with the main controller or an auxiliary controller configured to perform the neutralization technique described herein.

[0150] Moreover, the upstream system 400 can be combined with either the downstream system 450 or the downstream system 500.

[0151] An apparatus of the present disclosure is configured for post-development treatment of a patterned metal-containing photoresist mask. The apparatus may be configured for otherprocessing operations such as deposition, bevel and backside cleaning, post-application baking, EUV scanning, post-exposure baking, development, etching, and other operations. In some implementations, the apparatus is configured to perform multiple dry operations. In some implementations, the apparatus is configured to perform a combination of wet and dry operations. The apparatus may include a single wafer chamber or multiple stations in the same process chamber. With multiple stations in the same process chamber, various processing operations such as those described in the present disclosure may be performed in different stations in the same process chamber. In some embodiments, a process chamber for post-development treatment of the present disclosure may be performed in the same chamber as development, in the same chamber as pattern transfer etching, or in the same chamber as both development and pattern transfer etching.

[0152] The apparatus configured to perform post-development treatment includes a process chamber with a substrate support. The apparatus may include at least a reactive gas source in fluid communication with the process chamber. The apparatus may include one or more gas lines for delivery of one or more reactive gas species. In some embodiments, the one or more reactive gas species may include an organic gas species, an organometallic gas species, a metal -containing gas species, or combinations thereof. In some embodiments, the one or more reactive gas species may include an oxygen-containing gas, a carbon-containing gas, a hydrogen-containing gas, a nitrogencontaining gas, a halogen-containing gas, or combinations thereof. The one or more reactive gas species may be delivered to the process chamber via the one or more gas lines to treat a postdeveloped metal-containing photoresist mask. The apparatus may include one or more heating elements for temperature control. Such heating elements may be provided in the process chamber and / or in the substrate support. Alternatively, such heating elements may be provided outside the process chamber. In some implementations, the apparatus may include a plasma source for generating plasma during treatment of the post-developed metal-containing photoresist mask. In some implementations, the one or more reactive species may selectively deposit a protective film on the post-developed metal-containing photoresist mask. The apparatus may further include one or more sensors for sensing particle count, wafer count, thickness count, or other parameters for triggering an endpoint of the post-development treatment.

[0153] FIG. 6 depicts a schematic illustration of an example process station for maintaining an environment that is suitable for performing photoresist development and photoresist treatment operations according to some embodiments. For simplicity, the process station 600 is depicted as a standalone process station having a process chamber body 602 for maintaining a low-pressureenvironment. However, it will be appreciated that a plurality of process stations 600 may be included in a common process tool environment. Further, it will be appreciated that, in some embodiments, one or more hardware parameters of process station 600, including those discussed in detail below, may be adjusted programmatically by one or more computer controllers.

[0154] A plurality of process stations 600 may be included in a common low-pressure process tool environment. For example, FIG. 7 depicts an implementation of a multi-station processing tool 700. In some implementations, one or more hardware parameters of the process tool 700 including those discussed in detail below may be adjusted programmatically by one or more computer controllers 750.

[0155] A process station may be configured as a module in a cluster tool. FIG. 9 depicts a semiconductor process cluster tool architecture with vacuum-integrated deposition and patterning modules suitable for implementation of the implementations described herein. Such a cluster process tool architecture can include resist deposition, resist exposure (EUV scanner), resist development, resist rework, and etch modules, as described above and further below with reference to FIGS. 6 and 7.

[0156] Returning to FIG. 6, process station 600 fluidly communicates with reactant delivery system 601 for delivering process gases to a showerhead 606. Reactant delivery system 601 optionally includes a mixing vessel 604 for blending and / or conditioning process gases, for delivery to showerhead 606. One or more mixing vessel inlet valves 620 may control introduction of process gases to mixing vessel 604. Where plasma exposure is used, plasma may also be delivered to the showerhead 606 or may be generated in the process station 600. As noted above, in at least some implementations, non-plasma thermal exposure is favored.

[0157] FIG. 6 includes an optional vaporization point 603 for vaporizing liquid reactant to be supplied to the mixing vessel 604. In some implementations, a liquid flow controller (LFC) upstream of vaporization point 603 may be provided for controlling a mass flow of liquid for vaporization and delivery to process station 600. For example, the LFC may include a thermal mass flow meter (MFM) located downstream of the LFC. A plunger valve of the LFC may then be adjusted responsive to feedback control signals provided by a proportional-integral-derivative (PID) controller in electrical communication with the MFM.

[0158] Showerhead 606 distributes process gases toward substrate 612. In the implementation shown in FIG. 6, the substrate 612 is located beneath showerhead 606 and is shown resting on a pedestal 608. Showerhead 606 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to substrate 612.

[0159] In some implementations, pedestal 608 may be raised or lowered to expose substrate 612 to a volume 607 between the substrate 612 and the showerhead 606. It will be appreciated that, in some implementations, pedestal height may be adjusted programmatically by a suitable computer controller. In some implementations, the showerhead 606 may have multiple plenum volumes with multiple temperature controls.

[0160] In some implementations, pedestal 608 may be temperature controlled via heater 610. In some implementations, the pedestal 608 may be heated to a temperature of greater than 0°C and up to 300°C, for example 50°C to 280°C, such as about 100°C to 240°C, during post-development treatment, as described in disclosed implementations. In some implementations, the heater 610 of the pedestal 608 may include a plurality of independently controllable temperature control zones.

[0161] Further, in some implementations, pressure control for process station 600 may be provided by a butterfly valve 618. As shown in the implementation of FIG. 6, butterfly valve 618 throttles a vacuum provided by a downstream vacuum pump (not shown). However, in some implementations, pressure control of process station 600 may also be adjusted by varying a flow rate of one or more gases introduced to the process station 600.

[0162] In some implementations, a position of showerhead 606 may be adjusted relative to pedestal 608 to vary a volume between the substrate 612 and the showerhead 606. Further, it will be appreciated that a vertical position of pedestal 608 and / or showerhead 606 may be varied by any suitable mechanism within the scope of the present disclosure. In some implementations, pedestal 608 may include a rotational axis for rotating an orientation of substrate 612. It will be appreciated that, in some implementations, one or more of these example adjustments may be performed programmatically by one or more suitable computer controllers.

[0163] Where plasma may be used, for example in descumming, treatment, deposition, or smoothing operations, showerhead 606 and pedestal 608 electrically communicate with a radio frequency (RF) power supply 614 and matching network 616 for powering a plasma. In some implementations, the plasma energy may be controlled by controlling one or more of a process station pressure, a gas concentration, an RF source power, an RF source frequency, and a plasma power pulse timing. For example, RF power supply 614 and matching network 616 may be operated at any suitable power to form a plasma having a desired composition of radical species. Examples of suitable powers are up to about 1000 W.

[0164] In some implementations, instructions for a computer controller (not shown) may be provided via input / output control (IOC) sequencing instructions. In one example, the instructionsfor setting conditions for a process phase may be included in a corresponding recipe phase of a process recipe. In some cases, process recipe phases may be sequentially arranged, so that all instructions for a process phase are executed concurrently with that process phase. In some implementations, instructions for setting one or more reactor parameters may be included in a recipe phase. For example, a recipe phase may include instructions for setting a flow rate of an etch gas, such as a hydrogen halide, and time delay instructions for the recipe phase. In some implementations, the controller may include any of the features described below with respect to controller 750 of FIG. 7.

[0165] The process chamber may also include a UV exposure module (not shown).

[0166] In some embodiments, the process chamber may also include a photoresist thickness sensor module (not shown). The photoresist thickness sensor module may be a spectral reflectometer including a lamp source, an optical cable and a spectrometer system operating within a spectral range of about 200 to about 900 nm. The reflectometer measures in situ wafer reflectance vs. time, and thus can be useful to monitor the thickness of a photoresist during dry development.

[0167] As described above, one or more process stations may be included in a multi-station processing tool. FIG. 7 shows a schematic view of an implementation of a multi-station processing tool 700 with an inbound load lock 702 and an outbound load lock 704, either or both of which may include a remote plasma source. A robot 706 at atmospheric pressure is configured to move wafers from a cassette loaded through a pod 708 into inbound load lock 702 via an atmospheric port 710. A wafer is placed by the robot 706 on a pedestal 712 in the inbound load lock 702, the atmospheric port 710 is closed, and the load lock is pumped down. Where the inbound load lock 702 includes a remote plasma source, the wafer may be exposed to a remote plasma treatment to treat the substrate surface in the load lock prior to being introduced into a processing chamber 714. Further, the wafer also may be heated in the inbound load lock 702 as well, for example, to remove moisture and adsorbed gases. Next, a chamber transport port 716 to processing chamber 714 is opened, and another robot (not shown) places the wafer into the reactor on a pedestal of a first station shown in the reactor for processing. While the implementation depicted in FIG. 7 includes load locks, it will be appreciated that, in some implementations, direct entry of a wafer into a process station may be provided.

[0168] The depicted processing chamber 714 includes four process stations, numbered from 1 to 4 in the implementation shown in FIG. 7. Each station has a heated pedestal (shown at 718 for station 1), and gas line inlets. It will be appreciated that in some implementations, each processstation may have different or multiple purposes. For example, in some implementations, a process station may be switchable between development and etch process modes. Additionally or alternatively, in some implementations, processing chamber 714 may include one or more matched pairs of development and etch process stations. While the depicted processing chamber 714 includes four stations, it will be understood that a processing chamber according to the present disclosure may have any suitable number of stations. For example, in some implementations, a processing chamber may have five or more stations, while in other implementations a processing chamber may have three or fewer stations.

[0169] FIG. 7 depicts an implementation of a wafer handling system 790 for transferring wafers within processing chamber 714. In some implementations, wafer handling system 790 may transfer wafers between various process stations and / or between a process station and a load lock. It will be appreciated that any suitable wafer handling system may be employed. Non-limiting examples include wafer carousels and wafer handling robots. FIG. 7 also depicts an implementation of a controller 750 (e.g., system controller) employed to control process conditions and hardware states of process tool 700. Controller 750 may include one or more memory devices 756, one or more mass storage devices 754, and one or more processors 752. Processor 752 may include a CPU or computer, analog, and / or digital input / output connections, stepper motor controller boards, etc.

[0170] In some implementations, controller 750 controls all of the activities of process tool 700. Controller 750 executes system control software 758 stored in mass storage device 754, loaded into memory device 756, and executed on processor 752. Alternatively, the control logic may be hard coded in the controller 750. Applications Specific Integrated Circuits, Programmable Logic Devices (e.g., field-programmable gate arrays, or FPGAs) and the like may be used for these purposes. In the following discussion, wherever “software” or “code” is used, functionally comparable hard coded logic may be used in its place. System control software 758 may include instructions for controlling the timing, mixture of gases, gas flow rates, chamber and / or station pressure, chamber and / or station temperature, wafer temperature, target power levels, RF power levels, substrate pedestal, chuck and / or susceptor position, and other parameters of a particular process performed by process tool 700. System control software 758 may be configured in any suitable way. For example, various process tool component subroutines or control objects may be written to control operation of the process tool components used to carry out various process tool processes. System control software 758 may be coded in any suitable computer readable programming language.

[0171] In some implementations, system control software 758 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. Other computer software and / or programs stored on mass storage device 754 and / or memory device 756 associated with controller 750 may be employed in some implementations. Examples of programs or sections of programs for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program.

[0172] A substrate positioning program may include program code for process tool components that are used to load the substrate onto pedestal 718 and to control the spacing between the substrate and other parts of process tool 700.

[0173] A process gas control program may include code for controlling process gas composition and flow rates and optionally for flowing gas into one or more process stations prior to deposition in order to stabilize the pressure in the process station. A pressure control program may include code for controlling the pressure in the process station by regulating, for example, a throttle valve in the exhaust system of the process station, a gas flow into the process station, etc.

[0174] A heater control program may include code for controlling the current to a heating unit that is used to heat the substrate. Alternatively, the heater control program may control delivery of a heat transfer gas (such as helium) to the substrate.

[0175] A plasma control program may include code for setting RF power levels applied to the process electrodes in one or more process stations in accordance with the implementations herein.

[0176] A pressure control program may include code for maintaining the pressure in the reaction chamber in accordance with the implementations herein.

[0177] In some implementations, there may be a user interface associated with controller 750. The user interface may include a display screen, graphical software displays of the apparatus and / or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.

[0178] In some implementations, parameters adjusted by controller 750 may relate to process conditions. Non-limiting examples include process gas composition and flow rates, temperature, pressure, plasma conditions (such as RF bias power levels), etc. These parameters may be provided to the user in the form of a recipe, which may be entered utilizing the user interface.

[0179] Signals for monitoring the process may be provided by analog and / or digital input connections of controller 750 from various process tool sensors. The signals for controlling the process may be output on the analog and digital output connections of process tool 700. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (such as manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain process conditions.

[0180] Controller 750 may provide program instructions for implementing the above-described deposition processes. The program instructions may control a variety of process parameters, such as DC power level, RF bias power level, pressure, temperature, etc. The instructions may control the parameters to operate development, clean, and / or etch processes according to various implementations described herein.

[0181] The controller 750 will typically include one or more memory devices and one or more processors configured to execute the instructions so that the apparatus will perform a method in accordance with disclosed implementations. Machine-readable media containing instructions for controlling process operations in accordance with disclosed implementations may be coupled to the controller 750.

[0182] In some implementations, the controller 750 is part of a system, which may be part of the above-described examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller 750, depending on the processing conditions and / or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with a specific system.

[0183] Broadly speaking, the controller 750 may be defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g.,software). Program instructions may be instructions communicated to the controller 750 in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some implementations, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0184] The controller 750, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller 750 may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller 750 receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller 750 is configured to interface with or control. Thus as described above, the controller 750 may be distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0185] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an ALD chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, an EUV lithography chamber (scanner) ormodule, a development chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0186] As noted above, depending on the process step or steps to be performed by the tool, the controller 750 might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.

[0187] ICP reactors which, in certain implementations, may be suitable for etch operations suitable for implementation of some implementations, are now described. Although ICP reactors are described herein, in some implementations, it should be understood that capacitively coupled plasma reactors may also be used.

[0188] FIG. 8 schematically shows a cross-sectional view of an inductively coupled plasma apparatus 800 appropriate for implementing certain implementations or aspects of implementations such as dry development, post-development treatment, and / or etch. In other implementations, other tools or tool types having the functionality to conduct the dry development, post-development treatment, and / or etch processes described herein may be used for implementation.

[0189] The inductively coupled plasma apparatus 800 includes an overall process chamber 824 structurally defined by chamber walls 801 and a window 811. The chamber walls 801 may be fabricated from stainless steel, aluminum, or plastic. The window 811 may be fabricated from quartz or other dielectric material. An optional internal plasma grid 850 divides the overall process chamber into an upper sub-chamber 802 and a lower sub chamber 803. In most implementations, plasma grid 850 may be removed, thereby utilizing a chamber space made of sub chambers 802 and 803. A chuck 817 is positioned within the lower sub-chamber 803 near the bottom inner surface. The chuck 817 is configured to receive and hold a semiconductor wafer 819 upon which the etching and deposition processes are performed. The chuck 817 can be an electrostatic chuck for supporting the wafer 819 when present. In some implementations, an edge ring (not shown) surrounds chuck 817 and has an upper surface that is approximately planar with a top surface of the wafer 819, when present over chuck 817. The chuck 817 also includes electrostatic electrodes for chucking and dechucking the wafer 819. A filter and DC clamp power supply (not shown) may be provided for this purpose. Other control systems for lifting the wafer 819 off the chuck 817 can also be provided. The chuck 817 can be electrically charged using an RF power supply823. The RF power supply 823 is connected to matching circuitry 821 through a connection 827. The matching circuitry 821 is connected to the chuck 817 through a connection 825. In this manner, the RF power supply 823 is connected to the chuck 817. In various implementations, a bias power of the electrostatic chuck may be set at about 50 V or may be set at a different bias power depending on the process performed in accordance with disclosed implementations. For example, the bias power may be between about 20 V and about 100 V, or between about 30 V and about 150 V.

[0190] Elements for plasma generation include a coil 833 is positioned above window 811. In some implementations, a coil is not used in disclosed implementations. The coil 833 is fabricated from an electrically conductive material and includes at least one complete turn. The example of a coil 833 shown in FIG. 8 includes three turns. The cross sections of coil 833 are shown with symbols, and coils having an “X” extend rotationally into the page, while coils having a “ •” extend rotationally out of the page. Elements for plasma generation also include an RF power supply 841 configured to supply RF power to the coil 833. In general, the RF power supply 841 is connected to matching circuitry 839 through a connection 845. The matching circuitry 839 is connected to the coil 833 through a connection 843. In this manner, the RF power supply 841 is connected to the coil 833. An optional Faraday shield 849 is positioned between the coil 833 and the window 811. The Faraday shield 849 may be maintained in a spaced apart relationship relative to the coil 833. In some implementations, the Faraday shield 849 is disposed immediately above the window 811. In some implementations, the Faraday shield 849 is between the window 811 and the chuck 817. In some implementations, the Faraday shield 849 is not maintained in a spaced apart relationship relative to the coil 833. For example, the Faraday shield 849 may be directly below the window 811 without a gap. The coil 833, the Faraday shield 849, and the window 811 are each configured to be substantially parallel to one another. The Faraday shield 849 may prevent metal or other species from depositing on the window 811 of the process chamber 824.

[0191] Process gases may be flowed into the process chamber through one or more main gas flow inlets 860 positioned in the upper sub-chamber 802 and / or through one or more side gas flow inlets 870. Likewise, though not explicitly shown, similar gas flow inlets may be used to supply process gases to a capacitively coupled plasma processing chamber. A vacuum pump, e.g., a one or two stage mechanical dry pump and / or turbomolecular pump 840, may be used to draw process gases out of the process chamber 824 and to maintain a pressure within the process chamber 824. For example, the vacuum pump may be used to evacuate the lower sub-chamber 803 during a purge operation. A valve-controlled conduit may be used to fluidically connect the vacuum pumpto the process chamber 824 so as to selectively control application of the vacuum environment provided by the vacuum pump. This may be done employing a closed loop-controlled flow restriction device, such as a throttle valve (not shown) or a pendulum valve (not shown), during operational plasma processing. Likewise, a vacuum pump and valve controlled fluidic connection to the capacitively coupled plasma processing chamber may also be employed. The wide range of pressure to be modulated within a process chamber for combined dry development and etch may be achieved with variable-speed vacuum systems, throttle valves, by adjusting the flow of process gases, or by using two pressure regulating systems.

[0192] During operation of the apparatus 800, one or more process gases may be supplied through the gas flow inlets 860 and / or 870. In certain implementations, process gas may be supplied only through the main gas flow inlet 860, or only through the side gas flow inlet 870. In some cases, the gas flow inlets shown in the figure may be replaced by more complex gas flow inlets, one or more showerheads, for example. The Faraday shield 849 and / or optional grid 850 may include internal channels and holes that allow delivery of process gases to the process chamber 824. Either or both of Faraday shield 849 and optional grid 850 may serve as a showerhead for delivery of process gases. In some implementations, a liquid vaporization and delivery system may be situated upstream of the process chamber 824, such that once a liquid reactant or precursor is vaporized, the vaporized reactant or precursor is introduced into the process chamber 824 via a gas flow inlet 860 and / or 870.

[0193] Radio frequency power is supplied from the RF power supply 841 to the coil 833 to cause an RF current to flow through the coil 833. The RF current flowing through the coil 833 generates an electromagnetic field about the coil 833. The electromagnetic field generates an inductive current within the upper sub-chamber 802. The physical and chemical interactions of various generated ions and radicals with the wafer 819 etch features of and selectively deposit layers on the wafer 819.

[0194] If the plasma grid 850 is used such that there is both an upper sub-chamber 802 and a lower sub-chamber 803, the inductive current acts on the gas present in the upper sub-chamber 802 to generate an electron-ion plasma in the upper sub-chamber 802. The optional internal plasma grid 850 limits the amount of hot electrons in the lower sub-chamber 803. In some implementations, the apparatus 800 is designed and operated such that the plasma present in the lower sub-chamber 803 is an ion-ion plasma.

[0195] Both the upper electron-ion plasma and the lower ion-ion plasma may contain positive and negative ions, though the ion-ion plasma will have a greater ratio of negative ions to positiveions. Volatile etching and / or deposition byproducts may be removed from the lower sub-chamber 803 through port 822. The chuck 817 disclosed herein may operate at elevated temperatures ranging between about 10°C and about 250°C. The temperature will depend on the process operation and specific recipe.

[0196] Apparatus 800 may be coupled to facilities (not shown) when installed in a clean room or a fabrication facility. Facilities include plumbing that provide processing gases, vacuum, temperature control, and environmental particle control. These facilities are coupled to apparatus 800, when installed in the target fabrication facility. Additionally, apparatus 800 may be coupled to a transfer chamber that allows robotics to transfer semiconductor wafers into and out of apparatus 800 using typical automation.

[0197] In some implementations, a controller 830 (which may include one or more physical or logical controllers) controls some or all of the operations of a process chamber 824. The controller 830 may include one or more memory devices and one or more processors. In some implementations, the apparatus 800 includes a switching system for controlling flow rates and durations when disclosed implementations are performed. In some implementations, the apparatus 800 may have a switching time of up to about 500 ms, or up to about 750 ms. Switching time may depend on the flow chemistry, recipe chosen, reactor architecture, and other factors.

[0198] In some implementations, the controller 830 is part of a system, which may be part of the above-described examples. Various aspects of the controller 830 are described above.

[0199] EUVL patterning may be conducted using any suitable tool, often referred to as a scanner. The EUVL patterning tool may be a standalone device from which the substrate is moved into and out of for deposition and etching as described herein. Alternatively, as described below, the EUVL patterning tool may be a module on a larger multi-component tool.

[0200] FIG. 9 depicts a semiconductor process cluster tool architecture 900 with vacuum- integrated deposition, patterning, and treatment modules that interface with a vacuum transfer module, suitable for implementations of processes described herein. The arrangement of transfer modules to “transfer” wafers among multiple storage facilities and processing modules may be referred to as a “cluster tool architecture” system. Deposition, patterning, and treatment modules are vacuum-integrated, in accordance with the requirements of a particular process. Other modules, such as for etch, may also be included on the cluster.

[0201] A vacuum transport module (VTM) 938 interfaces with four processing modules 920a- 920d, which may be individually optimized to perform various fabrication processes. By way of example, processing modules 920a-920d may be implemented to perform deposition, evaporation,ELD, dry development, clean, etch, treatment, strip, and / or other semiconductor processes. For example, module 920a may be an ALD reactor that may be operated to perform in a non-plasma, thermal atomic layer depositions as described herein. Module 920b may be a PECVD tool. It should be understood that the figure is not necessarily drawn to scale.

[0202] Airlocks 942 and 946, also known as a loadlocks or transfer modules, interface with the VTM 938 and a patterning module 940. This tool architecture allows for work pieces, such as semiconductor substrates or wafers, to be transferred under vacuum so as not to react before exposure. Integration of the deposition modules with the lithography tool is facilitated by the fact that EUVL also requires a greatly reduced pressure given the strong optical absorption of the incident photons by ambient gases such as H2O, O2, etc.

[0203] As noted above, this integrated architecture is just one possible implementation of a tool for implementation of the described processes. The processes may also be implemented with a more conventional stand-alone EUVL scanner and a deposition reactor, either standalone or integrated in a cluster architecture with other tools, such as etch, strip etc. as modules, for example as described with reference to FIG. 9 but without the integrated patterning module.

[0204] Airlock 942 may be an “outgoing” loadlock, referring to the transfer of a substrate out from the VTM 938 serving a deposition module 920a to the patterning module 940, and airlock 946 may be an “ingoing” loadlock, referring to the transfer of a substrate from the patterning module 940 back in to the VTM 938. The ingoing airlock 946 may also provide an interface to the exterior of the tool for access and egress of substrates. Each process module has a facet that interfaces the module to VTM 938. For example, deposition process module 920a has facet 936. Inside each facet, sensors, for example, sensors 1-18 as shown, are used to detect the passing of wafer 926 when moved between respective stations. Patterning module 940 and airlocks 942 and 946 may be similarly equipped with additional facets and sensors, not shown.

[0205] Main VTM robot 922 transfers wafer 926 between modules, including airlocks 942 and 946. In one implementation, robot 922 has one arm, and in another implementation, robot 922 has two arms, where each arm has an end effector 924 to pick wafers such as wafer 926 for transport. Front-end robot 944, in is used to transfer wafers 926 from outgoing airlock 942 into the patterning module 940, from the patterning module 940 into ingoing airlock 946. Front-end robot 944 may also transport wafers 926 between the ingoing loadlock and the exterior of the tool for access and egress of substrates. Because ingoing airlock module 946 has the ability to match the environment between atmospheric and vacuum, the wafer 926 is able to move between the two pressure environments without being damaged.

[0206] It should be noted that an EUVL tool typically operates at a higher vacuum than a deposition tool. If this is the case, it is desirable to increase the vacuum environment of the substrate during the transfer between the deposition to the EUVL tool to allow the substrate to degas prior to entry into the patterning tool. Outgoing airlock 942 may provide this function by holding the transferred wafers at a lower pressure, no higher than the pressure in the patterning module 940, for a period of time and exhausting any off-gassing, so that the optics of the patterning module 940 are not contaminated by off-gassing from the substrate. A suitable pressure for the outgoing, off-gassing airlock is no more than IE-8 Torr.

[0207] In some implementations, a controller 950 (which may include one or more physical or logical controllers) controls some or all of the operations of the cluster tool and / or its separate modules. It should be noted that the controller can be local to the cluster architecture or can be located external to the cluster architecture in the manufacturing floor, or in a remote location and connected to the cluster architecture via a network. The controller 950 may include one or more memory devices and one or more processors. The processor may include a central processing unit (CPU) or computer, analog and / or digital input / output connections, stepper motor controller boards, and other like components. Instructions for implementing appropriate control operations are executed on the processor. These instructions may be stored on the memory devices associated with the controller or they may be provided over a network. In certain implementations, the system controller executes system control software.

[0208] The system control software may include instructions for controlling the timing of application and / or magnitude of any aspect of tool or module operation. System control software may be configured in any suitable way. For example, various process tool component subroutines or control objects may be written to control operations of the process tool components necessary to carry out various process tool processes. System control software may be coded in any suitable compute readable programming language. In some implementations, system control software includes input / output control (IOC) sequencing instructions for controlling the various parameters described above. For example, each phase of a semiconductor fabrication process may include one or more instructions for execution by the controller. The instructions for setting process conditions for condensation, deposition, evaporation, patterning and / or etching phase may be included in a corresponding recipe phase, for example.

[0209] In various implementations, an apparatus for post-development treatment is provided. The apparatus may include a processing chamber for patterning, treatment, deposition, and etch, and a controller including instructions for post-development treatment of a patterned photoresistmask. The instructions may include code for, in the processing chamber, treating a patterned metal-containing photoresist mask after development. Such treatment may include thermal treatment, plasma treatment, chemical treatment, or selective deposition of a protective layer on the patterned metal-containing photoresist mask.

[0210] It should be noted that the computer controlling the wafer movement can be local to the cluster architecture or can be located external to the cluster architecture in the manufacturing floor, or in a remote location and connected to the cluster architecture via a network. A controller as described above with respect to any of FIGS. 6, 7, or 8 may be implemented with the tool in FIG. 9.Further Implementations

[0211] Without limitation, while the above discussion has focused on dry development chambers, further example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0212] The apparatus and processes described herein may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, though not necessarily, such apparatus and processes will be used or conducted together in a common fabrication facility. Lithographic patterning of a film typically comprises some or all of the following steps, each step enabled with a number of possible tools: (1) application of photoresist on a work piece, i.e., a substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or work piece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.Conclusion

[0213] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.

Claims

CLAIMSWhat is claimed is:

1. A method of dry developing a semiconductor substrate comprising: a) providing a photopatterned metal oxide EUV resist on a substrate layer of a semiconductor substrate in a process chamber, the photopatterned metal oxide EUV resist comprising EUV-exposed portions and EUV-unexposed portions; b) calculating a stoichiometric amount of a halogen-containing etchant to decompose the EUV-unexposed portion of the photopatterned metal oxide EUV resist into water and a volatile metal halide; and c) dry developing the photopattemed metal oxide EUV resist by selectively removing the EUV-unexposed portions of the photopattemed metal oxide EUV resist by exposure to an amount of the halogen-containing etchant to form a resist hard mask from the EUV-exposed portion; wherein the amount of the halogen-containing etchant comprises less than 50 times of the stoichiometric amount calculated in step b); and wherein step c) is a plasma-free thermal process.

2. The method of claim 1, wherein the amount of the halogen-containing etchant is less than 10 times the stoichiometric amount.

3. The method of claim 1, wherein the amount of the halogen-containing etchant of step c) is supplied at a rate of about 300 seem to about 2,000 seem for about 1 to 15 seconds.

4. The method of claim 3, further comprising soaking the photopattemed metal oxide EUV resist in the amount of the halogen-containing etchant for about 1 to about 120 seconds.

5. The method of claim 1, wherein the process chamber comprises a pedestal, sidewalls and a showerhead.

6. The method of claim 5, wherein the sidewalls and the showerhead are maintained at a first temperature; and the pedestal is maintained at a second temperature, wherein the first temperature is higher than the second temperature.

7. The method of claim 1, wherein the photopatterned metal oxide EUV resist comprises an organotin oxide.

8. The method of claim 1, wherein the halogen-containing etchant is a hydrogen halide.

9. The method of claim 8, wherein the hydrogen halide is hydrogen bromide or hydrogen chloride.

10. The method of claim 1, wherein the halogen-containing etchant is trimethyl silyl chloride or trimethyl silyl bromide.

11. A method for recycling halogen-containing etchant from dry development of a resist comprising: a) providing a photopatterned metal oxide EUV resist on a substrate layer of a semiconductor substrate in a process chamber, the photopattemed metal oxide EUV resist comprising EUV-exposed portions and EUV-unexposed portions; b) dry developing the photopatterned metal oxide EUV resist by selectively removing the EUV-unexposed portions of the photopatterned metal oxide EUV resist by exposure to a halogen-containing etchant to form a resist hard mask from the EUV-exposed portion, whereby volatile byproducts and excess halogen-containing etchant are generated; c) removing the volatile byproducts and the excess halogen-containing etchant from the process chamber; d) purifying the excess halogen-containing etchant through condensation, absorption or a combination thereof to remove the volatile byproducts and reclaim the excess halogencontaining etchant, forming a reclaimed halogen-containing etchant; and e) returning the reclaimed halogen-containing etchant to the process chamber for reuse; and wherein step b) is a plasma-free thermal process.

12. The method of claim 11, wherein the volatile byproducts comprise water, a metal halide or a combination thereof.

13. The method of claim 11, wherein the photopatterned metal oxide EUV resist comprises an organotin oxide.

14. The method of claim 11, wherein the halogen-containing etchant is a hydrogen halide.

15. The method of claim 14, wherein the hydrogen halide is hydrogen bromide or hydrogen chloride.

16. The method of claim 11, wherein the halogen-containing etchant is trimethyl silyl chloride or trimethyl silyl bromide.

17. The method of claim 11, wherein exposure to a halogen-containing etchant of step b) is exposure to an amount comprising less than 50 times of a stoichiometric amount of a halogen-containing etchant calculated to decompose the EUV-unexposed portions of the photopattemed metal oxide EUV resist into water and a volatile metal halide.

18. A method of reclaiming halogen-containing etchant from dry development of a resist comprising: a) providing a photopatterned metal oxide EUV resist on a substrate layer of a semiconductor substrate in a process chamber, the photopattemed metal oxide EUV resist comprising EUV-exposed portions and EUV-unexposed portions; b) dry developing the photopatterned metal oxide EUV resist by selectively removing the EUV-unexposed portions of the photopatterned metal oxide EUV resist by exposure to a halogen-containing etchant to form a resist hard mask from the EUV-exposed portion, whereby impure excess halogen-containing etchant is generated, wherein the impure excess halogen-containing etchant is a halogen-containing etchant contaminated with volatile byproducts; c) removing the impure excess halogen-containing etchant from the process chamber; d) optionally separating the volatile byproducts from the halogen-containing etchant by condensation, absorption or a combination thereof; and e) collecting the impure excess halogen-containing etchant through condensation; and wherein step b) is a plasma-free thermal process.

19. The method of claim 18, wherein the excess impure halogen-containing etchant collected in step e) is purified for re-use.

20. The method of claim 18, wherein the volatile byproducts comprise water, a metal halide or a combination thereof.

21. The method of claim 18, wherein the photopatterned metal oxide EUV resist comprises an organotin oxide.

22. The method of claim 18, wherein the halogen-containing etchant is a hydrogen halide.

23. The method of claim 22, wherein the hydrogen halide is hydrogen bromide or hydrogen chloride.

24. The method of claim 18, wherein the halogen-containing etchant is trimethyl silyl chloride or trimethyl silyl bromide.

25. The method of claim 18, wherein exposure to the halogen-containing etchant of step b) is exposure to an amount comprising less than 50 times of a stoichiometric amount of a halogen-containing etchant calculated to decompose the EUV-unexposed portions of the photopattemed metal oxide EUV resist into water and a volatile metal halide.

26. A method for processing byproducts of dry development of a resist comprising: a) providing a photopatterned metal oxide EUV resist on a substrate layer of a semiconductor substrate in a process chamber operably linked to a vacuum pump, the photopattemed metal oxide EUV resist comprising EUV-exposed portions and EUV- unexposed portions; b) dry developing the photopattemed metal oxide EUV resist by selectively removing the EUV-unexposed portions of the photopattemed metal oxide EUV resist by exposure to a halogen-containing etchant to form a resist hard mask from the EUV-exposed portion, whereby volatile byproducts and excess halogen-containing etchant are generated and then expelled from the process chamber through an exhaust from the vacuum pump; and c) processing the exhaust from the vacuum pump to treat the volatile byproducts and excess halogen-containing etchant, forming neutralized byproducts and neutralizedhalogen-containing etchant; and wherein step b) is a plasma-free thermal process.

27. The method of claim 26, wherein step c) comprises exposing the exhaust to an alkaline spray treatment.

28. The method of claim 26, wherein the photopatterned metal oxide EUV resist comprises an organotin oxide.

29. The method of claim 26, wherein the halogen-containing etchant is a hydrogen halide.

30. The method of claim 29, wherein the hydrogen halide is hydrogen bromide or hydrogen chloride.

31. The method of claim 26, wherein the halogen-containing etchant is trimethyl silyl chloride or trimethyl silyl bromide.

32. The method of claim 26, wherein after step c), the neutralized halogen-containing etchant is converted to halogen-containing etchant for re-use in step b).

33. The method of claim 26, wherein exposure to a halogen-containing etchant of step b) is exposure to an amount comprising less than 50 times of a stoichiometric amount of a halogen-containing etchant calculated to decompose the EUV-unexposed portions of the photopattemed metal oxide EUV resist into water and a volatile metal halide.

34. An apparatus for recycling halogen-containing etchant during dry development of a resist comprising: a process chamber with a substrate support, a gas recirculation inlet and a gas recirculation outlet; a halogen-containing etchant delivery line coupled to the process chamber; at least a first condenser and a second condenser, the first condenser and the second condenser each individually coupled to the process chamber, the first condenser and the second condenser comprising an inner water absorbent liner material and an outer temperature-adjustable j acket; a recirculation line configured to connect the first condenser, the second condenser, the gasrecirculation inlet and the gas recirculation outlet; a gas agitation module connected to the recirculation line; a vacuum pump and a vacuum line coupled to the process chamber; and a controller configured with instructions for processing a semiconductor substrate, the instructions comprising code for: providing in the process chamber a photopattemed metal oxide EUV resist on a substrate; developing the photopattemed metal oxide EUV resist by selectively removing a portion of the resist by exposure to a halogen-containing etchant to form a resist mask; directing process gas and byproduct vapors from the process chamber to the first condenser or the second condenser; cooling the first condenser or the second condenser to trap water and form a purified halogen-containing etchant stream; and recirculating the purified halogen-containing etchant stream back into the process chamber through the recirculation line.

35. The apparatus of claim 34, wherein the gas agitation module is a magnetically coupled turbofan.

36. The apparatus of claim 34, wherein the first condenser is configured to receive process gas and byproduct vapors from the process chamber and wherein the first condenser is cooled.

37. The apparatus of claim 36, wherein the first condenser is cooled to collect water and recycle hydrogen halide while the second condenser is heated for cleaning.

38. The apparatus of claim 34, wherein the first condenser and the second condenser are operably linked to the vacuum pump.

39. The apparatus of claim 38, wherein the first condenser and the second condenser are upstream of the vacuum pump.

40. The apparatus of claim 34, wherein the inner water absorbent liner material comprises anhydrous aluminum oxide, silica gel, an aluminosilicate or a combination thereof.

41. An apparatus for reclaiming halogen-containing etchant during dry development of a resist comprising: a process chamber with a substrate support; a halogen-containing etchant delivery line coupled to the process chamber; a vacuum pump, the vacuum pump comprising a vacuum pump inlet line coupled to the process chamber and a vacuum pump outlet line for eliminating exhaust; at least one low temperature condenser coupled to the vacuum pump outlet line; and a controller configured with instructions for processing a semiconductor substrate, the instructions comprising code for: providing in the process chamber a photopattemed metal oxide EUV resist on a substrate; developing the photopattemed metal oxide EUV resist by selectively removing a portion of the resist by exposure to a halogen-containing etchant to form a resist mask; and directing exhaust from the process chamber from the vacuum pump outlet line to the low temperature condenser to collect excess halogen-containing etchant.

42. The apparatus of claim 41, further comprising a trap disposed between the vacuum pump and the low temperature condenser, wherein the trap is configured to collect liquid byproducts.

43. An apparatus for processing byproducts of dry development of a resist comprising: a process chamber with a substrate support; a halogen-containing etchant delivery line coupled to the process chamber; a vacuum pump, the vacuum pump comprising a vacuum pump inlet line coupled to the process chamber and a vacuum pump outlet line for eliminating exhaust; an abatement module coupled to the vacuum pump outlet line; and a controller configured with instructions for processing a semiconductor substrate, the instructions comprising code for: providing in the process chamber a photopattemed metal oxide EUV resist on a substrate; developing the photopattemed metal oxide EUV resist by selectively removing a portion of the resist by exposure to a halogen-containing etchant to form a resist mask; anddirecting exhaust from the process chamber from the vacuum pump outlet line to the abatement module to neutralize byproducts.

44. The apparatus of claim 43, wherein the abatement module is an alkaline spray treatment system.

45. The apparatus of claim 43, wherein the byproducts comprise halogen-containing etchant.

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