Computing device, computing system, and optical module

Abstract

Provided is a computing device, comprising: a printed circuit board (PCB), a computing chip, and one or more optical modules. The computing chip is arranged on the PCB, and comprises one or more input / output high-speed interfaces. Each input / output high-speed interface has one or more input high-speed ports and one or more output high-speed ports. Each output high-speed port performs parallel-to-serial conversion on a parallel signal in the computing chip to output a first electrical signal, and each input high-speed port performs serial-to-parallel conversion on a received second electrical signal serving as a high-speed serial signal. The one or more optical modules are arranged on the PCB, and each port in an electrical input / output interface of each optical module is electrically connected to a corresponding input or output high-speed port in the computing chip by means of wiring in the PCB. Each optical module converts the received first electrical signal into a first optical signal and converts a received second optical signal into the second electrical signal.

Description

Computing device, computing system, and optical module

[0001] This application claims priority to Chinese Patent Application No. 202311281913.0 filed on September 28, 2023, and the contents of the above-mentioned Chinese patent application disclosure are hereby incorporated by reference in their entirety as a part of this application. Technical Field

[0002] The present disclosure relates to the fields of communications and computing, and in particular to a computing device, a computing system, and an optical module used for the computing device and the computing system. Background Art

[0003] As AI accelerators continue to gain computing power through various process iterations and chip architecture innovations, the interconnection bandwidth between AI accelerators is also growing. Data from artificial intelligence research company OpenAI shows that the computational load of AI models is currently growing at a rate far exceeding the growth rate of computing hardware computing power.

[0004] AI accelerator interconnect networks have become critical to improving overall computing capabilities. The Open Compute Project (OCP) has launched the universal form factor OCP Accelerator Module (OAM), which has been adopted by leading GPU vendors. Currently, communication between mainstream universal form factor OCP accelerator modules typically involves point-to-point interconnection between eight computing devices via PCB traces (as shown in Figure 1). Due to the need for long PCB traces, computing devices generally require a long-range (LR) SerDes interface similar to the CEI (Common Electrical I / O).

[0005] For example, for the fully connected configuration shown in Figure 1, each SerDes interface needs to access a specific single computing device, which reduces the bandwidth between each pair of computing devices. For example, in the case of the fully interconnected eight computing chips shown in Figure 1, each computing chip needs to be equipped with seven SerDes high-speed interfaces. The transmission bandwidth of each SerDes high-speed interface is 1 / 7 of the I / O bandwidth of computing chip 300. In other words, the bandwidth transmitted from the first computing chip to any other technology chip will be 1 / 7 of the I / O bandwidth of computing chip 300, which cannot achieve 100% IO bandwidth transmission. In addition, this rigid wiring method is not conducive to flexible bandwidth configuration.

[0006] In addition, due to the limitation of transmission distance on PCB board, the computing scale of a single computing node is generally limited to 8 computing devices.

[0007] Furthermore, because the response of electrical channels attenuates as signal rates increase, higher-speed interfaces often involve more complex architectures and circuit designs, which incur latency penalties, consume more power, and occupy a larger chip area, thereby limiting chip I / O bandwidth. Furthermore, longer metal wiring distances further increase circuit losses, limiting the interconnect distances between AI accelerators.

[0008] Summary of the Invention

[0009] Using optical interconnects for data transmission between computing devices or AI accelerators is beneficial. Compared to electrical interconnects, optical channel loss remains constant across frequencies, and the loss is very small, allowing optical interconnects to support longer transmission distances. Combining optical modules with optical switching can even out bandwidth within and between computing devices, facilitating the implementation of large-scale computing systems.

[0010] Therefore, in order to solve the above problems, the present disclosure proposes various modules, devices and systems that can use optical interconnection to achieve large-scale computing.

[0011] In one aspect, the present disclosure provides a computing device. The computing device includes: a PCB board; a computing chip arranged on the PCB board, the computing chip including one or more high-speed input and output interfaces, wherein each high-speed input and output interface has one or more high-speed input ports and one or more high-speed output ports, each high-speed output port performs parallel-to-serial conversion on a parallel signal within the computing chip to output a first electrical signal, and each high-speed input port performs serial-to-parallel conversion on a received second electrical signal as a high-speed serial signal; and one or more optical modules arranged on the PCB board, each optical module including an electrical input and output interface and an optical input and output interface, the electrical input and output interface including at least one electrical input port and at least one electrical output port, and the optical input and output ports including at least one optical input port and at least one optical output port. Each of the at least one electrical input port is electrically connected to a corresponding one of the one or more high-speed output ports via wiring in the PCB board, and each of the at least one electrical output port is electrically connected to a corresponding one of the one or more high-speed input ports via wiring in the PCB board. Each optical module converts the first electrical signal received from each of the at least one electrical input port into a first optical signal output from one of the at least one optical output ports, and converts the second optical signal received from each of the at least one optical input port into a second electrical signal and outputs the second electrical signal.

[0012] In some embodiments, the number of output high-speed ports of the computing chip is equal to the total number of electrical input ports of the one or more optical modules, and the number of input high-speed ports of the computing chip is equal to the total number of electrical output ports of the one or more optical modules.

[0013] In some embodiments, the computing device further includes at least one high bandwidth memory (HBM) unit, the at least one HBM unit and the computing chip are packaged on a substrate, and the substrate is arranged on the PCB board.

[0014] In some embodiments, the at least one HBM unit and the computing chip are packaged on the substrate via an interposer.

[0015] In some embodiments, the computing chip is an artificial intelligence chip.

[0016] Another aspect of the present disclosure provides a computing system. The computing system includes: a plurality of computing devices as described above; and at least one optical switch. Each computing device is optically interconnected with at least some of the at least one optical switch via a corresponding optical module in each computing device. At least some of the plurality of computing devices are optically interconnected with each other via the at least one optical switch.

[0017] In some embodiments, the at least one optical switch is capable of reconfiguring optical links between the plurality of computing devices so that any two computing devices among the plurality of computing devices can communicate with each other.

[0018] In some embodiments, the at least one optical switch is capable of establishing optical links between all optical modules in the first computing device and optical modules in the second computing device, so that the first computing device communicates with the second computing device.

[0019] In some embodiments, the at least one optical switch is capable of establishing an optical link between some optical modules in the first computing device and the optical modules in the second computing device, and establishing an optical link between the remaining optical modules in the first computing device and the optical modules in the third computing device, so that the first computing device communicates with the second computing device and the third computing device simultaneously.

[0020] On the other hand, the present disclosure provides an optical module, comprising: an electrical input / output interface; an optical input / output interface; a light emitting unit, for converting an input electrical signal received from the electrical input / output interface into an output optical signal; a light receiving unit, for converting an input optical signal received from the optical input / output interface into an output electrical signal; and a control unit, for controlling the light emitting unit to convert the input electrical signal into the output optical signal, and controlling the light receiving unit to convert the input optical signal into the output electrical signal, wherein the optical module does not perform communication protocol conversion processing on the input electrical signal and the output electrical signal.

[0021] In some embodiments, the light emitting unit includes a light emitter and a driver, and wherein the light emitter is a directly modulated laser, and the control unit controls the intensity of the light signal emitted by the light emitting unit by controlling the electrical signal provided by the driver to form the output light signal.

[0022] In some embodiments, the light emitting unit includes a light emitter and a driver, and the light emitter is an externally modulated laser, and the light emitting unit also includes a modulator, and the control unit modulates the light received from the light emitter by controlling the electrical signal input to the modulator to form the output light signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG1 shows a schematic diagram of point-to-point full interconnection between multiple computing devices in a traditional computing system through PCB wiring.

[0024] 2A-2B illustrate schematic diagrams of example configurations of computing devices according to embodiments of the present disclosure.

[0025] 3A-3B are schematic diagrams illustrating another example configuration of a computing device according to an embodiment of the present disclosure.

[0026] 4A-4C illustrate schematic diagrams of example configurations of computing systems according to embodiments of the present disclosure.

[0027] 5A-5C are schematic diagrams illustrating example configurations of optical modules according to embodiments of the present disclosure. DETAILED DESCRIPTION

[0028] The following describes embodiments of the present disclosure in more detail with reference to the accompanying drawings. Although some embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure should not be construed as being limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of protection of the present disclosure.

[0029] It should be noted that the various parts or components described in the various embodiments of the present disclosure are merely illustrative. In some cases, some of the parts or components may be omitted, or replaced with other parts or components with the same or similar functions, or additional parts or components may be added.

[0030] In addition, the various components or assemblies described in the various embodiments of the present disclosure as being separated or combined with each other are merely for convenience of description and do not imply that they are physically separated or combined with each other, nor do they imply that such separation or combination is required. Those skilled in the art may arbitrarily separate or combine the various components or assemblies according to actual needs.

[0031] Without departing from the inventive concept of the present disclosure, any modifications or combinations described above fall within the protection scope of the present disclosure.

[0032] To address the various issues associated with traditional computing device electrical interconnection via PCB wiring, this disclosure proposes a computing device with a novel direct-drive optical module. In this computing device, the optical module is co-located on the same PCB as the computing chip, and the direct-drive optical module connects directly to the computing chip's high-speed interface without any physical or protocol layer conversion.

[0033] Since there is no conversion at the protocol layer and physical layer, the delay required for communication will be greatly reduced. In addition, combined with optical switches, the transmission bandwidth of the computing chip can be flexibly configured, so that the transmission bandwidth is no longer restricted by various protocols.

[0034] This new type of direct-drive optical module eliminates the need for a retimer, and the number of ports and channels in the optical module can match the number of ports in the computing chip's high-speed I / O interface. By directly connecting the computing chip and the direct-drive optical module, the high-speed electrical signals on the computing chip can be directly transmitted to the direct-drive optical module, where they are then converted from electrical to optical / photoelectrical signals by the components in the module.

[0035] 2A-2B illustrate schematic diagrams of an example configuration of a computing device 2000 according to an embodiment of the present disclosure, wherein FIG2A illustrates a top view of the example configuration of the computing device 2000, and FIG2B illustrates a cross-sectional view of the example configuration of the computing device 2000.

[0036] 2A or 2B , the computing device 2000 includes one or more optical modules 100 and a computing chip 300 . The one or more optical modules 100 and the computing chip 300 are arranged in the same PCB board 500 .

[0037] Each optical module 100 includes an electrical input / output interface and an optical input / output interface. The electrical input / output interface (e.g., the interface connected to wiring 304) includes at least one electrical input port and at least one electrical output port, or may be collectively referred to as an electrical input / output port. The optical input / output interface (e.g., the interface connected to optical fiber 200) includes at least one optical input port and at least one optical output port, or may be collectively referred to as an optical input / output port. For simplicity, FIG2A does not show further details or the specific number of each port of the optical module 100.

[0038] The computing chip 300 and each optical module 300 are arranged on the same PCB board 500, and the computing chip 300 includes one or more input and output high-speed interfaces (e.g., long-distance SerDes interfaces). Each input and output high-speed interface has one or more input high-speed ports and one or more output high-speed ports. For simplicity, FIG2A only exemplarily shows four input and output high-speed interfaces (e.g., interfaces connected to the wiring 304) of the computing chip 300, and the ports (not shown) in each input and output high-speed interface are respectively connected to the corresponding ports in the electrical input and output interfaces of each optical module 100. Optionally, the computing chip 300 can be mounted on the PCB board 500 through the substrate 400.

[0039] In some embodiments, the computing chip 300 can be an artificial intelligence chip, for example, including but not limited to a graphics processing unit (GPU), a neural network processor (NPU), a tensor processing unit (TPU), an intelligent processing unit (IPU), a deep learning processor (DPU), etc.

[0040] It should be noted that the four high-speed input and output interfaces of the computing chip 300 shown above correspond to four optical modules for ease of description only. In actual applications, any number of high-speed input and output interfaces can be configured for the computing chip 300 based on specific needs, and any number of high-speed input ports and high-speed output ports can be configured for each high-speed input and output interface.

[0041] In the present disclosure, each high-speed output port of the computing chip 300 performs parallel-to-serial conversion on parallel signals within the computing chip 300 to output a first electrical signal (not shown). This first electrical signal is provided to a corresponding electrical input port of the corresponding optical module 100 for optical-to-electrical conversion. The parallel-to-serial conversion operation can be performed, for example, by a serializer (a SERializer circuit in a SerDes interface), thereby converting multiple low-speed parallel signals within the computing chip 300 into high-speed serial signals.

[0042] In addition, each high-speed input port of the computing chip 300 performs serial-to-parallel conversion (not shown) on the second electrical signal received as a high-speed serial signal from the optical module 100, thereby converting the high-speed serial signal back into a low-speed parallel signal for use by the computing chip 300. The serial-to-parallel conversion operation can be performed, for example, by a deserializer (DESerializer circuit in a SerDes interface), thereby converting the high-speed serial signal within the computing chip 300 into a low-speed parallel signal.

[0043] Each of the at least one electrical input port of each optical module 100 is electrically connected to one of the one or more output high-speed ports of the computing chip 300 through the wiring 304 in the PCB board 500, and each of the at least one electrical output port of each optical module 100 is electrically connected to one of the one or more input high-speed ports of the computing chip 300 through the wiring 304 in the PCB board 500.

[0044] That is, the high-speed serial signal (e.g., the first electrical signal described above) output from the electrical chip 300 is provided to the electrical input port of the optical module 100 via the wiring 304 in the PCB 500. Similarly, the high-speed serial signal (e.g., the second electrical signal described above) output from the electrical output port of the optical module 100 is also provided to the electrical chip 300 via the wiring 304 in the PCB 500.

[0045] It should be noted that the wiring 304 in the PCB board 500 is a general term for the electrical connection wiring between the optical module 100 and the computing chip 300, and is not intended to represent a specific wiring.

[0046] Functionally, each optical module 100 is used to perform electrical-to-optical conversion and optical-to-electrical conversion.

[0047] For example, the optical module 100 converts a first electrical signal received from each of the at least one electrical input port into a first optical signal output from one of the at least one optical output port. The first electrical signal is a high-speed serial electrical signal that the computing chip 300 directly transmits to the optical module 100 via the wiring 304 in the PCB board 500.

[0048] In addition, each optical module 100 converts the second optical signal received from each of the at least one optical input port into a second electrical signal and outputs the second electrical signal. This second electrical signal is also a high-speed serial electrical signal, which is provided to the computing chip 300 via the wiring 304 in the PCB board 500. It is then serial-to-parallel converted via the input high-speed port of the computing chip 300 to be converted into multiple parallel signals for further calculation or other processing by the computing chip 300.

[0049] For example, the optical module 100 may functionally include a light emitting unit, a light receiving unit, and a control unit. The light emitting unit is used to convert a received electrical signal into an optical signal, and the light receiving unit is used to convert a received optical signal into an electrical signal. The function of the control unit is to control the operation of the light emitting unit and the light receiving unit. For example, the control unit may control the light emitting unit to convert an electrical signal into an optical signal, and control the light receiving unit to convert an optical signal into an electrical signal.

[0050] More details about the optical module 100 will be further described later in conjunction with Figures 5A-5C.

[0051] It should be noted that the input and output signals of each optical module 100 use the protocol of the computing chip 300. That is, the computing chip 300 and each optical module 100 do not perform communication protocol conversion processing on their input and output electrical signals.

[0052] In other words, the first electrical signal is obtained by parallel-to-serial conversion of an electrical signal directly obtained from the computing chip 300 and conforming to its own protocol, and is directly output from the high-speed output port of the computing chip 300. This first electrical signal is then provided to the electrical input port of the optical module 100 via the wiring 304 in the PCB board 500. The computing chip 300 does not need to perform any physical layer or protocol layer (e.g., PCIe protocol, Ethernet protocol, etc.) conversion on this first electrical signal and directly outputs it.

[0053] Similarly, after the optical module 100 receives the first electrical signal at the corresponding electrical input port, it does not perform any physical layer and protocol layer (for example, PCIe protocol, Ethernet protocol, etc.) conversion on the first electrical signal, but directly performs electrical-to-optical conversion on the first electrical signal, thereby outputting the converted first optical signal at the corresponding optical output port.

[0054] Similarly, after converting the second optical signal received from the optical input port into a second electrical signal, the optical module 100 does not perform any physical layer and protocol layer conversion on the second electrical signal, but directly outputs the second electrical signal through the electrical output port of the optical module 100, and the directly output second electrical signal is transmitted through the wiring 304 in the PCB board 500 and provided to the corresponding input high-speed port of the computing chip 300.

[0055] After receiving the second electrical signal at the corresponding input high-speed port, the computing chip 300 performs no physical layer or protocol layer conversion on the second electrical signal except for the serial-to-parallel conversion as described above.

[0056] In other words, the electrical signals in the optical module 100 (including the first input electrical signal and the second output electrical signal) and the electrical signals input or output by the computing chip 300 (including the first output electrical signal and the second input electrical signal) are all electrical signals of the same computing chip's own protocol. They have not been converted or processed by physical interfaces (e.g., PCIe physical interfaces) or network cards (e.g., Ethernet cards) of various standard protocols at either end, nor have they been subjected to various data encapsulation, conversion, and other operations at the protocol layer at either end. In other words, the signals between the optical module 100 and the computing chip 300 are mutually transparent. Without considering inherent transmission losses or signal micro-deformations, the electrical signals provided to and received by each other by the optical module 100 and the computing chip 300 are consistent in terms of bandwidth and transmission rate.

[0057] Through this direct, transparent transmission of electrical signals via PCB wiring, the latency required to transmit data between the computing chip 300 and the optical module 100 is significantly reduced. Furthermore, through proper wiring, the loss and noise of the PCB wiring 304 can be minimized, further ensuring the signal-to-noise ratio requirements of the computing device.

[0058] Furthermore, due to this direct, transparent transmission of electrical signals, there is no need for a traditional retimer on the optical module 100 to recover the clock, nor is there a need for a traditional analog-to-digital converter (ADC) or digital-to-analog converter (DAC) within the optical module 100 to further convert the input or output electrical signals. Furthermore, because the computing chips 300 are directly connected via the optical module 100, using their own proprietary protocols, there is no need to transmit control signals, significantly simplifying the design of the computing device and the optical module 100.

[0059] In addition, since no protocol conversion is introduced, the transmission bandwidth of the computing chip 300 can be flexibly configured in combination with the optical switch, and the number of optical modules 100 or the number of signal channels in a single optical module 100 can be adaptively designed according to the transmission bandwidth and number of channels of the computing chip 300, so that the number of ports or the number of channels in the input and output high-speed interfaces of the computing chip 300 can be matched with the number of electrical ports or the number of channels of one or more optical modules 300 (i.e., equal), thereby achieving a more compact packaging structure.

[0060] For example, in some embodiments, the number of output high-speed ports of the computing chip 300 can be equal to the total number of electrical input ports of one or more optical modules 100, and the number of input high-speed ports of the computing chip 300 can be equal to the total number of electrical output ports of one or more optical modules 100.

[0061] Assume that each high-speed input and output interface of computing chip 300 has eight high-speed input ports and eight high-speed output ports. If the total input or output bandwidth of computing chip 300 is 400 Gb / s, this means that the computing chip can transmit 400 Gbits of data per second. Furthermore, assume that computing chip 300 is configured with a total of four high-speed input and output interfaces, and that the total bandwidth of 400 Gb / s is evenly distributed among these four high-speed input and output interfaces.

[0062] In this case, four optical modules 100 can be configured for the computing chip 300, and each optical module has eight electrical input ports and eight electrical output ports. The electrical input ports of the optical modules 100 are connected one-to-one with the high-speed output ports of the computing chip 300, and the electrical output ports of the optical modules 100 are connected one-to-one with the high-speed input ports of the computing chip 300. Therefore, each optical module 100 can perform electrical-to-optical conversion or optical-to-electrical conversion on 100 Gb / s data.

[0063] Alternatively, assuming that each high-speed input and output interface of the computing chip 300 has four high-speed input ports and four high-speed output ports, and that the computing chip 300 is configured with a total of eight high-speed input and output interfaces, the total bandwidth of the computing chip will be evenly distributed among these eight high-speed input and output interfaces. In this case, eight optical modules 100 can be configured for the computing chip 300, each with four electrical input ports and four electrical output ports.

[0064] Alternatively, assuming that each high-speed input and output interface of the computing chip 300 has 16 high-speed input ports and 16 high-speed output ports, and the computing chip 300 is configured with two high-speed input and output interfaces in total, the total bandwidth of the computing chip will be evenly distributed between the two high-speed input and output interfaces. In this case, two optical modules 100 can be configured for the computing chip 300, each with 16 electrical input ports and 16 electrical output ports.

[0065] In the above example, the total number of high-speed output ports (8x4) of the computing chip 300 and the total number of electrical input ports (8x4) of the four optical modules 100 are equal and have a one-to-one correspondence. Similarly, the total number of high-speed input ports (8x4) of the computing chip 300 and the total number of electrical output ports (8x4) of the four optical modules 100 are also equal and have a one-to-one correspondence. This allows the number of ports of the optical modules 100 to be adaptively designed to match the number of ports of the computing chip, avoiding the existence of some idle or redundant ports, thereby reducing the overall size of the optical modules.

[0066] It should be noted that the number of input high-speed ports or output high-speed ports of the computing chip 300 mentioned above refers to the number of high-speed ports connected to the optical module 100. This does not mean that the computing chip 300 only includes input or output high-speed ports connected to the optical module 100 and excludes other types of high-speed ports. In actual applications, input or output high-speed ports for other purposes may also exist in the computing chip 300.

[0067] An embodiment of a computing device 2000 including a computing chip 300 and one or more optical modules 100 is introduced above.

[0068] In some embodiments, the computing device proposed in the present disclosure may also include other elements and components. Figures 3A-3B show schematic diagrams of an example configuration of a computing device 3000 according to an embodiment of the present disclosure. As shown in Figure 3A or 3B, in addition to the computing chip 300 and one or more optical modules 100 shown in Figures 2A-2B, the computing device 3000 also includes at least one high-bandwidth memory (HBM) unit 302. For example, the HBM unit can cooperate with the computing chip 300 to perform various cache or storage functions.

[0069] In some embodiments, the plurality of HBM units 302 may be disposed on the substrate 400 together with the computing chip 300. Alternatively, the plurality of HBM units may be disposed on the substrate 400 and located on both sides of the computing chip 300.

[0070] Alternatively, multiple HBM units 302 and computing chip 300 may be packaged on substrate 400 via interposer 303, and substrate 400 may be placed on PCB 500, as shown in FIG3B . Interposer 303 may be an adapter plate having various wiring and conductive structures, which may provide an electrical connection path between the multiple HBM units 302 and computing chip 300 placed thereon.

[0071] Other details of the computing device 3000 are similar to those of the computing device 2000 in Figures 2A-2B and are not repeated here.

[0072] Based on the various computing devices described above, the present disclosure also proposes a computing system including the various computing devices.

[0073] Since in the various computing devices described above, the optical signal obtained by the electrical-to-optical conversion of the onboard direct-drive optical module can be directly connected to the onboard direct-drive optical module of another computing device through optical fiber transmission, or can be connected to the onboard direct-drive optical module of another computing device through an optical switch port, the reconstruction of the optical path between different computing devices can be easily achieved.

[0074] In this reconfigurable optical path configuration, high-speed electrical signals on a computing chip in one computing device can reach computing chips in other computing devices with minimal delay because they do not pass through any electrical switches.

[0075] Based on this configuration, multiple computing devices can be interconnected through a series of onboard direct-drive optical modules and a series of optical switches for all-optical switching and reconfigurable full connectivity, avoiding the dilution of transmission bandwidth caused by the point-to-point interconnection based on PBC wiring shown in Figure 1, and can be used to accelerate artificial intelligence computing.

[0076] In addition, since both onboard direct-drive optical modules and optical switches have the advantages of protocol transparency and low latency, fully reconfigurable interconnection between computing devices can achieve the goals of long distance, high bandwidth and low latency.

[0077] 4A-4C illustrate schematic diagrams of an example configuration of a computing system 4000 according to an embodiment of the present disclosure.

[0078] As shown in FIG. 4A-4C , the computing system 4000 includes a plurality of computing devices ( 1000 - 1 , 1000 - 2 , 1000 - 3 , . . . , 1000 -N) as described above and at least one optical switch 600 .

[0079] At least one optical switch 600 can control the optical path based on different physical principles, including piezoelectric, micro-electromechanical, electro-optical, etc. For example, each optical switch 600 can be composed of a series of free-space optical components or a series of integrated optical components.

[0080] As shown in the figure, each computing device (1000-1, 1000-2, 1000-3, ..., or 1000-N) is optically interconnected with at least some of the optical switches in at least one optical switch 600 through the corresponding optical module 100 in each computing device (for example, through optical fiber 200).

[0081] In such a configuration, at least some of the multiple computing devices can be optically interconnected through corresponding optical switches.

[0082] In some embodiments, at least one optical switch 600 can reconfigure optical links between multiple computing devices ( 1000 - 1 , 1000 - 2 , 1000 - 3 , . . . , 1000 -N) to enable communication between any two of the multiple computing devices.

[0083] For example, the various computing devices (1000-1, 1000-2, 1000-3, ..., 1000-N) shown in the figure can rearrange the bandwidth transmission path through optical path switching in the optical switch 600 to achieve fully reconfigurable full interconnection between each other.

[0084] Assume that the computing system 4000 includes 8 computing devices (i.e., N=8), and each computing device is provided with 4 high-speed interfaces, such as optical input and output interfaces of 4 optical modules. In this case, the optical paths between these 8 computing devices can be reconstructed through one or more (4 in the example of the present invention) optical switches 600, and the data output by the 4 high-speed interfaces of each computing device can be arranged through the corresponding optical switches so that all the data output by the 4 high-speed interfaces are transmitted to the target computing device. Alternatively, each computing device can receive all output data from the target computing device. Therefore, the transmission bandwidth of each computing device in this architecture can be 100% of the I / O bandwidth of the computing chip 300 in the computing device.

[0085] For example, FIG4B shows a schematic diagram of a full interconnection between the first computing device 1000-1 and the second computing device 1000-2.

[0086] As shown in the figure, each computing device includes a computing chip 300 and four corresponding optical modules 100. A first optical switch in at least one optical switch 600 can establish an optical link between a first optical module in a first computing device 1000-1 and a first optical module in a second computing device 1000-2. A second optical switch can establish an optical link between a second optical module in the first computing device 1000-1 and a second optical module in the second computing device 1000-2. A third optical switch can establish an optical link between a third optical module in the first computing device 1000-1 and a third optical module in the second computing device 1000-2. A fourth optical switch can establish an optical link between a fourth optical module in the first computing device 1000-1 and a fourth optical module in the second computing device 1000-2. The reconstructed optical links between the optical modules are represented by black dashed arrows in the figure. For example, establishing an optical link can be achieved by changing the arrangement of optical elements within each optical switch (e.g., changing the angle of a reflector) to achieve the target optical link.

[0087] In this case, an optical link is established between the optical input and output interfaces of all optical modules in the first computing device 1000-1 and the optical input and output interfaces of all optical modules in the second computing device 1000-2, so that the first computing device 1000-1 can communicate with the second computing device 1000-2.

[0088] Assuming the total input / output bandwidth of the computing chips 300 of the first computing device 1000-1 and the second computing device 1000-2 is 400 Gb / s, the above configuration can allocate 100 Gb / s of data bandwidth to each optical module 100. When optical links are established between the optical input / output interfaces of all optical modules in the first computing device 1000-1 and the optical input / output interfaces of all optical modules in the second computing device 1000-2, enabling communication between the first computing device 1000-1 and the second computing device 1000-2, the total communication bandwidth between the first computing device 1000-1 and the second computing device 1000-2 will be 400 Gb / s, i.e., 100% of the I / O bandwidth of the computing chips 300 in the computing devices.

[0089] As mentioned above, in the case where the eight computing devices shown in Figure 1 are fully interconnected using PCB wiring, each computing device is provided with seven high-speed interfaces, and the transmission bandwidth of each high-speed interface is 1 / 7 of the I / O bandwidth of the computing chip 300 of the computing device, that is, the bandwidth transmitted from the first computing device to any other computing device is 1 / 7 of the I / O bandwidth of the computing chip 300. That is, the bandwidth transmitted from the first computing device to any other computing device is 1 / 7 of the I / O bandwidth of the computing chip 300.

[0090] In contrast, the optical interconnection solution proposed in the present disclosure can achieve a bandwidth of 100% of the I / O bandwidth of the computing chip 300 transmitted from the first computing device to any other computing device.

[0091] 4B shows an example of a first computing device 1000-1 and a second computing device 1000-2 being fully interconnected to achieve 100% bandwidth communication. In some other examples, the first computing device 1000-1 and the second computing device 1000-2 do not need to be fully interconnected, but may be partially interconnected to achieve more flexible bandwidth configuration.

[0092] For example, FIG4C shows a schematic diagram of a partial interconnection between the first computing device 1000-1 and the second computing device 1000-2.

[0093] As shown in the figure, similar to FIG4A , each computing device includes a computing chip 300 and four corresponding optical modules 100. A first optical switch in at least one optical switch 600 establishes an optical link between a first optical module in a first computing device 1000-1 and a first optical module in a second computing device 1000-2, and a second optical switch establishes an optical link between a second optical module in the first computing device 1000-1 and a second optical module in the second computing device 1000-2, as indicated by black dashed arrows.

[0094] Unlike Figure 4B, in Figure 4C, the third optical switch establishes an optical link between the third optical module in the first computing device 1000-1 and the third optical module in the third computing device 1000-3, instead of establishing an optical link between the third optical module in the first computing device 1000-1 and the third optical module in the second computing device 1000-2, and the fourth optical switch establishes an optical link between the fourth optical module in the first computing device 1000-1 and the fourth optical module in the third computing device 1000-3, instead of establishing an optical link between the fourth optical module in the first computing device 1000-1 and the fourth optical module in the second computing device 1000-2.

[0095] In this manner, first computing device 1000-1 and second computing device 1000-2 can communicate using only a portion of the bandwidth, for example, the portion of the bandwidth allocated to the first and second optical modules, which may represent, for example, 50% of the I / O bandwidth of computing chip 300. Simultaneously, first computing device 1000-1 and third computing device 1000-3 can communicate using the remaining portion of the bandwidth, for example, the portion of the bandwidth allocated to the third and fourth optical modules, which may also represent 50% of the I / O bandwidth of computing chip 300.

[0096] This flexible reconstruction method can enable the first computing device 1000-1 to communicate with the second computing device 1000-2 and the third computing device 1000-3 at the same time, increasing the flexibility and freedom of the computing system.

[0097] It should be noted that although FIG4A-4C shows a computing device 3000 similar to FIG3A-3B, this is merely exemplary. The computing device 2000 described in FIG2A-2B and its various variations are also applicable to the computing system described in FIG4A-4C.

[0098] In addition, the number of optical modules in the computing device, the number of computing devices in the computing system, and the number of optical switches in the computing system shown in the above examples are merely exemplary and not limiting.

[0099] In the computing system of Figures 4A-4C, the computing chips are interconnected through the above-mentioned optical modules and optical switches, breaking through the distance limitation of PCB trace interconnection and the number limitation of computing chips, so that the interconnected computing chips in the computing system can be configured arbitrarily as needed.

[0100] The optical module disclosed herein can directly convert the electrical signals output by the computing chip into optical signals, and can also transmit the converted electrical signals directly to the computing chip without the need for protocol conversion, significantly reducing system latency. Since the electrical signals processed by the computing chip are transmitted to the optical module for electrical-optical conversion, then to another optical module for photoelectric conversion, and then to another computing chip for signal processing, the entire process does not require protocol conversion. Therefore, during point-to-point communication between different computing chips, there is no need to transmit control signals, greatly simplifying the design of the computing system.

[0101] Those skilled in the art can easily think of other similar arrangements without departing from the design concept of the present disclosure. For example, more (for example, 5, 6 or more) or fewer (for example, 1, 2, or 3) optical modules can be set in the computing device, and more (for example, 9, 10 or more) or fewer (for example, 7, 6 or less) computing devices or optical switches can be arranged in the computing system.

[0102] An embodiment of the optical module 100 used in the computing device or computing system described above will be described below with reference to FIG. 5A to FIG. 5C .

[0103] FIG5A is a schematic diagram showing the overall configuration of the optical module 100 according to an embodiment of the present disclosure.

[0104] As shown in FIG. 5A , the optical module 100 functionally includes an electrical input / output interface EI / O, an optical input / output interface OI / O, a light emitting unit 101 , a light receiving unit 102 , and a control unit 103 .

[0105] The optical transmission unit 101 may also be called a TX unit, and is used to convert an input electrical signal 110 received from the electrical input / output interface EI / O into an output optical signal 120 , ie, perform electrical-to-optical conversion (also called EO conversion).

[0106] The optical receiving unit 102 may also be referred to as an RX unit, and is configured to convert an input optical signal 210 received from the optical input / output interface OI / O into an output electrical signal 220 , ie, perform optical-to-electrical conversion (also referred to as OE conversion).

[0107] The control unit 103 may be any type of controller or microcontroller, configured to control the optical emitting unit 101 to perform EO conversion of the input electrical signal 110 into the output optical signal 120. Similarly, the control unit 103 may also control the optical receiving unit 102 to perform OE conversion of the input optical signal 210 into the output electrical signal 220.

[0108] As mentioned above, the optical module proposed in the present disclosure does not perform communication protocol conversion processing on the input electrical signal and the output electrical signal.

[0109] That is, after the optical module 100 receives the input electrical signal 110 at the electrical input / output interface EI / O, it does not perform any physical layer and protocol layer conversion on the input electrical signal 110, but directly performs electrical-to-optical conversion on the input electrical signal 110, thereby outputting the converted output optical signal 120 in the corresponding optical input / output interface OI / O.

[0110] Similarly, after converting the input optical signal 210 received from the optical input / output interface OI / O into the output electrical signal 220 , the optical module 100 does not perform any physical layer and protocol layer conversion on the output electrical signal 220 , but directly outputs the output electrical signal 220 through the electrical input / output interface EI / O of the optical module 100 .

[0111] For example, the optical module 100 does not include any physical interface of a standard protocol (e.g., a PCIe physical interface), nor does it perform data encapsulation / decapsulation, conversion, and other operations of various protocol layers on the input electrical signal 110 or the output electrical signal 220. Instead, it only performs electrical-to-optical conversion or optical-to-electrical conversion on the signal.

[0112] In some embodiments, in the EO conversion direction, the input electrical signal 110 can be an electrical signal from an external device, using the external device's own protocol without protocol conversion, for example, an electrical signal from any external computing device, storage device, communication device, etc. Furthermore, the electrical signal 220 output from the optical module 100 can be provided to the same external device.

[0113] Converting the received input electrical signal 110 into the output optical signal 120 as described above actually means loading the information carried by the input electrical signal 110 onto the output optical signal 120 in a modulated manner.

[0114] Accordingly, in the direction of OE conversion, the input optical signal 210 may also be an optical signal from an external device. In addition, the optical signal 120 output from the optical module 100 may also be provided to the same external device.

[0115] For example, the external device can provide an input optical signal 210 to the optical module 100 via an optical fiber. The input optical signal 210 can carry specific information (e.g., "information A"). In other words, the input optical signal 210 can carry "information A" using a certain modulation technique. The optical receiving unit 102 in the optical module 100 performs OE conversion on the optical signal carrying "information A" to obtain an electrical signal carrying the same "information A." This output electrical signal can then be provided to the external device described above, such as the computing chip described above.

[0116] Some examples of the internal configuration of the optical module without performing communication protocol conversion proposed in the present disclosure will be described below with reference to FIG. 5B to FIG. 5C .

[0117] Fig. 5B shows a structural diagram of an example of an optical module 100 according to an embodiment of the present disclosure. It should be noted that the optical module 100 shown in Fig. 5B can be regarded as a more detailed embodiment of the optical module 100 shown in Fig. 5A.

[0118] For example, the light emitting unit 101 shown in FIG5A may include a light emitter 101A and a driver 101 - 2 as shown in FIG5B , wherein the driver 101 - 2 is configured to drive the light emitter 101A to emit a light signal as the output light signal 120 .

[0119] In addition, the light receiving unit 102 shown in FIG5A may include a light detector 102-1 and an amplifier 102-2 as shown in FIG5B . The light detector 102-1 may convert the detected input light signal 210 into an electrical signal, and the amplifier 102-2 may amplify the converted electrical signal and then output the amplified electrical signal as an output electrical signal 220.

[0120] The optical transmitter 101A shown in FIG. 5B is a “directly modulated” optical transmitter, which may be, for example, a directly modulated vertical surface cavity laser (VCSEL) or a distributed feedback (DFB) laser.

[0121] The so-called "direct modulation" means that the control unit 103 can control the electrical signal provided by the driver 101-2 to the optical transmitter 101A according to the input electrical signal 110, thereby controlling the intensity of the optical signal emitted by the optical transmitter 101A, without using other modulators to load or modulate the information in the electrical signal into the emitted optical signal.

[0122] For example, the control unit 103 can directly control the magnitude of the current provided by the driver 101-2 according to the amplitude of the logic levels "1" and "0" of the input electrical signal 110, so that the intensity of the light emitted by the light emitter 101A can be linearly or substantially linearly related to the amplitude of the input current.

[0123] Optionally, the optical transmitter in the optical module of the present disclosure may also be an "externally modulated" optical transmitter. As the name implies, an "externally modulated" optical transmitter is one that cannot modulate light itself but relies on external equipment to modulate light.

[0124] Figure 5C shows another example of an optical module 100 according to an embodiment of the present disclosure. In Figure 5C , the optical transmitter 101B is, for example, an externally modulated laser, and in addition to the driver 101-2 and the optical transmitter 101B, the optical transmission unit 101 shown in Figure 5A also needs to include a modulator 101-3.

[0125] In this case, light emitter 101B is in a stable light-emitting state and emits light with consistent intensity. The light emitted by light emitter 101B is provided to modulator 101-3. Control unit 103 can control the electrical signal input to modulator 101-3 through driver 101-2, thereby modulating the amplitude, phase, and other characteristics of the light received from light emitter 101B. This modulates the information carried in input electrical signal 110 onto the light to form output optical signal 120.

[0126] Typical examples of the modulator 101 - 3 include integrated photonic modulators based on silicon, indium phosphide, thin-film lithium niobate or polymer, and the structure may be a micro-ring modulator, a Mach-Zehnder modulator or an electro-absorption modulator.

[0127] For example, in the case where the modulator 101-3 is an electro-absorption modulator, the control unit 103 can control the switch of the modulator 101-3 through the driver 101-2 to make it absorb or not absorb light, thereby absorbing the light emitted by the light emitter 101B (for example, corresponding to the output logic "0"), or not absorbing the light emitted by the light emitter 101B (for example, corresponding to the output logic "1"). In this way, the intensity and phase of the final output light can be controlled, so that information can be modulated or loaded onto the output optical signal 120.

[0128] It should be noted that the modulation formats of the logic levels "1" and "0" of the input electrical signal 110 mentioned above are merely exemplary and not limiting. In practice, the input electrical signal 110 may have any suitable modulation format.

[0129] In addition, the driver 101 - 2 , the photodetector 102 - 1 , and the amplifier 102 - 2 shown in FIG. 5B-5C may be implemented using any suitable components in the art.

[0130] For example, the driver 101-2 can be implemented by a circuit composed of various electronic components, such as transistors, resistors, and capacitors. For example, the light detector 102-1 can be various types of photodiodes with various sensitivities, such as a photomultiplier tube (PMT), an avalanche photodiode (APD), or a silicon photomultiplier tube (SiPM). Furthermore, the amplifier 102-2 can be a traditional transimpedance amplifier (TIA) or various types of amplifiers based on similar or other principles, which will not be discussed in detail here.

[0131] In addition, it should be noted that the optical module proposed in the present disclosure that does not perform communication protocol conversion does not include a traditional retimer, a traditional analog-to-digital converter ADC or a digital-to-analog converter DAC. This is because the optical module proposed in the present disclosure only performs transparent electrical-to-optical conversion on the input electrical signal, and only performs transparent optical-to-electrical conversion on the input optical signal. The so-called transparency means that there is no need to recover the clock processing of the signal before and after the conversion, nor is there any need to perform digital-to-analog or analog-to-digital conversion processing on the signal before and after the conversion, that is, the input signal and the output signal are only different in form (electrical signal form or optical signal form), and no other conversion processing is performed to adapt them to the target protocol or format.

[0132] The optical module 100 proposed in the present disclosure does not include a processing channel for low-speed sideband control signals, that is, only a conversion channel for high-speed data signals is set, but no conversion channel corresponding to the low-speed sideband control signals is included, which also greatly simplifies the design of the optical module 100.

[0133] Various features of the optical module 100 described above with respect to the computing device and computing system in FIG. 2A to FIG. 4C are also applicable to the optical module in FIG. 5A to FIG. 5C .

[0134] In the above description, the embodiments of the present disclosure have been described in conjunction with the accompanying drawings. It should be understood that the above embodiments are merely illustrative, and those skilled in the art should understand that the combination of the constituent elements and processes of the present embodiment can be modified in various ways, and such modifications also fall within the scope of the present disclosure.

Claims

1. A computing device, comprising: PCB board; A computing chip is arranged on the PCB board, the computing chip includes one or more input and output high-speed interfaces, wherein each input and output high-speed interface has one or more input high-speed ports and one or more output high-speed ports, each of the output high-speed ports performs parallel-to-serial conversion on a parallel signal in the computing chip to output a first electrical signal, and each input high-speed port performs serial-to-parallel conversion on a second electrical signal received as a high-speed serial signal; as well as One or more optical modules are arranged on the PCB board, each optical module includes an electrical input and output interface and an optical input and output interface, the electrical input and output interface includes at least one electrical input port and at least one electrical output port, the optical input and output port includes at least one optical input port and at least one optical output port, wherein Each of the at least one electrical input port is electrically connected to a corresponding one of the one or more output high-speed ports through wiring in the PCB board, Each of the at least one electrical output port is electrically connected to a corresponding one of the one or more input high-speed ports through wiring in the PCB board, Each optical module converts the first electrical signal received from each of the at least one electrical input port into a first optical signal output from one of the at least one optical output port, and converts the second optical signal received from each of the at least one optical input port into the second electrical signal and outputs the second electrical signal.

2. The computing device of claim 1, wherein: The number of output high-speed ports of the computing chip is equal to the total number of electrical input ports of the one or more optical modules, and the number of input high-speed ports of the computing chip is equal to the total number of electrical output ports of the one or more optical modules.

3. The computing device as described in claim 1 or 2 further includes at least one high bandwidth memory (HBM) unit, wherein the at least one HBM unit and the computing chip are packaged on a substrate, and the substrate is arranged on the PCB board.

4. The computing device of claim 3, wherein: The at least one HBM unit and the computing chip are packaged on the substrate through an interposer.

5. The computing device of claim 1, wherein: The computing chip is an artificial intelligence chip.

6. A computing system comprising: A plurality of computing devices as claimed in any one of claims 1 to 5; as well as at least one optical switch, Each computing device and at least part of the at least one optical switch are optically interconnected via an optical module corresponding to each computing device; and At least some of the plurality of computing devices are optically interconnected via the at least one optical switch.

7. The computing system of claim 6, wherein: The at least one optical switch is capable of reconfiguring the optical links between the plurality of computing devices so that any two computing devices among the plurality of computing devices can communicate with each other.

8. The computing system of claim 6 or 7, wherein: The at least one optical switch is capable of establishing optical links between all optical modules in the first computing device and optical modules in the second computing device, so that the first computing device communicates with the second computing device.

9. The computing system of claim 6 or 7, wherein: The at least one optical switch is capable of establishing an optical link between some optical modules in the first computing device and the optical modules in the second computing device, and establishing an optical link between the remaining optical modules in the first computing device and the optical modules in the third computing device, so that the first computing device communicates with the second computing device and the third computing device simultaneously.

10. An optical module, comprising: Electrical input and output interface; Optical input and output interface; an optical emitting unit, for converting an input electrical signal received from the electrical input / output interface into an output optical signal; An optical receiving unit, used to convert an input optical signal received from the optical input and output interface into an output electrical signal; as well as a control unit, configured to control the light emitting unit to convert the input electrical signal into the output optical signal, and control the light receiving unit to convert the input optical signal into the output electrical signal, The optical module does not perform communication protocol conversion processing on the input electrical signal and the output electrical signal.

11. The optical module according to claim 10, wherein: The light emitting unit includes a light emitter and a driver, and Wherein, the optical transmitter is a directly modulated laser, and the control unit controls the intensity of the optical signal emitted by the optical transmitter unit by controlling the electrical signal provided by the driver to form the output optical signal.

12. The optical module according to claim 10, wherein: The light emitting unit includes a light emitter and a driver, and The optical transmitter is an externally modulated laser, and the optical transmission unit further comprises a modulator, The control unit modulates the light received from the optical transmitter by controlling the electrical signal input to the modulator to form the output optical signal.

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