Systems and methods for contactless measurement of energy barriers during device fabrication

Abstract

Systems and methods for measuring an energy barrier of a transistor during fabrication of the transistor, including determining a photocurrent of a transistor for each of a plurality of photon energies; determining energy barriers based on photocurrents for each of a plurality of landing energies of the charged particle beam; and determining an energy barrier of the transistor based, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier. Methods include irradiating a gate with a charged particle beam; irradiating underneath the gate with a photon beam; determining a secondary electron (SE) yield at each of a plurality of photon energies; and determining an energy barrier of the transistor.

Description

SYSTEMS AND METHODS FOR CONTACTLESS MEASUREMENT OF ENERGY BARRIERS DURING DEVICE FABRICATIONCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of US application 63 / 585,083 which was filed on 25 September 2023 and US application 63 / 600,634 which was filed on 17 November 2023, and which are incorporated herein in their entirety by reference.FIELD

[0002] The description herein relates to the field of charged particle systems, and more particularly to methods for contactless measurement of energy barriers during device fabrication in a charged particle system.BACKGROUND

[0003] In manufacturing processes of integrated circuits (ICs), unfinished or finished circuit components are inspected to ensure that they are manufactured according to design and are free of defects. An inspection system utilizing an optical microscope typically has resolution down to a few hundred nanometers; and the resolution is limited by the wavelength of light. As the physical sizes of IC components continue to reduce down to sub- 100 or even sub- 10 nanometers, inspection systems capable of higher resolution than those utilizing optical microscopes are needed.

[0004] A charged particle (e.g., electron) beam microscope, such as a scanning electron microscope (SEM) or a transmission electron microscope (TEM), capable of resolution down to less than a nanometer, serves as a practicable tool for inspecting IC components having a feature size that is sub- 100 nanometers. With a SEM, electrons of a single primary electron beam, or electrons of a plurality of primary electron beams, can be focused on locations of interest of a wafer under inspection. The primary electrons interact with the wafer and may be backscattered or may cause the wafer to emit secondary electrons. The intensity of the electron beams comprising the backscattered electrons and the secondary electrons may vary based on the properties of the internal and external structures of the wafer, and thereby may indicate whether the wafer has defects.SUMMARY

[0005] Embodiments of the present disclosure provide systems and methods for contactless measurement of energy barriers during device fabrication. In some embodiments, systems, methods, and non-transitory computer readable mediums may include irradiating a gate of the transistor with the charged particle beam; irradiating a material underneath the gate with a photon beam; determining a photocurrent of the transistor for each of a plurality of photon energies; and determining an energy barrier based on the determined photocurrents; determining a plurality of energy barriers based on thedetermined photocurrents for each of the plurality of landing energies of the charged particle beam; plotting the plurality of energy barriers with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.

[0006] Embodiments include irradiating a gate of the transistor with a charged particle beam with a first landing energy; irradiating a material underneath the gate with a photon beam; determining a first plurality of photocurrents of the transistor over a first plurality of photon energies; determining a first energy barrier based on the determined first plurality of photocurrents; irradiating the gate of the transistor with the charged particle beam with a second landing energy; irradiating the material underneath the gate with the photon beam; determining a second plurality of photocurrents of the transistor over a second plurality of photon energies; determining a second energy barrier based on the determined second plurality of photocurrents; plotting the first energy barrier and the second energy barrier with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.

[0007] Embodiments include irradiating a gate of the transistor with a charged particle beam; irradiating a material underneath the gate with a photon beam; determining a secondary electron (SE) yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.

[0008] Embodiments include providing a plurality of charged particles to a gate of the transistor; providing a plurality of photon particles to a material underneath the gate; generating, by a charged particle beam tool, a grey level value at each of a plurality of photon energies; determining a secondary electron (SE) yield at each of the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the determined SE yields and the plurality of photon energies, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Fig. l is a schematic diagram illustrating an exemplary electron beam inspection (EBI) system, consistent with embodiments of the present disclosure.

[0010] Fig. 2A is a schematic diagram illustrating an exemplary multi-beam system that is part of the exemplary charged particle beam inspection system of Fig. 1, consistent with embodiments of the present disclosure.

[0011] Fig. 2B is a schematic diagram illustrating an exemplary single -beam system that is part of the exemplary charged particle beam inspection system of Fig. 1, consistent with embodiments of the present disclosure.

[0012] Fig. 3 shows an exemplary graph showing a yield rate of total electrons (secondary electrons and backscattered electrons) relative to landing energy of primary electron beamlets, consistent with embodiments of the present disclosure.

[0013] Fig. 4 shows a schematic diagram illustrating an exemplary voltage contrast response of a wafer, consistent with embodiments of the present disclosure.

[0014] Fig. 5 shows a schematic diagram illustrating an exemplary electron beam system, consistent with embodiments of the present disclosure.

[0015] Fig. 6 illustrates an energy band diagram with a schematic of the barrier heights of a metal- oxide-semiconductor (MOS) structure, consistent with embodiments of the present disclosure.

[0016] Fig. 7 shows a typical IPE spectroscopy setup.

[0017] Fig. 8 shows a sample in a charged particle system, consistent with embodiments of the present disclosure.

[0018] Fig. 9 shows an exemplary graph of photocurrent as a function of photon energy for a certain gate bias, consistent with embodiments of the present disclosure.

[0019] Fig. 10 shows an exemplary graph of energy barrier as a function of oxide electric field, consistent with embodiments of the present disclosure.

[0020] Fig. 11 shows an exemplary graph of normalized photocurrent as a function of photon energy for different gate biases, consistent with embodiments of the present disclosure.

[0021] Fig. 12 shows an exemplary graph of normalized SE yield as a function of photon energy at laser powers, consistent with embodiments of the present disclosure.

[0022] Fig. 13 shows an exemplary process for measuring an energy barrier of a transistor during fabrication of the transistor, consistent with embodiments of the present disclosure.

[0023] Fig. 14 shows an exemplary process for measuring an energy barrier of a transistor during fabrication of the transistor, consistent with embodiments of the present disclosure.DETAILED DESCRIPTION

[0024] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the disclosure. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the subject matter recited in the appended claims. For example, although some embodiments are described in the context of utilizing electron beams, the disclosure is not so limited. Other types of charged particle beams may besimilarly applied. Furthermore, other imaging systems may be used, such as optical imaging, photodetection, x-ray detection, extreme ultraviolet inspection, deep ultraviolet inspection, or the like, in which they generate corresponding types of images.

[0025] Electronic devices are constructed of circuits formed on a piece of silicon (or other materials such as GaAs) called a substrate. Many circuits may be formed together on the same piece of silicon and are called integrated circuits or ICs. The size of these circuits has decreased dramatically so that many more of them can fit on the substrate. For example, an IC chip in a smart phone can be as small as a thumbnail and yet may include over 2 billion transistors, the size of each transistor being less than l / 1000th the size of a human hair.

[0026] Making these extremely small ICs is a complex, time-consuming, and expensive process, often involving hundreds of individual steps. Errors in even one step have the potential to result in defects in the finished IC rendering it useless. Thus, one goal of the manufacturing process is to avoid such defects to maximize the number of functional ICs made in the process, that is, to improve the overall yield of the process.

[0027] One component of improving yield is monitoring the chip making process to ensure that it is producing a sufficient number of functional ICs. One way to monitor the process is to inspect the chip circuit structures at various stages of their formation. Inspection may be carried out using a scanning electron microscope (SEM). A SEM can be used to image these extremely small structures, in effect, taking a “picture” of the structures of the wafer. The image can be used to determine if the structure was formed properly, and also if it was formed at the proper location. If the structure is defective, then the process can be adjusted so the defect is less likely to recur. Defects may be generated during various stages of semiconductor processing. For the reason stated above, it is important to find defects accurately and efficiently as early as possible.

[0028] The working principle of a SEM is similar to a camera. A camera takes a picture by receiving and recording brightness and colors of light reflected or emitted from people or objects. A SEM takes a “picture” by receiving and recording energies or quantities of electrons reflected or emitted from the structures. Before taking such a “picture,” an electron beam may be projected onto the structures, and when the electrons are reflected or emitted (“exiting”) from the structures, a detector of the SEM may receive and record the energies or quantities of those electrons to generate an image. To take such a “picture,” some SEMs use a single electron beam (referred to as a “single-beam SEM”), while some SEMs use multiple electron beams (referred to as a “multi-beam SEM”) to take multiple “pictures” of the wafer. By using multiple electron beams, the SEM may project more electron beams onto the structures for obtaining these multiple “pictures,” resulting in more electrons exiting from the structures. Accordingly, the detector may receive more exiting electrons simultaneously, and generate images of the structures of the wafer with a higher efficiency and a faster speed. A SEM can be used to image ICs after they are manufactured.

[0029] One difference between a SEM and a camera is that in a camera, the whole region that is observed is illuminated with light and the sample is imaged with a lens on a sensor with many pixels. An image is obtained by reading out all the pixels. In a SEM, the detector need not have pixels, as the electron beam is focused onto a tiny (e.g., nanometer-sized) spot that is scanned over the sample. The “picture” made with a SEM is an xy plot of signal as a function of beam position. In a SEM, there are no lenses that focus signal from the sample onto the detector.

[0030] As stated above, ICs are made with a substantial number of transistors. One of the parameters used to select the material for a metal gate of a transistor is the band offsets at the interfaces of the gate / dielectric layer / semiconductor structure, which greatly affect electrical performance of the device. The gate work functions relate to the barrier heights or band offsets at the interfaces of the device structure.

[0031] One of the key metrics of transistors is their threshold voltage. Threshold voltages may be set by the work function metals used as gate metals. The threshold voltage of a transistor may be fine-tuned by adjusting the work function of the metal gate. The energy barriers of the metal / oxide / semiconductor structure of transistors are therefore critical for the proper function of manufactured circuits. These barriers are set as soon as the gate metal is deposited, when a transistor is essentially finished.

[0032] Typical transistor manufacturing methods, however, suffer from constraints. The band alignment of these structures are not reviewed during the manufacturing process. Instead, transistor threshold voltages are reviewed by probe cards in scribe lines after some metallization steps, which may span several days or weeks after the transistor is formed. Actual products are only tested at the end of the manufacturing process, the work function of the metal can no longer be changed. As a result, typical transistors may be manufactured with sub-optimal threshold voltages and electrical performance. The delay of testing actual products at the end of the manufacturing process is also a problem because it lengthens the feedback loop to optimize the process, and when the problem is identified late, more wafers with sub-optimal parameters will have been made by the time a problem is identified.

[0033] Moreover, probe cards make physical contact with the wafer, which is a source of stress and particles that may negatively affect the device manufacturing process.

[0034] Therefore, there is a need for methods of measuring the band alignment of metal / oxide / semiconductor on product structures during the manufacturing process.

[0035] The disclosed embodiments provide systems and methods that address some or all of these disadvantages by providing contactless measurement of energy barriers during device fabrication in a charged particle system.

[0036] The disclosed embodiments may include, for each of a plurality of landing energies of a charged particle beam: irradiating a gate of a transistor with the charged particle beam; irradiating a material underneath the gate with a photon beam; determining a photocurrent of the transistor for each of a plurality of photon energies; determining an energy barrier based on the determined photocurrents; determining a plurality of energy barriers based on the determined photocurrents for each of the pluralityof landing energies of the charged particle beam; plotting the plurality of energy barriers with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.

[0037] The disclosed embodiments may include irradiating a gate of a transistor with a charged particle beam; irradiating a material underneath the gate with a photon beam; determining a secondary electron (SE) yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.

[0038] Relative dimensions of components in drawings may be exaggerated for clarity. Within the following description of drawings, the same or like reference numbers refer to the same or like components or entities, and only the differences with respect to the individual embodiments are described.

[0039] As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a component may include A or B, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or A and B. As a second example, if it is stated that a component may include A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0040] Without limiting the scope of the present disclosure, some embodiments may be described in the context of providing detectors and detection methods in systems utilizing electron beams. However, the disclosure is not so limited. Other types of charged particle beams may be similarly applied. Furthermore, systems and methods for detection may be used in other imaging systems, such as optical imaging, photon detection, x-ray detection, ion detection, etc.

[0041] Fig. 1 illustrates an exemplary electron beam inspection (EBI) system 100 consistent with embodiments of the present disclosure. EBI system 100 may be used for imaging. As shown in Fig. 1, EBI system 100 includes a main chamber 101, a load / lock chamber 102, an electron beam tool 104, and an equipment front end module (EFEM) 106. Electron beam tool 104 is located within main chamber 101. EFEM 106 includes a first loading port 106a and a second loading port 106b. EFEM 106 may include additional loading port(s). First loading port 106a and second loading port 106b receive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (wafers and samples may be used interchangeably). A “lot” is a plurality of wafers that may be loaded for processing as a batch.

[0042] One or more robotic arms (not shown) in EFEM 106 may transport the wafers to load / lock chamber 102. Load / lock chamber 102 is connected to a load / lock vacuum pump system (not shown) which removes gas molecules in load / lock chamber 102 to reach a first pressure below the atmosphericpressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from load / lock chamber 102 to main chamber 101. Main chamber 101 is connected to a main chamber vacuum pump system (not shown) which removes gas molecules in main chamber 101 to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by electron beam tool 104. Electron beam tool 104 may be a single-beam system or a multibeam system.

[0043] A controller 109 is electronically connected to electron beam tool 104. Controller 109 may be a computer configured to execute various controls of EBI system 100. While controller 109 is shown in Fig. 1 as being outside of the structure that includes main chamber 101, load / lock chamber 102, and EFEM 106, it is appreciated that controller 109 may be a part of the structure.

[0044] In some embodiments, controller 109 may include one or more processors (not shown). A processor may be a generic or specific electronic device capable of manipulating or processing information. For example, the processor may include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), an optical processor, a programmable logic controllers, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a Programmable Logic Array (PLA), a Programmable Array Logic (PAL), a Generic Array Logic (GAL), a Complex Programmable Logic Device (CPLD), a Field- Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), and any type circuit capable of data processing. The processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network.

[0045] In some embodiments, controller 109 may further include one or more memories (not shown). A memory may be a generic or specific electronic device capable of storing codes and data accessible by the processor (e.g., via a bus). For example, the memory may include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or any type of storage device. The codes may include an operating system (OS) and one or more application programs (or “apps”) for specific tasks. The memory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network.

[0046] Embodiments of this disclosure may provide a single charged-particle beam imaging system (“single-beam system”). Compared with a single-beam system, a multiple charged-particle beam imaging system (“multi-beam system”) may be designed to optimize throughput for different scan modes. Embodiments of this disclosure provide a multi-beam system with the capability of optimizing throughput for different scan modes by using beam arrays with different geometries and adapting to different throughputs and resolution requirements.

[0047] Reference is now made to Fig. 2A, which is a schematic diagram illustrating an exemplary electron beam tool 104 including a multi-beam inspection tool that is part of the EBI system 100 of Fig. 1, consistent with embodiments of the present disclosure. In some embodiments, electron beam tool 104 may be operated as a single -beam inspection tool that is part of EBI system 100 of Fig. 1. Multibeam electron beam tool 104 (also referred to herein as apparatus 104) comprises an electron source 201, a Coulomb aperture plate (or “gun aperture plate”) 271, a condenser lens 210, a source conversion unit 220, a primary projection system 230, a motorized stage 209, and a sample holder 207 supported by motorized stage 209 to hold a sample 208 (e.g., a wafer or a photomask) to be inspected. Multi-beam electron beam tool 104 may further comprise a secondary projection system 250 and an electron detection device 240. Primary projection system 230 may comprise an objective lens 231. Electron detection device 240 may comprise a plurality of detection elements 241, 242, and 243. A beam separator 233 and a deflection scanning unit 232 may be positioned inside primary projection system 230.

[0048] Electron source 201, Coulomb aperture plate 271, condenser lens 210, source conversion unit 220, beam separator 233, deflection scanning unit 232, and primary projection system 230 may be aligned with a primary optical axis 204 of apparatus 104. Secondary projection system 250 and electron detection device 240 may be aligned with a secondary optical axis 251 of apparatus 104.

[0049] Electron source 201 may comprise a cathode (not shown) and an extractor or anode (not shown), in which, during operation, electron source 201 is configured to emit primary electrons from the cathode and the primary electrons are extracted or accelerated by the extractor and / or the anode to form a primary electron beam 202 that form a primary beam crossover (virtual or real) 203. Primary electron beam 202 may be visualized as being emitted from primary beam crossover 203.

[0050] Source conversion unit 220 may comprise an image-forming element array (not shown), an aberration compensator array (not shown), a beam-limit aperture array (not shown), and a pre-bending micro-deflector array (not shown). In some embodiments, the pre-bending micro-deflector array deflects a plurality of primary beamlets 211, 212, 213 of primary electron beam 202 to normally enter the beam-limit aperture array, the image-forming element array, and an aberration compensator array. In some embodiments, apparatus 104 may be operated as a single-beam system such that a single primary beamlet is generated. In some embodiments, condenser lens 210 is designed to focus primary electron beam 202 to become a parallel beam and be normally incident onto source conversion unit 220. The image-forming element array may comprise a plurality of micro-deflectors or micro-lenses to influence the plurality of primary beamlets 211, 212, 213 of primary electron beam 202 and to form a plurality of parallel images (virtual or real) of primary beam crossover 203, one for each of the primary beamlets 211, 212, and 213. In some embodiments, the aberration compensator array may comprise a field curvature compensator array (not shown) and an astigmatism compensator array (not shown). The field curvature compensator array may comprise a plurality of micro-lenses to compensate field curvature aberrations of the primary beamlets 211, 212, and 213. The astigmatism compensator arraymay comprise a plurality of micro-stigmators to compensate astigmatism aberrations of the primary beamlets 211, 212, and 213. The beam-limit aperture array may be configured to limit diameters of individual primary beamlets 211, 212, and 213. Fig. 2A shows three primary beamlets 211, 212, and 213 as an example, and it is appreciated that source conversion unit 220 may be configured to form any number of primary beamlets. Controller 109 may be connected to various parts of EBI system 100 of Fig. 1, such as source conversion unit 220, electon detection device 240, primary projection system 230, or motorized stage 209. In some embodiments, as explained in further details below, controller 109 may perform various image and signal processing functions. Controller 109 may also generate various control signals to govern operations of the charged particle beam inspection system.

[0051] Condenser lens 210 is configured to focus primary electron beam 202. Condenser lens 210 may further be configured to adjust electric currents of primary beamlets 211, 212, and 213 downstream of source conversion unit 220 by varying the focusing power of condenser lens 210. Alternatively, the electric currents may be changed by altering the radial sizes of beam-limit apertures within the beamlimit aperture array corresponding to the individual primary beamlets. The electric currents may be changed by both altering the radial sizes of beam-limit apertures and the focusing power of condenser lens 210. Condenser lens 210 may be an adjustable condenser lens that may be configured so that the position of its first principal plane is movable. The adjustable condenser lens may be configured to be magnetic, which may result in off-axis beamlets 212 and 213 illuminating source conversion unit 220 with rotation angles. The rotation angles change with the focusing power or the position of the first principal plane of the adjustable condenser lens. Condenser lens 210 may be an anti-rotation condenser lens that may be configured to keep the rotation angles unchanged while the focusing power of condenser lens 210 is changed. In some embodiments, condenser lens 210 may be an adjustable antirotation condenser lens, in which the rotation angles do not change when its focusing power and the position of its first principal plane are varied.

[0052] Objective lens 231 may be configured to focus beamlets 211, 212, and 213 onto a sample 208 for inspection and may form, in the current embodiments, three probe spots 221, 222, and 223 on the surface of sample 208. Coulomb aperture plate 271, in operation, is configured to block off peripheral electrons of primary electron beam 202 to reduce Coulomb effect. The Coulomb effect may enlarge the size of each of probe spots 221, 222, and 223 of primary beamlets 211, 212, 213, and therefore deteriorate inspection resolution.

[0053] Beam separator 233 may, for example, be a Wien filter comprising an electrostatic deflector generating an electrostatic dipole field and a magnetic dipole field (not shown in Fig. 2A). In operation, beam separator 233 may be configured to exert an electrostatic force by electrostatic dipole field on individual electrons of primary beamlets 211, 212, and 213. The electrostatic force is equal in magnitude but opposite in direction to the magnetic force exerted by magnetic dipole field of beam separator 233 on the individual electrons. Primary beamlets 211, 212, and 213 may therefore pass at least substantially straight through beam separator 233 with at least substantially zero deflection angles.

[0054] Deflection scanning unit 232, in operation, is configured to deflect primary beamlets 211, 212, and 213 to scan probe spots 221, 222, and 223 across individual scanning areas in a section of the surface of sample 208. In response to incidence of primary beamlets 211, 212, and 213 or probe spots 221, 222, and 223 on sample 208, electrons emerge from sample 208 and generate three secondary electron beams 261, 262, and 263. Each of secondary electron beams 261, 262, and 263 typically comprise secondary electrons (having electron energy < 50eV) and backscattered electrons (having electron energy between 50eV and the landing energy of primary beamlets 211, 212, and 213). Beam separator 233 is configured to deflect secondary electron beams 261, 262, and 263 towards secondary projection system 250. Secondary projection system 250 subsequently focuses secondary electron beams 261, 262, and 263 onto detection elements 241, 242, and 243 of electron detection device 240. Detection elements 241, 242, and 243 are arranged to detect corresponding secondary electron beams 261, 262, and 263 and generate corresponding signals which are sent to controller 109 or a signal processing system (not shown), e.g., to construct images of the corresponding scanned areas of sample 208.

[0055] In some embodiments, detection elements 241, 242, and 243 detect corresponding secondary electron beams 261, 262, and 263, respectively, and generate corresponding intensity signal outputs (not shown) to an image processing system (e.g., controller 109). In some embodiments, each detection element 241, 242, and 243 may comprise one or more pixels. The intensity signal output of a detection element may be a sum of signals generated by all the pixels within the detection element.

[0056] In some embodiments, controller 109 may comprise image processing system that includes an image acquirer (not shown), a storage (not shown). The image acquirer may comprise one or more processors. For example, the image acquirer may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, and the like, or a combination thereof. The image acquirer may be communicatively coupled to electron detection device 240 of apparatus 104 through a medium such as an electrical conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, among others, or a combination thereof. In some embodiments, the image acquirer may receive a signal from electron detection device 240 and may construct an image. The image acquirer may thus acquire images of sample 208. The image acquirer may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, and the like. The image acquirer may be configured to perform adjustments of brightness and contrast, etc. of acquired images. In some embodiments, the storage may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer readable memory, and the like. The storage may be coupled with the image acquirer and may be used for saving scanned raw image data as original images, and postprocessed images.

[0057] In some embodiments, the image acquirer may acquire one or more images of a sample based on an imaging signal received from electron detection device 240. An imaging signal may correspondto a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas. The single image may be stored in the storage. The single image may be an original image that may be divided into a plurality of regions. Each of the regions may comprise one imaging area containing a feature of sample 208. The acquired images may comprise multiple images of a single imaging area of sample 208 sampled multiple times over a time sequence. The multiple images may be stored in the storage. In some embodiments, controller 109 may be configured to perform image processing steps with the multiple images of the same location of sample 208.

[0058] In some embodiments, controller 109 may include measurement circuitries (e.g., analog-to- digital converters) to obtain a distribution of the detected secondary electrons. The electron distribution data collected during a detection time window, in combination with corresponding scan path data of each of primary beamlets 211, 212, and 213 incident on the wafer surface, can be used to reconstruct images of the wafer structures under inspection. The reconstructed images can be used to reveal various features of the internal or external structures of sample 208, and thereby can be used to reveal any defects that may exist in the wafer.

[0059] In some embodiments, controller 109 may control motorized stage 209 to move sample 208 during inspection of sample 208. In some embodiments, controller 109 may enable motorized stage 209 to move sample 208 in a direction continuously at a constant speed. In other embodiments, controller 109 may enable motorized stage 209 to change the speed of the movement of sample 208 over time depending on the steps of scanning process.

[0060] Although Fig. 2A shows that apparatus 104 uses three primary electron beams, it is appreciated that apparatus 104 may use one, two, or more number of primary electron beams. The present disclosure does not limit the number of primary electron beams used in apparatus 104. In some embodiments, apparatus 104 may be a SEM used for lithography. In some embodiments, electron beam tool 104 may be a single-beam system or a multi-beam system.

[0061] For example, as shown in Fig. 2B, an electron beam tool 100B (also referred to herein as apparatus 100B) may be a single -beam inspection tool that is used in EBI system 100, consistent with embodiments of the present disclosure. Apparatus 100B includes a wafer holder 136 supported by motorized stage 134 to hold a wafer 150 to be inspected. Electron beam tool 100B includes an electron emitter, which may comprise a cathode 103, an anode 121, and a gun aperture 122. Electron beam tool 100B further includes a beam limit aperture 125, a condenser lens 126, a column aperture 135, an objective lens assembly 132, and a detector 144. Objective lens assembly 132, in some embodiments, may be a modified SORIL lens, which includes a pole piece 132a, a control electrode 132b, a deflector 132c, and an exciting coil 132d. In an imaging process, an electron beam 161 emanating from the tip of cathode 103 may be accelerated by anode 121 voltage, pass through gun aperture 122, beam limit aperture 125, condenser lens 126, and be focused into a probe spot 170 by the modified SORIL lens and impinge onto the surface of wafer 150. Probe spot 170 may be scanned across the surface of wafer150 by a deflector, such as deflector 132c or other deflectors in the SORIL lens. Secondary or scattered primary particles, such as secondary electrons or scattered primary electrons emanated from the wafer surface may be collected by detector 144 to determine intensity of the beam and so that an image of an area of interest on wafer 150 may be reconstructed.

[0062] There may also be provided an image processing system 199 that includes an image acquirer 120, a storage 130, and controller 109. Image acquirer 120 may comprise one or more processors. For example, image acquirer 120 may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, and the like, or a combination thereof. Image acquirer 120 may connect with detector 144 of electron beam tool 100B through a medium such as an electrical conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, or a combination thereof. Image acquirer 120 may receive a signal from detector 144 and may construct an image. Image acquirer 120 may thus acquire images of wafer 150. Image acquirer 120 may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, and the like. Image acquirer 120 may be configured to perform adjustments of brightness and contrast, etc. of acquired images. Storage 130 may be a storage medium such as a hard disk, random access memory (RAM), cloud storage, other types of computer readable memory, and the like. Storage 130 may be coupled with image acquirer 120 and may be used for saving scanned raw image data as original images, and post-processed images. Image acquirer 120 and storage 130 may be connected to controller 109. In some embodiments, image acquirer 120, storage 130, and controller 109 may be integrated together as one electronic control unit.

[0063] In some embodiments, image acquirer 120 may acquire one or more images of a sample based on an imaging signal received from detector 144. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas that may contain various features of wafer 150. The single image may be stored in storage 130. Imaging may be performed on the basis of imaging frames.

[0064] The condenser and illumination optics of the electron beam tool may comprise or be supplemented by electromagnetic quadrupole electron lenses. For example, as shown in Fig. 2B, electron beam tool 100B may comprise a first quadrupole lens 148 and a second quadrupole lens 158. In some embodiments, the quadrupole lenses are used for controlling the electron beam. For example, first quadrupole lens 148 can be controlled to adjust the beam current and second quadrupole lens 158 can be controlled to adjust the beam spot size and beam shape.

[0065] Fig. 2B illustrates a charged particle beam apparatus in which an inspection system may use a single primary beam that may be configured to generate secondary electrons by interacting with wafer 150. Detector 144 may be placed along optical axis 105, as in the embodiment shown in Fig. 2B. The primary electron beam may be configured to travel along optical axis 105. Accordingly, detector 144 may include a hole at its center so that the primary electron beam may pass through to reach wafer 150.

[0066] Fig. 3 illustrates an exemplary graph showing a yield rate of total electrons (secondary electrons (SEs) and backscattered electrons) relative to landing energy of primary electron beamlets, consistent with embodiments of the present disclosure. The graph illustrates the relationship of the landing energy of a plurality of beamlets of a primary electron beam (e.g., plurality of beamlets 211, 212, or 213 of primary electron beam 202 of Fig. 2A) and the yield rate of secondary electron beams (e.g., secondary electron beams 261 , 262, or 263 of Fig. 2A). The yield rate indicates the number of secondary electrons that are produced in response to the impact of the primary electrons. For example, a yield rate greater than 1.0 indicates that more secondary electrons may be produced than the number of primary electrons that have landed on the wafer. Similarly, a yield rate of less than 1.0 indicates that less secondary electrons may be produced in response to the impact of the primary electrons.

[0067] As shown in the graph of Fig. 3, when the landing energy of the primary electrons is within a range from Ei to E2, more electrons may leave the surface of the wafer than land onto the surface of the wafer, which may result in a positive electrical potential at the surface of the wafer. In some embodiments, defect inspection may be performed in the foregoing range of landing energies, which is called “positive mode.” An electron beam tool (e.g., electron beam tool 104 of Fig. 2) may generate a darker voltage contrast image of a device structure with a more positive surface potential since a detection device (e.g., detection device 240 of Fig. 2) may receive less secondary electrons (see Fig. 4).

[0068] In addition to secondary electrons, backscattered electrons (BSE) are also emitted upon impact of the primary beam. Positive charging can occur with SE yields lower than 1 when the sum of the SE yield and BSE exceeds 1. When Ei and E2 refer to the energies where the SE yield (rather than the total yield) is 1 , the range of positive mode is larger.

[0069] When the landing energy is lower than Ei or higher than E2, less electrons may leave the surface of the wafer, thereby resulting in a negative electrical potential at the surface of the wafer. In some embodiments, defect inspection may be performed in this range of the landing energies, which is called “negative mode.” An electron beam tool (e.g., electron beam tool 104 of Fig. 2) may generate a brighter voltage contrast image of a device structure with a more negative surface potential a detection device (e.g., detection device 240 of Fig. 2) may receive more secondary electrons (see Fig. 4).

[0070] In some embodiments, the landing energy of the primary electron beams may be controlled by the total bias between the electron source and the wafer.

[0071] Fig. 4 illustrates a schematic diagram of a voltage contrast response of a wafer, consistent with embodiments of the present disclosure. In some embodiments, physical and electrical defects in a wafer (e.g., resistive shorts and opens, defects in deep trench capacitors, back end of line (BEOL) defects, etc.) can be detected using a voltage contrast method of a charged particle inspection system. Defect detection using voltage contrast images may use a pre-scanning process (i.e., a charging, flooding, neutralization, or prepping process), where charged particles are applied to an area of the wafer (e.g., sample 208 of Fig. 2) to be inspected before conducting the inspection.

[0072] In some embodiments, an electron beam tool (e.g., electron beam tool 104 of Fig. 2) may be used to detect defects in internal or external structures of a wafer by illuminating the wafer with a plurality of beamlets of a primary electron beam (e.g., plurality of beamlets 211, 212, or 213 of primary electron beam 202 of Fig. 2) and measuring a voltage contrast response of the wafer to the illumination. In some embodiments, the wafer may comprise a test device region 420 that is developed on a substrate 410. In some embodiments, test device region 420 may include multiple device structures 430 and 440 separated by insulating material 450. For example, device structure 430 is connected to substrate 410. In contrast, device structure 440 is separated from substrate 410 by insulating material 450 such that a thin insulator structure 470 (e.g., thin oxide) exists between device structure 440 and substrate 410.

[0073] The electron beam tool may generate secondary electrons (e.g., secondary electron beams 261, 262, or 263 of Fig. 2) from the surface of test device region 420 by scanning the surface of test device region 420 with a plurality of beamlets of a primary electron beam. As explained above, when the landing energy of the primary electrons is between Ei and E2 (i.e., the yield rate is greater than 1.0 in Fig. 3), more electrons may leave the surface of the wafer than land on the surface, thereby resulting in a positive electrical potential at the surface of the wafer.

[0074] As shown in Fig. 4, a positive electrical potential may build-up at the surface of a wafer. For example, after an electron beam tool scans test device region 420 (e.g., during a pre-scanning process), device structure 440 may retain more positive charges because device structure 440 is not connected to an electrical ground in substrate 410, thereby resulting in a positive electrical potential at the surface of device structure 440. In contrast, primary electrons with the same landing energy (i.e., the same yield rate) applied to device structure 430 may result in less positive charges retained in device structure 430 since positive charges may be neutralized by electrons supplied by the connection to substrate 410.

[0075] An image processing system (e.g., controller 109 of Fig. 2) of an electron beam tool may generate voltage contrast images 435 and 445 of corresponding device structures 430 and 440, respectively. For example, device structure 430 is shorted to the ground and may not retain built-up positive charges. Accordingly, when primary electron beamlets land on the surface of the wafer during inspection, device structure 430 may repel more secondary electrons thereby resulting in a brighter voltage contrast image. In contrast, because device structure 440 has no connection to substrate 410 or any other grounds, device structure 440 may retain a build-up of positive charges. This build-up of positive charges may cause device structure 440 to repel less secondary electrons during inspection, thereby resulting in a darker voltage contrast image.

[0076] An electron beam tool (e.g., multi-beam electron beam tool 104 of Fig. 2) may pre-scan the surface of a wafer by supplying electrons to build up the electrical potential on the surface of the wafer. After pre-scanning the wafer, the electron beam tool may obtain images of multiple dies within the wafer. In some embodiments, defects may be detected by comparing the differences in voltage contrast images from multiple dies. For example, if non-uniform charging is applied to the wafer and the voltage contrast level of one image associated with a first node is the same as the voltage contrast level of animage associated with a second node, the die corresponding to the two voltage contrast levels may have an electrical short circuit defect. Pre-scanning is applied to the wafer under the assumption that the electrical surface potential built-up on the surface of the wafer during pre-scanning will be retained during inspection and will remain above the detection threshold of the electron beam tool.

[0077] However, the built-up surface potential level may change during inspection due to the effects of electrical breakdown or tunneling, thereby resulting in failure to detect defects. For example, when a high voltage is applied to a high resistance thin device structure (e.g., thin oxide), such as an insulator structure 470, leakage current may flow through the high resistance structure, thereby preventing the structure from functioning as a perfect insulator. This may affect circuit functionality and result in a device defect. A similar effect of leakage current may also occur in a structure with improperly formed materials or a high resistance metal layer, for example a cobalt silicide (e.g., CoSi, CoSil. Co^Si. Co;Si. etc.) layer between a tungsten plug and a source or drain area of a field-effect transistor (FET).

[0078] A defective etching process may leave a thin oxide resulting in unwanted electrical blockage (e.g., open circuit) between two structures (e.g., device structure 440 and substrate 410) intended to be electrically connected. For example, device structures 430 and 440 may be designed to make contact with substrate 410 and function identically, but due to manufacturing errors, insulator structure 470 may exist in device structure 440. In this case, insulator structure 470 may represent a defect susceptible to a breakdown effect.

[0079] Fig. 5 illustrates an electron beam system 500, consistent with embodiments of the present disclosure. As shown in Fig. 5, electron beam system 500 includes an electron beam tool 510 (e.g., electron beam tool 104 of Fig. 1, electron beam tool 104 of Fig. 2A, electron beam tool 100B of Fig. 2B), an Advanced Charge Control (ACC) module 520 , and a wafer holder 530 (e.g., motorized stage 209 of Fig. 2A, motorized stage 134 of Fig. 2B) on which a sample (e.g., sample 208 of Fig. 2A, wafer 150 of Fig. 2B) to be inspected (e.g., a wafer 540) is disposed. Electron beam tool 510 may emit a primary electron beam 512 (e.g., plurality of beamlets 211, 212, or 213 of primary electron beam 202 of Fig. 2A; electron beam 161 of Fig. 2B) onto an area of interest on wafer 540, and collect secondary electrons emanated from the wafer surface to form an image of the area of interest on wafer 540. ACC module 520 may include an ACC beam source that emits a light beam 522 (e.g., laser beam) onto wafer 540 and form a beam spot 542 of light beam 522 on the wafer surface during inspection. Light beam 522 may be emitted at an angle of incidence 0 of light beam 522 on wafer 540. When primary electron beam 512 irradiates the area of interest on wafer 540, charges may be accumulated due to a large electron beam current. Light beam 522 emitted from ACC module 520 may be configured to regulate the accumulated charges due to photoconductivity or photoelectric effect, or a combination of photoconductivity and photoelectric effect, among others.

[0080] In some embodiments, wafer 540 may include a transistor (e.g., metal-oxide-semiconductor field-effect transistor (MOSFET), fin field-effect transistor (FinFET), gate-all-around (GAA), and thelike), a PN-junction diode, or bulk semiconductor material. In some embodiments, the ACC beam source may be a light source.

[0081] In some embodiments, electron beam tool 510 may generate multiple primary electron beamlets to simultaneously scan multiple locations on wafer 540. In some embodiments, the beam projected by ACC module 520 may charge a location on wafer 540 large enough so that multiple primary electron beamlets may scan corresponding portions on wafer 540.

[0082] Fig. 6 illustrates an energy band diagram 600 with a schematic of the barrier heights of a metal- oxide-semiconductor (MOS) structure, consistent with embodiments of the present disclosure. While energy band diagram 600 shows a schematic for a MOS structure, it is appreciated that similar energy band diagrams may apply to other types of transistors (e.g., fin field-effect transistor (FinFET), gate- all-around (GAA), and the like).

[0083] Internal photoemission (IPE) is defined as a process where photon-stimulated charge carriers (electrons or holes) transition from one component of a heterostructure to another component of the heterostructure over the barrier height at their interface. IPE is a technique for characterizing electronic properties of solid-solid interfaces, particularly insulator / semiconductor and metal / insulator interfaces. For example, IPE may be used to characterize the energy barrier heights at the interface of heterojunctions. IPE involves photo-excitation of electrons or holes over the interface barrier. For example, IPE involves photon-induced charge carriers going from the semiconductor to the metal over the barrier heights, as described in Fig. 6.

[0084] The onset of the conduction of these photoemission carriers under an electric field determines the barrier heights as well as electronic characteristics at the interface. Because the semiconductor valence band bottom is much higher than the insulator valence band bottom, the photon energy required for such an escape over the barriers is smaller than the insulator band gap. In practice, wavelengths between about 300 nm and 1000 nm may be used.

[0085] (pmetai height for electrons making a transition from the metal Fermi level EF to the bottom conduction band of the insulator, and qAemtis the barrier height for electrons making a transition from the top valence band Evof the semiconductor to the bottom conduction band of the insulator. For the hole carriers, (p'"etaljsthe barrier height from the metal Fermi level EF to the top conduction band of the insulator, and <p^emiis the barrier height from the bottom conduction band of semiconductor to the top conduction band of the insulator. IPE may provide band offsets and alignments, which are parameters to determine the performance of the corresponding devices.

[0086] Fig. 7 shows a typical IPE spectroscopy setup 700. In this setup, physical contacts on a sample 702 (which includes a metal 704, an insulator 712, and a semiconductor 706) are used to supply voltages 714 (apply an external bias between the metal electrode 704 and the semiconductor substrate 706) to the sample 702. The sample 702 may be illuminated with a tunable laser source to induce electron / hole pairs in the semiconductor substrate 706. The tunable laser may be adjusted to vary the energy ofphotons 708 that hit the sample 702. Physical contacts on the sample 702 may be used to measure the photocurrent 710 through the sample 702.

[0087] Energy barriers are extracted from photocurrent 710 versus photon energy plots. The photocurrent 710 depends on photon energy, as shown by the following example equation: pI = A — (ho — <b)p(Equation 1), where A is a constant, P is the laser power, ho is the photon energy (where h is the Planck constant and u is frequency), <b is the energy barrier, and p is the power that depends on the junction type. The energy barrier may be identified from the photon energy at which a photocurrent begins flowing through the sample 702. Accordingly, IPE spectroscopy is typically conducted by measuring the photocurrent through a structure as a function of the incident photon energy at a certain applied voltage bias, and repeating these steps over a wide range of voltage biases. A positive (negative) bias applied to the semiconductor substrate 706 is used for the metal / insulator (insulator / semiconductor) barrier. Measurements are repeated for multiple applied biases because energy barriers depend on the electric field in the insulator. All the energy barrier values collected this way are then used to extrapolate up to the zero-voltage or substantially near zero-voltage energy barrier.

[0088] While a metal-insulator-semiconductor structure is shown, it should be understood that the IPE method may be applied to metal-insulator-metal structures or other structures.

[0089] Fig. 8 shows a sample 800 in a charged particle system (e.g., EBI system 100 of Fig. 1, electron beam tool 104 of Fig. 2A, electron beam tool 100B of Fig. 2B, electron beam tool 510 of Fig. 5), consistent with embodiments of the present disclosure.

[0090] In some embodiments, a SEM and a wavelength-tunable laser (e.g., ACC module 520 of Fig. 5) may be used to determine the barrier height of an interface between a gate 802 (e.g., comprising metal layers) and an insulating layer 804 (e.g., an oxide) (e.g., a barrier height of a metal / oxide interface). In some embodiments, a SEM and a laser may be used to determine the barrier height of an interface between insulating layer 804 and substrate 812 (e.g., silicon).

[0091] In some embodiments, an electron beam 806 (e.g., plurality of beamlets 211, 212, or 213 of primary electron beam 202 of Fig. 2A, electron beam 161 of Fig. 2B, primary electron beam 512 of Fig. 5) may irradiate the gate 802 of a transistor 810 while a laser irradiates (e.g., with photon beams 808) the silicon substrate 812 underneath the gate 802 and the insulating layer 804.

[0092] In some embodiments, charged particle beam (e.g., electron beam) irradiation of the metal gate 802 and voltage contrast (see, e.g., Figs. 3-4) may be used to apply and monitor the voltage over the junction (e.g., metal-oxide or oxide-silicon) under optical illumination.

[0093] The SEM electron beam 806 may be used to apply a voltage on the gate 802 so as to create an electric field in the insulating layer 804, while the photon energy of the laser is swept (e.g., over a range of photon energies).

[0094] The disclosed embodiments describe two example approaches for contactless measurement of the energy barrier of a metal / oxide interface or an oxide / semiconductor interface of a device (e.g., MOSFET, transistor 810) during fabrication of the device.

[0095] In some embodiments, an example approach may include the following general steps:1. Generate photocurrent versus photon energy curves at given voltages (see Fig. 9);2. Repeat to find the energy barrier for multiple bias voltages; and3. Plot the energy barriers versus the oxide electric field and extrapolate the fitted curves to zero to determine the zero-voltage energy barrier (see Fig. 10).

[0096] Fig. 9 shows an exemplary graph 900 of photocurrent 902 as a function of photon energy 904 for a certain gate bias, consistent with embodiments of the present disclosure.

[0097] In some embodiments, a charged particle system (e.g., charged particle system 800 of Fig. 8) may irradiate a gate (e.g., gate 802 of Fig. 8) of a transistor (e.g., transistor 810 of Fig. 8) with the charged particle beam, irradiate a material (e.g., silicon substrate 812 of Fig. 8) underneath the gate with a photon beam (e.g., photon beams 808 of Fig. 8), determine a photocurrent (e.g., photocurrent 902) of the transistor for each of a plurality of photon energies (e.g., photon energy 904), and determine an energy barrier 906 based on the determined photocurrents 902.

[0098] In some embodiments, determining energy barrier 906 may include plotting the photocurrents 902 with respect to the plurality of photon energies 904 and determining an inflection point of the plot (e.g., energy barrier 906), the energy barrier corresponding to a photon energy of the inflection point. That is, the energy barrier indicates the point at which current begins to flow through a device (induced by photon energy).

[0099] In some embodiments, the above-described steps may be repeated for each of a plurality of landing energies of a charged particle beam (e.g., electron beam 806 of Fig. 8). That is, for each landing energy of a charged particle beam, a separate graph 900 may be generated such that a plurality of energy barriers 906 may be determined based on the determined photocurrents 902 for each of the plurality of landing energies 904 of the charged particle beam.

[0100] In some embodiments, a charged particle beam tool (e.g., EBI system 100 of Fig. 1, electron beam tool 104 of Fig. 2A, electron beam tool 100B of Fig. 2B, electron beam tool 510 of Fig. 5) may be configured to provide each of the plurality of landing energies of the charged particle beam. In some embodiments, each of the plurality of landing energies of the charged particle beam may correspond to a voltage applied to the transistor. That is, a charged particle beam tool may adjust or change a voltage applied to the transistor by adjusting the landing energy of the charged particle beam on the transistor.

[0101] Fig. 10 shows an exemplary graph 1000 of energy barrier 1002 (e.g., energy barrier 906 of Fig. 9) as a function of oxide electric field 1004, consistent with embodiments of the present disclosure.

[0102] In some embodiments, a plurality of energy barriers 1002 (e.g., energy barrier 906 of Fig. 9) may be plotted with respect to a plurality of oxide electric fields 1004. In some embodiments, the zerovoltage or substantially near zero-voltage energy barrier of the transistor (e.g., zero-voltage energy barrier 1006 of a metal-oxide interface or zero-voltage energy barrier 1008 of a silicon-oxide interface) may be determined based, at least in part, on the plot of graph 1000. In some embodiments, the energy barrier at any voltage may be determined based, at least in part, on the plot of graph 1000. For example, the points on the plot may be fitted, the fit may be extrapolated to an oxide electric field value of zero or substantially zero, and the energy barrier values 1006 or 1008 may be determined to be the energy barrier values of the extrapolated fit at an oxide electric field value of zero or substantially zero.

[0103] In some embodiments, the zero- voltage or substantially near zero- voltage energy barrier of the transistor may be associated with an interface between a metal layer (e.g., metal gate 802 of Fig. 8) and an insulating layer (e.g., insulating layer 804 of Fig. 8) of the transistor.

[0104] In some embodiments, the zero- voltage or substantially near zero- voltage energy barrier of the transistor may be associated with an interface between a semiconductor layer (e.g., silicon substrate 812 of Fig. 8) and an insulating layer of the transistor.

[0105] In some embodiments, the above-described steps may be performed during fabrication of a transistor (e.g., before one or more metal layers have been deposited for the gate) such that one or more metal layers may be adjusted or modified based on the determined zero-voltage or substantially near zero-voltage energy barrier of the transistor. In some embodiments, adjusting or modifying the metal layer of the gate may cause a work function of the gate to be adjusted or modified such that performance of the final transistor is improved.

[0106] In some embodiments, the above-described steps (e.g., with respect to Figs. 8-10) may be performed by performing the following contactless steps:1. Measure the photocurrent through the device;2. Measure the applied voltage; and3. Change applied voltage.

[0107] With respect to measuring the photocurrent, the gate signal may be represented by a gray level value (GLV) in the SEM. The electron detector current Id relates to GLV. The detector current Id consists of the secondary electron (SE) current and the backscattered electron (BSE) current, as described by the following equation:Id — Id— SE + Id— BSE — 8Ip+ T|EcIp (Equation 2) where 8 ( ) is the SE (BSE) electron yield and £c is the collection efficiency of the detector (e.g., detection elements 241, 242, and 243 of Fig. 2A; detector 144 of Fig. 2B) for BSE. Ipis the primary beam electron current. The BSE yield may be assumed since it is not affected by the charging thatoccurs when the gate is irradiated. The SE current component may be determined by measuring the detector current, assuming the BSE current component, and using Equation 2.

[0108] The charging occurring at the gate follows charge conservation, where the device current Idevice is the IPE photocurrent and related to the primary beam current, the SE electron yield, and the BSE electron yield. The device current Idevice may be determined based on its relationship with the primary beam current, the SE electron yield, and the BSE electron yield. From here, plots of photocurrent 902 as a function of photon energy 904 may be generated.

[0109] In some embodiments, when measuring the applied voltage, a model for the SE yield emission of the metal contact may be added and used to convert the measured SE current into the gate voltage. This model in the case of positive charging may be described by the following equation:where do is the SE yield of the metal in absence of charging, <p is its work function, and Vs is the surface voltage that develops. Assuming 8 is known, the measured SE current may be used to determine the surface voltage Vs-

[0110] Changing the applied voltage can involve changing the landing energy of the SEM and will change the SE yield of the metal that is irradiated. By changing the landing energy of the SEM, the voltage distribution may be changed as the photon energy of the laser is swept (e.g., over a range of photon energies).

[0111] Fig. 11 shows an exemplary graph 1100 of normalized photocurrent 1102 as a function of photon energy 1104 for different gate biases, consistent with embodiments of the present disclosure.

[0112] Graph 1100 shows curves 1112, 1114, 1116, and 1118, which correspond to photocurrent 1102 as a function of photon energy 1104 for different landing energies (represented by different SE yields). The energy barriers 1106 for the different landing energies may be determined as discussed above with respect to Fig. 9. In some embodiments, similar to Figs. 9-10 described above, the energy barrier values versus the voltage determined by Equation 5 may be plotted and extrapolated to the zero-voltage energy barrier. In some embodiments, the SE yield may be adjusted to cause different potentials over a junction of a transistor (e.g., an interface of a MOSFET, transistor 810). That is, changing the landing energy is a way to vary the voltage on junctions of the transistor. Other methods for varying the voltage exist (e.g., varying the extraction field).

[0113] In certain situations where the energy barrier may differ by much less than 1 eV across different applied voltages, the above-described approach may include targeting the measurement of fluctuations in work function between different devices through evaluation of the barrier at non-zero voltage. In these cases, the low variations in energy barrier across applied voltages are an advantage, as the work function measurement is not distorted by yield variations between the different metal gates.

[0114] Advantageously, the above-described approach may provide a contactless (e.g., without physically contacting the device to apply a voltage or to measure photocurrent) method of measuring the band alignment of metal / oxide / semiconductor on product structures during the manufacturing process of the device before the final device is formed.

[0115] The disclosed embodiments describe another example approach for contactless measurement of the energy barrier of a metal / oxide interface or an oxide / semiconductor interface of a device (e.g., MOSFET, transistor 810) during fabrication of the device. For example, Fig. 12 shows an exemplary graph 1200 of normalized SE yield 1202 as a function of photon energy 1204 at laser powers corresponding to curves 1212, 1214, and 1216, consistent with embodiments of the present disclosure.

[0116] In some embodiments, normalized SE yield 1202 may be obtained from the SEM detector signal coming from the sweep in photon energy. The normalized SE yield 1202 is associated with a gray value.

[0117] Graph 1200 is generated for a zero or substantially zero voltage energy barrier of 3 eV. For photon energies that are low (e.g., below 3 eV), accumulated voltage results in a reduction of the barrier (as seen in Fig. 10), which results in a photocurrent and an increase in SE yield somewhat below 3 eV. At some lower photon energies, no charge carrier can go over the semiconductor / insulator (e.g., silicon / oxide) barrier of a transistor, resulting in no generated photocurrent in the transistor. As a result, the gate of the transistor behaves like an open contact, and a voltage is accumulated on the gate, thereby resulting in a dark voltage contrast signal being generated. As photon energies increase to greater than 3 eV, a photocurrent through the oxide of the transistor develops (see relationship in Equation 1). This current carries charges that reduce the charging of the metal gate. The SEM signal therefore increases. The higher the photon energy, the higher the photocurrent is in the oxide. The neutralization of the metal charge induced by the electron beam can be totally compensated at some point and the SEM signal saturates to a bright voltage contrast. This behavior is shown by the curve 1212.

[0118] The steepness of the slope of the SE yield is related to the intensity of the photocurrent. This intensity depends on photon energy and on the light source power. As shown in graph 1200, by increasing the power of the laser, the steepness of the SE yield slope increases. That is, the higher the laser power, the lower the photon energy at which the SE yield jumps to saturation (e.g., converging to an energy barrier). When normalized SE yield 1202 is 1, this indicates that the gate is not charged. At some laser powers, the SEM signal will jump from dark to bright voltage contrast as the laser wavelength is swept (e.g., over a range of photon energies). The photon energy 1218 at which that jump occurs is the energy barrier.

[0119] In some embodiments, the photon energy 1218 where the normalized SE yield 1202 jump begins corresponds to the energy barrier at a voltage. The end of the normalized SE yield jump (e.g., point 1222 for curve 1212, point 1224 for curve 1214, point 1226 for curve 1216) may correspond to the zero-voltage energy barrier.

[0120] Advantageously, this other exemplary approach may provide a contactless (e.g., without physically contacting the device to obtain measurements) method of measuring the band alignment of metal / oxide / semiconductor on product structures during the manufacturing process of the device before the final device is formed. In some embodiments, the only parameter this other example approach may adjust is the laser power.

[0121] Fig. 13 shows an exemplary process 1300 for measuring an energy barrier (e.g., a zero-voltage or substantially near zero-voltage energy barrier such as in Fig. 10, zero-voltage energy barrier 1006 of a metal-oxide interface or zero-voltage energy barrier 1008 of a silicon-oxide interface) of a transistor (e.g., transistor 810 of Fig. 8) during fabrication of the transistor, consistent with embodiments of the present disclosure.

[0122] At step 1302, for each of a plurality of landing energies of a charged particle beam (e.g., electron beam 806 of Fig. 8), a charged particle system (e.g., charged particle system 800 of Fig. 8) may irradiate a gate (e.g., gate 802 of Fig. 8) of a transistor (e.g., transistor 810 of Fig. 8) with a charged particle beam, irradiate a material (e.g., silicon substrate 812 of Fig. 8) underneath the gate with a photon beam (e.g., photon beams 808 of Fig. 8), determine a photocurrent (e.g., photocurrent 902 of Fig. 9) of the transistor for each of a plurality of photon energies (e.g., photon energy 904 of Fig. 9), and determine an energy barrier (e.g., energy barrier 906 of Fig. 9) based on the determined photocurrents.

[0123] In some embodiments, determining the photocurrent of the transistor comprises obtaining a grey level value generated by a charged particle beam tool providing the charged particle beam and determining a detector current of the charged particle beam tool.

[0124] In some embodiments, determining the detector current of the charged particle beam tool may include determining a back scattered electron yield of the charged particle beam tool; determining a collection efficiency of a detector of the charged particle beam tool; and determining a primary beam electron current of the charged particle beam tool.

[0125] In some embodiments, determining the energy barrier may include plotting the photocurrents with respect to the plurality of photon energies and determining an inflection point of the plot (e.g., energy barrier 906 of Fig. 9), the energy barrier corresponding to a photon energy of the inflection point. That is, the energy barrier indicates the point at which current begins to flow through a device (induced by photon energy).

[0126] In some embodiments, a charged particle beam tool (e.g., EBI system 100 of Fig. 1, electron beam tool 104 of Fig. 2A, electron beam tool 100B of Fig. 2B, electron beam tool 510 of Fig. 5) may be configured to provide each of the plurality of landing energies of the charged particle beam. In some embodiments, each of the plurality of landing energies of the charged particle beam may correspond to a voltage applied to the transistor. That is, a charged particle beam tool may adjust or change a voltage applied to the transistor by adjusting the landing energy of the charged particle beam on the transistor.

[0127] At step 1304, the charged particle system may plot a plurality of energy barriers (e.g., energy barrier 906 of Fig. 9, energy barriers 1002 of Fig. 10) with respect to a plurality of oxide electric fields(e.g., oxide electric fields 1004 of Fig. 10). In some embodiments, the zero-voltage or substantially near zero-voltage energy barrier of the transistor (e.g., in Fig. 10, zero-voltage energy barrier 1006 of a metal-oxide interface or zero-voltage energy barrier 1008 of a silicon-oxide interface) may be determined based, at least in part, on the plot (e.g., graph 1000 of Fig. 10). For example, the points on the plot may be fitted, and the fit may be extrapolated to an oxide electric field value of zero or substantially zero.

[0128] At step 1306, using the plot, the charged particle system may determine the energy barrier values (e.g., energy barrier values 1006 or 1008 of Fig. 10) to be the energy barrier values of the extrapolated fit at an oxide electric field value of zero or substantially zero.

[0129] In some embodiments, the zero- voltage or substantially near zero- voltage energy barrier of the transistor may be associated with an interface between a metal layer (e.g., metal gate 802 of Fig. 8) and an insulating layer (e.g., insulating layer 804 of Fig. 8) of the transistor.

[0130] In some embodiments, the zero- voltage or substantially near zero- voltage energy barrier of the transistor may be associated with an interface between a semiconductor layer (e.g., silicon substrate 812 of Fig. 8) and an insulating layer of the transistor.

[0131] In some embodiments, the above-described steps may be performed during fabrication of a transistor (e.g., before one or more metal layers have been deposited for the gate) such that one or more metal layers may be adjusted or modified based on the determined zero-voltage or substantially near zero-voltage energy barrier of the transistor. In some embodiments, adjusting or modifying the metal layer of the gate may cause a work function of the gate to be adjusted or modified such that performance of the final transistor is improved.

[0132] Fig. 14 shows an exemplary process 1400 for measuring an energy barrier (e.g., a zero-voltage or substantially near zero-voltage energy barrier such as points 1222, 1224, 1226 of Fig. 12) of a transistor (e.g., transistor 810 of Fig. 8) during fabrication of the transistor, consistent with embodiments of the present disclosure.

[0133] At step 1402, a charged particle system (e.g., charged particle system 800 of Fig. 8) may irradiate a gate (e.g., gate 802 of Fig. 8) of a transistor (e.g., transistor 810 of Fig. 8) with a charged particle beam (e.g., a plurality of charged particles).

[0134] At step 1404, the system may irradiate a material (e.g., silicon substrate 812 of Fig. 8) underneath the gate with a photon beam (e.g., photon beams 808 of Fig. 8) (e.g., a plurality of photon particles). In some embodiments, a laser source (e.g., ACC module 520 of Fig. 5) may provide the photon beam at a first laser power (e.g., corresponding to curve 1212 of Fig. 12).

[0135] At step 1406, the system may determine a SE yield (e.g., normalized SE yield 1202 of Fig. 12) at each of a plurality of photon energies (e.g., photon energy 1204 of Fig. 12). In some embodiments, determining the SE yield at each of the plurality of photon energies may include obtaining a grey level value from the charged particle beam tool. For example, the charged particle beam tool may generate agrey level value at each of a plurality of photon energies to determine the SE yield at each of the plurality of photon energies.

[0136] At step 1408, the system may plot the SE yields with respect to the plurality of photon energies.

[0137] At step 1410, the system may determine the zero-voltage or substantially near zero-voltage energy barrier (e.g., points 1222, 1224, 1226 of Fig. 12) of the transistor based, at least in part, on the plot (e.g., based on the determined SE yields and the plurality of photon energies). In some embodiments, determining the zero- voltage energy barrier of the transistor may include determining a point (e.g., points 1222, 1224, 1226 of Fig. 12) at which the plot plateaus. In some embodiments, a photon energy at the point at which the plot plateaus corresponds to the determined zero-voltage energy barrier of the transistor.

[0138] In some embodiments, the laser source may be configured to irradiate a material underneath the gate with a photon beam at a second laser power (e.g., corresponding to curve 1214 of Fig. 12). In some embodiments, the above-described steps may be repeated for any number of laser powers (e.g., including curve 1216 of Fig. 12). For example, at the second laser power the charged particle system may determine a SE yield at each of a plurality of photon energies; plot the SE yields with respect to the plurality of photon energies; and determine a zero-voltage or substantially near zero- voltage energy barrier of the transistor based, at least in part, on the plot.

[0139] In some embodiments, the first laser power may be less than the second laser power, where the zero-voltage or substantially near zero-voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage or substantially near zero-voltage energy barrier of the transistor at the second laser power.

[0140] In some embodiments, the zero- voltage or substantially near zero- voltage energy barrier of the transistor may be associated with an interface between a metal layer (e.g., metal gate 802 of Fig. 8) and an insulating layer (e.g., insulating layer 804 of Fig. 8) of the transistor.

[0141] In some embodiments, the zero- voltage or substantially near zero- voltage energy barrier of the transistor may be associated with an interface between a semiconductor layer (e.g., silicon substrate 812 of Fig. 8) and an insulating layer of the transistor.

[0142] In some embodiments, the above-described steps may be performed during fabrication of a transistor (e.g., before one or more metal layers have been deposited for the gate) such that one or more metal layers may be adjusted or modified based on the determined zero-voltage or substantially near zero-voltage energy barrier of the transistor. In some embodiments, adjusting or modifying the metal layer of the gate may cause a work function of the gate to be adjusted or modified such that performance of the final transistor is improved.

[0143] A non-transitory computer readable medium may be provided that stores instructions for a processor of a controller (e.g., controller 109 of Fig. 1) for controlling the electron beam tool or the ACC module or other systems of other systems and servers, or components thereof, consistent with embodiments in the present disclosure. These instructions may allow the one or more processors tocarry out image processing, data processing, beamlet scanning, graphical display, operations of a charged particle beam apparatus, or another imaging device, operations of the ACC module, or the like for providing operations consistent with those described above for Figs. 8-14. In some embodiments, the non-transitory computer readable medium may be provided that stores instructions for a processor to perform the steps of process 1300 or the steps of process 1400. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read Only Memory (PROM), and Erasable Programmable Read Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), a cache, a register, any other memory chip or cartridge, and networked versions of the same.

[0144] The embodiments may further be described using the following clauses:1. A method of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: for each of a plurality of landing energies of a charged particle beam: irradiating a gate of the transistor with the charged particle beam; irradiating a material underneath the gate with a photon beam; determining a photocurrent of the transistor for each of a plurality of photon energies; and determining an energy barrier based on the determined photocurrents; determining a plurality of energy barriers based on the determined photocurrents for each of the plurality of landing energies of the charged particle beam; plotting the plurality of energy barriers with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.2. The method of clause 1, wherein determining the photocurrent of the transistor comprises: obtaining a grey level value generated by a charged particle beam tool providing the charged particle beam; and determining a detector current of the charged particle beam tool.3. The method of clause 2, wherein determining the detector current of the charged particle beam tool comprises: determining a back scattered electron yield of the charged particle beam tool; determining a collection efficiency of a detector of the charged particle beam tool; and determining a primary beam electron current of the charged particle beam tool.4. The method of any one of clauses 1-3, wherein determining the energy barrier comprises: plotting the photocurrents with respect to the plurality of photon energies; anddetermining an inflection point of the plot, the energy barrier corresponding to a photon energy of the inflection point.5. The method of any one of clauses 1-4, wherein determining the energy barrier of the transistor comprises: fitting the plot of the plurality of energy barriers; extrapolating the fit to an oxide electric field value of zero; and determining an energy barrier value of the extrapolated fit at the oxide electric field value of zero, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier corresponds to the determined energy barrier value.6. The method of any one of clauses 1-5, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET).7. The method of any one of clauses 1-6, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.8. The method of clause 7, wherein the insulating layer comprises an oxide.9. The method of any one of clauses 1-6, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.10. The method of clause 9, wherein the semiconductor layer comprises a silicon substrate.11. The method of any one of clauses 9-10, wherein the insulating layer comprises an oxide.12. The method of any one of clauses 1-11, wherein a charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam.13. The method of any one of clauses 1-12, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor.14. The method of any one of clauses 1-13, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.15. The method of clause 14, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.16. A method of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: irradiating a gate of the transistor with a charged particle beam with a first landing energy; irradiating a material underneath the gate with a photon beam; determining a first plurality of photocurrents of the transistor over a first plurality of photon energies; determining a first energy barrier based on the determined first plurality of photocurrents; irradiating the gate of the transistor with the charged particle beam with a second landing energy;irradiating the material underneath the gate with the photon beam; determining a second plurality of photocurrents of the transistor over a second plurality of photon energies; determining a second energy barrier based on the determined second plurality of photocurrents; plotting the first energy barrier and the second energy barrier with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.17. The method of clause 16, wherein determining the first plurality of photocurrents and the second plurality of photocurrents of the transistor comprises: obtaining a grey level value generated by a charged particle beam tool providing the charged particle beam; and determining a detector current of the charged particle beam tool.18. The method of clause 17, wherein determining the detector current of the charged particle beam tool comprises: determining a back scattered electron yield of the charged particle beam tool; determining a collection efficiency of a detector of the charged particle beam tool; and determining a primary beam electron current of the charged particle beam tool.19. The method of any one of clauses 16-18, wherein determining the first energy barrier and the second energy barrier comprises: plotting the first plurality of photocurrents with respect to the first plurality of photon energies; plotting the second plurality of photocurrents with respect to the second plurality of photon energies; determining a first inflection point of the plot of the first plurality of photocurrents, the first energy barrier corresponding to a photon energy of the first inflection point; and determining a second inflection point of the plot of the second plurality of photocurrents, the second energy barrier corresponding to a photon energy of the second inflection point.20. The method of any one of clauses 16-19, wherein determining the energy barrier of the transistor comprises: fitting the plot of the first energy barrier and the second energy barrier; extrapolating the fit to an oxide electric field value of zero; and determining an energy barrier value of the extrapolated fit at the oxide electric field value of zero, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier corresponds to the determined energy barrier value.21. The method of any one of clauses 16-20, wherein the transistor comprises a metal-oxide- semiconductor field-effect transistor (MOSFET).22. The method of any one of clauses 16-21, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.23. The method of clause 22, wherein the insulating layer comprises an oxide.24. The method of any one of clauses 16-21, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.25. The method of clause 24, wherein the semiconductor layer comprises a silicon substrate.26. The method of any one of clauses 24-25, wherein the insulating layer comprises an oxide.27. The method of any one of clauses 16-26, wherein a charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam.28. The method of any one of clauses 16-27, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor.29. The method of any one of clauses 16-28, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.30. The method of clause 29, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.31. A method of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: irradiating a gate of the transistor with a charged particle beam; irradiating a material underneath the gate with a photon beam; determining a secondary electron (SE) yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.32. The method of clause 31 , where a charged particle beam tool provides the charged particle beam to the gate of the transistor.33. The method of clause 32, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining a grey level value from the charged particle beam tool.34. The method of any one of clauses 31-33, wherein the SE yields are normalized SE yields.35. The method of any one of clauses 31-34, wherein determining the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor comprises determining a point at which the plot plateaus.36. The method of clause 35, wherein a photon energy at the point at which the plot plateaus corresponds to the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.37. The method of any one of clauses 31-36, wherein a laser source provides the photon beam at a first laser power.38. The method of clause 37, wherein the laser source is configured to irradiate a material underneath the gate with a photon beam at a second laser power.39. The method of clause 38, further comprising, at the second laser power: determining a SE yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.40. The method of any one of clauses 38-39, wherein the first laser power is less than the second laser power.41. The method of any one of clauses 39-40, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the second laser power.42. The method of any one of clauses 31-41, wherein the transistor comprises a metal-oxide- semiconductor field-effect transistor (MOSFET).43. The method of any one of clauses 31-42, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.44. The method of clause 43, wherein the insulating layer comprises an oxide.45. The method of any one of clauses 31-42, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.46. The method of clause 45, wherein the semiconductor layer comprises a silicon substrate.47. The method of any one of clauses 45-46, wherein the insulating layer comprises an oxide.48. The method of any one of clauses 31-47, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.49. The method of clause 48, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.50. A method of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: providing a plurality of charged particles to a gate of the transistor; providing a plurality of photon particles to a material underneath the gate; generating, by a charged particle beam tool, a grey level value at each of a plurality of photon energies;determining a secondary electron (SE) yield at each of the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the determined SE yields and the plurality of photon energies, wherein the energy barrier is a zero- voltage energy barrier or a substantially near zero-voltage energy barrier.51. The method of clause 50, where a charged particle beam tool provides the plurality of charged particles to the gate of the transistor.52. The method of clause 51, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining a grey level value from the charged particle beam tool.53. The method of any one of clauses 50-52, wherein the SE yields are normalized SE yields.54. The method of any one of clauses 50-53, wherein determining the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor comprises determining a point at which a plot of the determined SE yields plateaus.55. The method of clause 54, wherein a photon energy at the point at which the plot plateaus corresponds to the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.56. The method of any one of clauses 50-55, wherein a laser source provides the plurality of photon particles at a first laser power.57. The method of clause 56, wherein the laser source is configured to irradiate a material underneath the gate with a plurality of photon particles at a second laser power.58. The method of clause 57, further comprising, at the second laser power: determining a SE yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.59. The method of any one of clauses 57-58, wherein the first laser power is less than the second laser power.60. The method of any one of clauses 58-59, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the second laser power.61. The method of any one of clauses 50-60, wherein the transistor comprises a metal-oxide- semiconductor field-effect transistor (MOSFET).62. The method of any one of clauses 50-61, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.63. The method of clause 62, wherein the insulating layer comprises an oxide.64. The method of any one of clauses 50-61, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.65. The method of clause 64, wherein the semiconductor layer comprises a silicon substrate.66. The method of any one of clauses 64-65, wherein the insulating layer comprises an oxide.67. The method of any one of clauses 50-66, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.68. The method of clause 67, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.69. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method of measuring an energy barrier of a transistor during fabrication of the transistor, the method comprising: for each of a plurality of landing energies of a charged particle beam: irradiating a gate of the transistor with the charged particle beam; irradiating a material underneath the gate with a photon beam; determining a photocurrent of the transistor for each of a plurality of photon energies; and determining an energy barrier based on the determined photocurrents; determining a plurality of energy barriers based on the determined photocurrents for each of the plurality of landing energies of the charged particle beam; plotting the plurality of energy barriers with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.70. The non-transitory computer readable medium of clause 69, wherein determining the photocurrent of the transistor comprises: obtaining a grey level value generated by a charged particle beam tool providing the charged particle beam; and determining a detector current of the charged particle beam tool.71. The non-transitory computer readable medium of clause 70, wherein determining the detector current of the charged particle beam tool comprises: determining a back scattered electron yield of the charged particle beam tool; determining a collection efficiency of a detector of the charged particle beam tool; and determining a primary beam electron current of the charged particle beam tool.72. The non-transitory computer readable medium of any one of clauses 69-71, wherein determining the energy barrier comprises: plotting the photocurrents with respect to the plurality of photon energies; anddetermining an inflection point of the plot, the energy barrier corresponding to a photon energy of the inflection point.73. The non-transitory computer readable medium of any one of clauses 69-72, wherein determining the energy barrier of the transistor comprises: fitting the plot of the plurality of energy barriers; extrapolating the fit to an oxide electric field value of zero; and determining an energy barrier value of the extrapolated fit at the oxide electric field value of zero, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier corresponds to the determined energy barrier value.74. The non-transitory computer readable medium of any one of clauses 69-73, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET).75. The non-transitory computer readable medium of any one of clauses 69-74, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.76. The non-transitory computer readable medium of clause 75, wherein the insulating layer comprises an oxide.77. The non-transitory computer readable medium of any one of clauses 69-74, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.78. The non-transitory computer readable medium of clause 77, wherein the semiconductor layer comprises a silicon substrate.79. The non-transitory computer readable medium of any one of clauses 77-78, wherein the insulating layer comprises an oxide.80. The non-transitory computer readable medium of any one of clauses 69-79, wherein a charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam.81. The non-transitory computer readable medium of any one of clauses 69-80, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor.82. The non-transitory computer readable medium of any one of clauses 69-81, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.83. The non-transitory computer readable medium of clause 82, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.84. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method of measuring an energy barrier of a transistor during fabrication of the transistor, the method comprising:irradiating a gate of the transistor with a charged particle beam with a first landing energy; irradiating a material underneath the gate with a photon beam; determining a first plurality of photocurrents of the transistor over a first plurality of photon energies; determining a first energy barrier based on the determined first plurality of photocurrents; irradiating the gate of the transistor with the charged particle beam with a second landing energy; irradiating the material underneath the gate with the photon beam; determining a second plurality of photocurrents of the transistor over a second plurality of photon energies; determining a second energy barrier based on the determined second plurality of photocurrents; plotting the first energy barrier and the second energy barrier with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.85. The non-transitory computer readable medium of clause 84, wherein determining the first plurality of photocurrents and the second plurality of photocurrents of the transistor comprises: obtaining a grey level value generated by a charged particle beam tool providing the charged particle beam; and determining a detector current of the charged particle beam tool.86. The non-transitory computer readable medium of clause 85, wherein determining the detector current of the charged particle beam tool comprises: determining a back scattered electron yield of the charged particle beam tool; determining a collection efficiency of a detector of the charged particle beam tool; and determining a primary beam electron current of the charged particle beam tool.87. The non-transitory computer readable medium of any one of clauses 84-86, wherein determining the first energy barrier and the second energy barrier comprises: plotting the first plurality of photocurrents with respect to the first plurality of photon energies; plotting the second plurality of photocurrents with respect to the second plurality of photon energies; determining a first inflection point of the plot of the first plurality of photocurrents, the first energy barrier corresponding to a photon energy of the first inflection point; and determining a second inflection point of the plot of the second plurality of photocurrents, the second energy barrier corresponding to a photon energy of the second inflection point.88. The non-transitory computer readable medium of any one of clauses 84-87, wherein determining the energy barrier of the transistor comprises: fitting the plot of the first energy barrier and the second energy barrier; extrapolating the fit to an oxide electric field value of zero; anddetermining an energy barrier value of the extrapolated fit at the oxide electric field value of zero, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier corresponds to the determined energy barrier value.89. The non-transitory computer readable medium of any one of clauses 84-88, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET).90. The non-transitory computer readable medium of any one of clauses 84-89, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.91. The non-transitory computer readable medium of clause 90, wherein the insulating layer comprises an oxide.92. The non-transitory computer readable medium of any one of clauses 84-89, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.93. The non-transitory computer readable medium of clause 92, wherein the semiconductor layer comprises a silicon substrate.94. The non-transitory computer readable medium of any one of clauses 92-93, wherein the insulating layer comprises an oxide.95. The non-transitory computer readable medium of any one of clauses 84-94, wherein a charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam.96. The non-transitory computer readable medium of any one of clauses 84-95, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor.97. The non-transitory computer readable medium of any one of clauses 84-96, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.98. The non-transitory computer readable medium of clause 97, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.99. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method of measuring an energy barrier of a transistor during fabrication of the transistor, the method comprising: irradiating a gate of the transistor with a charged particle beam; irradiating a material underneath the gate with a photon beam; determining a secondary electron (SE) yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.100. The non-transitory computer readable medium of clause 99, where a charged particle beam tool provides the charged particle beam to the gate of the transistor.101. The non-transitory computer readable medium of clause 100, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining a grey level value from the charged particle beam tool.102. The non-transitory computer readable medium of any one of clauses 99-101, wherein the SE yields are normalized SE yields.103. The non-transitory computer readable medium of any one of clauses 99-102, wherein determining the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor comprises determining a point at which the plot plateaus.104. The non-transitory computer readable medium of clause 103, wherein a photon energy at the point at which the plot plateaus corresponds to the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.105. The non-transitory computer readable medium of any one of clauses 99-104, wherein a laser source provides the photon beam at a first laser power.106. The non-transitory computer readable medium of clause 105, wherein the laser source is configured to irradiate a material underneath the gate with a photon beam at a second laser power.107. The non-transitory computer readable medium of clause 106, further comprising, at the second laser power: determining a SE yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.108. The non-transitory computer readable medium of any one of clauses 106-107, wherein the first laser power is less than the second laser power.109. The non-transitory computer readable medium of any one of clauses 107-108, wherein the zerovoltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the second laser power.110. The non-transitory computer readable medium of any one of clauses 99-109, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET).111. The non-transitory computer readable medium of any one of clauses 99-110, wherein the zerovoltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.112. The non-transitory computer readable medium of clause 111, wherein the insulating layer comprises an oxide.113. The non-transitory computer readable medium of any one of clauses 99-110, wherein the zerovoltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.114. The non-transitory computer readable medium of clause 113, wherein the semiconductor layer comprises a silicon substrate.115. The non-transitory computer readable medium of any one of clauses 113-114, wherein the insulating layer comprises an oxide.116. The non-transitory computer readable medium of any one of clauses 99-115, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.117. The non-transitory computer readable medium of clause 116, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.118. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method of measuring an energy barrier of a transistor during fabrication of the transistor, the method comprising: providing a plurality of charged particles to a gate of the transistor; providing a plurality of photon particles to a material underneath the gate; generating, by a charged particle beam tool, a grey level value at each of a plurality of photon energies; determining a secondary electron (SE) yield at each of the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the determined SE yields and the plurality of photon energies, wherein the energy barrier is a zero- voltage energy barrier or a substantially near zero-voltage energy barrier.119. The non-transitory computer readable medium of clause 118, where a charged particle beam tool provides the plurality of charged particles to the gate of the transistor.120. The non-transitory computer readable medium of clause 119, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining a grey level value from the charged particle beam tool.121. The non-transitory computer readable medium of any one of clauses 118-120, wherein the SE yields are normalized SE yields.122. The non-transitory computer readable medium of any one of clauses 118-121, wherein determining the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor comprises determining a point at which a plot of the determined SE yields plateaus.123. The non-transitory computer readable medium of clause 122, wherein a photon energy at the point at which the plot plateaus corresponds to the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.124. The non-transitory computer readable medium of any one of clauses 118-123, wherein a laser source provides the plurality of photon particles at a first laser power.125. The non-transitory computer readable medium of clause 124, wherein the laser source is configured to irradiate a material underneath the gate with a plurality of photon particles at a second laser power.126. The non-transitory computer readable medium of clause 125, further comprising, at the second laser power: determining a SE yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.127. The non-transitory computer readable medium of any one of clauses 125-126, wherein the first laser power is less than the second laser power.128. The non-transitory computer readable medium of any one of clauses 126-127, wherein the zerovoltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the second laser power.129. The non-transitory computer readable medium of any one of clauses 118-128, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET).130. The non-transitory computer readable medium of any one of clauses 118-129, wherein the zerovoltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.131. The non-transitory computer readable medium of clause 130, wherein the insulating layer comprises an oxide.132. The non-transitory computer readable medium of any one of clauses 118-129, wherein the zerovoltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.133. The non-transitory computer readable medium of clause 132, wherein the semiconductor layer comprises a silicon substrate.134. The non-transitory computer readable medium of any one of clauses 132-133, wherein the insulating layer comprises an oxide.135. The non-transitory computer readable medium of any one of clauses 118-134, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.136. The non-transitory computer readable medium of clause 135, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.137. A system of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: a memory storing a set of instructions; and one or more processors configured to execute the set of instructions to cause the system to perform operations comprising: for each of a plurality of landing energies of a charged particle beam: irradiating a gate of the transistor with the charged particle beam; irradiating a material underneath the gate with a photon beam; determining a photocurrent of the transistor for each of a plurality of photon energies; and determining an energy barrier based on the determined photocurrents; determining a plurality of energy barriers based on the determined photocurrents for each of the plurality of landing energies of the charged particle beam; plotting the plurality of energy barriers with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.138. The system of clause 137, wherein determining the photocurrent of the transistor comprises: obtaining a grey level value generated by a charged particle beam tool providing the charged particle beam; and determining a detector current of the charged particle beam tool.139. The system of clause 138, wherein determining the detector current of the charged particle beam tool comprises: determining a back scattered electron yield of the charged particle beam tool; determining a collection efficiency of a detector of the charged particle beam tool; and determining a primary beam electron current of the charged particle beam tool.140. The system of any one of clauses 137-139, wherein determining the energy barrier comprises: plotting the photocurrents with respect to the plurality of photon energies; and determining an inflection point of the plot, the energy barrier corresponding to a photon energy of the inflection point.141. The system of any one of clauses 137-140, wherein determining the energy barrier of the transistor comprises: fitting the plot of the plurality of energy barriers; extrapolating the fit to an oxide electric field value of zero; and determining an energy barrier value of the extrapolated fit at the oxide electric field value of zero, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier corresponds to the determined energy barrier value.142. The system of any one of clauses 137-141, wherein the transistor comprises a metal-oxide- semiconductor field-effect transistor (MOSFET).143. The system of any one of clauses 137-142, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.144. The system of clause 143, wherein the insulating layer comprises an oxide.145. The system of any one of clauses 137-142, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.146. The system of clause 145, wherein the semiconductor layer comprises a silicon substrate.147. The system of any one of clauses 145-146, wherein the insulating layer comprises an oxide.148. The system of any one of clauses 137-147, wherein a charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam.149. The system of any one of clauses 137-148, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor.150. The system of any one of clauses 137-149, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.151. The system of clause 150, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.152. A system of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: a memory storing a set of instructions; and one or more processors configured to execute the set of instructions to cause the system to perform operations comprising: irradiating a gate of the transistor with a charged particle beam with a first landing energy; irradiating a material underneath the gate with a photon beam; determining a first plurality of photocurrents of the transistor over a first plurality of photon energies; determining a first energy barrier based on the determined first plurality of photocurrents; irradiating the gate of the transistor with the charged particle beam with a second landing energy; irradiating the material underneath the gate with the photon beam; determining a second plurality of photocurrents of the transistor over a second plurality of photon energies; determining a second energy barrier based on the determined second plurality of photocurrents; plotting the first energy barrier and the second energy barrier with respect to a plurality of oxide electric fields; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.153. The system of clause 152, wherein determining the first plurality of photocurrents and the second plurality of photocurrents of the transistor comprises: obtaining a grey level value generated by a charged particle beam tool providing the charged particle beam; and determining a detector current of the charged particle beam tool.154. The system of clause 153, wherein determining the detector current of the charged particle beam tool comprises: determining a back scattered electron yield of the charged particle beam tool; determining a collection efficiency of a detector of the charged particle beam tool; and determining a primary beam electron current of the charged particle beam tool.155. The system of any one of clauses 152-154, wherein determining the first energy barrier and the second energy barrier comprises: plotting the first plurality of photocurrents with respect to the first plurality of photon energies; plotting the second plurality of photocurrents with respect to the second plurality of photon energies; determining a first inflection point of the plot of the first plurality of photocurrents, the first energy barrier corresponding to a photon energy of the first inflection point; and determining a second inflection point of the plot of the second plurality of photocurrents, the second energy barrier corresponding to a photon energy of the second inflection point.156. The system of any one of clauses 152-155, wherein determining the energy barrier of the transistor comprises: fitting the plot of the first energy barrier and the second energy barrier; extrapolating the fit to an oxide electric field value of zero; and determining an energy barrier value of the extrapolated fit at the oxide electric field value of zero, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier corresponds to the determined energy barrier value.157. The system of any one of clauses 152-156, wherein the transistor comprises a metal-oxide- semiconductor field-effect transistor (MOSFET).158. The system of any one of clauses 152-157, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.159. The system of clause 158, wherein the insulating layer comprises an oxide.160. The system of any one of clauses 152-157, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.161. The system of clause 160, wherein the semiconductor layer comprises a silicon substrate.162. The system of any one of clauses 160-161, wherein the insulating layer comprises an oxide.163. The system of any one of clauses 152-162, wherein a charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam.164. The system of any one of clauses 152-163, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor.165. The system of any one of clauses 152-164, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.166. The system of clause 165, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.167. A system of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: a memory storing a set of instructions; and one or more processors configured to execute the set of instructions to cause the system to perform operations comprising: irradiating a gate of the transistor with a charged particle beam; irradiating a material underneath the gate with a photon beam; determining a secondary electron (SE) yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.168. The system of clause 167, where a charged particle beam tool provides the charged particle beam to the gate of the transistor.169. The system of clause 168, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining a grey level value from the charged particle beam tool.170. The system of any one of clauses 167-168, wherein the SE yields are normalized SE yields.171. The system of any one of clauses 167-170, wherein determining the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor comprises determining a point at which the plot plateaus.172. The system of clause 171, wherein a photon energy at the point at which the plot plateaus corresponds to the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.173. The system of any one of clauses 167-172, wherein a laser source provides the photon beam at a first laser power.174. The system of clause 173, wherein the laser source is configured to irradiate a material underneath the gate with a photon beam at a second laser power.175. The system of clause 174, further comprising, at the second laser power:determining a SE yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.176. The system of any one of clauses 174-175, wherein the first laser power is less than the second laser power.177. The system of any one of clauses 175-176, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the second laser power.178. The system of any one of clauses 167-177, wherein the transistor comprises a metal-oxide- semiconductor field-effect transistor (MOSFET).179. The system of any one of clauses 167-178, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.180. The system of clause 179, wherein the insulating layer comprises an oxide.181. The system of any one of clauses 167-178, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.182. The system of clause 181, wherein the semiconductor layer comprises a silicon substrate.183. The system of any one of clauses 181-182, wherein the insulating layer comprises an oxide.184. The system of any one of clauses 167-183, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.185. The system of clause 184, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.186. A system of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: a memory storing a set of instructions; and one or more processors configured to execute the set of instructions to cause the system to perform operations comprising: providing a plurality of charged particles to a gate of the transistor; providing a plurality of photon particles to a material underneath the gate; generating, by a charged particle beam tool, a grey level value at each of a plurality of photon energies; determining a secondary electron (SE) yield at each of the plurality of photon energies; anddetermining an energy barrier of the transistor based, at least in part, on the determined SE yields and the plurality of photon energies, wherein the energy barrier is a zero- voltage energy barrier or a substantially near zero-voltage energy barrier.187. The system of clause 186, where a charged particle beam tool provides the plurality of charged particles to the gate of the transistor.188. The system of clause 187, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining a grey level value from the charged particle beam tool.189. The system of any one of clauses 186-188, wherein the SE yields are normalized SE yields.190. The system of any one of clauses 186-189, wherein determining the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor comprises determining a point at which a plot of the determined SE yields plateaus.191. The system of clause 190, wherein a photon energy at the point at which the plot plateaus corresponds to the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.192. The system of any one of clauses 186-191, wherein a laser source provides the plurality of photon particles at a first laser power.193. The system of clause 192, wherein the laser source is configured to irradiate a material underneath the gate with a plurality of photon particles at a second laser power.194. The system of clause 193, further comprising, at the second laser power: determining a SE yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near zero-voltage energy barrier.195. The system of any one of clauses 193-194, wherein the first laser power is less than the second laser power.196. The system of any one of clauses 194-195, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor at the second laser power.197. The system of any one of clauses 186-196, wherein the transistor comprises a metal-oxide- semiconductor field-effect transistor (MOSFET).198. The system of any one of clauses 186-197, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a metal layer and an insulating layer of the transistor.199. The system of clause 198, wherein the insulating layer comprises an oxide.200. The system of any one of clauses 186-197, wherein the zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor is associated with an interface between a semiconductor layer and an insulating layer of the transistor.201. The system of clause 200, wherein the semiconductor layer comprises a silicon substrate. 202. The system of any one of clauses 200-201, wherein the insulating layer comprises an oxide.203. The system of any one of clauses 200-202, further comprising adjusting a metal layer of the gate based on the determined zero-voltage energy barrier or the substantially near zero-voltage energy barrier of the transistor.204. The system of clause 203, wherein adjusting the metal layer of the gate causes a work function of the gate to be adjusted.

[0145] It will be appreciated that the embodiments of the present disclosure are not limited to the exact construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from the scope thereof.

Claims

CLAIMS1. A system of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: a memory storing a set of instructions; and one or more processors configured to execute the set of instructions to cause the system to perform operations comprising: generating, by a charged particle beam tool, a grey level value at each of a plurality of photon energies; determining a secondary electron (SE) yield at each of the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the determined SE yields and the plurality of photon energies.

2. The system of claim 1, further comprising: providing a plurality of charged particles to a gate of the transistor; and providing a plurality of photon particles to a material underneath the gate.

3. The system of claim 2, where a charged particle beam tool provides the plurality of charged particles to the gate of the transistor.

4. The system of claim 3, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining a grey level value from the charged particle beam tool.

5. The system of claim 1, wherein determining the energy barrier of the transistor comprises determining a point at which a plot of the determined SE yields plateaus.

6. The system of claim 5, wherein a photon energy at the point at which the plot plateaus corresponds to the determined energy barrier of the transistor.

7. The system of claim 2, wherein a laser source provides the plurality of photon particles at a first laser power.

8. The system of claim 7, wherein the laser source is configured to irradiate a material underneath the gate with a plurality of photon particles at a second laser power.

9. The system of claim 8, further comprising, at the second laser power:determining a SE yield at each of a plurality of photon energies; plotting the SE yields with respect to the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the plot.

10. The system of claim 9, wherein the energy barrier of the transistor at the first laser power is greater than the energy barrier of the transistor at the second laser power.

11. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method of measuring an energy barrier of a transistor during fabrication of the transistor, the method comprising: generating, by a charged particle beam tool, a grey level value at each of a plurality of photon energies; determining a secondary electron (SE) yield at each of the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the determined SE yields and the plurality of photon energies.

12. The non-transitory computer readable medium of claim 11, wherein the set of instructions that is executable by at least one processor of a computing device to cause the computing device to further perform: providing a plurality of charged particles to a gate of the transistor; and providing a plurality of photon particles to a material underneath the gate.

13. The non-transitory computer readable medium of claim 12, where a charged particle beam tool provides the plurality of charged particles to the gate of the transistor.

14. The non-transitory computer readable medium of claim 13, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining a grey level value from the charged particle beam tool.

15. A method of measuring an energy barrier of a transistor during fabrication of the transistor, comprising: generating, by a charged particle beam tool, a grey level value at each of a plurality of photon energies; determining a secondary electron (SE) yield at each of the plurality of photon energies; and determining an energy barrier of the transistor based, at least in part, on the determined SE yields and the plurality of photon energies.

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