Semiconductor device and light detection device

Abstract

A semiconductor device according to an embodiment of the present disclosure comprises: a first semiconductor layer having a first surface and a second surface facing each other, with one or more first impurity regions included on the first surface; a second semiconductor layer stacked on the first semiconductor layer, on the first surface side; one or more through wirings penetrating the second semiconductor layer and electrically connected to each of the one or more first impurity regions of the first semiconductor layer; and a first etching stop film selectively provided only around the one or more through wirings, in the vicinity of the first surface of the first semiconductor layer.

Description

Semiconductor device and photodetector

[0001] The present disclosure relates to a semiconductor device and a photodetector in which a plurality of semiconductor layers are stacked.

[0002] For example, Patent Document 1 discloses a solid-state imaging device in which two stacked semiconductor wafers are electrically connected using a connection conductor that penetrates the semiconductor wafers and has its side surfaces covered with an insulating film.

[0003] Japanese Patent Application Laid-Open No. 2022-31321

[0004] Incidentally, there is a demand for improved electrical characteristics in photodetectors used as imaging devices and the like.

[0005] It would be desirable to provide semiconductor devices and photodetectors that can have improved electrical properties.

[0006] A semiconductor device according to one embodiment of the present disclosure includes a first semiconductor layer having opposing first and second surfaces and having one or more first impurity regions on the first surface, a second semiconductor layer stacked on the first surface side of the first semiconductor layer, one or more through-holes that penetrate the second semiconductor layer and are electrically connected to the one or more first impurity regions of the first semiconductor layer, and a first etching stopper film selectively provided only around the one or more through-holes near the first surface of the first semiconductor layer.

[0007] A photodetector according to one embodiment of the present disclosure includes: a first semiconductor layer having a first surface and a second surface opposite to each other and having a pixel array portion in which a plurality of pixels are arranged in an array in an in-plane direction; a light receiving portion provided in the first semiconductor layer for each pixel and generating carriers according to an amount of received light by photoelectric conversion; one or more first impurity regions provided in the first surface of the first semiconductor layer; a second semiconductor layer stacked on the first surface side of the first semiconductor layer; one or more through-holes that penetrate the second semiconductor layer and are electrically connected to the one or more first impurity regions of the first semiconductor layer, respectively; and a first etching stopper film selectively provided only around the one or more through-holes near the first surface of the first semiconductor layer.

[0008] In a semiconductor device and a photodetector according to an embodiment of the present disclosure, in a stacked structure including a first semiconductor layer and a second semiconductor layer, a first etching stopper film is selectively provided only around one or more through-holes that penetrate the second semiconductor layer and are electrically connected to one or more first impurity regions provided in a first surface of the first semiconductor layer, thereby reducing the area of ​​the first etching stopper film facing a boundary between an impurity region including one or more first impurity regions formed in the first surface of the first semiconductor layer and the surrounding first semiconductor layer.

[0009] 6A is a schematic cross-sectional view illustrating an example of a photodetector according to an embodiment of the present disclosure; FIG. 6B is a block diagram illustrating an example of a schematic configuration of the photodetector shown in FIG. 1; FIG. 6C is an example of an equivalent circuit diagram of a unit pixel of the photodetector shown in FIG. 1; FIG. 6D is a schematic cross-sectional view illustrating an example of a configuration of a main part of the photodetector according to an embodiment of the present disclosure; FIG. 6A is a schematic cross-sectional view illustrating a process subsequent to FIG. 6A; FIG. 6B is a schematic cross-sectional view illustrating a process subsequent to FIG. 6C; FIG. 6D is a schematic cross-sectional view illustrating an example of a configuration of a main part of a photodetector according to a first modification of the present disclosure; FIG. 7A is a schematic cross-sectional view illustrating a relationship between the through via and the opening shown in FIG. 7A; FIG. 8A is a schematic cross-sectional view illustrating a process subsequent to FIG. 8B; and FIG. 8C is a schematic cross-sectional view illustrating a process subsequent to FIG. 12A is a schematic cross-sectional view showing a step subsequent to FIG. 8D. FIG. 12B is a schematic cross-sectional view showing a step subsequent to FIG. 8F. FIG. 12C is a schematic cross-sectional view showing a step subsequent to FIG. 8D. FIG. 12E is a schematic cross-sectional view showing a step subsequent to FIG. 8F. FIG. 12F is a schematic cross-sectional view showing another example of the configuration of the main parts of the photodetector according to Modification 1 of the present disclosure. FIG. 12C is a schematic cross-sectional view showing an example of the configuration of the main parts of the photodetector according to Modification 2 of the present disclosure. FIG. 12C is a schematic cross-sectional view showing an example of the configuration of the main parts of the photodetector according to Modification 3 of the present disclosure. FIG. 12A is a schematic cross-sectional view showing a relationship between the through via and the opening shown in FIG. 12A. FIG. 12B is a schematic cross-sectional view showing an example of the configuration of the main parts of the photodetector according to Modification 4 of the present disclosure. FIG. 12C is a schematic cross-sectional view showing an example of a method for manufacturing the photodetector shown in FIG. 13. FIG. 14A is a schematic cross-sectional view showing a step subsequent to FIG. 14B. FIG. 14C is a schematic cross-sectional view showing an example of the configuration of the main parts of the photodetector according to Modification 5 of the present disclosure. FIG. 15A is a schematic cross-sectional view showing a planar layout of an etching stopper film for a plurality of through vias in the vicinity of the first surface of the semiconductor substrate shown in FIG. FIG. 2 is a functional block diagram illustrating an example of an electronic device using the photodetector shown in FIG. 1 etc.Fig. 1 is a diagram showing an example of a schematic configuration of an endoscopic surgery system. Fig. 2 is a block diagram showing an example of a functional configuration of a camera head and a CCU. Fig. 3 is a block diagram showing an example of a schematic configuration of a vehicle control system. Fig. 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit.

[0010] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The following description is one specific example of the present disclosure, and the present disclosure is not limited to the following aspects. Furthermore, the present disclosure is not limited to the arrangement, dimensions, dimensional ratios, etc. of the components shown in the drawings. The order of description is as follows: 1. Embodiment (Photodetector in which an etching stopper film is selectively formed only around a through-wiring connected to an impurity region provided on the surface of a lower semiconductor layer in a stacked body in which multiple semiconductor layers are stacked) 1-1. Configuration of the photodetector 1-2. Method for manufacturing the photodetector 1-3. Actions and effects 2. Modifications 2-1. Modification 1 (Another example of the configuration of the photodetector) 2-2. Modification 2 (Another example of the configuration of the photodetector) 2-3. Modification 3 (Another example of the configuration of the photodetector) 2-4. Modification 4 (Another example of the configuration of the photodetector) 2-5. Modification 5 (Another example of the configuration of the photodetector) 3. Application examples 4. Application examples

[0011] 1. Embodiment Fig. 1 schematically illustrates an example of a cross-sectional configuration of a photodetector (photodetector 1) according to an embodiment of the present disclosure. Fig. 2 is a block diagram illustrating a schematic configuration of the photodetector 1 shown in Fig. 1, and Fig. 3 illustrates an example of an equivalent circuit of a unit pixel P of the photodetector 1 shown in Fig. 1. The photodetector 1 is applicable to, for example, a range image sensor (a range image device 1000 described below, see Fig. 16 ) that measures distances using a time-of-flight (ToF) method, an image sensor, etc.

[0012] (1-1. Configuration of Photodetection Device) The photodetection device 1 has, for example, a pixel array section 100A in which a plurality of unit pixels P are arranged in an array in the row and column directions. As shown in FIG. 2, the photodetection device 1 has a bias voltage application section 110 together with the pixel array section 100A. The bias voltage application section 110 applies a bias voltage to each unit pixel P of the pixel array section 100A. In this embodiment, a case will be described in which electrons are read out as signal charges.

[0013] As shown in FIG. 2, the unit pixel P includes a light receiving element 12, a quenching resistance element 120 formed of, for example, a p-type metal-oxide-semiconductor field-effect transistor (MOSFET), and an inverter 130 formed of, for example, a complementary MOSFET.

[0014] The light receiving element 12 converts incident light into an electrical signal by photoelectric conversion and outputs the signal. Additionally, the light receiving element 12 converts incident light (photons) into an electrical signal by photoelectric conversion and outputs a pulse corresponding to the incident photons. The light receiving element 12 is, for example, a SPAD (Single Photon Avalanche Diode) element. The SPAD element has a characteristic that, for example, when a large negative voltage is applied to the cathode, an avalanche multiplication region 12X (depletion layer) is formed, and electrons generated in response to the incidence of one photon undergo avalanche multiplication, resulting in a large current flow. For example, the anode of the light receiving element 12 is connected to the bias voltage application unit 110, and the cathode is connected to the source terminal of the quenching resistance element 120. The anode of the light receiving element 12 is connected to the bias voltage application unit 110, and a device voltage V Ｂ is applied.

[0015] The quenching resistance element 120 is connected in series with the light-receiving element 12, with its source terminal connected to the cathode of the light-receiving element 12 and its drain terminal connected to a power supply (not shown). Ｅ The quenching resistor 120 detects that the voltage due to the electrons avalanche-multiplied in the light-receiving element 12 is a negative voltage V ＢＤWhen the voltage reaches the initial voltage, the photodetector 12 emits the electrons multiplied by the photodetector 12, thereby performing quenching to return the voltage to the initial voltage.

[0016] The inverter 130 has an input terminal connected to the cathode of the light-receiving element 12 and the source terminal of the quenching resistor element 120, and an output terminal connected to a downstream arithmetic processing unit (not shown). The inverter 130 outputs a light-receiving signal based on the carriers (signal charges) multiplied by the light-receiving element 12. More specifically, the inverter 130 shapes the voltage generated by the electrons multiplied by the light-receiving element 12. The inverter 130 then outputs a light-receiving signal (APD OUT) that generates a pulse waveform, such as that shown in FIG. 3 , starting from the arrival time of one font to the arithmetic processing unit. For example, the arithmetic processing unit performs arithmetic processing to determine the distance to the subject based on the timing of the occurrence of a pulse indicating the arrival time of one font in each light-receiving signal, thereby determining the distance for each unit pixel P. Then, based on these distances, a distance image is generated in which distances to the subject detected by multiple unit pixels P are arranged in a plane.

[0017] The photodetector 1 is a so-called back-illuminated photodetector in which, for example, a readout circuit board 20 and a logic board 40 are stacked on the front side of the sensor substrate 10 (for example, the front side (first surface 11S1) of the semiconductor layer 11 constituting the sensor substrate 10), and light is received from the back side of the sensor substrate 10 (for example, the back side (second surface 11S2) of the semiconductor layer 11 constituting the sensor substrate 10).

[0018] The photodetector 1 has a light-receiving element 12 for each unit pixel P. The light-receiving element 12 has a light-receiving section 13 and a multiplication section 14. The photodetector 1 has a sensor substrate 10, a readout circuit substrate 20, and a logic substrate 40 stacked in this order. The sensor substrate 10 has a semiconductor layer 11 made of, for example, a silicon substrate, and the light-receiving section 13 and the multiplication section 14 are embedded in, for example, the semiconductor layer 11. A contact layer 15 (anode) electrically connected to the light-receiving section 13 and a contact layer 16 (cathode) electrically connected to the multiplication section 14 are provided on a first surface 11S1 of the semiconductor layer 11. The semiconductor layer 11 further has a pixel separation section 17 that electrically separates adjacent unit pixels P. The pixel separation section 17 is provided between a plurality of unit pixels P adjacent to each other in the row and column directions so as to extend between the first surface 11S1 and the second surface 11S2 of the semiconductor layer 11, and is provided in a lattice pattern in the pixel array section 100A as a whole in a plan view. The readout circuit substrate 20 includes, for example, a semiconductor layer 21 embedded in an interlayer insulating layer 221. The semiconductor layer 21 includes, for example, a plurality of transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) that constitute a readout circuit that outputs pixel signals based on carriers output from the unit pixels P (light-receiving elements 12). The readout circuit substrate 20 further includes through vias V1a and V1b that penetrate the semiconductor layer 21 in the stacking direction (Z-axis direction) and are electrically connected to the contact layers 15 and 16, respectively. In this embodiment, an etching stopper film 225 is selectively formed only around the through vias V1a and V1b that are electrically connected to contact layers 15 and 16, respectively, which are semiconductor regions containing p-type or n-type impurities, near the first surface 11S1 of the semiconductor layer 11.

[0019] The semiconductor layer 11 corresponds to a specific example of a "first semiconductor layer" in an embodiment of the present disclosure. The semiconductor layer 21 corresponds to a specific example of a "second semiconductor layer" in an embodiment of the present disclosure. The contact layers 15 and 16 correspond to a specific example of "one or more first impurity regions" in an embodiment of the present disclosure. The through vias V1a and V1b correspond to a specific example of "one or more through wirings" in an embodiment of the present disclosure. The etching stopper film 225 corresponds to a specific example of "first etching stopper film" in an embodiment of the present disclosure.

[0020] In the figures, the symbols "p" and "n" represent p-type semiconductor regions and n-type semiconductor regions, respectively. Furthermore, the "+" or "-" at the end of "p" represents the impurity concentration of the p-type semiconductor region. Similarly, the "+" or "-" at the end of "n" represents the impurity concentration of the n-type semiconductor region. Here, the more "+"s, the higher the impurity concentration, and the more "-"s, the lower the impurity concentration. This also applies to the subsequent figures.

[0021] The semiconductor layer 11 has a first surface 11S1 and a second surface 11S2 facing each other. The semiconductor layer 11 has a p-well (p) common to a plurality of unit pixels P. The semiconductor layer 11 is provided with an n-type semiconductor region (n) 111, for example, with an n-type impurity concentration controlled, which constitutes a light receiving section 13, for each unit pixel P. The semiconductor layer 11 further has a p-type semiconductor region (p ＋ ) 14X and n-type semiconductor region (n ＋ ) 14Y are provided. As a result, a light receiving element 12 is formed for each unit pixel P. A pixel separating portion 17 is provided around each unit pixel P to electrically separate adjacent unit pixels P. A p-type semiconductor region (p) 112 having a higher impurity concentration than the p-well is provided between the light receiving element 12 and the pixel separating portion 17.

[0022] The light receiving element 12 has a multiplication region (avalanche multiplication region 12X) that avalanche-multiplies carriers using a high electric field region. As described above, the avalanche multiplication region 12X is formed by applying a large negative voltage to the cathode (contact layer 16), and the light receiving element 12 is a SPAD element that can avalanche-multiply electrons generated by the incidence of one photon.

[0023] The light receiving element 12 is composed of a light receiving section 13 and a multiplication section 14 .

[0024] The light receiving section 13 corresponds to a specific example of a "light receiving section" in the present disclosure, and has a photoelectric conversion function of absorbing light incident from the second surface 11S2 side of the semiconductor layer 11 and generating carriers according to the amount of light received. As described above, the light receiving section 13 is configured to include the n-type semiconductor region (n) 111 in which the impurity concentration is controlled to be n-type, and the carriers (electrons) generated in the light receiving section 13 are transferred to the multiplication section 14 by a potential gradient.

[0025] The multiplication section 14 corresponds to a specific example of a "multiplication section" in the present disclosure, and avalanche-multiplies carriers (here, electrons) generated in the light receiving section 13. The multiplication section 14 is, for example, a p-type semiconductor region (p ＋ ) 14X and an n-type semiconductor region (n) 111 having a higher impurity concentration than the n-type semiconductor region (n) ＋ ) 14Y. ＋ ) 14X and n-type semiconductor region (n ＋ ) 14Y is provided on the first surface 11S1 side, and the n-type semiconductor region (n ＋ ) 14Y, p-type semiconductor region (p ＋ ) 14X are laminated in this order. ＋ The area of ​​the n-type semiconductor region (n ＋ ) 14Y in the XY plane direction, and is provided over the entire surface of the unit pixel P partitioned by the pixel separating portion 17. However, the present invention is not limited to this, and the p-type semiconductor region (p ＋) 14X may be formed, for example, inside the p-type semiconductor region (p) 112 as shown in FIG.

[0026] In the light receiving element 12, a p-type semiconductor region (p ＋ ) 14X and n-type semiconductor region (n ＋ The avalanche multiplication region 12X is formed at the junction with the p-type semiconductor region (p) 14Y. The avalanche multiplication region 12X is formed by the p-type semiconductor region (p ＋ ) 14X and n-type semiconductor region (n ＋ ) 14Y. In the avalanche multiplication region 12X, electrons (e － ) is multiplied.

[0027] The first surface 11S1 of the semiconductor layer 11 further includes a p-type semiconductor region (p) electrically connected to the n-type semiconductor region (n) 111 that constitutes the light receiving section 13. ＋＋ ) contact layer 15 and an n-type semiconductor region (n ＋ ) 14Y and the n-type semiconductor region (n ＋＋ ) is provided. The contact layer 15 is provided, for example, along the pixel separating portion 17 so as to surround the light receiving portion 13, and is connected to the bias voltage applying portion 110 as the anode of the light receiving element 12. The contact layer 16 is connected to the source terminal of the quenching resistance element 120 as the cathode.

[0028] The pixel separator 17 electrically separates adjacent unit pixels P and is provided in a grid pattern in the pixel array section 100A in a plan view, for example, to separate each of the unit pixels P. The pixel separator 17 extends between the first surface 11S1 and the second surface 11S2 of the semiconductor layer 11, and penetrates the semiconductor layer 11, for example. The pixel separator 17 is composed of, for example, an insulating film 17A and a light-shielding film 17B embedded in the insulating film 17A. The pixel separator 17 may be provided from the first surface 11S1 side of the semiconductor layer 11, or may be formed from the second surface 11S2 side of the semiconductor layer 11.

[0029] The insulating film 17A is made of, for example, silicon oxide (SiO ｘ The light-shielding film 17B is formed using a metal material having light-shielding properties, such as tungsten (W), aluminum (Al), copper (Cu), cobalt (Co), nickel (Ni), or titanium (Ti), or a silicon compound thereof. Alternatively, the light-shielding film 17B may be formed using polysilicon (Poly-Si). The light-shielding film 17B may be provided with a widened portion 17X formed on the second surface 11S2 of the semiconductor layer 11 in order to suppress the incidence of obliquely incident light between adjacent unit pixels P.

[0030] For example, a layer having a fixed charge (fixed charge film 18) may be provided on the side and bottom surfaces of the pixel separation portion 17 and the second surface 11S2 of the semiconductor layer 11. The fixed charge film 18 may be a film having a positive fixed charge or a film having a negative fixed charge.

[0031] The fixed charge film 18 is preferably formed using a semiconductor material or a conductive material having a wider band gap than the semiconductor layer 11. This makes it possible to suppress the generation of dark current at the interface of the semiconductor layer 11. The fixed charge film 18 is preferably formed using a material such as hafnium oxide (HfO ｘ ), aluminum oxide (AlO ｘ ), zirconium oxide (ZrO ｘ ), tantalum oxide (TaO ｘ ), titanium oxide (TiO ｘ ), lanthanum oxide (LaO ｘ ), praseodymium oxide (PrO ｘ ), cerium oxide (CeO ｘ ), neodymium oxide (NdO ｘ ), promethium oxide (PmO ｘ ), samarium oxide (SmO ｘ ), europium oxide (EuO ｘ ), gadolinium oxide (GdO ｘ ), terbium oxide (TbO ｘ ), dysprosium oxide (DyO ｘ ), holmium oxide (HoO ｘ), thulium oxide (TmO ｘ ), ytterbium oxide (YbO ｘ ), lutetium oxide (LuO ｘ ), yttrium oxide (YO ｘ ), hafnium nitride (HfN ｘ ), aluminum nitride (AlN ｘ ), hafnium oxynitride (HfO ｘ N ｙ ) and aluminum oxynitride (AlO ｘ N ｙ ) etc.

[0032] The readout circuit board 20 includes, for example, a semiconductor layer 21 made of a silicon base and an interlayer insulating layer 221 in which the semiconductor layer 21 is embedded. The readout circuit board 20 includes, for example, a readout circuit formed thereon that outputs a pixel signal based on carriers output from the unit pixels P of the pixel array section 100A.

[0033] The semiconductor layer 21 is separated into, for example, a plurality of islands, and an insulating layer 221B is buried between the semiconductor layer 21 separated into islands as an element separation section. On the surface (surface 21S1) of the semiconductor layer 21 separated into islands, a plurality of transistors are formed that constitute a readout circuit that outputs pixel signals based on carriers output from the light receiving element 12. Specifically, for example, one or more p-MOS transistors 211 and one or more n-MOS transistors 212 are formed. The p-MOS transistor 211 has, for example, a planar structure, and is formed by a gate electrode and a p-type semiconductor region (p ＋ The n-MOS transistor 212 has, for example, a planar structure, and has a gate electrode and an n-type semiconductor region (n ＋ The semiconductor layer 21 in which the p-MOS transistor 211 and the n-MOS transistor 212 are formed has an n-type semiconductor region (n ＋ ) or p-type semiconductor region (p ＋ ) is formed in the well contact region.

[0034] Formed within the interlayer insulating layer 221 are one or more wiring layers (e.g., wiring layers 222, 223, and 224), through vias V1a, V1b, and vias V2 and V3 that penetrate the semiconductor layer 21 in the Z-axis direction. The wiring layers 222, 223, and 224 are used to supply voltages to be applied to the semiconductor layer 11 and the light-receiving element 12, and to extract carriers generated in the light-receiving element 12. Specifically, for example, some of the wiring in the wiring layers 222, 223, and 224 is electrically connected to the contact layer 15 via the through via V1a. Some of the wiring in the wiring layers 222, 223, and 224 is electrically connected to the contact layer 16 via the through via V1b. The wiring layers 222, 223, and 224 are used to supply voltages to be applied to the semiconductor layer 21 and the plurality of p-MOS transistors 211 and the plurality of n-MOS transistors 212 formed in the semiconductor layer 21. Specifically, for example, some of the wirings of the wiring layers 222, 223, and 224 are electrically connected through vias V2 to the gate electrodes, source regions, and drain regions of the plurality of p-MOS transistors 211 and the plurality of n-MOS transistors 212, and to well contact regions (not shown). A plurality of pad portions 225 are embedded in the surface of the interlayer insulating layer 221 that faces the logic substrate 40.

[0035] 4A is a schematic diagram illustrating an example of a detailed configuration of a portion near a connection between a p-type or n-type semiconductor region provided on the first surface 11S1 of the semiconductor layer 11, which is a main part of the photodetector 1 according to the present embodiment, and a through-hole wiring that penetrates the semiconductor layer 21 and is connected to the p-type or n-type semiconductor region. As an example, FIG. 4A schematically illustrates a cross-sectional configuration of the connection between the contact layer 16 and the through via V1b and the vicinity thereof.

[0036] As shown in FIG. 4A, on the first surface 11S1 side of the semiconductor layer 11, for example, an n-type semiconductor region (n ＋ ) 14Y and the n-type semiconductor region (n ＋＋A contact layer 16 made of a p-type semiconductor region (p ＋ ) and a drain region 211D are provided. A surface 21S1 of the semiconductor layer 21 is covered with a gate insulating film 228 common to one or more p-MOS transistors 211 and one or more n-MOS transistors 212, and a gate electrode 211G is formed between the source region and the drain region 211D via the gate insulating film 228. The side surfaces of the gate electrode 211G are covered with sidewalls 211X. An insulating film 213 is provided on a surface 21S2 of the semiconductor layer 21 opposite to the surface 21S1. An insulating layer 221A is provided between the semiconductor layer 11 and the semiconductor layer 21. As described above, an insulating layer 221B is buried as an element isolation portion between the semiconductor layers 21 adjacent to each other in the XY plane direction. An insulating layer 221C is provided on the surface 21S1 of the semiconductor layer 21. In this embodiment, these insulating layers 221A, 221B, and 221C are collectively referred to as an interlayer insulating layer 221.

[0037] In the interlayer insulating layer 221, an etching stopper film 225 is further provided on the gate insulating film 227, and an etching stopper film 226 is provided on the gate insulating film 228 and the gate electrode 211G. The through-via V1b penetrates between the surface 21S1 and the surface 21S2 of the semiconductor layer 21 and extends in the interlayer insulating layer 221 in the Z-axis direction, and further penetrates the etching stopper film 225 and the gate insulating film 227 to be connected to the contact layer 16. The via V2 extends in the interlayer insulating layer 221C in the Z-axis direction, penetrates the etching stopper film 226 and the gate insulating film 228 to be connected to the drain region 211D. The via V3 extends in the interlayer insulating layer 221C in the Z-axis direction, penetrates the etching stopper film 226 to be connected to the gate electrode 211G.

[0038] In this embodiment, the etching stopper film 225 is selectively formed on the gate insulating film 227 only around the through via V1v as shown in FIG. 4A. Specifically, the etching stopper film 225 is formed on the n-type semiconductor region (n ＋＋ ) and is preferably provided so that the width W2 of the etching stopper film 225 adjacent to the first surface 11S1 of the semiconductor layer 11 is smaller than the width W1 of the contact layer 16 (W1>W2). In plan view, as shown in FIG. 4B , the outline of the etching stopper film 225 is such that the outer shape of the etching stopper film 225 is smaller than the width W1 of the n-type semiconductor region (n ＋＋ ) and the p-well (p).

[0039] The contact layer 15 and the through via V1a have the same configuration, except that the conductivity types of the semiconductor regions that make up the contact layer 15 are opposite to each other.

[0040] 5 is a schematic diagram illustrating another example of a detailed configuration of the vicinity of a connection portion between a p-type or n-type semiconductor region provided on the first surface 11S1 of the semiconductor layer 11 and a through-wiring that penetrates the semiconductor layer 21 and is connected to the p-type or n-type semiconductor region. The etching stopper film 225 only needs to have a width W2 of the etching stopper film 225 adjacent to the first surface 11S1 of the semiconductor layer 11 that is smaller than the width W1 of the contact layer 16. For example, as shown in FIG. 5, the etching stopper film 225 may be formed in a concave shape so as to extend from above the gate insulating film 227 through which the through via V1b penetrates toward the semiconductor layer 21 along the side surface of the through via V1b.

[0041] The interlayer insulating layer 221, the gate insulating films 227 and 228, the insulating film 213, and the sidewall 211X are made of, for example, silicon oxide (SiO ｘ ), TEOS, silicon nitride (SiN ｘ ) and silicon oxynitride (SiO ｘ N ｙ ) or a laminated film made of two or more of these.

[0042] The gate electrodes 211G and 212G and the wiring layer 222 are formed using, for example, aluminum (Al), copper (Cu), tungsten (W), or the like.

[0043] The vias V1a, V1b, V2, and V3 are formed using a metal material having light-shielding properties, such as tungsten (W), aluminum (Al), copper (Cu), cobalt (Co), nickel (Ni), or titanium (Ti), or a silicon compound thereof.

[0044] The etching stopper films 225 and 226 are formed using a material having an etching rate different from that of the interlayer insulating layer 221 and the gate insulating films 227 and 228. The etching stopper films 225 and 226 are preferably formed using a material having a higher refractive index than the gate insulating films 227 and 228. For example, when the interlayer insulating layer 221 and the gate insulating films 227 and 228 are made of SiO ｘ When the etching stopper films 225 and 226 are formed using SiN, ｘ It can be formed using:

[0045] The pad portion 229 is formed using, for example, copper (Cu).

[0046] On the light-receiving surface (second surface 11S2) side of the semiconductor layer 11, for example, a microlens 33 is provided for each unit pixel P via a protective layer 31 and a color filter 32, for example.

[0047] The microlens 33 is a lens that focuses light incident from above onto the light receiving element 12. For example, the microlens 33 is made of SiO ｘ It is formed using the following:

[0048] The logic substrate 40 has, for example, a semiconductor substrate 41 made of a silicon substrate, and a multilayer wiring layer 42. The logic substrate 40 is formed with logic circuits including, for example, the bias voltage application unit 110, a vertical drive circuit, a column signal processing circuit, a horizontal drive circuit, an output circuit, and the like, as described above.

[0049] Within the interlayer insulating layer 421, gates 422 of multiple transistors formed on the surface 41S1 of the semiconductor substrate 41 and one or more wiring layers are formed, and multiple pad portions 423 are embedded in the surface of the interlayer insulating layer 421 facing the readout circuit board 20.

[0050] The interlayer insulating layer 421 is made of, for example, SiO 2 , similar to the interlayer insulating layer 221 . ｘ , TEOS, SiN ｘ and SiO ｘ N ｙ It is composed of a single layer film made of one of the above or a laminated film made of two or more of these.

[0051] The gate line 422 and one or more wiring layers are formed using, for example, Al, Cu, W, or the like, similarly to the wiring layers 222, 223, and 224.

[0052] The pad portion 423 is formed using, for example, Cu, similarly to the pad portion 229 .

[0053] In the photodetector 1, a hybrid bond (for example, a CuCu bond) is formed between the pad portion 229 and the pad portion 423. This electrically connects the readout circuit board 20 and the logic board 40.

[0054] (1-2. Method for Manufacturing Photodetector) The photodetector 1 of this embodiment can be manufactured, for example, as follows: Figures 6A to 6E show the manufacturing method for the photodetector 1 in the order of steps.

[0055] First, as shown in FIG. 6A, elements such as the light receiving element 12, the contact layer 15 serving as an anode electrically connected to the light receiving section 13, and the contact layer 16 serving as a cathode electrically connected to the multiplication section 14 are formed in the semiconductor layer 11, and then a gate insulating film 227 and an etching stopper film 225 are formed in sequence on the entire surface of the first surface 11S1 of the semiconductor layer 11.

[0056] 6B, the etching stopper film 225 is patterned by photolithography and etching so as to be formed only in contact formation regions with the vias V1a and V1b above the contact layers 15 and 16. Next, as shown in Fig. 6B, an insulating layer 221A is formed on the etching stopper film 225 and on the gate insulating film 227 exposed from the etching stopper film 225 by, for example, a CVD (Chemical Vapor Deposition) method, and then the surface of the insulating layer 221A is planarized by, for example, a CMP (Chemical Mechanical Polishing) method.

[0057] 6C, the semiconductor layer 21 is bonded onto the insulating layer 221A, and then the semiconductor layer 21 is thinned from the surface 21S1 side to a predetermined thickness, and one or more p-MOS transistors 211 and one or more n-MOS transistors 212 are formed on the surface 21S1. Next, as shown in FIG. 6C, the semiconductor layer 21 is separated into a plurality of islands, and an insulating layer 221B is embedded between the separated semiconductor layers 21 to form element isolation regions. Next, as shown in FIG. 6C, a gate insulating film 228 and gate electrodes (e.g., gate electrodes 211G) of one or more p-MOS transistors 211 and one or more n-MOS transistors 212 are formed, and then an etching stopper film 226 covering these is formed, and further, an insulating layer 221C is formed using, for example, a CVD method.

[0058] Next, as shown in FIG. 6D , by photolithography and etching, for example, an opening H1 that penetrates the insulating layers 221A, 221B, 221C and reaches the etching stopper film 225 and an opening H2 that penetrates the insulating layer 221C and reaches the etching stopper film 226 are formed above the contact layers 15, 16 provided on the first surface 11S1 of the semiconductor layer 11 and above the source regions and drain regions (e.g., drain region 211D) of one or more p-MOS transistors 211 and one or more n-MOS transistors 212 provided on the surface 21S1 of the semiconductor layer 21, respectively.

[0059] Subsequently, as shown in FIG. 6E, the etching conditions are changed to etch the etching stopper films 225 and 226, thereby exposing the source and drain regions (for example, the drain region 211D) and the contact layers 15 and 16 at the bottoms of the openings H1 and H2.

[0060] Thereafter, the openings H1 and H2 are filled with the above-mentioned metal material using, for example, CVD or ALD, and then the metal film formed on the insulating layer 221C is removed using, for example, CMP to form the through vias V1a, V1b, and via V2. Thereafter, wiring layers 222, 223, and 224 and a plurality of pad portions 229 are formed in this order to form the readout circuit substrate 20, which is then bonded to a separately prepared logic substrate 40. This completes the photodetector 1 shown in FIG.

[0061] (1-3. Actions and Effects) In the photodetector 1 of this embodiment, in a laminated body in which a semiconductor layer 11 having a light receiving element 12 for each unit pixel P and a semiconductor layer 21 provided with one or more p-MOS transistors 211 and one or more n-MOS transistors 212 constituting a readout circuit that outputs a pixel signal based on carriers output from the unit pixel P (light receiving element 12) are laminated, an etching stopper film 225 is selectively formed only around the through vias V1a and V1b that penetrate the semiconductor layer 21 and are electrically connected to the contact layers 15 and 16 made of p-type or n-type semiconductor regions provided on the first surface 11S1 of the semiconductor layer 11. As a result, an etching stopper film 225 is selectively formed only around the through vias V1a and V1b that penetrate the semiconductor layer 21 and are electrically connected to the contact layers 15 and 16 made of p-type or n-type semiconductor regions provided on the first surface 11S1 of the semiconductor layer 11. ＋＋ The area where the boundary between the p-type well (p) and the surrounding p-type well (p) faces the etching stopper film 225 is reduced. This will be explained below.

[0062] In a typical transistor manufacturing process, after forming each element such as a source region, a drain region, and a gate electrode, a contact etching stopper film (CESL) is formed over the entire surface of the silicon substrate on which the transistor is formed, before connecting each element. In this process of connecting each element, the CESL is formed using a material different from the surrounding insulating film, and etching is stopped once at the CESL to eliminate differences in aspect ratios (e.g., height) of the connections with each element. Then, the CESL on each element is processed simultaneously, thereby avoiding over-etching of the silicon substrate and gate electrodes.

[0063] Incidentally, in a stacked-type SPAD pixel formed by stacking a plurality of semiconductor layers, a CESL is used to ensure a processing margin in the process of forming through wiring connected to elements provided in a lower semiconductor layer and contact wiring connected to elements provided in an upper semiconductor layer. Generally, as described above, a CESL is formed on the entire surface of the lower semiconductor layer to realize a collective connection with each element provided in the lower semiconductor layer and the upper semiconductor layer. However, if a CESL film, for example, SiO ｘ Film (e.g., gate insulating film) / SiN ｘ When a laminated film (for example, CESL) is formed, the electrical characteristics may be deteriorated.

[0064] In contrast to this, in the present embodiment, for example, on the first surface of the semiconductor layer 11 on which the contact layers 15, 16 made of p-type or n-type semiconductor regions are provided, the etching stopper film 225 is selectively formed only around the through vias V1a, V1b connected to these contact layers 15, 16. This reduces the opposing area between the first surface 11S1 of the semiconductor layer 11 and a stack of insulating films made of different materials, including the etching stopper film 225, compared to when a CESL is formed on the entire first surface 11S1 of the semiconductor layer 11 on which the p-type or n-type semiconductor region is formed.

[0065] Next, Modifications 1 to 5 and application examples of the present disclosure will be described. In the following, the same components as those in the above embodiment will be given the same reference numerals, and the description thereof will be omitted as appropriate.

[0066] 2. Modifications (2-1. Modification 1) Fig. 7A is a schematic diagram illustrating an example of a cross-sectional configuration of a main part of a photodetector (photodetector 1A) according to modification 1 of the present disclosure. Fig. 7B is a plan view schematically illustrating the relationship between the through via V1b and the opening H3 shown in Fig. 7A. As with the above embodiment, the photodetector 1A is applicable to, for example, a range image sensor (range image device 1000) or an image sensor that measures distance using the ToF method.

[0067] In the above embodiment, an example was shown in which the etching stopper film 225 was selectively provided only above the p-type or n-type semiconductor region that constitutes the contact layers 15, 16. However, this is not limited to this as long as the etching stopper film 225 formed near the first surface 11S1 of the semiconductor layer 11 is limited only above the p-type or n-type semiconductor region. In the photodetector 1A of this modified example, an insulating film 221A1 is further stacked on the gate insulating film 227, an opening H3 is formed above the p-type or n-type semiconductor region that constitutes the contact layers 15, 16, and the etching stopper film 225 is formed on the insulating film 221A1 and over the side and bottom surfaces of the opening H3, and through-vias V1a, V1b are provided in this opening H3.

[0068] In this modification, the insulating layer 221A is a laminated film in which insulating films 221A1 and 221A2 are laminated with an etching stopper film 225 interposed therebetween. The insulating films 221A1 and 221A2 are made of, for example, SiO ｘ , TEOS, SiN ｘ and SiO ｘ N ｙ For example, the insulating film 227 can be formed using SiO ｘ It is formed using

[0069] As described above, the insulating film 221A1 has an opening H3 above the p-type or n-type semiconductor region that constitutes the contact layers 15, 16. The diameter of the opening H3 is larger than the diameter of the through vias V1a, V1b, for example, as shown in FIG. 7B , and the insulating film 221A2 is buried between the through vias V1a, V1b and the side surfaces of the opening H3 that are covered with the etching stopper film 225.

[0070] If the thickness h of the insulating film 221A1 is 20 nm or more, it is possible to prevent deterioration of electrical characteristics due to the proximity of the boundary between the p-type or n-type semiconductor region formed on the first surface 11S1 of the semiconductor layer 11 and a stack of insulating films made of different materials, including the etching stopper film 225. Furthermore, when the etching stopper film 225 is formed using a material having a higher refractive index than the gate insulating film 227 and the insulating film 221A1, it is preferable that the thickness h of the insulating film 221A1 be, for example, 200 nm or more and 300 nm or less. This allows the etching stopper film 225 to function as an optical reflective film.

[0071] The photodetector 1A can be manufactured, for example, as follows: Figures 8A to 8G show the manufacturing method of the main parts of the photodetector 1A in the order of steps.

[0072] First, as shown in FIG. 8A, elements such as the light receiving element 12, the contact layer 15 serving as an anode electrically connected to the light receiving section 13, and the contact layer 16 serving as a cathode electrically connected to the multiplication section 14 are formed in the semiconductor layer 11, and then a gate insulating film 227 and an insulating film 221A1 are formed in sequence on the entire surface of the first surface 11S1 of the semiconductor layer 11.

[0073] 8B, photolithography and etching are used to form an opening H3 in the insulating film 221A1 above the contact layers 15 and 16, the opening H3 having a bottom area smaller than the area of ​​the p-type or n-type semiconductor region that constitutes the contact layers 15 and 16. Next, as shown in FIG. 8C, for example, a CVD method or an ALD method is used to form an etching stopper film 225 that is continuous on the insulating film 221A1 and on the side and bottom surfaces of the opening H3.

[0074] Next, as shown in FIG. 8D, an insulating film 221A2 is formed on the etching stopper film 225 using, for example, a CVD method, and then the surface of the insulating film 221A2 is planarized using, for example, a CMP method. Next, as shown in FIG. 8E, a semiconductor layer 21 is bonded to the insulating layer 221A (specifically, the insulating film 221A2), and then, as in the above-described embodiment, the semiconductor layer 21 is thinned to a predetermined thickness from the surface 21S1 side, and one or more p-MOS transistors 211 and one or more n-MOS transistors 212 are formed on the surface 21S1. Next, as shown in FIG. 8E, the semiconductor layer 21 is separated into multiple islands, and an insulating layer 221B is embedded between the separated semiconductor layers 21 to form element isolation regions. Next, as shown in FIG. 8E, a gate insulating film 228 and gate electrodes (e.g., gate electrodes 211G) of one or more p-MOS transistors 211 and one or more n-MOS transistors 212 are formed, and then an etching stopper film 226 is formed to cover them.

[0075] Next, as shown in FIG. 8F, by photolithography and etching, for example, an opening H1 that penetrates through the insulating layers 221A, 221B, 221C and reaches the etching stopper film 225 and an opening H2 that penetrates through the insulating layer 221C and reaches the etching stopper film 226 are formed above the contact layers 15, 16 provided on the first surface 11S1 of the semiconductor layer 11 and above the source regions and drain regions (e.g., drain region 211D) of one or more p-MOS transistors 211 and one or more n-MOS transistors 212 provided on the surface 21S1 of the semiconductor layer 21, respectively.

[0076] Subsequently, as shown in FIG. 8G, the etching conditions are changed to etch the etching stopper films 225 and 226, thereby exposing the source and drain regions (for example, the drain region 211D) and the contact layers 15 and 16 at the bottoms of the openings H1 and H2.

[0077] Thereafter, the openings H1 and H2 are filled with the above-mentioned metal material by, for example, CVD or ALD, and then the metal film formed on the insulating layer 221C is removed by, for example, CMP to form the through vias V1a and V1b and the via V2. In this way, the p-type or n-type semiconductor regions constituting the contact layers 15 and 16 are connected to the through vias V1a and V1b.

[0078] As described above, in the photodetector 1A of this modified example, an insulating film 221A1 having an opening H3 above the p-type or n-type semiconductor region that constitutes the contact layers 15, 16 is provided on the first surface 11S1 of the semiconductor layer 11, and an etching stopper film 225 is formed on the insulating film 221A1 and over the side and bottom surfaces of the opening H3. Even with this configuration, the same effects as those of the above embodiment can be obtained.

[0079] 7A shows an example in which the etching stopper film 225 is provided on the insulating film 221A1 and on the side and bottom surfaces of the opening H3, but the etching stopper film 225 does not necessarily have to be formed on the insulating film 221A1. For example, as shown in FIG. 9, the etching stopper film 225 may be removed from the insulating film 221A1 and formed only on the side and bottom surfaces of the opening H3. This makes it possible to reduce the height of the etching stopper film 225 on the insulating film 221A1.

[0080] 7A shows an example in which the insulating layer 221A between the semiconductor layer 11 and the semiconductor layer 21 is a stacked film of insulating films 221A1 and 221A2, but this is not limiting. For example, if the insulating film 213 on the surface 21S1 side of the semiconductor layer 21 is formed using the same material as the etching stopper film 225, the etching stopper film 225 on the insulating film 221A1 may be removed and the insulating film 221A2 may be omitted. In this case, an insulating layer 221B is buried between the through-vias V1a and V1b and the side surfaces of the opening H3 covered by the etching stopper film 225. This allows the photodetector 1A to have a low profile.

[0081] 11 is a schematic diagram illustrating an example of a cross-sectional configuration of a main part of a light detection device (light detection device 1B) according to Modification 2 of the present disclosure. As in the above embodiment, the light detection device 1B is applicable to, for example, a range image sensor (range image device 1000) that measures distance by the ToF method, an image sensor, etc.

[0082] In the above-described first modification, an example was shown in which a gap was provided between the through vias V1a, V1b and the side surface of the opening H3 covered with the etching stopper film 225, but this is not limited to this. In the photodetector 1B of this modification, for example, the through vias V1a, V1b are made to contact with the side surface of the opening H3 covered with the etching stopper film 225. In this modification, the contact area between the p-type or n-type semiconductor region constituting the contact layers 15, 16 and the through vias V1a, V1b is determined by the etching stopper film 225.

[0083] In this way, in the photodetector 1B of this modified example, the through vias V1a and V1b are configured to be in contact with each other on the side of the opening H3 covered by the etching stopper film 225, so in addition to the effects of the above embodiment, the connection between the p-type or n-type semiconductor regions constituting the contact layers 15 and 16 and the through vias V1a and V1b can be made in a self-aligned manner.

[0084] (2-3. Modification 3) Fig. 12A is a schematic diagram illustrating an example of a cross-sectional configuration of a main part of a photodetector (photodetector 1C) according to modification 3 of the present disclosure. Fig. 12B is a plan view schematically illustrating the relationship between the through via V1b and the opening H3 shown in Fig. 12A. As in the above embodiment, the photodetector 1C is applicable to, for example, a range image sensor (range image device 1000) or an image sensor that performs distance measurement by the ToF method.

[0085] In the above-described modified example 2, the through vias V1a, V1b are in contact with each other on the side surface of the opening H3 covered with the etching stopper film 225, thereby making the connection between the through vias V1a, V1b in a self-aligned manner. However, the present invention is not limited to this. In the photodetector 1C of this modified example, as shown in FIG. 12B , the diameters of the through vias V1a, V1b are made larger than the diameter of the opening H3, and the through vias V1a, V1b are in contact with each other from the top surface of the insulating film 221A1 covered with the etching stopper film 225 to the side surface of the opening H3.

[0086] In this modification, it is preferable to form an insulating film 225A made of the same material as the etching stopper film 225 on the upper surface of the insulating film 221A1 to thicken the etching stopper film 225. This makes it possible to prevent the etching stopper film 225 on the upper surface of the insulating film 221A1 from disappearing when forming the openings H1 in which the through vias V1a and V1b having diameters larger than those in the above embodiment and modifications 1 and 2 are formed.

[0087] In this way, the photodetector 1C of this modified example is configured so that the through vias V1a and V1b contact each other on the side surface of the opening H3 from the upper surface of the insulating film 221A1 covered with the etching stopper film 225. Even with this configuration, the same effects as those of the above modified example 2 can be obtained.

[0088] 13 is a schematic diagram illustrating an example of a cross-sectional configuration of a main part of a light detection device (light detection device 1D) according to a fourth modification of the present disclosure. As in the above embodiment, the light detection device 1D is applicable to, for example, a range image sensor (range image device 1000) or an image sensor that performs distance measurement by the ToF method.

[0089] In the above-described first modification and the like, an insulating film 221A1 is further laminated on the gate insulating film 227, an opening H3 is formed above the p-type or n-type semiconductor region that constitutes the contact layers 15 and 16, an etching stopper film 225 is formed on the insulating film 221A1 and over the side and bottom surfaces of the opening H3, and the through-vias V1a and V1b are provided in the opening H3, but this is not limited to this. In the photodetector 1D of this modification, an opening H4 is formed that reaches the etching stopper film 225 from the surface 21S1 side of the semiconductor layer 21, an etching stopper film 226 is extended over the side and bottom surfaces of the opening H4, and the through-vias V1a and V1b are provided in the opening H4 that is covered with the etching stopper film 226.

[0090] The photodetector 1D can be manufactured, for example, as follows: Figures 14A to 14D show the manufacturing method of the main parts of the photodetector 1D in the order of steps.

[0091] 14A, similarly to the above embodiment, an etching stopper film 225 is patterned by photolithography and etching so as to be formed only in contact formation regions with the vias V1a and V1b above the contact layers 15 and 16. Next, as shown in Fig. 14A, an insulating layer 221A is formed on the etching stopper film 225 and on the gate insulating film 227 exposed from the etching stopper film 225 by, for example, CVD, and then the surface of the insulating layer 221A is planarized by, for example, CMP.

[0092] 14B, the semiconductor layer 21 is bonded onto the insulating layer 221A, and then the semiconductor layer 21 is thinned from the surface 21S1 side to a predetermined thickness, and one or more p-MOS transistors 211 and one or more n-MOS transistors 212 are formed on the surface 21S1. Next, as shown in FIG. 14B, the semiconductor layer 21 is separated into a plurality of islands, and an insulating layer 221B is embedded between the separated semiconductor layers 21 to form element isolation portions. Subsequently, as shown in FIG. 14B, a gate insulating film 228 and gate electrodes (e.g., gate electrode 211G) of one or more p-MOS transistors 211 and one or more n-MOS transistors 212 are formed. Next, as shown in FIG. 14C, an opening H4 reaching the etching stopper film 225 is formed by photolithography and etching, and then a gate insulating film 228, gate electrodes (e.g., gate electrode 211G) of one or more p-MOS transistors 211 and one or more n-MOS transistors 212, and an etching stopper film 226 continuous with the side and bottom surfaces of the opening H4 are formed.

[0093] 14C , an insulating layer 221C is formed on the etching stopper film 226 by, for example, CVD, and the opening H4 is filled therein, and then the surface of the insulating layer 221C is planarized by, for example, CMP. Next, as shown in FIG. 14C , an opening H1 is formed by photolithography and etching above the contact layers 15 and 16 provided on the first surface 11S1 of the semiconductor layer 11, and above the source and drain regions (e.g., drain region 211D) of one or more p-MOS transistors 211 and one or more n-MOS transistors 212 provided on the surface 21S1 of the semiconductor layer 21. The opening H1 penetrates the insulating layers 221A, 221B, and 221C and reaches the etching stopper film 225, and an opening H2 penetrates the insulating layer 221C and reaches the etching stopper film 226.

[0094] Subsequently, as shown in FIG. 14D, the etching conditions are changed to etch the etching stopper films 225 and 226, thereby exposing the source and drain regions (for example, the drain region 211D) and the contact layers 15 and 16 at the bottoms of the openings H1 and H2.

[0095] Thereafter, the openings H1 and H2 are filled with the above-mentioned metal material by, for example, CVD or ALD, and then the metal film formed on the insulating layer 221C is removed by, for example, CMP to form the through vias V1a and V1b and the via V2. In this way, the p-type or n-type semiconductor regions constituting the contact layers 15 and 16 are connected to the through vias V1a and V1b.

[0096] As described above, in the photodetector 1D of this modification, an opening H4 is formed that reaches the etching stopper film 225 from the surface 21S1 of the semiconductor layer 21, the etching stopper film 226 is extended to the side and bottom surfaces of the opening H4, and the through vias V1a, V1b are provided in the opening H4 covered by the etching stopper film 226. Even with this configuration, the same effects as those of the above-described embodiment can be obtained. Furthermore, as in the above-described modifications 2 and 3, the connection between the p-type or n-type semiconductor region that constitutes the contact layers 15, 16 and the through vias V1a, V1b can be performed in a self-aligned manner.

[0097] (2-5. Modification 5) Fig. 15A is a schematic diagram showing an example of a cross-sectional configuration of a main part of a photodetector (photodetector 1E) according to Modification 5 of the present disclosure. Fig. 15B is a schematic diagram showing a planar layout of a plurality of through vias V1a and an etching stopper film 225 near the first surface 11S1 of the semiconductor device 11 shown in Fig. 15A. As with the above-described embodiment, the photodetector 1E is applicable to, for example, a range image sensor (range image device 1000) or an image sensor that measures distances by the ToF method.

[0098] When multiple through wirings (for example, three through vias V1a) are arranged closely to each other, as shown in FIG. 15A, an etching stopper film 225 may be formed continuously near the first surface 11S1 of the semiconductor layer 11 for the three closely arranged through vias V1a.

[0099] (Other Modifications) The above-described embodiment and modifications 1 to 5 can be combined as appropriate. For example, in the photodetector devices 1B and 1C described in modifications 2 and 3, the etching stopper film 225 on the insulating film 221A1 may be removed and formed only on the side and bottom surfaces of the opening H3, as in the photodetector device 1A shown in Figures 9 and 10. Alternatively, if the insulating film 213 on the surface 21S1 side of the semiconductor layer 21 is formed using the same material as the etching stopper film 225, the insulating film 221A2 may be omitted.

[0100] 3. Application Examples FIG. 16 shows an example of the schematic configuration of a distance image device 1000 as an electronic device equipped with a photodetector (for example, photodetector 1) according to any of the above-described embodiments and modifications 1 to 5.

[0101] The range image device 1000 includes, for example, a light source device 1100 , an optical system 1200 , a light detection device 1 , an image processing circuit 1300 , a monitor 1400 , and a memory 1500 .

[0102] The distance image device 1000 receives light (modulated light or pulsed light) projected from the light source device 1100 toward the object to be illuminated 2000 and reflected from the surface of the object to be illuminated 2000, thereby obtaining a distance image corresponding to the distance to the object to be illuminated 2000.

[0103] The optical system 1200 is configured with one or more lenses, and guides image light (incident light) from the irradiation object 2000 to the light detection device 1, forming an image on the light receiving surface (sensor section) of the light detection device 1.

[0104] The image processing circuit 1300 performs image processing to construct a distance image based on the distance signal supplied from the light detection device 1, and the distance image (image data) obtained by this image processing is supplied to the monitor 1400 for display, or supplied to the memory 1500 for storage (recording).

[0105] In the range imaging device 1000 configured in this manner, by applying the above-described photodetector (e.g., photodetector 1), it is possible to calculate the distance to the illuminated object 2000 based solely on the light-receiving signals from the highly stable unit pixels P, and generate a highly accurate range image. In other words, the range imaging device 1000 can acquire a more accurate range image.

[0106] 4. Application Example Application Example to Endoscopic Surgery System The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0107] FIG. 17 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0108] 17 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0109] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0110] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0111] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0112] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0113] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0114] The light source device 11203 is composed of a light source such as an LED (light emitting diode), and supplies irradiation light to the endoscope 11100 when photographing the surgical site, etc.

[0115] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0116] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0117] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0118] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0119] The light source device 11203 may also be configured to supply light in a predetermined wavelength range compatible with special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow-band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation can involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light compatible with such special light observation.

[0120] FIG. 18 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0121] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0122] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0123] The imaging unit 11402 may include one imaging element (a so-called single-chip type) or multiple imaging elements (a so-called multi-chip type). When the imaging unit 11402 is configured as a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to a 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is configured as a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0124] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0125] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0126] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0127] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0128] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0129] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0130] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0131] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0132] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102 .

[0133] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0134] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0135] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.

[0136] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0137] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the imaging unit 11402 among the components described above. By applying the technology according to the present disclosure to the imaging unit 11402, detection accuracy is improved.

[0138] Although an endoscopic surgery system has been described as an example here, the technology according to the present disclosure may also be applied to other systems, such as a microsurgery system.

[0139] (Application Example to Mobile Object) The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile object, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, a robot, construction machinery, or agricultural machinery (tractor).

[0140] FIG. 19 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0141] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 19, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0142] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0143] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0144] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0145] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0146] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0147] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0148] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0149] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0150] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 19, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0151] FIG. 20 is a diagram showing an example of the installation position of the imaging unit 12031.

[0152] In FIG. 20, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0153] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0154] 20 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0155] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0156] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0157] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0158] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0159] The foregoing has described an example of a mobile object control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the image capture unit 12031 of the above-described configuration. Specifically, the photodetection devices according to the above-described embodiment and its modified examples 1 to 5 (e.g., photodetection device 1) can be applied to the image capture unit 12031. By applying the technology according to the present disclosure to the image capture unit 12031, it is possible to obtain high-resolution captured images with little noise, thereby enabling high-precision control using the captured images in the mobile object control system.

[0160] The above describes the embodiments, Modifications 1 to 5, and application examples and applied examples, but the present disclosure is not limited to the above embodiments and can be modified in various ways. For example, in the above embodiments, the present technology has been described using a SPAD sensor as an example, but the present technology is not limited to this. The present technology can be applied to any semiconductor device in which a through-wiring penetrating one semiconductor layer in a stacked body of multiple semiconductor layers is electrically connected to an impurity region provided on the surface of the other semiconductor layer, thereby achieving the same effect.

[0161] Furthermore, the photodetector of the present disclosure does not need to include all of the components described in the above embodiments, etc. Conversely, other layers may be included. For example, if the photodetector 1 detects light other than visible light (e.g., near-infrared light (IR)), the color filter 32 may be omitted.

[0162] Furthermore, the polarity of the semiconductor regions constituting the photodetector of the present disclosure may be reversed.Furthermore, the photodetector of the present disclosure may use holes as signal charges.

[0163] Furthermore, in the photodetector according to the present disclosure, the potentials of the anode and cathode are not limited as long as a state in which avalanche multiplication occurs when a reverse bias is applied between the anode and cathode.

[0164] Furthermore, in the above-described embodiments, examples have been shown in which silicon is used as the semiconductor layer 11, but the semiconductor layer 11 may also be made of, for example, germanium (Ge) or a compound semiconductor of silicon (Si) and germanium (Ge) (for example, silicon germanium (SiGe)).

[0165] Furthermore, the shape of the unit pixel P is not limited to a rectangular shape. For example, the unit pixel P may be octagonal, and a plurality of unit pixels P constituting the pixel array section 100A may be arranged in a honeycomb pattern.

[0166] The effects described in the above embodiments are merely examples, and other effects may be achieved, or may further include other effects.

[0167] The present disclosure may also be configured as follows. According to the present technology configured as follows, the area where a boundary between an impurity region including one or more first impurity regions formed in a first surface of a first semiconductor layer and the surrounding first semiconductor layer faces a first etching stopper film is reduced, thereby improving electrical characteristics. (1) A semiconductor device comprising: a first semiconductor layer having opposing first and second surfaces and having one or more first impurity regions in the first surface; a second semiconductor layer stacked on the first surface side of the first semiconductor layer; one or more through-holes penetrating the second semiconductor layer and electrically connected to the one or more first impurity regions of the first semiconductor layer; and a first etching stopper film selectively provided only around the one or more through-holes near the first surface of the first semiconductor layer. (2) The semiconductor device according to (1), wherein the first etching stopper film extends from near the first surface of the first semiconductor layer toward the second semiconductor layer along side surfaces of the one or more through-holes. (3) The semiconductor device according to (1) or (2), further comprising a first insulating layer provided on the first surface of the first semiconductor layer and having openings over the one or more first impurity regions, the first etching stopper film being formed along side surfaces of the openings. (4) The semiconductor device according to (3), wherein the first etching stopper film extends from side surfaces of the openings onto the first insulating layer. (5) The semiconductor device according to (3) or (4), wherein the first etching stopper film has a refractive index higher than that of the first insulating layer. (6) The semiconductor device according to any one of (3) to (5), wherein the first insulating layer has a thickness of 200 nm or more and 300 nm or less. (7) The semiconductor device according to any one of (3) to (6), wherein the wiring diameter of the one or more through wirings is larger than the diameter of the bottom of the opening. (8) The semiconductor device according to any one of (3) to (6), wherein the wiring diameter of the one or more through wirings is larger than the diameter of the top of the opening.(9) The semiconductor device according to any one of (1) to (8), wherein the second semiconductor layer has a third surface facing the first surface of the first semiconductor layer and a fourth surface opposite the third surface, and wherein the second semiconductor layer has one or more second impurity regions on the fourth surface. (10) The semiconductor device according to any one of (1) to (9), further comprising: one or more connection wirings parallel to the one or more through wirings and electrically connected to the one or more second impurity regions of the second semiconductor layer, respectively; and a second etching stopper film extending toward the fourth surface of the second semiconductor layer. (11) The semiconductor device according to (10), wherein the second etching stopper film extends to side surfaces of the one or more through wirings. (12) The semiconductor device according to any one of (1) to (11), wherein the first etching stopper film near the first surface of the first semiconductor layer is formed inside the one or more first impurity regions in a plan view. (13) The semiconductor device according to any one of (1) to (12), wherein when the plurality of first impurity regions are arranged closely to each other, the first etching stopper film is formed continuously with respect to the plurality of first impurity regions. (14) A photodetector comprising: a first semiconductor layer having opposing first and second surfaces and having a pixel array portion in which a plurality of pixels are arranged in an array in an in-plane direction, a light receiving portion provided in the first semiconductor layer for each of the pixels and generating carriers according to an amount of received light by photoelectric conversion, one or more first impurity regions provided in the first surface of the first semiconductor layer, a second semiconductor layer stacked on the first surface side of the first semiconductor layer, one or more through wirings that penetrate the second semiconductor layer and are electrically connected to the one or more first impurity regions of the first semiconductor layer, and a first etching stopper film selectively provided only around the one or more through wirings in the vicinity of the first surface of the first semiconductor layer.(15) The photodetector according to (14), wherein the first semiconductor layer has a first conductivity type region and a second conductivity type region having a conductivity type different from that of the first conductivity type region stacked on the first surface side of the first semiconductor layer for each pixel, and further has a multiplication section that avalanche-multiplies the carriers generated in the light receiving section. (16) The photodetector according to (15), wherein the one or more first impurity regions are one or both of a p-type semiconductor region and an n-type semiconductor region electrically connected to the first conductivity type region and the second conductivity type region, respectively. (17) The photodetector according to any one of (14) to (16), wherein the second semiconductor layer has a third surface facing the first surface of the first semiconductor layer and a fourth surface opposite to the third surface, and a plurality of transistors that constitute a readout circuit that outputs pixel signals based on carriers output from the plurality of pixels are formed on the fourth surface.

Claims

1. A semiconductor device comprising: a first semiconductor layer having opposing first and second surfaces and having one or more first impurity regions on the first surface; a second semiconductor layer stacked on the first surface side of the first semiconductor layer; one or more through-holes penetrating the second semiconductor layer and electrically connected to the one or more first impurity regions of the first semiconductor layer, respectively; and a first etching stopper film selectively provided only around the one or more through-holes in the vicinity of the first surface of the first semiconductor layer.

2. The semiconductor device according to claim 1, wherein the first etching stopper film extends from near the first surface of the first semiconductor layer toward the second semiconductor layer along side surfaces of the one or more through-hole wirings.

3. The semiconductor device according to claim 1, further comprising a first insulating layer provided on the first surface of the first semiconductor layer and having openings respectively above the one or more first impurity regions, and the first etching stopper film is formed along the side surfaces of the openings.

4. The semiconductor device according to claim 3, wherein said first etching stopper film extends from a side surface of said opening onto said first insulating layer.

5. The semiconductor device according to claim 3, wherein said first etching stopper film has a refractive index higher than that of said first insulating layer.

6. The semiconductor device according to claim 3, wherein the first insulating layer has a thickness of 200 nm or more and 300 nm or less.

7. The semiconductor device according to claim 3, wherein the diameter of said one or more through-wires is larger than the diameter of the bottom of said opening.

8. The semiconductor device according to claim 3, wherein the diameter of said one or more through-wires is larger than the diameter of the upper portion of said opening.

9. The semiconductor device according to claim 1, wherein the second semiconductor layer has a third surface facing the first surface of the first semiconductor layer and a fourth surface opposite the third surface, and the fourth surface has one or more second impurity regions.

10. The semiconductor device according to claim 1, further comprising: one or more connection wirings extending in parallel with the one or more through wirings and electrically connected to the one or more second impurity regions of the second semiconductor layer, respectively; and a second etching stopper film extending toward the fourth surface side of the second semiconductor layer.

11. The semiconductor device according to claim 10, wherein said second etching stopper film extends onto a side surface of said one or more through-wirings.

12. The semiconductor device according to claim 1, wherein the first etching stopper film in the vicinity of the first surface of the first semiconductor layer is formed inside the one or more first impurity regions in a plan view.

13. The semiconductor device according to claim 1, wherein, when said plurality of first impurity regions are arranged adjacent to each other, said first etching stopper film is formed continuously with respect to said plurality of first impurity regions.

14. A photodetector comprising: a first semiconductor layer having opposing first and second surfaces and having a pixel array portion in which a plurality of pixels are arranged in an array in an in-plane direction; a light receiving portion provided within the first semiconductor layer for each of the pixels and generating carriers by photoelectric conversion according to an amount of received light; one or a plurality of first impurity regions provided on the first surface of the first semiconductor layer; a second semiconductor layer stacked on the first surface side of the first semiconductor layer; one or a plurality of through wirings that penetrate the second semiconductor layer and are electrically connected to the one or a plurality of first impurity regions of the first semiconductor layer, respectively; and a first etching stopper film selectively provided only around the one or a plurality of through wirings in the vicinity of the first surface of the first semiconductor layer.

15. The photodetection device described in claim 14, wherein the first semiconductor layer has a first conductivity type region and a second conductivity type region having a different conductivity type from the first conductivity type region stacked on the first surface side of the first semiconductor layer for each pixel, and further has a multiplication section that avalanche multiplies the carriers generated in the light receiving section.

16. The photodetection device described in claim 15, wherein the one or more first impurity regions are one or both of a p-type semiconductor region and an n-type semiconductor region electrically connected to the first conductivity type region and the second conductivity type region, respectively.

17. The photodetection device described in claim 14, wherein the second semiconductor layer has a third surface facing the first surface of the first semiconductor layer and a fourth surface opposite the third surface, and a plurality of transistors are formed on the fourth surface to constitute a readout circuit that outputs pixel signals based on carriers output from the plurality of pixels.

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