Optical transmitter

Abstract

This optical transmitter comprises a nonlinear pre-equalization unit including: a symbol sequence distribution part that distributes symbol sequences before pre-equalization to a plurality of systems based on a frequency division ratio of a clock signal that is used for generating a wideband signal for which nonlinear distortion is compensated, on the basis of predetermined continuous timings different for each of the systems; a plurality of symbol value correction parts that correct the symbol sequences of the plurality of systems for each of the systems; and a parallel-serial conversion part that executes parallel-serial conversion on the corrected symbol sequences of the plurality of systems.

Description

Optical transmitter

[0001] The present invention relates to an optical transmitter.

[0002] Due to the increase in the traffic volume of client signals in the backbone networks of optical communication systems, there is a demand for an increase in the transmission capacity per channel. In optical communication systems, a digital coherent optical transmission method using DP-QPSK (Dual Polarization-Quadrature Phase Shift Keying) is sometimes adopted as the modulation method. In addition, a band doubler optical transmitter is disclosed in Patent Document 1 and Non-Patent Document 1.

[0003] Non-Patent Document 1 discloses a wideband signal generator that generates wideband signals using the "DP-AM-DAC Type I" method (see "Fig. 4" in Non-Patent Document 1) and a wideband signal generator that generates wideband signals using the "DP-AM-DAC Type II" method (see "Fig. 5" in Non-Patent Document 1). Non-Patent Document 2 discloses a wideband signal generator that generates wideband signals using the "RF-IQM" method (see "Fig. 1(c)" in Non-Patent Document 2).

[0004] International Publication No. 2019 / 031447

[0005] M. Nagatani et al., “A Beyond-1-Tb / s Coherent Optical Transmitter Front-End Based on 110-GHz-Bandwidth 2:1 Analog Multiplexer in 250-nm InP DHBT”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 55, NO. 9, SEPTEMBER 2020

[0006] H. Yamazaki et al., “Digital-Preprocessed Analog-Multiplexed DAC for High-Speed ​​Optical Communications”, 2019 24th OptoElectronics and Communications Conference (OECC) and 2019 International Conference on Photonics in Switching and Computing (PSC)

[0007] In the band doubler system, nonlinear distortion may occur in both the narrowband signal (narrowband analog signal) input to the wideband signal generator and the wideband signal (wideband analog signal) output from the wideband signal generator. However, there is a problem in that the nonlinear distortion of the narrowband signal and the nonlinear distortion of the wideband signal cannot be compensated for simultaneously.

[0008] In view of the above circumstances, an object of the present invention is to provide an optical transmitter that can simultaneously compensate for nonlinear distortion of narrowband signals and nonlinear distortion of wideband signals.

[0009] One aspect of the present invention is an optical transmitter equipped with a nonlinear pre-equalization unit having a symbol sequence distribution unit that distributes a pre-equalization symbol sequence to a plurality of systems based on a division ratio of a clock signal used to generate a wideband signal compensated for nonlinear distortion, based on predetermined consecutive timing that differs for each system; a plurality of symbol value correction units that correct the symbol sequences of the plurality of systems for each system; and a parallel-to-serial conversion unit that performs parallel-to-serial conversion on the corrected symbol sequences of the plurality of systems.

[0010] According to the present invention, it is possible to simultaneously compensate for nonlinear distortion of narrowband signals and nonlinear distortion of wideband signals.

[0011] FIG. 1 is a diagram showing an example of the configuration of an optical communication system in a first embodiment. FIG. 2 is a diagram showing an example of a symbol sequence required for compensation for nonlinear distortion in the first embodiment. FIG. 3 is a diagram showing an example of the configuration of a nonlinear pre-equalizer in the first embodiment. FIG. 4 is a diagram showing an example of the configuration of a symbol value corrector in the first embodiment. FIG. 5 is a diagram showing an example of the configuration of a wideband signal generating device in the first embodiment. FIG. 6 is a diagram showing an example of the configuration of a nonlinear pre-equalizer in the second embodiment. FIG. 7 is a diagram showing an example of the configuration of a wideband signal generating device in the second embodiment. FIG. 8 is a diagram showing an example of the configuration of a nonlinear pre-equalizer in the third embodiment. FIG. 9 is a diagram showing an example of the configuration of a wideband signal generating device in the third embodiment. FIG. 10 is a diagram showing an example of the configuration of a nonlinear pre-equalizer in a fourth embodiment. FIG. 11 is a diagram showing an example of the configuration of a wideband signal generating device in the fourth embodiment.

[0012]

[0023] Embodiments of the present invention will be described in detail with reference to the drawings. (First Embodiment) Fig. 1 is a diagram showing an example of the configuration of an optical communication system 1a in the first embodiment. The optical communication system 1a includes an optical transmitter 2a, an optical transmission line 3, and an optical receiver 4a. The optical transmitter 2a includes a symbol mapping unit 21, a nonlinear pre-equalization unit 22a, a digital signal processing unit 23, a wideband signal generating device 24a, and an intensity modulator 25.

[0013] Some functions of the symbol mapping unit 21, the nonlinear pre-equalization unit 22a, the digital signal processing unit 23, and the wideband signal generating device 24a are realized as software by a processor such as a CPU (Central Processing Unit) executing a program stored in a storage unit having a non-volatile storage medium (non-transitory storage medium). The program may be recorded on a computer-readable storage medium or may be recorded in the storage unit via a network. Examples of computer-readable storage media include portable media such as flexible disks, magneto-optical disks, ROMs (Read Only Memory), and CD-ROMs (Compact Disc Read Only Memory), and non-transitory storage devices such as hard disks or solid-state drives (SSDs) built into a computer system.

[0014] Some of the functions of the symbol mapping unit 21, the nonlinear pre-equalization unit 22a, the digital signal processing unit 23, and the wideband signal generating device 24a may be realized using hardware (accelerator) including an electronic circuit (electronic circuit or circuitry) using, for example, an LSI (Large Scale Integrated circuit), an ASIC (Application Specific Integrated Circuit), a PLD (Programmable Logic Device), or an FPGA (Field Programmable Gate Array).

[0015] The optical transmitter 2a transmits an optical signal based on a transmission data sequence (binary information) to the optical receiver 4a via the optical transmission path 3. The symbol mapping unit 21 performs symbol mapping processing on the transmission data sequence. The symbol mapping unit 21 outputs the symbol sequence before pre-equalization to the nonlinear pre-equalization unit 22a.

[0016] The nonlinear pre-equalization unit 22a performs pre-equalization processing on the symbol sequence before pre-equalization. The nonlinear pre-equalization unit 22a outputs the pre-equalized symbol sequence to the digital signal processing unit 23. The digital signal processing unit 23 generates a wideband digital signal by performing predetermined digital signal processing on the pre-equalized symbol sequence. The digital signal processing unit 23 outputs the wideband digital signal (high-speed digital signal) to the wideband signal generating device 24a.

[0017] The wideband signal generating device 24a generates a plurality of systems of narrowband analog signals (low-speed analog signals) based on wideband digital signals. The wideband signal generating device 24a generates a wideband analog signal (high-speed analog signal) based on the plurality of systems of narrowband analog signals. In the first embodiment, the wideband signal generating device 24a generates the wideband analog signals using the "DP-AM-DAC Type I" method.

[0018] The intensity modulator 25 generates an optical signal by performing intensity modulation on the wideband analog signal, and transmits the optical signal to the optical transmission line 3.

[0019] The optical transmission path 3 transmits an optical signal. The optical receiver 4a receives the transmitted optical signal. The optical receiver 4a performs predetermined reception processing on the received optical signal to generate a received signal. The optical receiver 4a performs predetermined demodulation processing on the received signal to generate a received data sequence (binary information).

[0020] Hereinafter, "R" represents the symbol rate of the symbol sequence. In the first embodiment ("DP-AM-DAC Type I" method), the frequency of the clock signal used to generate the wideband signal whose nonlinear distortion has been compensated is "R / 2."

[0021] Next, the optical transmitter 2a will be described in detail. Fig. 2 is a diagram showing an example of a symbol sequence required for compensation of nonlinear distortion in the first embodiment. The wideband analog signal generated by the wideband signal generator 24a in the "DP-AM-DAC Type I" system is expressed as shown in Equation (1).

[0022]

[0023] Here, "a" represents a wideband analog signal (wideband signal), "u" represents a narrowband analog signal (narrowband signal), and "k" represents a symbol number (timing). ｓ " represents the symbol period (=1 / R).

[0024] The even-numbered symbols in the symbol sequence of the wideband analog signal generated by the wideband signal generator 24a are expressed as in equation (2) based on the periodicity of the sine wave.

[0025]

[0026] The odd-numbered symbols in the symbol sequence of the wideband analog signal generated by the wideband signal generator 24a are expressed as in equation (3) based on the periodicity of the sine wave.

[0027]

[0028] Symbol sequence 101 is a symbol sequence required to simultaneously compensate for nonlinear distortion occurring in the first narrowband signal and the wideband signal, while symbol sequence 102 is a symbol sequence required to compensate for nonlinear distortion occurring only in the first narrowband signal.

[0029] Symbol sequence 103 is a symbol sequence required to simultaneously compensate for nonlinear distortion occurring in the second narrowband signal and the wideband signal, while symbol sequence 104 is a symbol sequence required to compensate for nonlinear distortion occurring only in the second narrowband signal.

[0030] The response of nonlinear distortion occurring in even-numbered symbols and the response of nonlinear distortion occurring in odd-numbered symbols have different effects on the waveform of the wideband analog signal generated by the wideband signal generator 24a. Therefore, the nonlinear pre-equalizer 22a determines the correction value used to correct the symbol sequence depending on whether the symbol number "k" is an even number. Therefore, in the first embodiment, the symbol sequence 102 (narrowband signal "u" １ ") and the correction value of the symbol sequence 104 (narrowband signal "u ２") and a correction value for the system are required.

[0031] 3 is a diagram showing an example of the configuration of the nonlinear pre-equalization unit 22a in the first embodiment. The nonlinear pre-equalization unit 22a includes a symbol sequence allocation unit 221a, two symbol value correction units 222, and a parallel-to-serial conversion unit 223.

[0032] The symbol sequence allocating unit 221a receives as input a symbol sequence before pre-equalization from the symbol mapping unit 21. In order to compensate for nonlinear distortion in the wideband signal and narrowband signal for each system, a symbol sequence with continuous timing (continuous symbol numbers) is required for that system. The symbol sequence allocating unit 221a outputs a symbol sequence 101 with continuous timing in the first system to the symbol value correcting unit 222-1. The symbol sequence allocating unit 221a outputs a symbol sequence 103 with continuous timing in the second system to the symbol value correcting unit 222-2.

[0033] The two symbol value correction units 222 correct the two symbol sequences for each sequence. The symbol value correction unit 222-1 corrects the symbol extracted from the symbol sequence 101. The symbol value correction unit 222-1 corrects the corrected symbol "b ２ｋ " to the parallel-serial converter 223. The symbol value corrector 222-2 corrects the symbols extracted from the symbol sequence 103. The symbol value corrector 222-2 outputs the corrected symbol "b ２ｋ＋１ " to the parallel-serial conversion unit 223.

[0034] The parallel-serial converter 223 converts the corrected symbol “b ２ｋ " and the corrected symbol "b ２ｋ＋１ The parallel-serial converter 223 performs parallel-serial conversion on the symbol sequence "b ２ｋ , b ２ｋ＋１ " to the digital signal processing unit 23.

[0035] 4 is a diagram showing an example of the configuration of the symbol value correction unit 222 in the first embodiment. The symbol value correction unit 222 includes a symbol extraction unit 201, a correction value determination unit 202, and an adder 203.

[0036] The two symbol value correction units 222 are configured to correct the symbol value by a nonlinear function “f ＮＬ The two symbol sequences are corrected for each system using the nonlinear function. The nonlinear function is realized using, for example, a lookup table, a neural network, or a Volterra filter. The lookup table values, the neural network coefficients, and the Volterra filter coefficients may be different for each system.

[0037] Each correction value determination unit 202 calculates in advance the difference between the symbol sequence of the wideband digital signal input from the symbol mapping unit 21 and the symbol sequence (received symbols) obtained by equalizing the wideband analog signal using a linear filter or the like. Each correction value determination unit 202 determines in advance lookup table values, neural network coefficients, and Volterra filter coefficients so as to reduce the calculated difference.

[0038] The symbol extraction unit 201 of the symbol value correction unit 222-1 extracts the symbol sequence 101 "x" based on a predetermined condition. ｋ , x ｋ＋１ , ..., x ｋ＋Ｋ－１ ", the symbol "x ｋ＋ｌ The symbol extraction unit 201 of the symbol value correction unit 222-1 selects the selected symbol "x ｋ＋ｌ ” is extracted from the symbol sequence 101. The correction value determination unit 202 of the symbol value correction unit 222-1 extracts the nonlinear function “f ＮＬ ” and the symbol sequence 101, the correction value “f ＮＬ (x ｋ , x ｋ＋１ , ..., x ｋ＋Ｍ－１ ) shall be decided.

[0039] The symbol extraction unit 201 of the symbol value correction unit 222-2 extracts the symbol sequence 103 "x" based on a predetermined condition. ｋ , x ｋ＋１ , ..., x ｋ＋Ｋ－１", the symbol "x ｋ＋ｌ The symbol extraction unit 201 of the symbol value correction unit 222-2 selects the selected symbol "x ｋ＋ｌ ” is extracted from the symbol sequence 103. The correction value determination unit 202 of the symbol value correction unit 222-2 extracts the nonlinear function “f ＮＬ ” and the symbol sequence 103, the correction value “f ＮＬ (x ｋ , x ｋ＋１ , ..., x ｋ＋Ｍ－１ ) shall be decided.

[0040] The adder 203 of the symbol value correction unit 222-1 adds the correction value determined by the correction value determination unit 202 of the symbol value correction unit 222-1 to the symbol extracted from the symbol sequence 101. The adder 203 of the symbol value correction unit 222-2 adds the correction value determined by the correction value determination unit 202 of the symbol value correction unit 222-2 to the symbol extracted from the symbol sequence 103. Each adder 203 outputs the addition result "y ｋ " to the parallel-serial conversion unit 223.

[0041] 5 is a diagram showing an example of the configuration of a wideband signal generation device 24a in the first embodiment. The wideband signal generation device 24a includes a band division unit 241, a narrowband signal processing unit 242, a digital-to-analog conversion unit 243, a clock generation unit 244a, and a wideband signal generation unit 245a.

[0042] The band dividing unit 241 receives a wideband digital signal from the digital signal processing unit 23. The band dividing unit 241 divides the wideband digital signal into bands to generate multiple "N" streams of narrowband digital signals based on the division ratio "M" of the clock signal. In the first embodiment, the number "N" of streams is equal to the division ratio "M" of the clock signal.

[0043] The narrowband signal processing unit 242 performs predetermined signal processing on the narrowband digital signals of the multiple "N" systems, thereby generating processed narrowband digital signals for each system. The digital-to-analog conversion unit 243 converts the processed narrowband digital signals into narrowband analog signals for each system (digital-to-analog conversion).

[0044] In the first embodiment, the frequency of the clock signal used to generate the wideband signal is “R / 2.” The clock generating unit 244a outputs the clock signal to the wideband signal generating unit 245a.

[0045] The wideband signal generating unit 245a generates a wideband analog signal by synthesizing multiple "N" narrowband analog signals using a clock signal in a "DP-AM-DAC Type I" format, for example.

[0046] As described above, the symbol sequence allocator 221a allocates the pre-equalization symbol sequence to two (=N=M) streams based on the division ratio "M" of the clock signal used to generate the wideband signal compensated for nonlinear distortion, based on predetermined consecutive timings (symbol numbers) that differ for each stream. The two symbol value correctors 222 correct the symbol sequences of the two streams separately. The parallel-to-serial converter 223 performs parallel-to-serial conversion on the corrected symbol sequences of the two streams.

[0047] This makes it possible to simultaneously compensate for nonlinear distortion of narrowband signals and nonlinear distortion of wideband signals, and also improve signal quality.

[0048] (Modification) The optical transmitter 2a may include a nonlinear pre-equalizer 22a-1 and a nonlinear pre-equalizer 22a-2 in parallel. The optical transmitter 2a may include a wideband signal generator 24a-1 and a wideband signal generator 24a-2 in parallel. The optical transmitter 2a may include an IQ modulator instead of the intensity modulator 25.

[0049] The digital signal processing unit 23 performs predetermined digital signal processing to generate wideband digital signals. The digital signal processing unit 23 outputs the in-phase wideband digital signal to the wideband signal generating device 24a-1. The digital signal processing unit 23 outputs the quadrature wideband digital signal to the wideband signal generating device 24a-2.

[0050] The wideband signal generator 24a-1 outputs an in-phase wideband analog signal "I(t)" to the IQ modulator. The wideband signal generator 24a-2 outputs a quadrature wideband analog signal "Q(t)" to the IQ modulator.

[0051] The IQ modulator generates an optical signal by performing quadrature modulation (complex modulation) on the in-phase component wideband analog signal “I(t)” and the quadrature component wideband analog signal “Q(t).” The IQ modulator transmits the optical signal to the optical transmission line 3.

[0052] Second Embodiment The second embodiment differs from the first embodiment mainly in that the frequency of the clock signal used to generate the wideband signal is R / 4. The second embodiment will be described focusing on the differences from the first embodiment.

[0053] In the second embodiment (the "DP-AM-DAC Type II" system or the "RF-IQM" system), the frequency of the clock signal used to generate the wideband signal whose nonlinear distortion has been compensated for is "R / 4." In the second embodiment, the number of systems "N" is equal to half the division ratio "M."

[0054] 6 is a diagram showing an example of a symbol sequence required for compensation of nonlinear distortion in the second embodiment. The wideband analog signal generated by the wideband signal generator in the "RF-IQM" method is expressed as in equation (4).

[0055]

[0056] In the symbol sequence of the wideband analog signal generated by the wideband signal generating device, the symbol whose remainder modulo 4 for symbol number "k" is 0 is expressed as shown in equation (5) based on the periodicity of the sine wave.

[0057]

[0058] In the symbol sequence of the wideband analog signal generated by the wideband signal generating device, the symbol whose remainder modulo 4 for symbol number "k" is 1 is expressed as shown in equation (6) based on the periodicity of the sine wave.

[0059]

[0060] In the symbol sequence of the wideband analog signal generated by the wideband signal generating device, the symbol whose remainder modulo 4 for symbol number "k" is 2 is expressed as shown in equation (7) based on the periodicity of the sine wave.

[0061]

[0062] In the symbol sequence of the wideband analog signal generated by the wideband signal generating device, the symbol whose remainder modulo 4 for symbol number "k" is 3 is expressed as shown in equation (8) based on the periodicity of the sine wave.

[0063]

[0064] Symbol sequence 105, symbol sequence 106, symbol sequence 107, symbol sequence 108, and symbol sequence 109 are symbol sequences required to collectively compensate for nonlinear distortion occurring in a wideband signal. In the same system, the output timing of symbol sequence 109 is subsequent to the output timing of symbol sequence 105.

[0065] Symbol sequence 110 is a symbol sequence required to compensate for nonlinear distortion occurring only in the first narrowband signal (narrowband signal "#1"). Symbol sequence 111 is a symbol sequence required to compensate for nonlinear distortion occurring only in the second narrowband signal (narrowband signal "#2"). Symbol sequence 112 is a symbol sequence required to compensate for nonlinear distortion occurring only in the first narrowband signal (narrowband signal "#3"). Symbol sequence 113 is a symbol sequence required to compensate for nonlinear distortion occurring only in the first narrowband signal (narrowband signal "#4").

[0066] Even if the combination of symbol values ​​is the same, the signs are inverted depending on the timing of the output of the symbol sequence. For example, the sign of symbol sequence 112 is inverted relative to the sign of symbol sequence 110. For example, the sign of symbol sequence 113 is inverted relative to the sign of symbol sequence 111.

[0067] Therefore, the effect (e.g., sign inversion) of the nonlinear distortion response on the waveform of the narrowband signal differs for each system of symbol sequences. That is, the effect of the nonlinear distortion response occurring in the 4k symbol sequence, the nonlinear distortion response occurring in the "4k+1" symbol sequence, the nonlinear distortion response occurring in the "4k+2" symbol sequence, and the nonlinear distortion response occurring in the "4k+3" symbol sequence on the waveform of the wideband analog signal generated by the wideband signal generator differs. Therefore, the nonlinear pre-equalization unit determines the correction value used to correct the symbol sequence according to the remainder modulo 4 for the symbol number "k."

[0068] Therefore, in the second embodiment, the symbol sequence 110 (narrowband signal "u") is generated by combining two narrowband signals and positive and negative signs. １ ") and the symbol sequence 111 (narrowband signal "u ２ ") and the correction value of the symbol sequence 112 (narrowband signal "-u １ ") and the correction value of the symbol sequence 113 (narrowband signal "-u ２ ") and a correction value for the system are required.

[0069] 7 is a diagram showing an example of the configuration of the nonlinear pre-equalization unit 22b in the second embodiment. The nonlinear pre-equalization unit 22b includes a symbol sequence allocation unit 221b, four symbol value correction units 222, and a parallel-to-serial conversion unit 223.

[0070] The symbol sequence allocator 221b receives the pre-equalization symbol sequence from the symbol mapping unit 21. In order to compensate for nonlinear distortion of the wideband signal and the narrowband signal for each system, a symbol sequence with continuous timing is required for that system.

[0071] The symbol sequence allocating unit 221b outputs the symbol sequence 105 of consecutive timing in the first system to the symbol value correcting unit 222-1. The symbol sequence allocating unit 221b outputs the symbol sequence 106 of consecutive timing in the second system to the symbol value correcting unit 222-2. The symbol sequence allocating unit 221b outputs the symbol sequence 107 of consecutive timing in the third system to the symbol value correcting unit 222-3. The symbol sequence allocating unit 221b outputs the symbol sequence 106 of consecutive timing in the fourth system to the symbol value correcting unit 222-4.

[0072] The four symbol value correction units 222 correct the four symbol sequences for each sequence. The symbol value correction unit 222-1 corrects the symbol extracted from the symbol sequence 105. The symbol value correction unit 222-1 corrects the corrected symbol "b ４ｋ " to the parallel-serial converter 223. The symbol value corrector 222-2 corrects the symbols extracted from the symbol sequence 106. The symbol value corrector 222-2 outputs the corrected symbol "b ４ｋ＋１ " to the parallel-serial conversion unit 223.

[0073] The symbol value correction unit 222-3 corrects the symbols extracted from the symbol sequence 107. The symbol value correction unit 222-3 corrects the corrected symbol sequence "b ４ｋ＋２ " to the parallel-serial converter 223. The symbol value corrector 222-4 corrects the symbols extracted from the symbol sequence 106. The symbol value corrector 222-4 outputs the corrected symbol "b ４ｋ＋３ " to the parallel-serial conversion unit 223.

[0074] The parallel-serial converter 223 converts the corrected symbol “b ２ｋ " and the corrected symbol "b ４ｋ＋１ " and the corrected symbol "b ４ｋ＋２ " and the corrected symbol "b ４ｋ＋３ The parallel-serial converter 223 performs parallel-serial conversion on the symbol sequence "b４ｋ , b ４ｋ＋１ , b ４ｋ＋２ , b ４ｋ＋３ " to the digital signal processing unit 23.

[0075] 8 is a diagram showing an example of the configuration of a wideband signal generation device 24b in the second embodiment. The wideband signal generation device 24b includes a band division unit 241, a narrowband signal processing unit 242, a digital-to-analog conversion unit 243, a clock generation unit 244b, and a wideband signal generation unit 245b.

[0076] In the second embodiment, the frequency of the clock signal used to generate the wideband signal is “R / 4.” The clock generating unit 244b outputs the clock signal to the wideband signal generating unit 245b.

[0077] The wideband signal generating unit 245b generates a wideband analog signal by synthesizing multiple "N" systems of narrowband analog signals using a clock signal, for example, in the "DP-AM-DAC Type II" method or the "RF-IQM" method.

[0078] As described above, the symbol sequence allocator 221b allocates the pre-equalization symbol sequence to four (=N=M / 2) streams based on the division ratio "M" of the clock signal used to generate the wideband signal compensated for nonlinear distortion, based on predetermined consecutive timing (symbol numbers) that differ for each stream. The four symbol value correctors 222 correct the symbol sequences of the four streams for each stream. The parallel-to-serial converter 223 performs parallel-to-serial conversion on the corrected symbol sequences of the four streams.

[0079] This makes it possible to simultaneously compensate for the nonlinear distortion of the narrowband signal and the nonlinear distortion of the wideband signal.

[0080] Third Embodiment The third embodiment differs from the first and second embodiments mainly in that the frequency of the clock signal used to generate the wideband signal is "R / 3." The third embodiment will be described focusing on the differences from the first and second embodiments.

[0081] In the third embodiment ("Triplexer" system), the frequency of the clock signal used to generate the wideband signal whose nonlinear distortion has been compensated is "R / 3." The wideband analog signal generated by the wideband signal generating device in the "Triplexer" system is expressed as in equation (9).

[0082]

[0083] In the symbol sequence of the wideband analog signal generated by the wideband signal generating device, the symbol whose remainder modulo 3 for symbol number "k" is 0 is expressed as shown in equation (10) based on the periodicity of the sine wave.

[0084]

[0085] In the symbol sequence of the wideband analog signal generated by the wideband signal generating device, the symbol whose remainder by 3 for symbol number "k" is 1 is expressed as shown in equation (11) based on the periodicity of the sine wave.

[0086]

[0087] In the symbol sequence of the wideband analog signal generated by the wideband signal generating device, the symbol whose remainder modulo 3 for symbol number "k" is 2 is expressed as shown in equation (12) based on the periodicity of the sine wave.

[0088]

[0089] The effect of the nonlinear distortion response on the waveform of the narrowband signal (e.g., coefficient change) differs for each system of symbol sequences. That is, the effect of the nonlinear distortion response occurring in the 3k symbol sequence, the nonlinear distortion response occurring in the "3k+1" symbol sequence, and the nonlinear distortion response occurring in the "3k+2" symbol sequence on the waveform of the wideband analog signal generated by the wideband signal generator differs. Therefore, the nonlinear pre-equalization unit determines the correction value used to correct the symbol sequence based on the remainder of symbol number "k" modulo 3. Therefore, in the third embodiment, three systems of correction values ​​are required.

[0090] 9 is a diagram showing an example of the configuration of a nonlinear pre-equalization unit 22c in the third embodiment. The nonlinear pre-equalization unit 22c includes a symbol sequence allocation unit 221c, three symbol value correction units 222, and a parallel-to-serial conversion unit 223.

[0091] The symbol sequence allocator 221c receives the pre-equalization symbol sequence from the symbol mapping unit 21. In order to compensate for nonlinear distortion of the wideband signal and the narrowband signal for each system, a symbol sequence with continuous timing is required for that system.

[0092] The symbol sequence allocating unit 221c outputs the symbol sequence exemplified in equation (10) to the symbol value correcting unit 222-1 as a symbol sequence with continuous timing in the first system. The symbol sequence allocating unit 221c outputs the symbol sequence exemplified in equation (11) to the symbol value correcting unit 222-2 as a symbol sequence with continuous timing in the second system. The symbol sequence allocating unit 221c outputs the symbol sequence exemplified in equation (12) to the symbol value correcting unit 222-3 as a symbol sequence with continuous timing in the third system.

[0093] The three symbol value correction units 222 correct the three symbol sequences for each sequence. The symbol value correction unit 222-1 corrects the symbol extracted from the symbol sequence exemplified in equation (10). The symbol value correction unit 222-1 corrects the corrected symbol "b ３ｋ " to the parallel-serial converter 223. The symbol value corrector 222-2 corrects the symbols extracted from the symbol sequence exemplified in equation (11). The symbol value corrector 222-2 outputs the corrected symbol "b ３ｋ＋１ " to the parallel-serial converter 223. The symbol value corrector 222-3 corrects the symbols extracted from the symbol sequence exemplified in equation (12). The symbol value corrector 222-3 outputs the corrected symbol sequence "b ３ｋ＋２ " to the parallel-serial conversion unit 223.

[0094] The parallel-serial converter 223 converts the corrected symbol “b ３ｋ" and the corrected symbol "b ３ｋ＋１ " and the corrected symbol "b ３ｋ＋２ The parallel-serial converter 223 performs parallel-serial conversion on the symbol sequence "b ３ｋ , b ３ｋ＋１ , b ３ｋ＋２ " to the digital signal processing unit 23.

[0095] 10 is a diagram showing an example of the configuration of a wideband signal generation device 24c according to the third embodiment. The wideband signal generation device 24c includes a band division unit 241, a narrowband signal processing unit 242, a digital-to-analog conversion unit 243, a clock generation unit 244c, and a wideband signal generation unit 245c.

[0096] In the third embodiment, the frequency of the clock signal used to generate the wideband signal is “R / 3.” The clock generating unit 244c outputs the clock signal to the wideband signal generating unit 245c.

[0097] The wideband signal generating unit 245c generates a wideband analog signal by synthesizing a plurality of "N" narrowband analog signals using a clock signal in a "Triplexer" format, for example.

[0098] As described above, the symbol sequence allocator 221c allocates the pre-equalization symbol sequence to three (=N=M) streams based on the division ratio "M" of the clock signal used to generate the wideband signal compensated for nonlinear distortion, based on predetermined consecutive timing (symbol numbers) that differ for each stream. The three symbol value correctors 222 correct the symbol sequences of the three streams for each stream. The parallel-to-serial converter 223 performs parallel-to-serial conversion on the corrected symbol sequences of the three streams.

[0099] This makes it possible to simultaneously compensate for the nonlinear distortion of the narrowband signal and the nonlinear distortion of the wideband signal.

[0100] (Fourth Embodiment) In the fourth embodiment, the first to third embodiments will be generalized and briefly explained using the division ratio "M" of the clock signal used to generate a wideband signal compensated for nonlinear distortion.

[0101] 11 is a diagram showing an example of the configuration of a nonlinear pre-equalization unit 22d in the fourth embodiment. The nonlinear pre-equalization unit 22d includes a symbol sequence allocation unit 221d, M symbol value correction units 222, and a parallel-to-serial conversion unit 223.

[0102] The symbol sequence allocating unit 221d receives the symbol sequence of the wideband digital signal from the symbol mapping unit 21. That is, the symbol sequence allocating unit 221d receives the symbol sequence before pre-equalization.

[0103] The symbol sequence allocation unit 221d allocates the pre-equalization symbol sequence to multiple "N" streams based on a division ratio "M" of the clock signal, based on predetermined timings that differ for each stream. In the first embodiment "DP-AM-DAC Type I" and the third embodiment "Triplexer," the number of streams "N" is equal to the division ratio "M." In the second embodiment "DP-AM-DAC Type II, RF-IQM," the number of streams "N" is equal to half the division ratio "M."

[0104] Even for the same combination of symbol values, the sign of the symbol sequence is inverted depending on the timing of the output of the symbol sequence. Therefore, the effect of the nonlinear distortion response on the narrowband signal (e.g., sign inversion and coefficient change) differs for each branch of the symbol sequence. Therefore, the N symbol value correcting units 222 correct the N branches of symbol sequence for each branch. Furthermore, in order to compensate for the nonlinear distortion of the wideband signal and the narrowband signal for each branch, symbol sequences with continuous timing are required in each branch.

[0105] Each symbol value correction unit 222 calculates the difference between the symbol sequence of the wideband digital signal input from the symbol mapping unit 21 and the symbol sequence (received symbols) obtained by equalizing the wideband analog signal using a linear filter or the like. Each symbol value correction unit 222 determines in advance lookup table values, neural network coefficients, or Volterra filter coefficients so as to reduce the calculated difference.

[0106] The parallel-serial converter 223 performs parallel-serial conversion on the corrected symbols in the N streams, and outputs the symbol sequence after the parallel-serial conversion to the digital signal processor 23.

[0107] 12 is a diagram showing an example of the configuration of a wideband signal generation device 24d according to the fourth embodiment. The wideband signal generation device 24d includes a band dividing unit 241, a narrowband signal processing unit 242, a digital-to-analog conversion unit 243, a clock generation unit 244d, and a wideband signal generation unit 245d.

[0108] In the fourth embodiment, the frequency of the clock signal used to generate the wideband signal is "R / M." The clock generating unit 244d outputs the clock signal to the wideband signal generating unit 245d. The wideband signal generating unit 245d generates the wideband analog signal by synthesizing multiple "N" series of narrowband analog signals using the clock signal.

[0109] As described above, the symbol sequence allocator 221d allocates the pre-equalization symbol sequence to multiple "N" streams based on the division ratio "M" of the clock signal used to generate the wideband signal compensated for nonlinear distortion, based on predetermined consecutive timings (symbol numbers) that differ for each stream. The multiple "N" symbol value correctors 222 correct the symbol sequences of the multiple "N" streams for each stream. The parallel-to-serial converter 223 performs parallel-to-serial conversion on the corrected symbol sequences of the multiple "N" streams.

[0110] This makes it possible to simultaneously compensate for the nonlinear distortion of the narrowband signal and the nonlinear distortion of the wideband signal.

[0111] Although an embodiment of the present invention has been described above in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and includes designs within the scope of the gist of the present invention.

[0112] The present invention is applicable to optical communication systems.

[0113] 1a...optical communication system, 2a...optical transmitter, 3...optical transmission path, 4a...optical receiver, 21...symbol mapping unit, 22a, 22b, 22c, 22d...nonlinear pre-equalization unit, 23...digital signal processing unit, 24a, 24b, 24c, 24d...wideband signal generating device, 25...intensity modulator, 101...symbol sequence, 102...symbol sequence, 103...symbol sequence, 104...symbol sequence, 105...symbol sequence, 106...symbol sequence, 107...symbol sequence, 108...symbol sequence, 109...symbol sequence, 110...symbol Symbol sequence, 111... symbol sequence, 112... symbol sequence, 113... symbol sequence, 201... symbol extraction unit, 202... correction value determination unit, 203... adder, 221a, 221b, 221c, 221d... symbol sequence allocation unit, 222... symbol value correction unit, 223... parallel-serial conversion unit, 241... band division unit, 242... narrowband signal processing unit, 243... digital-analog conversion unit, 244a, 244b, 244c, 244d... clock generation unit, 245a, 245b, 245c, 245d... wideband signal generation unit

Claims

1. An optical transmitter equipped with a nonlinear pre-equalization unit having: a symbol sequence distribution unit that distributes a symbol sequence before pre-equalization to a plurality of systems based on the division ratio of a clock signal used to generate a wideband signal compensated for nonlinear distortion, based on a predetermined consecutive timing that differs for each system; a plurality of symbol value correction units that correct the symbol sequences of the plurality of systems for each system; and a parallel-to-serial conversion unit that performs parallel-to-serial conversion on the corrected symbol sequences of the plurality of systems.

2. The optical transmitter according to claim 1, wherein said plurality of symbol value correction units add a correction value determined for each of said branches to a symbol selected from a symbol sequence allocated to each of said branches.

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