Control circuit and interleaved power supply
The control circuit for the interleaved power supply addresses the challenges of increased terminal count, circuit complexity, and load monitoring independence from AC cycles by using an interleaved signal to control secondary converter switching operations, thereby enhancing efficiency and flexibility in power supply management.
Patent Information
- Application Number
- PCT/JP2024/033748
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-29
- Filing Date
- 2024-09-20
- Publication Date
- 2025-04-03
AI Technical Summary
Existing interleaved power supplies face issues such as increased number of terminals and size in the main converter control circuit, complexity in circuit configuration due to the need for new components and wiring, and difficulty in monitoring load without relying on AC power supply cycles, as well as challenges in easily switching the secondary converter on or off at light loads without increasing the number of terminals.
A control circuit for an interleaved power supply that includes a main converter and secondary converters, where the control circuit determines the load state based on error amplifier output voltage and generates an interleaved signal to control the switching operation of the secondary converters, eliminating the need for additional terminals for automatic stop signals and allowing load monitoring independent of AC power supply cycles.
The solution prevents the increase in the number of terminals and size of the main converter control circuit, simplifies the circuit configuration, allows load monitoring without relying on AC power supply cycles, and enables easy switching of the secondary converter at light loads without increasing the number of terminals.
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Figure JP2024033748_03042025_PF_FP_ABST
Abstract
Description
Control circuit and interleaved power supply Cross Reference
[0001] This application claims priority based on Japanese Patent Application No. 2023-170201, filed on September 29, 2023, the entire contents of which are incorporated herein by reference.
[0002] The present invention relates to a control circuit and an interleaved power supply.
[0003] Conventionally, there has been known a critical-type interleaved power supply that controls a PFC circuit using multiple converter stages, in which the load state is monitored and when the load is light, all stages except the first stage are stopped to improve conversion efficiency (see, for example, Patent Document 1).
[0004] The interleaved power supply described in Patent Document 1 includes three converters (a main converter and two sub converters), each having an inductor, a switch, and a rectifier. The interleaved power supply described in Patent Document 1 monitors the load state based on input-side information (e.g., inductor current, input voltage, input current, etc.) or output-side information (e.g., output voltage, output current, etc.), and operates only the main converter when the load is light.
[0005] JP 2015-019558 A
[0006] However, (1) when the load condition is monitored based on input-side information (e.g., inductor current, input voltage, input current, etc.) as in the case of the interleaved power supply described in Patent Document 1, an additional circuit and a new terminal for sending an automatic stop signal to the control circuit of the slave converter are required to monitor the load condition. Also, when multiple slave converters are provided, each with its own control circuit, the automatic stop signal of the slave converter needs to be transmitted between adjacent converters, and a new terminal is required for this purpose. Therefore, in these cases, the number of terminals in the control circuit of the master converter increases, which may result in problems such as an increase in size or the need for design changes.
[0007] Furthermore, (2) in the interleaved power supply described in Patent Document 1, when the load state is monitored based on input-side information (e.g., inductor current, input voltage, input current, etc.), depending on the cycle of the AC power supply (particularly when the input voltage is at a valley), the secondary converter may unintentionally stop despite the heavy load. Therefore, there is a need for a control circuit that monitors the load independently of the cycle of the AC power supply.
[0008] On the other hand, (3) in the interleaved power supply described in Patent Document 1, when the load condition is monitored based on output side information (e.g., output voltage, output current, etc.), the output side information needs to be converted and input to the control circuit. In this case, new components and wiring are required to obtain the output side information, which results in a problem of a complex circuit configuration.
[0009] Furthermore, (4) when ripple reduction is required even under light load conditions or when the load suddenly changes from light to heavy, it may be undesirable to stop the sub-converter, and therefore an interleaved power supply is required that can easily switch whether or not the sub-converter is stopped under light load conditions. However, this poses the problem of requiring a separate circuit for switching whether or not the sub-converter is stopped, which increases the number of terminals in the control circuit of the main converter.
[0010] Therefore, the present invention has been made in consideration of the above circumstances, and aims to provide a control circuit that (1) is less likely to cause problems such as an increase in the number of terminals in the control circuit of the main converter, resulting in an increase in size, or the need for design changes due to the increase in the number of terminals, (2) is capable of monitoring the load independently of the cycle of the AC power supply, (3) does not require new components or wiring to obtain information on the output side, and therefore does not complicate the circuit configuration, and (4) is capable of easily switching whether or not the sub-converter is stopped under light load without increasing the number of terminals in the control circuit of the main converter. Another aim is to provide an interleaved power supply having such a control circuit.
[0011] The control circuit of the present invention comprises a main converter having a main switch that performs a switching operation, and a slave converter having a slave switch that switches with a predetermined phase difference relative to the switching operation of the main switch, and is a control circuit for controlling the switching operation of the main switch for an interleaved power supply that forms a master-slave relationship between the main converter and the slave converter, the control circuit comprises a load state determination unit, an on-trigger generation unit, a gate control unit, a drive unit, and an interleave signal generation unit, the load state determination unit determines the load state based on an error amplifier output voltage generated by a voltage based on an output voltage, and outputs the determined load state information to the interleave The on-trigger generation unit generates an on-trigger and outputs it to the gate control unit, the gate control unit outputs a control signal having an on-width calculated based on the error amplifier output voltage to the drive unit with a predetermined phase difference, and outputs control signal output information to the interleave signal generation unit, the drive unit turns the main switch on and off based on the control signal, and the interleave signal generation unit outputs an interleave signal to the slave converter, the interleave signal including information on whether to stop a slave switch control circuit that controls the switching operation of the slave switch, based on the load state information and the control signal output information.
[0012] The interleaved power supply of the present invention comprises a main converter having a main switch that performs switching operation, and a sub converter having a sub switch that switches with a predetermined phase difference relative to the switching operation of the main switch, and is an interleaved power supply that forms a master-slave relationship between the main converter and the sub converter, and the main switch control circuit that controls the switching operation of the main switch is a control circuit as described in any of claims 1 to 4, and outputs an interleaved signal to the sub switch control circuit that includes information on whether or not to stop the sub switch control circuit that controls the switching operation of the sub switch, and the sub switch control circuit determines whether or not to stop the sub switch control circuit based on the interleaved input signal when the interleaved signal is input to the sub switch control circuit.
[0013] According to the control circuit and interleaved power supply of the present invention, the interleave signal generator outputs an interleave signal to the slave switch control circuit (slave converter) based on load status information and control signal output information, the interleave signal including information on whether to stop the slave switch control circuit that controls the switching operation of the slave switch. Therefore, there is no need to provide the control circuit with a terminal for sending an automatic stop signal to the slave switch control circuit. This prevents problems such as an increase in the number of terminals in the control circuit of the main converter, which increases the size, or an increase in the number of terminals that requires design changes. Even in cases where multiple slave converters are provided and each converter has its own control circuit, there is no need to provide a terminal for transmitting the automatic stop signal between adjacent converters because the interleave signal can determine whether to stop the slave switch control circuit. Therefore, there is no need to increase the number of terminals in the slave switch control circuit.
[0014] Furthermore, according to the control circuit and interleaved power supply of the present invention, the load state determination unit generates load state information based on the error amplifier output voltage, which is generated by a voltage based on the output voltage, and outputs the information to the interleaved signal generation unit, so that the load state can be determined without depending on the cycle of the AC power supply. Therefore, it is possible to prevent the secondary converter from unintentionally stopping despite a heavy load, as in the case where the load state is monitored based on input-side information (e.g., inductor current, input voltage, input current, etc.), and it is possible to provide a control circuit that monitors the load without depending on the cycle of the AC power supply.
[0015] According to the control circuit and interleaved power supply of the present invention, the load state determination unit determines the load state based on the error amplifier output voltage generated by a voltage based on the output voltage, and outputs the determined load state information to the interleave signal generation unit, and the interleave signal generation unit outputs an interleave signal including information on whether or not to stop the slave switch control circuit that controls the switching operation of the slave switch based on the load state information and the control signal output information to the slave switch control circuit (slave converter).Therefore, the error amplifier output voltage, which has conventionally been used to correct the on-width, can be used to determine whether or not to stop the slave switch control circuit.As a result, no new components or wiring are required to obtain information on the output side, and the circuit configuration can be prevented from becoming complicated.
[0016] According to the control circuit and interleaved power supply of the present invention, the interleaved signal generator outputs an interleaved signal to the slave switch control circuit, including information on whether to stop the slave switch control circuit that controls the switching operation of the slave switch, based on load state information and control signal output information. Therefore, even when it is not desirable to stop the slave converter, such as when ripple reduction is required even under light load conditions or when there is a sudden change from light to heavy load, it is possible to easily switch whether the slave converter stops by adjusting the interleaved signal. Furthermore, no circuit is required to switch whether the slave converter stops, and the number of terminals of the control circuit of the main converter is not increased. Therefore, whether the slave converter stops under light load conditions can be easily switched without increasing the number of terminals of the control circuit of the main converter.
[0017] 3A is a circuit diagram showing an interleaved power supply 1 according to a first embodiment. FIG. 3B is a block diagram illustrating a main switch control circuit 100 (leader) according to the first embodiment. FIG. 3C is a diagram illustrating the automatic stop function of a slave converter 30 (follower) according to the first embodiment. FIG. 3A is a timing chart of the leader and follower, and FIG. 3B is a schematic diagram illustrating the relationship between the interleaved signal IL_OUT, the interleaved input signal IL_IN, and the interleaved signal detection threshold voltage VIL_IN1. Note that each waveform is drawn schematically, and the high-level values of different waveforms do not necessarily match. For example, the high-level voltage values of the leader's IL_OUT and the follower's interleaved input signal IL_IN appear to be the same, but in reality, the follower's interleaved input signal IL_IN is a divided version of the leader's interleaved signal IL_OUT, and is therefore lower than the high-level voltage value of the leader's IL_OUT. FIG. 3D is a circuit diagram showing an interleaved power supply 2 according to a first modification. FIG. 3E is a diagram illustrating the operation of the slave converter 30 (follower) according to the first modification. FIG. 5(a) is a timing chart of the leader and follower, and FIG. 5(b) is a schematic diagram showing the relationship between the interleaved signal IL_OUT, the interleaved input signal IL_IN, and the interleaved signal detection threshold voltage VIL_IN1. This figure is shown to explain the automatic stop function of the slave converter 30 (follower) of embodiment 2. FIG. 6(a) is a timing chart of the leader and follower, and FIG. 6(b) is a schematic diagram showing the relationship between the interleaved signal IL_OUT, the interleaved input signal IL_IN, the interleaved signal detection threshold voltage VIL_IN1, and the interleaved operation stop threshold voltage VIL_IN1_stop. This figure is shown to explain the operation of the slave converter 30 (follower) of modification 2. FIG. 7(a) is a timing chart of the leader and follower, and FIG. 7(b) is a schematic diagram showing the relationship between the interleaved signal IL_OUT, the interleaved input signal IL_IN, the interleaved signal detection threshold voltage VIL_IN1, and the interleaved operation stop threshold voltage VIL_IN1_stop. FIG. 11 is a schematic diagram showing the relationship between a COMP voltage and a load state in the third embodiment.8(a) is a schematic diagram showing the relationship between the COMP voltage and the load state determination threshold voltage, and FIG. 8(b) is a timing chart showing the relationship between the COMP voltage, gate output voltage OUT, and interleaved signal IL_OUT. This is a schematic diagram showing the relationship between the high-level voltage value (IL_OUT threshold) VIL_OUT of the leader's interleaved signal, the high-level voltage value (IL_IN generation voltage) IL_IN of the interleaved input signal, the interleaved signal detection threshold voltages (IL_IN thresholds) VIL_IN1 and VIL_IN2, and the high-level voltage values (IL_OUT thresholds) VIL_OUT1 and VIL_OUT2 of the follower's interleaved signal in embodiment 3. This is a diagram showing the automatic stop function of slave converters 30 and 40 (followers 1 and 2) in embodiment 3. FIG. 10(a) is a timing chart of the leader and follower, and FIG. 10(b) is a schematic diagram shown to explain the operation of the leader, follower 1, and follower 2 in a heavy load state. 11A is a diagram showing the automatic stop function of the slave converters 30, 40 (followers 1, 2) of embodiment 3. FIG. 11A is a schematic diagram shown to explain the operation of the leader, follower 1, and follower 2 in light load state 1, and FIG. 11B is a schematic diagram shown to explain the operation of the leader, follower 1, and follower 2 in light load state 2. FIG. 11B is a diagram showing the automatic stop function of the slave converters 30, 40 (followers 1, 2) of modification 3. FIG. 13A is a timing chart of the leader and followers, and FIG. 13B is a schematic diagram showing the relationship between the interleaved signals and interleaved input signals IL_IN and threshold voltages of the leader, follower 1, and follower 2. FIG. 13B is a circuit diagram showing an interleaved power supply 2 according to embodiment 4. FIG. 13C is a schematic diagram showing the relationship between the interleaved signals and interleaved input signals IL_IN and threshold voltages of the leader, follower 1, and follower 2 of embodiment 4. FIG. 10 is a diagram illustrating an automatic stop function of the slave converters 30 and 40 (followers 1 and 2) according to the fourth embodiment.16(a) is a schematic diagram shown to explain the automatic stop function of the leader, follower 1, and follower 2 in a heavy load state, FIG. 16(b) is a schematic diagram shown to explain the automatic stop function of the leader, follower 1, and follower 2 in a light load state 2, and FIG. 16(c) is a schematic diagram shown to explain the automatic stop function of the leader, follower 1, and follower 2 in a light load state 1. A schematic diagram showing the relationship between the interleaved signal and the interleaved input signal IL_IN and the threshold voltage of the leader, follower 1, and follower 2 of embodiment 5. A diagram showing the automatic stop function of the slave converters 30, 40 (followers 1, 2) of embodiment 5. FIG. 18(a) is a schematic diagram shown to explain the automatic stop function of the leader, follower 1, and follower 2 in a heavy load state, FIG. 18(b) is a schematic diagram shown to explain the automatic stop function of the leader, follower 1, and follower 2 in a light load state 2, and FIG. 18(c) is a schematic diagram shown to explain the automatic stop function of the leader, follower 1, and follower 2 in a light load state 1. FIG. 18(b) is a schematic diagram shown to explain the automatic stop function of the leader, follower 1, and follower 2 in a light load state 1. FIG. 18(c) is a block diagram shown to explain a main switch control circuit 101 (leader) according to a sixth embodiment. FIG. 18(a) is a schematic graph shown to explain load state determination threshold voltages Vcomp1, Vcomp2 in the sixth embodiment. FIG. 18(b) is a circuit diagram shown to explain an input voltage monitoring circuit in the sixth embodiment. FIG. 21(a) and FIG. 21(b) are examples of input voltage monitoring circuits. FIG. 21(c) is a block diagram showing a main switch control circuit 100a according to a third modification.
[0018] The control circuit and interleaved power supply of the present invention will be described below based on the first embodiment shown in the drawings. Note that the embodiments described below do not limit the invention according to the claims. Furthermore, not all of the elements and combinations thereof described in the embodiments are necessarily essential to the solution of the present invention.
[0019] [Embodiment 1] 1. Configuration of Interleaved Power Supply 1 According to Embodiment 1 The interleaved power supply 1 according to embodiment 1 is an interleaved power supply in which a plurality of converters are connected in multiple stages. As shown in Fig. 1, the interleaved power supply 1 includes a rectifier circuit 10, a main converter 20 having a main switch Q1 that performs switching operations, secondary converters 30 and 40 having secondary switches Q2 and Q3 that perform switching operations with a phase difference relative to the switching operation of the main switch Q1, and an output capacitor C3.
[0020] In the interleaved power supply 1, the main converter 20 and the secondary converters 30 and 40 are connected in parallel between the rectifier circuit 10 and the output capacitor C3, and a master-slave relationship is formed between the main converter 20 and the secondary converters 30 and 40.
[0021] The rectifier circuit 10 includes a bridge diode BD that performs full-wave rectification on the AC current of the commercial power supply to convert it into a pulsating current, and a smoothing capacitor C2.
[0022] (1) Configuration of the main converter 20 The main converter 20 (leader) comprises an inductor L1, an auxiliary winding L4, a main switch Q1, a diode D1, and a main switch control circuit 100 (corresponding to the control circuit of the present invention), and the inductor L1, the main switch Q1, and the diode D1 form a boost chopper circuit.
[0023] In the first embodiment, the main switch Q1 is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but it may be an IGBT or any other suitable switch element. Any suitable inductor may be used as the inductor L1, and any suitable diode may be used as the diode D1. The same applies to the slave switches Q2 and Q3, inductors L2 and L3, and diodes D2 and D3 described below.
[0024] 1 and 2, the main switch control circuit 100 outputs a control signal for controlling the main switch Q1 to the gate electrode of the main switch Q1, and also outputs an interleaved signal to the secondary converter 30. The main switch control circuit 100 has eight terminals: a Vcc terminal, an OUT terminal, a GND terminal, a ZC terminal, an OCL terminal, an IL_OUT terminal, a COMP terminal, and an FB terminal.
[0025] The Vcc terminal is connected to an external power supply Vcc and receives power from the external power supply Vcc. The OUT terminal is connected to the gate electrode of the main switch Q1 and outputs a signal to the gate electrode to control the on / off of the main switch Q1. The GND terminal is grounded.
[0026] The ZC terminal is connected to the auxiliary winding L4 and detects the inductor current IL flowing through the inductor L1.
[0027] The OCL terminal is connected to a resistor R3 and a capacitor C7, and is connected via the resistor R3 to the midpoint between the source electrode of the main switch Q1 and the resistor R2. The OCL terminal is used to monitor whether an overcurrent is flowing through the main switch Q1 by monitoring the voltage determined by the resistor R2. The IL_OUT terminal is connected to the IL_IN terminal of the slave switch control circuit 200a (follower).
[0028] The COMP terminal is connected to the output terminal of the error amplifier 110, which is connected to a capacitor C6. The main switch control circuit 100 uses the voltage at the COMP terminal to determine the on-width of the main switch Q1 and control the gate output voltage. The FB terminal is connected to a capacitor C5 and resistors R4 and R5. A voltage obtained by dividing the output voltage by resistors R4 and R5 is input to the FB terminal.
[0029] Next, the internal configuration of the main switch control circuit 100 will be described. As shown in Fig. 2, the main switch control circuit 100 (leader) has an error amplifier (FB_Amp) 110, a load state determination unit 120, an on-trigger generation unit 130, an on-width calculation unit 140, a gate control unit 150, a drive unit 160, and an interleave signal generation unit 170. In addition, although not shown, it has an overvoltage detection unit (not shown) that detects whether the output voltage of the interleaved power supply 1 is an overvoltage by comparing whether the FB voltage of the FB terminal is greater than a predetermined value.
[0030] The error amplifier 110 detects an error by comparing the voltage obtained by dividing the output voltage by resistors R4 and R5 with a reference voltage, and determines the charge / discharge current of the capacitor C6 at the COMP terminal based on this. This determines the COMP terminal voltage (COMP voltage), and the ON width is determined so as to keep the output voltage constant.
[0031] The load state determination unit 120 generates load state information based on the error amplifier output voltage (COMP voltage) generated by a voltage based on the output voltage (a voltage obtained by dividing the output voltage Vo), and outputs the load state information to the interleave signal generation unit 170.
[0032] The load condition determination unit 120 determines the load condition based on whether the error amplifier output voltage (COMP voltage) exceeds load condition determination threshold voltages Vcomp1, Vcomp2 (see FIG. 3A). Specifically, the load condition determination unit 120 determines that the load is light when the COMP voltage falls below the load condition determination threshold voltage Vcomp1, and determines that the load has returned to heavy when the COMP voltage recovers and exceeds Vcomp2. The load condition determination threshold voltage Vcomp2 when the COMP voltage is increasing is greater than the load condition determination threshold voltage Vcomp1 when the COMP voltage is decreasing.
[0033] The on-trigger generating section 130 generates an on-trigger and outputs it to the gate control section 150 .
[0034] The on-width calculation unit 140 calculates the on-width of the main switch Q1 based on the COMP voltage so as to keep the output voltage constant, and outputs this as on-width information to the gate control unit 150. Specifically, the on-width of the main switch Q1 is determined by the charge / discharge voltage of the capacitor C6 connected to the COMP terminal, which is the error amplifier output voltage terminal. In the on-width calculation unit 140, since it is preferable to increase the inductor current IL under heavy load conditions, the on-width is widened by increasing the COMP voltage. On the other hand, under light load conditions, since it is not necessary to increase the inductor current IL, the on-width is narrowed by lowering the COMP voltage.
[0035] The gate control unit 150 outputs a control signal having an on-width calculated based on the COMP voltage to the drive unit 160 with a predetermined phase difference based on an on-trigger, and outputs control signal output information synchronized with the control signal to the interleave signal generation unit 170.
[0036] The driving unit 160 outputs a switching pulse that turns on and off the main switch Q1 based on a control signal from the gate control unit 150 to the gate electrode of the main switch Q1 via the gate output terminal OUT.
[0037] The interleave signal generator 170 outputs an interleave signal to the slave switch control circuits 200a and 200b based on the load state information and the control signal output information. The interleave signal includes information on whether or not to stop the slave switch control circuits 200a and 200b (follower 1 and follower 2) that control the switching operations of the slave switches Q2 and Q3.
[0038] The interleave signal generation unit 170 has an interleave output voltage adjustment unit, and outputs an interleave signal IL_OUT, the voltage value of which is adjusted when it is at a high level, to the slave switch control circuit 200 a as information on whether or not to stop the slave switch control circuits 200 a, 200 b. Specifically, the interleave signal generation unit 170 outputs an interleave signal, the voltage value of which is adjusted when it is determined that the slave switch control circuits 200 a, 200 b are in a light load state, to the slave switch control circuit 200 a, so that the high level voltage value is lower than the high level voltage value when it is determined that the slave switch control circuits 200 a, 200 b are in a heavy load state.
[0039] The interleave signal is synchronized with the control signal, and the high level voltage value during heavy load is the same as the high level voltage value of the control signal.
[0040] (2) Configuration of the Slave Converter 30 and the Slave Switch Control Circuit 200a The slave converter 30 includes an inductor L2, an auxiliary winding L5, a slave switch Q2, a diode D2, and a slave switch control circuit 200a, and the inductor L2, the slave switch Q2, and the diode D2 form a boost chopper circuit.
[0041] The slave switch control circuit 200a is a control circuit that controls the switching operation of the slave switch Q2. The slave switch control circuit 200a basically has the same configuration as the main switch control circuit 100, but differs in that an IL_IN terminal is provided instead of the FB terminal of the main switch control circuit 100, an IL_OUT terminal is provided instead of the COMP terminal, and a VIS terminal that is not connected to anything is provided instead of the IL_OUT terminal.
[0042] The IL_IN terminal of the slave switch control circuit 200a is connected to resistors R9 and R10 and a capacitor C11. The resistor R9 is provided between the IL_IN terminal and the IL_OUT terminal of the main switch control circuit 100, and the interleaved signal is divided by the resistors R9 and R10 and input to the IL_IN terminal.
[0043] The slave switch control circuit 200a determines whether to stop the slave switch control circuit 200a based on the interleaved input signal IL_IN (a signal obtained by dividing the interleaved signal IL_OUT by resistors R9 and R10) when the interleaved signal IL_OUT is input to the slave switch control circuit 200a. Specifically, when the high-level voltage value of the interleaved input signal IL_IN is greater than a predetermined interleaved signal detection threshold voltage VIL_IN1, the slave converter 30 performs normal interleaving operation, and when the high-level voltage value of the interleaved input signal IL_IN is less than the predetermined interleaved signal detection threshold voltage VIL_IN1, the slave converter 30 stops the interleaved operation. When the interleaved operation is stopped, the slave converter 30 does not output the gate output voltage OUT or the interleaved signal (see the follower gate output voltage OUT and interleaved signal IL_OUT in FIG. 3).
[0044] (3) Configuration of the Slave Converter 40 and the Slave Switch Control Circuit 200b The slave converter 40 includes an inductor L3, an auxiliary winding L6, a slave switch Q3, a diode D3, and a slave switch control circuit 200b, and the inductor L3, the slave switch Q3, and the diode D3 form a step-up chopper circuit. The slave converter 40 and the slave switch control circuit 200b have the same configuration as the slave converter 30 and the slave switch control circuit 200a, except that the IL_OUT terminal that outputs the interleaved signal is not connected.
[0045] The slave switch control circuit 200b determines whether or not to stop the slave switch control circuit 200b based on the interleaved input signal IL_IN (a signal obtained by dividing the interleaved signal IL_OUT by resistors R14 and R15) when the interleaved signal IL_OUT is input to the slave switch control circuit 200b.
[0046] Specifically, when the high-level voltage value of the interleaved input signal IL_IN is greater than a predetermined interleaved signal detection threshold voltage, the secondary converter 40 performs normal interleaving operation, and when the high-level voltage value of the interleaved input signal IL_IN is less than the predetermined interleaved signal detection threshold voltage, the secondary converter 40 stops interleaving operation. Note that the interleaved signal detection threshold voltage of the secondary switch control circuit 200b may be the same as or different from the interleaved signal detection threshold voltage VIL_IN1 of the secondary switch control circuit 200a.
[0047] 2. Operation of the Control Circuit 100 and the Interleaved Power Supply 1 According to the First Embodiment Next, the operation of the control circuit 100 and the interleaved power supply 1 according to the first embodiment will be described with reference to Fig. 3. For the sake of simplicity, the description will be limited to the main converter 20 (leader) and the slave converter 30 (follower).
[0048] (1) Heavy Load State When the COMP voltage of the leader exceeds the load state determination threshold voltage Vcomp1 (see COMP voltage in FIG. 3(a)), the load state determination unit 120 determines that the load state is heavy. When the COMP voltage is constant, the gate output voltage OUT is turned on and off at a constant cycle. When the COMP voltage drops, the on width of the gate output voltage OUT and the interleaved signal IL_OUT becomes shorter in accordance with the voltage value of the COMP voltage.
[0049] The period of the interleave signal IL_OUT is synchronized with the gate output voltage OUT. The high level voltage value is VIL1.
[0050] In the first embodiment, the interleaved signal IL_OUT output from the reader is divided by a voltage divider circuit formed by resistors R9 and R10 of the slave converter 30 in Fig. 1 and input via the IL_IN terminal of the slave switch control circuit 200a. Therefore, the high-level voltage value of the interleaved input signal IL_IN is VIL1_D (see Fig. 3(b)).
[0051] In a heavy load state, the high-level voltage value VIL_D of the interleaved input signal IL_IN is greater than the interleaved signal detection threshold voltage VIL_IN1, and the follower (secondary converter 30) continues the interleaved operation.
[0052] The follower's gate output voltage OUT rises when the interleaved input signal IL_IN turns off, remains on for the same period as the interleaved input signal IL_IN was on, and then falls. Therefore, the cycle is shifted, and interleaving operation is performed. The follower also generates an interleaved signal IL_OUT and outputs the interleaved signal IL_OUT to the downstream secondary converter 40.
[0053] (2) Light Load State When the COMP voltage of the leader falls below the load state determination threshold voltage Vcomp1 and does not exceed the load state determination threshold voltage Vcomp2 even in the recovery stage (see COMP voltage in Figure 3(a)), the load state determination unit 120 determines that the load state is light. During this time, the gate output voltage OUT is repeatedly turned on and off at a predetermined cycle, although the on-width is shorter than in the case of a heavy load. Note that the load state determination threshold voltage Vcomp2 is higher than the load state determination threshold voltage Vcomp1.
[0054] The interleave signal IL_OUT is synchronized with the gate output voltage OUT. The interleave signal generator 170 outputs to the slave switch control circuit 200a, as information indicating whether or not to stop the slave switch control circuit 200a, an interleave signal that has been adjusted so that the high-level voltage value when it is determined that the load is light is lower than the high-level voltage value when it is determined that the load is heavy.
[0055] That is, in a light load state, the interleaved signal IL_OUT is output to the follower, the interleaved signal IL_OUT being adjusted so that the high level voltage value becomes VIL2, which is lower than VIL1 when a heavy load state is determined.
[0056] As in the case of a heavy load state, the interleaved signal IL_OUT output from the leader is divided by a voltage divider circuit formed by resistors R9 and R10 of the slave converter 30 and input via the IL_IN terminal of the slave switch control circuit 200a. Therefore, the high-level voltage value of the interleaved input signal IL_IN is divided, and the high-level voltage value becomes VIL2_D (see FIG. 3(b)).
[0057] In a light load state, the high-level voltage value VI2_D of the interleaved input signal IL_IN becomes smaller than the interleaved signal detection threshold voltage VIL_IN1. Therefore, in the follower (sub-converter 30), the gate output voltage OUT becomes low, and the follower stops interleaving. Furthermore, the interleaved signal IL_OUT becomes low, and the interleaved operation of the subsequent sub-converters (followers, sub-converter 40 in the first embodiment) also stops.
[0058] (3) Heavy Load State When the leader's COMP voltage rises again and becomes equal to or greater than the load state determination threshold voltage Vcomp2, the load state determination unit 120 determines that the state is heavy loaded. The operation is the same as in the above (1) heavy load state, and the follower resumes interleaving operation.
[0059] 3. Effects of the Control Circuit 100 and Interleaved Power Supply 1 of Embodiment 1 According to the control circuit 100 and interleaved power supply 1 of embodiment 1, the interleaved signal generator 170 outputs an interleaved signal to the slave switch control circuit 200a (slave converter 30) based on load state information and control signal output information, the interleaved signal including information on whether to stop the slave switch control circuits 200a and 200b that control the switching operation of the slave switches Q2 and Q3. This eliminates the need for a terminal in the control circuit 100 to send an automatic stop signal to the slave switch control circuit 200a. This prevents problems such as an increase in the number of terminals in the control circuit 100 of the main converter 20, which increases the size, or a need for design changes due to an increase in the number of terminals. Even in cases where multiple slave converters are provided and each converter has its own internal control circuit, it is possible to determine whether to stop the slave converters 30 and 40 based on the interleaved signal, eliminating the need for additional terminals for transmitting the automatic stop signal between adjacent converters. This eliminates the need to increase the number of terminals in the slave switch control circuits 200a and 200b.
[0060] Furthermore, with the control circuit 100 and interleaved power supply 1 according to the first embodiment, the load state determination unit 120 generates load state information based on the error amplifier output voltage (COMP voltage) generated by a voltage based on the output voltage and outputs the information to the interleaved signal generation unit 170, so that the load state can be determined without depending on the cycle of the AC power supply. Therefore, it is possible to prevent the secondary converter from unintentionally stopping despite a heavy load, as would be the case when the load state is monitored based on input-side information (e.g., inductor current, input voltage, input current, etc.), and it is possible to provide a control circuit that monitors the load without depending on the cycle of the AC power supply.
[0061] Furthermore, according to the control circuit 100 and interleaved power supply 1 of the first embodiment, the load state determination unit 120 determines the load state based on the error amplifier output voltage (COMP voltage) generated by a voltage based on the output voltage, and outputs the determined load state information to the interleave signal generation unit 170. The interleave signal generation unit 170 outputs an interleave signal to the slave switch control circuit 200a, including information on whether or not to stop the slave switch control circuits 200a, 200b that control the switching operations of the slave switches Q2, Q3, based on the load state information and the control signal output information. Therefore, the error amplifier output voltage (COMP voltage), which has conventionally been used to correct the on-width, can be used to determine whether or not to stop the slave switch control circuits 200a, 200b. Therefore, no new components or wiring are required to obtain information on the output side, and the circuit configuration can be prevented from becoming complicated.
[0062] Furthermore, with the control circuit 100 and interleaved power supply 1 according to the first embodiment, the interleave signal generator 170 outputs an interleave signal to the slave switch control circuit 200a, including information on whether to stop the slave switch control circuits 200a and 200b, which control the switching operation of the slave switches Q2 and Q3, based on the load state information and the control signal output information. Therefore, even when it is not desirable to stop the slave converters 30 and 40, such as when ripple reduction is required even under light load conditions or when the load suddenly changes from light to heavy, it is possible to easily switch whether the slave converters 30 and 40 are stopped by adjusting the interleave signal. Furthermore, no circuit is required to switch whether the slave converters 30 and 40 are stopped, and the number of terminals of the control circuit 100 of the main converter 20 is not increased. Therefore, whether the slave converters are stopped under light load conditions can be easily switched without increasing the number of terminals of the control circuit 100 of the main converter.
[0063] Furthermore, according to the control circuit 100 and interleaved power supply 1 of embodiment 1, the interleaved signal generating unit 170 outputs an interleaved signal with an adjusted high-level voltage value during light load to the slave switch control circuits 200a, 200b as information on whether or not to stop the slave switch control circuits 200a, 200b. Therefore, it is possible to communicate that the interleaved operation of the slave converter should be stopped by changing the high-level voltage value of the interleaved signal without increasing the number of terminals of the control circuit 100 of the main converter 20.
[0064] Furthermore, according to the control circuit 100 and interleaved power supply 1 of embodiment 1, the interleaved signal generating unit 170 outputs to the slave switch control circuits 200a, 200b, as information as to whether or not to stop the slave switch control circuits 200a, 200b, an interleaved signal in which the high-level voltage value during light load is adjusted to be a voltage value lower than the high-level voltage value during heavy load. Therefore, it is possible to easily communicate to the slave converters 30, 40 whether or not to stop the interleaved operation by simply keeping the high-level voltage value low.
[0065] However, when the interleaved operation of the secondary converters 30, 40 stops, the COMP voltage rises due to an increase in the load on the main converter 20, making it difficult to accurately determine the load state, and there is a risk that the suspension of the followers will be unintentionally released. In contrast, with the control circuit 100 and interleaved power supply 1 according to the first embodiment, the load state determination threshold voltage Vcomp2 when the error amplifier output voltage is increasing is greater than the load state determination threshold voltage Vcomp1 when the error amplifier output voltage is decreasing. Therefore, even when the interleaved operation of the secondary converters 30, 40 stops and the COMP voltage rises due to an increase in the load on the main converter 20, the load state determiner 120 can determine the load state with high accuracy, and it is possible to prevent the suspension of the followers from being unintentionally released.
[0066] According to the interleaved power supply 1 of embodiment 1, the secondary converters 30 and 40 have voltage divider circuits (resistors R9 and R10, resistors R14 and R15) that divide the interleaved signal IL_OUT, and therefore it is possible to adjust whether or not to stop the secondary switch control circuit that controls the switching operation of the secondary switch.
[0067] The interleaved power supply 1 according to the first embodiment is provided with a plurality of secondary converters, and at least one of the secondary converters (two in the first embodiment) has a voltage divider circuit that divides the interleaved signal, so that it is possible to select whether or not to automatically stop the follower.
[0068] Furthermore, according to the interleaved power supply 1 of embodiment 1, since VIL1_D>VIL_IN1 and VIL2_D<VIL_IN1 are satisfied, the interleaved operation of the secondary converters 30 and 40 can be stopped simply by changing the high-level voltage value of the interleaved signal IL_OUT between heavy load and light load.
[0069] [Modification 1] The control circuit and interleaved power supply 2 according to Modification 1 basically have the same configuration as the control circuit 100 and interleaved power supply 1 according to embodiment 1, but differ from the control circuit 100 and interleaved power supply 1 according to embodiment 1 in that the secondary converters are not automatically stopped. As shown in Figure 4, the secondary converters 30, 40 of the interleaved power supply 2 according to Modification 1 do not have the resistors R10, R15 that were present in embodiment 1, and do not have a voltage divider circuit.
[0070] (1) Heavy Load State The control circuit and interleaved power supply 2 according to the first modification basically operate in the same manner as in the first embodiment, but the interleaved signal IL_OUT output from the leader is not voltage-divided. Therefore, the high-level voltage value of the interleaved input signal IL_IN input to the follower is VIL1 (see FIGS. 5(a) and 5(b)).
[0071] Since the high-level voltage value VIL1 of the interleaved input signal IL_IN is greater than the interleaved signal detection threshold voltage VIL_IN1, the follower (secondary converter 30) continues the interleaved operation.
[0072] (2) Light Load State Even in a light load state, the interleaved signal IL_OUT output from the leader is not voltage-divided. Therefore, the high-level voltage value of the interleaved input signal IL_IN input to the follower is VIL2.
[0073] Since the high-level voltage value VIL2 of the interleaved input signal IL_IN is greater than the interleaved signal detection threshold voltage VIL_IN1, the follower (sub-converter 30) continues the interleaved operation. In this way, by inputting the interleaved signal to the sub-converter 30 (follower) without dividing it, the sub-converter can be prevented from stopping even under light load.
[0074] As described above, the control circuit and interleaved power supply 2 according to the first modification differ from the control circuit 100 and interleaved power supply 1 according to the first embodiment in that the control circuit and the interleaved power supply 2 do not automatically stop the slave converter. However, as in the case of the control circuit 100 and the interleaved power supply 1 according to the first embodiment, the load determination unit generates load status information based on the error amplifier output voltage, which is generated by a voltage based on the output voltage, and outputs this to the interleaved signal generation unit. The interleaved signal generation unit outputs an interleaved signal, including information on whether or not to stop the slave switch control circuit that controls the switching operation of the slave switch, to the slave switch control circuit based on the load status information and the control signal output information. Therefore, (1) problems such as an increase in the number of terminals of the control circuit of the main converter, which increases the size, or an increase in the number of terminals, which requires a change in design, are unlikely to occur. (2) It is possible to monitor the load independently of the cycle of the AC power supply. (3) No new components or wiring are required to obtain information on the output side, so the circuit configuration is unlikely to become complicated. (4) A control circuit is provided that can easily switch whether or not the slave converter is stopped under a light load without increasing the number of terminals of the control circuit of the main converter.
[0075] Furthermore, with the control circuit 100 and interleaved power supply 2 according to the first modification, since VIL1>VIL2>VIL_IN1 is satisfied, it is possible to prevent the secondary converter from being stopped even under a light load.
[0076] Furthermore, as can be seen from the first embodiment and the first modification, by satisfying VIL1>VIL2>VIL_IN1, VIL1_D>VIL_IN1, and VIL2_D<VIL_IN1, not only can it be selected whether or not to maintain the interleaved operation of the secondary converters in a light load state, but it can also be determined whether or not to maintain the interleaved operation in a light load state by a relatively simple change of whether or not to incorporate voltage division. Therefore, the control circuit is highly versatile.
[0077] In addition, the control circuit 100 and interleaved power supply 2 of variant example 1 have the same configuration as the control circuit 100 and interleaved power supply 1 of embodiment 1 except that they do not automatically stop the secondary converter, and therefore have the relevant effects of the control circuit 100 and interleaved power supply 1 of embodiment 1.
[0078] [Embodiment 2] The control circuit and interleaved power supply of embodiment 2 basically have the same configuration as the control circuit 100 and interleaved power supply 1 of embodiment 1, but differ from the control circuit 100 and interleaved power supply 1 of embodiment 1 in that the high-level voltage value of the interleaved signal in a light load state is higher than the high-level voltage value in a heavy load state.
[0079] 4, the circuit configuration of the control circuit and interleaved power supply (not shown) according to the second embodiment is similar to that of the interleaved power supply 2 according to the first modification. That is, the secondary converters 30 and 40 do not have a voltage dividing circuit.
[0080] In the follower, an interleave signal detection threshold voltage VIL_IN1 and an interleave operation stop threshold voltage VIL_IN1_stop are provided for the interleave input signal IL_IN, and whether or not to stop the slave switch control circuit is determined depending on whether the high-level voltage value of the interleave input signal IL_IN is within the range from a predetermined interleave signal detection threshold voltage VIL_IN1 to a predetermined interleave operation stop threshold voltage VIL_IN1_stop.
[0081] (1) Heavy Load State The control circuit and interleaved power supply according to the second embodiment basically operate in the same manner as in the first embodiment, but the high-level voltage value of the interleaved signal IL_OUT is VIL1. Since no voltage division is performed, the high-level voltage value of the interleaved input signal input to the follower remains VIL1 (see FIGS. 6(a) and 6(b)).
[0082] Since the high-level voltage value VIL1 of the interleaved input signal IL_IN is within the range from the interleaved signal detection threshold voltage VIL_IN1 to the predetermined interleaved operation stop threshold voltage VIL_IN1_stop, the follower maintains the interleaved operation, i.e., outputs the gate output voltage OUT and also outputs the interleaved signal to the next-stage converter.
[0083] (2) Light Load State Even in a light load state, the interleaved signal IL_OUT output from the leader is not voltage-divided. Therefore, the high-level voltage value of the interleaved input signal IL_IN input to the follower is VIL2.
[0084] Since the high-level voltage value VIL2 of the interleaved input signal IL_IN is greater than the interleaved operation stop threshold voltage VIL_IN1_stop, the follower (sub-converter 30) stops the interleaved operation. That is, the gate output voltage OUT becomes low level, and the output of the interleaved signal to the next-stage converter is stopped.
[0085] As described above, the control circuit and interleaved power supply according to the second embodiment differ from the control circuit 100 and interleaved power supply 1 according to the first embodiment in that the high-level voltage value of the interleaved signal in a light load state is higher than the high-level voltage value in a heavy load state. However, like the control circuit 100 and interleaved power supply 1 according to the first embodiment, (1) it is less likely to cause problems such as an increase in the number of terminals of the control circuit of the main converter, resulting in an increase in size, or an increase in the number of terminals, which would require a change in design; (2) it is possible to monitor the load independently of the cycle of the AC power supply; (3) it does not require new components or wiring to obtain information on the output side, so the circuit configuration is less likely to become complicated; and (4) it is a control circuit that can easily switch whether or not the sub-converter is stopped under a light load without increasing the number of terminals of the control circuit of the main converter.
[0086] Furthermore, according to the control circuit and interleaved power supply of the second embodiment, the interleaved signal generating unit 170 outputs to the slave switch control circuit 200a, as information as to whether or not to stop the slave switch control circuits 200a, 200b, an interleaved signal adjusted so that the high level voltage value VIL2 when it is determined that the load is light is higher than the high level voltage value VIL1 when it is determined that the load is heavy, and therefore it is possible to stop the interleaved operation of the follower in a light load state without a voltage divider circuit.
[0087] In addition, the control circuit and interleaved power supply of embodiment 2 have the same configuration as the control circuit 100 and interleaved power supply 1 of embodiment 1, except that the high-level voltage value of the interleaved signal in a light load state is higher than the high-level voltage value in a heavy load state, and therefore have the relevant effects of the control circuit 100 and interleaved power supply 1 of embodiment 1.
[0088] [Modification 2] The control circuit and interleaved power supply according to Modification 2 basically have the same configuration as the control circuit and interleaved power supply according to embodiment 2, but differs from the control circuit and interleaved power supply according to embodiment 2 in that it does not automatically stop the secondary converters. The secondary converters 30 and 40 of the interleaved power supply according to Modification 2 have voltage divider circuits, similar to the case of the interleaved power supply 1 according to embodiment 1 shown in FIG.
[0089] (1) Heavy Load State When a heavy load state is determined, the high-level voltage value of the interleaved signal IL_OUT output from the leader is VIL1 (see FIGS. 7(a) and 7(b)). In Modification 2, the interleaved input signal IL_IN is voltage-divided, so the high-level voltage value of the interleaved input signal IL_IN input to the follower is VIL1_D (see FIG. 7(b)).
[0090] Since the high-level voltage value VIL1_D of the interleaved input signal IL_IN is greater than the interleaved signal detection threshold voltage VIL_IN1 and less than the interleaved operation stop threshold voltage VIL_IN1_stop, the follower (secondary converter 30) continues the interleaved operation.
[0091] (2) Light Load State Even in a light load state, the interleaved signal IL_OUT output from the leader is voltage divided. Therefore, the high-level voltage value of the interleaved input signal IL_IN input to the follower is VIL2_D.
[0092] Since the high-level voltage value VIL2_D of the interleaved input signal IL_IN is greater than the interleaved signal detection threshold voltage VIL_IN1 and less than the interleaved operation stop threshold voltage VIL_IN1_stop, the follower (sub-converter 30) continues the interleaved operation. In this way, by dividing the interleaved signal in the sub-converter 30 (follower), it is possible to prevent the sub-converter from stopping even under light load.
[0093] As described above, the control circuit and interleaved power supply according to the second modification differ from those according to the second embodiment in that they do not automatically stop the slave converter. However, like the control circuit and interleaved power supply according to the first embodiment, (1) they are less likely to cause problems such as an increase in the number of terminals of the control circuit of the main converter, resulting in an increase in size, or an increase in the number of terminals, which would require a change in design; (2) they are capable of monitoring the load independently of the cycle of the AC power supply; (3) they do not require new components or wiring to obtain information on the output side, so the circuit configuration is less likely to become complicated; and (4) they are a control circuit that can easily switch whether or not the slave converter stops under light load without increasing the number of terminals of the control circuit of the main converter.
[0094] Furthermore, with the control circuit and interleaved power supply according to the second modification, since VIL_IN1_stop>VIL1_D>VIL_IN1 and VIL_IN1_stop>VIL2_D>VIL_IN1 are satisfied, the secondary converter is not stopped even under light load.
[0095] Furthermore, as can be seen from the second embodiment and the second modification, by satisfying VIL1>VIL_IN1_stop>VIL2>VIL_IN1, and also satisfying VIL_IN1_stop>VIL1_D>VIL_IN1 and VIL_IN1_stop>VIL2_D>VIL_IN1, not only can it be selected whether or not to maintain the interleaved operation of the secondary converter in a light load state, but also it can be determined whether or not to maintain the interleaved operation in a light load state by a relatively simple change of whether or not to incorporate a voltage divider circuit into the converter. Therefore, the control circuit is highly versatile.
[0096] In addition, the control circuit and interleaved power supply of variant example 2 have the same configuration as the control circuit and interleaved power supply of embodiment 2 except that they do not automatically stop the secondary converter, and therefore have the relevant effects of the control circuit and interleaved power supply of embodiment 2.
[0097] [Embodiment 3] The control circuit and interleaved power supply of embodiment 3 basically have the same configuration as the control circuit 100 and interleaved power supply 1 of embodiment 1, but differ from the control circuit 100 and interleaved power supply 1 of embodiment 1 in that three load states are provided in the load state determination.
[0098] The circuit configuration of the control circuit and the interleaved power supply (not shown) according to the third embodiment is the same as that shown in Fig. 1. That is, the secondary converters 30 and 40 are provided with voltage dividing circuits.
[0099] The load condition determination unit 120 of the follower has four load condition determination threshold voltages Vcomp1, Vcomp2, Vcomp3, and Vcomp4 for the error amplifier output voltage (COMP voltage) (see FIG. 8A). The load condition determination threshold voltages Vcomp1 and Vcomp3 are threshold voltages for determining the load condition when the COMP voltage is small, and the load condition determination threshold voltages Vcomp2 and Vcomp4 are threshold voltages for determining the load condition when the COMP voltage is large.
[0100] The magnitude relationship among the load state determination threshold voltages Vcomp1, Vcomp2, Vcomp3, and Vcomp4 is Vcomp1<Vcomp2<Vcomp3<Vcomp4.
[0101] When the COMP voltage decreases and exceeds Vcomp3, it is determined to be in a heavy load state, and when it is equal to or less than Vcomp3 and exceeds Vcomp1, it is determined to be in a light load state 2. When the COMP voltage becomes equal to or less than Vcomp1 and begins to recover but is less than Vcomp2, it is determined to be in a light load state 1. Furthermore, when the COMP voltage increases and is equal to or greater than Vcomp2 and less than Vcomp4, it is determined to be in a light load state 2, and when it is equal to or greater than Vcomp4, it is determined to be in a heavy load state.
[0102] In the third embodiment, the high-level voltage value of the interleaved signal is changed depending on the load state. That is, the high-level voltage value of the interleaved signal is VIL1 in a heavy load state, VIL3 in a light load state 2, and VIL2 in a light load state 1. The magnitude relationship between the voltage values is VIL1>VIL3>VIL2.
[0103] The slave switch control circuit (follower) is provided with a first interleaved signal detection threshold voltage VIL_IN1 and a second interleaved signal detection threshold voltage VIL_IN2 lower than the first interleaved signal detection threshold voltage VIL_IN1 (see FIG. 9).
[0104] When the interleave input signal IL_IN is equal to or greater than the first interleave signal detection threshold voltage VIL_IN1, the interleave operation continues and an interleave signal whose high-level voltage value is the same as the high-level voltage value of the interleave signal IL_OUT output from the reader is output. When the interleave input signal IL_IN is smaller than the first interleave signal detection threshold voltage VIL_IN1 and equal to or greater than the second interleave signal detection threshold voltage VIL_IN2, the interleave operation continues, but an interleave signal whose high-level voltage value is lower than the high-level voltage value of the interleave signal IL_OUT output from the reader is output. When the interleave input signal IL_IN is smaller than the second interleave signal detection threshold voltage VIL_IN2, the interleave operation stops.
[0105] (1) Heavy load state The high level voltage value of the interleaved signal IL_OUT output from the leader is VIL1, and since the slave converter 30 is provided with a voltage divider circuit, the high level voltage value of the interleaved input signal IL_IN input to the follower is VIL1_D (see Figures 9 and 10(a)).
[0106] Because the high-level voltage value VIL1_D of the interleaved input signal IL_IN exceeds the first interleaved signal detection threshold voltage VIL_IN1, the secondary converter 30 continues the interleaving operation and outputs to the secondary converter 40 a voltage value VIL_OUT1 at the same level as the high-level voltage value of the interleaved signal IL_OUT output from the leader.
[0107] In follower 2 (sub-converter 40), the high-level voltage value of the interleaved signal IL_OUT output from follower 1 becomes VIL_OUT1 (see FIG. 10). This is then divided and input, so the high-level voltage value of the interleaved input signal IL_IN of follower 2 becomes VIL_OUT1_D (see FIG. 10(b)).
[0108] Since the value of VIL_OUT1_D exceeds the first interleaved signal detection threshold voltage VIL_IN1, the secondary converter 40 continues the interleaved operation and outputs to the secondary converter 40 a voltage value VIL_OUT1 at the same level as the high-level voltage value of the interleaved signal IL_OUT output from the leader.
[0109] (2) Light Load State 2 In the light load state, the high level voltage value of the interleaved signal IL_OUT output from the leader is VIL3, and since the secondary converter 30 in embodiment 3 is provided with a voltage divider circuit, the high level voltage value of the interleaved input signal VIL_IN input to the follower becomes VIL3_D (see Figures 9 and 10(a)).
[0110] The high-level voltage value VIL3_D of the interleaved input signal IL_IN is equal to or lower than the first interleaved signal detection threshold voltage VIL_IN1 and equal to or higher than the second interleaved signal detection threshold voltage VIL_IN2. In this case, the secondary converter 30 continues the interleaving operation and outputs to the secondary converter 40 an interleaved signal IL_OUT having a high-level voltage value VIL_OUT2 that is lower than the high-level voltage value of the interleaved signal IL_OUT output from the leader (see FIG. 11(a)).
[0111] In follower 2 (secondary converter 40), the interleaved signal IL_OUT output from follower 1 is divided and input, so the high-level voltage value of the interleaved input signal of follower 2 becomes VIL_OUT2_D (see Figure 11 (b)).
[0112] Since the high level voltage value VIL_OUT2_D of the interleaved input signal of follower 2 is lower than the first interleaved signal detection threshold voltages VIL_IN1 and VIL_IN2 of follower 2, the interleaving operation of follower 2 stops.
[0113] Therefore, in the light load state 2, the main converter 20 and the secondary converter 30 can be operated, and some of the secondary converters (secondary converter 40) can be stopped.
[0114] (3) Light Load State 1 In the light load state 1, the high level voltage value of the interleaved signal IL_OUT output from the leader is VIL2. In the third embodiment, since the secondary converter 30 is provided with a voltage divider circuit, the high level voltage value of the interleaved input signal IL_IN input to the follower 1 is VIL2_D (see FIGS. 9 and 10(a)).
[0115] The voltage value VIL2_D falls below the first interleaved signal detection threshold voltage VIL_IN1 and the second interleaved signal detection threshold voltage VIL_IN2. In this case, the gate output voltage OUT and the interleaved signal IL_OUT of the secondary converter 30 become low level, and the interleaving operation stops (see FIG. 11(b)).
[0116] In follower 2 (sub-converter 40), the interleave signal IL_OUT is not output from follower 1, so follower 2 is not turned on.
[0117] Therefore, in the light load state 2, only the main converter 20 is operated and all the sub-converters are stopped.
[0118] As described above, the control circuit and interleaved power supply according to the third embodiment differ from the control circuit 100 and interleaved power supply 1 according to the first embodiment in that three load states are provided in the load state determination. However, as in the case of the control circuit 100 and interleaved power supply 1 according to the first embodiment, the load determination unit generates load state information based on the error amplifier output voltage, which is generated by a voltage based on the output voltage, and outputs this to the interleaved signal generation unit. The interleaved signal generation unit outputs an interleaved signal, including information on whether or not to stop the slave switch control circuit that controls the switching operation of the slave switch, to the slave switch control circuit based on the load state information and the control signal output information. Therefore, (1) problems such as an increase in the number of terminals of the control circuit of the main converter, which results in an increase in size, or an increase in the number of terminals, which results in the need for design changes, are unlikely to occur. (2) It is possible to monitor the load independently of the cycle of the AC power supply. (3) No new components or wiring are required to obtain information on the output side, so the circuit configuration is unlikely to become complicated. (4) A control circuit is provided that can easily switch whether or not the slave converter is stopped under a light load without increasing the number of terminals of the control circuit of the main converter.
[0119] According to the control circuit and interleaved power supply of embodiment 3, by adopting the above-mentioned configuration, all of the secondary converters can be stopped in light load state 1, and in light load state 2, all or a predetermined number of the secondary converters among the multiple secondary converters can be stopped.
[0120] In addition, the control circuit and interleaved power supply of embodiment 3 have the same configuration as the control circuit 100 and interleaved power supply 1 of embodiment 1 except for the fact that they provide three load states in the load state determination, and therefore have the relevant effects of the control circuit 100 and interleaved power supply 1 of embodiment 1.
[0121] [Variant 3] The control circuit and interleaved power supply of variant 3 basically have the same configuration as the control circuit and interleaved power supply of embodiment 3, but differ from the control circuit and interleaved power supply of embodiment 3 in that it does not automatically stop the secondary converter.
[0122] The circuit configuration of the control circuit and interleaved power supply 3 according to the third modification is the same as the circuit configuration in FIG. 4, in that no voltage dividing circuit is formed in either of the secondary converters 30 and 40.
[0123] In a heavy load state, the high level voltage value of the interleaved signal IL_OUT output from the reader is VIL1, in a light load state 2 it is VIL3, and in a light load state 1 it is VIL2. The magnitude relationship between the respective voltage values is VIL1>VIL3>VIL2 (see FIG. 12).
[0124] In Modification 3, neither the secondary converters 30 nor 40 has a voltage divider circuit, so the interleaved input signal IL_IN input to the secondary converter 30 is the same as the interleaved output signal. The high-level voltage values VIL1, VIL3, and VIL2 of the interleaved input signal IL_IN are all higher than the first interleaved signal detection threshold voltage VIL_IN1 and the second interleaved signal detection threshold voltage VIL_IN2. Therefore, the secondary converter 30 continues interleaving operation regardless of the load state (see FIGS. 12 and 13).
[0125] Furthermore, since the voltage values VIL1, VIL3, and VIL2 are all higher than the first interleaved signal detection threshold voltage VIL_IN1 and the second interleaved signal detection threshold voltage VIL_IN2, the high-level voltage values of the interleaved signals output to the secondary converter 40 are all voltage values close to the voltage value VIL1. Therefore, the secondary converter 40 (and any secondary converters connected thereto) also continues the interleaved operation.
[0126] As described above, the control circuit and interleaved power supply according to Modification 3 differ from the control circuit and interleaved power supply according to Embodiment 3 in that the control circuit and interleaved power supply do not automatically stop the slave converter. However, as in the case of the control circuit and interleaved power supply according to Embodiment 3, the load determination unit generates load status information based on the error amplifier output voltage, which is generated by a voltage based on the output voltage, and outputs this to the interleaved signal generation unit. The interleaved signal generation unit outputs an interleaved signal, including information on whether or not to stop the slave switch control circuit that controls the switching operation of the slave switch, to the slave switch control circuit based on the load status information and the control signal output information. Therefore, (1) problems such as an increase in the number of terminals of the control circuit of the main converter, resulting in an increase in size, or an increase in the number of terminals, which requires a change in design, are unlikely to occur, (2) it is possible to monitor the load independently of the cycle of the AC power supply, (3) new components and wiring are not required to obtain information on the output side, and the circuit configuration is unlikely to become complicated, and (4) a control circuit is provided that can easily switch whether or not the slave converter is stopped under light load without increasing the number of terminals of the control circuit of the main converter.
[0127] The control circuit and interleaved power supply according to the third modification can maintain interleaved operation regardless of the load state by adopting the above-described configuration.
[0128] In addition, the control circuit and interleaved power supply of variant example 3 have the same configuration as the control circuit and interleaved power supply of embodiment 3 except that they do not automatically stop the secondary converter, and therefore have the relevant effects of the control circuit and interleaved power supply of embodiment 3.
[0129] [Embodiment 4] The control circuit and interleaved power supply 3 of embodiment 4 basically have the same configuration as the control circuit and interleaved power supply of embodiment 3, but differs from the control circuit and interleaved power supply of embodiment 3 in that the secondary converter 30 performs an automatic stop function for interleaved operation, while the secondary converter 40 does not perform an automatic stop function for interleaved operation.
[0130] In the interleaved power supply 3 according to the third embodiment, the secondary converter 30 has a voltage dividing circuit formed by resistors R9 and R10, while the secondary converter 40 does not have a voltage dividing circuit (see FIG. 14).
[0131] (1) Heavy Load State As in the case of the third embodiment, the high-level voltage value of the interleaved signal IL_OUT output from the leader is VIL1. In the fourth embodiment, since the secondary converter 30 has a voltage divider circuit, the high-level voltage value of the interleaved input signal IL_IN input to the follower 1 (second stage) is VIL1_D (see FIG. 15).
[0132] The voltage value VIL1_D is higher than the first interleaved signal detection threshold voltage VIL_IN1. Therefore, follower 1 continues the interleaving operation and outputs to follower 2 an interleaved signal IL_OUT having a high-level voltage value VIL_OUT1, which is the same as the high-level voltage value of the leader's interleaved signal IL_OUT (see FIG. 16(a)).
[0133] In the fourth embodiment, since the secondary converter 40 does not have a voltage divider circuit, the high-level voltage value of the interleaved input signal IL_IN input to the follower 2 (third stage) remains VIL_OUT1. Since the voltage value VIL_OUT1 is higher than the first interleaved signal detection threshold voltage VIL_IN1, the follower 1 continues the interleaved operation. If a fourth-stage follower 3 were provided, it would output an interleaved signal IL_OUT with a high-level voltage value VIL_OUT1 that is the same as the high-level voltage value of the leader's interleaved signal IL_OUT.
[0134] (2) Light Load State 2 As in the case of the third embodiment, the high-level voltage value of the interleaved signal IL_OUT output from the leader is VIL3. In the fourth embodiment, since the secondary converter 30 has a voltage divider circuit, the high-level voltage value of the interleaved input signal IL_IN input to the follower 1 (second stage) is VIL3_D (see FIG. 15).
[0135] The voltage value VIL3_D is higher than the first interleaved signal detection threshold voltage VIL_IN1. Therefore, follower 1 continues the interleaving operation and outputs to follower 2 an interleaved signal IL_OUT having a high-level voltage value VIL_OUT1, which is the same as the high-level voltage value of the leader's interleaved signal IL_OUT (see FIG. 16(b)).
[0136] In the fourth embodiment, since the secondary converter 40 does not have a voltage divider circuit, the high-level voltage value of the interleaved input signal IL_IN input to the follower 2 (third stage) remains VIL_OUT1. Since the voltage value VIL_OUT1 is higher than the first interleaved signal detection threshold voltage VIL_IN1, the follower 1 continues the interleaving operation. If a fourth-stage follower 3 were provided, the follower 3 would output an interleaved signal IL_OUT with a high-level voltage value VIL_OUT1 that is the same as the high-level voltage value of the leader's interleaved signal IL_OUT.
[0137] (3) Light Load State 1 As in the case of the third embodiment, the high-level voltage value of the interleaved signal IL_OUT output from the leader is VIL2. In the fourth embodiment, since the secondary converter 30 has a voltage divider circuit, the high-level voltage value of the interleaved input signal IL_IN input to the follower 1 (second stage) is VIL2_D (see FIG. 15).
[0138] The voltage value VIL2_D is lower than the second interleaved signal detection threshold voltage VIL_IN2, so the follower 1 stops the interleaving operation and does not output the interleaved signal IL_OUT (see FIG. 16(c)).
[0139] Since no interleave signal is output to follower 2 (third stage), follower 2 also stops the interleave operation.
[0140] Therefore, in the heavy load state and the light load state 2, all the converters are operated, but in the light load state 1, only the main converter (leader) can be operated.
[0141] Thus, the control circuit and interleaved power supply of embodiment 4 differs from the control circuit and interleaved power supply of embodiment 3 in that the slave converter 30 performs an automatic stopping function of the interleaved operation, but the slave converter 40 does not perform an automatic stopping function of the interleaved operation. However, like the control circuit and interleaved power supply of embodiment 3, (1) it is less likely to cause problems such as an increase in the number of terminals of the control circuit of the main converter, resulting in an increase in size, or an increase in the number of terminals, which would require a design change; (2) it is possible to monitor the load independently of the cycle of the AC power supply; (3) no new components or wiring are required to obtain information on the output side, so the circuit configuration is less likely to become complicated; and (4) it is a control circuit that can easily switch whether or not the slave converter is stopped under light load without increasing the number of terminals of the control circuit of the main converter.
[0142] Furthermore, with the control circuit and interleaved power supply of embodiment 4, as configured as described above, in the light load state 1, only the main converter operates and the sub converters are automatically stopped, and in the heavy load state and light load state 2, all converters can be made to operate in an interleaved manner.
[0143] In addition, the control circuit and interleaved power supply of embodiment 4 have the same configuration as the control circuit and interleaved power supply of embodiment 3, except that the secondary converter 30 performs the automatic stopping function of the interleaved operation, but the secondary converter 40 does not perform the automatic stopping function of the interleaved operation, and therefore have the corresponding effects of the control circuit and interleaved power supply of embodiment 3.
[0144] [Embodiment 5] The control circuit and interleaved power supply according to embodiment 5 basically have the same configuration as the control circuit and interleaved power supply according to embodiment 4, but the operation in light load state 2 differs from that of the control circuit and interleaved power supply according to embodiment 4. Note that the operation in heavy load state and light load state 1 is the same as that of embodiment 4, and therefore a description thereof will be omitted.
[0145] As in the case of the fourth embodiment, in the light load state 2, the high level voltage value of the interleaved signal IL_OUT output from the leader is VIL3. In the fourth embodiment, since the secondary converter 30 has a voltage divider circuit, the high level voltage value of the interleaved input signal IL_IN input to the follower 1 (second stage) is VIL3_D (see FIG. 17).
[0146] The voltage value VIL3_D is lower than the second interleaved signal detection threshold voltage VIL_IN2, so the follower 1 stops the interleaving operation and does not output the interleaved signal IL_OUT (see FIG. 18(b)).
[0147] Therefore, in the heavy load state, all the converters are operated, but in the light load state 1 and the light load state 2, only the main converter (leader) can be operated.
[0148] When the voltage value VIL3_D is higher than the second interleaved signal detection threshold voltage VIL_IN2 and lower than the first interleaved signal detection threshold voltage VIL_IN1, both follower 1 and follower 2 perform the interleaved operation.
[0149] As described above, the operation of the control circuit and interleaved power supply according to the fifth embodiment in light load state 2 is different from that of the control circuit and interleaved power supply according to the fourth embodiment. However, as in the case of the control circuit and interleaved power supply according to the fourth embodiment, the load determination unit generates load state information based on the error amplifier output voltage, which is generated by a voltage based on the output voltage, and outputs this to the interleaved signal generation unit. The interleaved signal generation unit outputs an interleaved signal, including information on whether or not to stop the slave switch control circuit that controls the switching operation of the slave switch, to the slave switch control circuit based on the load state information and the control signal output information. Therefore, (1) problems such as an increase in the number of terminals of the control circuit of the main converter, resulting in an increase in size, or an increase in the number of terminals, which requires a change in design, are unlikely to occur. (2) It is possible to monitor the load independently of the cycle of the AC power supply. (3) No new components or wiring are required to obtain information on the output side, so the circuit configuration is unlikely to become complicated. (4) A control circuit is provided that can easily switch whether or not the slave converter is stopped during a light load without increasing the number of terminals of the control circuit of the main converter.
[0150] In addition, the control circuit and interleaved power supply of embodiment 5 have the same configuration as the control circuit and interleaved power supply of embodiment 4 except for the operation in light load state 2, and therefore have the relevant effects of the control circuit and interleaved power supply of embodiment 4.
[0151] [Embodiment 6] The control circuit 101 and interleaved power supply of embodiment 6 basically have the same configuration as the control circuit 100 and interleaved power supply 1 of embodiment 1, but differ from the control circuit 100 and interleaved power supply 1 of embodiment 1 in that the load state determination threshold voltage varies depending on the input voltage.
[0152] In the first embodiment, as shown in Fig. 20(c), the load state determination threshold voltages Vcomp1 and Vcomp2 are used which are independent of the input voltage, but in the sixth embodiment, the load state determination threshold voltages Vcomp1 and Vcomp2 are adjusted based on the input voltage. Specifically, the load state determination threshold voltages Vcomp1 and Vcomp2 are adjusted to be smaller when the input voltage exceeds a predetermined input voltage threshold voltage (see Fig. 20(a)), or the load state determination threshold voltages Vcomp1 and Vcomp2 are adjusted to be linearly decreased as the input voltage increases (see Fig. 20(b)).
[0153] The load state determination unit 120 is connected to the upstream or downstream of the rectifier circuit 10 via an input voltage monitoring terminal, and receives input voltage information obtained by dividing the input voltage (see FIG. 19). Specifically, the load state determination unit 120 may be connected to two power supply lines connected from the power source AC-IN to the rectifier circuit 10, and the input voltage information may be divided from there and input to the input voltage monitoring terminal (see FIG. 21(a)), or may be connected to two power supply lines connected from the rectifier circuit 10 to the main converter 20, and the input voltage information may be divided from there and input to the input voltage monitoring terminal (see FIG. 21(b)).
[0154] As described above, the control circuit and interleaved power supply according to the sixth embodiment differ from the control circuit 100 and interleaved power supply 1 according to the first embodiment in that the load state determination threshold voltage varies depending on the input voltage. However, as in the case of the control circuit 100 and interleaved power supply 1 according to the first embodiment, the load determination unit generates load state information based on the error amplifier output voltage, which is generated by a voltage based on the output voltage, and outputs this to the interleaved signal generation unit. The interleaved signal generation unit outputs an interleaved signal, including information on whether or not to stop the slave switch control circuit that controls the switching operation of the slave switch, to the slave switch control circuit based on the load state information and the control signal output information. Therefore, (1) problems such as an increase in the number of terminals of the control circuit of the main converter, which results in an increase in size, or an increase in the number of terminals, which results in the need for design changes, are unlikely to occur. (2) It is possible to monitor the load independently of the cycle of the AC power supply. (3) No new components or wiring are required to obtain information on the output side, so the circuit configuration is unlikely to become complicated. (4) A control circuit is provided that can easily switch whether or not the slave converter is stopped under light load without increasing the number of terminals of the control circuit of the main converter.
[0155] In an interleaved power supply, even with the same on-width (COMP voltage), there is a large difference in output power between when the input voltage is high and when the input voltage is low. In contrast, with the control circuit and interleaved power supply according to the sixth embodiment, the load condition determination unit 120 adjusts the load condition determination threshold voltage based on the input voltage, so that the difference in output power (load) at which it is determined that the follower should be stopped can be reduced.
[0156] In addition, the control circuit and interleaved power supply of embodiment 6 have the same configuration as the control circuit 100 and interleaved power supply 1 of embodiment 1 except that the load state determination threshold voltage varies depending on the input voltage, and therefore have the relevant effects of the control circuit 100 and interleaved power supply 1 of embodiment 1.
[0157] Although the present invention has been described above based on the above-mentioned embodiments, the present invention is not limited to the above-mentioned embodiment 1. The present invention can be embodied in various forms without departing from the spirit of the present invention, and for example, the following modifications are also possible.
[0158] (1) The positions, connections, numbers, etc. described in the above embodiments (including each modified example; the same applies below) are examples and can be changed within the scope that does not impair the effects of the present invention.
[0159] (2) In each of the above embodiments, two stages of slave converters are provided (three stages overall), but the present invention is not limited to this. One stage of slave converters (two stages overall) may be provided, or three or more stages of slave converters (four or more stages overall) may be provided. Furthermore, when three or more stages of slave converters (four or more stages overall) are provided, the number of converters with an automatic stop function may be determined appropriately, such as by providing three or more interleaved signal detection threshold voltages in the slave converters to stop the second stage and subsequent stages, or by stopping the third stage and subsequent stages.
[0160] (3) In the above embodiments, the load state is divided into heavy load state, light load state 1, and light load state 2. However, the present invention is not limited to this. A more detailed selection such as light load state 3 and light load state 4 may be possible. In this case, the number of load state determination threshold voltages may be set to six or eight.
[0161] (4) In the first embodiment, the on-trigger is output to the gate control unit 150 from the on-trigger generation unit 130 rather than from an external device. However, the present invention is not limited to this. The main switch control circuit 100 may further include a zero current detection unit 180 that detects when the inductor current becomes zero. The on-trigger generation unit may generate an on-trigger based on the timing detected by the zero current detection unit 180 and output the on-trigger to the gate control unit 150. The gate control unit 150 may then output a control signal to the gate control unit 150 at the timing when the inductor current becomes zero based on the on-trigger (see a control circuit 100a according to a third modification, FIG. 22). In this case, the main converter 20 and the secondary converters 30 and 40 all perform current-criticality operation.
[0162] (5) In the first embodiment, the critical point of the input current of the sub-converter is detected by detecting the choke current of the inductor using an auxiliary winding arranged opposite the inductor, but the present invention is not limited to this. The critical point of the input current of the sub-converter may be detected by detecting the zero voltage point from the drain voltage of the main switch or the sub-switch.
[0163] 1, 2, 3... interleaved power supply, 20... main converter, 30, 40... sub converter, 100... main switch control circuit (leader), 200a, 200b... sub switch control circuits (followers), 120... load state determination unit, 130... on trigger generation unit, 140... on width calculation unit, 150... gate control unit, 160... drive unit, 170... interleaved signal generation unit, Q1... main switch, Q2, Q3... sub switches
Claims
1. A control circuit for controlling the switching operation of the main switch for an interleaved power supply comprising a main converter having a main switch that performs switching operation, and a slave converter having a slave switch that performs switching with a predetermined phase difference with respect to the switching operation of the main switch, and forming a master-slave relationship between the main converter and the slave converter, the control circuit comprising a load condition determination unit, an on-trigger generation unit, a gate control unit, a drive unit, and an interleave signal generation unit, the load condition determination unit determines a load condition based on an error amplifier output voltage generated by a voltage based on an output voltage, and outputs determined load condition information to the interleave signal generation unit, the on-trigger generation unit generates an on-trigger and outputs it to the gate control unit, the gate control unit outputs a control signal having an on-width calculated based on the error amplifier output voltage to the drive unit with a predetermined phase difference based on the on-trigger, and outputs control signal output information to the interleave signal generation unit, the drive unit turns the main switch on and off based on the control signal, The control circuit is characterized in that the interleave signal generating unit outputs an interleave signal including information on whether or not to stop a slave switch control circuit that controls the switching operation of the slave switch based on the load state information and the control signal output information to the slave converter.
2. The control circuit according to claim 1, characterized in that the interleave signal generating unit outputs the interleave signal, the voltage value of which is adjusted when at a high level, to the slave switch control circuit as information on whether or not to stop the slave switch control circuit.
3. The control circuit according to claim 2, characterized in that the interleave signal generating unit outputs to the slave switch control circuit, as information on whether or not to stop the slave switch control circuit, the interleave signal being adjusted so that the high level voltage value when a light load state is determined to be lower than the high level voltage value when a heavy load state is determined to be.
4. The control circuit described in claim 2, characterized in that the interleave signal generating unit outputs to the slave switch control circuit, as information on whether or not to stop the slave switch control circuit, the interleave signal being adjusted so that the high level voltage value when a light load state is determined to be higher than the high level voltage value when a heavy load state is determined to be.
5. A control circuit as described in any one of claims 1 to 4, characterized in that the load condition determination unit determines the load condition based on whether or not the error amplifier output voltage exceeds a load condition determination threshold voltage, and the load condition determination threshold voltage when the error amplifier output voltage is increasing is greater than the load condition determination threshold voltage when the error amplifier output voltage is decreasing.
6. A control circuit as described in any one of claims 1 to 4, characterized in that the load condition determination unit determines the load condition based on whether or not the error amplifier output voltage exceeds a load condition determination threshold voltage, and the load condition determination unit adjusts the load condition determination threshold voltage based on an input voltage.
7. A control circuit as described in any one of claims 1 to 6, further comprising a zero current detection unit which detects the timing when the inductor current becomes zero, wherein the on-trigger generation unit generates the on-trigger based on the timing detected by the zero current detection unit and outputs it to the gate control unit, and the gate control unit outputs the control signal to the gate control unit at the timing when the inductor current becomes zero based on the on-trigger.
8. An interleaved power supply comprising a main converter having a main switch that performs switching operation, and a slave converter having a slave switch that performs switching with a specified phase difference with respect to the switching operation of the main switch, forming a master-slave relationship between the main converter and the slave converter, wherein a main switch control circuit that controls the switching operation of the main switch is a control circuit as described in any one of claims 1 to 4, and outputs an interleave signal including information as to whether or not to stop the slave switch control circuit that controls the switching operation of the slave switch to the slave switch control circuit, and the slave switch control circuit determines whether or not to stop the slave switch control circuit based on an interleave input signal when the interleave signal is input to the slave switch control circuit.
9. The interleaved power supply according to claim 8, wherein the secondary converter has a voltage divider circuit for dividing the voltage of the interleaved signal.
10. The interleaved power supply according to claim 8, further comprising a plurality of slave converters as the slave converter, and at least one of the slave converters has a voltage divider circuit that divides the interleaved signal.
11. The slave switch control circuit judges whether to stop the slave switch control circuit depending on whether the high-level voltage value of the interleaved input signal exceeds a predetermined interleaved signal detection threshold voltage, and when the load condition judgment unit judges that the load is heavy, the high-level voltage value of the interleaved signal output from the main switch control circuit is set to VIL1, and when the load condition judgment unit judges that the load is light, the high-level voltage value of the interleaved signal output from the main switch control circuit is set to VIL2, and the interleaved signal detection threshold voltage is VIL_IN1, then VIL1>VIL2>VIL_IN1 is satisfied; and in a case where a voltage divider circuit is arranged in the slave converter and the interleaved signal is divided by the voltage divider circuit and input to the slave switch control circuit, when the load condition judgment unit judges that the load is heavy, the high-level voltage value of the interleaved input signal is set to VIL1_D, and when the load condition judgment unit judges that the load is light, the high-level voltage value of the interleaved input signal is set to VIL2_D, 9. The interleaved power supply according to claim 8, wherein the voltage divider circuits are arranged so as to satisfy VIL1_D>VIL_IN1 and VIL2_D<VIL_IN1.
12. The slave switch control circuit judges whether to stop the slave switch control circuit depending on whether the high-level voltage value of the interleave input signal is within a range from a predetermined interleave signal detection threshold voltage to a predetermined interleave operation stop threshold voltage, and when the load condition judgment unit judges that the load is heavy, the high-level voltage value of the interleave signal output from the main switch control circuit is set to VIL1, and when the load condition judgment unit judges that the load is light, the high-level voltage value of the interleave signal output from the main switch control circuit is set to VIL2, the interleave signal detection threshold voltage is set to VIL_IN1, and the interleave operation stop threshold voltage is set to VIL_IN1_stop, then VIL2>VIL_IN1_stop>VIL1>VIL_IN1 is satisfied, 9. The interleaved power supply according to claim 8, characterized in that, in a case where a voltage divider circuit is arranged in the slave converter and the interleaved signal is divided by the voltage divider circuit and input to the slave switch control circuit, when the load condition determination unit determines that the load is heavy, the high level voltage value of the interleaved input signal is set to VIL1_D, and when the load condition determination unit determines that the load is light, the high level voltage value of the interleaved input signal is set to VIL2_D, the voltage divider circuit is arranged so as to satisfy VIL_IN1_stop>VIL1_D>VIL_IN1 and VIL_IN1_stop>VIL2_D>VIL_IN1.
13. The slave converter comprises a plurality of slave converters, each of the slave switch control circuits in the slave converters is provided with a first interleaved signal detection threshold voltage and a second interleaved signal detection threshold voltage lower than the first interleaved signal detection threshold voltage for the interleaved signal, and when the interleaved signal is directly input to the slave switch control circuit, or when a voltage divider circuit is arranged in the slave converter and the interleaved signal is divided by the voltage divider circuit and input to the slave switch control circuit, (1) when the high-level voltage value of the interleaved input signal exceeds the first interleaved signal detection threshold voltage, the slave switch control circuit outputs an interleaved signal having a voltage value equal to the high-level voltage value of the interleaved signal output from the main switch control circuit, such that the slave converter having the slave switch control circuit continues the interleaved operation, 9. The interleaved power supply according to claim 8, wherein: (2) when the high-level voltage value of the interleaved input signal is equal to or lower than a first interleaved signal detection threshold voltage and equal to or higher than a second interleaved signal detection threshold voltage, the slave switch control circuit causes the slave converter having the slave switch control circuit to continue the interleaved operation and outputs an interleaved signal having a voltage value at a level lower than the high-level voltage value of the interleaved signal output from the main switch control circuit; and (3) when the high-level voltage value of the interleaved signal is lower than the second interleaved signal detection threshold voltage, the slave switch control circuit causes the slave converter having the slave switch control circuit to stop the interleaved operation and stops outputting the interleaved signal.
Citation Information
Patent Citations
Voltage converter
JP2005278346A
Switching power supply
JP2010016973A
Power supply control device, and power supply apparatus using the same
JP2010233439A
Interleaved switching power supply
JP2011055686A
Interleaved switching power supply
JP2011083163A