Fault tree modularization method and apparatus, storage medium, and electronic device

Abstract

The present invention relates to a fault tree modularization method and apparatus, a storage medium, and an electronic device. The method comprises: obtaining a fault tree; converting the fault tree into a directed graph; initializing the directed graph; performing node traversal on the initialized directed graph to obtain non-modular nodes and leaf nodes; and removing the non-modular nodes and the leaf nodes to obtain modular nodes of the fault tree. According to the present invention, in a fault tree modularization process, the number of traversals for a repeated node is the number of repetitions thereof, and a non-repeated node only needs to be traversed once; compared with existing methods in which three values are recorded for each node, in the present invention, only the father node of each node needs to be recorded, the time complexity of an algorithm is remarkably reduced, node assignment is not needed, the storage space does not need to be occupied, simplification of the fault tree can be effectively implemented, and the objective of improving the fault tree calculation efficiency can also be achieved.

Description

Fault tree modularization method, device, storage medium and electronic device Technical Field

[0001] The present invention relates to the technical field of fault analysis, and more particularly to a fault tree modularization method, device, storage medium and electronic equipment. Background Art

[0002] Fault Tree Analysis (FTA) is a method for probabilistic safety assessment (PSA) of nuclear power plants, which can perform quantitative and qualitative analysis of the causes of failures.

[0003] Fault tree analysis (FTA), a fundamental and mature tool for probabilistic failure analysis, plays a vital role in the probabilistic safety analysis (PSA) of various events and equipment in the nuclear power sector. FTA not only qualitatively reveals system failure modes but also quantitatively identifies system weaknesses, making it an effective fault diagnosis and analysis tool. With the increasing size and complexity of systems and the increasing sophistication and sophistication of equipment, the computational complexity required for fault tree analysis of these systems and equipment has exploded exponentially. When analyzing large and complex fault trees, even using approximate methods to determine the system failure rate often presents non-deterministic polynomial (NP) problems, sometimes making it difficult for large computers to compute the results. Consequently, large and complex fault tree analysis can impact computer runtime and storage space, leading to low computational efficiency.

[0004] Currently, a modular algorithm is used for fault tree analysis. Based on the characteristics of the fault tree, a modular algorithm (linear algorithm) is proposed, which uses a depth-left-first search to traverse the fault tree twice. Specifically, the fault tree is first traversed for the first time, and the bottom event and intermediate event in the traversed fault tree are time-marked (usually three marks are set): (1) Mark 1 represents the time of the first traversal to the event (that is, the number of steps used); (2) Mark 2 represents the time of the second traversal to the event (that is, the number of steps used); (3) Mark 3 represents the time of the last traversal to the event (that is, the number of steps used). For a bottom event, the value of Mark 1 is definitely equal to the value of Mark 2. Then, the fault tree is traversed for the second time. For each intermediate event, the minimum value min of Mark 1 and the maximum value max of Mark 3 are calculated among the values ​​of all events connected to it in the lower layer. If both of the following conditions are met, then node N is an independent subtree: 1) Among all lower-level events connected to node N, the minimum value min of mark 1 is greater than the value of mark 1 of node N; 2) Among all lower-level events connected to node N, the maximum value max of mark 3 is smaller than the value of mark 2 of node N.

[0005] As can be seen from the above method, since each intermediate event node contains two input nodes, the entire fault tree is traversed twice in depth, resulting in a time complexity of O(2n), where n is the number of nodes in the fault tree. This shows that the larger the fault tree, the longer the computation time. Therefore, this method still cannot solve the problems of long computation time and low computational efficiency. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a fault tree modularization method, device, storage medium and electronic equipment.

[0007] The technical solution adopted by the present invention to solve the technical problem is to construct a fault tree modularization method, including the following steps:

[0008] Obtain a fault tree;

[0009] Converting the fault tree into a directed graph;

[0010] Initializing the directed graph;

[0011] Traverse the nodes of the initialized directed graph to obtain non-modular nodes and leaf nodes;

[0012] The non-modular nodes and the leaf nodes are eliminated to obtain modular nodes of the fault tree.

[0013] In the fault tree modularization method of the present invention, initializing the directed graph includes:

[0014] Traversing the directed graph using a depth-first traversal rule;

[0015] Set the path node stack traversed during the access process;

[0016] The value of the parent node of each node in the directed graph is set to a preset value.

[0017] In the fault tree modularization method of the present invention, traversing the initialized directed graph to obtain non-modular nodes and leaf nodes includes:

[0018] Visit each node in the initialized directed graph;

[0019] In the process of accessing each node, determine whether the value of the parent node of the current node is the preset value;

[0020] If the value of the parent node of the current node is a preset value, a leaf node determination is performed on the current node.

[0021] In the fault tree modularization method of the present invention, the method further includes:

[0022] If the value of the parent node of the current node is a preset value, then record the parent node of the current node;

[0023] Insert the current node into the path node stack.

[0024] In the fault tree modularization method of the present invention, if the value of the parent node of the current node is a preset value, performing leaf node determination on the current node includes:

[0025] If the value of the parent node of the current node is a preset value, determine whether the current node is a leaf node;

[0026] If the current node is a leaf node, performing a pop-up operation on the current node;

[0027] If the current node is not a leaf node, the next node is accessed according to the pre-root traversal rule.

[0028] In the fault tree modularization method of the present invention, performing a pop-up operation on the current node includes:

[0029] The current node is removed from the path node stack.

[0030] In the fault tree modularization method of the present invention, the method further includes:

[0031] If the current node is a leaf node, after performing a pop operation on the current node, determining whether the leaf node has a sibling node;

[0032] If the leaf node has a sibling node, the sibling node of the leaf node is used as the root node and a recursive operation is performed;

[0033] If the leaf node has no sibling node, a backtracking operation is performed.

[0034] In the fault tree modularization method of the present invention, the method further includes:

[0035] If the parent node of the current node is not a preset value, obtaining the parent node information of the current node;

[0036] Obtaining an ancestor node set of the current node according to the parent node information of the current node;

[0037] Performing difference calculation based on the ancestor node set of the current node and the path node stack to obtain a non-modular node set;

[0038] All non-modular nodes of the directed graph are obtained according to the non-modular node set.

[0039] In the fault tree modularization method of the present invention, performing difference calculation based on the ancestor node set of the current node and the path node stack includes:

[0040] During the traversal process, a difference calculation is performed between the ancestor node set of the current node and the path node stack.

[0041] In the fault tree modularization method of the present invention, converting the fault tree into a directed graph includes:

[0042] Traversing all nodes of the fault tree to obtain repeated nodes of the fault tree;

[0043] The duplicate nodes of the fault tree are merged, and the logic gates of the fault tree are deleted to obtain the directed graph.

[0044] The present invention also provides a fault tree modular device, comprising:

[0045] An acquisition unit, used for acquiring a fault tree;

[0046] A conversion unit, configured to convert the fault tree into a directed graph;

[0047] an initialization unit, configured to initialize the directed graph;

[0048] A node traversal unit is used to traverse the nodes of the initialized directed graph to obtain non-modular nodes and leaf nodes;

[0049] The modularization unit is used to remove the non-modular nodes and the leaf nodes to obtain the modular nodes of the fault tree.

[0050] The present invention further provides a storage medium storing a computer program, wherein the computer program is suitable for being loaded by a processor to execute the steps of the fault tree modularization method as described above.

[0051] The present invention also provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor executes the steps of the fault tree modularization method described above by calling the computer program stored in the memory.

[0052] The fault tree modularization method, device, storage medium, and electronic device of the present invention have the following beneficial effects: comprising the following steps: obtaining a fault tree; converting the fault tree into a directed graph; initializing the directed graph; traversing the initialized directed graph to obtain non-modular nodes and leaf nodes; and removing the non-modular nodes and leaf nodes to obtain modular nodes of the fault tree. In the fault tree modularization process, the present invention traverses repeated nodes the same number of times as the number of repetitions, while non-repeated nodes only need to be traversed once. Compared to existing methods that record three values ​​for each node, the present invention only needs to record the parent node of each node, significantly reducing the algorithm's time complexity. It also does not require assigning values ​​to nodes and does not require occupying storage space. It can effectively simplify the fault tree and improve the efficiency of fault tree calculations. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0054] FIG1 is a flow chart of a fault tree modularization method provided by the present invention;

[0055] FIG2 is an example diagram of a fault tree provided by the present invention;

[0056] FIG3 is a directed graph provided by the present invention;

[0057] FIG4 is an example diagram of a depth traversal search submodule provided by the present invention;

[0058] FIG5 is a schematic diagram of node traversal provided by the present invention;

[0059] FIG6 is a fault tree modular device provided by the present invention. DETAILED DESCRIPTION

[0060] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0061] Figure 1 shows the process of the fault tree modularization method provided by the present invention. The fault tree modularization method can efficiently modularize large-scale fault trees.

[0062] Specifically, as shown in FIG1 , the fault tree modularization method includes the following steps:

[0063] Step S101: Obtain a fault tree.

[0064] Specifically, in this embodiment, the fault tree can be acquired using existing acquisition methods, such as directly calling from a database or importing by a user. An example fault tree is shown in Figure 2. In each branch of the fault tree, the upper-level fault event is the result of the lower-level fault event, and the lower-level event is the cause of the upper-level fault event. The logical relationship between events is represented by logic gates (such as the AND gate and OR gate in Figure 2). The event at the top of the fault tree is called the top event (r in Figure 2 is the top event). Intermediate events: Starting from the top event, the factors that directly lead to the top event are the first-level intermediate events (such as g1 in Figure 2). Bottom events: Following this path downward, through each intermediate event, until it is no longer possible or necessary to further investigate the fault event, the bottom-level fault event is the base event of the top event (e1 in Figure 2).

[0065] It should be noted that the bottom event in a module no longer appears anywhere else outside of the module. An independent module in a fault tree generally has two or more basic events, which converge upwards to the same event. Only by going up through this event can the top event be reached. All other basic events in the fault tree that are not in this module cannot reach this logic gate when going upwards. The largest module in the fault tree is not included in any module. The module subtree of a fault tree refers to the basic events contained in the module and the logic gates passed upwards. The top event of the module subtree is regarded as a "bottom event" of the original fault tree, thus converting a complex fault tree into a relatively simple fault tree, which is generally called a modular fault tree.

[0066] Furthermore, the FTA modularization algorithm is used to identify and partition the FTA tree into modules, a process known as FTA modularization. The resulting independent modules do not affect the final result. On the contrary, since independent modules can be equated with a single "bottom event," replacing a large amount of sub-node information with these modules not only reduces the size of the original fault tree but also simplifies the fault tree structure. Nodes within a modular subtree are called modular nodes. It should be noted that leaf nodes are not modular nodes.

[0067] Step S102: Convert the fault tree into a directed graph.

[0068] In this embodiment, converting the fault tree into a directed graph includes: traversing all nodes of the fault tree to obtain repeated nodes of the fault tree; merging the repeated nodes of the fault tree, and deleting logic gates of the fault tree to obtain a directed graph.

[0069] Specifically, as shown in Figures 2 and 3, during the conversion process, all duplicate nodes in the fault tree are first filtered out, and then the duplicate nodes are merged, as shown in Figure 3. Simultaneously, during reading, the logic diagram in the fault tree is removed, ultimately converting it into the directed graph shown in Figure 3. In Figure 3, each node represents an event and its underlying logic gates. Since the purpose of the present invention is to identify modular nodes, nodes do not need to display their logic gates, and the letter of each node in Figure 3 represents the address of the node itself.

[0070] Step S103: Initialize the directed graph.

[0071] In this embodiment, initializing the directed graph includes: traversing the directed graph using the pre-root traversal rule in the depth-first traversal; setting a stack of path nodes traversed during the access process; and setting the value of the parent node of each node in the directed graph to a preset value.

[0072] Specifically, after the directed graph conversion is completed, the directed graph is traversed using the pre-root traversal rule in the depth-first traversal, and the path node stack traversed during the access process (including the current node) is set to L = [], and the parent node value of each node is initialized to a preset value (i.e., null).

[0073] It's important to note that the path node stack is a stack structure with a first-in, last-out principle, and insertion and popping can only be performed at the end of the stack. When a node is first accessed, the path node stack stores all nodes encountered for the first time; during backtracking, the stack is popped.

[0074] Step S104: perform node traversal on the initialized directed graph to obtain non-modular nodes and leaf nodes.

[0075] In this embodiment, a node traversal is performed on the initialized directed graph to obtain non-modular nodes and leaf nodes, including: visiting each node in the initialized directed graph; in the process of visiting each node, determining whether the value of the parent node of the current node is a preset value; if the value of the parent node of the current node is a preset value, performing a leaf node determination on the current node.

[0076] If the value of the parent node of the current node is a preset value, the parent node of the current node is recorded; and the current node is inserted into the path node stack.

[0077] Furthermore, in this embodiment, if the value of the parent node of the current node is a preset value, then determining whether the current node is a leaf node includes: if the value of the parent node of the current node is a preset value, determining whether the current node is a leaf node; if the current node is a leaf node, performing a pop operation on the current node; if the current node is not a leaf node, continuing to access the next node according to the rule of pre-order traversal. The rule of pre-order traversal is: during the traversal process, first access the root node, then traverse the left subtree of the root in pre-order, and finally traverse the right subtree of the root in pre-order. The traversal process is the same for the left subtree and the right subtree of the root.

[0078] In this embodiment, performing a pop operation on the current node includes: removing the current node from the path node stack.

[0079] Furthermore, in this embodiment, if the current node is a leaf node, after performing a pop-up operation on the current node, it is determined whether the leaf node has a sibling node; if the leaf node has a sibling node, a recursive operation is performed with the sibling node of the leaf node as the root node; if the leaf node has no sibling node, a backtracking operation is performed.

[0080] Specifically, in this embodiment, if the current node is a leaf node, a pop operation is first performed, popping the top node from the path node stack L (i.e., popping the current node). It is then determined whether the leaf node has a sibling node. If so, the above process (i.e., determining the parent node value and determining the leaf node) is repeated, using the sibling node as the root node. If not, a backtracking operation is performed, tracing back to the parent node, performing a pop operation on the path node stack L, and continuing with the above "determining whether there are sibling nodes" operation.

[0081] In this embodiment, leaf node: A node in a tree that has no child nodes is called a leaf node, referred to as "leaf" (for example, g, l, n, m, j, i, and h in FIG3 are all leaf nodes).

[0082] In this embodiment, sibling nodes refer to child nodes that have the same parent node. For example, in Figure 3, node f is the sibling node of node g, node k is the sibling node of node l, node b is the sibling node of node c, and node d is the sibling node of node e.

[0083] Furthermore, in this embodiment, if the parent node of the current node is not a preset value, the parent node information of the current node is obtained; based on the parent node information of the current node, the ancestor node set of the current node is obtained; a difference set calculation is performed based on the ancestor node set of the current node and the path node stack to obtain a non-modular node set; and all non-modular nodes of the directed graph are obtained based on the non-modular node set. In this embodiment of the present invention, the ancestor node set is the set of ancestor nodes. Specifically, the ancestor node is the node that is traced back from a certain point to the root of the tree, and all the nodes passed through are ancestor nodes. As shown in Figure 4, the ancestor nodes of node k include: node f, node c and node a.

[0084] The difference calculation based on the ancestor node set and the path node stack of the current node includes: performing the difference calculation between the ancestor node set and the path node stack during the traversal process. That is, the difference calculation is performed during the traversal process, rather than during the backtracking process. In addition, in this embodiment, when the current node being visited is a leaf node, it is necessary to backtrack upward, and when visiting the next sibling node, it is necessary to backtrack to the right. Both operations are referred to as backtracking.

[0085] Step S105: Eliminate non-modular nodes and leaf nodes to obtain modular nodes of the fault tree.

[0086] The following is a specific example, as shown in Figures 4 and 5:

[0087] Step 1: First visit node a. At this time, the value of the parent node of node a is null. Record the parent node of node a, that is, ap=null, and insert node a into the path node stack L, that is, L=[a].

[0088] Step 2: Access node c. First, determine whether the value of the parent node of node c is null. As mentioned above, the parent node of node c is null. Record the parent node a of node c, that is, cp=a, and insert node c into the path node stack L. At this time, L=[a,c].

[0089] Step 3: Visit node g. First, determine whether the value of the parent node of node g is null. As mentioned above, the value of the parent node of node g is null. Record the parent node c of node g, that is, gp=c, and insert node g into the path node stack L. At this time, L=[a,c,g].

[0090] Further, determine whether node g is a leaf node (specifically, the determination can be made based on the leaf node flag information. For example, the flag information can be represented by a flag, where a flag of 1 indicates that the node is a leaf node, and a flag of 0 indicates that the node is not a leaf node). After determination, if node g is a leaf node (record the leaf node), a pop operation must be performed first, i.e., node g must be removed from the path node stack L. After the pop operation is performed, the path node stack L = [a, c].

[0091] After determining that node g is a leaf node, the process continues by determining whether node g has a sibling node. After analysis (this determination can be done using any existing method and is not specifically limited by the present invention), it is determined that node g has a sibling node, and that the sibling node is node f. At this point, the recursive operation (step 4) is performed, with node f as the root node.

[0092] Step 4: Access node f and determine whether the value of the parent node of node f is null. As mentioned above, the parent node of node f is null. Record the parent node c of node f, that is, fp=c, and insert node f into the path node stack L. At this time, the path node stack L=[a,c,f].

[0093] Step 5: Visit node l and determine whether the value of the parent node of node l is null. As mentioned above, the parent node of node l is null. Record the parent node f of node l, that is, lp=f, and insert node l into the path node stack L. At this time, the path node stack L=[a,c,f,l].

[0094] Furthermore, determine whether node l is a leaf node. After determination, if node l is a leaf node (record the leaf node), a pop operation needs to be performed first, that is, node l is removed from the path node stack L. After the pop operation is performed, the path node stack L = [a, c, f].

[0095] Next, after determining that node l is a leaf node, we continue to determine whether node l has a sibling node. After analysis, we can determine that node l has a sibling node, and that the sibling node is node k. At this point, we perform a recursive operation with node k as the root node (i.e., execute step 6).

[0096] Step 6: Visit node k and determine whether the value of the parent node of node k is null. As mentioned above, the parent node of node k is null. Record the parent node f of node k, that is, kp=f, and insert node k into the path node stack L. At this time, the path node stack L=[a,c,f,k].

[0097] Step 7: Access node n and determine whether the value of the parent node of node n is null. As mentioned above, the parent node of node n is null. Record the parent node k of node n, that is, np=k, and insert node n into the path node stack L. At this time, the path node stack L=[a,c,f,k,n].

[0098] Furthermore, determine whether node n is a leaf node. After determination, if node n is a leaf node (record the leaf node), a pop operation needs to be performed first, that is, node n is removed from the path node stack L. After the pop operation is performed, the path node stack L = [a, c, f, k].

[0099] Next, after determining that node n is a leaf node, we continue to determine whether node n has a sibling node. After analysis, we can determine that node n has a sibling node, and that the sibling node is node m. At this point, we perform a recursive operation (i.e., execute step 8) with node m as the root node.

[0100] Step 8: Access node m and determine whether the value of the parent node of node m is null. As mentioned above, the parent node of node m is null. Record the parent node k of node m, that is, np=k, and insert node m into the path node stack L. At this time, the path node stack L=[a,c,f,k,m].

[0101] Furthermore, determine whether node n is a leaf node. After determination, if node n is a leaf node (record the leaf node), a pop operation needs to be performed first, that is, node n is removed from the path node stack L. After the pop operation is performed, the path node stack L = [a, c, f, k].

[0102] Next, after determining that node m is a leaf node, the process continues by determining whether node m has any sibling nodes. If analysis confirms that node m does not have any sibling nodes, the process performs a backtracking operation (e.g., backtracking from node m to its parent node k in Figure 5) to node k. The process repeats the previous backtracking operation (i.e., backtracking 9 and backtracking 10 in Figure 5) to node c.

[0103] Then, after backtracking to node c, determine whether node c has a sibling node. After determining that node c has a sibling node and node c's sibling node is b, take node b as the root node and perform a recursive operation (i.e., execute step 9).

[0104] Step 9: Access node b and determine whether the value of node b's parent node is null. As mentioned above, the parent node of node b is null. Record node b's parent node a, that is, bp=a, and insert node b into the path node stack L. At this time, the path node stack L=[a,b].

[0105] Step 10: Visit node e and determine whether the value of the parent node of node e is null. As mentioned above, the value of the parent node of node e is null. Record the parent node b of node e, that is, ep=b, and insert node e into the path node stack L, that is, L=[a,b,e].

[0106] Furthermore, it is determined whether the node e is a leaf node. If the node e is not a leaf node, the eleventh step is continued.

[0107] Step 11: Visit node k and determine whether the parent node of node k is null. If the parent node of node k is not null, stop visiting the subtree rooted at node k. At the same time, obtain the parent node information of node k, and then obtain the ancestor node set Z = [a, c, f, k] of node k. Then, perform a difference calculation with the path node stack L to obtain the non-modular node set C. z-L =[ b,e,c,f].

[0108] Step 12: Continue to visit node j, node d, node i, and node h according to the above method until all nodes have been visited.

[0109] Step 13: Finally, remove the non-modular nodes and all leaf nodes from the entire fault tree node set T, and obtain the modular node set [a, k, d]. Then, the modular nodes of the fault tree, namely node a, node k, and node d, can be directly obtained from the modular node set.

[0110] As shown in FIG6 , the present invention further provides a fault tree modular device, which specifically includes:

[0111] The acquisition unit 601 is configured to acquire a fault tree.

[0112] The conversion unit 602 is configured to convert the fault tree into a directed graph.

[0113] The initialization unit 603 is used to initialize the directed graph.

[0114] The node traversal unit 604 is used to perform node traversal on the initialized directed graph to obtain non-modular nodes and leaf nodes.

[0115] The modularization unit 605 is used to remove non-modular nodes and leaf nodes to obtain modular nodes of the fault tree.

[0116] Specifically, the specific coordination operation process between the units in the fault tree modular device herein may refer to the above-mentioned fault tree modular method, which will not be described in detail here.

[0117] In the fault tree modularization method provided by the present invention, in the fault tree modularization process, for repeated nodes, the number of traversals is the number of their repetitions; for non-repeated nodes, only one traversal is required; compared with the existing solution that requires recording three values ​​for each node, the present invention only needs to record the parent node of each node, which can significantly shorten the time.

[0118] In addition, the algorithm time complexity of the fault tree modularization method based on node address coding of the present invention is only O(n+logn), and there is no need to assign values ​​to nodes to occupy storage space. While completing the simplification of the fault tree, the purpose of improving the calculation efficiency of the fault tree is achieved.

[0119] In addition, an electronic device of the present invention includes a memory and a processor; the memory is used to store a computer program; the processor is used to execute the computer program to implement a fault tree modularization method such as any one of the above. Specifically, according to an embodiment of the present invention, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present invention includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed by an electronic device and, when executed, performs the above-mentioned functions defined in the method of the embodiment of the present invention. The electronic device in the present invention can be a terminal such as a notebook, a desktop, a tablet computer, a smart phone, or a server.

[0120] In addition, the present invention provides a storage medium having a computer program stored thereon. When executed by a processor, the computer program implements any of the above-mentioned fault tree modeling methods. Specifically, it should be noted that the storage medium of the present invention may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. Computer-readable storage media may be, for example, but not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or components, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to, an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present invention, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, device, or component. In the present invention, a computer-readable signal medium may include a data signal transmitted in baseband or as part of a carrier wave, which carries computer-readable program code. This propagated data signal may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer-readable medium may be transmitted using any suitable medium, including but not limited to wire, optical cable, RF (radio frequency), or any suitable combination thereof.

[0121] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device.

[0122] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Reference can be made to the common and similar parts between the various embodiments. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method description.

[0123] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0124] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0125] The above embodiments are intended only to illustrate the technical concepts and features of the present invention. Their purpose is to enable those skilled in the art to understand the present invention and implement it accordingly. They are not intended to limit the scope of protection of the present invention. All equivalent variations and modifications within the scope of the claims of the present invention are intended to be covered by the claims of the present invention.

Claims

1. A fault tree modularization method, characterized in that: The following steps are involved: Get the fault tree; Converting the fault tree into a directed graph; Initializing the directed graph; Traverse the nodes of the initialized directed graph to obtain non-modular nodes and leaf nodes; The non-modular nodes and the leaf nodes are eliminated to obtain the modular nodes of the fault tree.

2. The fault tree modularization method according to claim 1, characterized in that: The initializing the directed graph comprises: Traversing the directed graph using the rule of pre-root traversal in depth-first traversal; Set the path node stack traversed during the access process; The value of the parent node of each node in the directed graph is set to a preset value.

3. The fault tree modularization method according to claim 2, characterized in that: The step of performing node traversal on the initialized directed graph to obtain non-modular nodes and leaf nodes includes: Visit each node in the initialized directed graph; In the process of accessing each node, determine whether the value of the parent node of the current node is the preset value; If the value of the parent node of the current node is a preset value, a leaf node determination is performed on the current node.

4. The fault tree modularization method according to claim 3, characterized in that: The method further comprises: If the value of the parent node of the current node is a preset value, then the parent node of the current node is recorded; Insert the current node into the path node stack.

5. The fault tree modularization method according to claim 3, characterized in that: If the value of the parent node of the current node is a preset value, determining the leaf node of the current node includes: If the value of the parent node of the current node is a preset value, determine whether the current node is a leaf node; If the current node is a leaf node, a pop-up operation is performed on the current node; If the current node is not a leaf node, the next node is accessed according to the pre-root traversal rule.

6. The fault tree modularization method according to claim 5, characterized in that: The performing a pop-up operation on the current node comprises: The current node is removed from the path node stack.

7. The fault tree modularization method according to claim 5, characterized in that: The method further comprises: If the current node is a leaf node, after performing a pop-up operation on the current node, determine whether the leaf node has a sibling node; If the leaf node has a sibling node, the sibling node of the leaf node is used as the root node and a recursive operation is performed; If the leaf node has no sibling node, a backtracking operation is performed.

8. The fault tree modularization method according to claim 3, characterized in that: The method further comprises: If the parent node of the current node is not a preset value, obtaining the parent node information of the current node; Obtaining an ancestor node set of the current node according to the parent node information of the current node; Perform difference calculation based on the ancestor node set of the current node and the path node stack to obtain a non-modular node set; All non-modular nodes of the directed graph are obtained according to the non-modular node set.

9. The fault tree modularization method according to claim 8, characterized in that: The performing difference calculation based on the ancestor node set of the current node and the path node stack includes: During the traversal process, a difference calculation is performed between the ancestor node set of the current node and the path node stack.

10. The fault tree modularization method according to any one of claims 1 to 9, characterized in that: The converting the fault tree into a directed graph comprises: Traversing all nodes of the fault tree to obtain repeated nodes of the fault tree; The repeated nodes of the fault tree are merged, and the logic gates of the fault tree are deleted to obtain the directed graph.

11. A fault tree modular device, characterized in that: include: An acquisition unit, used for acquiring a fault tree; A conversion unit, used for converting the fault tree into a directed graph; An initialization unit, used for initializing the directed graph; A node traversal unit is used to traverse the nodes of the initialized directed graph to obtain non-modular nodes and leaf nodes; The modularization unit is used to remove the non-modular nodes and the leaf nodes to obtain the modular nodes of the fault tree.

12. A storage medium, characterized in that: The storage medium stores a computer program, and the computer program is suitable for being loaded by a processor to execute the steps of the fault tree modularization method according to any one of claims 1 to 10.

13. An electronic device, characterized in that: The method comprises a memory and a processor, wherein the memory stores a computer program, and the processor executes the steps of the fault tree modularization method according to any one of claims 1 to 10 by calling the computer program stored in the memory.

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