Silicon-based electro-optic phase modulator, chip, and related system

Abstract

A silicon-based electro-optic phase modulator, a chip, and an electro-optic phase modulation system. The silicon-based electro-optic phase modulator comprises a substrate (10), an optical waveguide layer (20) stacked on the substrate (10), and an electrode layer (30); the optical waveguide layer comprises a first doping region (21), and a first PN junction (22) and a second PN junction (23) which are connected in series; and the electrode layer (30) comprises a first electrode (31), a second electrode (32) and a third electrode (33). The first PN junction (22) is of a convex structure, one end of the first PN junction (22) is connected to the first doping region (21), and the other end of the first PN junction is connected to the second PN junction (23); and the carrier doping concentration of the first PN junction (22) is less than the carrier doping concentration of the second PN junction (23), and is less than the carrier doping concentration in the first doping region (21).The first doping region (21) is connected to the first electrode (31); and the end of the second PN junction (23) distant from the first PN junction (22) is connected to the second electrode (32), and the end of the second PN junction (23) close to the first PN junction (22) is connected to the third electrode (33). The first electrode (31) and the second electrode (32) are respectively used for receiving a radio frequency signal and grounding, and the third electrode (33) is used for receiving a direct current bias voltage. The technical solution can reduce the static power consumption and the packaging cost of the silicon-based electro-optic phase modulator.

Description

Silicon-based electro-optical phase modulator, chip and related system

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on November 6, 2023, with application number 202311470490.7, and priority to the Chinese patent application entitled "A silicon-based electro-optical phase modulator, chip and related system", the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of chip technology, and in particular to a processing unit scheduling device, method, chip and related equipment. Background Art

[0003] Microwave photonics technology utilizes optoelectronic devices to process microwave signals. It offers advantages such as wide bandwidth, low loss, and resistance to electromagnetic interference. It can be applied in wireless communications, radar, instrumentation, and other fields, and is an emerging technology that promises to significantly increase system capacity and bandwidth. Silicon-based microwave photonics technology, in particular, can significantly reduce system costs, operating power consumption, and improve stability, thereby promoting the industrialization of microwave photonics technology.

[0004] Silicon-based electro-optical phase modulators (EOPMs) can modulate the phase information of light waves when converting electrical signals to optical signals. They can also convert phase modulation into intensity modulation through optical link design, making their application in silicon-based microwave photonics technology more flexible, versatile, and widely applicable. However, the DC bias voltage is combined with the RF signal and applied to the traveling wave electrode of the EOPM device. This DC bias voltage ultimately falls on the resistor matched to the EOPM device's terminal (typically 50 ohms), generating a DC current that contributes to static electrical power consumption for the entire system. Furthermore, since the DC bias voltage is combined with the RF signal and applied to the traveling wave electrode of the EOPM device, each silicon-based EOPM driver requires a separate DC bias tee. Since each antenna array requires a corresponding silicon-based EOPM, the presence of a DC bias tee significantly increases the system's electrical packaging cost in applications with a large number of antenna arrays, i.e., applications requiring a large number of EOPM devices.

[0005] Therefore, how to reduce the static power consumption and packaging cost of EOPM devices is a technical problem that needs to be solved urgently.

[0006] Summary of the Invention

[0007] The embodiments of the present application provide a silicon-based electro-optical phase modulator, a chip, and a related system, which can reduce the static power consumption and packaging cost of the silicon-based electro-optical phase modulator.

[0008] In a first aspect, an embodiment of the present application provides a silicon-based electro-optical phase modulator, comprising: a substrate, an optical waveguide layer and an electrode layer stacked on the substrate; the optical waveguide layer comprises a first doped region, a first PN junction and a second PN junction connected in series; the electrode layer comprises a first electrode, a second electrode and a third electrode; wherein the first PN junction is a convex structure, one end of the first PN junction is connected to the first doped region, and the other end of the first PN junction is connected to the second PN junction, and the carrier doping concentration of the first PN junction is less than the carrier doping concentration of the second PN junction and less than the carrier doping concentration in the first doped region; the first doped region is connected to the first electrode, and the end of the second PN junction away from the first PN junction is connected to the second electrode, wherein the first electrode is used to receive radio frequency signals and the second electrode is used for grounding; or, the first electrode is used for grounding and the second electrode is used for radio frequency reception signals; the end of the second PN junction close to the first PN junction is connected to the third electrode, and the third electrode is used for receiving a DC bias voltage.

[0009] The current silicon-based electro-optical phase modulator has a high packaging cost and generates additional static electrical power consumption, wasting resources. In this regard, an embodiment of the present application provides a silicon-based electro-optical phase modulator that can reduce the static power consumption and packaging cost of the EOPM device. Specifically, the silicon-based electro-optical phase modulator includes a substrate, and an optical waveguide layer and an electrode layer stacked on the substrate. The optical waveguide layer includes a high-concentration doped region (i.e., a first doped region) and two PN junctions connected in series, i.e., a first PN junction and a second PN junction. One of the two PN junctions is a low-concentration doped convex PN junction (such as the first PN junction), and the other is a high-concentration doped PN junction (such as the second PN junction). The other end of the low-concentration doped convex PN junction is also connected to a high-concentration doped region (such as the first doped region). The outsides of the two PN junctions (i.e., the ends of the first doped region and the second PN junction away from the first PN junction) are respectively connected to the signal electrode for inputting the RF signal and the ground electrode for grounding in the upper electrode layer. Because the two PN junctions are in series, and the capacitance of the high-concentration-doped PN junction is much greater than that of the low-concentration-doped PN junction under reverse bias, the majority of the voltage is applied to the low-concentration-doped PN junction (i.e., the first PN junction, also known as the effective electro-optical modulation region). This allows the first PN junction to effectively control the phase information of the optical carrier under the action of the input RF signal, generating optical modulation sidebands. The middle region where the two PN junctions meet, i.e., the end of the second PN junction closest to the first PN junction, is connected to an electrode (e.g., a third electrode) in the upper electrode layer that provides a reverse DC bias voltage. This pulls carriers in the first PN junction out of the silicon waveguide region under the action of an applied electric field, reducing carrier absorption losses of the optical carrier and simultaneously lowering the capacitance / resistance of the first PN junction, ensuring low insertion loss and high modulation bandwidth for the device. In addition, since the input of the DC bias voltage and the input of the RF signal act on both ends of the first PN junction through two different electrodes, the DC bias voltage will not ultimately drive the terminal resistance of the silicon-based electro-optical phase modulator, greatly reducing the static power consumption. Therefore, the silicon-based electro-optical phase modulator provided in the embodiment of the present application can be driven with very little DC bias current to form an effective electro-optical modulation function. Furthermore, since the DC bias voltage and the RF signal are input separately, the second PN junction can be used only as a diode, and its capacitance properties can be used to achieve the function of passing AC and isolating DC when a reverse bias voltage is applied. The inductance properties of the narrow metal wire of the third electrode are used to achieve the function of passing DC and isolating AC, which is equivalent to directly realizing the Bias-Tee function on the silicon chip. This can avoid the need for an additional separate external electrical Bias-Tee to drive each silicon-based electro-optical phase modulator, thereby reducing the packaging cost of the device.

[0010] In one possible implementation, the first doped region and the end of the first PN junction close to the first doped region are doped with the first type; the end of the first PN junction close to the second PN junction is doped with the second type; the end of the second PN junction close to the first PN junction is doped with the second type; and the end of the second PN junction away from the first PN junction is doped with the first type.

[0011] In the embodiment of the present application, the doping type at the connection between the first PN junction and the second PN junction is the same; the doping type at the connection between the first PN junction and the first doped region is also the same. When the first type of doping is P-type, the second type of doping is N-type; when the first type of doping is N-type, the second type of doping is P-type. In addition, since the silicon-based electro-optical phase modulator in the embodiment of the present application operates in a carrier depletion mode, that is, a DC bias voltage is applied based on the third electrode to put its PN junction in a reverse bias state, and in the reverse bias state, the first PN junction is an effective electro-optical modulation region, and the second PN junction is a diode capacitance region. Therefore, depending on the type of carrier doping at the connection of the third electrode in the optical waveguide layer, the polarity of the DC bias voltage applied in the embodiment of the present application is also different.

[0012] In one possible implementation, the first PN junction includes a ridge region, a first flat plate region, and a second flat plate region; one end of the ridge region is connected to the first flat plate region, and the other end of the ridge region is connected to the second flat plate region; one end of the first flat plate region away from the ridge region is connected to the first doped region; and one end of the second flat plate region away from the ridge region is connected to the second PN junction.

[0013] In the embodiment of the present application, the first PN junction has a convex structure, wherein the convex portion is the ridge region of the first PN junction. This ridge region is a ridge silicon optical waveguide region. Based on the carrier dispersion effect of the silicon material, the effective refractive index of the silicon waveguide changes with the applied voltage (i.e., the change of the RF signal). The change in the effective refractive index causes the phase information of the light wave passing through the silicon waveguide to change, thereby achieving a phase modulation effect on the optical signal. In addition, under the action of the external electric field (DC bias voltage), the carriers in the ridge region will move away from the PN junction interface, thereby reducing the absorption loss of the optical carrier by the carriers in the ridge region, while reducing the capacitance / resistance, ensuring low insertion loss and high modulation bandwidth of the device.

[0014] In one possible implementation, the first slab region and one end of the ridge region connected to the first slab region are doped with the first type of doping; the second slab region and one end of the ridge region connected to the second slab region are doped with the second type of doping.

[0015] In the embodiment of the present application, there are two different doping types in the ridge region of the first PN junction, that is, a PN junction is formed in the ridge region to achieve electro-optical modulation.

[0016] In one possible implementation, the silicon-based electro-optical phase modulator further includes: an upper cladding layer stacked on the substrate, wherein one end of the upper cladding layer close to the substrate is connected to the optical waveguide layer, and one end of the upper cladding layer away from the substrate is connected to the electrode layer; the upper cladding layer includes a first metal via, a second metal via, and a third metal via; one end of the first metal via is connected to the first doped region, and the other end of the first metal via is connected to the first electrode; one end of the second metal via is connected to an end of the second PN junction away from the first PN junction, and the other end of the second metal via is connected to the second electrode; one end of the third metal via is connected to an end of the second PN junction close to the first PN junction, and the other end of the third metal via is connected to the third electrode.

[0017] In the embodiment of the present application, the upper cladding layer is arranged between the optical waveguide layer and the electrode layer, so that the optical waveguide layer and the electrode layer can be electrically connected through the metal through-holes in the upper cladding layer, so that they can produce good ohmic contact, providing a simple and effective electrical connection method.

[0018] In one possible implementation, the optical waveguide layer further includes: a second doped region and a third doped region; one end of the second doped region is connected to the first doped region, and the other end of the second doped region is connected to the first PN junction; one end of the third doped region is connected to the first PN junction, and the other end of the third doped region is connected to the second PN junction; the carrier doping concentration in the second doped region and the carrier doping concentration in the third doped region are both lower than the carrier doping concentration in the first doped region; and the carrier doping concentration in the second doped region and the carrier doping concentration in the third doped region are both higher than the carrier doping concentration in the first PN junction.

[0019] In the embodiment of the present application, the carrier doping concentration of the second doping region and the third doping region is between the adjacent two side regions, that is, the second doping region and the third doping region are medium-concentration doped. Using medium-concentration doping as a transition to connect low and high doping concentration regions can reduce the absorption loss of the light field in the ridge silicon optical waveguide caused by high-concentration doping.

[0020] In a possible implementation, the width of the third electrode is less than 10 micrometers.

[0021] In the embodiment of the present application, the width of the third electrode is set to a narrower value, for example, less than 10 microns, so that the third electrode can be used as a DC inductor during operation, directly achieving the function of passing DC and isolating AC.

[0022] In a possible implementation, the silicon-based electro-optical phase modulator further includes an inductor, and the inductor is connected to the third electrode.

[0023] In the embodiment of the present application, in order to enhance the isolation effect of the DC terminal on the AC signal, the third electrode may be further connected to an inductor to enhance the function of passing the DC and isolating the AC.

[0024] In a second aspect, an embodiment of the present application provides a chip, which includes a circuit and the silicon-based electro-optical phase modulator provided in the first aspect above and applied to the circuit.

[0025] In a third aspect, an embodiment of the present application provides an electro-optical phase modulation system, comprising a DC power supply, multiple antenna elements, and multiple silicon-based electro-optical phase modulators provided in the first aspect above; wherein each of the antenna elements is connected to one of the silicon-based electro-optical phase modulators, and each of the antenna elements is used to output a radio frequency signal to the corresponding silicon-based electro-optical phase modulator, and the DC power supply is connected to the multiple silicon-based electro-optical phase modulators, and the DC power supply is used to provide a DC bias voltage to each of the silicon-based electro-optical phase modulators.

[0026] It should be understood that the chip provided in the second aspect of this application and the electro-optical phase modulation system provided in the third aspect are consistent with the technical solution of the first aspect of this application. Their specific contents and beneficial effects can be referred to the silicon-based electro-optical phase modulator provided in the above-mentioned first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background technology, the drawings required for use in the embodiments of the present application or the background technology will be described below.

[0028] FIG1 is a schematic diagram of an application of a silicon-based electro-optical phase modulator in a microwave photonic system according to an embodiment of the present application.

[0029] FIG2 is a schematic structural diagram of an existing silicon-based electro-optical phase modulator provided in an embodiment of the present application.

[0030] FIG3 is a circuit diagram of a conventional silicon-based electro-optical phase modulator driving method provided in an embodiment of the present application.

[0031] FIG4 is a schematic diagram of an electro-optical phase modulation system provided in an embodiment of the present application.

[0032] FIG5A is a schematic diagram of a top view of the structure of a silicon-based electro-optical phase modulator provided in an embodiment of the present application.

[0033] FIG5B is a schematic diagram of the cross-sectional structure of a silicon-based electro-optical phase modulator provided in an embodiment of the present application.

[0034] FIG6 is a schematic diagram showing a comparison of capacitance values ​​of two PN junctions provided in an embodiment of the present application.

[0035] FIG7 is a schematic diagram of a voltage division ratio of two PN junctions provided in an embodiment of the present application.

[0036] FIG8 is a schematic diagram of the cross-sectional structure of another silicon-based electro-optical phase modulator provided in an embodiment of the present application.

[0037] FIG9 is a circuit diagram of a silicon-based electro-optical phase modulator driving method provided in an embodiment of the present application.

[0038] FIG10 is a schematic diagram of an equivalent circuit of a silicon-based electro-optical phase modulator provided in an embodiment of the present application.

[0039] FIG11 is a schematic diagram of the cross-sectional structure of another silicon-based electro-optical phase modulator provided in an embodiment of the present application.

[0040] FIG12 is a schematic diagram of the top view of another silicon-based electro-optical phase modulator provided in an embodiment of the present application. DETAILED DESCRIPTION

[0041] The embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0042] The terms "first," "second," and the like in the specification, claims, and accompanying drawings of this application are used to distinguish between different objects, not to describe a particular order. Furthermore, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0043] It should be understood that in this application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0044] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0045] As used in this specification, the terms "component," "module," "system," and the like are used to represent computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. By way of illustration, both an application running on a computing device and a computing device can be a component. One or more components can reside in a process and / or an execution thread, and a component can be located on a computer and / or distributed between two or more computers. In addition, these components can be executed from various computer-readable media having various data structures stored thereon. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component on a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0046] First, in order to facilitate understanding of the embodiments of the present application, the technical problems that need to be solved and the applicable application scenarios of the embodiments of the present application are analyzed in detail below.

[0047] Please refer to FIG1 , which is a schematic diagram of an application of a silicon-based electro-optical phase modulator in a microwave photonic system provided by an embodiment of the present application.

[0048] Silicon-based electro-optic phase modulators (EOPMs) can modulate the phase information of light waves and, through optical link design, convert phase modulation into intensity modulation. Their applications in microwave photonic systems are more flexible, versatile, and widespread. Furthermore, compared to Mach-Zehnder modulators and microring resonator modulators, they do not have the issues of operating point control and temperature sensitivity, making them more suitable for large-scale, low-cost array-based integrated applications. As shown in Figure 1, a laser can output an optical carrier (the original unmodulated optical signal); under the action of an input RF drive signal, the silicon-based EOPM can control the phase information of the optical carrier, generating optical modulation sidebands. This shifts the RF signal spectrum information to the optical carrier frequency band, which is then fed into the back-end optical processor and photodetector, which then outputs the processed RF signal. Therefore, the performance of the silicon-based EOPM directly determines whether the overall system functions properly and its performance indicators are achieved.

[0049] Please refer to Figures 2 and 3. Figure 2 is a structural diagram of an existing silicon-based electro-optical phase modulator provided in an embodiment of the present application, and Figure 3 is a circuit diagram of an existing silicon-based electro-optical phase modulator driving method provided in an embodiment of the present application.

[0050] As shown in Figure 2, the device structure of a silicon-based electro-optic phase modulator is a cross-sectional structure cut perpendicular to the direction of light propagation. The silicon-based electro-optic phase modulator includes a single optical waveguide with an electro-optic modulation effect, namely, a PN junction formed in the middle of a ridge-type optical waveguide region, such as the P and N regions shown in Figure 2. A slab layer region away from the optical waveguide is connected to the upper traveling wave electrode through a metal via for loading the input RF signal. The slab layer region includes the P++ and N++ regions shown in Figure 2, which form a good ohmic contact with the metal via. It should be noted that the ridge-type optical waveguide region is ion-doped at a relatively low concentration, ranging from 2×1017 to 5×1017 cm-3, while the slab layer region is ion-doped at a higher concentration, ranging from 1×1020 to 2×1020 cm-3.

[0051] As shown in Figure 3, when the silicon-based electro-optic phase modulator is in operation, the carrier concentration in the silicon waveguide's PN junction region changes with the applied voltage under the action of the input voltage. This, in turn, causes the effective refractive index of the silicon waveguide to change due to the carrier dispersion effect of the silicon material. Simultaneously, an external DC bias tee (Bias-Tee) is used to combine the DC bias voltage with the RF input signal and apply it to the signal electrode of the silicon-based electro-optic phase modulator (such as the electrode connected to the N++ region). This places the PN junction (i.e., the ridge optical waveguide region) in a reverse bias state, with the P region connected to the negative electrode (e.g., ground) and the N region connected to the positive electrode (e.g., DC bias). This allows the majority of carriers to be pulled out of the silicon waveguide region under the action of the applied electric field, reducing carrier absorption losses of the optical carrier and the PN junction capacitance / resistance, thereby ensuring low insertion loss and high modulation bandwidth for the silicon-based electro-optic phase modulator.

[0052] However, the DC bias voltage, combined with the RF signal, is applied to the traveling-wave electrodes of the silicon-based electro-optical phase modulator. This voltage ultimately falls on the terminal matching resistor (resistor R shown in Figure 3, typically 50 ohms), generating DC current and contributing to static power consumption. For example, a 3V DC bias voltage can result in approximately 180mW of static power consumption.

[0053] In addition, since each silicon-based electro-optical phase modulator requires a separate DC bias tee to drive it, the presence of a Bias-Tee will significantly increase the device's electrical packaging cost in applications requiring a very large number of silicon-based electro-optical phase modulator channels. For example, in a wireless multiple-in-multiple-out (MIMO) uplink receive link based on microwave photonics technology, each antenna element receives a radio frequency signal that requires a silicon-based electro-optical phase modulator to convert the electrical signal into the optical frequency domain. The number of antenna elements = the number of silicon-based electro-optical phase modulators = the number of Bias-Tees required for packaging. Therefore, when the antenna is large, with 1024 channels or even more, the use of the driving method shown in Figure 3 above will result in very high packaging costs.

[0054] In this regard, an embodiment of the present application provides a silicon-based electro-optical phase modulator, which loads the DC bias voltage and the radio frequency signal at the sub-port, so that the DC bias voltage falls on both ends of the PN junction diode, rather than on both ends of the matching resistor of the existing solution. Therefore, the existence of the DC bias voltage will not generate static current, thereby avoiding the generation of static power consumption. Moreover, the large capacitance property of the cascaded second PN junction is utilized to realize the function of passing AC and isolating DC, and then the DC bias function can be directly realized on the silicon-based EOPM optical chip, avoiding the use of an external DC bias device, thereby reducing the packaging cost of the silicon-based EOPM array integrated chip. Moreover, the embodiment of the present application can be processed on the current standard silicon photonic process production line without making any process changes, thereby reducing the cost of change. Among them, for the specific implementation of the embodiment of the present application, please refer to the description of the following related embodiments, and the embodiment of the present application will not be repeated here.

[0055] Based on the technical issues raised above and to facilitate understanding of the embodiments of the present application, one of the electro-optical phase modulation systems on which the embodiments of the present application are based is described below.

[0056] Taking the electro-optical phase modulation system as the uplink receiving link of a wireless communication base station as an example, the use of silicon-based electro-optical phase modulators in the system, related equipment and workflow are illustrated.

[0057] Please refer to Figure 4, which is a schematic diagram of an electro-optical phase modulation system provided in an embodiment of the present application. As shown in Figure 4, the electro-optical phase modulation system includes a DC power supply, multiple antenna elements, and multiple silicon-based electro-optical phase modulators. It may also include multiple electrical amplifiers, multiple optical filters, and a back-end optical domain network.

[0058] Each antenna element is connected to a silicon-based electro-optical phase modulator, i.e., the antenna elements are connected to the silicon-based electro-optical phase modulators in a one-to-one correspondence, and each antenna element is configured to output a radio frequency signal to the corresponding silicon-based electro-optical phase modulator. In practical applications, the silicon-based electro-optical phase modulators can be integrated in a parallel array. Depending on the scale of the specific antenna array and the silicon photonics process capabilities, a chip-by-chip combination method can be used to meet the required number of channels, so that each antenna element is connected to a silicon-based electro-optical phase modulator. For example, as shown in Figure 4, multiple silicon-based electro-optical phase modulators can be provided by multiple EOPM array chips, each EOPM array chip including at least two silicon-based electro-optical phase modulators. Since the radio frequency signal and DC bias voltage in the silicon-based electro-optical phase modulator are input at separate terminals, and the DC bias voltage generates almost no static power consumption, the driving capability requirements of the DC power supply are extremely low. Therefore, the DC bias power supply pins in each EOPM array chip can be connected to the same DC power supply. That is, the silicon-based electro-optical phase modulators in each EOPM array chip are powered by the same DC power supply. In other embodiments, some or all of the multiple EOPM array chips can use the same DC power supply. For example, the DC power supply shown in FIG4 can output a DC bias voltage to the silicon-based electro-optical phase modulators in all EOPM array chips. This shared DC power supply approach significantly reduces the number of DC power supply circuits required, thereby lowering system costs, compared to existing solutions.

[0059] As shown in Figure 4, the air interface RF signal received by each antenna element is amplified by the corresponding electrical amplifier and input into the RF electrical pin of the corresponding silicon-based electro-optical phase modulator. The RF electrical pin can be connected to the first electrode in the silicon-based electro-optical phase modulator.

[0060] The silicon-based electro-optical phase modulator in the EOPM array chip outputs a double-sideband modulated optical signal to the corresponding optical filter. The optical filter retains one RF sideband and filters out the optical carrier and the other RF sideband. The electro-optical phase modulation system feeds the modulated optical signals, carrying the RF signals received by each antenna array, into the optical domain HBF processing network (shown in Figure 4), where amplitude and phase control are performed to achieve beamforming. Furthermore, the optical signal processed by the optical domain network can be input into a photodetector for conversion into an electrical signal. The electrical signal restored by the photodetector is then fed into the back-end intermediate RF link and baseband processing chain for final signal demodulation.

[0061] In addition, an embodiment of the present application further provides a chip, which includes a circuit and the silicon-based electro-optical phase modulator as described above and applied to the circuit.

[0062] Based on the structure of the electro-optical phase modulation system provided in the above embodiment, the following describes one of the silicon-based electro-optical phase modulators based on the embodiments of the present application.

[0063] An embodiment of the present application provides a silicon-based electro-optical phase modulator, comprising: a substrate, an optical waveguide layer and an electrode layer stacked on the substrate; the optical waveguide layer comprising a first doped region, a first PN junction and a second PN junction connected in series; the electrode layer comprising a first electrode, a second electrode and a third electrode; wherein the first PN junction is a convex structure, one end of the first PN junction is connected to the first doped region, and the other end of the first PN junction is connected to the second PN junction, and the carrier doping concentration of the first PN junction is less than the carrier doping concentration of the second PN junction and less than the carrier doping concentration in the first doped region; the first doped region is connected to the first electrode, and the first electrode is used to receive a radio frequency signal; an end of the second PN junction away from the first PN junction is connected to the second electrode, and the second electrode is used to be grounded; and an end of the second PN junction close to the first PN junction is connected to the third electrode, and the third electrode is used to receive a DC bias voltage.

[0064] Please refer to Figures 5A and 5B. Figure 5A is a schematic diagram of the top view of a silicon-based electro-optical phase modulator provided in an embodiment of the present application. Figure 5B is a schematic diagram of the cross-sectional structure of a silicon-based electro-optical phase modulator provided in an embodiment of the present application.

[0065] As shown in Figure 5A, direction 100 represents the direction of light wave propagation, and by cutting the electro-optic phase modulator along 200, a cross-sectional structural diagram as shown in Figure 5B can be obtained. As shown in Figure 5A, region 22 in the silicon-based electro-optic phase modulator is the first PN junction, which serves as the light-passing and electro-optical modulation region of the silicon-based electro-optic phase modulator. Region 23 is the second PN junction, which does not pass light and is used only as a diode. Its capacitance properties can achieve the function of passing AC and blocking DC. Region 21 is the first doped region. It should be noted that Figure 5A does not reflect the insulating dielectric portion 44 in the upper cladding layer 40 in Figure 5B.

[0066] 5B , the silicon-based electro-optic phase modulator includes: a substrate 10, an optical waveguide layer 20 and an electrode layer 30 stacked on the substrate. The substrate 10 includes a silicon base 11 and a buried oxide layer 12 for support.

[0067] The optical waveguide layer 20 includes a first doped region 21, a first PN junction 22, and a second PN junction 23 connected in series. One end of the first PN junction 22 is connected to the first doped region 21, and the other end of the first PN junction 22 is connected to the second PN junction 23. That is, the first PN junction 22 is disposed between the first doped region 21 and the second PN junction 23. The carrier doping concentration of the first PN junction 22 is lower than that of the second PN junction 23, and the carrier doping concentration of the first PN junction 22 is also lower than that of the first doped region 21. For example, the first doped region 21 is a highly doped region, the first PN junction 22 is a low-doped convex PN junction, and the second PN junction 23 is a highly doped PN junction. Among them, low-concentration doping means that the carrier doping concentrations of the P region and the N region are both between 2×1017 and 5×1017 cm-3, and high-concentration doping means that the carrier doping concentrations of the P region and the N region are both between 1×1020 and 2×1020 cm-3. This embodiment of the present application does not make specific limitations on this.

[0068] Please refer to Figures 6 and 7. Figure 6 is a schematic diagram comparing the capacitance values ​​of two PN junctions provided in an embodiment of the present application, and Figure 7 is a schematic diagram showing the voltage division ratio of two PN junctions provided in an embodiment of the present application. As shown in Figure 6, the capacitance value of the high-concentration doped PN junction is much greater than the capacitance value of the low-concentration doped PN junction under reverse bias. That is, the capacitance value of the first PN junction (Cpn1) is much smaller than the second PN junction (Cpn2) under reverse bias voltage. Therefore, as shown in Figure 7, the voltage division ratio of PN junction-1 (i.e., the first PN junction) is above 92%. That is, most of the voltage is applied to the first PN junction, i.e., the effective electro-optical modulation area, so that the first PN junction can effectively control the phase information of the optical carrier under the driving action of the input RF signal, generating optical modulation sidebands.

[0069] In other embodiments, please refer to FIG8 , which is a schematic diagram of the cross-sectional structure of another silicon-based electro-optical phase modulator provided in an embodiment of the present application. As shown in FIG8 , the second PN junction 23 may also be a convex PN junction. The embodiment of the present application does not specifically limit the shape of the second PN junction 23. Furthermore, it should be noted that when the second PN junction 23 is a convex structure, the capacitance value Cpn2 corresponding to the second PN junction 23 can be made much higher than the capacitance value Cpn1 corresponding to the first PN junction 22, thereby increasing the voltage divider ratio of the first PN junction 22 (i.e., the effective electro-optical modulation region) and reducing RF voltage loss.

[0070] The electrode layer 30 includes a first electrode 31, a second electrode 32, and a third electrode 33; wherein the first doped region 21 is connected to the first electrode 31; the end of the second PN junction 23 away from the first PN junction 22 is connected to the second electrode 32; wherein, when the first electrode 31 is used to receive radio frequency signals, the second electrode 32 is used for grounding; alternatively, when the first electrode 31 is used for grounding, the second electrode 32 is used for transmitting or receiving radio frequency signals; the end of the second PN junction 23 closer to the first PN junction 22 is connected to the third electrode 33, and the third electrode 33 is used for receiving a DC bias voltage. This embodiment of the present application and the following related embodiments illustrate a silicon-based electro-optical phase modulator using the example of a first electrode receiving radio frequency signals and a second electrode being grounded.

[0071] As shown in FIG5B and FIG8 above, an electrode (such as a third electrode) connected to the upper electrode layer for providing a reverse DC bias voltage is provided in the middle region where the two PN junctions are connected, that is, at one end of the second PN junction close to the first PN junction. This allows the carriers in the first PN junction to be pulled out of the silicon waveguide region (i.e., move in a direction away from the interface of the first PN junction) under the action of an external electric field, thereby reducing the absorption loss of the optical carrier by the carriers in the ridge region, while reducing the capacitance / resistance, thereby ensuring low insertion loss and high modulation bandwidth of the device.

[0072] In addition, please refer to Figures 9 and 10. Figure 9 is a circuit diagram of a silicon-based electro-optical phase modulator driving method provided in an embodiment of the present application, and Figure 10 is an equivalent circuit diagram of a silicon-based electro-optical phase modulator provided in an embodiment of the present application. As shown in Figure 9, since the input of the DC bias voltage and the RF signal are input at separate ends, and act on both ends of the PN junction through two different electrodes (the first electrode and the third electrode), the DC bias voltage will not ultimately drive the terminal resistance R of the silicon-based electro-optical phase modulator, thereby greatly reducing the static power consumption. PN junction-1 (i.e., the first PN junction) can effectively regulate the phase information of the optical carrier in the optical waveguide region under the driving action of the input RF signal to generate optical modulation sidebands. As shown in Figure 10 , using the silicon-based electro-optical phase modulator structure shown in Figure 8 , when the first type doping is P-type and the second type doping is N-type, based on circuit analysis principles, under the action of an AC high-frequency signal, VRF, the voltage divider of the resistors in the two PN junctions is much lower than the voltage divider of the capacitors. Therefore, the voltage divider effect of the first PN junction P region resistor R1P, the first PN junction N region resistor R1N, the second PN junction N region resistor R2N, and the second PN junction P region resistor R2P can be approximately ignored. Only the voltage divider effect of the capacitors Cpn1 and Cpn2 in the two PN junctions needs to be considered. PN junction-2 (i.e., the second PN junction) can function as a diode under a DC bias voltage. When a reverse bias voltage, VDC, is applied, its capacitive properties can be used to pass AC and block DC, while the inductive properties of the narrow metal wire of the third electrode can be used to pass DC and block AC. This allows the Bias-Tee function to be implemented directly on the silicon chip, eliminating the need for a separate DC bias device to drive each silicon-based electro-optical phase modulator. Therefore, the silicon-based electro-optic phase modulator provided in the embodiment of the present application can be driven by very little DC power to form an effective electro-optical modulation function.

[0073] In some embodiments, the silicon-based electro-optic phase modulator further comprises: an upper cladding layer stacked on the substrate. The upper cladding layer comprises a first metal via, a second metal via, and a third metal via. In other embodiments, the upper cladding layer further comprises an insulating dielectric portion.

[0074] As shown in FIG. 5B , the upper cladding layer 40 is disposed between the optical waveguide layer 20 and the electrode layer 30. This allows for electrical connection between the optical waveguide layer and the electrode layer via multiple metal vias in the upper cladding layer, resulting in good ohmic contact. In addition to the metal vias, the upper cladding layer also includes an insulating dielectric portion 44. For example, an end of the upper cladding layer 40 close to the substrate 10 is connected to the optical waveguide layer 20, and an end of the upper cladding layer 40 away from the substrate 10 is connected to the electrode layer 30. The upper cladding layer 40 includes a first metal via 41, a second metal via 42, and a third metal via 43. One end of the first metal via 41 is connected to the first doped region 21, and the other end of the first metal via 41 is connected to the first electrode 31. One end of the second metal via 42 is connected to an end of the second PN junction 23 away from the first PN junction 22, and the other end of the second metal via 42 is connected to the second electrode 32. One end of the third metal via 43 is connected to an end of the second PN junction 23 close to the first PN junction 22, and the other end of the third metal via 43 is connected to the third electrode 33.

[0075] In addition, it should be noted that the embodiments of the present application do not specifically limit the number of first metal vias 41, second metal vias 42, and third metal vias 43. For example, as shown in FIG. 5A , a silicon-based electro-optical phase modulator may include multiple first metal vias 41, multiple second metal vias 42, and multiple third metal vias 43.

[0076] It should also be noted that the embodiments of the present application do not impose any specific limitations on the shapes of the first metal vias 41, the second metal vias 42, and the third metal vias 43. For example, the shapes of the first metal vias 41, the second metal vias 42, and the third metal vias 43 in a plan view may be rectangular, square, circular, elliptical, triangular, polygonal, etc.

[0077] It should also be noted that the present embodiment does not impose any specific limitation on the material of the first metal via 41, the second metal via 42, and the third metal via 43. For example, the material may be a material with good electrical conductivity, such as copper.

[0078] In some embodiments, the first doped region and the end of the first PN junction close to the first doped region are doped with the first type; the end of the first PN junction close to the second PN junction is doped with the second type; the end of the second PN junction close to the first PN junction is doped with the second type; and the end of the second PN junction away from the first PN junction is doped with the first type.

[0079] The first doped region and the end of the first PN junction close to the first doped region are doped with the first type; the end of the first PN junction close to the second PN junction is doped with the second type; the end of the second PN junction close to the first PN junction is doped with the second type; and the end of the second PN junction away from the first PN junction is doped with the first type.

[0080] When the first type of doping is P-type, the second type of doping is N-type; when the first type of doping is N-type, the second type of doping is P-type. In the embodiment of the present application, the doping type at the junction of the first PN junction and the second PN junction is the same; the doping type at the junction of the first PN junction and the first doped region is also the same. Furthermore, since the silicon-based electro-optical phase modulator in the embodiment of the present application operates in a carrier depletion mode, that is, a DC bias voltage is applied to the third electrode to place the PN junction in a reverse bias state, and in the reverse bias state, the first PN junction is an effective electro-optical modulation region, and the second PN junction is a diode capacitance region. Therefore, depending on the type of carrier doping at the junction of the third electrode in the optical waveguide layer, the polarity of the DC bias voltage applied in the embodiment of the present application is also different. For example: when the first type of doping is P-type and the second type of doping is N-type, the applied DC bias voltage is a forward bias voltage. When the first type of doping is N-type and the second type of doping is P-type, the applied DC bias voltage is a reverse bias voltage.

[0081] In some embodiments, the first PN junction includes a ridge region, a first flat plate region, and a second flat plate region; one end of the ridge region is connected to the first flat plate region, and the other end of the ridge region is connected to the second flat plate region; one end of the first flat plate region away from the ridge region is connected to the first doped region; and one end of the second flat plate region away from the ridge region is connected to the second PN junction.

[0082] As shown in FIG5B , the first PN junction 22 has a convex structure, wherein the raised portion is a ridge region 221 of the first PN junction. One end of the ridge region 221 is connected to the first slab region 222, and the other end of the ridge region 221 is connected to the second slab region 223. Ridge region 221 is a ridge silicon optical waveguide region. Based on the carrier dispersion effect of the silicon material, the effective refractive index of the silicon waveguide changes with changes in the applied voltage (i.e., changes in the RF signal). This change in the effective refractive index causes the phase information of the light wave passing through the silicon waveguide to change, thereby achieving a phase modulation effect on the optical signal. Furthermore, under the action of an applied electric field (DC bias voltage), carriers in ridge region 221 migrate away from the PN junction interface, thereby reducing the absorption loss of the optical carrier by the carriers in the ridge region, while also reducing the capacitance / resistance, ensuring low insertion loss and high modulation bandwidth of the device.

[0083] In some embodiments, the first slab region and the end of the ridge region connected to the first slab region are doped with the first type of doping; the second slab region and the end of the ridge region connected to the second slab region are doped with the second type of doping.

[0084] As shown in FIG5B and FIG8 , the first slab region 222 and the end of the ridge region 221 connected to the first slab region 222 are doped with the first type of dopant; the second slab region 223 and the end of the ridge region 221 connected to the second slab region 223 are doped with the second type of dopant. Two different doping types exist in the ridge region 221 of the first PN junction 22, forming a PN junction in the ridge region 221, thereby achieving electro-optical modulation.

[0085] In other embodiments, when the second PN junction 23 as shown in FIG8 is a convex structure, the corresponding second PN junction 23 may also include a second PN junction ridge region 231, a third slab region 232, and a fourth slab region 233. The third slab region 232 is provided at one end of the second PN junction ridge region 231 and connected to the second slab region 223, and the fourth slab region 233 is provided at the other end of the second PN junction ridge region 231. The end of the second PN junction ridge region 231 connected to the third slab region 232 is doped with the second type of dopant; the fourth slab region 233 and the end of the second PN junction ridge region 231 connected to the fourth slab region 233 are doped with the first type of dopant.

[0086] In some embodiments, the optical waveguide layer further includes: a second doped region and a third doped region; one end of the second doped region is connected to the first doped region, and the other end of the second doped region is connected to the first PN junction; one end of the third doped region is connected to the first PN junction, and the other end of the third doped region is connected to the second PN junction; the carrier doping concentration in the second doped region and the carrier doping concentration in the third doped region are both lower than the carrier doping concentration in the first doped region; and the carrier doping concentration in the second doped region and the carrier doping concentration in the third doped region are both higher than the carrier doping concentration in the first PN junction.

[0087] Taking the structure shown in FIG8 as an example, please refer to FIG11, which is a schematic diagram of the cross-sectional structure of another silicon-based electro-optical phase modulator provided in an embodiment of the present application. As shown in FIG11, the optical waveguide layer further includes: a second doped region 24 and a third doped region 25; one end of the second doped region 24 is connected to the first doped region 21, and the other end of the second doped region 24 is connected to the first PN junction 22; one end of the third doped region 25 is connected to the first PN junction 22, and the other end of the third doped region 25 is connected to the second PN junction 23. The carrier doping concentration in the second doped region 24 and the carrier doping concentration in the third doped region 25 are both lower than the carrier doping concentration in the first doped region 21; and the carrier doping concentration in the second doped region 24 and the carrier doping concentration in the third doped region 25 are both higher than the carrier doping concentration in the first PN junction 22.

[0088] Exemplarily, the second doped region 24 and the third doped region 25 are medium-concentration doped, where medium-concentration doping means that the P-type or N-type carrier doping concentration is between 1×1019 and 5×1019 cm-3. That is, the carrier doping concentration of the second doped region and the third doped region is intermediate between the adjacent regions. The present embodiment utilizes medium-concentration doping as a transition between the low- and high-doping concentration regions, thereby reducing absorption losses of the optical field within the ridge silicon optical waveguide caused by high-concentration doping.

[0089] In addition, it should be noted that the carrier doping type of the second doping region 24 is the first type doping, and the carrier doping type of the third doping region 25 is the second type doping.

[0090] In some embodiments, the width of the third electrode is less than 10 microns. In the embodiment of the present application, the width of the third electrode is set to a narrower value. For example, the width of the third electrode is set to less than 10 microns, so that the third electrode can be used as a DC inductor during operation. Moreover, the inductance properties embodied by the narrow metal wire of the third electrode cooperate with the capacitance properties embodied by the second PN junction after applying a reverse bias voltage, which can directly realize the function of Bias-Tee, thereby avoiding the need for an additional separate external electrical Bias-Tee to drive each silicon-based electro-optical phase modulator, thereby reducing the packaging cost of the device. In addition, it should be noted that the width of the third electrode refers to the width along the 200 direction as shown in Figure 5A above or Figure 12 below, and the length of the third electrode is the length along the 100 direction.

[0091] In some embodiments, the silicon-based electro-optical phase modulator further includes an inductor connected to the third electrode.

[0092] Taking the structure shown in FIG11 as an example, please refer to FIG12, which is a schematic diagram of a top view of another silicon-based electro-optical phase modulator provided in an embodiment of the present application. As shown in FIG12, in order to further increase the value of the inductor L and enhance the isolation effect of the DC end on the AC signal, the silicon-based electro-optical phase modulator further includes an inductor 50, and the inductor 50 is connected to the third electrode 33. It should be noted that in the direction perpendicular to the substrate, the inductor 50 and the third electrode are located on the same layer. The inductor 50 can further enhance the isolation effect of the DC end on the AC signal. For example, as shown in FIG12, the inductor can be connected to one end of the third electrode. It should be noted that the embodiment of the present application does not specifically limit the shape and size of the inductor 50. For example, the inductor 50 can adopt a metal trace with a structure similar to a spiral or folded shape to reduce the size of the inductor.

[0093] In summary, the embodiment of the present application provides a silicon-based electro-optical phase modulator that can reduce the static power consumption and packaging cost of the EOPM device. Specifically, the silicon-based electro-optical phase modulator includes a substrate, and an optical waveguide layer and an electrode layer stacked on the substrate. The optical waveguide layer includes a high-concentration doped region (i.e., a first doped region) and two PN junctions connected in series, i.e., a first PN junction and a second PN junction. One of the two PN junctions is a low-concentration doped convex PN junction (such as the first PN junction), and the other is a high-concentration doped PN junction (such as the second PN junction). The other end of the low-concentration doped convex PN junction is also connected to a high-concentration doped region (such as the first doped region). The outsides of the two PN junctions (i.e., the ends of the first doped region and the second PN junction away from the first PN junction) are respectively connected to a signal electrode (such as the first electrode) and a grounded ground electrode (such as the second electrode) in the upper electrode layer as the input radio frequency signal. The above-mentioned silicon-based electro-optical phase modulator realizes the sub-port input loading of RF signal and DC bias, and is isolated from each other by capacitors or inductors, so there will be no mutual coupling influence, and the DC bias function is realized on the chip without the need for an external DC bias device. At the same time, compared with the prior art, the voltage drop of the DC bias voltage in the embodiment of the present application falls on the second PN junction diode. Since the current of the diode is very weak under reverse bias, no electrical power consumption is generated, and the driving capability requirement for the DC power supply is extremely low. Therefore, in the application scenario where the system requires large-scale arrayed silicon-based electro-optical phase modulator integration, multiple silicon-based electro-optical phase modulators can share a DC power supply, such as the connection method shown in Figure 4 above, to reduce the scale of the peripheral circuit and the packaging cost.

[0094] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions and modules involved are not necessarily required by this application.

[0095] In the several embodiments provided in this application, it should be understood that the disclosed devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the above-mentioned units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.

[0096] The units described above as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0097] In addition, the functional units in the embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0098] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling a computer device (which can be a personal computer, a server or a network device, etc., specifically a processor in a computer device) to execute all or part of the steps of the above-mentioned methods of each embodiment of the present application. Among them, the aforementioned storage medium may include: U disk, mobile hard disk, magnetic disk, optical disk, read-only memory (Read-Only Memory, abbreviated: ROM) or random access memory (Random Access Memory, abbreviated: RAM) and other media that can store program codes.

[0099] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A silicon-based electro-optical phase modulator, characterized in that: The silicon-based electro-optic phase modulator comprises: a substrate, an optical waveguide layer and an electrode layer stacked on the substrate; the optical waveguide layer comprises a first doped region, a first PN junction and a second PN junction connected in series; the electrode layer comprises a first electrode, a second electrode and a third electrode; wherein, The first PN junction is a convex structure, one end of the first PN junction is connected to the first doped region, the other end of the first PN junction is connected to the second PN junction, and the carrier doping concentration of the first PN junction is less than the carrier doping concentration of the second PN junction, and less than the carrier doping concentration in the first doped region; The first doped region is connected to the first electrode, and one end of the second PN junction away from the first PN junction is connected to the second electrode, wherein the first electrode is used to receive a radio frequency signal and the second electrode is used to be grounded; or the first electrode is used to be grounded and the second electrode is used to receive a radio frequency signal; One end of the second PN junction close to the first PN junction is connected to the third electrode, and the third electrode is used to receive a DC bias voltage.

2. The silicon-based electro-optic phase modulator according to claim 1, characterized in that: The first doped region and one end of the first PN junction close to the first doped region are doped with the first type; and one end of the first PN junction close to the second PN junction is doped with the second type; One end of the second PN junction close to the first PN junction is doped with the second type; and one end of the second PN junction far from the first PN junction is doped with the first type.

3. The silicon-based electro-optic phase modulator according to claim 1 or 2, characterized in that: The first PN junction includes a ridge region, a first plate region, and a second plate region; one end of the ridge region is connected to the first plate region, and the other end of the ridge region is connected to the second plate region; One end of the first flat plate region away from the ridge region is connected to the first doped region; and one end of the second flat plate region away from the ridge region is connected to the second PN junction.

4. The silicon-based electro-optic phase modulator according to claim 3, characterized in that: The first slab region and the end of the ridge region connected to the first slab region are doped with the first type; The second slab region and one end of the ridge region connected to the second slab region are doped with the second type of doping.

5. The silicon-based electro-optic phase modulator according to any one of claims 1 to 4, characterized in that: The silicon-based electro-optic phase modulator further comprises: an upper cladding layer stacked on the substrate, wherein one end of the upper cladding layer close to the substrate is connected to the optical waveguide layer, and one end of the upper cladding layer far from the substrate is connected to the electrode layer; the upper cladding layer comprises a first metal through hole, a second metal through hole and a third metal through hole; One end of the first metal through hole is connected to the first doped region, and the other end of the first metal through hole is connected to the first electrode; One end of the second metal through hole is connected to an end of the second PN junction far away from the first PN junction, and the other end of the second metal through hole is connected to the second electrode; One end of the third metal through hole is connected to an end of the second PN junction close to the first PN junction, and the other end of the third metal through hole is connected to the third electrode.

6. The silicon-based electro-optic phase modulator according to any one of claims 1 to 5, characterized in that: The optical waveguide layer further includes: a second doped region and a third doped region; one end of the second doped region is connected to the first doped region, and the other end of the second doped region is connected to the first PN junction; one end of the third doped region is connected to the first PN junction, and the other end of the third doped region is connected to the second PN junction; The carrier doping concentration in the second doping region and the carrier doping concentration in the third doping region are both lower than the carrier doping concentration in the first doping region; and the carrier doping concentration in the second doping region and the carrier doping concentration in the third doping region are both higher than the carrier doping concentration in the first PN junction.

7. The silicon-based electro-optic phase modulator according to any one of claims 1 to 6, characterized in that: The width of the third electrode is less than 10 micrometers.

8. The silicon-based electro-optic phase modulator according to claim 7, characterized in that: The silicon-based electro-optic phase modulator further includes an inductor connected to the third electrode.

9. A chip, characterized in that: The invention comprises a circuit and a silicon-based electro-optic phase modulator as claimed in any one of claims 1 to 8 applied to the circuit.

10. An electro-optic phase modulation system, characterized in that: It comprises a DC power supply, a plurality of antenna elements and a plurality of silicon-based electro-optical phase modulators as claimed in any one of claims 1 to 8; Among them, each of the antenna arrays is connected to one of the silicon-based electro-optical phase modulators, and each of the antenna arrays is used to output a radio frequency signal to the corresponding silicon-based electro-optical phase modulator. The DC power supply is connected to the multiple silicon-based electro-optical phase modulators, and the DC power supply is used to provide a DC bias voltage to each of the silicon-based electro-optical phase modulators.

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