Feed-forward lithography adjustment method for photonic devices that correlates optical performance to wafer correction data

Abstract

A lithography method includes exposing a photoresist layer located over an in-process photonic structure to radiation through a mask in an exposure unit, generating wafer correction data for the exposure unit, mapping optical performance of the photonic structure to the generated wafer correction data to generate adjustment data, and making predictive corrections to the exposure unit based on the generated adjustment data.

Description

FEED-FORWARD LITHOGRAPHY ADJUSTMENT METHOD FOR PHOTONIC DEVICES THAT CORRELATES OPTICAL PERFORMANCE TO WAFER CORRECTION DATAFIELD

[0001] The present disclosure relates to lithography methods in general, and in particular to photonic device lithography methods which correlate optical performance to wafer correction data, and an apparatus using the same.BACKGROUND

[0002] A lithographic scanner may adjust expose dose and focus for each die on a wafer. However, this is typically only used to qualify the lithography process window, build optical proximity correction (OPC) models, or run experiments.SUMMARY

[0003] According to an aspect of the present disclosure, a lithography method includes exposing a photoresist layer located over an in-process photonic structure to radiation through a mask in an exposure unit, generating wafer correction data for the exposure unit, mapping optical performance of the photonic structure to the generated wafer correction data to generate adjustment data, and making predictive corrections to the exposure unit based on the generated adjustment data.

[0004] According to an aspect of the present disclosure, a lithographic scanner comprises an exposure unit configured to expose a photonic structure, a predictive correction unit (PCU) configured to make predictive corrections to the exposure unit, a metrology tool coupled to the exposure unit configured to generate wafer correction data; and a correction adjustment unit configured to map optical performance to the generated wafer correction data to generate PCU adjustment data to adjust the predictive correction unit.BRIEF DESCRIPTION OF THE DRAWINGS

[0005] For a better understanding of the various described embodiments, reference should be made to the Detailed Description below, in conjunction with the following drawings in which like reference numerals refer to corresponding parts throughout the Figures.

[0006] FIG. 1 is a schematic view of a lithographic scanner 100 according to one or more embodiments.

[0007] FIG. 2 is a schematic view of a lithographic scanner 100 having a first alternative design according to one or more embodiments.

[0008] FIG. 3 is a detailed schematic view of the correction adjustment unit 140 according to one or more embodiments.

[0009] FIG. 4 is a flow chart illustrating a lithographic scanning method according to one or more embodiments.DETAILED DESCRIPTION

[0010] As discussed above, the embodiments of the present disclosure are directed to a photonic device photolithography method which maps optical performance to wafer correction data, and a lithographic scanner apparatus which performs the lithography method, the various aspects of which are discussed herein in detail. The drawings are not necessarily drawn to scale. Multiple instances of an element may be duplicated where a single instance of the element is illustrated, unless absence of duplication of elements is expressly described or clearly indicated otherwise. Ordinals such as “first,” “second,” and “third” are employed merely to identify similar elements, and different ordinals may be employed across the specification and the claims of the instant disclosure. The same reference numerals refer to the same element or similar element. Unless otherwise indicated, elements having the same reference numerals are presumed to have the same composition. As used herein, a first element located “on” a second element can be located on the exterior side of a surface of the second element or on the interior side of the second element. As used herein, a first element is located “directly on” a second element if there exist a physical contact between a surface of the first element and a surface of the second element. As used herein, a “layer” refers to a continuous portion of at least one material including a region having a thickness. A layer may consist of a single material portion having a homogeneous composition, or may include multiple material portions having different compositions.

[0011] As used herein, a “conductive material” refers to a material having electrical conductivity greater than 1.0 x 105S / cm. As used herein, an “insulator material” or a “dielectric material” refers to a material having electrical conductivity less than 1.0 x 10‘5S / cm. As used herein, a “semiconducting material” refers to a material having electrical conductivity in the range from 1.0 x 10"5S / cm to 1.0 x 105S / cm. As used herein, a “metallic material” refers to a conductive material including at least one metallic element therein. All measurements for electrical conductivities are made at the standard condition.

[0012] A typical dose control system for a lithographic scanner may include a real-time graphical user interface (GUI) that allows the user to decide dose map configuration and exposure sensitivity to maintain the critical dimension uniformity (CDU) across the exposure field and wafer. These dose control systems may implement real time control of production to improve yield. The systems may allow for in-die, across wafer control of dose based on sampling rate. However, while control of dose and focus across wafer on a die-to-die basis may be an available capability on leading edge lithography scanners, a system and method for implementation for solid state photonic devices (e.g., waveguides, optical switches, such as interferometers, etc.) is not defined.

[0013] An embodiment of the present disclosure may provide a system for across-wafer lithography feed-forward correction by pre-programmed dose and / or focus adjustment for solid state photonic devices, such as photonic devices formed on silicon wafers. Such photonic devices, especially those used for quantum computing, cannot rely on traditional metrology data sources (e.g., gratings) given that such devices are optically tested for optical performance (e.g., optical switching, optical transmission, etc.), rather than electrically tested for electrical performance (e.g., transistor operating speed, memory device reading, erasing, reading, etc.) for convention silicon logic or silicon memory devices. Advanced Process Correction (APC) may provide global adjustment to dose and focus for the entire wafer based on incoming and / or outgoing metrology from the lithographic scanner. By mapping optical performance to traditional in-fab metrology tools and by continually updating that mapping, a degree of APC can be realized which encompasses optical performance.

[0014] FIG. 1 is a schematic view of a lithographic scanner 100 according to one or more embodiments. As illustrated in FIG. 1, the lithographic scanner 100 may include an exposure unit 110. The exposure unit 110 may include, for example, a radiation source such as an ultraviolet emitting lamp (e.g., LED or mercury lamp) or laser, or an X-ray emitter for X-ray lithography, for exposing a structure 10, such as a photonic structure (e.g., silicon photonic die) in a lithographic process. The structure 10 typically includes a substrate, such as a wafer (e.g., silicon wafer, etc.).

[0015] The lithographic scanner 100 may also include a predictive correction unit (PCU) 120 for making predictive corrections to the exposure unit 110. The predictive corrections may include, for example, corrections regarding dose and / or focus of the exposure unit 110. The PCU 120 may include any suitable logic device, such as a special purpose device (e.g., an application specific integrated circuit (ASIC)) or a general purpose computer. The PCU 120 may also include a memory device which stores data, such as correction tables.

[0016] The lithographic scanner 100 may also include a metrology tool 130 coupled to the exposure unit 110. The metrology tool 130 may generate wafer correction data that may typically be used to make adjustments to the exposure unit 110. The generated wafer correction data may include, for example, interwafer correction data and / or intrawafer correction data.

[0017] The lithographic scanner 100 may also include a correction adjustment unit (CAU) 140 coupled to the metrology tool 130. The correction adjustment unit 140 may map optical performance to the generated wafer correction data. Based on the mapping, the correction adjustment unit 140 may generate PCU adjustment data for adjusting the predictive correction unit 120.

[0018] The PCU adjustment data may include, for example, dose adjustment data for making an in-die dose correction and / or focus adjustment data for making in-die focus correction. The PCU adjustment data may also include, for example, critical dimension correction data for the photonic structure 10. In at least one embodiment, the predictive correction unit 120 may apply the in-die dose correction based on a type of the photonic structure 10 (e.g., source, waveguide, block, etc.). In at least one embodiment, the predictive correction unit 120 may apply the in-die focus correction based on the type of the photonics structure 10 in addition to or instead of the dose correction.

[0019] The CAU 140 may include any suitable logic device, such as a special purpose device (e.g., an application specific integrated circuit (ASIC)) or a general purpose computer. The CAU 140 may also include a memory device which stores data, such as correction tables.

[0020] The PCU 120 and CAU 140 may comprise the same device (e.g., a general purpose computer) which performs the functions of the PCU 120 and the CAU 140, or separate devices which transfer data between them via a wired and / or wireless data connection. In one embodiment, the PCU 120 and / or the CAU 140 may be implemented by a computer, server, etc. including a processing device such as a central processing unit (CPU), microprocessor, etc., and a memory device (e.g., random access memory (RAM), read-only memory (ROM), etc.). The memory device may store data and programs including instructions form performing operations in the PCU 120 and / or CAU 140. The processing device may access the data and programs in the memory device, and execute the program instructions in order to perform various methods described herein.

[0021] FIG. 2 is a schematic view of a lithographic scanner 100 having a first alternative design according to one or more embodiments. As illustrated in FIG. 2, in the first alternative design, the predictive correction unit 120 may receive incoming design data,structural decomposition data and structural component requirement mapping data as input. The exposure unit 110 may perform, for example, wafer exposure at level "x". The metrology tool 130 may perform metrology of the level "x" (e.g., critical dimension, line edge roughness, etc.) and generate correlation data. The correction adjustment unit 140 may generate PCU adjustment data based on the wafer correction data from the metrology tool 130, and feed the PCU adjustment data forward to the predictive correction unit 120 for adjusting the predictive correction unit 120. The correction adjustment unit 140 may also generate feedback data that is combined with the correlation data from the metrology tool 130, and fed back to the exposure unit 110.

[0022] FIG. 3 is a detailed schematic view of the correction adjustment unit 140 according to one or more embodiments. As illustrated in FIG. 3, the correction adjustment unit 140 may include a scanning electron microscope-based (SEM-based) fast correction loop and optically-based slow correction loop. In particular, the correction adjustment unit 140 may include an optical testing section 141 that may map optical performance to the generated wafer correction data from the metrology tool 130. The optical testing section may also continually update the mapping of the optical performance to the generated wafer correction data. The optical testing section 141 may perform, for example, full processing and then optical testing on the results of the full processing. In addition or alternatively, the optical testing section 141 may include a possible decorrelative data stream in which short loop processing is performed and then optical testing is performed on the results of the short loop processing.

[0023] The correction adjustment unit 140 may also include a combined data analysis and deconvolution section 142 that receives an output (e.g., optical testing output) from the optical testing section 141. The combined data analysis and deconvolution section 142 may perform data analysis and deconvolution on the output and generate the correction adjustment data to be fed forward to the predictive correction unit 120. The combined data analysis and deconvolution section 142 may also generate feedback data to be fed back to the exposure unit 110.

[0024] In at least one embodiment, the PCU adjustment data may include, for example, in-die correction data, across-wafer correction data, between-lot correction data and / or bylevel correction data for improving optical performance utilizing dose and focus tuning. The PCU adjustment data may further include optically aware, optical proximity correction (OPC) data and design correction data based on critical component design. The PCU adjustmentdata may further include a diagnostic short loop data thread to disentangle integration versus patterning performance.

[0025] In at least one embodiment, in the lithographic scanner 100, optical testing may be correlated (e.g., in the correction adjustment unit 140) to the traditional output of inter / intrawafer corrections to provide feedforward for critical dimension (CD) correction of critical optical components. Further, in-die dose / focus corrections may be applied based on the type of structure to be controlled (e.g., source vs. waveguide vs. block).

[0026] Further, the lithographic scanner 100 may provide an optically calibrated APC thread. The APC thread may be created to control CD, line edge roughness (LER), line width roughness (LWR) and / or CDU based on critical structure and in-die / wafer position. Optical performance may be mapped (e.g., in the correction adjustment unit 140) to inline CD / LER / LWR / CDU performance. Optical performance data may be deconvolved (e.g., in the combined data analysis and deconvolution section 142) by critical component and OPC / design corrections may be made prior to mask fabrication. Since critical structures (sources vs. delay lines) may typically be segregated on a photonic integrated circuit (e.g., photonic 1C die or PIC die), localized dose / focus adjustments can be used to independently tune each.

[0027] The APC thread may be controlled, for example, via the optical measurements (master correction, slow loop). An inline scanning electron microscope (SEM) may be used as the fast correction loop based on SEM-optical matching. SEM-optical performance mapping may be continually updated. The SEM may be used to drive APC corrections based on critical component type, and maintain current, in-fab process control flow. A short loop (e.g., in the optical testing section 141) may contain only the critical optical structures and may be invoked to deconvolve the complexity of the APC thread.

[0028] Thus, the lithographic scanner 100 may, therefore, provide a process control loop with SEM-based fast correction loop and optically-based slow correction loop. The lithographic scanner 100 may further provide a within-die, across-wafer, between-lot, and bylevel correction for improving optical performance utilizing dose and focus tuning. The lithographic scanner 100 may further provide optically aware, OPC and design correction based on critical component design. The lithographic scanner 100 may also provide a diagnostic short loop data thread to disentangle integration versus patterning performance.

[0029] Advantages of the embodiments of the lithographic scanner may include (but are not limited to) improved process control of critical optical structures by utilizing within-die and die-to-die lithography control to drive optical performance. Other advantages of theembodiments of the lithographic scanner 100 may include isolated critical component process control, OPC and dose and / or focus tuning.

[0030] The embodiment lithographic scanner 100 may used in photolithography during manufacture of photonic devices, such as silicon photonic devices, optical telecommunication devices, augmented reality (AR) devices or virtual reality (VR) devices by improving product performance and yield.

[0031] FIG. 4 is a flow chart illustrating a photolithography method according to one or more embodiments. The method may be performed, for example, using the lithographic scanner 100 described above. Step 410 includes exposing a photonic structure using an exposure unit. Step 420 includes generating wafer correction data for the exposure unit. Step 430 includes mapping optical performance to the generated wafer correction data to generate adjustment data. Step 440 includes making predictive corrections to the exposure unit based on the generated adjustment data.

[0032] The following are example embodiments.

[0033] Example 1. A lithography method comprises: exposing a photoresist layer located over an in-process photonic structure to radiation through a mask in an exposure unit; generating wafer correction data for the exposure unit; mapping optical performance of the photonic structure to the generated wafer correction data to generate adjustment data; and making predictive corrections to the exposure unit based on the generated adjustment data.

[0034] Example 2. The method of example 1, wherein the adjustment data comprises at least one of dose adjustment data for making an in-die radiation exposure dose correction or focus adjustment data for making an in-die focus correction.

[0035] Example 3. The method of examples 1 or 2, wherein: the in-die radiation exposure dose correction is applied based on a type of the photonic structure; and the in-die focus correction is applied based on the type of the photonic structure.

[0036] Example 4. The method of any of examples 1-3, wherein the mapping of the optical performance to the generated wafer correction data is continually updated.

[0037] Example 5. The method of any of examples 1-4, wherein the generated wafer correction data comprises at least one of interwafer correction data or intrawafer correction data.

[0038] Example 6. The method of any of examples 1-5, wherein the adjustment data comprises critical dimension correction data for the photonic structure.

[0039] Example 7. The method of any of examples 1-6, wherein the mapping the optical performance to the generated wafer correction data is performed using a scanning electron microscope-based fast correction loop and an optically-based slow correction loop.

[0040] Example 8. The method of any of examples 1-7, wherein the adjustment data comprises at least one of in-die correction data, across-wafer correction data, between-lot correction data or by-level correction data.

[0041] Example 9. The method of any of examples 1-8, wherein the adjustment data comprises optical proximity correction data and design correction data based on a design of the photonic structure.

[0042] Example 10. The method of any of examples 1-9, wherein the adjustment data comprises a diagnostic short loop data thread to disentangle integration versus patterning performance.

[0043] Example 11. A lithographic scanner, comprises: an exposure unit configured to expose a photonic structure; a predictive correction unit (PCU) configured to make predictive corrections to the exposure unit; a metrology tool coupled to the exposure unit configured to generate wafer correction data; and a correction adjustment unit configured to map optical performance to the generated wafer correction data to generate PCU adjustment data to adjust the predictive correction unit.

[0044] Example 12. The lithographic scanner of example 11, wherein the PCU adjustment data comprises at least one of dose adjustment data for making an in-die radiation exposure dose correction or focus adjustment data for making an in-die focus correction.

[0045] Example 13. The lithographic scanner of examples 11 or 12, wherein: the predictive correction unit applies the in-die radiation exposure dose correction based on a type of the photonic structure; and the predictive correction unit applies the in-die focus correction based on the type of the photonic structure.

[0046] Example 14. The lithographic scanner of any of examples 11-13, wherein the optical testing unit continually updates the mapping of the optical performance to the generated wafer correction data.

[0047] Example 15. The lithographic scanner of any of examples 11-14, wherein the generated wafer correction data comprises at least one of interwafer correction data or intrawafer correction data.

[0048] Example 16. The lithographic scanner of any of examples 11-15, wherein the PCU adjustment data comprises critical dimension correction data for the photonic structure.

[0049] Example 17. The lithographic scanner of any of examples 11-16, wherein the correction adjustment unit comprises a scanning electron microscope-based fast correction loop and an optically-based slow correction loop.

[0050] Example 18. The lithographic scanner of any of examples 11-17, wherein the PCU adjustment data comprises at least one of in-die correction data, across-wafer correction data, between-lot correction data or by-level correction data.

[0051] Example 19. The lithographic scanner of any of examples 11-18, wherein the PCU adjustment data comprises optical proximity correction (OPC) data and design correction data based on a design of the photonic structure.

[0052] Example 20. The lithographic scanner of any of examples 11-19, wherein the PCU adjustment data comprises a diagnostic short loop data thread to disentangle integration versus patterning performance.

[0053] The preceding description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the following claims and the principles and novel features disclosed herein.

Claims

CLAIMS1. A lithography method, comprising: exposing a photoresist layer located over an in-process photonic structure to radiation through a mask in an exposure unit; generating wafer correction data for the exposure unit; mapping optical performance of the photonic structure to the generated wafer correction data to generate adjustment data; and making predictive corrections to the exposure unit based on the generated adjustment data.

2. The method of claim 1 , wherein the adjustment data comprises at least one of dose adjustment data for making an in-die radiation exposure dose correction or focus adjustment data for making an in-die focus correction.

3. The method of claim 2, wherein: the in-die radiation exposure dose correction is applied based on a type of the photonic structure; and the in-die focus correction is applied based on the type of the photonic structure.

4. The method of claim 1 , wherein the mapping of the optical performance to the generated wafer correction data is continually updated.

5. The method of claim 1, wherein the generated wafer correction data comprises at least one of interwafer correction data or intrawafer correction data.

6. The method of claim 1 , wherein the adjustment data comprises critical dimension correction data for the photonic structure.

7. The method of claim 1 , wherein the mapping the optical performance to the generated wafer correction data is performed using a scanning electron microscope-based fast correction loop and an optically-based slow correction loop.

8. The method of claim 1, wherein the adjustment data comprises at least one of in-die correction data, across-wafer correction data, between-lot correction data or by-level correction data.

9. The method of claim 1 , wherein the adjustment data comprises optical proximity correction data and design correction data based on a design of the photonic structure.

10. The method of claim 1 , wherein the adjustment data comprises a diagnostic short loop data thread to disentangle integration versus patterning performance.

11. A lithographic scanner, comprising: an exposure unit configured to expose a photonic structure; a predictive correction unit (PCU) configured to make predictive corrections to the exposure unit; a metrology tool coupled to the exposure unit configured to generate wafer correction data; and a correction adjustment unit configured to map optical performance to the generated wafer correction data to generate PCU adjustment data to adjust the predictive correction unit.

12. The lithographic scanner of claim 11 , wherein the PCU adjustment data comprises at least one of dose adjustment data for making an in-die radiation exposure dose correction or focus adjustment data for making an in-die focus correction.

13. The lithographic scanner of claim 12, wherein: the predictive correction unit applies the in-die radiation exposure dose correction based on a type of the photonic structure; and the predictive correction unit applies the in-die focus correction based on the type of the photonic structure.

14. The lithographic scanner of claim 11 , wherein the optical testing unit continually updates the mapping of the optical performance to the generated wafer correction data.

15. The lithographic scanner of claim 11, wherein the generated wafer correction data comprises at least one of interwafer correction data or intrawafer correction data.

16. The lithographic scanner of claim 11 , wherein the PCU adjustment data comprises critical dimension correction data for the photonic structure.

17. The lithographic scanner of claim 11 , wherein the correction adjustment unit comprises a scanning electron microscope-based fast correction loop and an optically-based slow correction loop.

18. The lithographic scanner of claim 11, wherein the PCU adjustment data comprises at least one of in-die correction data, across-wafer correction data, between-lot correction data or by-level correction data.

19. The lithographic scanner of claim 11, wherein the PCU adjustment data comprises optical proximity correction (OPC) data and design correction data based on a design of the photonic structure.

20. The lithographic scanner of claim 11 , wherein the PCU adjustment data comprises a diagnostic short loop data thread to disentangle integration versus patterning performance.

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