Display panel and display device

Abstract

A display panel and a display device. The display panel comprises a substrate, a plurality of driving electrodes disposed on the substrate, a plurality of conductive units, and a plurality of light emitting chips; each light emitting chip comprises a main body and two chip electrodes located on the side of the main body close to the substrate, and the chip electrodes are electrically connected to the conductive units in a one-to-one correspondence manner; and the side of at least one conductive unit away from the substrate is provided with first matching structures, and the chip electrode corresponding to the conductive unit is provided with second matching structures fitted to the first matching structures.

Description

Display panel and display device

[0001] This application claims priority to Chinese patent application No. 202311632968.1 filed on November 29, 2023, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0003] Compared with the LCD (Liquid Crystal Display) technology and OLED (Organic Light-Emitting Diode) technology that have been mass-produced, Micro-LED (Micro-Light-Emitting Diode Display) technology has significant advantages in brightness, contrast, reliability, response speed, lifespan, transparency, etc., making it a very popular new display technology.

[0004] Micro-LED technology is a technology that forms a Micro-LED display by transferring a large number of LEDs (Light-Emitting Diodes) below 50μm to a substrate, and then using bonding technology to achieve electrical connection with the substrate.

[0005] The commonly used metal bonding process currently involves pre-preparing eutectic bonding solder on the chip electrodes of Micro-LEDs or the driving electrodes of TFT (Thin-Film Transistors) substrates. The solder and electrodes are then heat-pressed to form a eutectic interface, achieving electrical connection between the substrate and Micro-LEDs. However, the contact area between the solder and electrodes in this process is small, making poor bonding more likely to occur, leading to lamp failure or non-illumination, which in turn affects the display quality. SUMMARY OF THE INVENTION

[0006] The purpose of the present application is to provide a display panel and a display device, which can solve the problem that the contact area between the solder and the electrode is small, poor bonding is prone to occur, resulting in lamp dropping and lamp not lighting up, and affecting the display effect.

[0007] An embodiment of the present application provides a display panel, comprising:

[0008] substrate;

[0009] A plurality of driving electrodes are arranged on the substrate at intervals;

[0010] A plurality of conductive units are disposed in a one-to-one correspondence on a side of the driving electrode away from the substrate;

[0011] A plurality of light-emitting chips are arranged on a side of the conductive unit away from the substrate; each of the light-emitting chips has a main body and two chip electrodes located on a side of the main body close to the substrate, and the chip electrodes are electrically connected to the conductive unit in a one-to-one correspondence;

[0012] Wherein, at least one of the conductive units is provided with a first matching structure on a side away from the substrate, and the chip electrode corresponding to the conductive unit is provided with a second matching structure that is interlocked with the first matching structure.

[0013] An embodiment of the present application further provides a display device, which includes the above-mentioned display panel. Beneficial effects

[0014] At least one of the conductive units of the present application is provided with a first matching structure on a side away from the substrate, and the chip electrode corresponding to the conductive unit is provided with a second matching structure that is mutually embedded with the first matching structure. This can increase the contact area between the chip electrode and the conductive unit, improve the bonding yield between the light-emitting chip and the driving electrode, and avoid the phenomenon of light falling off or light not lighting up due to poor bonding. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0016] FIG1 is a schematic diagram of a first structure of a display panel according to an embodiment of the present application;

[0017] FIG2 is a schematic structural diagram of the present application in which an array substrate is prepared on a first substrate, and drive electrodes and an insulating layer are prepared on the array substrate;

[0018] FIG3 is a schematic structural diagram of a first photoresist layer prepared on the basis of FIG2 ;

[0019] FIG4 is a schematic diagram showing the structure of preparing a conductive unit material layer based on FIG3 ;

[0020] FIG5 is a schematic structural diagram of peeling off the first photoresist layer based on FIG4;

[0021] FIG6 is a schematic structural diagram of a second photoresist layer prepared on the basis of FIG5 ;

[0022] 7 is a schematic structural diagram showing a process of etching a first matching structure on the conductive unit material layer and peeling off the second photoresist layer based on FIG. 6 ;

[0023] FIG8 is a schematic diagram of the structure of preparing an epitaxial layer on a second substrate;

[0024] FIG9 is a schematic structural diagram of a third photoresist layer prepared on the basis of FIG8 ;

[0025] FIG10 is a schematic diagram showing the structure of the first chip electrode layer prepared based on FIG9;

[0026] FIG11 is a schematic structural diagram of peeling off the third photoresist layer based on FIG10;

[0027] FIG12 is a schematic structural diagram of a fourth photoresist layer prepared on the basis of FIG11;

[0028] FIG13 is a schematic structural diagram of a hole opened in the fourth photoresist layer based on FIG12;

[0029] FIG14 is a schematic diagram showing the structure of preparing the second chip electrode layer based on FIG13;

[0030] FIG15 is a schematic structural diagram of peeling off the fourth photoresist layer based on FIG14;

[0031] FIG16 is a first plan view of a first matching structure on a conductive unit according to an embodiment of the present application;

[0032] FIG17 is a first plan view of a second matching structure on a chip electrode according to an embodiment of the present application;

[0033] FIG18 is a first planar layout diagram of the driving electrodes and the distributed Bragg reflector unit according to an embodiment of the present application;

[0034] FIG19 is a schematic diagram of the AA section in FIG18;

[0035] FIG20 is a second plan view of the first matching structure on the conductive unit according to an embodiment of the present application;

[0036] FIG21 is a second schematic plan view of a second matching structure on a chip electrode according to an embodiment of the present application;

[0037] FIG22 is a second planar layout diagram of the driving electrodes and the distributed Bragg reflector unit according to an embodiment of the present application;

[0038] FIG23 is a schematic diagram of the BB section in FIG22;

[0039] FIG24 is a schematic CC cross-sectional view of FIG22;

[0040] FIG25 is a schematic cross-sectional view taken along line DD in FIG22 .

[0041] Description of reference numerals:

[0042] 100. Display panel;

[0043] 101. substrate; 102. driving electrode;

[0044] 103. Conductive unit; 104. Light-emitting chip;

[0045] 105. Insulation layer; 106. Encapsulation layer

[0046] 107. First photoresist layer; 108. Conductive unit material layer;

[0047] 109. Second photoresist layer; 110. Second substrate;

[0048] 111. epitaxial layer; 112. third photoresist layer;

[0049] 113. First chip electrode layer; 114. Fourth photoresist layer;

[0050] 115. Second chip electrode layer; 116. First distributed Bragg reflector unit;

[0051] 117. Second distributed Bragg reflector unit; 118. Red conversion quantum dot;

[0052] 119. Green conversion quantum dots;

[0053] 1011, first substrate; 1012, array substrate;

[0054] 1031, first matching structure;

[0055] 1041. Main body; 1042. Chip electrode;

[0056] 10421, second matching structure;

[0057] 1. Red sub-pixel; 2. Green sub-pixel;

[0058] 3. Blue sub-pixel. Modes for Carrying Out the Invention

[0059] The following describes in detail the preferred embodiments of the present application in conjunction with the accompanying drawings to fully introduce the technical content of the present application to those skilled in the art, to illustrate that the present application can be implemented, to make the technical content disclosed in the present application clearer, and to make it easier for those skilled in the art to understand how to implement the present application. However, the present application can be embodied in many different forms of embodiments, and the scope of protection of the present application is not limited to the embodiments mentioned herein. The description of the embodiments below is not intended to limit the scope of the present application.

[0060] The directional terms mentioned in this application, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., are only directions in the drawings. The directional terms used in this article are used to explain and illustrate this application, and are not used to limit the scope of protection of this application.

[0061] In the drawings, components with the same structure are represented by the same numerical labels, and components with similar structures or functions are represented by similar numerical labels. In addition, for the sake of ease of understanding and description, the size and thickness of each component shown in the drawings are arbitrarily shown, and this application does not limit the size and thickness of each component.

[0062] Some embodiments of the present application provide a display panel, comprising:

[0063] a substrate; a plurality of driving electrodes spaced apart from each other and arranged on the substrate;

[0064] A plurality of conductive units are disposed in a one-to-one correspondence on a side of the driving electrode away from the substrate;

[0065] A plurality of light-emitting chips are arranged on a side of the conductive unit away from the substrate; each of the light-emitting chips has a main body and two chip electrodes located on a side of the main body close to the substrate, and the chip electrodes are electrically connected to the conductive unit in a one-to-one correspondence;

[0066] Wherein, at least one of the conductive units is provided with a first matching structure on a side away from the substrate, and the chip electrode corresponding to the conductive unit is provided with a second matching structure that is interlocked with the first matching structure.

[0067] In some embodiments, the first mating structure includes a protrusion, and the second mating structure includes a snap-fit ​​groove adapted to the protrusion; or, the first mating structure includes a recessed groove, and the second mating structure includes a snap-fit ​​protrusion adapted to the recessed groove; or, the first mating structure includes a protrusion and a recessed groove, and the second mating structure includes a snap-fit ​​groove and a snap-fit ​​protrusion adapted to the first mating structure.

[0068] In some embodiments, the shape of the first matching structure includes one or more of a trapezoidal cone, a frustum, and an elliptical cone.

[0069] In some embodiments, there is a first gap between any two adjacent driving electrodes; and the display panel further includes a plurality of distributed Bragg reflection units disposed on the substrate in a one-to-one correspondence within the first gap.

[0070] In some embodiments, the distributed Bragg reflection unit includes: a first distributed Bragg reflection unit located between two chip electrodes of at least one light-emitting chip; and a second distributed Bragg reflection unit located between at least two adjacent light-emitting chips.

[0071] In some embodiments, a height of the first distributed Bragg reflector unit is less than a height of the second distributed Bragg reflector unit.

[0072] In some embodiments, the distance between the surface of the first distributed Bragg reflector unit away from the substrate and the surface of the substrate away from the first distributed Bragg reflector unit is a first distance; the distance between the surface of the main body of the light-emitting chip close to the substrate and the surface of the substrate away from the light-emitting chip is a second distance; the first distance is less than or equal to the second distance.

[0073] In some embodiments, the distance between the surface of the second distributed Bragg reflector away from the substrate and the surface of the substrate away from the second distributed Bragg reflector is a third distance; the distance between the surface of the main body of the light-emitting chip away from the substrate and the surface of the substrate away from the light-emitting chip is a fourth distance; the third distance is greater than the fourth distance.

[0074] In some embodiments, the display panel further includes: an encapsulation layer covering the side of the light-emitting chip away from the substrate, filling the substrate between two adjacent light-emitting chips, and filling between two chip electrodes of the same light-emitting chip.

[0075] In some embodiments, the display panel includes red sub-pixels, green sub-pixels, and blue sub-pixels; the light-emitting chips of the red sub-pixels, green sub-pixels, and blue sub-pixels are all blue light-emitting chips, and red conversion quantum dots and green conversion quantum dots are respectively provided in the encapsulation layers corresponding to the red sub-pixels and the green sub-pixels.

[0076] Some embodiments of the present application further provide a display device, which includes the display panel described in any of the above embodiments.

[0077] The embodiments of the present application have the following beneficial effects:

[0078] At least one of the conductive units in the embodiments of the present application is provided with a first matching structure on a side away from the substrate, and the chip electrode corresponding to the conductive unit is provided with a second matching structure that is mutually interlocked with the first matching structure. This can increase the contact area between the chip electrode and the conductive unit, improve the bonding yield between the light-emitting chip and the driving electrode, and avoid the phenomenon of light falling off or light not lighting up due to poor bonding.

[0079] In an embodiment of the present application, a first distributed Bragg reflection unit is arranged between the two chip electrodes of at least one of the light-emitting chips, and the first distributed Bragg reflection unit is used to reflect the light irradiated thereon, thereby improving the light utilization rate of the display panel, enhancing the brightness of the display panel, and reducing the impact of light on the electrical properties of the thin film transistors on the substrate.

[0080] In the embodiment of the present application, a second distributed Bragg reflector unit is provided between at least two adjacent light-emitting chips, and the second distributed Bragg reflector unit is used to prevent crosstalk between the light emitted by the adjacent light-emitting chips.

[0081] In the embodiment of the present application, red conversion quantum dots and green conversion quantum dots are respectively arranged in the encapsulation layers corresponding to the red sub-pixel and the green sub-pixel, so that the display panel can achieve a full-color display effect.

[0082] Some embodiments of the present application provide a display device, which includes a display panel 100. In some embodiments, the display panel 100 is a Micro-LED display panel.

[0083] As shown in FIG. 1 , in some embodiments, a display panel 100 includes a substrate 101 , a plurality of driving electrodes 102 , a plurality of conductive units 103 , and a plurality of light-emitting chips 104 .

[0084] The substrate 101 includes a first substrate 1011 and an array substrate 1012 disposed on the first substrate. The first substrate 1011 may be made of glass, polyimide, polycarbonate, polyethylene terephthalate, polyethylene naphthalate, etc. The array substrate 1012 includes a plurality of thin film transistors (not shown).

[0085] The plurality of driving electrodes 102 are spaced apart from each other on the substrate 101. Specifically, the plurality of driving electrodes 102 are spaced apart from each other on a side of the array substrate 1012 away from the first substrate 1011 and are electrically connected to the thin film transistors in the array substrate 1012.

[0086] There is a first gap between any two adjacent driving electrodes 102. Specifically, the display panel 100 further includes an insulating layer 105 disposed on the substrate 101 within the first gap. The insulating layer 105 is used to prevent short circuits between any two adjacent driving electrodes 102.

[0087] The plurality of conductive units 103 are disposed one by one on a side of the driving electrode 102 away from the substrate 101. In this embodiment, the conductive units 103 are made of metal solder. In other embodiments, the conductive units 103 may also be made of other conductive materials.

[0088] A plurality of light emitting chips 104 are disposed on a side of the conductive unit 103 away from the substrate 101. In this embodiment, the light emitting chips 104 are Micro-LED light emitting chips, and the light emitting chips 104 are blue light emitting chips.

[0089] Specifically, each of the light-emitting chips 104 has a main body 1041 and two chip electrodes 1042 located on a side of the main body 1041 close to the substrate 101. The chip electrodes 1042 are electrically connected to the conductive units 103 in a one-to-one correspondence.

[0090] As shown in Figures 1, 7, and 15, a first mating structure 1031 is provided on a side of at least one of the conductive units 103 away from the substrate 101, and a second mating structure 10421 is provided on the chip electrode 1042 corresponding to the conductive unit 103, which engages with the first mating structure 1031. This increases the contact area between the chip electrode 1042 and the conductive unit 103, improves the bonding yield between the light-emitting chip 104 and the driving electrode 102, and avoids lamp failure or non-lighting caused by poor bonding.

[0091] In some embodiments, a first matching structure 1031 is provided on a side of each conductive unit 103 away from the substrate 101 , and a second matching structure 10421 is provided on each chip electrode 1042 to be interlocked with the first matching structure 1031 .

[0092] The first mating structure 1031 includes a protrusion, and the second mating structure 10421 includes a snap-fit ​​groove that matches the protrusion; alternatively, the first mating structure 1031 includes a recessed groove, and the second mating structure 10421 includes a snap-fit ​​protrusion that matches the recessed groove; alternatively, the first mating structure 1031 includes a protrusion and a recessed groove, and the second mating structure 10421 includes a snap-fit ​​groove and a snap-fit ​​protrusion that matches the first mating structure 1031. In the embodiment shown in FIG1 , the first mating structure 1031 includes only the recessed groove, and the second mating structure 10421 includes only the snap-fit ​​protrusion that matches the recessed groove. In other embodiments, the first mating structure 1031 may include only the protrusion, and the second mating structure 10421 may include only the snap-fit ​​groove that matches the protrusion. In other embodiments, the first matching structure 1031 may include both a protrusion and a recessed groove, and the second matching structure 10421 may include both a snap-fitting groove and a snap-fitting protrusion that are compatible with the first matching structure 1031 .

[0093] As shown in Figures 16 and 17, the shape of the first matching structure 1031 includes one or more of a trapezoidal cone, a truncated cone, and an elliptical cone. In this embodiment, the shape of both the first matching structure 1031 and the second matching structure 10421 is a trapezoidal cone. In this embodiment, two first matching structures 1031 are provided on a conductive unit 103. The two first matching structures 1031 are of equal size, and their central axes coincide with each other. It is worth noting that the dashed lines in Figure 16 represent the first matching structure 1031 as a recessed groove, while the solid lines in Figure 17 represent the second matching structure 1031 as a raised portion. As shown in Figure 1, the display panel 100 also includes an encapsulation layer 106. The encapsulation layer 106 covers the side of the light-emitting chip 104 facing away from the substrate 101, fills the substrate 101 between two adjacent light-emitting chips 104, and fills the space between the two chip electrodes 1042 of the same light-emitting chip 104. The encapsulation layer 106 primarily protects the light-emitting chip 104 from water and oxygen intrusion. In this embodiment, the material of the encapsulation layer 106 is a photoresist material. In other embodiments, the material of the encapsulation layer 106 may also be an ink material, which is not limited in this application.

[0094] Some embodiments of the present application also provide a process flow for disposing a first matching structure 1031 on a side of the conductive unit 103 away from the substrate 101 , and the specific steps are as follows.

[0095] As shown in FIG. 2 , an array substrate 1012 is prepared on a first substrate 1011 , and driving electrodes 102 and an insulating layer 105 are prepared on the array substrate 1012 .

[0096] As shown in FIG3 , on the structure of FIG2 , a first photoresist layer 107 is patterned and prepared by a yellow light process of coating, exposure, and development.

[0097] As shown in FIG4 , on the structure of FIG3 , a conductive unit material layer 108 is prepared by one of evaporation, PVD, electroplating and chemical plating processes.

[0098] As shown in FIG. 5 , on the structure of FIG. 4 , the first photoresist layer 107 is stripped using a photoresist stripping solution.

[0099] As shown in FIG6 , on the structure of FIG5 , a second photoresist layer 109 is patterned and prepared by a yellow light process of coating, exposure, and development.

[0100] As shown in FIG. 7 , in the structure of FIG. 6 , a first matching structure 1031 is formed by etching on the conductive unit material layer 108 , and then the second photoresist layer 109 is stripped and removed, and finally the remaining conductive unit material layer 108 forms the conductive unit 103 .

[0101] Some embodiments of the present application also provide a process for providing a second matching structure 10421 on the chip electrode 1042, specifically a process for forming the second matching structure 10421 on a side of the chip electrode 1042 away from the body 1041. The specific steps are as follows.

[0102] As shown in FIG8 , an epitaxial layer 111 is formed on a second substrate 110 .

[0103] As shown in FIG9 , on the structure of FIG8 , a third photoresist layer 112 is prepared by a yellow light process of coating, exposure, and development.

[0104] As shown in Figure 10, on the structure of Figure 9, the first chip electrode layer 113 of the chip electrode 1042 is prepared by one of chemical plating, electroplating and evaporation. The material of the first chip electrode layer 113 is generally Au.

[0105] As shown in FIG. 11 , on the structure of FIG. 10 , the third photoresist layer 112 is stripped using a photoresist stripping solution.

[0106] As shown in FIG. 12 , on the structure of FIG. 11 , a fourth photoresist layer 114 is prepared by a yellow light process of coating, exposure, and development.

[0107] As shown in FIG13 , in the structure of FIG12 , a hole is opened in the fourth photoresist layer 114. It is worth noting that the opening of the fourth photoresist layer 114 is located above the first chip electrode layer 113 and is smaller than the first chip electrode layer 113.

[0108] As shown in FIG14 , on the structure of FIG13 , a second chip electrode layer 115 is formed in the opening of the fourth photoresist layer 114 using one of chemical plating, electroplating, and vapor deposition. The first chip electrode layer 113 and the second chip electrode layer 115 are combined to form the chip electrode 1042. The second chip electrode layer 115 serves as the second mating structure 10421 on the chip electrode 1042.

[0109] As shown in FIG. 15 , on the structure of FIG. 14 , the fourth photoresist layer 114 is stripped off using a photoresist stripping solution.

[0110] In this embodiment, after the conductive unit 103 with the first matching structure 1031 of Figure 7 and the chip electrode 1042 with the second matching structure 10421 of Figure 15 are aligned and combined, a stable eutectic structure can be formed through hot pressing and melting, thereby reducing the peeling of the chip electrode. This can increase the contact area between the chip electrode 1042 and the conductive unit 103, improve the bonding yield between the light-emitting chip 104 and the driving electrode 102, and avoid the phenomenon of lamp falling or lamp not lighting due to poor bonding.

[0111] As shown in Figures 18 and 19, in some embodiments, the display panel 100 further includes a plurality of distributed Bragg reflectors disposed on the substrate 101 in a one-to-one correspondence within the first gap. The distributed Bragg reflectors include a first distributed Bragg reflector 116 and a second distributed Bragg reflector 117. The height H1 of the first distributed Bragg reflector 116 is less than the height H2 of the second distributed Bragg reflector 117. Specifically, H1 is between 1 μm and 5 μm, and H2 is ≥ 10 μm. In this embodiment, H1 is 3 μm and H2 is 10 μm.

[0112] The first distributed Bragg reflector 116 is located between the two chip electrodes 1042 of at least one of the light-emitting chips 104. The first distributed Bragg reflector 116 reflects light incident thereon, thereby improving the light utilization efficiency of the display panel 100 and enhancing the brightness of the display panel 100, while reducing the impact of light on the electrical properties of the thin film transistors on the substrate 101.

[0113] The distance between the surface of the first distributed Bragg reflector 116 away from the substrate 101 and the surface of the substrate 101 away from the first distributed Bragg reflector 116 is a first distance L1; the distance between the surface of the main body 1041 of the light-emitting chip 104 close to the substrate 101 and the surface of the substrate 101 away from the light-emitting chip 104 is a second distance L2; the first distance L1 is less than or equal to the second distance L2. In some embodiments, L1 is equal to L2, thereby preventing the first distributed Bragg reflector 116 from lifting the main body 1041 of the light-emitting chip 104 and affecting the bonding between the light-emitting chip 104 and the conductive unit 103.

[0114] The second distributed Bragg reflector 117 is located between at least two adjacent light emitting chips 104. The second distributed Bragg reflector 117 is used to prevent crosstalk between the lights emitted by the adjacent light emitting chips 104.

[0115] The distance between the surface of the second distributed Bragg reflector 117 away from the substrate 101 and the surface of the substrate 101 away from the second distributed Bragg reflector 117 is a third distance L3; the distance between the surface of the main body 1041 of the light-emitting chip 104 away from the substrate 101 and the surface of the substrate 101 away from the light-emitting chip 104 is a fourth distance L4; the third distance L3 is greater than the fourth distance L4. This effectively prevents optical crosstalk.

[0116] As shown in FIG18 , the driving electrode 102 includes a plurality of electrode groups spaced apart from each other. Each electrode group includes three anodes 1021 and one cathode 1022. Any two adjacent anodes 1021 are spaced apart from each other, and any anode 1021 and cathode 1022 are spaced apart from each other.

[0117] As shown in Figures 20 and 21, the shape of the first matching structure 1031 includes one or more of a trapezoidal cone, a truncated cone, and an elliptical cone. In some embodiments, the shapes of the first matching structure 1031 and the second matching structure 10421 are both trapezoidal cones. Two first matching structures 1031 are provided on a conductive unit 103, and the two first matching structures are of the same size. The central axes of the two first matching structures 1031 are parallel to each other but do not overlap. It is worth noting that the dotted line in Figure 20 represents that the first matching structure 1031 is a recessed groove, and the solid line in Figure 21 represents that the second matching structure 1031 is a raised portion.

[0118] As shown in Figures 23, 24, and 25, in some embodiments, unlike the embodiment shown in Figures 18-19, the display panel 100 includes a red sub-pixel 1, a green sub-pixel 2, and a blue sub-pixel 3. The light-emitting chips 104 of the red sub-pixel 1, the green sub-pixel 2, and the blue sub-pixel 3 are all blue light-emitting chips, and the encapsulation layers 106 corresponding to the red sub-pixel 1 and the green sub-pixel 2 are respectively provided with red conversion quantum dots 118 and green conversion quantum dots 119, so that the display panel 100 can achieve a full-color display effect.

[0119] 22 , the three anodes 1021 in each electrode group are red sub-pixel anode 10211, green sub-pixel anode 10212, and blue sub-pixel anode 10213. The cathode 1022 in each electrode group also serves as the cathode of red sub-pixel 1, green sub-pixel 2, and blue sub-pixel 3.

[0120] The above is a detailed introduction to a display panel and a display device provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for those skilled in the art, based on the idea of ​​the present application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, comprising: substrate; A plurality of driving electrodes are arranged on the substrate at intervals from each other; A plurality of conductive units are disposed one by one correspondingly on a side of the driving electrode away from the substrate; A plurality of light-emitting chips are arranged on a side of the conductive unit away from the substrate; each of the light-emitting chips comprises a main body and two chip electrodes located on a side of the main body close to the substrate, and the chip electrodes are electrically connected to the conductive unit in a one-to-one correspondence; Among them, at least one of the conductive units is provided with a first matching structure on a side away from the substrate, and the chip electrode corresponding to the conductive unit is provided with a second matching structure that is interlocked with the first matching structure.

2. The display panel according to claim 1, wherein: The first mating structure includes a protruding portion, and the second mating structure includes a snap-in groove matched with the protruding portion; or, the first mating structure includes a recessed groove, and the second mating structure includes a snap-in protrusion matched with the recessed groove; or, the first mating structure includes a protruding portion and a recessed groove, and the second mating structure includes a snap-in groove and a snap-in protrusion matched with the first mating structure.

3. The display panel according to claim 1, wherein: The shape of the first matching structure includes: one or more of a trapezoidal table, a truncated table and an elliptical table.

4. The display panel according to claim 1, wherein: There is a first gap between any two adjacent driving electrodes; The display panel further includes a plurality of distributed Bragg reflection units disposed on the substrate in a one-to-one correspondence within the first gap.

5. The display panel according to claim 4, wherein: The distributed Bragg reflection unit comprises: A first distributed Bragg reflection unit is located between two chip electrodes of at least one of the light-emitting chips; and The second distributed Bragg reflection unit is located between at least two adjacent light-emitting chips.

6. The display panel according to claim 5, wherein: A distance between a surface of the first distributed Bragg reflector unit that is away from the substrate and a surface of the substrate that is away from the first distributed Bragg reflector unit is a first distance; The distance between the surface of the main body of the light-emitting chip on the side close to the substrate and the surface of the substrate on the side away from the light-emitting chip is a second distance; The first distance is less than or equal to the second distance.

7. The display panel according to claim 5, wherein: A distance between a surface of the second distributed Bragg reflector unit that is away from the substrate and a surface of the substrate that is away from the second distributed Bragg reflector unit is a third distance; A distance between a surface of a main body of the light-emitting chip on a side away from the substrate and a surface of a side of the substrate away from the light-emitting chip is a fourth distance; The third distance is greater than the fourth distance.

8. The display panel according to claim 5, wherein: A height of the first distributed Bragg reflector unit is smaller than a height of the second distributed Bragg reflector unit.

9. The display panel according to claim 1, wherein: Also includes: The encapsulation layer covers the side of the light emitting chip away from the substrate, is filled on the substrate between two adjacent light emitting chips, and is filled between two chip electrodes of the same light emitting chip.

10. The display panel according to claim 9, wherein: The display panel includes a red sub-pixel, a green sub-pixel and a blue sub-pixel; The light-emitting chips of the red sub-pixel, the green sub-pixel and the blue sub-pixel are all blue light-emitting chips, and red conversion quantum dots and green conversion quantum dots are respectively arranged in the encapsulation layers corresponding to the red sub-pixel and the green sub-pixel.

11. A display device, comprising a display panel, wherein the display panel comprises: substrate; A plurality of driving electrodes are arranged on the substrate at intervals from each other; A plurality of conductive units are disposed one by one correspondingly on a side of the driving electrode away from the substrate; A plurality of light-emitting chips are arranged on a side of the conductive unit away from the substrate; each of the light-emitting chips comprises a main body and two chip electrodes located on a side of the main body close to the substrate, and the chip electrodes are electrically connected to the conductive unit in a one-to-one correspondence; Among them, at least one of the conductive units is provided with a first matching structure on a side away from the substrate, and the chip electrode corresponding to the conductive unit is provided with a second matching structure that is interlocked with the first matching structure.

12. The display device according to claim 11, wherein: The first mating structure includes a protruding portion, and the second mating structure includes a snap-in groove matched with the protruding portion; or, the first mating structure includes a recessed groove, and the second mating structure includes a snap-in protrusion matched with the recessed groove; or, the first mating structure includes a protruding portion and a recessed groove, and the second mating structure includes a snap-in groove and a snap-in protrusion matched with the first mating structure.

13. The display device according to claim 11, wherein: The shape of the first matching structure includes: one or more of a trapezoidal table, a truncated table and an elliptical table.

14. The display device according to claim 11, wherein: There is a first gap between any two adjacent driving electrodes; The display panel further includes a plurality of distributed Bragg reflection units disposed on the substrate in a one-to-one correspondence within the first gap.

15. The display device according to claim 14, wherein: The distributed Bragg reflection unit comprises: A first distributed Bragg reflection unit is located between two chip electrodes of at least one of the light-emitting chips; and The second distributed Bragg reflection unit is located between at least two adjacent light-emitting chips.

16. The display device according to claim 15, wherein: A distance between a surface of the first distributed Bragg reflector unit that is away from the substrate and a surface of the substrate that is away from the first distributed Bragg reflector unit is a first distance; The distance between the surface of the main body of the light-emitting chip on the side close to the substrate and the surface of the substrate on the side away from the light-emitting chip is a second distance; The first distance is less than or equal to the second distance.

17. The display device according to claim 15, wherein: A distance between a surface of the second distributed Bragg reflector unit that is away from the substrate and a surface of the substrate that is away from the second distributed Bragg reflector unit is a third distance; A distance between a surface of a main body of the light-emitting chip on a side away from the substrate and a surface of a side of the substrate away from the light-emitting chip is a fourth distance; The third distance is greater than the fourth distance.

18. The display device according to claim 15, wherein: A height of the first distributed Bragg reflector unit is smaller than a height of the second distributed Bragg reflector unit.

19. The display device according to claim 11, wherein: Among them, it also includes: The encapsulation layer covers the side of the light emitting chip away from the substrate, is filled on the substrate between two adjacent light emitting chips, and is filled between two chip electrodes of the same light emitting chip.

20. The display device according to claim 19, wherein: The display panel includes a red sub-pixel, a green sub-pixel and a blue sub-pixel; The light-emitting chips of the red sub-pixel, the green sub-pixel and the blue sub-pixel are all blue light-emitting chips, and red conversion quantum dots and green conversion quantum dots are respectively arranged in the encapsulation layers corresponding to the red sub-pixel and the green sub-pixel.

Images