Gas distribution plate assembly for semiconductor processing chamber
By depositing a ceramic layer on the gas distribution plate using aerosol deposition, the issues of arcing and capacitance variability in semiconductor processing chambers are addressed, resulting in improved reliability and consistency of the processing.
Patent Information
- Application Number
- PCT/US2024/051651
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-30
- Filing Date
- 2024-10-16
- Publication Date
- 2025-06-05
AI Technical Summary
Existing gas distribution plates in semiconductor processing chambers face issues with insufficient breakdown voltage, leading to arcing, and variability in capacitance due to the anodized coating, which complicates chamber matching and temperature control.
A ceramic layer, comprising materials like aluminum nitride, aluminum oxide, or yttrium oxide, is deposited on the metal back plate of the gas distribution plate using aerosol deposition, enhancing breakdown voltage and uniformity of capacitance.
The ceramic layer provides a higher breakdown voltage to prevent arcing, ensures a more uniform capacitance, and improves thermal conductivity for better temperature control, leading to more reliable and consistent semiconductor processing.
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Figure US2024051651_05062025_PF_FP_ABST
Abstract
Description
GAS DISTRIBUTION PLATE ASSEMBLY FOR SEMICONDUCTOR PROCESSING CHAMBERCROSS-REFERENCE TO RELATED APPLICATION
[0001] This application claims the benefit of priority of U.S. Application No. 63 / 604,580, filed November 30, 2023, which is incorporated herein by reference for all purposes.BACKGROUND
[0002] The present disclosure generally relates to the manufacturing of semiconductor devices. More specifically, the disclosure relates to plasma chamber components used in manufacturing semiconductor devices.
[0003] During semiconductor wafer processing, plasma processing chambers are used to process semiconductor devices. Plasma processing chambers are subjected to plasmas and voltages that may degrade components in the plasma processing chambers. Some plasma processing chambers use a gas distribution plate as an electrode for plasma generation.
[0004] The background description provided here is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.SUMMARY
[0005] To achieve the foregoing and in accordance with the purpose of the present disclosure, a gas distribution plate assembly for use in a semiconductor processing chamber with an interior is provided. A metal back plate has a first side facing toward the interior of the semiconductor processing chamber and a second side away from the interior of the semiconductor processing chamber. A ceramic layer is on the first side of the metal back plate, wherein the ceramic layer comprises at least one of aluminum nitride, aluminum oxide, and yttrium oxide.
[0006] In another manifestation, a method of forming a gas distribution plate assembly for use in a plasma processing chamber is provided. A ceramic layer is deposited on a first surface of a metal back plate, wherein the ceramic layer comprises at least one of aluminum nitride, aluminum oxide, and yttrium oxide.
[0007] These and other features of the present disclosure will be described in more detail below in the detailed description and in conjunction with the following figures.BRIEF DESCRIPTION OF THE DRAWINGS
[0008] The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
[0009] FIG. 1 is a high level flow chart of an embodiment.
[0010] FIG. 2 is a schematic cross-sectional enlarged view of part of a gas distribution plate assembly according to an embodiment.
[0011] FIG. 3 is a schematic view of a plasma processing chamber that may be used in an embodiment.
[0012] In the drawings, like reference numerals are sometimes used to designate like structural elements. It should also be appreciated that the depictions in the figures are diagrammatic and not to scale.DETAILED DESCRIPTION
[0013] The present disclosure will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art, that the present disclosure may be practiced without some or all of these specific details. In other instances, well-known process steps and / or structures have not been described in detail in order to not unnecessarily obscure the present disclosure.
[0014] In some plasma processing chambers, a gas distribution plate may comprise an aluminum containing backing plate and a silicon electrode. An anodized coating may be placed on a surface of the aluminum containing backing plate to provide electrical insulation between the aluminum containing backing plate and the silicon electrode. A thermal interface layer made of a material, such as silicone, may be between the anodized coating and the silicon electrode. It has been found that the anodized coating does not have a sufficient breakdown voltage to prevent arcing on the gas distribution plate. In addition, the difficulty in controlling the thickness of the anodized coating causes a large variation in the capacitance of the gas distribution plate making chamber matching more difficult. Also, the thermal conductivity of the anodization layer makes the control of the temperature more difficult.
[0015] According to some embodiments described herein, a ceramic layer is provided on a surface of the aluminum containing backing plate. The ceramic layer provides a higherbreakdown voltage to prevent arcing and a more controlled thickness for a more uniform capacitance.
[0016] To facilitate understanding, FIG. 1 is a high level flow chart of a process used in an embodiment. A conductive metal back plate is provided (step 104). FIG. 2 is a schematic cross-sectional view of part of gas distribution plate assembly 200 provided in some embodiments. In some embodiments, the back plate 204 is a metal containing base plate. In some embodiments, the back plate 204 is aluminum containing, such as being pure aluminum or an aluminum alloy. The metal back plate 204 is a gas distribution plate. A gas distribution plate is a plate with orifices for providing a gas through the gas distribution plate assembly 200 to the interior of a plasma processing chamber.
[0017] A ceramic layer 208 is deposited on a first side of the back plate 204 (step 108). The first side of the back plate 204 would face the interior plasma region of a chamber where a plasma is generated. A second side of the back plate 204 would face away from the interior of the chamber and the plasma region. The ceramic layer is deposited by aerosol deposition. Aerosol deposition is achieved by passing a carrier gas through a fluidized bed of solid aluminum nitride powder. Driven by a pressure difference, the aluminum nitride powder particles are accelerated through a nozzle, forming an aerosol jet at its outlet. The aerosol is then directed at the surface of the back plate 204, where the aerosol jet impacts the surface with high velocity. The powder mixture particles break up into solid nanosized fragments, forming a layer. Optimization of carrier gas species, gas consumption, standoff distance, and scan speed provides high-quality layers. As noted above, aerosol deposition can take place at room temperature. In some embodiments, the ceramic layer 208 comprises at least one of aluminum nitride (AIN), aluminum oxide (AI2O3), and yttrium oxide (Y2O3). In some embodiments, the ceramic layer 208 has a thickness in the range of 5 microns to 100 microns. In some embodiments, the ceramic layer 208 has a thickness in the range of 10 microns to 40 microns. In some embodiments, the ceramic layer has a porosity of less than 1% by volume ( a density of greater than 99%). In some embodiments, the ceramic layer 208 has a first side and a second side, where the back plate 204 is on the second side of the ceramic layer 208. In some embodiments, the ceramic layer 208 has a breakdown voltage of greater than 50 kilovolts per millimeter (kV / mm). In some embodiments, the ceramic layer has a breakdown voltage of greater than 200 volts. In some embodiments, the ceramic layer has a breakdown voltage of greater than 500 volts.
[0018] A thermal interface layer 212 is provided on the first side of the ceramic layer208. In some embodiments, the thermal interface layer 212 comprises silicone and a thermallyconductive filler. In some embodiments, the thermal interface layer 212 comprises other materials. The thermally conductive filler allows the thermal interface layer 212 to be more thermally conductive and may also cause the ceramic layer 208 to be subjected to a higher voltage and higher capacitance. By increasing the thickness of the ceramic layer 208, the capacitance may be reduced. The thermal interface layer 212 has a first side and a second side, wherein the ceramic layer 208 is on the second side of the thermal interface layer 212.
[0019] An electrode is provided on the first side of the thermal interface layer 212 and the ceramic layer 208. In some embodiments, the electrode is a silicon containing electrode, such as a pure silicon electrode. The silicon containing electrode 216 comprises silicon and is electrically conductive. In some embodiments, the silicon containing electrode 216 is doped silicon. In some embodiments, an electrical feedthrough 220, is electrically connected between the silicon containing electrode 216 and a tuning circuit 224. A gas source 228 is connected to a gas passage 232, forming orifices in the metal back plate 204, by a fluid connector 236. Increased thermal conductivity of the thermal interface layer 212 provided by the thermally conductive filler provides improved thermal transfer and allows for faster cooling of the silicon containing electrode 216.
[0020] The gas distribution plate assembly 200 is mounted in a plasma processing chamber (step 120). FIG. 3 is a schematic view of a plasma processing chamber 300 providing a semiconductor processing chamber, in an embodiment. In one or more embodiments, the processing chamber 300 comprises the gas distribution plate assembly 200 providing a gas inlet and an electrostatic chuck (ESC) 316, within a processing chamber 304, enclosed by a chamber wall 350. Within the processing chamber 304, a substrate 308 is positioned on top of the ESC 316 so that the ESC 316 is also a substrate support. The ESC 316 may provide a bias from an ESC power source 348. The gas source 228 is connected to the processing chamber 304 through the gas distribution plate assembly 200. An ESC temperature controller 351 is connected to the ESC 316 and provides temperature control of the ESC 316, allowing for the ESC 316 to be cooled to cryogenic temperatures. A radio frequency (RF) power source 330 provides RF power to the ESC 316. In a preferred embodiment, 400 kilohertz (kHz), 13.56 megahertz (MHz), 1 MHz, 2 MHz, 60 MHz, and / or optionally, 27 MHz power sources make up the RF power source 330 and the ESC power source 348 to provide RF power at RF frequencies. A controller 335 is controllably connected to the RF power source 330, the ESC power source 348, an exhaust pump 320, and the gas source 310. A high flow liner 360 is a liner within the processing chamber 304, which confines gas from the gas source and has slots 362. The slots 362 maintaina controlled flow of gas to pass from the gas source 228 to the exhaust pump 320. An example of such a processing chamber is the Flex® etch system manufactured by Lam Research Corporation of Fremont, CA. In some embodiments, the process chamber 300 is a CCP (capacitively coupled plasma) reactor.
[0021] The tuning circuit 224 is connected to ground and allows the impedance between the silicon containing electrode 216 (FIG. 2) and ground the be adjusted, so that the silicon containing electrode 216 may have a variable voltage that is a function of the plasma power and the impedance from the tuning circuit 224. In some embodiments, the tuning circuit comprises a variable resistor. In some embodiments, the tuning circuit comprises a variable capacitor. The process chamber 300 is used to process a plurality of semiconductor wafers (step 124).
[0022] The use of an aerosol deposition coating of AIN for the ceramic layer provides a ceramic layer with a high breakdown voltage, preventing arcing. In addition, the thickness of the ceramic layer is more uniform, providing a more uniform capacitance. In addition, the ceramic layer may be made thicker in order to reduce the capacitance of the back plate 204. In addition, AIN has a high thermal conductivity. The high thermal conductivity increases the cooling of the silicon containing electrode 216. Some embodiments increase thermal conductivity and decrease the thermal impedance while not significantly changing the electrical impedance. In addition, some embodiments have increased resistance to erosion from a hydrogen fluoride (HF) plasma. Some embodiments provide a gas distribution plate assembly that does not need to be changed for the life of the processing chamber. In some embodiments, the processing chamber may have a lifetime of 5 years or more than 20,000 RF hours. The gas distribution plate assembly provides improved uniform wafer to wafer processing. By using aerosol deposition to form the ceramic layer 208, the ceramic layer 208 produces fewer contaminant particles. In some embodiments, the magnitude of the voltage between the metal back plate 204 and the silicon containing electrode is at least 400 volts.
[0023] Some embodiments may not have a thermal interface layer 212. Some embodiments have the silicon containing electrode 216 in direct contact with the first side of the ceramic layer 208.
[0024] While this disclosure has been described in terms of several preferred embodiments, there are alterations, modifications, permutations, and various substitute equivalents, that fall within the scope of this disclosure. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present disclosure. It is therefore intended that the following appended claims be interpreted as including all suchalterations, modifications, permutations, and various substitute equivalents as fall within the true spirit and scope of the present disclosure. As used herein, the phrase “A, B, or C” should be construed to mean a logical (“A OR B OR C”), using a non-exclusive logical “OR,” and should not be construed to mean ‘only one of A or B or C. Each step within a process may be an optional step and is not required. Different embodiments may have one or more steps removed or may provide steps in a different order. In addition, various embodiments may provide different steps simultaneously instead of sequentially.
Claims
CLAIMSWhat is claimed is:
1. A gas distribution plate assembly for use in a semiconductor processing chamber with an interior, comprising: a metal back plate with a first side facing toward the interior of the semiconductor processing chamber and a second side away from the interior of the semiconductor processing chamber; and a ceramic layer on the first side of the metal back plate, wherein the ceramic layer comprises at least one of aluminum nitride, aluminum oxide, and yttrium oxide.
2. The gas distribution plate assembly, as recited in claim 1, further comprising: an electrode, between the interior of the semiconductor processing chamber and the metal back plate; and a thermal interface layer between the ceramic layer and the electrode.
3. The gas distribution plate assembly as recited in claim 2, further comprising at least one gas passage extending through the metal back plate, the ceramic layer, the thermal interface layer, and the electrode.
4. The gas distribution plate assembly as recited in claim 2, further comprising: a tuning circuit; and an electrical feedthrough electrically connected between the tuning circuit and the electrode.
5. The gas distribution plate assembly as recited in claim 4 wherein the tuning circuit is grounded.
6. The gas distribution plate assembly as recited in claim 1, wherein the ceramic layer is deposited by aerosol deposition.
7. The gas distribution plate assembly as recited in claim 1, wherein the ceramic layer has a thickness in a range of 10 microns to 100 microns.
8. The gas distribution plate assembly as recited in claim 1, wherein the ceramic layer has a porosity of less than 1 % by volume.
9. The gas distribution plate assembly as recited in claim 1, wherein the ceramic layer comprises aluminum nitride deposited by aerosol deposition.
10. A method of forming a gas distribution plate assembly for use in a plasma processing chamber, comprising: depositing a ceramic layer on a first surface of a metal back plate, wherein the ceramiclayer comprises at least one of aluminum nitride, aluminum oxide, and yttrium oxide.
11. The method, as recited in claim 10, further comprising: forming a thermal interface layer on the ceramic layer; and placing an electrode on the thermal interface layer.
12. The method as recited in claim 11, further comprising providing at least one gas passage extending through the metal back plate, the ceramic layer, the thermal interface layer, and the electrode.
13. The method as recited in claim 11, further comprising electrically connecting a tuning circuit to the electrode.
14. The method as recited in claim 13 further comprising grounding the tuning circuit.
15. The method as recited in claim 10, wherein the depositing the ceramic layer comprises depositing by aerosol deposition.
16. The method as recited in claim 10, wherein the ceramic layer has a thickness in a range of 10 microns to 100 microns.
17. The method as recited in claim 10, wherein the ceramic layer has a porosity of less than1 % by volume.
18. The method as recited in claim 10, wherein the depositing the ceramic layer comprises aerosol depositing aluminum nitride.
Citation Information
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