Host state confirmation method and apparatus, device, and storage medium

Abstract

Embodiments of the present application relate to the technical field of computers, and in particular to a host state confirmation method and apparatus, a device, and a storage medium, aiming at achieving the objective that a BMC quickly confirms the state of a host. The method comprises: when a host enters a quick restart phase, the host setting the value of a valid bit of an enable bit register as a first preset value; when the value of the valid bit of the enable bit register is set as the first preset value, the host setting the value of a valid bit of a data bit register on the basis of the current running state; a BMC acquiring the value of the enable bit register; when the value of the valid bit of the enable bit register is the first preset value, acquiring the value of the data bit register; and determining the current running state of the host on the basis of the value of the valid bit of the data bit register.

Description

Host status confirmation method, device, equipment and storage medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on December 7, 2023, with application number 202311674537.1, and application name “A host status confirmation method, device, equipment and storage medium”, all contents of which are incorporated by reference into this application. Technical Field

[0003] The embodiments of the present application relate to the field of computer technology, and more specifically, to a host status confirmation method, apparatus, device, and storage medium. Background Art

[0004] During the boot process of the operating system's underlying bootloader, the Baseboard Management Controller (BMC) needs to notify the host (the firmware combination responsible for system startup and initialization) of its current operating state. The BMC determines the logic for subsequent information exchange between the host and the BMC based on the host's current state. In related technologies, the host sends messages to the BMC using a predefined protocol. After receiving the messages, the BMC determines the host's operating state based on the message content.

[0005] In related technologies, the interaction method through pre-customized protocols needs to rely on the normal operation of the protocol stack. If there is a problem in any link of the protocol stack, the BMC will not be able to obtain the host status normally, and thus cannot perform normal logical interaction. In addition, sending messages through the protocol stack will increase the pressure on the protocol stack to transmit data and increase the power consumption of the entire system.

[0006] Summary of the Invention

[0007] The embodiments of the present application provide a host status confirmation method, apparatus, device, and storage medium, aiming to enable a BMC to quickly confirm the host status.

[0008] A first aspect of an embodiment of the present application provides a method for confirming a host status, the method comprising:

[0009] When the host enters the fast restart phase, the host sets the value of the valid bit of the enable bit register to a first preset value;

[0010] When the value of the valid bit of the enable bit register is set to the first preset value, the host sets the value of the valid bit of the data bit register according to the current running state;

[0011] BMC obtains the value of the enable bit register;

[0012] When the value of the valid bit of the enable bit register is a first preset value, obtaining the value of the data bit register;

[0013] The host's current operating status is determined based on the value of the valid bit of the data bit register.

[0014] Optionally, before the host sets the value of the valid bit of the enable bit register to the first preset value, the method further includes:

[0015] The host sends a fast restart request to the host;

[0016] The host enters the fast restart phase based on the fast restart request.

[0017] Optionally, the host sets the value of the valid bit of the enable bit register to a first preset value, including:

[0018] Get the original value in the enable bit register;

[0019] Modify the value of the valid bit of the enable bit register to a first preset value in the original value of the enable bit register;

[0020] Write the modified value in the enable bit register to the enable bit register.

[0021] Optionally, the host sets the value of the valid bit of the data bit register according to the current operating state, including:

[0022] From the data bit register, get the original value of the data bit register;

[0023] According to the current operating status, the value of the valid bit of the data bit register is modified;

[0024] Write the modified value of the data bit register into the data bit register.

[0025] Optionally, the value of the valid bit of the data bit register is modified according to the current operating state, including:

[0026] When the host is in a powered-on state, the value of the valid bit of the data bit register is modified to a first preset value;

[0027] When the host is in a boot-up completion state, the value of the valid bit of the data bit register is modified to a second preset value.

[0028] Optionally, determining the current operating state of the host according to the value of the valid bit of the data bit register includes:

[0029] When the value of the valid bit of the data bit register is a first preset value, determining that the state of the host is a power-on state;

[0030] When the value of the valid bit of the data bit register is the second preset value, it is determined that the state of the host is a boot-up completion state.

[0031] Optionally, the method further comprises:

[0032] When the host runs to the petiboot stage, the host sets the value of the valid bit of the enable bit register to a first preset value through a pre-acquired value modification tool, where the value modification tool includes a value acquisition tool and a value storage tool;

[0033] When the value of the valid bit of the enable bit register is set to the first preset value, the host modifies the value of the valid bit of the data bit register to a value corresponding to the current running state through a value modification tool;

[0034] BMC obtains the value of the enable bit register;

[0035] When the value of the valid bit of the enable bit register is a first preset value, obtaining the value of the data bit register;

[0036] The current operating status of the host is determined based on the value of the valid bit of the data bit register.

[0037] Optionally, before the host sets the value of the valid bit of the enable bit register to the first preset value using a pre-acquired value modification tool, the method further includes:

[0038] When the host enters the image compilation phase, obtain the value modification tool;

[0039] Write the value modification tool into the host's image file;

[0040] Refresh the image file;

[0041] In response to the image file being updated, the system enters the startup phase.

[0042] Optionally, obtain value modification tools, including:

[0043] Read the skiboot source code;

[0044] Obtain the source code corresponding to the value modification tool from the skiboot source code. The source code corresponding to the value modification tool includes the source code corresponding to the value acquisition tool and the source code corresponding to the value storage tool.

[0045] Compile the source code corresponding to the value modification tool to obtain the value modification tool.

[0046] Optionally, the host sets the value of the valid bit of the enable bit register to a first preset value by using a pre-acquired value modification tool, including:

[0047] Use the value acquisition tool to obtain the original value of the enable bit register;

[0048] Modify the value of the valid bit of the enable bit register to a first preset value;

[0049] Use the value storage tool to write the modified value of the enable bit register into the enable bit register.

[0050] Optionally, the host uses a value modification tool to modify the value of the valid bit of the data bit register to a value corresponding to the current operating state, including:

[0051] Obtain the original value of the data bit register from the data bit register using the value acquisition tool;

[0052] According to the current operating status, the value of the valid bit of the data bit register is modified;

[0053] The modified value of the data bit register is written into the data bit register through the value storage tool.

[0054] Optionally, the value of the valid bit of the data bit register is modified according to the current operating state, including:

[0055] When the host is in a powered-on state, the value of the valid bit of the data bit register is modified to a first preset value;

[0056] When the host is in a boot-up completion state, the value of the valid bit of the data bit register is modified to a second preset value.

[0057] Optionally, the host determines the current operating state of the host according to the value of the valid bit of the data bit register, including:

[0058] When the value of the valid bit of the data bit register is a first preset value, determining that the state of the host is a power-on state;

[0059] When the value of the valid bit of the data bit register is the second preset value, it is determined that the state of the host is a boot-up completion state.

[0060] A second aspect of an embodiment of the present application provides a host status confirmation device, the device comprising:

[0061] A first value modification module is configured to, when the host enters a fast restart phase, cause the host to set the value of the valid bit of the enable bit register to a first preset value;

[0062] A second value modification module is configured to, when the value of the valid bit of the enable bit register is set to a first preset value, cause the host to set the value of the valid bit of the data bit register according to the current running state;

[0063] A first value acquisition module is used by the BMC to obtain the value of the enable bit register;

[0064] A second value acquisition module is used to acquire the value of the data bit register when the value of the valid bit of the enable bit register is a first preset value;

[0065] The first state confirmation module is used to determine the current running state of the host according to the value of the valid bit of the data bit register.

[0066] Optionally, the device further comprises:

[0067] Restart request sending module, used by the host to send a quick restart request to the host;

[0068] The fast restart module is used for the host to enter the fast restart phase according to the fast restart request.

[0069] Optionally, the first value modification module includes:

[0070] A first original value acquisition submodule is used to obtain the original value in the enable bit register;

[0071] A first value modification submodule is configured to modify the value of the valid bit of the enable bit register to a first preset value in the original value of the enable bit register;

[0072] The first value writing submodule is used to write the modified value in the enable bit register into the enable bit register.

[0073] Optionally, the second value modification module includes:

[0074] The second original value acquisition submodule is used to obtain the original value of the data bit register from the data bit register;

[0075] The second value modification submodule is used to modify the value of the valid bit of the data bit register according to the current operating state;

[0076] The second value writing submodule is used to write the modified value of the data bit register into the data bit register.

[0077] Optionally, the second value modification submodule includes:

[0078] A third value modification submodule is used to modify the value of the valid bit of the data bit register to a first preset value when the host is in the power-on state;

[0079] The fourth value modification submodule is used to modify the value of the valid bit of the data bit register to a second preset value when the host is in a boot-up completion state.

[0080] Optionally, the first status confirmation module includes:

[0081] A first state confirmation submodule is used to determine that the state of the host is the power-on state when the value of the valid bit of the data bit register is a first preset value;

[0082] The second status confirmation submodule is used to determine that the host status is a boot-up completion status when the value of the valid bit of the data bit register is a second preset value.

[0083] Optionally, the device further comprises:

[0084] A third value modification module is configured to, when the host runs to the petiboot stage, set the value of the valid bit of the enable bit register to a first preset value by using a pre-acquired value modification tool, wherein the value modification tool includes a value acquisition tool and a value storage tool;

[0085] a fourth value modification module, configured to, when the value of the valid bit of the enable bit register is set to the first preset value, modify the value of the valid bit of the data bit register to a value corresponding to the current running state by the host through a value modification tool;

[0086] The third value acquisition module is used by the BMC to obtain the value of the enable bit register;

[0087] a fourth value acquisition module, configured to acquire a value of the data bit register when the value of the valid bit of the enable bit register is a first preset value;

[0088] The second state confirmation module is used to determine the current operating state of the host according to the value of the valid bit of the data bit register.

[0089] Optionally, the device further comprises:

[0090] The value modification tool acquisition module is used to obtain the value modification tool when the host enters the image compilation stage;

[0091] Tool writing module, used to write the value modification tool into the host's image file;

[0092] File refresh module, used to refresh the image file;

[0093] The boot module is used to enter the boot phase in response to the completion of the image file refresh.

[0094] Optionally, the value modification tool acquisition module includes:

[0095] Code reading submodule, used to read skiboot source code;

[0096] The tool code acquisition submodule is used to obtain the source code corresponding to the value modification tool from the skiboot source code. The source code corresponding to the value modification tool includes the source code corresponding to the value acquisition tool and the source code corresponding to the value storage tool.

[0097] The code compilation submodule is used to compile the source code corresponding to the value modification tool to obtain the value modification tool.

[0098] Optionally, the third value modification module includes:

[0099] The third original value acquisition submodule is used to obtain the original value of the enable bit register through a value acquisition tool;

[0100] a fifth value modification submodule, configured to modify the value of the valid bit of the enable bit register to a first preset value;

[0101] The third value writing submodule is used to write the modified value of the enable bit register into the enable bit register through a value storage tool.

[0102] Optionally, the fourth value modification module includes:

[0103] A fourth original value acquisition submodule is used to obtain the original value of the data bit register from the data bit register through a value acquisition tool;

[0104] a sixth value modification submodule, configured to modify the value of the valid bit of the data bit register according to the current operating state;

[0105] The fourth value writing submodule is used to write the modified value of the data bit register into the data bit register through a value storage tool.

[0106] Optionally, the fifth value modification module includes:

[0107] a seventh value modification submodule, configured to modify the value of the valid bit of the data bit register to a first preset value when the host is in a powered-on state;

[0108] The eighth value modification submodule is used to modify the value of the valid bit of the data bit register to a second preset value when the host is in a boot completion state.

[0109] Optionally, the second status confirmation module includes:

[0110] A third state confirmation submodule is used to determine that the state of the host is the power-on state when the value of the valid bit of the data bit register is a first preset value;

[0111] The fourth status confirmation submodule is used to determine that the host status is a boot-up completion status when the value of the valid bit of the data bit register is a second preset value.

[0112] A third aspect of an embodiment of the present application provides a non-volatile readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps in the method of the first aspect of the present application are implemented.

[0113] The fourth aspect of an embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of the method of the first aspect of the present application are implemented.

[0114] According to the host status confirmation method provided by the present application, when the host enters the fast restart phase, the host sets the value of the valid bit of the enable bit register to a first preset value; when the value of the valid bit of the enable bit register is set to the first preset value, the host sets the value of the valid bit of the data bit register according to the current running state; the BMC obtains the value of the enable bit register; when the value of the valid bit of the enable bit register is the first preset value, the host obtains the value of the data bit register; and the host determines the current running state according to the value of the valid bit of the data bit register. In this method, when the host enters the fast restart phase, the host first sets the value of the valid bit of the enable bit register to the first preset value, and then modifies the value of the valid bit of the data bit register according to the current running state of the host; the BMC first obtains the value of the enable bit register; when the value of the valid bit of the enable bit register is the first preset value, the host obtains the value of the data bit register; and determines the current running state of the host according to the value of the valid bit of the data bit register. The BMC only needs to determine the host state according to the value of the valid bit of the data bit register. This method is very convenient and fast, does not rely on any protocol, improves the running efficiency of the host, and improves the running speed of the BMC. BRIEF DESCRIPTION OF THE DRAWINGS

[0115] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0116] FIG1 is a flow chart of a host status confirmation method proposed in some embodiments of the present application;

[0117] FIG2 is a flowchart of status confirmation in the fast restart phase proposed in some embodiments of the present application;

[0118] FIG3 is a flowchart of the status confirmation of the fast restart phase in the related art;

[0119] FIG4 is a flow chart of petiboot stage status confirmation proposed in some embodiments of the present application;

[0120] FIG5 is a flow chart of a method for confirming host status in the petiboot phase in the related art;

[0121] FIG6 is a schematic diagram of a host status confirmation device proposed in some embodiments of the present application;

[0122] FIG7 is a schematic diagram of a host status confirmation device proposed in some embodiments of the present application. DETAILED DESCRIPTION

[0123] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0124] First, the nouns appearing in the embodiments of this application are explained as follows:

[0125] Host: The firmware combination for system startup and initialization, also serving as the underlying bootloader for the operating system. It primarily includes the Self Boot Engine (SBE), Hostboot, and Skiboot. Host is embedded in the server. Specifically, SBE resides in the server's CPU, while Hostboot and Skiboot can reside in the server motherboard's flash memory card.

[0126] skiboot: Part of the host, it is a very important stage of the entire boot process.

[0127] hostboot: Part of the host, it is a very important stage of the entire boot process.

[0128] BMC (Baseboard Management Controller) monitors and controls system hardware. For example, it monitors system temperature, voltage, fans, power supplies, and other parameters, and makes appropriate adjustments to ensure a healthy system. It resets the system in the event of a fault and records various hardware information and logs for user notification and troubleshooting.

[0129] PLDM: (Platform Level Data Model), an application layer data transmission protocol.

[0130] IPMI: (Intelligent Platform Management Interface) is a complete hardware management specification that includes servers and other systems (such as storage devices, networks, and communications equipment).

[0131] MCTP (Management Component Transport Protocol) is a physical media-independent protocol used for information exchange between components in a computer system. It is independent of the underlying physical bus and is a bus-independent "data link layer" protocol. MCTP, defined by the DMTF PMCI (Distributed Management Task Force Platform Management Component Intercommunications) working group, provides an access interface for the monitoring and management functions of the platform management subsystem. This interface enables access, transmission, and configuration of platform manageability functions through the DMTF CIM (Common Information Model).

[0132] GPIO: General-purpose input / output, short for general-purpose input / output.

[0133] Post finish: Indicates the running status of the host. Complete post finish means that the host has completed the boot process, and incomplete post finish means that the host has not completed the boot process.

[0134] Referring to FIG1 , FIG1 is a flow chart of a host status confirmation method proposed in some embodiments of the present application. As shown in FIG1 , the method includes the following steps:

[0135] S11: When the host enters the fast restart phase, the host sets the value of the valid bit of the enable bit register to a first preset value.

[0136] In this embodiment, the fast restart phase is a system restart during runtime. This restart only restarts the underlying operating system, without powering down the entire computer. The host is the operating system's underlying bootloader (the firmware combination that boots and initializes the system). The enable bit register stores enable bit data. The enable bit register has multiple pins, each corresponding to a bit in the value.

[0137] In this embodiment, as shown in Figure 2, Figure 2 is a fast restart phase status confirmation flow chart proposed in some embodiments of the present application. When the host enters the fast restart phase, the host obtains the value of the enable bit register and sets the value of the valid bit of the enable bit register to the first preset value, that is, sets the corresponding pin in the enable bit register to a high level.

[0138] For example, the first preset value is 1.

[0139] In this embodiment, the host sets the value of the valid bit of the enable bit register to the first preset value, including:

[0140] S11-1: Get the original value in the enable bit register.

[0141] In this embodiment, as shown in FIG2 , the host first obtains the original value in the enable bit register, and then reads the data in the enable bit register to obtain the original value in the enable bit register.

[0142] S11 - 2 : modifying the value of the valid bit of the enable bit register to a first preset value in the original value of the enable bit register.

[0143] In this embodiment, the host modifies the value of the valid bit of the enable bit register to the first preset value in the original value of the enable bit register, that is, pulls up the corresponding pin of the enable bit register to a high level.

[0144] S11-3: Write the modified value in the enable bit register into the enable bit register.

[0145] In this embodiment, the host writes the modified value in the enable bit register into the enable bit register, thereby completing the modification of the value of the valid bit of the enable bit register.

[0146] S12: When the value of the valid bit of the enable bit register is set to the first preset value, the host sets the value of the valid bit of the data bit register according to the current running state.

[0147] In this embodiment, the value of the valid bit of the data bit register represents the current operating state of the host.

[0148] In this embodiment, it is pre-agreed that the operating state of the host corresponds to the value of the valid bit in the data bit register, and the value of the valid bit of the data bit register is set. It is pre-agreed that when the operating state of the host is the boot state, the value of the valid bit of the data bit register is a first preset value, and when the operating state of the host is the boot completion state, the value of the valid bit of the data register is a second preset value.

[0149] In this embodiment, the host sets the value of the valid bit of the data bit register according to the current running state, including the following specific steps:

[0150] S12-1: Get the original value of the data bit register from the data bit register.

[0151] In this embodiment, when the value of the valid bit of the enable bit register is set to the first preset value, the original value of the data bit register is obtained from the data bit register. The value originally stored in the data bit register is the original value of the data bit register, and each bit of the original value of the data bit register has not been modified.

[0152] S12-2: Modify the value of the valid bit of the data bit register according to the current operating status.

[0153] In this embodiment, the host modifies the value of the valid bit of the data bit register according to the current operating state. The specific steps are as follows:

[0154] S12-2-1: When the host is in the power-on state, the value of the valid bit of the data bit register is modified to a first preset value.

[0155] In this embodiment, when the host is in an unpost-finished state, the value of the valid bit of the data bit register is modified to a first preset value. When modifying the value of the valid bit of the data bit register, the corresponding valid bit is determined from the value extracted from the data bit register, the valid bit representing the current state of the host, and the value of the valid bit is modified to the first preset value.

[0156] S12-2-2: When the host is in the boot-up completion state, the value of the valid bit of the data bit register is modified to a second preset value.

[0157] In this embodiment, when the host is in a post-finish state, the value of the valid bit of the data bit register is modified to a second preset value. When modifying the value of the valid bit of the data bit register, a corresponding valid bit is determined from the value extracted from the data bit register, the valid bit representing the current state of the host, and the value of the valid bit is modified to the second preset value.

[0158] For example, the second preset value is 0.

[0159] S12-3: Write the modified value of the data bit register into the data bit register.

[0160] In this embodiment, after modifying the acquired value of the data bit register, the host writes the modified value of the data bit register into the data bit register.

[0161] S13: BMC obtains the value of the enable bit register.

[0162] In this embodiment, a BMC (Baseboard Management Controller) is a device connected to the host, which can manage various states of the host and interact with the host.

[0163] In this embodiment, the BMC needs to obtain the current state of the host and then decide the subsequent steps to be performed. When the BMC needs to determine the current state of the host, it reads the read enable bit register to obtain the value of the enable bit register.

[0164] S14: When the value of the valid bit of the enable bit register is the first preset value, the value of the data bit register is acquired.

[0165] In this embodiment, as shown in FIG2 , the BMC obtains the value of the valid bit of the data bit register when the value of the valid bit of the enable bit register is the first preset value. If the value of the valid bit of the enable bit register is not the first preset value, the value of the data bit register is not obtained.

[0166] S15: Determine the current operating state of the host according to the value of the valid bit of the data bit register.

[0167] In this embodiment, the BMC determines the current running state of the host according to the value of the valid bit of the data bit register.

[0168] In this embodiment, the specific steps of determining the current operating state of the host according to the value of the valid bit of the data bit register include:

[0169] S15-1: When the value of the valid bit of the data bit register is a first preset value, determine that the host is in a power-on state.

[0170] In this embodiment, the BMC reads the value of the data bit register and determines the value of the valid bit according to the pre-agreed valid bit. When the value of the valid bit of the data bit register is the first preset value, the host is determined to be in the power-on state.

[0171] S15-2: When the value of the valid bit of the data bit register is the second preset value, determine that the state of the host is the boot-up completion state.

[0172] In this embodiment, the BMC reads the value of the data bit register, and when the valid value of the data bit register read is the second preset value, it is determined that the state of the host is the boot completion state.

[0173] Refer to Figure 3, which is a flowchart of the status confirmation in the fast restart phase in the related art. As shown in Figure 3, in the related art, in the fast restart phase, the confirmation of the host status is implemented based on the PLDM protocol. When the machine requests a fast start, the host sends a PLDM message to the BMC through a combination of the PLMD protocol and the MCTP protocol. After receiving the PLMD message, the BMC obtains that the current status of the host is unpost-finish (power-on status). For power architecture machines, messages are mainly sent to the BMC through the PLMD, MCTP, and IPMI protocols. This method relies on the PLMD, MCTP, and IPMI protocols. When there is a problem with the protocol stack, it cannot guarantee that the BMC confirms the status of the host.

[0174] In this embodiment, the host and the BMC have pre-agreed to use the level to represent the host's status during host fast startup. The host sets the value of the valid bit of the enable bit register and the data bit register according to its own status. When the BMC needs to determine the host's status, it reads the value of the enable bit register and the value of the data bit register, and determines the host's current status based on the value of the data bit register. There is no need to rely on any protocol for data transmission, and the host's status can be confirmed only by the level. This enables the BMC to quickly and easily confirm the host's status, thereby improving the overall system operation speed and system stability.

[0175] In some other embodiments of the present application, before the host sets the value of the valid bit of the enable bit register to the first preset value, the method further includes:

[0176] S21: The host sends a fast restart request to the host.

[0177] In this embodiment, the fast restart request is used to request the host to perform a fast restart.

[0178] In this embodiment, when the host is running, the host sends a fast restart request to the host when a fast restart is required.

[0179] In this embodiment, the host can be set by the outside at any time to set the host to perform a fast restart. When the host detects the setting, a fast restart request is sent to the host.

[0180] S22: The host enters the fast restart phase according to the fast restart request.

[0181] In this embodiment, after receiving the fast restart request, the host enters the fast restart phase.

[0182] In this embodiment, in the fast restart phase, the host is not powered off, and the operating system is restarted and reloaded.

[0183] In some other embodiments of the present application, the method further includes:

[0184] S31: When the host runs to the petiboot stage, the host sets the value of the valid bit of the enable bit register to a first preset value through a pre-acquired value modification tool, where the value modification tool includes a value acquisition tool and a value storage tool.

[0185] In this embodiment, petiboot (boot image operation phase) is a stage that the host goes through during startup. During this phase, the BMC needs to confirm the host's operating status and determine subsequent data interaction with the host. The data modification tool includes a data acquisition tool and a value storage tool. The value acquisition tool is used to obtain the values ​​in the enable bit register and the data bit register. The value storage tool stores the modified values ​​in the registers. During the petiboot phase, because the system is already running stably, it is impossible to directly obtain and modify the values ​​through code. Therefore, the value modification tool is required to modify the values.

[0186] In this embodiment, when the host runs to petiboot, the host sets the value of the valid bit of the enable bit register to the first preset value through a pre-acquired value modification tool. The specific steps include:

[0187] S31-1: Use the value acquisition tool to obtain the original value of the enable bit register.

[0188] In this embodiment, as shown in Figure 4, which is a flow chart of confirming the status of the petiboot stage proposed in one embodiment of the present application, when the host runs to the petiboot stage, it enters the hostboot, skiboot, and petiboot stages in sequence. When entering the petiboot stage, the original value of the enable bit register is obtained through a preset value acquisition tool (getscom).

[0189] S31 - 2 : Modify the value of the valid bit of the enable bit register to a first preset value.

[0190] In this embodiment, after the value of the enable bit register is obtained, the value of the valid bit of the enable bit register is modified to a first preset value.

[0191] S31-3: Use the value storage tool to write the modified value of the enable bit register into the enable bit register.

[0192] In this embodiment, as shown in FIG4 , after the value of the enable bit register is modified, the modified value of the enable bit register is written into the enable bit register through a value storage tool (putscom).

[0193] S32: When the value of the valid bit of the enable bit register is set to the first preset value, the host modifies the value of the valid bit of the data bit register to a value corresponding to the current operating state through a value modification tool.

[0194] In this embodiment, as shown in FIG4 , when the value of the valid bit of the enable bit register is set to a first preset value, the host modifies the value of the valid bit of the data bit register to a value corresponding to the current operating state through a data modification tool. The specific steps include:

[0195] S32-1: Use the value acquisition tool to obtain the original value of the data bit register from the data bit register.

[0196] In this embodiment, the original value of the data bit register is obtained from the data bit register by using a value acquisition tool.

[0197] S32-2: Modify the value of the valid bit of the data bit register according to the current operating status.

[0198] In this embodiment, the host modifies the value of the valid bit of the data bit register according to the current running state. The specific steps include:

[0199] S32-2-1: When the host is in the power-on state, the value of the valid bit of the data bit register is modified to a first preset value.

[0200] In this embodiment, when the host is in the power-on state, the value of the valid bit of the data bit register is modified to a first preset value, and the corresponding pin is set to a high level.

[0201] S32-2-2: When the host is in the boot-up completion state, the value of the valid bit of the data bit register is modified to a second preset value.

[0202] In this embodiment, when the host is in the boot-up completion state, the value of the valid bit of the data bit register is modified to a second preset value, and the corresponding pin is set to a low level.

[0203] In this embodiment, because the BMC's function for the boot completion status is valid at a low level, when the host runs to the petiboot stage, the host needs to send the BMC an information that the host is currently in the boot completion status, that is, the postfinish stage. Therefore, in Figure 4, the valid position of the value in the data bit register is set to 0, that is, the second preset value. Through the BMC, the current status of the host is the boot completion status.

[0204] S32-3: Use the value storage tool to write the modified value of the data bit register into the data bit register.

[0205] In this embodiment, after the value of the data bit register is modified, a numerical storage tool is used to write the modified value of the data bit register into the data bit register.

[0206] S33: BMC obtains the value of the enable bit register.

[0207] In this embodiment, as shown in FIG4 , the BMC first obtains the value of the enable bit register, and according to the value of the enable bit register, determines the level of the pin corresponding to the enable bit register.

[0208] S34: When the value of the valid bit of the enable bit register is the first preset value, obtain the value of the data bit register.

[0209] In this embodiment, the BMC obtains the value of the data bit register when the value of the valid bit of the enable bit register is the first preset value and the pin of the enable bit register is at a high level.

[0210] S35: Determine the current operating state of the host according to the value of the valid bit of the data bit register.

[0211] In this embodiment, after the BMC obtains the value of the data bit register, it determines the value of the valid bit of the data bit register, and determines the current running state of the host according to the value of the valid bit of the data bit register.

[0212] In this embodiment, the specific steps of determining the current operating state of the host according to the value of the valid bit of the data bit register include:

[0213] S35-1: When the value of the valid bit of the data bit register is the first preset value, determine that the state of the host is the power-on state.

[0214] In this embodiment, as shown in FIG4 , according to a pre-agreed rule, the BMC determines that the host is in the power-on state when the value of the valid bit of the data bit register is a first preset value.

[0215] S35-2: When the value of the valid bit of the data bit register is the second preset value, determine that the state of the host is the boot-up completion state.

[0216] In this embodiment, as shown in FIG4 , according to a pre-agreed rule, the BMC determines that the host state is the boot-up completion state when the value of the valid bit of the data bit register is a second preset value.

[0217] In this embodiment, after determining that the host is in the boot-up complete state, the BMC starts subsequent data interaction with the host.

[0218] In another embodiment of the present application, before the host sets the value of the valid bit of the enable bit register to the first preset value using a pre-acquired value modification tool, the method further includes:

[0219] S41: When the host enters the image compilation phase, obtain the value modification tool.

[0220] S41-1: Read the skiboot source code.

[0221] In this embodiment, the skiboot source code is a part of the host, in which the source code corresponding to the data modification tool is stored.

[0222] In this embodiment, as shown in FIG4 , during the host boot image compilation phase, the skiboot source code is first read.

[0223] S41-2: Obtain source code corresponding to the value modification tool from the skiboot source code. The source code corresponding to the value modification tool includes source code corresponding to the value acquisition tool and source code corresponding to the value storage tool.

[0224] In this embodiment, after reading the skiboot source code, the source code corresponding to the value modification tool is obtained therefrom. The source code corresponding to the value modification tool includes the source code corresponding to the data acquisition tool and the source code corresponding to the data storage tool.

[0225] S41-3: Compile the source code corresponding to the numerical value modification tool to obtain the numerical value modification tool.

[0226] In this embodiment, after the source code corresponding to the value modification tool is obtained, the source code corresponding to the data modification tool is compiled to obtain the corresponding value modification tool.

[0227] S42: Writing the value modification tool into the image file of the host.

[0228] In this embodiment, as shown in FIG4 , after the value modification tools (getscom and pputscom) are obtained, they are placed in petiboot, that is, written into the image file of the host.

[0229] S43: Refresh the image file.

[0230] In this embodiment, as shown in FIG4 , after the value modification tool is written into the image file, the image file is refreshed so that the value modification tool can run normally in the host.

[0231] S44: In response to the image file being updated, the system enters the startup phase.

[0232] In this embodiment, after the image file is refreshed, that is, when the getcom tool and the putscom tool can run normally, the host enters the image booting operation stage, that is, the booting and starting stage.

[0233] Refer to Figure 5, which is a flowchart of a method for confirming host status during the petiboot phase in related art. As shown in Figure 5, after starting operation, the host first enters the hostboot phase, then the skiboot phase, and then the petiboot phase. When the host reaches the petiboot phase, the host sends an IPMI message to the BMC via the IPMI protocol to notify the BMC that the host is in the unpost-finish (power-on state). The BMC receives the IPMI message and, after receiving the IPMI message, determines the interaction logic for other matters based on the host's operating status. This method relies on the IPMI protocol and cannot guarantee that the BMC can determine the host's status when the protocol stack fails, which also increases the power consumption of the entire system.

[0234] In the above embodiment of the present application, the high and low levels of the pins on the GPIO represent the status of the host. The BMC only needs to determine the current status of the host based on the value of the valid bit of the data bit register. The implementation scheme does not rely on any protocol. The communication between the host and the BMC is simpler, and the BMC can stably obtain the operating status of the host to ensure the normal interaction of subsequent processes. At the same time, this GPIO-based interaction method has lower power consumption, reduces the pressure on the communication protocol stack, and increases the stability of the entire system.

[0235] Based on the same inventive concept, some embodiments of the present application provide a host status confirmation device. Referring to FIG6 , FIG6 is a schematic diagram of a host status confirmation device 600 proposed in some embodiments of the present application. As shown in FIG6 , the device includes:

[0236] A first value modifying module 601 is configured to, when the host enters a fast restart phase, set the value of the valid bit of the enable bit register to a first preset value;

[0237] A second value modification module 602 is configured to, when the value of the valid bit of the enable bit register is set to a first preset value, set the value of the valid bit of the data bit register by the host according to the current running state;

[0238] A first value acquisition module 603 is used by the BMC to obtain the value of the enable bit register;

[0239] A second value acquisition module 604 is configured to acquire a value of the data bit register when the value of the valid bit of the enable bit register is a first preset value;

[0240] The first state confirmation module 605 is used to determine the current running state of the host according to the value of the valid bit of the data bit register.

[0241] Optionally, the device further comprises:

[0242] Restart request sending module, used by the host to send a quick restart request to the host;

[0243] The fast restart module is used for the host to enter the fast restart phase according to the fast restart request.

[0244] Optionally, the first value modification module includes:

[0245] A first original value acquisition submodule is used to obtain the original value in the enable bit register;

[0246] A first value modification submodule is configured to modify the value of the valid bit of the enable bit register to a first preset value in the original value of the enable bit register;

[0247] The first value writing submodule is used to write the modified value in the enable bit register into the enable bit register.

[0248] Optionally, the second value modification module includes:

[0249] The second original value acquisition submodule is used to obtain the original value of the data bit register from the data bit register;

[0250] The second value modification submodule is used to modify the value of the valid bit of the data bit register according to the current operating state;

[0251] The second value writing submodule is used to write the modified value of the data bit register into the data bit register.

[0252] Optionally, the second value modification submodule includes:

[0253] A third value modification submodule is used to modify the value of the valid bit of the data bit register to a first preset value when the host is in the power-on state;

[0254] The fourth value modification submodule is used to modify the value of the valid bit of the data bit register to a second preset value when the host is in a boot-up completion state.

[0255] Optionally, the first status confirmation module includes:

[0256] A first state confirmation submodule is used to determine that the state of the host is the power-on state when the value of the valid bit of the data bit register is a first preset value;

[0257] The second status confirmation submodule is used to determine that the host status is a boot-up completion status when the value of the valid bit of the data bit register is a second preset value.

[0258] Optionally, the device further comprises:

[0259] A third value modification module is configured to, when the host runs to the petiboot stage, set the value of the valid bit of the enable bit register to a first preset value by using a pre-acquired value modification tool, wherein the value modification tool includes a value acquisition tool and a value storage tool;

[0260] a fourth value modification module, configured to, when the value of the valid bit of the enable bit register is set to the first preset value, modify the value of the valid bit of the data bit register to a value corresponding to the current running state by the host through a value modification tool;

[0261] The third value acquisition module is used by the BMC to obtain the value of the enable bit register;

[0262] a fourth value acquisition module, configured to acquire a value of the data bit register when the value of the valid bit of the enable bit register is a first preset value;

[0263] The second state confirmation module is used to determine the current operating state of the host according to the value of the valid bit of the data bit register.

[0264] Optionally, the device further comprises:

[0265] The value modification tool acquisition module is used to obtain the value modification tool when the host enters the image compilation stage;

[0266] Tool writing module, used to write the value modification tool into the host's image file;

[0267] File refresh module, used to refresh the image file;

[0268] The boot module is used to enter the boot phase in response to the completion of the image file refresh.

[0269] Optionally, the value modification tool acquisition module includes:

[0270] Code reading submodule, used to read skiboot source code;

[0271] The tool code acquisition submodule is used to obtain the source code corresponding to the value modification tool from the skiboot source code. The source code corresponding to the value modification tool includes the source code corresponding to the value acquisition tool and the source code corresponding to the value storage tool.

[0272] The code compilation submodule is used to compile the source code corresponding to the value modification tool to obtain the value modification tool.

[0273] Optionally, the third value modification module includes:

[0274] The third original value acquisition submodule is used to obtain the original value of the enable bit register through a value acquisition tool;

[0275] a fifth value modification submodule, configured to modify the value of the valid bit of the enable bit register to a first preset value;

[0276] The third value writing submodule is used to write the modified value of the enable bit register into the enable bit register through a value storage tool.

[0277] Optionally, the fourth value modification module includes:

[0278] A fourth original value acquisition submodule is used to obtain the original value of the data bit register from the data bit register through a value acquisition tool;

[0279] a sixth value modification submodule, configured to modify the value of the valid bit of the data bit register according to the current operating state;

[0280] The fourth value writing submodule is used to write the modified value of the data bit register into the data bit register through a value storage tool.

[0281] Optionally, the fifth value modification module includes:

[0282] a seventh value modification submodule, configured to modify the value of the valid bit of the data bit register to a first preset value when the host is in a powered-on state;

[0283] The eighth value modification submodule is used to modify the value of the valid bit of the data bit register to a second preset value when the host is in a boot completion state.

[0284] Optionally, the second status confirmation module includes:

[0285] A third state confirmation submodule is used to determine that the state of the host is the power-on state when the value of the valid bit of the data bit register is a first preset value;

[0286] The fourth status confirmation submodule is used to determine that the host status is a boot-up completion status when the value of the valid bit of the data bit register is a second preset value.

[0287] Based on the same inventive concept, another embodiment of the present application provides a non-volatile readable storage medium having a computer program stored thereon. When the program is executed by a processor, the steps in the host status confirmation method of any of the above embodiments of the present application are implemented.

[0288] Based on the same inventive concept, another embodiment of the present application provides an electronic device 700, including a memory 702, a processor 701, and a computer program stored in the memory and executable on the processor, which, when executed by the processor, implements the steps of the host status confirmation method of any of the above embodiments of the present application.

[0289] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0290] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0291] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the embodiments of the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0292] The present application embodiment is described with reference to the flow chart and / or block diagram of the method, terminal device (system), and computer program product according to the embodiment of the present application. It should be understood that each process and / or box in the flow chart and / or block diagram and the combination of the process and / or box in the flow chart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device produce a device for realizing the function specified in one process or multiple processes and / or one box or multiple boxes of the flow chart.

[0293] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0294] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce computer-implemented processing, so that the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0295] Although preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they become aware of the basic inventive concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0296] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0297] The host status confirmation method, device, equipment and storage medium provided by the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for general technical personnel in this field, according to the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for confirming host status, characterized in that: The method comprises: When the host enters the fast restart phase, the host sets the value of the valid bit of the enable bit register to a first preset value; When the value of the valid bit of the enable bit register is set to a first preset value, the host sets the value of the valid bit of the data bit register according to the current running state; BMC obtains the value of the enable bit register; When the value of the valid bit of the enable bit register is the first preset value, acquiring the value of the data bit register; The current running state of the host is determined according to the value of the valid bit of the data bit register.

2. The method according to claim 1, characterized in that Before the host sets the value of the valid bit of the enable bit register to the first preset value, the method further includes: The host sends a quick restart request to the host; The host enters a fast restart phase according to the fast restart request.

3. The method according to claim 1, characterized in that The host sets the value of the valid bit of the enable bit register to a first preset value, including: Obtaining the original value in the enable bit register; In the original value in the enable bit register, modify the value of the valid bit of the enable bit register to the first preset value; The modified value in the enable bit register is written into the enable bit register.

4. The method according to claim 1, characterized in that: The host sets the value of the valid bit of the data bit register according to the current running state, including: From the data bit register, obtaining the original value of the data bit register; Modify the value of the valid bit of the data bit register according to the current running state; The modified value of the data bit register is written into the data bit register.

5. The method according to claim 4, characterized in that The modifying of the value of the valid bit of the data bit register according to the current running state includes: When the host is in a powered-on state, modifying the value of the valid bit of the data bit register to the first preset value; When the host is in a boot-up completion state, the value of the valid bit of the data bit register is modified to a second preset value.

6. The method according to claim 1, characterized in that Determining the current running state of the host according to the value of the valid bit of the data bit register includes: When the value of the valid bit of the data bit register is the first preset value, determining that the state of the host is a power-on state; When the value of the valid bit of the data bit register is the second preset value, it is determined that the state of the host is a boot-up completion state.

7. The method according to claim 1, characterized in that The method further comprises: When the host runs to the petiboot stage, the host modifies the work by pre-acquired values. A tool for setting the value of the valid bit of the enable bit register to the first preset value, wherein the value modification tool includes a value acquisition tool and a value storage tool; When the value of the valid bit of the enable bit register is set to the first preset value, the host modifies the value of the valid bit of the data bit register to a value corresponding to the current running state through the value modification tool; The BMC obtains the value of the enable bit register; When the value of the valid bit of the enable bit register is the first preset value, acquiring the value of the data bit register; The current running state of the host is determined according to the value of the valid bit of the data bit register.

8. The method according to claim 7, characterized in that Before the host sets the value of the valid bit of the enable bit register to the first preset value by using a pre-acquired value modification tool, the method further includes: When the host enters the image compilation stage, obtaining the value modification tool; Writing the value modification tool into the image file of the host; Refreshing the image file; In response to the image file being refreshed, the booting phase is entered.

9. The method according to claim 8, characterized in that The obtaining of the value modification tool comprises: Read skiboot source code; Obtaining source code corresponding to the value modification tool from the skiboot source code, wherein the source code corresponding to the value modification tool includes source code corresponding to the value acquisition tool and source code corresponding to the value storage tool; Compile the source code corresponding to the value modification tool to obtain the value modification tool.

10. The method according to claim 7, characterized in that The host sets the value of the valid bit of the enable bit register to the first preset value by using a pre-acquired value modification tool, including: Obtaining the original value of the enable bit register through the value acquisition tool; Modify the value of the valid bit of the enable bit register to the first preset value; The modified value of the enable bit register is written into the enable bit register through the numerical value storage tool.

11. The method according to claim 7, characterized in that The host modifies the value of the valid bit of the data bit register to a value corresponding to the current running state by using the value modification tool, including: Obtaining the original value of the data bit register from the data bit register by the value acquisition tool; Modify the value of the valid bit of the data bit register according to the current running state; The modified value of the data bit register is written into the data bit register through the numerical storage tool.

12. The method according to claim 11, characterized in that The modifying of the value of the valid bit of the data bit register according to the current running state includes: When the host is in a powered-on state, modifying the value of the valid bit of the data bit register to the first preset value; When the host is in a boot-up completion state, the value of the valid bit of the data bit register is modified to a second preset value.

13. The method according to claim 7, characterized in that The host determines the current running state of the host according to the value of the valid bit of the data bit register, including: When the value of the valid bit of the data bit register is the first preset value, determining that the state of the host is a power-on state; When the value of the valid bit of the data bit register is the second preset value, it is determined that the state of the host is a boot-up completion state.

14. The method according to claim 1, characterized in that The host sets the value of the valid bit of the enable bit register to a first preset value, including: The pin corresponding to the valid bit of the enable bit register is set to a high level.

15. The method according to claim 7, characterized in that The value acquisition tool is configured to acquire the value in the enable bit register and the value in the data bit register.

16. The method according to claim 12, characterized in that The step of modifying the value of the valid bit of the data bit register to the first preset value comprises: The pin corresponding to the valid bit of the data bit register is set to a high level.

17. The method according to claim 12, characterized in that The step of modifying the value of the valid bit of the data bit register to a second preset value comprises: The pin corresponding to the valid bit of the data bit register is set to a low level.

18. A host status confirmation device, characterized in that: The device comprises: A first value modification module is configured to set the value of the valid bit of the enable bit register to a first preset value when the host enters the fast restart phase; A second value modification module is configured to, when the value of the valid bit of the enable bit register is set to a first preset value, set the value of the valid bit of the data bit register by the host according to the current running state; A first value acquisition module is configured to obtain the value of the enable bit register for the BMC; A second value acquisition module is configured to acquire the value of the data bit register when the value of the valid bit of the enable bit register is the first preset value; The first state confirmation module is configured to determine the current running state of the host according to the value of the valid bit of the data bit register.

19. A computer non-volatile readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps in the method according to any one of claims 1 to 17 are implemented.

20. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 17 are implemented.

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