Electronic component mounting structure

Abstract

Provided is an electronic component mounting structure with improved crack resistance. A mounting structure 100 for an electronic component 1 comprises: an electronic component 1 including a laminate 2 and external electrodes 3 that are formed on end surfaces of the laminate 2 and have mounting surface-side bent parts 351 extending to a mounting-side main surface AB; and a mounting substrate 101 including a land part 102 to which the external electrodes 3 are joined via solder 103. When the distance between the two mounting surface-side bent parts 351 is the inter-external electrode distance g1 and the distance between lands disposed on the mounting substrate is the inter-land distance g2, the inter-external electrode distance g1 and the inter-land distance g2 are approximately equal.

Description

Mounting structure for electronic components

[0001] The present invention relates to a mounting structure for electronic components.

[0002] For example, in a mounting structure of an electronic component such as a multilayer ceramic capacitor, the longitudinal distance from the end of the folded portion on the main surface side of the external electrode of the multilayer ceramic capacitor to the end of the mounting land is increased in order to improve crack resistance (see Patent Document 1).

[0003] JP 2014-11210 A

[0004] However, the inventors have discovered that when stress is applied to the mounting structure, cracks that occur inside the laminate are more likely to occur when the distance from the end of the folded portion on the main surface side to the end of the mounting land is longer.

[0005] An object of the present invention is to provide a mounting structure for electronic components with improved crack resistance.

[0006] In order to solve the above-mentioned problems, the present invention provides an electronic component comprising: a laminate having alternately stacked dielectric layers and internal electrodes, the laminate including a mounting-side main surface and a non-mounting-side main surface opposing each other in a stacking direction, two side surfaces opposing each other in a width direction intersecting the stacking direction, and a first end surface and a second end surface opposing each other in a length direction intersecting the stacking direction and the width direction; a first external electrode provided on the first end surface and having a mounting-side folded portion extending to the mounting-side main surface; and a second external electrode provided on the second end surface and having a mounting-side folded portion extending to the mounting-side main surface; and a first land portion to which the first external electrode is joined via solder, and a second external electrode to which the second external electrode is joined via solder. and a second land portion, wherein when the inter-external electrode distance g1 in the longitudinal direction between the end of the mounting surface side folded portion of the first external electrode that faces the second external electrode in the longitudinal direction and the end of the mounting surface side folded portion of the second external electrode that faces the first external electrode in the longitudinal direction is defined as g1, and the inter-land distance g2 in the longitudinal direction between the end of the first land portion that faces the second land portion in the longitudinal direction and the end of the second land portion that faces the first land portion in the longitudinal direction is defined as g2, the inter-external electrode distance g1 and the inter-land distance g2 are approximate to each other.

[0007] Furthermore, in order to solve the above-mentioned problems, the present invention provides an electronic component comprising: a laminate having alternately stacked dielectric layers and internal electrodes, the laminate including a mounting-side main surface and a non-mounting-side main surface opposing each other in a stacking direction, two side surfaces opposing each other in a width direction intersecting the stacking direction, and a first end surface and a second end surface opposing each other in a length direction intersecting the stacking direction and the width direction; a first external electrode provided on the first end surface and having a mounting-side folded portion extending to the mounting-side main surface; and a second external electrode provided on the second end surface and having a mounting-side folded portion extending to the mounting-side main surface; and a first land portion to which the first external electrode is joined via solder; and a second land portion to which a second external electrode is joined via solder, wherein an end of the mounting surface side folded portion of the first external electrode facing the second external electrode in the longitudinal direction and an end of the first land portion facing the second land portion in the longitudinal direction are located at approximately the same position in the longitudinal direction, and an end of the mounting surface side folded portion of the second external electrode facing the first external electrode in the longitudinal direction and an end of the second land portion facing the first land portion in the longitudinal direction are located at approximately the same position in the longitudinal direction.

[0008] Furthermore, in order to solve the above-mentioned problems, the present invention provides a mounting structure for an electronic component comprising: an electronic component including: a laminate having alternately stacked dielectric layers and internal electrodes, the laminate including a mounting-side main surface and a non-mounting-side main surface that face each other in a stacking direction, two side surfaces that face each other in a width direction that intersects with the stacking direction, and two end surfaces that face each other in a length direction that intersects with the stacking direction and the width direction; external electrodes that are provided on the two end surfaces and have mounting-side folded portions that extend to the mounting-side main surface; and a mounting board that has land portions to which the external electrodes are joined via solder, wherein the mounting structure for an electronic component comprises: an electronic component including: a laminate having alternately stacked dielectric layers and internal electrodes, the laminate including a mounting-side main surface and a non-mounting-side main surface that face each other in a stacking direction, two side surfaces that face each other in a width direction that intersects with the stacking direction and the width direction; and external electrodes that are provided on the two end surfaces and have mounting-side folded portions that extend to the mounting-side main surface; and a mounting board that has land portions to which the external electrodes are joined via solder, wherein the acute angle α of the angle formed by the mounting-side main surface and a straight line drawn from the end of the mounting-side folded portion of one of the external electrodes on the side of the other external electrode to the end of one of the land portions on the side of the other land satisfies 31°≦α≦90°.

[0009] According to the present invention, it is possible to provide a mounting structure for electronic components with improved crack resistance.

[0010] 1 is a schematic perspective view of a mounting structure 100 of a multilayer ceramic capacitor 1. It is a cross-sectional view taken along line II-II in FIG. 1. It is a cross-sectional view taken along line III-III in FIG. 1. (a) shows a schematic cross-sectional view of a laminate 2 having a two-row structure, (b) a three-row structure, and (c) a four-row structure. It is a table showing the results of a substrate bending resistance test conducted on Examples 1, 2, 3, and 4 and Comparative Examples 1, 2, and 3. It is a diagram showing the area S surrounded by the dotted line in FIG. 2 for Example 1 (a), Example 2 (b), Example 4 (c), Comparative Example 1 (d), and Comparative Example 2 (e).

[0011] Hereinafter, an electronic component mounting structure 100 according to an embodiment of the present invention will be described. In the embodiment, a multilayer ceramic capacitor 1 will be described as an example of the electronic component. Fig. 1 is a schematic perspective view of the mounting structure 100 for the multilayer ceramic capacitor 1. Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1. Fig. 3 is a cross-sectional view taken along line III-III in Fig. 1.

[0012] The mounting structure 100 includes a mounting substrate 101, a pair of lands 102 spaced apart from each other on the mounting substrate 101, solder 103 disposed on each of the lands 102, and a multilayer ceramic capacitor 1. The multilayer ceramic capacitor 1 is mounted on the mounting substrate 101 by the solder 103 on the lands 102.

[0013] (Multilayer ceramic capacitor 1) The multilayer ceramic capacitor 1 has a substantially rectangular parallelepiped shape and includes a laminate 2 and a pair of external electrodes 3 provided on both ends of the laminate 2. The laminate 2 includes an inner layer portion 11 in which a plurality of dielectric layers 14 and a plurality of internal electrode layers 15 are stacked, and an outer layer portion 12.

[0014] In the following description, the terms used to represent the orientation of the multilayer ceramic capacitor 1 are: a length direction L, which is the direction in which a pair of external electrodes 3 are provided in the multilayer ceramic capacitor 1; a stacking direction T, which is the direction in which the dielectric layers 14 and the internal electrode layers 15 are stacked; and a width direction W, which is the direction intersecting both the length direction L and the stacking direction T. In the embodiment, the width direction W is perpendicular to both the length direction L and the stacking direction T.

[0015] 2 , a pair of outer peripheral surfaces facing each other in the stacking direction T will be referred to as a first main surface AA and a second main surface (mounting-side main surface AB), and when there is no need to distinguish between the first main surface AA and the mounting-side main surface AB, they will be collectively referred to as main surface A. A pair of outer peripheral surfaces facing each other in the width direction W of the laminate 2 will be referred to as side surfaces B. A pair of outer peripheral surfaces facing each other in the length direction L of the laminate 2 will be referred to as a first end surface CA and a second end surface CB, and when there is no need to distinguish between the first end surface CA and the second end surface CB, they will be collectively referred to as end surfaces C.

[0016] The multilayer ceramic capacitor 1 including the laminate 2 and the external electrodes 3 preferably has a length L dimension of 0.8 mm or more and 1.2 mm or less, a lamination direction T dimension of 0.3 mm or more and 0.7 mm or less, and a width W dimension of 0.3 mm or more and 0.7 mm or less.

[0017] (Laminate 2) The laminate 2 preferably has a substantially rectangular parallelepiped shape, with rounded corners and ridges. The corners are the portions where three faces of the laminate 2 intersect, and the ridges are the portions where two faces of the laminate 2 intersect. In addition, irregularities may be formed on some or all of the main face A, side face B, and end face C.

[0018] The laminate 2 preferably has a length L dimension of 0.7 mm to 1.2 mm, a width W dimension of 0.2 mm to 0.7 mm, and a stacking direction T dimension of 0.2 mm to 0.7 mm.

[0019] The laminate 2 includes an inner layer portion 11, main surface-side outer layer portions 12A disposed on both main surface A sides of the inner layer portion 11, and side surface-side outer layer portions 12B disposed on both side surface B sides of the inner layer portion 11. When there is no need to particularly distinguish between the main surface-side outer layer portions 12A and the side surface-side outer layer portions 12B, they will be collectively referred to as outer layer portions 12.

[0020] (Inner Layer Portion 11) The inner layer portion 11 is formed by laminating a plurality of dielectric layers 14 and internal electrode layers 15.

[0021] (Dielectric Layer 14) The dielectric layer 14 is made of a ceramic material, such as BaTiO ３ , CaTiO ３ , SrTiO ３ , CaZrO ３ It is possible to use a dielectric ceramic made of the above-mentioned main components. It is also possible to use a material in which a subcomponent such as a Mn compound, an Fe compound, a Cr compound, a Co compound, or a Ni compound is added to these main components.

[0022] The thickness of the dielectric layers 14 is preferably 0.6 μm or more and 1.5 μm or less, and the number of the dielectric layers 14 including the outer layer portions 12 is preferably 270 or more and 490 or less.

[0023] When a piezoelectric ceramic material is used for the laminate 2, the electronic component functions as a ceramic piezoelectric element. Specific examples of piezoelectric ceramic materials include PZT (lead zirconate titanate) ceramic materials.

[0024] When a semiconductor ceramic material is used for the laminate 2, the electronic component functions as a thermistor element. Specific examples of semiconductor ceramic materials include spinel ceramic materials.

[0025] When a magnetic ceramic is used for the laminate 2, the electronic component functions as an inductor element. When functioning as an inductor element, the internal electrode layer 15 becomes a coil-shaped conductor. Specific examples of magnetic ceramic materials include ferrite ceramic materials.

[0026] (Internal electrode layer 15) The internal electrode layer 15 includes a plurality of first internal electrode layers 15A and a plurality of second internal electrode layers 15B. The first internal electrode layers 15A and the second internal electrode layers 15B are arranged alternately. Note that, unless it is necessary to particularly distinguish between the first internal electrode layers 15A and the second internal electrode layers 15B, they will be collectively referred to as the internal electrode layers 15. The internal electrode layers 15 can be made of an appropriate conductive material, such as a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy containing at least one of these metals, such as an Ag-Pd alloy.

[0027] The thickness of the internal electrode layers 15 is preferably, for example, 0.4 μm or more and 0.6 μm or less. The number of the internal electrode layers 15, including the first internal electrode layers 15A and the second internal electrode layers 15B, is preferably 270 or more and 490 or less.

[0028] The first internal electrode layer 15A includes a first opposing portion 152a opposing the second internal electrode layer 15B, and a first lead portion 151a led from the first opposing portion 152a toward the first end face CA. An end of the first lead portion 151a is exposed at the first end face CA and is electrically connected to a first external electrode 3A described below.

[0029] The second internal electrode layer 15B includes a second opposing portion 152b opposing the first internal electrode layer 15A, and a second lead portion 151b extending from the second opposing portion 152b to the second end face CB. An end of the second lead portion 151b is electrically connected to a second external electrode 3B described below.

[0030] In the laminate 2, the opposing portions 152a and 152b overlap in the stacking direction T, and the area surrounded by the main surface side outer layer portion 12A and the side surface side outer layer portion 12B is the effective layer portion. In the effective layer portion, electric charges are accumulated in the first opposing portions 152a of the first internal electrode layers 15A and the second opposing portions 152b of the second internal electrode layers 15B, thereby exhibiting the characteristics of a capacitor.

[0031] Note that, when there is no need to particularly distinguish between the first opposing portion 152a and the second opposing portion 152b, they will be collectively referred to as opposing portion 152. Furthermore, when there is no need to particularly distinguish between the first drawn-out portion 151a and the second drawn-out portion 151b, they will be collectively referred to as drawn-out portion 151.

[0032] The shape of the facing portion 152 is not particularly limited, but is preferably rectangular. However, the shape is not limited to this, and the corners may be rounded or angled (tapered). Alternatively, the facing portion 152 may be tapered with an inclination in either direction.

[0033] The shape of the lead-out portion 151 is not particularly limited, but is preferably rectangular. However, the shape is not limited to this, and the corners may be rounded or angled (tapered). Alternatively, the lead-out portion 151 may be tapered, with a slope increasing in either direction.

[0034] The width of the opposing portion 152 of the internal electrode layer 15 and the width of the drawn-out portion 151 of the internal electrode layer 15 may be the same width, or one of the widths may be narrower. The internal electrode layer 15 may be provided with a floating internal electrode layer that is not drawn out to either end face, and the floating internal electrode layer may divide the opposing electrode portion into multiple parts.

[0035] 4A and 4B are schematic cross-sectional views of the laminate 2 taken along the longitudinal direction L and the lamination direction T, showing examples of a structure in which the opposing portions 152 of the internal electrode layers 15 are divided into a plurality of parts. Fig. 4A shows a two-section structure in which the opposing portions 152 are divided into two, Fig. 4B shows a three-section structure in which the opposing portions 152 are divided into three, and Fig. 4C shows a four-section structure in which the opposing portions 152 are divided into four. It goes without saying that a structure with more than four sections may be used, although this is not shown.

[0036] 4, by dividing the opposing portions 152 of the internal electrode layers 15 into a plurality of parts, a plurality of capacitor components are formed between the opposing internal electrode layers 15, and these capacitor components are connected in series. Therefore, the voltage applied to each capacitor component is reduced, and the multilayer ceramic capacitor 1 can be made to withstand a high voltage.

[0037] (Outer Layer Portion 12 ) The outer layer portion 12 is an assembly of a plurality of dielectric layers 14 made of the same dielectric ceramic material as the dielectric layers 14 of the inner layer portion 11 .

[0038] (External Electrode 3) The external electrode 3 includes a first external electrode 3A and a second external electrode 3B.

[0039] The first external electrode 3A is connected to the first internal electrode layer 15A and is disposed on the first end face CA. The first external electrode 3A also includes a folded portion 35 that extends over part of the first main surface AA, part of the mounting-side main surface AB, and part of the side surface B. The folded portion 35 that extends over part of the mounting-side main surface AB will be referred to as a mounting-side folded portion 351.

[0040] The second external electrode 3B is connected to the second internal electrode layer 15B and is disposed on the second end face CB. The second external electrode 3B also includes a folded portion 35 that extends over part of the first main surface AA, part of the mounting-side main surface AB, and part of the side surface B. The folded portion 35 that extends over part of the mounting-side main surface AB will be described as a mounting-side folded portion 351, similar to the first external electrode 3A.

[0041] Hereinafter, unless it is necessary to particularly distinguish between the first external electrode 3A and the second external electrode 3B, they will be collectively referred to as the external electrode 3. The external electrode 3 includes a base electrode layer 31 and a plating layer 32.

[0042] (Base Electrode Layer 31) The base electrode layer 31 includes at least one selected from a baked layer, a conductive resin layer, a thin film layer, and the like.

[0043] (When the base electrode layer 31 includes a baking layer) The baking layer includes a glass component and a metal. The glass component includes at least one selected from B, Si, Ba, Mg, Al, Li, etc. The metal of the baking layer includes at least one selected from Cu, Ni, Ag, Pd, an Ag-Pd alloy, Au, etc. The baking layer may include multiple layers. The baking layer is formed by applying a conductive paste containing glass and a metal to the laminate 2 and baking it. The baking layer may be co-fired with the internal electrode layer 15 and the dielectric layer 14, or may be baked after the internal electrode layer 15 is baked. Note that when the baking layer is co-fired with the internal electrode layer 15 and the dielectric layer 14, it is preferable to form the baking layer by adding a dielectric material instead of the glass component.

[0044] The thickness of the baked layer in the length direction L at the center in the stacking direction T and the width direction W is preferably, for example, about 30 μm or more and 50 μm or less. Furthermore, when the base electrode layer 31 (baked layer) is provided in the folded portion 35, the thickness of the folded portion 35 in the stacking direction T at the center in the length direction L and the width direction W is preferably, for example, about 3 μm or more and 15 μm or less.

[0045] (When the base electrode layer 31 includes a conductive resin layer) The conductive resin layer may be multiple layers. The conductive resin layer may be disposed on the baked layer so as to cover the baked layer, or may be disposed directly on the laminate 2. The conductive resin layer includes a thermosetting resin and a metal. Because the conductive resin layer includes a thermosetting resin, it is more flexible than a conductive layer made of, for example, a plating film or a baked product of a conductive paste. Therefore, even when the ceramic electronic component is subjected to a physical impact or an impact due to a thermal cycle, the conductive resin layer functions as a buffer layer and can prevent cracks in the ceramic electronic component.

[0046] The metal contained in the conductive resin layer can be Ag, Cu, Ni, Sn, Bi, or an alloy containing any of these. The conductive resin layer can also use a metal powder whose surface is coated with Ag. When using a metal powder whose surface is coated with Ag, it is preferable to use Cu, Ni, Sn, Bi, or an alloy powder thereof as the metal powder. The reason for using Ag conductive metal powder as the conductive metal is that Ag has the lowest resistivity of all metals, making it suitable as an electrode material, and Ag is a noble metal, so it does not oxidize and has high resistance. Furthermore, it is possible to use a cheaper base metal while maintaining the above-mentioned properties of Ag.

[0047] Furthermore, the metal contained in the conductive resin layer may be Cu or Ni that has been subjected to an oxidation prevention treatment. The metal contained in the conductive resin layer may be a metal powder whose surface is coated with Sn, Ni, or Cu. When using a metal powder whose surface is coated with Sn, N, or Cu, it is preferable to use Ag, Cu, Ni, Sn, Bi, or an alloy powder thereof as the metal powder.

[0048] The metal contained in the conductive resin layer is preferably contained in an amount of 35 vol % or more and 75 vol % or less with respect to the volume of the entire conductive resin.

[0049] The shape of the metal contained in the conductive resin layer is not particularly limited. The conductive filler may be spherical, flat, or the like. The average particle size of the metal contained in the conductive resin layer is not particularly limited. The average particle size of the conductive filler may be, for example, about 0.3 μm to 10 μm. The metal contained in the conductive resin layer is mainly responsible for the electrical conductivity of the conductive resin layer. Specifically, contact between conductive fillers forms an electrical path inside the conductive resin layer. The metal contained in the conductive resin layer may be spherical, flat, or the like, but it is preferable to use a mixture of spherical metal powder and flat metal powder.

[0050] The resin for the conductive resin layer may be any of various known thermosetting resins, such as epoxy resin, phenoxy resin, phenol resin, urethane resin, silicone resin, polyimide resin, etc. Among these, epoxy resin is one of the most suitable resins, as it has excellent heat resistance, moisture resistance, adhesion, etc.

[0051] The resin contained in the conductive resin layer is preferably contained in an amount of 25 vol % or more and 65 vol % or less with respect to the volume of the entire conductive resin.

[0052] The conductive resin layer preferably contains a curing agent together with the thermosetting resin. When an epoxy resin is used as the base resin, various known compounds such as phenol-based, amine-based, acid anhydride-based, imidazole-based, active ester-based, and amide-imide-based compounds can be used as the curing agent for the epoxy resin.

[0053] The thickness in the length direction L of the conductive resin layer located at the center in the stacking direction T and width direction W at the end face C is preferably, for example, about 30 μm to 50 μm. Furthermore, the thickness, which is the length in the stacking direction T of the conductive resin layer at the center in the length direction L and width direction W of the conductive resin layer located at the folded-back portion 35, is preferably, for example, about 3 μm to 15 μm.

[0054] (When the Base Electrode Layer 31 Includes a Thin Film Layer) The thin film layer is formed by a thin film forming method such as sputtering or vapor deposition, and is a layer of 1 μm or less in thickness on which metal particles are deposited.

[0055] (Plating Layer 32) The plating layer 32 is disposed so as to cover the base electrode layer 31. The plating layer 32 includes, for example, at least one selected from Cu, Ni, Sn, Ag, Pd, an Ag—Pd alloy, Au, and the like. The plating layer 32 may be formed of multiple layers. Preferably, the plating layer 32 has a two-layer structure of Ni plating and Sn plating. The Ni plating layer prevents the base electrode layer 31 from being eroded by the solder 103 when mounting the ceramic electronic component, and the Sn plating layer improves the wettability of the solder 103 when mounting the ceramic electronic component, facilitating mounting. The thickness of each plating layer 32 is preferably 1 μm or more and 10 μm or less.

[0056] The external electrode 3 may be formed only by the plating layer 32 without providing the base electrode layer 31. That is, the multilayer ceramic capacitor 1 may have a structure including the plating layer 32 electrically connected to the internal electrode layer 15. In such a case, the plating layer 32 may be formed after a catalyst is applied to the surface of the laminate 2 as a pretreatment. In this case, the plating layer 32 preferably includes a lower-layer plating electrode formed on the surface of the laminate 2 and an upper-layer plating electrode formed on the surface of the lower-layer plating electrode. The lower-layer plating electrode and the upper-layer plating electrode each preferably include at least one metal selected from, for example, Cu, Ni, Sn, Pb, Au, Ag, Pd, Bi, or Zn, or an alloy containing such a metal. The lower-layer plating electrode is preferably formed using Ni, which has solder barrier properties, and the upper-layer plating electrode is preferably formed using Sn or Au, which has good solder wettability.

[0057] For example, when the first internal electrode layer 15A and the second internal electrode layer 15B are formed using Ni, the lower-layer plated electrode is preferably formed using Cu, which has good bonding properties with Ni. Note that the upper-layer plated electrode may be formed as needed, and the first external electrode 3A and the second external electrode 3B may each be composed of only the lower-layer plated electrode.

[0058] The plating layer 32 may have an upper-layer plating electrode as the outermost layer, or another plating electrode may be formed on the surface of the upper-layer plating electrode. The thickness of each plating layer 32 disposed without the base electrode layer 31 is preferably 1 μm or more and 15 μm or less. The plating layer 32 preferably does not contain glass. The metal ratio per unit volume of the plating layer 32 is preferably 99% by volume or more.

[0059] (Mounting structure 100) The mounting structure 100 of the embodiment includes the above-mentioned multilayer ceramic capacitor 1, a mounting substrate 101, a pair of land portions 102 spaced apart from each other on the mounting substrate 101, and solder 103 respectively arranged on each land portion 102.

[0060] The land portion 102 includes a first land portion 102A joined to the first external electrode 3A and a second land portion 102B joined to the second external electrode 3B. When there is no need to particularly distinguish between the first land portion 102A and the second land portion 102B, they will be collectively referred to as the land portion 102.

[0061] The distance between the end of the mounting surface side folded portion 351 of the first external electrode 3A on the second external electrode 3B side in the longitudinal direction L and the end of the mounting surface side folded portion 351 of the second external electrode 3B on the first external electrode 3A side in the longitudinal direction L is the external electrode distance g1.

[0062] The land distance in the longitudinal direction L between the end of the first land portion 102A on the second land portion 102B side in the longitudinal direction L and the end of the second land portion 102B on the first land portion 102A side in the longitudinal direction L is defined as g2.

[0063] In this embodiment, the distance g1 between the external electrodes and the distance g2 between the lands are similar. The distance g1 between the external electrodes and the distance g2 between the lands are similar if -0.44≦(g1−g2) / g2≦0.72. For example, when g2=0.5 mm, the distance g1 between the external electrodes and the distance g2 between the lands are similar if -22 μm≦g1−g2≦36 μm.

[0064] 2 , in this embodiment, the end of the mounting surface side folded portion 351 of the first external electrode 3A on the second external electrode 3B side in the longitudinal direction L and the end of the first land portion 102A on the second land portion 102B side in the longitudinal direction L are located at approximately the same position in the longitudinal direction L. Furthermore, the end of the mounting surface side folded portion 351 of the second external electrode 3B on the first external electrode 3A side in the longitudinal direction L and the end of the second land portion 102B on the first land portion 102A side in the longitudinal direction L are located at approximately the same position in the longitudinal direction L.

[0065] In other words, in this embodiment, the acute angle α formed by a straight line drawn from the end of the mounting surface side folded portion 351 of one external electrode 3 on the side of the other external electrode 3 to the end of one land portion 102 on the side of the other land portion 102, and the mounting side main surface AB is 31°≦α≦90°, and it is more preferable that it be approximately 90°.

[0066] (Manufacturing Method of Mounting Structure 100 of the Embodiment) (Manufacturing of Multilayer Ceramic Capacitor 1) First, the multilayer ceramic capacitor 1 is manufactured as follows. Dielectric sheets and conductive paste for internal electrode layers are prepared. The dielectric sheets and conductive paste for internal electrode layers contain a binder and a solvent. Known binders and solvents can be used.

[0067] On the dielectric sheet, a conductive paste for the internal electrode layers is printed in a predetermined pattern by, for example, screen printing or gravure printing, to form an internal electrode layer pattern.

[0068] A predetermined number of dielectric sheets for outer layers on which no internal electrode layer pattern is printed are stacked, and then dielectric sheets on which the internal electrode layer pattern is printed are stacked in order on top of these, and then a predetermined number of dielectric sheets for outer layers are stacked on top of these to produce a laminated sheet.

[0069] The laminated sheet is pressed in the lamination direction T by means of a hydrostatic press or the like to produce a laminated block. Then, the laminated block is cut.

[0070] The laminate is fired to produce the laminate 2. The firing temperature is preferably 900° C. or higher and 1400° C. or lower, depending on the materials of the dielectric and the internal electrode layers 15. Furthermore, the corners and ridges of the laminate may be rounded by barrel polishing or the like.

[0071] Next, if the base electrode layer 31 is a baked layer, a conductive paste for the external electrodes 3 is applied to both end surfaces of the laminate 2 and baked to form baked layers for the external electrodes 3. The baking temperature is preferably 700° C. or higher and 900° C. or lower. If necessary, plating is applied to the surface of the baked layer.

[0072] When the base electrode layer 31 is a conductive resin layer, the conductive resin layer can be formed by the following method. The conductive resin layer may be formed on the surface of the baking layer, or may be formed directly on the laminate 2 without forming a baking layer. The conductive resin layer is formed by applying a conductive resin paste containing a thermosetting resin and a metal component onto the baking layer or the laminate 2, and then performing a heat treatment at a temperature of 250 to 550°C or higher to thermally cure the resin and form a conductive resin layer. The atmosphere during this heat treatment is preferably an N2 atmosphere. In addition, to prevent the resin from scattering and the various metal components from oxidizing, it is preferable to keep the oxygen concentration below 100 ppm.

[0073] When the base electrode layer 31 is a thin film layer, the base electrode layer 31 can be formed by a thin film formation method such as sputtering or vapor deposition. The base electrode layer 31 formed as a thin film layer is a layer of metal particles deposited to a thickness of 1 μm or less.

[0074] It is also possible to provide the plating layer 32 on the exposed portion of the internal electrode layer 15 of the laminate 2 without providing the base electrode layer 31. In this case, the plating layer 32 can be formed by the following method.

[0075] The first end face CA and the second end face CB of the laminate 2 are plated to form a lower-layer plating layer on the exposed portions of the internal electrode layers 15. Either electrolytic plating or electroless plating may be used for the plating process. However, electroless plating requires pretreatment using a catalyst or the like to improve the plating deposition rate, which has the disadvantage of complicating the process. Therefore, electrolytic plating is usually preferred. Barrel plating is preferably used as the plating method. If necessary, an upper-layer plating electrode may be formed on the surface of the lower-layer plating electrode in the same manner.

[0076] Thereafter, a plating layer 32 is formed on the surface of the base electrode layer 31, the surface of the conductive resin layer, or the surface of the lower plating layer. In this embodiment, a Ni plating layer and a Sn plating layer are formed as the plating layer 32 on the baked layer. The Ni plating layer and the Sn plating layer are formed sequentially by, for example, barrel plating. In this manner, the multilayer ceramic capacitor 1 is manufactured.

[0077] (Mounting of Multilayer Ceramic Capacitor 1) The multilayer ceramic capacitor 1 manufactured by the above manufacturing method is mounted on the mounting substrate 101 in the following procedure.

[0078] First, the first land portion 102A and the second land portion 102B are formed on the mounting substrate 101. At this time, the distance g2 between the lands is made to approximate the distance g1 between the external electrodes.

[0079] In addition, if the land-to-land distance g2 between the first land portion 102A and the second land portion 102B formed on the mounting substrate 101 is predetermined, the external electrode-to-external electrode distance g1 may be approximated to the land-to-land distance g2 during the manufacture of the above-mentioned multilayer ceramic capacitor 1.

[0080] In this embodiment, "approximate" means that -0.44≦(g1−g2) / g2≦0.72. For example, when g2=0.5 mm, "approximate" means that -22 μm≦(g1−g2)≦36 μm.

[0081] In other words, the end of the mounting surface side folded portion 351 of the first external electrode 3A on the second external electrode 3B side in the longitudinal direction L and the end of the first land portion 102A on the second land portion 102B side in the longitudinal direction L are located at approximately the same position in the longitudinal direction L. The end of the mounting surface side folded portion 351 of the second external electrode 3B on the first external electrode 3A side in the longitudinal direction L and the end of the second land portion 102B on the first land portion 102A side in the longitudinal direction L are located at approximately the same position in the longitudinal direction L.

[0082] Next, solder 103 is applied onto the land portion 102, and the multilayer ceramic capacitor 1 manufactured as described above is placed on the land portion 102 with the solder 103 interposed therebetween.

[0083] At this time, the amount of solder 103 is adjusted to adjust the distance t in the stacking direction T between the mounting-side main surface AB and the land portion 102. As a result, after the next reflow, the acute angle α (see FIG. 2 ) of the angle formed by the mounting-side main surface AB and a straight line drawn from the end of the mounting-side folded portion 351 of one external electrode 3 on the side of the other external electrode 3 to the end of one land portion 102 on the side of the other land portion 102 is set to 31°≦α≦90°.

[0084] Then, the multilayer ceramic capacitor 1 is passed through a reflow furnace for heating to perform reflow soldering, whereby the molten solder adheres to and encases the external electrodes 3. By cooling the solder 103 in this state, the external electrodes 3 of the multilayer ceramic capacitor 1 are soldered to the land portions 102 with the solder 103, thereby completing the mounting of the multilayer ceramic capacitor 1 on the mounting substrate 101.

[0085] Through the above steps, a mounting structure 100 is completed in which the acute angle α of the angle formed by a straight line drawn from the end of the mounting surface side folded portion 351 of one external electrode 3 on the side of the other external electrode 3 to the end of one land portion 102 on the side of the other land portion 102, and the mounting side main surface AB, is 31°≦α≦90°.

[0086] (Verification of Effects of the Embodiment) In order to verify the crack resistance effect of the mounting structure 100 of the embodiment, a mounting structure for verification was manufactured as follows.

[0087] First, solder paste was applied to the land portion (land distance g2 = 0.5 mm) of the test mounting board MCPCJM0729B (board land JEITA, board thickness 1.6 mm, wiring 1.0 mm). The amount of solder paste was adjusted so that the distance t in the stacking direction T between the mounting side main surface AB and the land portion 102 was 0.0217 mm.

[0088] The multilayer ceramic capacitor 1 was then placed on the solder paste and heated in a reflow furnace to perform reflow soldering of the multilayer ceramic capacitor 1. As a result, the molten solder adheres to and encases the external electrodes 3. In this state, the solder 103 is cooled, thereby soldering the external electrodes 3 of the multilayer ceramic capacitor 1 to the land portions 102. In this way, the multilayer ceramic capacitor 1 is mounted on the mounting substrate 101, thereby manufacturing a mounting structure for an electronic component.

[0089] The manufactured mounting structures 100 are the mounting structures 100 of four examples and three comparative examples shown in the table of Fig. 5. Fig. 6 is a diagram showing the area S surrounded by the dotted line in Fig. 2, with Fig. 6(a) showing the state of Example 1, Fig. 6(b) showing Example 2, and Fig. 6(c) showing Example 4. Fig. 6(d) shows Comparative Example 1, and Fig. 6(e) shows Comparative Example 2.

[0090] The distance g1 between the external electrodes in the mounting structures 100 of the four examples and the mounting structures of the three comparative examples was measured using an image measure (IM-6140). The measurement method was to first take a photograph of the appearance of one multilayer ceramic capacitor using the IM-6140. The narrowest distance between the external electrodes 3 was measured from ten photographs of the appearance, and the average value of these measurements was calculated to be the distance g1 between the external electrodes. The distance g2 between the lands is 0.5 mm in this embodiment, but may be measured in the same way as the distance g1 between the external electrodes.

[0091] In Example 1, g1 is 0.501 mm, g1-g2 is 0.001 mm, (g1-g2) / g2 is 0.002 mm, and the angle α is 88.3°.

[0092] In Example 2, g1 is 0.523 mm, g1-g2 is 0.023 mm, (g1-g2) / g2 is 0.046 mm, and the angle α is 43.3°.

[0093] In Example 3, g1 is 0.478 mm, g1-g2 is -0.022 mm, (g1-g2) / g2 is -0.044 mm, and the angle α is 44.8°.

[0094] In Example 4, g1 is 0.536 mm, g1-g2 is 0.036 mm, (g1-g2) / g2 is 0.072 mm, and the angle α is 30.8°.

[0095] That is, in Examples 1, 2, 3, and 4, -0.44≦(g1−g2) / g2≦0.72, and when g2=0.5 mm, the range is -22 μm≦g1−g2≦36 μm, i.e., g1 and g2 are close to each other. Also, the angle α is 31°≦α≦90°.

[0096] In Comparative Example 1, g1 was 0.430 mm, g1-g2 was -0.070 mm, (g1-g2) / g2 was -0.14 mm, and the angle α was 17.1°.

[0097] In Comparative Example 2, g1 was 0.566 mm, g1-g2 was 0.066 mm, (g1-g2) / g2 was 0.132 mm, and the angle α was 18.2°.

[0098] In Comparative Example 3, g1 was 0.604 mm, g1-g2 was 0.104 mm, (g1-g2) / g2 was 0.208 mm, and the angle α was 11.8°.

[0099] That is, in Comparative Examples 1, 2, and 3, the distance from the end of the folded portion provided on the mounting side main surface of the external electrode to the end of the mounting land is long and the angle α is small, which is outside the scope of the present invention.

[0100] A test of board bending resistance was then conducted on the mounting structures 100 of the four examples and the mounting structures of the three comparative examples. The test conditions were: deflection amount 2 mm, holding time 60 seconds, pressing tool R1, board land JEITA, board thickness 1.6 mm, wiring 1.0 mm, and metal mask 36 / 150 μm. Figure 5 shows the results of the board bending resistance test conducted on Examples 1, 2, 3, and 4 and Comparative Examples 1, 2, and 3.

[0101] In Examples 1 and 2, which are within the scope of the present invention, no cracks occurred that reached the inside of the laminate 2, nor did any cracks occur that occurred in the outer layer portion 12 but did not reach the inside of the laminate 2. In Examples 3 and 4, there was one crack that occurred in the outer layer portion 12 but did not reach the inside of the laminate 2, but no cracks occurred that reached the inside of the laminate 2.

[0102] In Comparative Example 1, which is outside the scope of the present invention, there were two cracks that occurred in the outer layer portion 12 but did not reach the inside of the laminate 2, and there were also two cracks that reached the inside of the laminate 2. In Comparative Examples 2 and 3, there were no cracks that occurred in the outer layer portion 12 but did not reach the inside of the laminate 2, but there were two cracks that reached the inside of the laminate 2.

[0103] From the above verification results, it was confirmed that Examples 1, 2, 3, and 4, which are within the scope of the present invention, have improved crack resistance compared to Comparative Examples 1, 2, and 3.

[0104] The reason why the crack resistance is improved in the mounting structure 100 of the embodiment is believed to be as follows. If we consider that a straight line drawn from the end of the mounting surface-side folded portion 351 of the external electrode 3 to the end of the land portion 102 is approximately equal to the outline of the outer surface of the solder 103, the acute angle formed between the outline of the outer surface of the solder 103 and the mounting-side main surface AB is α. It is believed that the smaller the angle α, the more likely stress will concentrate at the end of the mounting surface-side folded portion 351 when bending occurs in the mounting structure 100. In the comparative example, the angle α is small. Therefore, it is believed that stress concentrated at the end of the mounting surface-side folded portion 351, making it more likely for cracks to occur. On the other hand, in the example, the angle α on the corner side is large. Therefore, it is believed that stress was less likely to concentrate at the end of the mounting surface-side folded portion 351, making it less likely for cracks to occur.

[0105] Although the embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment, and various changes and modifications can be made as follows.

[0106] <1> A mounting structure for an electronic component comprising: a laminate having alternately stacked dielectric layers and internal electrodes, the laminate including a mounting-side main surface and a non-mounting-side main surface that face each other in a stacking direction, two side surfaces that face each other in a width direction that intersects with the stacking direction, and a first end surface and a second end surface that face each other in a length direction that intersects with the stacking direction and the width direction; a first external electrode provided on the first end surface and having a mounting-side folded portion that extends to the mounting-side main surface; and a second external electrode provided on the second end surface and having a mounting-side folded portion that extends to the mounting-side main surface; and a mounting substrate having a first land portion to which the first external electrode is joined via solder and a second land portion to which the second external electrode is joined via solder, A mounting structure for an electronic component, wherein the distance g1 between the external electrodes in the longitudinal direction between the mounting surface side folded portion of the second external electrode and the end of the second external electrode on the side of the first external electrode in the longitudinal direction is defined as g1, and the distance g2 between the land portion in the longitudinal direction between the end of the first land portion on the side of the second land portion in the longitudinal direction is defined as g2, and the distance g1 between the external electrodes and the land distance g2 are approximate to each other.

[0107] <2> The electronic component mounting structure according to <1>, wherein the term "approximate" means that -0.44≦(g1−g2) / g2≦0.72.

[0108] <3> The electronic component mounting structure according to <1> or <2>, wherein the term "approximate" means that the range is -22 μm≦g1-g2≦36 μm.

[0109] <4> A mounting structure for an electronic component comprising: an electronic component having dielectric layers and internal electrodes stacked alternately, the electronic component comprising: a laminate including a mounting-side main surface and a non-mounting-side main surface that face each other in a stacking direction, two side surfaces that face each other in a width direction that intersects with the stacking direction, and a first end surface and a second end surface that face each other in a length direction that intersects with the stacking direction and the width direction; a first external electrode provided on the first end surface and having a mounting-side folded portion that extends to the mounting-side main surface; and a second external electrode provided on the second end surface and having a mounting-side folded portion that extends to the mounting-side main surface; and a mounting substrate having a first land portion to which the first external electrode is joined via solder and a second land portion to which the second external electrode is joined via solder, wherein an end of the mounting-side folded portion of the first external electrode that faces the second external electrode in the length direction and an end of the first land portion that faces the second land portion in the length direction are located at approximately the same position in the length direction, an end of the mounting surface side folded portion of the second external electrode that is on the first external electrode side in the length direction and an end of the second land portion that is on the first land portion side in the length direction are located at approximately the same position in the length direction.

[0110] <5> A mounting structure for an electronic component comprising: an electronic component having dielectric layers and internal electrodes stacked alternately, the electronic component comprising: a laminate including a mounting-side main surface and a non-mounting-side main surface that face each other in a stacking direction, two side surfaces that face each other in a width direction that intersects with the stacking direction, and two end surfaces that face each other in a length direction that intersects with the stacking direction and the width direction; external electrodes that are provided on the two end surfaces and have mounting-side folded portions that extend to the mounting-side main surface; and a mounting board that has land portions to which the external electrodes are joined via solder, wherein the mounting structure for an electronic component comprises: an electronic component having dielectric layers and internal electrodes stacked alternately, the laminate including: a laminate including: a mounting-side main surface and a non-mounting-side main surface that face each other in a width direction that intersects with the stacking direction and the width direction;

[0111] <6> The mounting structure of an electronic component according to <5>, wherein an angle α formed by a straight line drawn from an end of the mounting surface side folded portion of one of the external electrodes on the side of the other external electrode to an end of one of the land portions on the side of the other land portion and the mounting side main surface is approximately 90°.

[0112] AB Mounting side principal surface C End face CA First end face CB Second end face g1 Distance between external electrodes g2 Distance between lands 1 Multilayer ceramic capacitor 2 Laminate 3 External electrode 3A First external electrode 3B Second external electrode 11 Inner layer portion 12 Outer layer portion 14 Dielectric layer 15 Internal electrode layer 31 Base electrode layer 32 Plating layer 100 Mounting structure 101 Mounting substrate 102 Land portion 102A First land portion 102B Second land portion 103 Solder 351 Mounting surface side folded portion

Claims

1. A mounting structure for an electronic component comprising: an electronic component having an alternatingly stacked dielectric layers and internal electrodes, the electronic component comprising: a laminate including a mounting-side main surface and a non-mounting-side main surface that face each other in a stacking direction, two side surfaces that face each other in a width direction that intersects with the stacking direction, and a first end surface and a second end surface that face each other in a length direction that intersects with the stacking direction and the width direction; a first external electrode provided on the first end surface and having a mounting surface side folded portion that extends to the mounting side main surface, and a second external electrode provided on the second end surface and having a mounting surface side folded portion that extends to the mounting side main surface; and a mounting board including a first land portion to which the first external electrode is joined via solder, and a second land portion to which the second external electrode is joined via solder, the electronic component comprising: an end portion of the mounting surface side folded portion of the first external electrode that faces the second external electrode in the length direction; A mounting structure for an electronic component, wherein: the external electrode distance g1 in the longitudinal direction between the mounting surface side folded portion of the second external electrode and the end portion on the first external electrode side in the longitudinal direction is defined as g1; and the land distance g2 in the longitudinal direction between the end portion of the first land portion on the second land portion side in the longitudinal direction and the end portion of the second land portion on the first land portion side in the longitudinal direction is defined as g2, wherein the external electrode distance g1 and the land distance g2 are approximate to each other.

2. The electronic component mounting structure according to claim 1, wherein "approximate" means that -0.44≦(g1-g2) / g2≦0.

72.

3. The electronic component mounting structure according to claim 1 or 2, wherein "approximating" means being in the range of -22 μm≦g1-g2≦36 μm.

4. A mounting structure for an electronic component comprising: an electronic component having dielectric layers and internal electrodes stacked alternately, the electronic component comprising: a laminate including a mounting-side main surface and a non-mounting-side main surface opposed to each other in a stacking direction, two side surfaces opposed to each other in a width direction intersecting with the stacking direction, and a first end surface and a second end surface opposed to each other in a length direction intersecting with the stacking direction and the width direction; a first external electrode provided on the first end surface and having a mounting surface side folded portion extending to the mounting side main surface, and a second external electrode provided on the second end surface and having a mounting surface side folded portion extending to the mounting side main surface; and a mounting board comprising: a first land portion to which the first external electrode is joined via solder, and a second land portion to which the second external electrode is joined via solder, wherein an end of the mounting surface side folded portion of the first external electrode on the second external electrode side in the length direction and an end of the first land portion on the second land side in the length direction are at approximately the same position in the length direction, an end portion of the second external electrode that is adjacent to the first external electrode in the longitudinal direction of the mounting surface side folded portion and an end portion of the second land portion that is adjacent to the first land portion in the longitudinal direction are located at approximately the same position in the longitudinal direction.

5. A mounting structure for an electronic component comprising: an electronic component having dielectric layers and internal electrodes stacked alternately, the electronic component comprising: a laminate including a mounting-side main surface and a non-mounting-side main surface that face each other in the stacking direction, two side surfaces that face each other in a width direction that intersects with the stacking direction, and two end surfaces that face each other in a length direction that intersects with the stacking direction and the width direction; external electrodes provided on the two end surfaces and having mounting-side folded portions extending to the mounting-side main surface; and a mounting board having land portions to which the external electrodes are joined via solder, wherein the acute angle α between the mounting-side main surface and a straight line drawn from the end of the mounting-side folded portion of one of the external electrodes on the side of the other external electrode to the end of one of the land portions on the side of the other land is 31°≦α≦90°.

6. The mounting structure for an electronic component as claimed in claim 5, wherein an angle α formed by a straight line drawn from an end of said mounting surface side folded portion of one of said external electrodes on the side of the other external electrode to an end of one of said land portions on the side of the other land portion and the mounting side principal surface is approximately 90°.

Images