Method for inspecting optical circuit chip using PLC prober, and optical circuit chip

Abstract

The present disclosure is a method for inspecting optical characteristics of an optical circuit chip in a wafer state using a PLC prober that optically couples with an optical waveguide of an optical circuit chip formed on a connection end surface by inserting the tip of the PLC prober into an etching groove from an upper surface of the wafer, the method including a step for inputting colored light to an optical waveguide constituting an aligning port of the PLC prober and performing coarse alignment for adjusting a relative position between the PLC prober and the optical circuit chip. The method of the present disclosure makes it possible to facilitate rough alignment of the PLC prober and the optical circuit chip.

Description

Optical circuit chip inspection method using PLC prober, and optical circuit chip

[0001] The present disclosure relates to an inspection method using a PLC prober that enables inspection of the characteristics of an optical circuit in an optical circuit chip at the wafer level, and to an optical circuit chip.

[0002] Toward the realization of the IOWN (Innovative Optical and Wireless Network) concept, data centers and other facilities are required to have ever-larger capacities, and each device is also required to have higher density through photonics-electronics convergence packaging. To achieve this, attempts are being made to connect silicon photonics optical circuit chips (hereinafter referred to as "SiP chips") with optical fiber arrays in order to achieve smaller, higher density devices.

[0003] The assembly and inspection processes account for a large proportion of the manufacturing cost of optical transceivers, and in order to reduce the cost of optical transceivers, it is desirable to inspect SiP chips in wafer form and select non-defective products before assembling them into modules.

[0004] A common method for inspecting optical circuits such as SiP chips is to align optical fibers after chipping them from a wafer, and then input light from an external light source into the optical circuit to obtain and evaluate insertion loss and the waveform of the modulated optical signal output while inputting a drive signal to an optical modulator or the like in the optical circuit.

[0005] Therefore, to test the characteristics of the optical circuits of an optical circuit chip at the wafer level, it is necessary to input light into the optical waveguides of the optical circuits formed on the wafer and detect the output light from the optical waveguides of the optical circuits. For this reason, wafer testing has traditionally been performed using a testing grating coupler (GC) formed on the optical circuit to allow light to be input and output from above into the optical circuits formed on the wafer (see Patent Document 1). However, wafer testing using GCs requires the fabrication of additional GCs for optical coupling to the optical circuits, which increases the optical circuit area. Furthermore, GCs have poor optical coupling efficiency and variability in connection loss, so improvements are desired.

[0006] Therefore, in recent years, wafer inspection using end-face coupling with a PLC prober has been proposed (see Non-Patent Document 1). A conventional method for inspecting optical circuit chips in wafer form using a PLC prober will be described with reference to FIG. 1 . Multiple optical circuit chips 110 are formed on a wafer 100 in FIG. 1 . In the figure, only one optical circuit chip is designated by reference numeral 110 and its optical circuit is illustrated, while the reference numerals and optical circuits of the other chips are omitted. Etched grooves 121 and 122 are formed on the top surface of the wafer 100 by etching along the cutting lines for separating the optical circuit chips 110 into chips. These etched grooves 121 form connection end faces for connecting fibers or the like to the optical waveguides constituting the optical circuits of each optical circuit chip 110. As will be described later, the PLC prober 130 has a structure capable of emitting light from its tip in the optical axis direction (Y-axis direction) of the optical waveguides of the connection end faces of the optical circuit chips.

[0007] The tip of PLC prober 130 is inserted into groove 121 from above wafer 100 (in the Z-axis direction), and light required for inspection is input / output from the tip of PLC prober 130 to the optical waveguide on the connection end face of optical circuit chip 110 to inspect the optical characteristics of the optical circuit. In this specification, as shown in Figure 1, the X-axis direction is defined as the direction parallel to the connection end face of the optical circuit chip (i.e., the direction parallel to etching groove 121), the Y-axis direction is defined as the direction perpendicular to the connection end face (i.e., the direction parallel to etching groove 122), and the Z-axis direction is defined as the direction perpendicular to the X-axis and Y-axis.

[0008] FIG. 2 is a diagram illustrating an example of the PLC prober 130 of FIG. 1 . FIG. 2( a) is a front view of the PLC prober, and FIG. 2( b) is a side view of the PLC prober. In the figure, optical waveguides formed in the PLC prober 130 are shown in a see-through manner. The PLC prober 130 includes an optical circuit chip unit 201 and an optical fiber block 202. The optical circuit chip unit 201 has a planar lightwave circuit formed on a substrate such as silicon using semiconductor manufacturing technology. The planar lightwave circuit of the optical circuit chip unit 201 includes an optical waveguide array 211 composed of multiple optical waveguides optically coupled to optical waveguides constituting optical input / output ports of the optical circuit chip to be tested, and optical waveguides 216 and 217 constituting alignment ports. The optical fiber block 202 securely holds an optical fiber array 218 connected to each optical waveguide of the optical circuit chip unit 201, and is adhesively fixed to the optical circuit chip unit.

[0009] 2(c) is an enlarged view of part IIc in FIG. 2(b). As shown in FIGS. 2(b) and 2(c), a tip end surface 221, which is the end surface opposite to the end surface to which the optical fiber array of the PLC prober is connected, has its tip cut and formed obliquely so that the angle formed with a main surface 222 of the PLC prober is a predetermined inclination angle θ.

[0010] 2(d) shows a state in which the PLC prober 130 is aligned with the optical circuit chip to be inspected in wafer form and inspection is performed. Only the tip portion and vicinity of the PLC prober 130 in FIG. 2(d) are shown, with the fiber block array and other components omitted. Only the vicinity of the connection end surface of the optical circuit chip 110 formed on the wafer 100 to be inspected is shown. Parts of adjacent optical circuit chips 110 are also shown in the figure. Etching grooves 121 are grooves that form the connection end surfaces of the optical circuit chips 110 formed in the wafer in advance by an etching process along the chip cutting lines described in FIG. 1.

[0011] The tip surface of the PLC prober is cut obliquely at an inclination angle θ with respect to the main surface, and is formed to have an inclined surface with an inclination angle θ with respect to the main surface. In this example, the inclination angle θ is set to 45°. Therefore, the optical axis of the incident and outgoing light from the optical waveguide 216 of the PLC prober is reflected by the tip surface 221, which is formed obliquely at an angle of 45° with respect to the optical axis, and is directed in the Y-axis direction, thereby enabling optical coupling with the optical waveguide 232 of the optical circuit chip 110 to be tested. By using the PLC prober 130, it is possible to measure the optical characteristics of the actual circuit as is, and measurements similar to those performed by connecting an optical fiber block after cutting the chip are possible.

[0012] In order to inspect the optical characteristics of an optical circuit chip using the PLC prober 130 shown in Fig. 2, it is essential to perform an alignment process to enable optical coupling between the two optical waveguides. Two optical waveguides to be used as monitor ports for alignment are formed in the PLC prober 130 shown in Fig. 2, and two optical waveguides to be used as monitor ports for alignment are also formed in the optical circuit chip to be inspected.

[0013] If the monitor ports at both ends of the PLC prober and the optical circuit chip are aligned, the optical waveguides that form the optical waveguide array of any other optical circuit can be aligned simultaneously with microfabrication precision, so only the monitor ports at both ends need to be aligned.

[0014] (Alignment method for inspection using a PLC prober) Fig. 3 shows a state in which a PLC prober 310 is placed at an initial position for alignment with respect to an optical circuit chip 320 to be inspected. Although not shown in Fig. 3, the PLC prober 310 is attached via an arm-type jig 340 to a fine adjustment table that can adjust the position of the PLC prober 310 in the X-, Y-, and Z-axis directions and the angles around each axis (θx, θy, θz).

[0015] The object to be measured, for example, a Si photonics wafer, is placed on the stage of a wafer inspection device capable of chip characteristic inspection using a conventional electrical prober. In such a device, the electrical characteristics can be evaluated by contacting the electrode pads of each chip with the electrical prober. Furthermore, the above-mentioned PLC prober 310 and micro-adjustment stage can be installed in the device so that they can be optically coupled, enabling optical characteristic inspection.

[0016] In this state, the orientation (θx, θy, θz) of the PLC prober 310 is perpendicular (Z-axis direction) to the substrate surface of the optical circuit chip 320, and the main surface 311 of the PLC prober 310 is set parallel to the connecting end surface 321 of the optical circuit chip, which is part of the etching groove 330. This orientation of the prober can be set relatively easily, for example, by fixing it to a holding jig 340 that has been adjusted to be parallel in advance (in the figure, the edge abuts on the chip guide, and the face abuts on the back surface), or by recognizing the outline of the PLC prober's chip edges, tip lines, optical waveguide surface, etc.

[0017] FIG. 3( a) is a front view of the PLC prober 310 as seen from the optical circuit forming surface side. While FIG. 3( a) shows only the tip portion of the optical waveguide in a see-through manner, the basic optical circuit configuration is the same as that shown in FIG. 2. The portion of the optical circuit chip 320 shown in FIG. 3( a) is a portion near the connection end face, and the optical circuit chip 320 is also a portion of a wafer on which multiple optical circuit chips are formed. FIG. 3( a) shows an X-Z plane cross-sectional view of the optical circuit chip 320 (part IIIa in FIG. 3( b)). The PLC prober 310 is formed with an optical waveguide array 318 composed of optical waveguides 312 and 313 that form alignment ports and optical waveguides 314 to 317 that correspond to the optical input / output ports of the optical circuit of the optical circuit chip. The optical circuit chip 320 is formed with an optical waveguide array 328 made up of optical waveguides 322 and 323 that constitute alignment ports and optical waveguides 324 to 327 that constitute optical input / output ports of the optical circuit.

[0018] The optical waveguides 314 to 317 and the optical waveguides 324 to 327 that constitute the optical waveguide arrays 318 and 328 are merely examples, and in practice, any desired ones are formed corresponding to the optical input / output ports that constitute the optical circuit of the optical circuit chip to be tested. For example, the optical waveguides 322 and 323 that constitute the alignment ports are configured in a loop shape, and a loop-back optical circuit in which light is returned directly to the input port is used because it is convenient for active alignment.

[0019] As shown in the side view of Figure 3(b), the tip surface 341 of the PLC prober is inclined at an inclination angle θ of 45° with respect to the main surface 311, enabling optical waveguides arranged in the vertical direction (Z-axis direction) to be accessible from the top surface of the wafer to be optically coupled with optical waveguides of the optical circuit chip formed in the horizontal direction (Y-axis direction). The optical circuit chip 320 in Figure 3(b) is a part of the wafer on which the optical circuit chip is formed, and is a Y-Z plane cross-sectional view of the optical circuit chip. In this figure, only the portion of the optical circuit chip 320 near the connection end surface of the optical circuit chip is shown.

[0020] Figure 4 shows the state in which the PLC prober and the optical circuit chip to be tested are aligned. The same reference numerals in Figure 4 as in Figure 3 are the same as in Figure 3, and therefore their explanations will be omitted here. The procedure for aligning from the state in Figure 3 to the state in Figure 4 is as follows.

[0021] (Active Alignment) A technique called active alignment is used for the final optical connection alignment of the optical waveguides of the PLC prober 310 and the optical circuit chip 320. In the example of Fig. 3, for example, active alignment is an alignment method in which the position of the PLC prober is adjusted to set it to the position with the highest light intensity while monitoring the intensity of light input from the optical waveguides 312 and 313 of the PLC prober to the optical waveguides 322 and 323 of the optical circuit chip. This alignment makes it possible to align the positions of the optical waveguides used for alignment at both ends of the optical waveguide array.

[0022] To perform this active alignment, the PLC prober and the optical waveguide that constitutes the alignment port of the optical circuit chip must first be aligned close enough to enable optical detection of the monitor light, which is defined as coarse alignment. This coarse alignment requires moving the PLC prober relative to the connection end face of the optical circuit chip in the X-, Y-, and Z-axis directions from the state shown in Figure 3 to align the PLC prober to a position on the order of ±10 μm in each of the X-, Y-, and Z-axis directions from the optimal alignment position. This coarse alignment is performed by passive alignment based on appearance, using visual inspection or image recognition technology, and therefore cannot be easily performed without some kind of guide structure or ingenious alignment procedure.

[0023] An object of the present disclosure is to facilitate rough alignment between a PLC prober and an optical circuit chip when testing the optical characteristics of an optical circuit chip in a wafer state using the PLC prober.

[0024] Japanese Patent Application Laid-Open No. 2019-86385

[0025] R. Polster, et. al, “Wafer-scale high-density edge coupling for high throughput testing of silicon photonics,” Proc. OFC 2018, M3F2

[0026] The present disclosure provides a method for inspecting optical characteristics of optical circuit chips in a wafer state using a PLC prober whose tip is inserted into an etching groove formed on the wafer upper surface, the etching groove being the connection end face of each optical circuit chip, and optically coupled to an optical waveguide of the optical circuit chip formed on the connection end face, wherein the direction parallel to the connection end face of the optical circuit chip is defined as an X-axis direction, the direction perpendicular to the connection end face of the optical circuit chip is defined as a Y-axis direction, and the X-axis, Y-axis, and Z-axis are orthogonal to each other, and The optical circuit chip optical characteristic inspection method includes: a first step of performing coarse alignment by inputting colored light into a waveguide to adjust the relative positions of the PLC prober and the optical circuit chip in the X-axis, Y-axis, and Z-axis directions; a second step of performing active alignment by adjusting the relative positions of the PLC prober and the alignment port of the optical circuit chip in the X-axis, Y-axis, and Z-axis directions while measuring the intensity of light input from the alignment port of the PLC prober to the alignment port of the optical circuit chip; and a third step of inspecting the optical characteristics of the optical circuit chip.

[0027] According to the present disclosure, in rough alignment of a PLC prober and an optical circuit chip in an optical characteristic inspection of an optical circuit chip in a wafer state using a PLC prober, the adjustment can be made easier by improving the visibility of the optical waveguide that constitutes the alignment port of the PLC prober.

[0028] 1 is a diagram illustrating a method for inspecting an optical circuit chip in a wafer state using a conventional PLC prober. It is a diagram showing an example of the conventional PLC prober of FIG. 1, where (a) is a front view of the PLC prober, (b) is a side view of the PLC prober, (c) is an enlarged view of part IIc in (b), and (d) is a diagram showing a state in which a PLC prober 130 is aligned with an optical circuit chip to be inspected in a wafer state and an inspection is performed. It is a diagram showing a state in which the PLC prober is placed in an initial position for alignment with respect to the optical circuit chip to be inspected, where (a) is a front view of the PLC prober seen from the optical circuit forming surface side and (b) is a side view. It is a diagram showing a state in which the PLC prober and the optical circuit chip to be inspected have been aligned, where (a) is a front view of the PLC prober seen from the optical circuit forming surface side and (b) is a side view. It is a flowchart showing the steps of a method for inspecting optical characteristics of an optical circuit chip according to a first embodiment. 1A is a diagram for explaining the first embodiment, in which (a) is a diagram showing a state in which a PLC prober is placed at an initial position before rough alignment is performed, and (b) is a diagram showing a state after rough alignment, which is the first step, has been performed.

[0023] FIG. 1B is a diagram showing another example of a PLC prober used in the first embodiment, in which (a) is a diagram showing an example in which a coating layer is provided on the clad layer portion of the tip surface of the PLC prober, and (b) is a diagram showing an example in which the inclination angle θ is set to 43°.

[0024] FIG. 1C is a diagram for explaining a first example of the first embodiment, in which (a) is a diagram showing a state in which a PLC prober is placed at an initial position before rough alignment is performed, and (b) is a diagram showing a state after rough alignment, which is the first step, has been performed. 1A is a diagram for explaining a second example of the first embodiment, in which (a) is a diagram showing a case where the PLC prober is shifted above the optical circuit chip, (b) is a diagram showing a case where red light from the PLC prober is incident near the surface of the overclad layer of the optical circuit chip, (c) is a diagram showing a case where red light from the PLC prober is incident on the clad layer of the optical circuit chip, and (d) is a diagram showing a case where the PLC prober is shifted below the waveguide forming layer of the connection end face of the optical circuit chip. 1B is a diagram for explaining a third example of the first embodiment. 1C is a diagram for explaining a fourth example of the first embodiment.10A is a diagram for explaining a fifth example of the first embodiment, where (a) is a diagram showing a state in which red light from a PLC prober is incident on a cladding layer of an optical circuit chip, and (b) is a diagram showing portion XIIb near the connecting end face of the optical circuit chip as viewed from the top surface of the chip. FIG. 10B is a diagram for explaining a modification of the fifth example of the first embodiment. FIG. 10C is a diagram for explaining a sixth example of the first embodiment. FIG. 10D is a diagram for explaining a modification of the sixth example of the first embodiment. FIG. 10E is a diagram for explaining a seventh example of the first embodiment, where (a) is a diagram showing a case in which an optical circuit chip in which the optical axis of the optical waveguide at the connecting end face is formed obliquely with respect to the connecting end face is inspected, (b) is a diagram showing a case in which a minute reflective surface perpendicular to the optical axis direction of the emitted light is formed on the cladding layer portion of the connecting end face of the optical circuit chip by etching, and (c) is a diagram showing the optical circuit chip shown in (b) as viewed from the connecting end face side. 1A is a diagram for explaining a first example of a second embodiment, where (a) is a schematic plan view of a PLC prober, and (b) is an enlarged view of a region near a waveguide circuit for proximity detection in the PLC prober of (a) surrounded by a two-dot chain line. FIG. 1B is a diagram for explaining a second example of a second embodiment, where (a) is a schematic plan view of a PLC prober, and (b) is an enlarged view of a region near a waveguide circuit for proximity detection in the PLC prober of (a) surrounded by a two-dot chain line. FIG. 1A is a diagram for explaining a second example of a second embodiment, where (a) shows a distance D. a is a specific distance D i 10(b) shows the case where the distance D b is a specific distance D i , and (c) shows the case where the distance D c is a specific distance D i10 is a diagram showing a case where the optical circuit chip is larger than the reference optical circuit chip. FIG. 11 is a diagram for explaining a third example of the second embodiment, where (a) is a schematic plan view of a PLC prober, and (b) is an enlarged view of a region near the waveguide circuit for proximity detection surrounded by a two-dot chain line in the PLC prober of (a). FIG. 12 is a diagram for explaining design example 1. FIG. 13 is a diagram for explaining design example 2. FIG. 14 is a diagram for explaining design example 3. FIG. 15 is a diagram for explaining design example 4, where (a) is a diagram showing a PLC prober and an optical circuit chip to be inspected, and (b) is a diagram showing an example of a drive waveform of a TO shifter for adjusting the phase of a modulator. FIG. 16 is a diagram for explaining design example 5.

[0029] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the following description is an example, and some configurations may be changed without departing from the gist of the present disclosure. The same or similar reference numerals indicate the same or similar elements, and repeated explanations may be omitted. Numerical values ​​in the following description are examples, and other numerical values ​​may be used in the present disclosure without departing from the gist of the present disclosure.

[0030] (First embodiment) The first embodiment of the present disclosure relates to a method for inspecting the optical characteristics of an optical circuit chip in a wafer state using a PLC prober, the inspection method comprising a rough alignment step including a step of inputting colored light into an optical waveguide constituting an alignment port of the PLC prober (passing colored light through the optical waveguide).

[0031] The inspection method disclosed herein includes at least three steps. In the first step, rough alignment is performed between the PLC prober and the optical circuit chip. In the second step, active alignment is performed between the PLC prober and the alignment ports of the optical circuit chip. In the third step, optical characteristics of the optical circuit of the optical circuit chip are inspected. To facilitate the rough alignment between the PLC prober and the optical circuit chip in the first step, it is effective to improve the visibility of the optical waveguide of the PLC prober, which is the target of alignment.

[0032] A first embodiment of the present disclosure is a method for inspecting optical characteristics of optical circuit chips in a wafer state using a PLC prober, the tip of which is inserted into an etching groove from the upper surface of a wafer in which etching grooves that become connection end faces of each optical circuit chip are formed, and optically coupled to an optical waveguide of the optical circuit chip formed on the connection end face of the optical circuit chip, wherein the direction parallel to the connection end face of the optical circuit chip is the X-axis direction, the direction perpendicular to the connection end face of the optical circuit chip is the Y-axis direction, and the X-axis, Y-axis, and Z-axis are orthogonal to each other, and a PLC prober for aligning the PLC prober is used. The optical characteristics inspection method for an optical circuit chip includes: a first step of performing coarse alignment by inputting colored light into an optical waveguide that constitutes a port to adjust the relative positions of the PLC prober and the optical circuit chip in the X-axis, Y-axis, and Z-axis directions; a second step of performing active alignment by adjusting the relative positions of the PLC prober and the alignment port of the optical circuit chip in the X-axis, Y-axis, and Z-axis directions while measuring the intensity of input light input from the alignment port of the PLC prober to the alignment port of the optical circuit chip; and a third step of inspecting the optical characteristics of the optical circuit chip.

[0033] In this specification, colored light refers to light of a light color different from white light, such as any one of red, green, blue, etc., or a combination of multiple colors. Red light is light having an intensity peak in a wavelength range of 600 nm to 700 nm, green light is light having an intensity peak in a wavelength range of 520 nm to 580 nm, and blue light is light having an intensity peak in a wavelength range of 400 nm to 500 nm. Although not limited thereto, when colored light is used in this embodiment, it is desirable to use monochromatic light from the viewpoint of visibility, and using red light in particular is advantageous in that it provides high contrast and is more clearly visible.

[0034] FIG. 5 is a flowchart showing the steps of the optical characteristic inspection method for an optical circuit chip according to the first embodiment of the present disclosure. Steps 501 to 503 are the first step of coarse alignment, in which the PLC prober is moved in the X-, Y-, and Z-axis directions from the state shown in FIG. 3 above. In step 501, the PLC prober is set at a predetermined position above the etched groove that forms the connection end face of the optical circuit chip to be inspected. In step 502, colored light is input into the optical waveguide that constitutes the alignment port of the PLC prober. In step 503, the optical waveguide into which the colored light is input is used as a marker to adjust the position of the PLC prober in the X-, Y-, and Z-axis directions, thereby completing the coarse alignment. In step 503, the coarse alignment, performed while inputting colored light into the alignment port of the PLC prober for the optical circuit chip, is performed visually by an operator or by image recognition processing.

[0035] This embodiment is characterized in that colored light is input into the optical waveguide that constitutes the alignment port of the PLC prober. The optical waveguide that constitutes the alignment port of the PLC prober has improved visibility because the colored light propagating through the optical waveguide improves the contrast of the core portion of the optical waveguide relative to other portions. By using the colored light emitted from the optical waveguide of the PLC prober and irradiated onto the connection end face of the optical circuit chip as a marker, it is also easy to grasp the positional relationship between the optical waveguide and the connection end face of the optical circuit chip. While this embodiment applies colored light to at least the optical waveguide that constitutes the alignment port, it may also be applied to other optical waveguides.

[0036] Step 504 is a second step in which active alignment is performed while measuring the intensity of the input light input from the alignment port of the PLC prober to the alignment port of the optical circuit chip. By the rough alignment in steps 501 to 503, which is the first step, the optical waveguides constituting the alignment ports of the PLC prober and the optical circuit chip are aligned to an extent (within ±10 μm) that allows optical coupling.

[0037] In this state, in step 504, active alignment is performed by adjusting the position of the PLC prober in the X-axis, Y-axis, and Z-axis directions while measuring the light intensity of light input from each optical waveguide constituting the alignment port of the PLC prober to each optical waveguide constituting the alignment port of the optical circuit chip. Note that one optical waveguide constituting the alignment port of the optical circuit chip and the other optical waveguide may be configured as a single path, and active alignment may be performed using the light intensity input from one optical waveguide constituting the alignment port to the optical circuit and output from the other optical waveguide of the alignment port. The light used for active alignment does not need to be colored light as in the first step, and light such as near-infrared light can be used.

[0038] Step 505 is a third process in which an optical characteristic test of the optical circuit chip is performed using the aligned PLC prober. The optical characteristic test of the optical circuit chip here includes, for example, an optical loss test of the optical circuit formed on the optical circuit chip, an operation test to determine the bias point of the high-speed modulator, and the like.

[0039] When the optical characteristic inspection in step 505 is completed, it is determined in step 506 whether the optical characteristic inspection has been completed for all the optical circuit chips formed on the wafer. If not completed (NO), the process returns to step 501, the PLC prober is set to the state shown in FIG. 3 for the next optical circuit chip to be inspected, and steps 502 to 505 are executed again. When it is determined in step 506 that the optical characteristic inspection has been completed for all the optical circuit chips formed on the wafer, the inspection process ends. Thereafter, the optical circuit chips are manufactured by a manufacturing method including a step of cutting the wafer along the etching grooves.

[0040] The optical waveguide of the PLC prober used in this embodiment may be made of any material other than SiO2-based glass as long as it can be used to form an optical circuit, such as TiO2 core-SiO2, ZrO2 core-SiO2, Si core-SiO2, or polymer-based materials.

[0041] 6 is a diagram for explaining a first embodiment according to the present disclosure. Similar to FIG. 3 , FIG. 6( a ) shows a state in which a PLC prober 310 is placed in an initial position with respect to an optical circuit chip 320 to be inspected before rough alignment (the state of step 501 in FIG. 5 ). Components with the same reference numerals as in FIG. 3 are the same as those in FIG. 3 , and therefore will not be described here. In this state, step 502 in FIG. 5 is executed. That is, visible colored light is input to the optical waveguides 312 and 313 that constitute the alignment ports of the PLC prober. While not limited to this, the following description will be given of a case in which red light 601 is input as the colored light.

[0042] 6B shows a state after the first step of the coarse alignment of this embodiment has been performed. This embodiment is characterized in that in the first step, red light is input to the optical waveguides to improve the visibility of the PLC prober, and the optical waveguides to which the red light has been input are used as markers. By inputting red light to the optical waveguides of the PLC prober to perform coarse alignment as in this embodiment, the visibility of the positions of the optical waveguides 312 and 313 on the PLC prober and the positions of the light emitted from each optical waveguide is improved, which is advantageous for coarse alignment that is performed by visual inspection using image recognition or the like.

[0043] FIG. 7 shows another example of a PLC prober used in this embodiment. The same reference numerals in FIG. 7 as in FIG. 3 are the same as in FIG. 3, and therefore will not be described here. As shown in FIG. 7( a), a coating layer 701 may be provided on the cladding layer of the tip surface 341, which serves as a reflecting surface for light emitted from the optical waveguide of the PLC prober 310, for protection. This coating layer 701 may be made of a highly reflective metal such as Au, or an HR coating or AR coating made of a SiO2 multilayer film or a TiO2 multilayer film; the material is not limited. Coating the oblique reflecting surface at the tip of the PLC prober eliminates the influence of external disturbances, such as condensation, on the reflecting surface, thereby maintaining stable reflection characteristics.

[0044] 6, the tip surface 341 of the PLC prober 310 is set at an inclination angle θ of 45° with respect to the main surface 311 of the PLC prober. However, this inclination angle θ is not limited to 45° and may be set at any angle between 40° and 50°. When a silica-based glass material is used, an inclination angle θ of approximately 48° or less satisfies the total reflection angle condition, which is advantageous in that loss is small.

[0045] Figure 7(b) shows an example in which the inclination angle θ is narrower, set to 43°. Because the inclination angle of the tip is narrower, the angle of emission of light reflected from the inclined tip surface 341 deviates from the perpendicular direction (Y-axis direction in the figure) of the main surface of the PLC prober. Therefore, as shown in Figure 7(b), the PLC prober is positioned at an angle with respect to the Z-axis. In this case, the connection end surface 321 of the optical circuit chip and the surface of the overcladding layer (main surface 311 of the optical circuit chip) from which the emitted light from the optical waveguide of the PLC prober is emitted are no longer parallel to each other, which has the advantage of preventing the generation of resonance component noise between the two planes.

[0046] Example 1 Figure 8 is a diagram for explaining a first example of the first embodiment according to the present disclosure. Figure 8(a) shows a state in which the optical circuit chip 320 to be inspected is placed in an initial position before alignment is performed, similar to Figure 6. In Figure 8, components with the same reference numerals as in Figure 6 are the same as in Figure 6, and therefore their description will be omitted here. Also, Figure 8(b) shows a state in which rough alignment, which is the first step of this embodiment, has been performed.

[0047] This embodiment is characterized in that in the first step, red light is input into the optical waveguide of the PLC prober to improve visibility, and in this case, if an image captured from the direction of arrow A in Figure 8(a) can be used, the red light propagating through the optical waveguide of the PLC prober can be seen, which is convenient for performing rough alignment in the first step. In particular, since the line of the optical waveguide of the PLC prober can be seen, it is convenient for rough alignment in the X-axis direction.

[0048] However, in an actual device configuration, the camera installation position and field of view are often restricted, making it impossible to capture images from the direction of arrow A. For example, when measuring while pressing an electric probe against a chip and applying a voltage, the field of view of the camera is limited by the presence of a fine adjustment table for alignment around the electric probe. Therefore, in this embodiment, the substrate of the PLC prober 810 is a quartz glass substrate 811, which makes it possible to capture images of the red light line propagating through the optical waveguide and the spot on the reflective surface near the tip of the PLC prober from the substrate 811 side of the PLC prober (the direction of arrow B), and the red light can be used as a landmark in the captured camera image to perform rough alignment.

[0049] Because the tip surface 341 of the PLC prober 810 is cut at an angle θ to the main surface 311, it is possible to photograph only the tip of the waveguide layer from the Si substrate side. However, due to the presence of spots such as stray light, it is easier to visualize the tip by photographing it together with the optical waveguide line. Furthermore, by measuring the distance C-D using an image taken from the direction of arrow B, rough alignment in the Z direction is also possible. In this case, the distance D-E from D in the figure to the optical waveguide can be determined from the design data of the optical circuit chip, so rough alignment in the Z direction is possible by translating the PLC prober in the Z direction by the distance D-E in addition to the measured distance C-D.

[0050] Example 2 Next, a second example of the embodiment of the present disclosure will be described with reference to FIG. 9 . Similar to FIG. 3B , FIG. 9 illustrates only the vicinity of the tip of the PLC prober 310. Furthermore, the optical circuit chip 320 to be inspected is illustrated only in the vicinity of the optical waveguide-forming portion of the connection end face 321 of the optical circuit chip. In the first step of the first embodiment, red light 601 is incident on the optical waveguide constituting the alignment port to improve the visibility of the position of the optical waveguide. In the second example, red light is incident from the optical waveguides 312 and 313 constituting the alignment port of the PLC prober onto the waveguide-forming layer portion of the connection end face 321 of the optical circuit chip 320, and the red light 601 becomes observable from the top surface of the optical circuit chip 320. This phenomenon is utilized as a guide for adjustment in the Z-axis direction in the first step, which is rough alignment, thereby facilitating rough alignment in the Z-axis direction.

[0051] 9( a ) to 9 ( d ) each show the PLC prober 310 moving from above to below the wafer substrate in the Z-axis direction. When the PLC prober 310 is shifted above the optical circuit chip 320 as shown in FIG. 9( a ), or when the PLC prober 310 is shifted below the waveguide-forming layer of the connection end face 321 of the optical circuit chip 320 as shown in FIG. 9( d ), the red light 601 is not observed from above the optical circuit chip. As shown in FIG. 9( b ), when the red light 601 from the PLC prober 310 is incident near the surface of the overcladding layer of the optical circuit chip 320, a line of the red light 601 is observed on the surface of the overcladding layer from above the optical circuit chip. Furthermore, when the red light 601 is incident on the cladding layer of the optical circuit chip 320 as shown in FIG. 9( c ), the red light 601 scattered by the cladding layer of the alignment port is observed from above.

[0052] In this way, in the second embodiment, the red light 601 that can be observed from above the optical circuit chip is used as a guide for rough alignment in the Z-axis direction, thereby facilitating rough alignment in the Z-axis direction.

[0053] (Example 3) To simplify rough alignment in the Z-axis direction, a PLC prober provided with a Z-axis positioning stopper can also be used. With reference to Figure 10, rough alignment in the Z-axis direction using a PLC prober 1010 according to a third example embodiment of the present disclosure will be described. Figure 10 shows only the vicinity of the tip of the PLC prober 1010 according to Example 3, and omits other parts of the PLC prober, but it has the same configuration as the PLC prober shown in Figures 2 and 3, etc. The optical circuit chip 320 and other components denoted by other reference numerals are the same as those in Figure 3, and therefore will not be described here.

[0054] The PLC prober 1010 has a stopper portion 1013 formed by etching the overclad layer 1012 at its tip portion to create a recess. As shown in Figure 10, positioning in the Z-axis direction, i.e., rough alignment in the Z-axis direction, can be performed by lightly touching the stopper portion to the surface of the optical circuit chip 320 to be tested. Note that by providing a recess in the overclad layer 1012 of the PLC prober 1010, the overclad layer at the tip of the PLC prober can be made thinner, thereby reducing the gap between the waveguide core of the PLC prober and the optical connection surface of the measurement chip, thereby reducing coupling loss.

[0055] 11 , instead of providing a stopper by etching the overcladding layer, a binary lens or a metalens may be formed in the overcladding layer by etching. In this way, a plurality of lenses corresponding to the light input / output positions from each optical waveguide of the PLC prober can be integrally formed in the overcladding layer at the tip of the PLC prober. This reduces the coupling loss between the PLC prober and each optical waveguide of the optical circuit chip.

[0056] Fig. 11 shows an example in which a binary lens 1113 is formed by etching on an overclad layer 1112 at the tip of a PLC prober 1110. Fig. 11 shows only the tip portion of the PLC prober, and the other portions of the PLC prober are omitted, but the PLC prober has the same configuration as the PLC probers shown in Figs.

[0057] (Example 5) In the fifth example of this embodiment, a structure for scattering colored light is added to the cladding layer of the optical circuit chip to be inspected in order to more easily perform rough alignment while observing the red light 601 of Example 2 from the top surface of the optical circuit chip.

[0058] The configuration of an optical circuit chip 1220 according to a fifth embodiment will be described with reference to FIG. 12 . FIG. 12( a) shows a state in which red light 601 from a PLC prober 310 is incident on the cladding layer of the optical circuit chip 1220. FIG. 12( b) is a view of portion XIIb near the connection end face 321 of the optical circuit chip 1220 in FIG. 12( a) as seen from the chip top surface (Z-axis direction). The connection end face 321 of the optical circuit chip 1220 includes optical waveguides 322 and 323 that form alignment ports, as with the optical circuit chips described above, and optical waveguides 324 to 327 that form input / output optical ports of the optical circuit of the optical circuit chip. Furthermore, in this embodiment, etching patterns 1221, 1222, 1223, and 1224 are formed on both sides of the optical waveguides 322 and 323, respectively.

[0059] When red light from the optical waveguide that constitutes the alignment port of the PLC prober is incident on the etching pattern, the red light is scattered, so that it is possible to more clearly observe from above the scattered light that occurs when the optical waveguide that constitutes the alignment port of the PLC prober is located at a position corresponding to the etching pattern, thereby more reliably performing rough alignment in the Z-axis direction.

[0060] Furthermore, this etching pattern is formed in a corresponding positional relationship, such as on both sides of the optical waveguides 322 and 323 that are to be finally aligned. Then, by sweeping the PLC prober in the X-axis direction, the positions of the optical waveguides 322 and 323 can be determined, which also makes it possible to facilitate rough alignment in the X-axis direction. The shape of the etching pattern is not limited to a rectangle, and any characteristic shape that scatters visible light and makes it easier to recognize may be used. The etching pattern may also be a groove formed by etching.

[0061] For example, as shown in Fig. 13, dummy optical waveguide patterns 1321, 1322, 1323, and 1324 may be formed on both sides of optical waveguides 322 and 323. Fig. 13 is a view of the circled portion near the connection end face 321 as seen from the top surface of the chip (Z direction), similar to Fig. 12(b). The dummy optical waveguide patterns of this embodiment of the optical circuit chip 1320 are each formed from a plurality of optical waveguides. When dummy optical waveguide patterns are used, coarse adjustment in the Z direction is completed when visible light is scattered by any of the optical waveguides, and can therefore be easily performed in the same manner as in Fig. 12.

[0062] 14 shows an example in which, instead of forming a structure that scatters colored light, photodetector (PD) elements are formed on both sides of optical waveguides 322 and 323 that constitute the alignment ports of the optical circuit chip. Fig. 14 shows only the vicinity of the optical waveguide 322 side of the connection end face 321 of the optical circuit chip 1420.

[0063] The optical circuit chip 1420 of this embodiment is provided with another optical waveguide 323 that constitutes an alignment port, and optical waveguides 324 to 327 that constitute input / output ports of the optical circuit, similar to the optical circuit chip 1320 described in Fig. 13. A SiP chip is characterized by its ability to easily integrate a large number of PDs such as Ge-PDs, and the optical circuit chip 1420 of this embodiment 6 uses a plurality of PDs arranged at appropriate intervals, instead of the etched grooves and dummy optical waveguides of embodiment 4.

[0064] When any of PDs 1421 to 1427 receives red light 601 from the PLC prober, a light-receiving signal is output, and it can be detected that the optical waveguide that constitutes the alignment port of the PLC prober is located at the position of the PD that output the light-receiving signal.

[0065] In the example of Figure 14, seven PDs 1421 to 1427 are integrated and connected in parallel with the same cathode electrode 1428 and anode electrode 1429. In this case, it is not possible to distinguish which PD the red light 601 is incident on. However, during rough alignment of the PLC prober, the parallel-arranged PDs are aligned in the X-axis direction from one side to the other, so that light is swept from one end. The intensity pattern of the received light signal obtained at this time can be used to determine the location of the PD corresponding to the location to be aligned, i.e., the position of the optical waveguide 322. PDs 1421 to 1427 similar to those of the optical waveguide 322 are also formed in the optical waveguide 323 of the optical circuit chip 1420. The number of PDs is merely an example, and may be any number other than seven.

[0066] Figure 15 shows an example in which the arrangement and structure of the cathode and anode electrodes are devised to enable the use of PD 1424 on the optical waveguide after the optical circuit chip is fabricated. The anode electrodes are configured to be connected in parallel using the same anode electrode 1429, as in the optical circuit chip of Figure 14 . The cathode electrodes of PDs 1421 to 1423 other than PD 1424 and PDs 1425 to 1427 are connected in parallel using grouped cathode electrodes 1521 and 1523, respectively, with the cathode electrode 1522 of only PD 1424 being separated. The cathode electrodes 1521 to 1523 are configured to be short-circuited on adjacent chip regions 1530. Therefore, the optical circuit chip 1520 of Figure 15 can be used in the same way as the optical circuit chip 1420 shown in Figure 14 .

[0067] Since the cathode electrode 1522 of the PD 1424 is separated after being cut at the groove 122 in the chipping process, the PD 1424 can be used as a PD after the chip is cut. Therefore, it can be used, for example, for alignment when connecting an optical fiber array to an optical circuit chip, or as a PD for the optical circuit of the optical circuit chip. In this embodiment, the PDs are installed in the optical waveguides 322 and 323 that constitute the alignment ports. However, instead of installing the PDs in the optical waveguides 322 and 323, the PDs may also be installed in optical waveguides branching from the optical waveguides 322 and 323.

[0068] In each of the above-described methods, the first step, rough alignment, is facilitated by inputting red light into the optical waveguide that constitutes the alignment port. In Fig. 16, for ease of understanding, the XZ plane of the PLC probe is shown expanded in the XY plane direction.

[0069] In this embodiment, when the optical axis direction of each optical waveguide formed on the connection end face 1621 of the optical circuit chip 1620 is formed at an angle to the connection end face, rough alignment is performed by inputting near-infrared light into the optical waveguide that constitutes the alignment port and using as a mark the minute reflecting surface 1660 formed on the connection end face of the optical circuit chip 1620. Fig. 16 shows only the optical waveguide 1623 that constitutes one of the alignment ports of the optical circuit chip, omitting the optical waveguide of this circuit and the optical waveguide that constitutes the other alignment port.

[0070] A PLC prober that tests optical circuit chips in which the optical axes of the optical waveguides on the connection end face are formed at an angle to the connection end face is similarly formed so that the optical axes of each optical waveguide 1611 are oblique, as shown in the figure, so that the light emitted from the tip face of the prober coincides with the optical axis direction of the optical waveguide. Therefore, in Figure 16(a), even if the PLC prober 1610 is moved in the X-Z direction, the reflected light from the end face is always reflected in the direction of the dotted line and does not return to the optical waveguide of the PLC prober.

[0071] 16(b), a minute reflecting surface 1660 perpendicular to the optical axis direction of the emitted light (the optical axis direction of the optical waveguide 1623 of the optical circuit chip 1650) is formed by etching only in a portion of the cladding layer 1624 of the connecting end face 1651 near the core of the optical waveguide 1623, so that the emitted light from 1611 returns to 1611. In FIG. 16, the size of the minute reflecting surface is shown larger than it should be for ease of viewing, but by using etching, it is possible to create a minute reflecting surface with a width of approximately 100 μm or less.

[0072] 16(c) shows the optical circuit chip 1650 shown in FIG. 16(b) viewed from the connection end surface. As shown in FIG. 16(c), a minute reflecting surface 1660 formed perpendicular to the optical axis direction of the optical waveguide 1623 is formed only in the cladding layer 1624 formed on the substrate 1625 of the optical circuit chip. With this structure, light emitted from the optical waveguide 1611 constituting the alignment port of the PLC prober returns to the optical waveguide 1611 only when it is incident on this minute reflecting surface 1660. When the PLC prober 1610 moves from that position in the Z direction or the X direction, the reflected light does not return to the optical waveguide 1611.

[0073] By using this principle, it is possible to perform rough alignment in the X-axis direction or the Z-axis direction by using this minute reflecting surface 1660 as a positioning reference. Note that, like the above-mentioned embodiments, this embodiment is used in conjunction with the first step, which is a rough alignment step in which colored light is input into the optical waveguide that constitutes the alignment port and used as a marker.

[0074] Second Embodiment Next, as a second embodiment of the present disclosure, a method for facilitating rough alignment in the Y-axis direction by using a PLC prober equipped with a waveguide circuit for proximity detection will be described. Similar to the first embodiment, the second embodiment is a method for inspecting the optical characteristics of optical circuit chips in a wafer state using a PLC prober, including steps 501 to 506 shown in the flowchart of FIG.

[0075] This embodiment is an inspection method in which, in the first step, rough alignment in the Y-axis direction is performed by detecting the distance in the Y-axis direction of the PLC prober using a proximity detection waveguide circuit.

[0076] 17A is a schematic plan view of a PLC prober used in a first example of the second embodiment, and FIG. 17B is an enlarged view of a main part of the PLC prober. In FIG. 17A, only the tip and its vicinity of the optical waveguide provided in the PLC prober 1710 are shown in a transparent state.

[0077] PLC prober 1710 includes optical waveguides 1711 and 1712 that form alignment ports, and optical waveguide arrays 1713 to 1716 for coupling to the optical waveguides that form the input / output ports of the optical circuit chip. The tip of the PLC prober is formed at an angle, similar to the PLC prober described above, and the direction of light emitted from each optical waveguide of the PLC prober is the Y-axis direction. The rest of the PLC prober structure is the same as that described above with reference to Figures 2 and 3, but is omitted from this drawing.

[0078] The PLC prober 1710 of this embodiment further includes waveguide circuits 1721 and 1722 for proximity detection. Fig. 17(b) is an enlarged view of the area around the waveguide circuit 1722 for proximity detection surrounded by the two-dot chain line in Fig. 17(a), showing only the optical waveguide 1712 side that constitutes the alignment port. For ease of understanding, Fig. 17(b) shows the PLC probe with the XZ plane expanded in the XY plane. The waveguide circuit 1721 for proximity detection, not shown, has the same structure as the waveguide circuit 1722.

[0079] 17(b), the waveguide circuit 1722 for proximity detection is composed of an input-side waveguide 1731 that emits light at a predetermined angle relative to a connection end face 1741 of the optical circuit chip 1740, and a plurality of output-side waveguides 1732 to 1734 into which reflected return light that is reflected and returned from the connection end face 1741 of the optical circuit chip is incident. The inclination angle of the optical axis of the input-side waveguide 1731 and the inclination angle of the optical axis of each output-side waveguide are set to the same angle α. The spacing β between the input-side waveguide and the output-side waveguide is set according to the proximity distance to be detected.

[0080] 17B , when the distance to be detected is L from the upper surface 1718 of the overcladding layer of the PLC prober 1710 to the connecting end surface 1741 of the optical circuit chip 1740, the spacing β between the input-side waveguide 1731 and the output-side waveguide 1733 can be set to β = 2L tan α. By doing so, when the distance in the Y-axis direction between the upper surface 1718 of the overcladding layer of the PLC prober and the connecting end surface 1741 of the optical circuit chip 1740 becomes L, light from the input-side waveguide 1731 is reflected by the connecting end surface 1741 of the optical circuit chip and enters the output-side waveguide 1733.

[0081] 17(b) includes output-side waveguide 1732, which has a smaller spacing β than output-side waveguide 1733, and output-side waveguide 1734, which has a larger spacing β. When the distance in the Y-axis direction between the PLC prober and the connection end face becomes larger than L, the output-side waveguide into which light is input changes to 1734. Similarly, when the distance in the Y-axis direction between the PLC prober and the connection end face becomes smaller than L, the output-side waveguide into which light is input changes to 1732. In this way, by adding a waveguide circuit for proximity detection to the PLC prober and using this to determine the distance in the Y-axis direction between the PLC prober and the connection end face of the optical circuit chip, it becomes possible to easily perform rough alignment in the Y-axis direction.

[0082] Although FIG. 17 illustrates a configuration having three output waveguides 1732 to 1734, the number of output waveguides can be set according to the number and range of detectable distances, and can be any number greater than or equal to one.

[0083] (Example 2) Next, a second example of this embodiment will be described with reference to Fig. 18. The waveguide circuit for proximity detection of the PLC prober of Example 2 in Fig. 17 can also be configured using an arrayed waveguide grating (AWG).

[0084] FIG. 18 shows an example of the configuration of such a waveguide circuit for proximity detection, in which the wavelength of light incident from port 1 and emitted from port 2 changes according to the distance between PLC prober 1810 and connection end face 1741 of optical circuit chip 1740 to be inspected. In other words, by measuring the wavelength of the transmitted light, the distance in the Y-axis direction from connection end face 1741 of the optical circuit chip can be found, thereby enabling a proximity detection operation.

[0085] Figure 18(b) is an enlarged view of the area around the proximity detection waveguide circuit 1822 surrounded by the two-dot chain line in Figure 18(a), and is an enlarged view of only the optical waveguide 1712 side that constitutes the alignment port. For ease of understanding, Figure 18 also shows the PLC probe with the XZ plane expanded in the XY plane. Note that the PLC prober 1820 of this embodiment also includes a proximity detection waveguide circuit 1821 with the same structure on the optical waveguide 1711 side that constitutes the alignment port (not shown). In Figure 18, components with the same reference numerals as in Figure 17 are the same as those in Figure 17, and therefore will not be described here.

[0086] First, using FIG. 18, a specific distance D i At a specific wavelength λ i The structural requirements of the waveguide circuit 1822 for proximity detection through which light passes will be described.

[0087] Wavelength λ incident from Port 1 i The light of AWG up The light is branched into a plurality of arrayed waveguides in a first slab waveguide portion 1831 of 1823, and is given a delay amount according to the optical path length of each arrayed waveguide, and then is incident on a second slab waveguide portion 1832. The wavelength λ i As for the overall light, P up The light is emitted from the direction of an angle that satisfies the following equation: s d up θ upi +n c ΔL up = m up λ i (Equation 1) The effective refractive indexes of the arrayed waveguide and the slab waveguide are respectively n c , ns , A.W.G. up The waveguide spacing at the end of the arrayed waveguide is d up , the diffraction angle is θ up,i , the optical path length difference between adjacent arrayed waveguides is ΔL up , m up is set to an arbitrary integer.

[0088] The above wavelength λ i The light is then incident on the chip end at an angle of α up,i =φ slab,up -θ up,i is incident at (φ slab,up AWG up the inclination of the second slab waveguide portion), the effective refractive index of the gap between the PLC prober 1810 and the optical circuit chip 1740 to be inspected is n space Then, β up,i ≒n s / n space ・α up,i (If the gap is filled with air at this time, the angle is n space = 1, and if filled with refractive index matching liquid, n space ≒n s It is.)

[0089] When the surfaces of the PLC prober 1810 and the optical circuit chip 1740 are parallel to each other, the incident angle θ up,i and reflection angle θ dn,i , and the re-incidence angle β dn,i are equal to each other, and α up,i = n space / n s ・β up,i from the connection end surface 1741 of the optical circuit chip 1740 to the PLC prober 1810 side at an angle of dn The second slab waveguide portion 1835 of 1824 is i The light propagates.

[0090] At this time AWG dn P, which is the center position of the end of the arrayed waveguide 1824 dn is the wavelength λ i and AWG dn The waveguide spacing at the end of the 1824 arrayed waveguide is ddn , the diffraction angle is θ dn,i , the optical path length difference between adjacent arrayed waveguides is ΔL dn , m dn Let AWG be an arbitrary integer. dn The inclination of the second slab waveguide portion 1835 of 1824 is φ slab,dn If the design satisfies the following formulas (2) and (3), then a specific distance D i At a specific wavelength λ i It is possible to construct a waveguide circuit for proximity detection through which light of α dn,i =φ slab,dn -θ dn,i (Formula 2) n s d dn θ up,i +n c ΔL dn = m dn λ i (Formula 3)

[0091] In addition, the above specific distance D i At a specific wavelength λ i In order to easily realize a waveguide circuit for proximity detection that transmits light of dn 1824 parameters AWG up The value may be set to the same as 1823, that is, the two AWGs may be of the same shape.

[0092] Next, the operation when the distance between the PLC prober 1810 configured as above and the optical circuit chip 1740 to be inspected is changed will be explained using Fig. 19. Fig. 19 shows the AWG of the waveguide circuit for proximity detection described in Fig. 18(b). up 1823 and AWG dn 19 shows an enlarged view of the vicinity of second slab waveguide portions 1832 and 1835 of PLC probe 1824. In Fig. 19, as in Fig. 18(b), the XZ plane of the PLC probe is expanded in the XY plane direction to facilitate understanding.

[0093] FIG. 19(b) shows the distance D b is a specific distance D i In accordance with the above-mentioned configuration requirements of the waveguide circuit for proximity detection, up 1823 P upThe light emitted from the AWG is reflected by the connection end face 1741 of the optical circuit chip 1740. dn 1824 P dn θ satisfies the condition for incidence to dn,b AWG dn θ, which is a constituent element of 1824 dn,i Since it is equal to AWG dn 1824 is a specific wavelength λ i It transmits light.

[0094] FIG. 19(a) shows the distance D a is a specific distance D i In this case, AWG up 1823 P up The light emitted from the AWG is reflected from the connection end surface 1741 of the optical circuit chip 1740. dn 1824 P dn The angle θ when incident on dn,a is θ dn,i It becomes smaller θ dn,i It no longer matches AWG up 1823 is a specific wavelength λ i It will no longer transmit light.

[0095] On the other hand, FIG. 19(c) shows the distance D c is a specific distance D i In this case, AWG up 1823 P up The light emitted from the AWG is reflected from the connection end surface 1741 of the optical circuit chip 1740. dn 1824 P dn The angle θ when incident on dn,c is θ dn,i It becomes larger than θ dn,i In this case, it no longer matches AWG. up 1823 is a specific wavelength λ i In other words, light of a specific wavelength λ i By adjusting the Y-axis position of the PLC prober, the distance between the PLC prober and the optical circuit chip is set to D i It becomes possible to adjust it to.

[0096] In the above description, the distance between the PLC prober and the optical circuit chip is a specific distance Di It has been explained that it is possible to adjust the two AWGs of the proximity detection waveguide circuit. up 1823 and AWG dn 1824, in addition to the above-described configuration requirements, a specific wavelength λ i Angular dispersion at the diffraction angle (wavelength λ i A modified example in which the differential coefficients (in the formula 1) are set equal to each other will be described.

[0097] AWG up 1823 specific wavelength λ i Angular dispersion at the diffraction angle (wavelength λ i (differential coefficient at θ) is obtained by solving equation (1) for θ and differentiating it with respect to λ, and the AWG dn The angular dispersion of 1824 can be obtained from equation (3) in the same way as equation (5). up / dλ(λ i ) = m up n g / m s d up n c Formula (4) dθ dn / dλ(λ i ) = m dn n g / m s d dn n c Formula (5)

[0098] In the above, the waveguide circuit for proximity detection is constructed using an AWG as a simple method. up 1823 parameters AWG dn 1824, that is, two AWGs are of the same shape. i Angular dispersion at the diffraction angle (wavelength λ i At the same time, the configuration condition of the waveguide circuit for proximity detection is also satisfied, in which the differential coefficients (at the time of the two AWGs) are set equal to each other.

[0099] Referring to FIG. up 1823 P up The light emitted from the AWG is reflected by the connection end face 1741 of the optical circuit chip 1740. dn 1824 Pdn The angle θ when incident on dn is the distance D between the PLC prober and the optical circuit chip. i More specifically, the angle θ in FIG. dn,a AWG up 1823 P up The angle θ when emitted from up,a Similarly, in FIG. 19(c), θ dn,c is θ up,c is equal to

[0100] AWG up 1823 and AWG dn The specific wavelength λ of the two AWGs is 1824. i The fact that the angular dispersions at are equal means that the AWG up Diffraction angle θ of 1823 up,a λ that satisfies i Neighborhood λ a , i.e., AWG up Wavelength λ that can transmit 1823 a AWG dn 1824 can also be transmitted. up Diffraction angle θ of 1823 up,c λ that satisfies i Neighborhood λ c AWG dn 1824 can also be transmitted.

[0101] Thus, at a specific wavelength λ i Angular dispersion at the diffraction angle (wavelength λ i The distance at which the differential coefficients at the two AWGs are set equal is D. i When λ i AWG up 1823 and AWG dn It can transmit both 1824 and 1824 (needless to say, AWG up To 1823 θ up,c When the incident angle is λ c Light of wavelengths other than AWG dn 1824 cannot be penetrated.)

[0102] As described above, in this modification, the distance between the PLC prober and the SIP is D a →Db →D c The wavelength of light that can be transmitted from port 1 to port 2 changes as λ a →λ b →λ c Therefore, by measuring the wavelength of the light output from port 2, the distance L in the Y-axis direction between the PLC prober and the connection end face of the optical circuit chip can be correlated and grasped, which makes it possible to easily perform rough alignment in the Y-axis direction.

[0103] Example 3 Next, Example 3 of the second embodiment will be described with reference to Fig. 20. In Examples 1 and 2 described with reference to Fig. 17 and Fig. 18, examples have been shown in which a waveguide circuit for proximity detection is separately provided in the PLC prober, but in this example, the optical waveguides 312 and 313 constituting the alignment ports of the PLC prober can also be configured to be used as the waveguide circuit for proximity detection.

[0104] As with Fig. 17(b), Fig. 20 is an enlarged view of the area in the vicinity of the optical waveguide 313 of the PLC prober 310 in Fig. 20(a) surrounded by a two-dot chain line for ease of understanding, and shows the XZ plane expanded in the XY plane. Note that the PLC prober shown in Fig. 20(a) has the same configuration as the PLC prober described in Fig. 3, and the configurations with the same reference numerals as in Fig. 3 are the same as in Fig. 3, so their description will be omitted here. Also, the optical circuit chip 1740 in Fig. 20(b) is the same as that in Fig. 17(b), so its description will be omitted here.

[0105] The light emitted from the optical waveguide 313 of the PLC prober 310 is reflected by both the emission end face 2011 at the tip end of the PLC prober and the connection end face 1741 of the optical circuit chip 1740, making it possible to operate it as an etalon filter. When operated in this manner, the light reflection intensity changes sharply with changes in the gap distance in the Y-axis direction. This can be used to grasp the distance in the Y-axis direction. By adding a half mirror 2012 to the overclad layer portion at the tip of the PLC prober where the light from the optical waveguide 313 is emitted, the change in light reflection intensity can be made even sharper.

[0106] (Regarding other configurations that facilitate inspection) As described above, the mounting and inspection processes account for a large proportion of the manufacturing costs of optical transceivers that use optical circuit chips such as SiP chips, and in order to reduce the costs of optical transceivers, it is desirable to inspect optical circuit chips such as SiP chips in a wafer state and select non-defective products before mounting them into modules, and it is also desirable to improve the inspection efficiency in the optical characteristic inspection using the above-mentioned PLC prober. Below, we will explain ideas for improving the inspection efficiency of the optical characteristic inspection, which is the third step.

[0107] The example described below also relates to a method for inspecting the optical characteristics of optical circuit chips in a wafer state. Although the figure shows only one or several optical circuit chips in a wafer state, in reality, the optical circuit chips are in a wafer state before being diced.

[0108] (Example 1) Figure 21 shows an example in which an optical splitter is applied to a PLC prober, enabling simultaneous testing of the optical characteristics of multiple optical waveguides in an optical circuit chip. Figure 21 shows a PLC prober 2110 and an optical circuit chip 2120 to be tested. In Figure 21 , the XZ plane of the PLC prober is expanded onto the XY plane to simplify the illustration and facilitate understanding. Therefore, in reality, the main surface of the PLC prober, on which the optical waveguides are formed, is positioned perpendicular to the XY plane, as shown in Figures 1 to 3 . Note that Figure 21 omits the optical waveguides that constitute the alignment ports of the PLC prober and the optical circuit chip, but similarly to the above, two optical waveguides that constitute the alignment ports are provided. Similarly, a first step of rough alignment between the PLC prober and the optical circuit chip and a second step of active alignment are performed.

[0109] In this example, the optical circuit chip 2120 to be inspected is a 1-input × 4-output circuit, and the optical circuit may have branches as shown in Fig. 21, or a Mach-Zehnder modulator may be provided in each of the optical circuits 2122 to 2125. If the optical circuit chip to be inspected includes a modulator, the optical characteristics may be inspected while adjusting the phase.

[0110] The optical circuit chip 2120 comprises an input optical waveguide 2121 that constitutes an input port, and output optical waveguides 2122 to 2125 that constitute output ports, and is configured as an optical circuit having an optical splitter 2126 that splits light from the input optical waveguide 2121 into each of the output optical waveguides 2122 to 2125. Inspection of the optical characteristics of such an optical circuit chip is performed by measuring the output light from each of the output optical waveguides 2122 to 2125, but in order to achieve high-speed inspection, it is advantageous to be able to measure a large number of ports simultaneously in a lump.

[0111] Therefore, the PLC prober 2110 used to inspect the optical circuit chip 2120 is configured to match the optical circuit chip to be inspected, with optical waveguides 2111 to 2115 constituting an optical waveguide array, including one input optical waveguide 2111 and four output optical waveguides 2112 to 2115, and is equipped with a 4 output x 1 input optical splitter 2118 that functions as an optical multiplexer for multiplexing light propagating through the output optical waveguides 2112 to 2115 and outputting it to a single output optical waveguide 2117.

[0112] The PLC prober 2110 enables simultaneous testing of output light from the four output optical waveguides 2122 to 2125 of the optical circuit chip 2120 using the output optical waveguide 2117. For example, if an increase in loss is detected when a loss test is performed simultaneously, it can be determined that one of the output optical waveguides 2122 to 2125 is defective. Therefore, by performing testing using this PLC prober 2110, it becomes possible to perform testing equivalent to testing the characteristics of each channel at a higher speed. Note that in the above example, the number of output optical waveguides of the optical circuit chip and the corresponding output optical waveguides of the PLC prober were four, but testing can be performed in the same way even if there are more or fewer than four.

[0113] (Example 2) Next, referring to Fig. 22, a PLC prober 2210 as another example using an optical splitter will be described. In the PLC prober using the optical splitter described in Fig. 21, a thermo-optic switch (TO switch) can also be applied to the optical splitter portion. Although detailed drawings are omitted here, the 1x4 TO switch 2220 is configured, for example, with two stages of 1x2 optical switches, and can branch light into 1x4 ports like an optical splitter, or can be set to pass only light from any of the optical waveguides 2112 to 2115 and block light from the remaining three ports.

[0114] By switching the TO switch, the output light from the four output optical waveguides 2122 to 2125 of the optical circuit chip 2120 can be inspected collectively using the output optical waveguide 2117, and when a defect is detected in any of them, it is possible to inspect each of the output optical waveguides 2122 to 2125.

[0115] In Fig. 22, as in Fig. 21, the XZ plane of the PLC prober is expanded onto the XY plane for simplification and ease of understanding. Also, in Fig. 22, as in Fig. 21, the optical waveguides that constitute the LC prober and the alignment ports of the optical circuit chip are omitted. Elements in Fig. 22 that are the same as those in Fig. 21 are the same as those in Fig. 21, and therefore will not be described here.

[0116] 22, a TO switch 2220 is formed in the portion of the optical splitter 2118. The TO switch 2220 is formed with a common electrode 2231 connected in common to all the switches constituting the TO switch, and individual electrodes 2232 to 2234 connected to each switch, and each electrode is connected to a drive wiring mounted on a jig or the like 2230 to which the PLC prober 2210 of the inspection device is attached.

[0117] The TO switch 2220 can connect the output-side optical waveguides 2112-2113 not only one by one but also all at once or in groups to the output optical waveguide 2117. Therefore, as described above, by using the PLC prober 2210, it is possible to perform not only batch testing of multiple channels but also individual testing of each channel.

[0118] (Example 3) Instead of forming a TO switch in the optical splitter section, a gate circuit may be provided in each of the output optical waveguides 2112 to 2115 of the PLC prober. This gate circuit may be configured using, for example, a TO switch. By using the gate circuit, after the optical characteristics of the four output optical waveguides of the optical circuit chip are collectively tested and it is determined that one of the output optical waveguides 2122 to 2125 is defective, it is possible to control the gate circuit and test each of the output optical waveguides 2122 to 2125 individually.

[0119] In Fig. 23, as in Fig. 20, the XZ plane of the PLC prober is expanded onto the XY plane to simplify the drawing and make it easier to understand. Therefore, in reality, the main surface of the PLC prober, on which the optical waveguide is formed, is disposed perpendicular to the XY plane as shown in Fig. 1. Similarly, optical waveguides constituting alignment ports are formed in the PLC prober and the optical circuit chip, respectively.

[0120] 23, gate switches 2322 to 2325 are formed in output-side optical waveguides 2112 to 2115, respectively. Each of gate switches 2322 to 2325 is formed with a common electrode 2331 and each of electrodes 2332 to 2335, and each electrode is connected to a drive wiring mounted on a jig or the like 2330 to which PLC prober 2310 of the inspection device is attached. By using PLC prober 2310, it is possible to perform not only batch inspection of multiple channels but also individual inspection of each channel, as in the case described in FIG.

[0121] (Example 4) Next, consider the case where the optical circuit chip to be inspected contains multiple interferometric modulators. Interferometric modulators use the thermo-optic effect or electro-optic effect to adjust the phase of the interferometers that make up the modulator. In the inspection of such interferometric modulators, the power and voltage are swept to each modulator, and the optical output is monitored, thereby drawing the drive waveform shown in Figure 24(b) and determining the P required for the operation of the interferometer. π , V π , V bias Optical characteristic tests are often carried out to determine the following:

[0122] The waveform in Figure 24(b) is an example of a driving waveform for a TO shifter for phase adjustment of a modulator. π To measure the drive conditions corresponding to the maximum optical intensity, unlike measurements that can be completed in a short time using only one drive condition, such as for optical loss or resistance, it is necessary to perform measurements at several hundred points while changing the heater power, for example. Therefore, in tests to determine such drive waveforms, the optical characteristics test for one modulator takes a long time. Therefore, it takes a considerable amount of time to determine the drive waveform for each modulator on the optical circuit chip to be tested, i.e., for each channel.

[0123] In order to shorten the inspection time in such an inspection, it is desirable to simultaneously drive multiple modulators included in the optical circuit chip to obtain the drive waveforms. This example is characterized in that the drive electrodes of multiple modulators included in the optical circuit chip are short-circuited only during inspection, making it possible to inspect while driving them simultaneously.

[0124] An example of a device for shortening the inspection time will be described with reference to Figure 24. In Figure 24, as in Figure 21 and other figures, the XZ plane of the PLC prober is expanded into the XY plane to simplify the drawing and make it easier to understand. Therefore, in reality, the main surface of the PLC prober, on which the optical waveguide is formed, is disposed perpendicular to the XY plane as shown in Figure 1. Also, in Figure 24, as in Figure 21, the PLC prober and the optical waveguides that constitute the alignment ports of the optical circuit chip are omitted. Since the same reference numerals in Figure 24 as in Figure 21 are the same as those in Figure 21, their description will be omitted here.

[0125] The optical circuit chip 2420 to be inspected is a 1-input x 4-output circuit, and similar to the optical circuit chip shown in FIG. 21 , it includes an input optical waveguide 2121 constituting an input port and output optical waveguides 2122-2125 constituting output ports, and an optical circuit including an optical splitter 2126 that splits light from the input optical waveguide 2121 to each of the output optical waveguides 2122-2125. In FIG. 24 , modulators 2431-2434 are formed in the output optical waveguides 2122-2125, respectively. Electrodes 2441-2444 and electrode 2445 for inputting modulation signals are connected to each of the modulators 2431-2434, respectively. The electrodes 2441-2444 and electrode 2445 are formed to extend into the area of ​​the adjacent optical circuit chip 2450 formed adjacently on the wafer, and the electrodes 2441-2444 are short-circuited by electrode 2451.

[0126] The PLC prober 2410 used to test this optical circuit chip 2320 includes optical waveguides 2411 to 2415 that constitute an optical waveguide array, in accordance with the optical circuit chip to be tested, and includes one input optical waveguide 2411 and four output optical waveguides 2412 to 2415. Note that, like the PLC prober 2110 in Fig. 21, the PLC prober 2410 may include a 4-output x 1-input optical splitter that functions as an optical multiplexer for multiplexing light propagating through the output optical waveguides 2412 to 2415 and outputting the light to a single output optical waveguide. Alternatively, the PLC prober 2210 in Fig. 22 or the PLC prober 2310 in Fig. 23 may be used.

[0127] Next, the procedure for testing the optical circuit chip 2420 of this example will be explained using 1ch as an example. For example, although not shown in the figure, 2431 is provided with a Mach-Zehnder interferometer and an electrode for changing its phase with voltage or power. By applying and changing power or voltage to electrode 2451 using electrode 2445 as a ground electrode, the optical output from the modulator changes in the same way as the drive waveform.

[0128] As mentioned above, determining such a drive waveform is necessary to determine the bias point, which is the reference potential for applying a high-speed signal when actually driving the modulator at high speed. Since many measurement points are required to determine this drive waveform, by driving four modulators together and simultaneously monitoring and determining the optical output waveforms of all four channels, the time required to drive and test the modulators one channel at a time can be reduced to one-quarter. Other measurements such as the resistance and optical loss of each channel are performed for each channel, but as mentioned above, this process does not take much time.

[0129] The electrode 2451 used to test the optical circuit chip 2420 is formed in the area of ​​the adjacent chip 2450, and is therefore cut off when the chips are formed, so that the electrodes 2441 to 2444 can be used as independent electrodes. In addition, as will be explained in Example 5 below, a multi-chip circuit can also be collectively measured in the same way, allowing all channels to be measured at once.

[0130] Even if the electrodes of each modulator are independent, it is possible to simultaneously drive them by contacting four electrodes with electrical signal input probes and shorting each electrode on the measurement device side. However, in this case, the number of probes required increases to five, which requires a more expensive electrical signal input probe device compared to the case where two probes are required as described above. For example, to simultaneously measure four optical circuit chips each configured with a 1-input x 8-output optical circuit, 33 electrodes would need to be simultaneously probed. However, by shorting the electrodes of each modulator as in this example, the number of probes required for testing is reduced to two, thereby reducing the cost of the electrical signal input probe device.

[0131] (Ingenious Example 5) Next, innovative example 5 will be described with reference to Fig. 25. If it were possible to test multiple optical circuit chips collectively using one PLC prober, the number of alignment steps for the PLC prober could be reduced, making it possible to further shorten the testing time. Fig. 25 shows an example in which four optical circuit chips, each formed with a 1-input x 4-output optical circuit, can be aligned collectively using one PLC prober, enabling optical characteristics testing.

[0132] In Fig. 25, the XZ plane of the PLC prober is expanded onto the XY plane for the sake of simplification and ease of understanding, as in Fig. 21. Therefore, in reality, the main surface of the PLC prober, on which the optical waveguide is formed, is disposed perpendicular to the XY plane as shown in Figs.

[0133] The PLC prober 2510 includes a plurality of optical waveguide arrays 2511 to 2511 corresponding to the optical waveguides that constitute the input / output ports of a plurality of optical circuit chips 2520 to 2520. The optical waveguide array 2511 includes an input optical waveguide 2512 and output optical waveguides 2513 to 2516.

[0134] Although the reference numerals are omitted in the figure, the same applies to the optical waveguide arrays 2511 2 to 2511 4. Furthermore, a pair of optical waveguides 2517 and 2518 that constitute the alignment port are formed on the end side of the PLC prober.

[0135] In this example, output optical waveguides 2513 to 2516 of each optical waveguide array are coupled to output optical waveguides 2531 to 2531 via thermo-optical switches (TO switches) 2541 to 2541, respectively. Furthermore, each output optical waveguide 2531 to 2531 is coupled via a TO switch 2542 to an optical waveguide 2532 that constitutes the output port of the PLC prober.

[0136] An optical waveguide 2533 serving as an input port of the PLC prober is branched into each input side optical waveguide 2512 of each of the optical waveguide arrays 2521 to 2521 via a TO switch 2543. Furthermore, a pair of optical waveguides 2527 and 2528 constituting the alignment port are connected via a TO switch 2544 to an optical waveguide 2534 constituting the alignment port of the PLC prober.

[0137] The optical circuit chips 2520 to 2520 to be inspected are formed adjacent to each other on a wafer, and each optical circuit chip has a 1-input x 4-output optical circuit formed therein. Each of the optical circuit chips 2520 to 2520 has one input optical waveguide and four output optical waveguides branching from it, similar to the optical circuit chip 2120 in Fig. 21, but the numbers of input optical waveguides and output optical waveguides shown here are merely examples, and other numbers may also be used.

[0138] A pair of optical waveguides 2521 and 2522 for alignment corresponding to the pair of optical waveguides 2517 and 2518 constituting the alignment port of the PLC prober are formed in the optical circuit chips 2520 and 2520. The pair of optical waveguides 2521 and 2522 constituting the alignment port may be provided in each of the optical circuit chips 2520 to 2520, similar to the optical circuit chip in FIG.

[0139] Next, the procedure for the optical characteristic inspection method using the PLC prober 2510 of this example will be described. First, as in the optical characteristic inspection method of the first embodiment, the PLC prober 2510 is set at a predetermined position above the etching groove including the connection end face of the optical circuit chip to be inspected. Then, in the first step, colored light is input to the optical waveguides 2517 and 2518 that constitute the alignment ports of the PLC prober 2510, and the position of the PLC prober is adjusted in the X-axis, Y-axis, and Z-axis directions, thereby roughly aligning the relative positions of the PLC prober and the alignment ports of the optical circuit chip.

[0140] After the rough alignment in the first step is completed, the second step is to perform active alignment, which adjusts the position of the PLC prober in the X-axis, Y-axis, and Z-axis directions while measuring the intensity of the input light input from the alignment port of the PLC prober to the alignment port of the optical circuit chip. Then, when the alignment is completed, the third step is to use the aligned PLC prober to inspect the optical characteristics of the optical circuit chip.

[0141] In this example, in the third step, optical characteristics are inspected for four optical circuit chips 2520 to 2520. In this way, in this example, the optical characteristics of four optical circuit chips can be inspected by performing a single alignment step using PLC prober 2510, and therefore the number of alignment steps can be reduced compared to when the optical characteristics of each optical circuit chip is inspected one by one, thereby further shortening the inspection time.

[0142] According to the PLC prober 2510 of this example, since it is equipped with TO switches 2541 to 2541, as explained in FIG. 22, by switching the TO switch 2541, the output light from the four output optical waveguides of the optical circuit chip 2520 can be inspected collectively using the output optical waveguide, and when a defect is detected in any one of the output optical waveguides, it is possible to inspect each output optical waveguide.

[0143] Furthermore, the TO switch 2542 is configured so that light from each of the output optical waveguides 2531 to 2531 can be output to the output port collectively or individually. The TO switch 2543 can output light from the input port to each of the input-side optical waveguides 2512 collectively or individually, making it possible to inspect the optical characteristics of the optical circuit chips collectively or sequentially. Thus, by using the PLC prober 2510, it is possible to inspect the optical characteristics more efficiently.

[0144] Because PLC probers are manufactured using a photolithography process, the precision of the optical waveguide array spacing and other parameters is high at the submicron level, and the characteristic variations between arrays are smaller than those of grating couplers, making it possible to take advantage of the features of PLC probers.

[0145] Because the TO switch can be freely set to branch and select any port, the PLC prober 2510 can simultaneously measure the loss of, for example, 16 channels of four optical circuit chips with one input and one output. If the loss values ​​are found to be different as a result, it is possible to perform individual measurements for each chip and for each channel of each chip by switching the TO switch.

[0146] The present invention can realize an optical characteristic inspection method that facilitates adjustment by improving the visibility of the optical waveguide that constitutes the alignment port of the PLC prober in rough alignment between the PLC prober and the optical circuit chip in optical characteristic inspection of the optical circuit chip in wafer state using the PLC prober.

[0147] DESCRIPTION OF SYMBOLS 100... Wafer 110, 320, 1120, 1220, 1320, 1420, 1520, 1620, 1650, 1740, 2120, 2420, 2520... Optical circuit chip 121, 122, 330... Etching groove 130, 310, 810, 1010, 1110, 1610, 1710, 1810, 2110, 2210, 2310, 2410, 2510... PLC prober 311... Main surface of PLC prober 321, 1621, 1651, 1741... Connection end surface 341... Tip surface of PLC prober 601... Colored light (red light) 811... PLC prober substrate 1013... Stopper portion 1113... Binary lens 1221, 1222, 1223, 1224... Etching patterns 1321, 1322, 1323, 1324... Dummy optical waveguide patterns 1421, 1422, 1423, 1424... PDs 1425, 1426, 1427... PDs 1660... Minute reflecting surfaces 1721, 1722, 1821, 1822... Waveguide circuits for proximity detection 1823... AWG up 1824...AWG dn

Claims

1. A method for inspecting optical characteristics of optical circuit chips in a wafer state using a PLC prober whose tip is inserted into an etched groove from an upper surface of a wafer on which etching grooves serving as connection end faces of each optical circuit chip are formed, and optically coupled to an optical waveguide of the optical circuit chip formed on the connection end face, the method comprising the steps of: a first step of performing rough alignment by inputting colored light into an optical waveguide constituting an alignment port of the PLC prober to adjust the relative positions of the PLC prober and the optical circuit chip in the X-axis, Y-axis and Z-axis directions; a second step of performing active alignment by adjusting the relative positions of the PLC prober and the alignment port of the optical circuit chip in the X-axis, Y-axis and Z-axis directions while measuring the intensity of light input from the alignment port of the PLC prober to the alignment port of the optical circuit chip; and a third step of inspecting optical characteristics of the optical circuit chip. and a method for inspecting optical characteristics of an optical circuit chip, comprising:

2. The method for inspecting the optical characteristics of an optical circuit chip as described in claim 1, characterized in that the PLC prober includes a quartz glass substrate and the optical waveguide that constitutes the alignment port formed on the quartz glass substrate, and the colored light input to the optical waveguide that constitutes the alignment port in the first step can be observed from the quartz glass substrate side.

3. A method for inspecting the optical characteristics of an optical circuit chip as described in claim 1, characterized in that a stopper is formed on the overclad layer at the tip of the PLC prober, and in the first step, adjustment in the Z-axis direction is performed by contacting the stopper with the top surface of the optical circuit chip.

4. A method for inspecting optical characteristics of an optical circuit chip as described in claim 1, characterized in that at least one etching pattern is formed in the vicinity of an optical waveguide that constitutes the alignment port of the optical circuit chip, and in the first step, the colored light input to the optical waveguide that constitutes the alignment port of the optical circuit chip is observed using the etching pattern.

5. A method for inspecting optical characteristics of an optical circuit chip as described in claim 1, characterized in that the optical axis of the light emitted from the tip of the PLC prober and the optical axis of the optical waveguide formed on the connection end face of the optical circuit chip are inclined at the same inclination angle with respect to the connection end face, a minute reflection surface perpendicular to the optical axis of the optical waveguide is formed in a waveguide formation layer of the optical circuit chip, and in the first step, rough alignment in the X-axis and Y-axis directions is performed by detecting reflected light returning from the minute reflection surface to the optical waveguide that constitutes the alignment port of the PLC prober.

6. A method for inspecting the optical characteristics of an optical circuit chip as described in claim 1, characterized in that the PLC prober is provided with a waveguide circuit for proximity detection, and in the first step, adjustment in the Y-axis direction is performed using the waveguide circuit for proximity detection.

7. The method for inspecting the optical characteristics of an optical circuit chip as described in claim 6, characterized in that the waveguide circuit for proximity detection is composed of an optical waveguide whose optical axis is inclined at a predetermined angle with respect to the tip surface of the PLC prober, and at least one other optical waveguide formed in line symmetry with the optical waveguide at a predetermined distance apart.

8. The proximity detection waveguide circuit comprises a pair of arrayed waveguide gratings (AWGs). up and A.W.G. dn The AWG is configured by up and the AWG dn The AWG up and the AWG dn one of the slab waveguides is in contact with the tip of the PLC prober, up The one slab waveguide and the AWG up The center point P of the connection point with the arrayed waveguide up The light emitted from the tip is bent at the tip according to Snell's law, and the distance from the tip is a predetermined distance D i The light is reflected at the connection end surface of the separated optical circuit chip, bent again at the tip, and dn The center point P of the connection point between the arrayed waveguide and the slab waveguide to which the tip is in contact dnn The distance is set to D i When the AWG up P up A specific wavelength λ emitted from i The AWG is designed so that the direction of the light (diffraction angle) is the optical path. up is designed, and the distance is also the same as above D i When the AWG dn P dn The specific wavelength λ i The AWG is designed so that the direction of the light (diffraction angle) is the above-mentioned optical path. dn 7. The method for inspecting optical characteristics of an optical circuit chip according to claim 6, wherein:

9. The method for inspecting optical characteristics of an optical circuit chip according to claim 6, wherein the waveguide circuit for proximity detection is an optical waveguide configured to operate as an etalon filter.

10. The method for inspecting optical characteristics of an optical circuit chip according to claim 1, wherein the PLC prober comprises a plurality of output optical waveguides corresponding to a plurality of optical waveguides constituting an output port of the optical circuit chip, and a branching circuit which couples the plurality of output optical waveguides to one optical waveguide which constitutes an output port of the PLC prober, and wherein in the third step, the optical characteristics of the plurality of optical waveguides of the optical circuit chip are inspected collectively.

11. An optical circuit chip for applying the optical characteristic inspection method of claim 1, comprising: a substrate and a waveguide forming layer formed on the substrate; the waveguide forming layer at a connection end face is provided with a plurality of optical waveguides constituting an alignment port, an output port and an input port; the optical axes of the plurality of optical waveguides are inclined at a predetermined inclination angle with respect to the connection end face; and a minute reflection surface perpendicular to the optical axes of the optical waveguides is formed in the waveguide forming layer at the connection end face.

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