MMVD offsets table for DMVR candidates

Abstract

Methods and apparatus are provided for minimizing redundancy between the inter prediction tools decoder-side motion vector refinement (DMVR) and merge with motion vector difference (MMVD). In an embodiment, a DMVR candidate motion vector that is included in a list of MMVD candidate motion vectors has MMVD offsets applied that are not covered by DMVR using a modification of an MMVD offsets table. In another embodiment, a modified MMVD offsets table is used to provide offsets not covered by DMVR refinements. In another embodiment, MMVD offsets tables applied to DMVR candidate motion vectors may depend on picture resolution.

Description

MMVD OFFSETS TABLE FOR DMVR CANDIDATESCROSS REFERENCE TO RELATED APPLICATIONThis application claims the benefit of European Patent Application N°24305043.2 filed January 9, 2024, which is incorporated by reference herein in its entirety.TECHNICAL FIELDAt least one of the present embodiments generally relates to a method or an apparatus for video encoding or decoding, compression or decompression.BACKGROUNDTo achieve high compression efficiency, image and video coding schemes usually employ prediction, including motion vector prediction, and transform to leverage spatial and temporal redundancy in the video content. Generally, intra or inter prediction is used to exploit the intra or inter frame correlation, then the differences between the original image and the predicted image, often denoted as prediction errors or prediction residuals, are transformed, quantized, and entropy coded. To reconstruct the video, the compressed data are decoded by inverse processes corresponding to the entropy coding, quantization, transform, and prediction.SUMMARYAt least one of the present embodiments generally relates to a method or an apparatus for video encoding or decoding, and more particularly, to a method or an apparatus for creating and using an MMVD (Merge with Motion Vector Difference) candidates list for DMVR (Decoder-side Motion Vector Refinement) candidates.According to a first aspect, there is provided a method. The method comprises steps for modifying at least one offsets table indicative of a refinement of a motion vector candidate for a video block; and, encoding the video block using the modified at least one offsets table.According to a second aspect, there is provided another method. The method comprises steps for modifying at least one offsets table indicative of a refinement of a motion vector candidate for a video block; and, decoding the video block using the modified at least one offsets table.According to another aspect, there is provided an apparatus. The apparatus comprises a processor and a memory. The processor can be configured to operate on digital video data according to the aforementioned methods.According to another aspect, there is provided an apparatus. The apparatus comprises a processor and a memory. The processor can be configured to encode a block of video or decode video data by executing any of the aforementioned methods.According to another general aspect of at least one embodiment, there is provided a device comprising an apparatus according to any of the decoding embodiments; and at least one of (i) an antenna configured to receive a signal, the signal including a video block, (ii) a band limiter configured to limit the received signal to a band of frequencies that includes a video block, or (iii) a display configured to display an output representative of a video block.According to another general aspect of at least one embodiment, there is provided a non-transitory computer readable medium containing data content generated according to any of the described encoding embodiments or variants.According to another general aspect of at least one embodiment, there is provided a signal comprising video data generated according to any of the described encoding embodiments or variants.According to another general aspect of at least one embodiment, video data ora bitstream is formatted to include data content generated according to any of the described encoding embodiments or variants.According to another general aspect of at least one embodiment, there is provided a computer program product comprising instructions which, when the program is executed by a computer, cause the computer to carry out any of the described decoding embodiments or variants.These and other aspects, features and advantages of the general aspects will become apparent from the following detailed description of exemplary embodiments, which is to be read in connection with the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGSFigure 1 illustrates an example of merge with motion vector difference (MMVD) refinement in WC (Versatile Video Coding).Figure 2 illustrates an example of decoder-side motion vector refinement (DMVR).Figure 3 illustrates MMVD and DMVR competition.Figure 4 illustrates an embodiment of a modification of the MMVD offsets table.Figure 5 illustrates one embodiment of a method for encoding based on the general aspects described.Figure 6 illustrates one embodiment of a method for decoding based on the general aspects described.Figure 7 illustrates one embodiment of an apparatus for implementing encoding and / or decoding using the general aspects described.Figure 8 illustrates a standard, generic, video compression scheme.Figure 9 illustrates a standard, generic, video decompression scheme.Figure 10 illustrates a processor-based system for encoding / decoding under the general described aspects.DETAILED DESCRIPTIONThe embodiments described here are in the field of video compression and generally relate to video compression and video encoding and decoding more specifically to a method or an apparatus for using an MMVD candidates list for DMVR candidates.To achieve high compression efficiency, image and video coding schemes usually employ block-based prediction, including motion vector prediction, and transform to leverage spatial and temporal redundancy in the video content. Generally, intra or inter prediction is used to exploit the intra or inter frame correlation, then the differences between the original block and the predicted block, often denoted as prediction errors or prediction residuals, are transformed, quantized, and entropy coded. To reconstruct the video, the compressed data are decoded by inverse processes corresponding to the entropy coding, quantization, transform, and prediction.In the HEVC (High Efficiency Video Coding) video compression standard, motion compensated temporal prediction is employed to exploit the redundancy that exists between successive pictures of a video.To do, a motion vector is associated to each prediction unit (PU). Each CTU (Coding Tree Unit) is represented by a Coding Tree in the compressed domain. This is a quad-tree division of the CTU, where each leaf is called a Coding Unit (CU).Each CU is then given some Intra or Inter prediction parameters (Prediction Info). To do so, it is spatially partitioned into one or more Prediction Units (PUs), each PU being assigned some prediction information. The Intra or Inter coding mode is assigned on the CU level.The embodiments described here are in the field of video coding. This description describes a way to improve the coding efficiency (improving the BD-rate), by introducing normative changes in the inter part of the codec. This description presents a way to minimize the redundancy between two inter tools in ECM: the DMVR (Decoder-side Motion Vector Refinement) tool and the MMVD (Merge with Motion Vector Difference) tool.Signaling a motion vector difference to the decoder is expensive in terms of transmitted bits. As much as possible, such a signaling must be avoided. Cheaper means than transmitting motion vectors or motion vectors differences have been developed to apply a correction to a motion vector candidate. At the encoder side, these tools are in competition during the R-DO (Rate-Distortion Optimization) process.For instance, a way to apply a correction to a motion vector candidate is to apply some refinement offsets (or steps) to this candidate. A table of offsets is known at encoder and decoder side. The encoder signals the table index corresponding to the correction to be applied. It must also signal information relative to the sign and the direction of the correction. Such a tool is for instance known as MMVD (Merge with Motion Vector Difference) in WC and its successor.Another way to apply a correction to a motion vector candidate is based on motion vector refinements. Instead of transmitting a correction to a motion vector candidate, the encoder and the decoder process a local refinement around this candidate. Such a tool exists in WC, called DMVR (Decoder-side Motion Vector Refinement), and should be improved in the next generation of codecs.These two tools are introduced below. The goal is not to present these tools in depth, but to understand the context and why some optimizations may be applied when they are jointly used, in competition to minimize the R-DO in the codec.Merge with Motion Vector Difference inter toolAs introduced above, the MMVD inter tool applies offsets around motion vector candidates. During the R-DO, for each candidate in the MMVD candidates list (list of 2 candidates for WC), the encoder applies offsets defined in a table, in different directions.If a candidate associated with an offset and a direction is selected by the encoder as the best way to encode the current block, the encoder signals that the MMVD tool must be used, signals the MMVD candidate (the index of the candidate in the list) and signals refinement information. In WC for instance, presented in Figure 1 , this refinement information includes an index specifying the motion vector refinement magnitude (the offset represented by distance IDX), and an index indicating the motion refinement direction (Direction IDX).In this example of WC, the smaller refinement around the candidates for Distance IDX = 0 is a quarter of pixel and can go up to 32 pixels.During the R-DO, the encoder assesses the different offsets with the different directions around each candidate. This may represent many combinations. For this reason, the number of MMVD candidates is reduced (two or three candidates in the list), compared to the merge candidates list.The MMVD candidates list is generally built with the first candidates of the merge candidates list used for DMVR presented below.Decoder-side Motion Vector Refinement inter toolFigure 2 presents the principle of the DMVR tool, based on a bilateral-matching (BM).In bi-prediction operation, a refined motion vector is searched around the initial candidate’s motion vector in the reference picture list LO and the reference picture list L1 . The BM method calculates the distortion between the two candidates blocks in the reference picture list 0 and list 1 : the SAD (Sum of Absolute Difference) between the two blocks (light grey hatched blocks Figure 2) based on each motion vector candidate around the initial motion vector is calculated. The motion vector candidate with the lowest SAD becomes the refined motion vector, used to generate the bi-predicted signal.The DMVR process is applied to the current block in merge mode, with some limitations.Some of these limitations may be related to the current block size. For instance, in WC, the horizonal block size cbWidth and the vertical block size cbHeight must be greater than or equal to 8. The product cbWidth x cbHeight must be greater than or equal to 128.Some constraints can be related to the motion vector candidate, and more especially to its reference pictures: since DMVR is based on bilateral matching, the candidate must be bi-pred, and both reference pictures in list 0 and list 1 must be STRP (Short-Term Reference Picture). To avoid motion vector rescaling, the POC (Picture Order Count) difference between the current picture and the two reference pictures must be the same (DiffPicOrderCnt( currPic, RefPicList

[0000] [ refldxLO ]) is equal to DiffPicOrderCnt( RefPicList

[0001] [ refldxLI ], currPic ).Some other limitations may be related to other tools. For instance, in WC, the bi-pred weight index bcwldex of BCW (Bi-prediction with CU-level Weights) must be equal to zero. For both reference pictures, the RPR (Reference Picture Resampling) must not be activated.If the motion vectors of a candidate are too close to another candidate in the list, the encoder can also decide not to apply the refinement on this candidate.These constraints are given here as examples. They illustrate that even if a current block satisfies the conditions (bloc size for instance) to apply the DMVR tool, some conditions on the candidate (reference pictures for instance) must also be met. The encoder checks these conditions before applying DMVR. If they are not met, the encoder (and obviously the decoder) does not apply DMVR for these candidates. It means that for a current block, associated to a list of candidates, the encoder applies DMVR on some candidates, and not on others when processing the R-DO.As previously stated, the DMVR and the MMVD tools are put in competition during the encoder’s R-DO process, as presented Figure 3. This figure illustrates that some candidates processed by DMVR may also be processed by MMVD.In this example of state of art embodiment, the MMVD candidates list is based on the merge candidates list used to apply DMVR, as it is the case in WC.The merge candidates list is for instanced composed of spatial candidates (motion vectors from adjacent blocs), temporal candidates (located at the current bloc position in a previousframe), history-based candidates, ... in the order of decreasing candidate quality (probability for the current bloc to have a motion vector close to the candidate). The MMVD candidate list is generally derived from this merge list: the first merge candidates being put in the MMVD candidates list (the first 2 candidates for WC). It means that a DMVR candidate in MMVD list is also in the merge list. In this case, this MMVD candidate is processed by DMVR.But the described aspects could also be used in other contexts, where the candidates list for MMVD could be created from scratch (not derived from the merge list used for DMVR). In this case, a DMVR candidate in the MMVD list may not be present in the merge candidate list.The short presentations of these tools show that the smaller offsets applied by MMVD may already be covered by the refinements of DMVR. In the state of art, the DMVR and the MMVD tools are in competition, but there is no relationship between them.The main idea of the described embodiments is to establish a relationship between these tools to minimize the redundancy between them. The MMVD tool is modified to minimize this redundancy: when the current bloc is processed by MMVD, the table defining the offset applied to the candidate is modified to avoid applying offsets that may already be covered by DMVR. This normative modification is applied to the block 3.1 in Figure 3 and described in the section entitled “Modification of the MMVD offsets table” below.When a MMVD candidate is also processed by DMVR, a new offset table can be applied by MMVD. Instead of beginning at a quarter of pixel for instance as presented Figure 1 , the offset table can start at a higher value.The offset table can also define offsets not covered by DMVR. For instance, if the DMVR tool applies a refinement of one pixel or half of a pixel around the motion vector candidates, the MMVD offsets table may apply offsets of a quarter or three quarters of pixels.The goal of the described embodiments is to obtain coding gains, in terms of BD-rate.As presented in the context of the embodiments, the state of art codecs implement several inter tools applying refinements around candidates, with some redundancy. To improve the codec, the embodiments minimize this redundancy. When the DMVR tool assesses some refinements, the MMVD tool may assess others.According to the current embodiments, when a DMVR candidate is in the list of MMVD candidates, the encoder can apply MMVD offsets not covered by DMVR, thanks to a modification of the MMVD offsets table. This new MMVD table is normative since the same offsets table must be applied at the encoder and the decoder side.Note that in the following paragraphs, “DMVR candidates” means candidates that are processed with DMVR by the encoder during the RD-O. Conversely, the other candidates are “non-DMVR candidates”.Modification of the MMVD offsets tableFigure 4 presents the main embodiment, where the MMVD offsets table applied to DMVR candidates is modified.Note that this figure presents the encoder’s R-DO, but the modification of the block 4.1 (compared to the state of art bloc 3.1 Figure 3) is normative and also applied to the decoder.In the introduction to the MMVD tool, the first offset applied to a candidate may, for instance, be a quarter of pixel (for WC, 1 / 4 of luma sample for the first offset in the table of Figure 1). This state of art table is called the regular offsets table in Figure 4.According to the described embodiments, a new MMVD offsets table may be applied to the DMVR candidates with, for instance, a first offset higher than the first offset of the regular MMVD offsets table.As an example, the following new table may be used. The table values are expressed in quarter of pixel. The first value corresponds to an offset of 2 pixels, the second value 9 to an offset of 2 pixels and a quarter, etc.Example of new offset table for DMVR candidates:According to an aspect of the general aspects described, a new MMVD offsets table can be applied to the non-DMVR candidates close to a DMVR candidate. This offsets table can be the table presented above, or a third one, starting with an offset between the regular table and the new table. For instance, the regular offsets table applied to non-DMVR candidates may start at a quarter of pixel, the new table applied to DMVR candidates may start at 2 pixels, and a third offset table applied to the candidates close to a DMVR candidate may start at 1 pixel.The precision of refinement can be limited for the DMVR tool. For instance, even if the codec stores and manipulates motion vectors with a precision of 1 / 16 of pixel, the DMVR refinement could be limited to 1 / 2 pixel.According to another aspect of the embodiments, the new MMVD table can advantageously provide offsets not covered by the DMVR refinements. For a DMVR refinement precision of 1 / 2 pixel, this is, for instance, the case of the offsets proposed above in the new MMVD table example, with offsets of 1 / 4 or 3 / 4 of pixel.In state of art, the MMVD offsets table can depend on the picture resolution. For instance, HD contents may be coded with the sub pixel offsets table presented in Figure 1 , and 4K contents with offsets multiplied by 4 (first offset of 1 pixel).According to another aspect of the embodiments, the new MMVD offsets table applied to DMVR candidates can depend on the picture resolution.One embodiment of a method 500 under the general aspects described here is shown in Figure 5. The method commences at start block 501 and control proceeds to block 510 for modifying at least one offsets table indicative of a refinement of a motion vector candidate for a video block. Control proceeds from block 510 to block 520 for encoding the video block using the modified at least one offsets table.One embodiment of a method 600 under the general aspects described here is shown in Figure 6. The method commences at start block 601 and control proceeds to block 610 for modifying at least one offsets table indicative of a refinement of a motion vector candidate for a video block. Control proceeds from block 610 to block 620 for decoding the video block using the modified at least one offsets table.Figure 7 shows one embodiment of an apparatus 700 for encoding, decoding, compressing or decompressing, or filtering of video data using the aforementioned methods. The apparatus comprises Processor 710 and can be interconnected to a memory 720 through at least one port. Both Processor 710 and memory 720 can also have one or more additional interconnections to external connections.Processor 710 is also configured to either insert or receive information in a bitstream and, either compressing, encoding, or decoding using any of the described aspects.The embodiments described here include a variety of aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described with specificity and, at least to show the individual characteristics, are often described in a manner that may sound limiting. However, this is for purposes of clarity in description and does not limit the application or scope of those aspects. Indeed, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, the aspects can be combined and interchanged with aspects described in earlier filings as well.The aspects described and contemplated in this application can be implemented in many different forms. Figures 8, 9, and 10 provide some embodiments, but other embodiments are contemplated and the discussion of Figures 8, 9, and 10 does not limit the breadth of the implementations. At least one of the aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a bitstream generated or encoded. These and other aspects can be implemented as a method, an apparatus, a computer readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the methods described, and / or a computer readablestorage medium having stored thereon a bitstream generated according to any of the methods described.In the present application, the terms “reconstructed” and “decoded” may be used interchangeably, the terms “pixel” and “sample” may be used interchangeably, the terms “image,” “picture” and “frame” may be used interchangeably. Usually, but not necessarily, the term “reconstructed” is used at the encoder side while “decoded” is used at the decoder side.Various methods are described herein, and each of the methods comprises one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined.Various methods and other aspects described in this application can be used to modify modules, for example, the intra prediction, entropy coding, and / or decoding modules (160, 260, 145, 230), of a video encoder 100 and decoder 200 as shown in Figure 8 and Figure 9. Moreover, the present aspects are not limited to WC or HEVC, and can be applied, for example, to other standards and recommendations, whether pre-existing or future-developed, and extensions of any such standards and recommendations (including WC and HEVC). Unless indicated otherwise, or technically precluded, the aspects described in this application can be used individually or in combination.Various numeric values are used in the present application. The specific values are for example purposes and the aspects described are not limited to these specific values.Figure 8 illustrates an encoder 100. Variations of this encoder 100 are contemplated, but the encoder 100 is described below for purposes of clarity without describing all expected variations.Before being encoded, the video sequence may go through pre-encoding processing (101), for example, applying a color transform to the input color picture (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of the input picture components in order to get a signal distribution more resilient to compression (for instance using a histogram equalization of one of the color components). Metadata can be associated with the preprocessing and attached to the bitstream.In the encoder 100, a picture is encoded by the encoder elements as described below. The picture to be encoded is partitioned (102) and processed in units of, for example, CUs. Each unit is encoded using, for example, either an intra or inter mode. When a unit is encoded in an intra mode, it performs intra prediction (160). In an inter mode, motion estimation (175) and compensation (170) are performed. The encoder decides (105) which one of the intra mode or inter mode to use for encoding the unit, and indicates the intra / inter decision by, for example, a prediction mode flag. Prediction residuals are calculated, for example, by subtracting (110) the predicted block from the original image block.The prediction residuals are then transformed (125) and quantized (130). The quantized transform coefficients, as well as motion vectors and other syntax elements, are entropy coded (145) to output a bitstream. The encoder can skip the transform and apply quantization directly to the non-transformed residual signal. The encoder can bypass both transform and quantization, i.e., the residual is coded directly without the application of the transform or quantization processes.The encoder decodes an encoded block to provide a reference for further predictions. The quantized transform coefficients are de-quantized (140) and inverse transformed (150) to decode prediction residuals. Combining (155) the decoded prediction residuals and the predicted block, an image block is reconstructed. In-loop filters (165) are applied to the reconstructed picture to perform, for example, deblocking / SAO (Sample Adaptive Offset) filtering to reduce encoding artifacts. The filtered image is stored at a reference picture buffer (180).Figure 9 illustrates a block diagram of a video decoder 200. In the decoder 200, a bitstream is decoded by the decoder elements as described below. Video decoder 200 generally performs a decoding pass reciprocal to the encoding pass as described in Figure 8. The encoder 100 also generally performs video decoding as part of encoding video data.In particular, the input of the decoder includes a video bitstream, which can be generated by video encoder 100. The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, and other coded information. The picture partition information indicates how the picture is partitioned. The decoder may therefore divide (235) the picture according to the decoded picture partitioning information. The transform coefficients are de-quantized (240), and inverse transformed (250) to decode the prediction residuals. Combining (255) the decoded prediction residuals and the predicted block, an image block is reconstructed. The predicted block can be obtained (270) from intra prediction (260) or motion-compensated prediction (i.e., inter prediction) (275). In-loop filters (265) are applied to the reconstructed image. The filtered image is stored at a reference picture buffer (280).The decoded picture can further go through post-decoding processing (285), for example, an inverse color transform (e.g. conversion from YcbCr 4:2:0 to RGB 4:4:4) or an inverse remapping performing the inverse of the remapping process performed in the preencoding processing (101). The post-decoding processing can use metadata derived in the pre-encoding processing and signaled in the bitstream.Figure 10 illustrates a block diagram of an example of a system in which various aspects and embodiments are implemented. System 1000 can be embodied as a device including the various components described below and is configured to perform one or more of the aspects described in this document. Examples of such devices include, but are notlimited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. Elements of system 1000, singly or in combination, can be embodied in a single integrated circuit (IC), multiple ICs, and / or discrete components. For example, in at least one embodiment, the processing and encoder / decoder elements of system 1000 are distributed across multiple ICs and / or discrete components. In various embodiments, the system 1000 is communicatively coupled to one or more other systems, or other electronic devices, via, for example, a communications bus or through dedicated input and / or output ports. In various embodiments, the system 1000 is configured to implement one or more of the aspects described in this document.The system 1000 includes at least one processor 1010 configured to execute instructions loaded therein for implementing, for example, the various aspects described in this document. Processor 1010 can include embedded memory, input output interface, and various other circuitries as known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device, and / or a non-volatile memory device). System 1000 includes a storage device 1040, which can include non-volatile memory and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and / or optical disk drive. The storage device 1040 can include an internal storage device, an attached storage device (including detachable and non-detachable storage devices), and / or a network accessible storage device, as non-limiting examples.System 1000 includes an encoder / decoder module 1030 configured, for example, to process data to provide an encoded video or decoded video, and the encoder / decoder module 1030 can include its own processor and memory. The encoder / decoder module 1030 represents module(s) that can be included in a device to perform the encoding and / or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Additionally, encoder / decoder module 1030 can be implemented as a separate element of system 1000 or can be incorporated within processor 1010 as a combination of hardware and software as known to those skilled in the art.Program code to be loaded onto processor 1010 or encoder / decoder 1030 to perform the various aspects described in this document can be stored in storage device 1040 and subsequently loaded onto memory 1020 for execution by processor 1010. In accordance with various embodiments, one or more of processor 1010, memory 1020, storage device 1040, and encoder / decoder module 1030 can store one or more of various items during theperformance of the processes described in this document. Such stored items can include, but are not limited to, the input video, the decoded video or portions of the decoded video, the bitstream, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.In some embodiments, memory inside of the processor 1010 and / or the encoder / decoder module 1030 is used to store instructions and to provide working memory for processing that is needed during encoding or decoding. In other embodiments, however, a memory external to the processing device (for example, the processing device can be either the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory can be the memory 1020 and / or the storage device 1040, for example, a dynamic volatile memory and / or a non-volatile flash memory. In several embodiments, an external non-volatile flash memory is used to store the operating system of, for example, a television. In at least one embodiment, a fast external dynamic volatile memory such as a RAM is used as working memory for video coding and decoding operations, such as for MPEG-2 (MPEG refers to the Moving Picture Experts Group, MPEG-2 is also referred to as ISO / IEC 13818, and 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC refers to High Efficiency Video Coding, also known as H.265 and MPEG- H Part 2), or WC (Versatile Video Coding, a new standard being developed by JVET, the Joint Video Experts Team).The input to the elements of system 1000 can be provided through various input devices as indicated in block 1130. Such input devices include, but are not limited to, (i) a radio frequency (RF) portion that receives an RF signal transmitted, for example, over the air by a broadcaster, (ii) a Component (COMP) input terminal (or a set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and / or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Other examples, not shown in Figure 10, include composite video.In various embodiments, the input devices of block 1130 have associated respective input processing elements as known in the art. For example, the RF portion can be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal, or band-limiting a signal to a band of frequencies), (ii) downconverting the selected signal, (iii) band-limiting again to a narrower band of frequencies to select (for example) a signal frequency band which can be referred to as a channel in certain embodiments, (iv) demodulating the downconverted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select the desired stream of data packets. The RF portion of various embodiments includes one or more elements to perform these functions, for example, frequency selectors, signal selectors, band-limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF portion can include a tuner thatperforms various of these functions, including, for example, downconverting the received signal to a lower frequency (for example, an intermediate frequency or a near-baseband frequency) or to baseband. In one set-top box embodiment, the RF portion and its associated input processing element receives an RF signal transmitted over a wired (for example, cable) medium, and performs frequency selection by filtering, downconverting, and filtering again to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and / or add other elements performing similar or different functions. Adding elements can include inserting elements in between existing elements, such as, for example, inserting amplifiers and an analog-to-digital converter. In various embodiments, the RF portion includes an antenna.Additionally, the USB and / or HDMI terminals can include respective interface processors for connecting system 1000 to other electronic devices across USB and / or HDMI connections. It is to be understood that various aspects of input processing, for example, Reed-Solomon error correction, can be implemented, for example, within a separate input processing IC or within processor 1010 as necessary. Similarly, aspects of USB or HDMI interface processing can be implemented within separate interface ICs or within processor 1010 as necessary. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, processor 1010, and encoder / decoder 1030 operating in combination with the memory and storage elements to process the datastream as necessary for presentation on an output device.Various elements of system 1000 can be provided within an integrated housing, Within the integrated housing, the various elements can be interconnected and transmit data therebetween using suitable connection arrangement, for example, an internal bus as known in the art, including the Inter-IC (I2C) bus, wiring, and printed circuit boards.The system 1000 includes communication interface 1050 that enables communication with other devices via communication channel 1060. The communication interface 1050 can include, but is not limited to, a transceiver configured to transmit and to receive data over communication channel 1060. The communication interface 1050 can include, but is not limited to, a modem or network card and the communication channel 1060 can be implemented, for example, within a wired and / or a wireless medium.Data is streamed, or otherwise provided, to the system 1000, in various embodiments, using a wireless network such as a Wi-Fi network, for example IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal of these embodiments is received over the communications channel 1060 and the communications interface 1050 which are adapted for Wi-Fi communications. The communications channel 1060 of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet for allowing streaming applications and other over-the-top communications. Other embodiments provide streamed data to the system 1000 using a set-top box that delivers the data over the HDMI connection of the input block 1130. Still other embodiments provide streamed data to the system 1000 using the RF connection of the input block 1130. As indicated above, various embodiments provide data in a non-streaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, for example a cellular network or a Bluetooth network.The system 1000 can provide an output signal to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 of various embodiments includes one or more of, for example, a touchscreen display, an organic lightemitting diode (OLED) display, a curved display, and / or a foldable display. The display 1100 can be for a television, a tablet, a laptop, a cell phone (mobile phone), or another device. The display 1100 can also be integrated with other components (for example, as in a smart phone), or separate (for example, an external monitor for a laptop). The other peripheral devices 1120 include, in various examples of embodiments, one or more of a stand-alone digital video disc (or digital versatile disc) (DVR, for both terms), a disk player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide a function based on the output of the system 1000. For example, a disk player performs the function of playing the output of the system 1000.In various embodiments, control signals are communicated between the system 1000 and the display 1100, speakers 1110, or other peripheral devices 1120 using signaling such as AV.Link, Consumer Electronics Control (CEC), or other communications protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to system 1000 via dedicated connections through respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to system 1000 using the communications channel 1060 via the communications interface 1050. The display 1100 and speakers 1110 can be integrated in a single unit with the other components of system 1000 in an electronic device such as, for example, a television. In various embodiments, the display interface 1070 includes a display driver, such as, for example, a timing controller (T Con) chip.The display 1100 and speaker 1110 can alternatively be separate from one or more of the other components, for example, if the RF portion of input 1130 is part of a separate set-top box. In various embodiments in which the display 1100 and speakers 1110 are external components, the output signal can be provided via dedicated output connections, including, for example, HDMI ports, USB ports, or COMP outputs.The embodiments can be carried out by computer software implemented by the processor 1010 or by hardware, or by a combination of hardware and software. As a nonlimiting example, the embodiments can be implemented by one or more integrated circuits.The memory 1020 can be of any type appropriate to the technical environment and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory, as non-limiting examples. The processor 1010 can be of any type appropriate to the technical environment, and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multicore architecture, as non-limiting examples.Various implementations involve decoding. “Decoding”, as used in this application, can encompass all or part of the processes performed, for example, on a received encoded sequence to produce a final output suitable for display. In various embodiments, such processes include one or more of the processes typically performed by a decoder, for example, entropy decoding, inverse quantization, inverse transformation, and differential decoding. In various embodiments, such processes also, or alternatively, include processes performed by a decoder of various implementations described in this application.As further examples, in one embodiment “decoding” refers only to entropy decoding, in another embodiment “decoding” refers only to differential decoding, and in another embodiment “decoding” refers to a combination of entropy decoding and differential decoding. Whether the phrase “decoding process” is intended to refer specifically to a subset of operations or generally to the broader decoding process will be clear based on the context of the specific descriptions and is believed to be well understood by those skilled in the art.Various implementations involve encoding. In an analogous way to the above discussion about “decoding”, “encoding” as used in this application can encompass all or part of the processes performed, for example, on an input video sequence to produce an encoded bitstream. In various embodiments, such processes include one or more of the processes typically performed by an encoder, for example, partitioning, differential encoding, transformation, quantization, and entropy encoding. In various embodiments, such processes also, or alternatively, include processes performed by an encoder of various implementations described in this application.As further examples, in one embodiment “encoding” refers only to entropy encoding, in another embodiment “encoding” refers only to differential encoding, and in another embodiment “encoding” refers to a combination of differential encoding and entropy encoding. Whether the phrase “encoding process” is intended to refer specifically to a subset of operations or generally to the broader encoding process will be clear based on the context of the specific descriptions and is believed to be well understood by those skilled in the art.Note that the syntax elements as used herein are descriptive terms. As such, they do not preclude the use of other syntax element names.When a figure is presented as a flow diagram, it should be understood that it alsoprovides a block diagram of a corresponding apparatus. Similarly, when a figure is presented as a block diagram, it should be understood that it also provides a flow diagram of a corresponding method / process.Various embodiments may refer to parametric models or rate distortion optimization. In particular, during the encoding process, the balance or trade-off between the rate and distortion is usually considered, often given the constraints of computational complexity. It can be measured through a Rate Distortion Optimization (RDO) metric, or through Least Mean Square (LMS), Mean of Absolute Errors (MAE), or other such measurements. Rate distortion optimization is usually formulated as minimizing a rate distortion function, which is a weighted sum of the rate and of the distortion. There are different approaches to solve the rate distortion optimization problem. For example, the approaches may be based on an extensive testing of all encoding options, including all considered modes or coding parameters values, with a complete evaluation of their coding cost and related distortion of the reconstructed signal after coding and decoding. Faster approaches may also be used, to save encoding complexity, in particular with computation of an approximated distortion based on the prediction or the prediction residual signal, not the reconstructed one. Mix of these two approaches can also be used, such as by using an approximated distortion for only some of the possible encoding options, and a complete distortion for other encoding options. Other approaches only evaluate a subset of the possible encoding options. More generally, many approaches employ any of a variety of techniques to perform the optimization, but the optimization is not necessarily a complete evaluation of both the coding cost and related distortion.The implementations and aspects described herein can be implemented in, for example, a method or a process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of implementation (for example, discussed only as a method), the implementation of features discussed can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, a processor, which refers to processing devices in general, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, computers, cell phones, portable / personal digital assistants (“PDAs”), and other devices that facilitate communication of information between end-users.Reference to “one embodiment” or “an embodiment” or “one implementation” or “an implementation”, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrase “in one embodiment” or “in an embodiment” or “in one implementation” or “in an implementation”, as well any other variations,appearing in various places throughout this application are not necessarily all referring to the same embodiment.Additionally, this application may refer to “determining” various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.Further, this application may refer to “accessing” various pieces of information. Accessing the information can include one or more of, for example, receiving the information, retrieving the information (for example, from memory), storing the information, moving the information, copying the information, calculating the information, determining the information, predicting the information, or estimating the information.Additionally, this application may refer to “receiving” various pieces of information. Receiving is, as with “accessing”, intended to be a broad term. Receiving the information can include one or more of, for example, accessing the information, or retrieving the information (for example, from memory). Further, “receiving” is typically involved, in one way or another, during operations such as, for example, storing the information, processing the information, transmitting the information, moving the information, copying the information, erasing the information, calculating the information, determining the information, predicting the information, or estimating the information.It is to be appreciated that the use of any of the following“and / or”, and “at least one of’, for example, in the cases of “A / B”, “A and / or B” and “at least one of A and B”, is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of “A, B, and / or C” and “at least one of A, B, and C”, such phrasing is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B) only, or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended, as is clear to one of ordinary skill in this and related arts, for as many items as are listed.Also, as used herein, the word “signal” refers to, among other things, indicating something to a corresponding decoder. For example, in certain embodiments the encoder signals a particular one of a plurality of transforms, coding modes or flags. In this way, in an embodiment the same transform, parameter, or mode is used at both the encoder side and the decoder side. Thus, for example, an encoder can transmit (explicit signaling) a particular parameter to the decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter as well as others, thensignaling can be used without transmitting (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual functions, a bit savings is realized in various embodiments. It is to be appreciated that signaling can be accomplished in a variety of ways. For example, one or more syntax elements, flags, and so forth are used to signal information to a corresponding decoder in various embodiments. While the preceding relates to the verb form of the word “signal”, the word “signal” can also be used herein as a noun.As will be evident to one of ordinary skill in the art, implementations can produce a variety of signals formatted to carry information that can be, for example, stored or transmitted. The information can include, for example, instructions for performing a method, or data produced by one of the described implementations. For example, a signal can be formatted to carry the bitstream of a described embodiment. Such a signal can be formatted, for example, as an electromagnetic wave (for example, using a radio frequency portion of spectrum) or as a baseband signal. The formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.The preceding sections describe a number of embodiments, across various claim categories and types. Features of these embodiments can be provided alone or in any combination. Further, embodiments can include one or more of the following features, devices, or aspects, alone or in any combination, across various claim categories and types:At least one embodiment comprises a DMVR candidate motion vector that is included in a list of MMVD candidate motion vectors has MMVD offsets applied that are not covered by DMVR using a modification of an MMVD offsets table.At least one embodiment comprises a modified MMVD offsets table that is used to provide offsets not covered by DMVR refinements.At least one other embodiment comprises MMVD offsets tables applied to DMVR candidate motion vectors may depend on picture resolution.At least one embodiment comprises a bitstream or signal that includes one or more of the described syntax elements, or variations thereof.At least one embodiment comprises a bitstream or signal that includes syntax conveying information generated according to any of the embodiments described.At least one embodiment comprises creating and / or transmitting and / or receiving and / or decoding according to any of the embodiments described.At least one embodiment comprises a method, process, apparatus, medium storing instructions, medium storing data, or signal according to any of the embodiments described.At least one embodiment comprises inserting in the signaling syntax elements that enable the decoder to determine decoding information in a manner corresponding to that used by an encoder.At least one embodiment comprises creating and / or transmitting and / or receiving and / or decoding a bitstream or signal that includes one or more of the described syntax elements, or variations thereof.At least one embodiment comprises a TV, set-top box, cell phone, tablet, or other electronic device that performs transform method(s) according to any of the embodiments described.At least one embodiment comprises a TV, set-top box, cell phone, tablet, or other electronic device that performs transform method(s) determination according to any of the embodiments described, and that displays (e.g., using a monitor, screen, or other type of display) a resulting image.At least one embodiment comprises a TV, set-top box, cell phone, tablet, or other electronic device that selects, bandlimits, or tunes (e.g., using a tuner) a channel to receive a signal including an encoded image, and performs transform method(s) according to any of the embodiments described.At least one embodiment comprises a TV, set-top box, cell phone, tablet, or other electronic device that receives (e.g., using an antenna) a signal over the air that includes an encoded image, and performs transform method(s).

Claims

CLAIMS1. A method, comprising: modifying at least one offsets table indicative of a refinement of a motion vector candidate for a video block; and, encoding the video block using the modified at least one offsets table.

2. An apparatus, comprising: a memory, and a processor, configured to: modify at least one offsets table indicative of a refinement of a motion vector candidate for a video block; and, encode the video block using the modified at least one offsets table.

3. A method, comprising: modifying at least one offsets table indicative of a refinement of a motion vector candidate for a video block; and, decoding the video block using the modified at least one offsets table.

4. An apparatus, comprising: a memory, and a processor, configured to: modify at least one offsets table indicative of a refinement of a motion vector candidate for a video block; and, decode the video block using the modified at least one offsets table.

5. The method of any one of Claims 1 or 3, or the apparatus of any one of Claims 2 or 4, wherein said motion vector candidate is being processed by decoder side motion vector refinement.

6. The method of any one of Claims 1 , 3 or 5, or the apparatus of any one of Claims 2, 4, or 5, wherein said motion vector candidate is substantially equal to one being processed by decoder side motion vector refinement.

7. The method of any one of Claims 1 , 3 or 5 through 6, or the apparatus of any one of Claims 2, or 4 through 6, wherein an offsets table modification comprises an offset not included in a motion vector candidate refinement processed by decoder side motion vector refinement.

8. The method of any one of Claims 1 , 3 or 5 through 7, or the apparatus of any one of Claims 2, or 4 through 7, wherein said motion vector candidate is being processed by decoder side motion vector refinement, and a motion vector offsets modification depends on resolution of a picture comprising said video block.

9. The method of any one of Claims 1 , 3 or 5 through 8, or the apparatus of any one of Claims 2, or 4 through 8, wherein a plurality of offset tables are used.

10. A device comprising: an apparatus according to Claim 4; and at least one of (i) an antenna configured to receive a signal, the signal including a video block, (ii) a band limiter configured to limit the received signal to a band of frequencies that includes the video block, and (iii) a display configured to display an output representative of the video block.

11. A non-transitory computer readable medium containing data content generated according to the method of any one of claims 1 , or 5 through 9, or by the apparatus of any one of claims 2, or 5 through 9, for playback using a processor.

12. A signal comprising video data generated according to the method of any one of claims 1 , or 5 through 9, or by the apparatus of any one of claims 2, or 5 through 9, for playback using a processor.

13. A computer program product comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method of any one of claims 1 , or 3 or 5 through 9.

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