Abnormality determination device for power conversion device and abnormality determination method for power conversion device

Abstract

This abnormality determination device (500) is for a power conversion device (600) having an inverter (16) and an LC filter (22) disposed downstream of the inverter (16) and comprises: a simulation calculation circuit (300) that simulates ideal characteristics of a reactor (L2) and a capacitor (C2) of the LC filter (22); and an abnormality detection circuit (400) that detects an abnormality in the power conversion device (600) on the basis of the calculation result of the simulation calculation circuit (300), the magnitude of the current output from the inverter (16), and the magnitude of the voltage across the capacitor (C2).

Description

Abnormality determination device for power conversion device and abnormality determination method for power conversion device

[0001] The present disclosure relates to an abnormality determination device for a power conversion device and an abnormality determination method for a power conversion device.

[0002] Devices for detecting abnormalities in power conversion devices have been known for some time. For example, a power conversion device described in Patent Document 1 includes a current detection unit that detects a current flowing through a braking transistor and a braking resistor in a braking circuit unit. An abnormality in the braking transistor and an abnormality in the braking resistor are detected based on the detection result of the current in the braking circuit unit detected by the current detection unit and a drive signal input to the braking transistor.

[0003] JP 2023-46042 A

[0004] However, conventional devices such as those described in Patent Document 1 cannot properly determine whether the characteristics of the detected voltage or current differ from the ideal characteristics.

[0005] Therefore, an object of the present disclosure is to provide an abnormality determination device for a detection power conversion device, and an abnormality determination method for a power conversion device, which can determine whether the detected characteristics differ from the ideal characteristics.

[0006] The abnormality determination device for a power conversion device disclosed herein is an abnormality determination device for a power conversion device having an inverter and an LC filter arranged downstream of the inverter, and includes a simulation calculation circuit that simulates the ideal characteristics of the reactor and capacitor of the LC filter, and an abnormality detection circuit that detects an abnormality in the power conversion device based on the calculation results of the simulation calculation circuit, the magnitude of the current output from the inverter, and the magnitude of the voltage across the capacitor.

[0007] The method for determining an abnormality in a power conversion device disclosed herein is a method for determining an abnormality in a power conversion device having an inverter and an LC filter arranged downstream of the inverter, and includes the steps of: a simulation calculation circuit simulating ideal characteristics of a reactor and a capacitor of the LC filter; and an abnormality detection circuit detecting an abnormality in the power conversion device based on the calculation results of the simulation calculation circuit, the magnitude of the current output from the inverter, and the magnitude of the voltage across the capacitor.

[0008] According to the present disclosure, it is possible to determine whether or not the detected characteristics differ from the ideal characteristics.

[0009] FIG. 1 is a diagram showing the configuration of a power conversion system according to a first embodiment. FIG. 2 is a diagram showing the configuration of an inverter 16. FIG. 3 is a diagram showing the configuration of a current abnormality detection circuit 412 according to the first embodiment. FIG. 4 is a diagram showing the configuration of a voltage abnormality detection circuit 414 according to the first embodiment. FIG. 5 is a diagram showing the configuration of a power conversion system according to a second embodiment. FIG. 6 is a flowchart showing the operation procedure of an inverter simulation calculation circuit 316. FIG. 7 is a diagram showing the configuration of a power conversion system according to a third embodiment. FIG. 8 is a diagram showing the configuration of a current abnormality detection circuit 412B according to the third embodiment. FIG. 9 is a diagram showing the configuration of a voltage abnormality detection circuit 414B according to the third embodiment.

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments will be described with reference to the accompanying drawings. First Embodiment Fig. 1 is a diagram showing the configuration of a power conversion system 100 according to a first embodiment.

[0011] The power conversion system 100 includes a power conversion device 600 , a control device 200 , and an abnormality determination device 500 .

[0012] The power conversion device 600 includes a first LC filter 12 , a converter 14 , an inverter 16 , a second LC filter 22 , and a bidirectional chopper 20 .

[0013] The first LC filter 12 removes harmonic components from the AC input current output from the commercial AC power supply 10. The first LC filter 12 includes a reactor L1 and a capacitor C1.

[0014] When AC power is supplied from the commercial AC power supply 10, the converter 14 converts the AC power into DC power and outputs it to the DC positive line PL. When AC power is no longer supplied from the commercial AC power supply 10, the operation of the converter 14 is stopped.

[0015] The inverter 16 converts DC power into AC power and supplies it to the load 50. FIG.

[0016] Capacitors C10 and C20 are connected in series between the positive line (DC line) PL and the negative line NL, but are omitted from the illustration of FIG.

[0017] Inverter 16 includes an upper arm including an insulated gate bipolar transistor (IGBT) Q1 and a diode D1, and a lower arm including an IGBT Q2 and a diode D2. The upper and lower arms are connected in series between a positive line PL and a negative line NL. IGBTs Q1 and Q2 constitute switching elements. Diodes D1 and D2 are connected in anti-parallel to IGBTs Q1 and Q2, respectively.

[0018] IGBTs Q1 and Q2 are controlled by drive signals X and Y, respectively. Drive signal Y is an inverted signal of drive signal X. IGBT Q1 turns on when drive signal X is set to "H" level, and turns off when drive signal X is set to "L" level. IGBT Q2 turns on when drive signal Y is set to "H" level, and turns off when drive signal Y is set to "L" level.

[0019] When the PWM (Pulse Width Modulation) signal is on, drive signal X is at the "H" level and drive signal Y is at the "L" level, so IGBT Q1 is on and IGBT Q2 is off. At this time, the output voltage of inverter 16 is VDC / 2.

[0020] When the PWM signal is off, drive signal X is at the "L" level and drive signal Y is at the "H" level, so IGBT Q1 is off and IGBT Q2 is on. At this time, the output voltage of inverter 16 is (-VDC) / 2.

[0021] When AC power is being supplied from the commercial AC power supply 10, the bidirectional chopper 20 stores DC power generated by the converter 14 in the battery 18, and when a power outage occurs and the supply of AC power from the commercial AC power supply 10 is stopped, the bidirectional chopper 20 supplies DC power from the battery 18 to the inverter 16 via the DC line PL.

[0022] When storing DC power in the battery 18, the bidirectional chopper 20 steps down the DC voltage of the DC line PL and supplies the voltage to the battery 18. When supplying DC power from the battery 18 to the inverter 16, the bidirectional chopper 20 steps up the voltage between the terminals of the battery 18 and outputs the voltage to the DC line PL. The DC line PL is connected to the input node of the inverter 16.

[0023] The second LC filter 22 removes harmonic components contained in the output of the inverter 16. The second LC filter 22 includes a reactor L2 and a capacitor C2.

[0024] A load 50 is connected to the rear stage of the second LC filter 22. A first end of the reactor L2 is connected to the output of the inverter 16, and a second end of the reactor L2 is connected to the load 50 via a node ND1.

[0025] The power conversion system further includes a current detector 24 , a current detector 26 , and a voltage detector 28 .

[0026] The current detector 24 is disposed between the output of the inverter 16 and the first end of the reactor L2. The current detector 24 detects the output current Ii of the inverter 16.

[0027] The current detector 26 is arranged between a node ND1 to which the capacitor C2 and the reactor L2 are connected, and the load 50. The current detector 26 detects a current IL flowing from the power conversion device 600 to the load 50.

[0028] The voltage detector 28 detects the output voltage of the power conversion device 600, that is, the voltage Vo across the capacitor C2.

[0029] The control device 200 includes a subtractor 202 , a voltage control unit 204 (AVR), a subtractor 206 , a current control unit 208 (ACR), a PWM circuit 210 , and a drive circuit 212 .

[0030] The subtractor 202 calculates a voltage command value Vo, which is a target value of the output voltage of the power conversion device 600. ＊ The voltage deviation Verr is calculated by subtracting the output voltage Vo of the power conversion device 600 detected by the voltage detector 28 from the voltage deviation Verr. The voltage deviation Verr is input to the voltage control unit 204.

[0031] The voltage control unit 204 determines a current command value Ii so as to make the voltage deviation Verr zero in accordance with the input voltage deviation Verr. ＊ The current command value Ii is calculated. ＊ is a command value of the current (output current of the inverter 16) to be passed through the reactor L2.

[0032] The subtractor 206 subtracts the current command value Ii calculated by the voltage control unit 204. ＊ The current deviation Ierr is calculated by subtracting the detection value Ii of the current (output current of the inverter 16) flowing through the reactor L2 detected by the current detector 24 from the current deviation Ierr. This current deviation Ierr is input to the current control unit 208.

[0033] The current control unit 208 calculates, in accordance with the input current deviation Ierr, the on-time ratio (duty) of the switching elements Q1 and Q2 so as to make the current deviation Ierr zero. This on-time ratio (duty) is input to the PWM circuit 210.

[0034] The PWM circuit 210 generates a PWM signal based on the on-time ratio (duty) calculated by the current control unit 208 .

[0035] The drive circuit 212 generates drive signals X and Y in accordance with the PWM signal and supplies them to the control terminals of the switching elements Q1 and Q2. The switching elements Q1 and Q2 are controlled to be turned on and off by the drive signals X and Y supplied to the control terminals.

[0036] The abnormality determination device 500 includes a simulation calculation circuit 300 and an abnormality detection circuit 400. The simulation calculation circuit 300 simulates ideal characteristics of the reactor L2 and capacitor C2 of the second LC filter 22 when the power conversion device 600 is in a normal state. The simulation calculation circuit 300 includes a reactor simulation calculation circuit 310, a subtractor 312, and a capacitor simulation calculation circuit 314. The simulation calculation circuit 300 can model and simulate the ideal state of the reactor L2 and capacitor C2 of the second LC filter 22 within the FPGA.

[0037] The reactor simulation calculation circuit 310 is a calculation circuit that simulates the ideal characteristics of the reactor L2. The reactor simulation calculation circuit 310 receives the output of the ACR 208, i.e., the signal for driving the inverter 16. The reactor simulation calculation circuit 310 outputs the current value Ic that is the calculation result.

[0038] The subtractor 312 subtracts the current IL detected by the current detector 26 from the output Ic of the reactor simulation calculation circuit 310 , and outputs the result of the subtraction to the capacitor simulation calculation circuit 314 .

[0039] The capacitor simulation calculation circuit 314 is a calculation circuit that receives the subtraction result of the subtractor 312 and simulates the ideal characteristics of the capacitor C2. The capacitor simulation calculation circuit 314 outputs a voltage value Vc that is the calculation result.

[0040] If the output voltage of the inverter 16 is Vi, the current flowing through the capacitor C2 is Io, the reactance component of the reactor L2 is L, the resistance component of the reactor L2 is R, and the capacitance component of the capacitor C2 is C, the second LC filter 12 can be modeled as follows:

[0041] Vi(s) = (L × s + R) × Ii(s) + Vo(s) (1) Vo(s) = Io(s) / (C × s) (2) Ii(s) = Io(s) + IL(s) (3) Based on equations (1) to (3), the transfer function GR1(s) of the reactor simulation calculation circuit 310 is expressed by the following equation.

[0042] GR1(s)=1 / (Ls+R) (4A) Based on the equations (1) to (3), the transfer function GC1(s) of the capacitor simulation calculation circuit 314 is expressed by the following equation.

[0043] GC1(s)=1 / Cs...(5A) The abnormality detection circuit 400 detects an abnormality in the power conversion device 600 based on the calculation results of the simulation calculation circuit 300, the magnitude of the output current Ii of the inverter 16 (the current flowing through the reactor L2), and the magnitude of the output voltage Vo of the power conversion device 600 (the voltage across the capacitor C2).

[0044] The abnormality detection circuit 400 includes a current abnormality detection circuit 412 and a voltage abnormality detection circuit 414 .

[0045] The current abnormality detection circuit 412 detects a current abnormality in the power conversion device 600 based on the difference between the current value Ic, which is the calculation result of the reactor simulation calculation circuit 310, and the magnitude of the output current Ii of the inverter 16. The voltage abnormality detection circuit 414 detects a voltage abnormality in the power conversion device 600 based on the difference between the voltage value Vc, which is the calculation result of the capacitor simulation calculation circuit 314, and the magnitude of the output voltage Vo of the power conversion device 600.

[0046] 3 is a diagram showing the configuration of the current abnormality detection circuit 412 of the first embodiment. The current abnormality detection circuit 412 includes a subtractor 62, an absolute value calculation circuit 63, a comparator 64, and an abnormality determiner 65.

[0047] The subtractor 62 subtracts the magnitude of the output current Ii of the inverter 16 detected by the current detector 24 from the current value Ic calculated by the reactor simulation calculation circuit 310, and outputs a difference value dI.

[0048] The absolute value calculation circuit 63 outputs the absolute value of the difference value dI output from the subtractor 62. The comparator 64 compares the absolute value of the difference value dI with a predetermined reference value.

[0049] The abnormality determiner 65 determines that a current abnormality has occurred in the power conversion device 600 when the state in which the absolute value of the difference value dI is greater than a predetermined reference value continues for a predetermined time or longer.

[0050] 4 is a diagram showing the configuration of the voltage abnormality detection circuit 414 of the first embodiment. The voltage abnormality detection circuit 414 includes a subtractor 72, an absolute value calculation circuit 73, a comparator 74, and an abnormality determiner 75.

[0051] The subtractor 72 subtracts the output voltage Vo of the power conversion device 600 detected by the voltage detector 28 from the voltage value Vc, which is the calculation result of the capacitor simulation calculation circuit 314, and outputs a difference value dV.

[0052] The absolute value calculation circuit 73 outputs the absolute value of the difference value dV output from the subtractor 72. The comparator 74 compares the absolute value of the difference value dV with a predetermined reference value.

[0053] The abnormality determiner 75 determines that a voltage abnormality has occurred in the power conversion device 600 when the state in which the absolute value of the difference value dV is greater than a predetermined reference value continues for a predetermined time or longer.

[0054] As described above, according to this embodiment, it is possible to detect an abnormality in a power conversion device by detecting a difference from ideal characteristics. According to this embodiment, it is possible to detect whether a difference has occurred for each switching frequency. According to this embodiment, the abnormality determination device 500 can be configured using an FPGA (Field Programmable Gate Array), thereby enabling high speed and large capacity. Since the L, R, and C to be controlled are designed in advance and therefore known, if the disturbance element IL can be correctly observed, it is possible to detect a difference between the actual system and the ideal model.

[0055] Second Embodiment FIG. 5 is a diagram showing the configuration of a power conversion system 100A according to a second embodiment.

[0056] The power conversion system 100A of the second embodiment differs from the power conversion system 100 of the first embodiment in that the power conversion system 100A includes an abnormality determination device 500A instead of the abnormality determination device 500.

[0057] The abnormality determination device 500A includes a simulation calculation circuit 300A instead of the simulation calculation circuit 300 of the first embodiment.

[0058] The simulation calculation circuit 300A differs from the simulation calculation circuit 300 in that an inverter simulation calculation circuit 316 is provided in the preceding stage of the reactor simulation calculation circuit 310.

[0059] The simulation calculation circuit 300A simulates ideal characteristics of the inverter 16, the reactor L2 of the second LC filter 22, and the capacitor C2.

[0060] The inverter simulation calculation circuit 316 receives the PWM signal from the PWM circuit 310 and outputs a voltage value Vx to the reactor simulation calculation circuit 310 .

[0061] 6 is a flowchart showing the operation procedure of the inverter simulation calculation circuit 316. In step S301, if the PWM signal is on (high level), the process proceeds to step S302, and if the PWM signal is off (low level), the process proceeds to step S303.

[0062] In step S302, the inverter simulation calculation circuit 316 outputs a voltage value Vx (=VDD / 2).

[0063] In step S303, the inverter simulation calculation circuit 316 outputs the voltage value Vx (=-VDD / 2).

[0064] The reactor simulation calculation circuit 310 receives the voltage value Vx, which is the calculation result of the inverter simulation calculation circuit 316. The reactor simulation calculation circuit 310 outputs the current value Ic, which is the calculation result, in the same manner as in the first embodiment.

[0065] The other components and their operations are similar to those of the first embodiment, and therefore description thereof will not be repeated. (Third Embodiment) Fig. 7 is a diagram showing the configuration of a power conversion system 100B according to a third embodiment.

[0066] The power conversion system 100B of the third embodiment differs from the power conversion system 100 of the first embodiment in that the power conversion system 100B includes an abnormality determination device 500B instead of the abnormality determination device 500.

[0067] The abnormality determination device 500B includes a simulation calculation circuit 300B instead of the simulation calculation circuit 300 of the first embodiment, and an abnormality detection circuit 400B instead of the abnormality detection circuit 400 of the first embodiment.

[0068] The simulation calculation circuit 300B includes a subtractor 318B, a reactor simulation calculation circuit 310B, an adder 312B, and a capacitor simulation calculation circuit 314B.

[0069] The capacitor simulation calculation circuit 314B is a circuit that simulates the ideal characteristics of the capacitor C2. The capacitor simulation calculation circuit 314B receives the output voltage Vo of the power conversion device 600 detected by the voltage detector 28. The transfer function GC2(s) of the capacitor simulation calculation circuit 314B is expressed by the following equation: C is the capacitance component of the capacitor C2.

[0070] GC2(s)=Cs (5B) The adder 312B adds the calculation result of the capacitor simulation calculation circuit 314B and the current IL detected by the current detector 26, and outputs the current value Id, which is the addition result, to the reactor simulation calculation circuit 310B.

[0071] The reactor simulation calculation circuit 310B is a calculation circuit that simulates the ideal characteristics of the reactor L2. The reactor simulation calculation circuit 310B receives the current value Id, which is the sum. The transfer function GR2(s) of the reactor simulation calculation circuit 310B is expressed by the following equation: L is the reactance component of the reactor L2. R is the resistance component of the reactor L2.

[0072] GR2(s)=(Ls+R) (4B) The delay calculation circuit 330B delays the signal representing the output voltage Vo of the power conversion device 600 detected by the voltage detector 28 by one discrete time.

[0073] The subtractor 318B subtracts the calculation result of the reactor simulation calculation circuit 310B from the calculation result of the delay calculation circuit 330B, and outputs the subtracted value Vd to the voltage abnormality detection circuit 414B.

[0074] The abnormality detection circuit 400B includes a current abnormality detection circuit 412 similar to that of the first embodiment, and includes a voltage abnormality detection circuit 414B instead of the voltage abnormality detection circuit 414 of the first embodiment.

[0075] The current abnormality detection circuit 412 detects a current abnormality in the power conversion device 600 based on the difference between the current value Id, which is the sum of the adder 312 B, and the magnitude of the output current Ii of the inverter 16 .

[0076] 8 is a diagram showing the configuration of a current abnormality detection circuit 412B according to the third embodiment. The current abnormality detection circuit 412B includes a subtractor 62B, an absolute value calculation circuit 63, a comparator 64, and an abnormality determiner 65.

[0077] The subtractor 62 subtracts the magnitude of the output current Ii of the inverter 16 detected by the current detector 24 from the current value Id resulting from the addition by the adder 312B, and outputs a difference value dI2.

[0078] The absolute value calculation circuit 63 outputs the absolute value of the difference value dI2 output from the subtractor 62. The comparator 64 compares the absolute value of the difference value dI2 with a predetermined reference value.

[0079] The abnormality determiner 65 determines that a current abnormality has occurred in the power conversion device 600 when the state in which the absolute value of the difference value dI2 is greater than a predetermined reference value continues for a predetermined time or longer.

[0080] The voltage abnormality detection circuit 414B compares the voltage value Vd, which is the result of the subtraction by the subtractor 318B, with the voltage command value Vo of the power conversion device 600. ＊ Based on the difference between the voltages, a voltage abnormality in the power conversion device 600 is detected.

[0081] 9 is a diagram showing the configuration of a voltage abnormality detection circuit 414B according to the third embodiment. The voltage abnormality detection circuit 414B includes a subtractor 72B, an absolute value calculation circuit 73, a comparator 74, and an abnormality determiner 75 similar to those in the first embodiment.

[0082] The subtractor 72B subtracts the voltage command value Vo ＊ The subtractor 318B subtracts the voltage value Vd output from the subtractor 318B from the voltage Vd and outputs a difference value dV2.

[0083] The absolute value calculation circuit 73 outputs the absolute value of the difference value dV2 output from the subtractor 72. The comparator 74 compares the absolute value of the difference value dV2 with a predetermined reference value.

[0084] The abnormality determiner 75 determines that a voltage abnormality has occurred in the power conversion device 600 when the state in which the absolute value of the difference value dV2 is greater than a predetermined reference value continues for a predetermined time or longer.

[0085] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0086] 10 Commercial AC power supply, 12, 22 LC filter, 14 Converter, 16 Inverter, 18 Battery, 20 Bidirectional chopper, 24, 26 Current detector, 28 Voltage detector, 50 Load, 62, 62B, 72, 72B, 202, 206, 312, 318B Subtractor, 63, 73 Absolute value calculation circuit, 64, 74 Comparator, 65, 75 Abnormality determiner, 100, 100A, 100B Power conversion system, 200 Control device, 204 Voltage control unit, 208 Current control unit, 212 Drive circuit, 300, 300A, 300B Simulation calculation circuit, 310, 310B Reactor simulation calculation circuit, 312B Adder, 314, 314B Capacitor simulation calculation circuit, 316 Inverter simulation calculation circuit, 330B Delay calculation circuit, 400, 400B abnormality detection circuit, 412, 412B current abnormality detection circuit, 414, 414B voltage abnormality detection circuit, 500, 500A, 500B abnormality determination device, 600 power conversion device, C1, C2, C10 capacitor, D1, D2 diode, NL negative electrode line, PL positive electrode line, Q1, Q2 switching element.

Claims

1. An abnormality determination device for a power conversion device having an inverter and an LC filter arranged downstream of the inverter, comprising: a simulation arithmetic circuit that simulates ideal characteristics of a reactor and a capacitor of the LC filter; and an abnormality detection circuit that detects an abnormality of the power conversion device based on an arithmetic result of the simulation arithmetic circuit, a magnitude of a current output from the inverter, and a magnitude of a voltage across the capacitor.

2. The abnormality determination device for a power conversion device according to claim 1, wherein the simulation arithmetic circuit further simulates ideal characteristics of the inverter.

3. The simulation arithmetic circuit receives a signal for driving the inverter, and includes a reactor simulation arithmetic circuit that simulates ideal characteristics of the reactor of the LC filter, and a capacitor simulation arithmetic circuit that receives an arithmetic result of the reactor simulation arithmetic circuit and simulates ideal characteristics of the capacitor of the LC filter. The abnormality detection circuit includes a current abnormality detection circuit that detects a current abnormality of the power conversion device based on a difference between an arithmetic result of the reactor simulation arithmetic circuit and a magnitude of a flowing current output from the inverter, and a voltage abnormality detection circuit that detects a voltage abnormality of the power conversion device based on a difference between an arithmetic result of the capacitor simulation arithmetic circuit and a magnitude of a voltage across the capacitor. The abnormality determination device for a power conversion device according to claim 1.

4. The simulation arithmetic circuit receives a signal for driving the inverter, and includes an inverter simulation arithmetic circuit that simulates ideal characteristics of the inverter, a reactor simulation arithmetic circuit that receives an arithmetic result of the inverter simulation arithmetic circuit and simulates ideal characteristics of the reactor of the LC filter, and a capacitor simulation arithmetic circuit that receives an arithmetic result of the reactor simulation arithmetic circuit and simulates ideal characteristics of the capacitor of the LC filter. The abnormality detection circuit includes a current abnormality detection circuit that detects a current abnormality of the power conversion device based on a difference between an arithmetic result of the reactor simulation arithmetic circuit and a magnitude of a current output from the inverter, and a voltage abnormality detection circuit that detects a voltage abnormality of the power conversion device based on a difference between an arithmetic result of the capacitor simulation arithmetic circuit and a magnitude of a voltage across the capacitor. The abnormality determination device for a power conversion device according to claim 2.

5. The analog arithmetic circuit further includes a subtractor that subtracts the magnitude of the current flowing from the power conversion device to the load from the arithmetic result of the reactor analog arithmetic circuit and outputs the subtraction result to the capacitor analog arithmetic circuit. The abnormality determination device for a power conversion device according to any one of claims 3 to 4.

6. The transfer function GR1(s) of the reactor analog arithmetic circuit is represented by the following formula, where L represents the reactance component of the reactor and R represents the resistance component of the reactor: GR1(s) = 1 / (Ls + R)...(1). The abnormality determination device for a power conversion device according to any one of claims 3 to 5.

7. The transfer function of the capacitor analog arithmetic circuit is represented by the following formula, where C represents the capacitance component of the capacitor: GC1(s) = 1 / Cs...(2). The abnormality determination device for a power conversion device according to any one of claims 3 to 6.

8. The analog arithmetic circuit includes a capacitor analog arithmetic circuit that receives the voltage across the capacitor of the LC filter and simulates the ideal characteristics of the capacitor, and a reactor analog arithmetic circuit that receives the arithmetic result of the capacitor analog arithmetic circuit and simulates the ideal characteristics of the reactor of the LC filter. The abnormality detection circuit includes a current abnormality detection circuit that detects a current abnormality of the power conversion device based on the difference between the arithmetic result of the capacitor analog arithmetic circuit and the magnitude of the current output from the inverter, and a voltage abnormality detection circuit that detects a voltage abnormality of the power conversion device based on the arithmetic result of the reactor analog arithmetic circuit and the voltage command value of the power conversion device. The abnormality determination device for a power conversion device according to claim 1.

9. The analog arithmetic circuit further includes an adder that adds the arithmetic result of the capacitor analog arithmetic circuit and the magnitude of the current flowing from the power conversion device to the load and outputs the addition result to the reactor analog arithmetic circuit. The abnormality determination device for a power conversion device according to claim 8.

10. The simulation calculation circuit further includes a delay calculation circuit that delays a signal representing the magnitude of the voltage across the capacitor, and a subtractor that subtracts the calculation result of the reactor simulation calculation circuit from the calculation result of the delay calculation circuit and outputs the result to the voltage abnormality detection circuit. The voltage abnormality detection circuit detects a voltage abnormality of the power conversion device based on the difference between the voltage command value of the power conversion device and the calculation result of the subtractor. The abnormality determination device for a power conversion device according to claim 9.

11. The transfer function of the capacitor simulation calculation circuit is represented by the following formula, where C represents the capacitance component of the capacitor: GC2(s) = Cs... (3) The abnormality determination device for a power conversion device according to any one of claims 8 to 10.

12. The transfer function of the reactor simulation calculation circuit is represented by the following formula, where L represents the reactance component of the reactor and R represents the resistance component of the reactor: GR2(s) = (Ls + R)... (4) The abnormality determination device for a power conversion device according to any one of claims 8 to 11.

13. An abnormality determination method for a power conversion device having an inverter and an LC filter arranged at the subsequent stage of the inverter, the method comprising: a step in which a simulation calculation circuit simulates the ideal characteristics of the reactor and capacitor of the LC filter; and a step in which an abnormality detection circuit detects an abnormality of the power conversion device based on the calculation result of the simulation calculation circuit, the magnitude of the current output from the inverter, and the magnitude of the voltage across the capacitor. The abnormality determination method for a power conversion device.

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