Input device

Abstract

One embodiment of the present invention is an input device using upper and lower electrode layers with no etching selectivity and comprising: a mesh-shaped lower electrode layer provided on a base material; an insulating layer provided to cover the lower electrode layer; a mesh-shaped upper electrode layer provided on the insulating layer in a direction intersecting the lower electrode layer; a first lower lead-out wiring layer provided between the base material and the insulating layer and connected at one end thereof to the lower electrode layer; a second lower lead-out wiring layer provided between the base material and the insulating layer and formed at the same tier as, but separately from, the first lower lead-out wiring layer; a first external connection terminal layer connected to the other end of the first lower lead-out wiring layer; and a second external connection terminal layer connected to the other end of the second lower lead-out wiring layer. The upper electrode layer is connected at one end of the second lower lead-out wiring layer so as to cover a first exposed part exposed through a through-hole from the insulating layer, thus making it possible to effectively utilize wiring of a material common to the electrodes.

Description

Input Devices

[0001] The present invention relates to an input device, and more particularly to an input device that functions as a touch panel.

[0002] Patent Document 1 discloses a touch panel having a good appearance, which is characterized by comprising a transparent substrate, a first detection electrode pattern provided on a first main surface of the transparent substrate, a transparent insulating layer provided on the first main surface so as to cover the first detection electrode pattern, and a second detection electrode pattern provided on the transparent insulating layer.

[0003] Patent Document 2 discloses a touch-sensitive device with an improved appearance, which includes a cover plate, at least one touch sensing electrode disposed on the cover plate and extending in a specific direction, a masking layer disposed around the periphery of the cover plate and covering a portion of the touch sensing electrode, at least one trace disposed on the masking layer on the opposite side of the touch sensing electrode, and a plurality of electrically-conductive interconnects that penetrate the masking layer, are spaced apart from one another, and each interconnects with the touch sensing electrode and the trace.

[0004] JP 2014-071865 A JP 2016-091544 A

[0005] Some of these input devices use metal mesh as the electrodes in order to reduce the resistance of the electrodes and improve their light transmittance and bending resistance. When metal mesh is used as the electrodes, the wiring provided in the non-visible area (also called the frame area) around the visible area has a layer structure consisting of a first layer and a second layer, similar to the layer structure of the metal mesh wiring in the visible area, and extends to the crimping area of ​​the terminal for external connection.

[0006] If the wiring in the layered structure extending from the non-visible region to the crimped region is made of the same metal material, there is no etching selectivity between the first-layer wiring and the second-layer wiring, so a means is needed to prevent the first-layer wiring from being lost during etching when forming the second-layer wiring. Furthermore, in a bendable input device, if the bending center is located in the extension portion of the layered wiring in the non-visible region, for example, when the second layer side is bent inward, the bending resistance of the second-layer wiring, which is farther away, will be lower than that of the first layer, which is closer to the substrate. For this reason, when using metal mesh electrodes, measures are desired for the wiring, such as protecting the first-layer wiring in the crimped region for wiring made of metal material extending into the non-visible region and improving the bending resistance of the second-layer wiring.

[0007] An object of the present invention is to provide an input device that uses upper and lower electrode layers with no etching selectivity, and that can effectively utilize wiring made of a material that is common to the electrodes.

[0008] One aspect of the present invention is an input device comprising: a substrate; a mesh-shaped lower electrode layer provided on the substrate; an insulating layer provided to cover the lower electrode layer; a mesh-shaped upper electrode layer provided on the insulating layer and in a direction intersecting the lower electrode layer; a first lower interconnection layer provided between the substrate and the insulating layer and having one end connected to the lower electrode layer; a second lower interconnection layer provided between the substrate and the insulating layer and formed separately at the same level as the first lower interconnection layer; a first external connection terminal layer connected to the other end of the first lower interconnection layer; and a second external connection terminal layer connected to the other end of the second lower interconnection layer. In this input device, the insulating layer has a through-hole at a portion overlapping one end of the second lower interconnection layer, the upper electrode layer is connected to one end of the second lower interconnection layer by covering a first exposed portion exposed from the insulating layer through the through-hole, the second external connection terminal layer is connected to the other end of the second lower interconnection layer by covering a second exposed portion exposed from the insulating layer, and the first external connection terminal layer is connected to the other end of the first lower interconnection layer by covering a third exposed portion exposed from the insulating layer. The upper electrode layer, the second lower interconnection layer, the second external connection terminal layer, the lower electrode layer, the first lower interconnection layer, and the first external connection terminal layer are formed of the same material, the first external connection terminal layer and the second external connection terminal layer are formed separately from the upper electrode layer at the same level, and the first external connection terminal layer and the second external connection terminal layer are formed at the same level.

[0009] This configuration allows for the application of photolithography processes to improve pattern accuracy in input devices using mesh electrodes, even when the upper and lower wiring layers are formed from the same material that cannot be selectively etched. It also prevents short circuits in the non-visible area (frame area) and stabilizes crimp connections of cables by uniforming the height of the external connection terminals connected to the upper and lower electrodes. Furthermore, in bendable input devices, it prevents wiring breakage due to bending and suppresses increases in resistance.

[0010] In the input device, the second exposed portion may be a second extending portion extending from an outer edge of the insulating layer, and the third exposed portion may be a third extending portion extending from the outer edge of the insulating layer, the second external connection terminal layer may be connected to cover the second extending portion, and the first external connection terminal layer may be connected to cover the third extending portion. This results in a two-layer laminate structure between the second lower outgoing wiring layer and the second external connection terminal layer, and also a two-layer laminate structure between the first lower outgoing wiring layer and the first external connection terminal layer, which increases mechanical strength. Therefore, deformation itself during crimping of the cable via the anisotropic conductive film is unlikely to occur, preventing terminal cracking due to deformation.

[0011] In the input device, the upper electrode layer may have a mesh-like main pattern formed of thin lines and a connection pad portion continuous with an outer edge of the main pattern, and the connection pad portion may be connected to a first exposed portion exposed from the insulating layer at one end of the second lower interconnect layer via a through hole formed in the insulating layer, thereby reducing the connection resistance between the upper electrode layer and the second lower interconnect layer and achieving a narrower frame.

[0012] In the input device, a plurality of upper electrode layers are arranged in parallel, a first upper interconnection layer formed at the same level as one of the plurality of upper electrode layers and extending therefrom, and a second lower interconnection layer connected to another of the plurality of upper electrode layers via a through hole in the insulating layer, are preferably overlapped in plan view, and both the first upper interconnection layer and the second lower interconnection layer are preferably detection interconnection layers or drive interconnection layers, thereby preventing noise caused by overlapping between the drive interconnection layer and the detection interconnection layer and achieving a narrower frame.

[0013] In the input device, the first upper interconnection layer connected to the upper electrode layer is preferably disposed away from the central bending axis of the substrate, thereby preventing resistance changes and disconnections in the upper interconnection layer in an input device that can be bent about the central bending axis.

[0014] According to the present invention, it is possible to provide an input device that uses upper and lower electrode layers with no etching selectivity, and that can effectively utilize wiring made of a material that is common to the electrodes.

[0015] 1 is a schematic plan view illustrating an input device according to the first embodiment; FIG. 2 is a schematic cross-sectional view illustrating a viewing area of ​​the input device according to the first embodiment; FIG. 3 is a schematic plan view illustrating a connection portion between an upper electrode layer and a second lower lead-out wiring; FIG. 4 is a schematic cross-sectional view illustrating a connection portion between an upper electrode layer and a second lower lead-out wiring; FIG. 5 is a schematic cross-sectional view illustrating an external connection terminal layer; FIG. 6 is a schematic plan view illustrating one wire in the external connection terminal layer; FIG. 7 is a schematic cross-sectional view illustrating one wire in the external connection terminal layer; FIG. 8 is a schematic cross-sectional view illustrating one wire in the external connection terminal layer; FIG. 9 is a schematic plan view illustrating one wire in another external connection terminal layer (part 1); FIG. 10 is a schematic cross-sectional view illustrating one wire in the other external connection terminal layer (part 1); FIG. 11 is a schematic plan view illustrating one wire in the other external connection terminal layer (part 2); FIG. 12 is a schematic cross-sectional view illustrating one wire in the other external connection terminal layer (part 2); FIG. 13 is a schematic cross-sectional view illustrating another external connection terminal layer (part 3); FIG. 14 is a schematic plan view illustrating one wire in the other external connection terminal layer (part 3). 1 is a schematic cross-sectional view illustrating one wiring of another external connection terminal layer (part 3); a schematic cross-sectional view illustrating one wiring of another external connection terminal layer (part 3); a schematic cross-sectional view illustrating another external connection terminal layer (part 4); a schematic plan view illustrating another external connection terminal layer (part 4); a schematic plan view illustrating one wiring of another external connection terminal layer (part 4); a schematic cross-sectional view illustrating one wiring of another external connection terminal layer (part 4); a schematic plan view illustrating a connection portion between an upper electrode layer and a second lower lead-out wiring; a schematic cross-sectional view illustrating a connection portion between an upper electrode layer and a second lower lead-out wiring; a schematic cross-sectional view of a non-visual area of ​​an input device according to a second embodiment; a schematic plan view illustrating an external connection terminal layer of an input device according to a second embodiment; a schematic cross-sectional view illustrating an external connection terminal layer of an input device according to a second embodiment;

[0016] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, identical components will be designated by the same reference numerals, and descriptions of components that have already been described will be omitted where appropriate. For convenience, in the following description, the X-axis direction will be defined as the left-right direction, the Y-axis direction as the front-rear direction, and the Z-axis direction as the up-down direction. The positive X-axis direction will be defined as the rightward direction, the positive Y-axis direction as the forward direction, and the positive Z-axis direction as the upward direction. A schematic plan view refers to an XY plane, and a schematic cross-sectional view refers to an X-Z cross section or a Y-Z cross section perpendicular to the schematic plan view. The Z-axis direction (vertical direction) is also referred to as the stacking direction, and the appearance or projection as viewed in the Z-axis direction (vertical direction, stacking direction) is also referred to as a plan view. These terms refer to relative positional relationships within a device and do not limit the installation or operation direction of the device. Devices with equivalent relative positional relationships within a device, even if they have different installation or operation directions, are all within the scope of the present invention.

[0017] First Embodiment Fig. 1 is a schematic plan view illustrating an input device according to a first embodiment. Fig. 2 is a schematic cross-sectional view illustrating a viewing area of ​​the input device according to the first embodiment. Fig. 2 shows a schematic cross-sectional view of part A shown in Fig. 1. For ease of explanation, Fig. 1 omits the cover coat 50 shown in Fig. 2. An input device 1 according to this embodiment is applied to, for example, a touch panel, and detects a position selected (touched, etc.) with a finger, a stylus, or the like.

[0018] The input device 1 includes a substrate 10, a lower electrode layer 20 provided on the substrate 10, an insulating layer 30 provided to cover the lower electrode layer 20, and an upper electrode layer 40 provided on the insulating layer 30 in a direction intersecting the lower electrode layer 20. The input device 1 has a visible region S1 that is light transmissive and a non-visible region (frame region) S2 provided around the visible region S1.

[0019] The lower electrode layer 20 has a lower main pattern 21 that is mainly arranged in the visible region S1, and lower connection pad portions 22 that are continuous with the outer edge of the lower main pattern 21 in the non-visible region (frame region) S2. The lower main pattern 21 of the lower electrode layer 20 is in a mesh shape (metal mesh) formed of thin wires 211 of a metal material (for example, copper, silver, an alloy, or a composite material containing a metal).

[0020] The upper electrode layer 40 has an upper main pattern 41 disposed mainly in the visible region S1 and upper connection pad portions 42 continuous with the outer edge of the upper main pattern 41 in the non-visible region (frame region) S2. The upper main pattern 41 of the upper electrode layer 40 is a mesh (metal mesh) formed of thin wires 411 made of a metal material (e.g., copper, silver, an alloy, or a composite material containing a metal). A cover coat 50 is formed on the upper electrode layer 40.

[0021] The lower electrode layer 20 is formed on the substrate 10, for example, in the Y direction from the visible region S1 to the non-visible region S2, and a plurality of lower main patterns 21 of the lower electrode layer 20 are arranged side by side in the X direction. Each lower main pattern 21 of the lower electrode layer 20 is electrically connected to wiring (first lower lead-out wiring layer 61) provided in the non-visible region S2 via a lower connection pad portion 22.

[0022] The upper electrode layer 40 is formed on the substrate 10, for example, in the X direction from the visible region S1 to the non-visible region S2, and a plurality of upper electrode layers 40 are arranged side by side in the Y direction. Each upper main pattern 41 of the upper electrode layer 40 is electrically connected to wiring (second lower lead-out wiring layer 62) provided in the non-visible region S2 via upper connection pad portions 42.

[0023] An external connection area S3 for connecting a cable for external connection, such as a flexible cable, is provided at an end of the substrate 10 in the non-visible area S2. Each upper electrode layer 40 and each lower electrode layer 20 is electrically connected to each connection terminal in the external connection area S3 via wiring (second lower outgoing wiring layer 62, first lower outgoing wiring layer 61) provided in the non-visible area S2. When the input device 1 is a capacitive touch panel, one of each upper electrode layer 40 and each lower electrode layer 20 serves as a drive electrode, and the other serves as a detection electrode.

[0024] The input device 1 further includes a first lower outgoing wiring layer 61 provided between the substrate 10 and the insulating layer 30, and a second lower outgoing wiring layer 62 provided between the substrate 10 and the insulating layer 30. The first lower outgoing wiring layer 61 and the second lower outgoing wiring layer 62 are arranged in the non-visible area S2. One end of the first lower outgoing wiring layer 61 is connected to the lower electrode layer 20. The second lower outgoing wiring layer 62 is formed at the same level as the first lower outgoing wiring layer 61 but separated from the first lower outgoing wiring layer 61. The first lower outgoing wiring layer 61 and the second lower outgoing wiring layer 62 are formed at the same level as the lower electrode layer 20. That is, the first lower outgoing wiring layer 61 and the second lower outgoing wiring layer 62 are formed at the same level on the substrate 10 but separated from each other.

[0025] FIG. 3 is a schematic plan view illustrating a connection portion between an upper electrode layer and a second lower escape wiring. FIG. 3 shows a schematic plan view of portion B shown in FIG. 1. FIG. 4 is a schematic cross-sectional view illustrating a connection portion between an upper electrode layer and a second lower escape wiring. FIG. 4 shows a schematic cross-sectional view along line A1-A1 in FIG. 3. For ease of explanation, the cover coat 50 shown in FIG. 4 is omitted from FIG. 3. Furthermore, hatched portions in the schematic plan views from FIG. 3 onward indicate regions of each exposed portion (first exposed portion 621, second exposed portion 622, third exposed portion 623, and fourth exposed portion 624) described below when viewed in plan.

[0026] The upper electrode layer 40 is connected to a first exposed portion 621 exposed from the insulating layer 30 at one end of the second lower wiring layer 62 via a through hole 30h formed in the insulating layer 30. The through hole 30h is located at a position overlapping an upper connection pad portion 42 that is continuous with the outer edge of the upper main pattern 41 in the upper electrode layer 40, as viewed perpendicular to the plane of the substrate 10. The second lower wiring layer 62 is electrically connected to the upper electrode layer 40 at one end and is provided on the same layer as the first lower wiring layer 61, extending through the non-visible region S2 to the external connection region S3. This connection reduces the connection resistance between the upper electrode layer 40 and the second lower wiring layer 62. Furthermore, the wiring extending through the non-visible region S2 is a single layer, eliminating the need for alignment of upper and lower wiring, which is required for multilayer wiring. This allows wiring to be formed using a high-precision photolithography process, thereby enabling a narrower frame.

[0027] FIG. 5 is a schematic cross-sectional view illustrating an external connection terminal layer. FIG. 5 shows a schematic cross-sectional view taken along line B1-B1 in FIG. 1. FIG. 6A is a schematic plan view illustrating one wiring in the external connection terminal layer. For ease of explanation, the cover coat 50 is omitted from FIG. 6A. FIGS. 6B and 6C are schematic cross-sectional views illustrating one wiring in the external connection terminal layer. FIG. 6B shows a cross-sectional view taken along line C1-C1 in FIG. 6A, and FIG. 6C shows a cross-sectional view taken along line D1-D1 in FIG. 6A.

[0028] The other end of the second lower interconnection layer 62, which is provided extending to the external connection region S3, has a second exposed portion 622 exposed from the insulating layer 30. A second external connection terminal layer 72 is formed on this second exposed portion 622. The other end of the first lower interconnection layer 61 has a third exposed portion 623 exposed from the insulating layer 30. A first external connection terminal layer 71 is formed on this third exposed portion 623. The third exposed portion 623 has the same structure as the second exposed portion 622, and the first external connection terminal layer 71 has the same structure as the second external connection terminal layer 72.

[0029] Here, the first external connection terminal layer 71 and the second external connection terminal layer 72 are formed separately from the upper electrode layer 40, but are provided in the same layer as the upper electrode layer 40. The second external connection terminal layer 72 covers and is connected to the second exposed portion 622, and the first external connection terminal layer 71 covers and is connected to the third exposed portion 623.

[0030] In the input device 1 having such a configuration, the upper electrode layer 40, the second lower lead-out wiring layer 62, the second external connection terminal layer 72, the lower electrode layer 20, the first lower lead-out wiring layer 61, and the first external connection terminal layer 71 are formed of the same material. As a result, the second exposed portion 622 is formed of the same material as the second external connection terminal layer 72, and the third exposed portion 623 is formed of the same material as the first external connection terminal layer 71. Here, the term "same material" includes materials that have substantially the same etching characteristics (for example, an etching rate difference of about 40 to 50%) even if their compositions are different.

[0031] In this way, in the external connection area S3 of the input device 1, the stacked structure of the second exposed portion 622 and the second external connection terminal layer 72 is the same as the stacked structure of the third exposed portion 623 and the first external connection terminal layer 71, so that the second exposed portion 622 can be protected by the second external connection terminal layer 72 and the third exposed portion 623 by the first external connection terminal layer 71.Even if the upper and lower wiring layers are formed from the same material that cannot be selectively etched, neither will be lost, and a photolithography process can be applied to improve pattern accuracy.

[0032] Furthermore, the wiring extending to the external connection region S3 in the non-visible region S2 can be limited to wiring at the same level as the lower electrode layer 20 (the first lower outgoing wiring layer 61 and the second lower outgoing wiring layer 62). Even when the non-visible region S2 is narrowed, i.e., a so-called narrow frame is achieved, the improved pattern precision makes it possible to form the desired wiring pattern even when the wiring spacing is narrowed, thereby preventing short circuits between the wiring.

[0033] Furthermore, in the external connection region S3, the external connection terminals (second external connection terminal layer 72, first external connection terminal layer 71) connected to the upper electrode layer 40 and the lower electrode layer 20, respectively, can be made to have the same structure, thereby making the height uniform, thereby improving stability when crimping and connecting cables such as flexible cables.

[0034] Furthermore, by limiting the wiring extending in the non-visible region S2 to wiring at the same level as the lower electrode layer 20 (the first lower outgoing wiring layer 61 and the second lower outgoing wiring layer 62), the wiring can be concentrated near the substrate 10, reducing the bending stress applied to the wiring when bending, and preventing breakage of the wiring due to bending and suppressing an increase in resistance when constructing a bendable input device 1.

[0035] The second exposed portion 622 at the other end of the second lower interconnect layer 62 is a second extending portion 625 extending from the outer edge of the insulating layer 30. The third exposed portion 623 at the other end of the first lower interconnect layer 61 is a third extending portion 626 extending from the outer edge of the insulating layer 30.

[0036] The second external connection terminal layer 72 is connected to cover the second extending portion 625. The first external connection terminal layer 71 is connected to cover the third extending portion 626. As a result, in the external connection region S3, the second exposed portion 622 has a two-layer laminate structure of the second lower outgoing wiring layer 62 and the second external connection terminal layer 72, and the third exposed portion 623 has a two-layer laminate structure of the first lower outgoing wiring layer 61 and the first external connection terminal layer 71. When a cable such as a flexible cable is crimped and connected via the anisotropic conductive film 80 in the external connection region S3, such a two-layer laminate structure suppresses deformation during crimping, thereby preventing terminal damage due to deformation.

[0037] (Another external connection terminal layer: Part 1) Fig. 7A is a schematic plan view illustrating one wiring of the external connection terminal layer. Fig. 7B is a schematic cross-sectional view illustrating one wiring of the external connection terminal layer. Fig. 7B shows a cross-sectional view taken along line D2-D2 in Fig. 7A. For ease of explanation, the cover coat 50 is omitted from Figs. 7A and 7B.

[0038] 7A and 7B includes a first external connection terminal layer 71 and a second external connection terminal layer 72 provided on a substrate 10. A second exposed portion 622 provided at the other end of the second lower outgoing wiring layer 62 is a second extending portion 625. A third exposed portion 623 provided at the other end of the first lower outgoing wiring layer 61 is a third extending portion 626. The second external connection terminal layer 72 is connected to cover the second extending portion 625, and the first external connection terminal layer 71 is connected to cover the third extending portion 626. A cable such as a flexible cable is crimped onto the first external connection terminal layer 71 and the second external connection terminal layer 72 via an anisotropic conductive film 80 (see FIG. 6C ).

[0039] (Another external connection terminal layer: Part 2) Fig. 8A is a schematic plan view illustrating one wiring of the external connection terminal layer. Fig. 8B is a schematic cross-sectional view illustrating one wiring of the external connection terminal layer. Fig. 8B shows a cross-sectional view taken along line D3-D3 in Fig. 8A. For ease of explanation, the cover coat 50 is omitted from Figs. 8A and 8B.

[0040] 8A and 8B includes a second external connection terminal layer 72 and a first external connection terminal layer 71 provided on the substrate 10. A second exposed portion 622 is provided at the other end of the second lower outgoing wiring layer 62, and a third exposed portion 623 is provided at the other end of the first lower outgoing wiring layer 61. Through holes 30h are provided in the insulating layer 30 at positions overlapping the second exposed portion 622 and the third exposed portion 623, respectively. One end of the second external connection terminal layer 72 is embedded in the through hole 30h provided at a position overlapping the second exposed portion 622, and one end of the first external connection terminal layer 71 is embedded in the through hole 30h provided at a position overlapping the third exposed portion 623, with the other ends of each extending onto the substrate 10. The other ends of the second external connection terminal layer 72 and the first external connection terminal layer 71 are provided on the substrate 10 at positions spaced apart from the other ends of the second lower outgoing wiring layer 62 and the first lower outgoing wiring layer 61. A cable such as a flexible cable is crimped onto the first external connection terminal layer 71 and the second external connection terminal layer 72 via an anisotropic conductive film 80 (see FIG. 6C ).

[0041] (Another external connection terminal layer: Part 3) Fig. 9 is a schematic cross-sectional view illustrating an external connection terminal layer. Fig. 10A is a schematic plan view illustrating one wiring of the external connection terminal layer. For ease of explanation, the cover coat 50 is omitted from Fig. 10A. Figs. 10B and 10C are schematic cross-sectional views illustrating one wiring of the external connection terminal layer. Fig. 10B shows a cross-sectional view taken along line C4-C4 in Fig. 10A, and Fig. 10C shows a cross-sectional view taken along line D4-D4 in Fig. 10A.

[0042] 9 includes a first external connection terminal layer 71 and a second external connection terminal layer 72 provided on a substrate 10. As shown in FIGS. 10A to 10C , one end of the second external connection terminal layer 72 is connected to a second exposed portion 622 provided at the other end of the second lower outgoing wiring layer 62 via a through-hole 30h formed in the insulating layer 30. One end of the first external connection terminal layer 71 is connected to a third exposed portion 623 provided at the other end of the first lower outgoing wiring layer 61 via a through-hole 30h formed in the insulating layer 30. The other ends of the second external connection terminal layer 72 and the first external connection terminal layer 71 are provided on the substrate 10 at positions spaced apart from the other ends of the second lower outgoing wiring layer 62 and the first lower outgoing wiring layer 61.

[0043] The first external connection terminal layer 71 and the second external connection terminal layer 72 are formed using the same material and in the same process as the upper electrode layer 40. A cable such as a flexible cable is crimped onto the first external connection terminal layer 71 and the second external connection terminal layer 72 via an anisotropic conductive film 80.

[0044] (Another external connection terminal layer: No. 4) Fig. 11 is a schematic cross-sectional view illustrating an external connection terminal layer. Fig. 12 is a schematic plan view illustrating an external connection terminal layer. Fig. 13A is a schematic plan view illustrating one wiring of the external connection terminal layer. For ease of explanation, the cover coat 50 is omitted from Fig. 13A. Fig. 13B is a schematic cross-sectional view illustrating one wiring of the external connection terminal layer. Fig. 13B shows a cross-sectional view taken along line D5-D5 in Fig. 13A.

[0045] 11 includes a second external connection terminal layer 72 and a first external connection terminal layer 71 provided on an insulating layer 30 on the base material 10. As shown in FIGS. 12 , 13A, and 13B, one end of the second external connection terminal layer 72 is connected to a second exposed portion 622 provided at the other end of the second lower escape wiring layer 62 via a through-hole 30h formed in the insulating layer 30. One end of the first external connection terminal layer 71 is connected to a third exposed portion 623 provided at the other end of the first lower escape wiring layer 61 via a through-hole 30h formed in the insulating layer 30. The other ends of the second external connection terminal layer 72 and the first external connection terminal layer 71 are provided on an insulating layer 30 provided on the base material 10.

[0046] After forming the insulating layer 30, the first external connection terminal layer 71 and the second external connection terminal layer 72 are formed using the same material and in the same process as the upper electrode layer 40. A cable such as a flexible cable is crimped onto the first external connection terminal layer 71 and the second external connection terminal layer 72 via an anisotropic conductive film 80.

[0047] Since the first external connection terminal layer 71 and the second external connection terminal layer 72 are formed on the insulating layer 30, when the cable is crimped and connected, the insulating layer 30 functions as a support member that supports the crimping stress, and the thickness (height) of the cable crimped portion in the external connection area S3 can be obtained sufficiently compared to when only wiring is used, thereby ensuring a reliable connection between the first external connection terminal layer 71 and the second external connection terminal layer 72 and the cable.

[0048] (Another example of connection between the upper electrode layer and the second lower lead-out wiring layer) Fig. 14 is a schematic plan view illustrating the connection portion between the upper electrode layer and the second lower lead-out wiring. For ease of explanation, the cover coat 50 is omitted from Fig. 14. Fig. 15 is a schematic cross-sectional view illustrating the connection portion between the upper electrode layer and the second lower lead-out wiring. Fig. 15 shows a schematic cross-sectional view taken along line C6-C6 in Fig. 14.

[0049] The upper electrode layer 40 is connected to a first exposed portion 621 exposed from the insulating layer 30 and overlapping one end of the second lower interconnection layer 62 via a through hole 30h formed in the insulating layer 30. The through hole 30h is provided at a position overlapping an upper connection portion 43 that is continuous with the upper connection pad portion 42 on the outer edge of the upper main pattern 41 in the upper electrode layer 40, as viewed in a direction perpendicular to the plane of the substrate 10. The second lower interconnection layer 62 is electrically connected to the upper electrode layer 40 at one end and is provided at the same level as the first lower interconnection layer 61, extending through the non-visible region S2 to the external connection region S3. This connection reduces the connection resistance between the upper electrode layer 40 and the second lower interconnection layer 62 and enables a narrower frame.

[0050] Second Embodiment Next, an input device according to a second embodiment will be described. FIG. 16 is a schematic cross-sectional view of the non-visible region of the input device according to the second embodiment. In an input device 1B according to this embodiment, a plurality of upper electrode layers 40 (see FIG. 1) are arranged side by side. The input device 1B includes a first upper outgoing wiring layer 63 extending from the same layer as one of the plurality of upper electrode layers 40. The input device 1B also includes a second lower outgoing wiring layer 62 connected to another of the plurality of upper electrode layers 40 via a through-hole 30h (see FIG. 4) in the insulating layer 30. The first upper outgoing wiring layer 63 and the second lower outgoing wiring layer 62 are provided extending from the non-visible region S2 to the external connection region S3 (see FIG. 1).

[0051] In the input device 1B, the first upper outgoing wiring layer 63 and the second lower outgoing wiring layer 62 are arranged to overlap each other in a planar view. Furthermore, both the first upper outgoing wiring layer 63 and the second lower outgoing wiring layer 62 serve as detection wiring layers or drive wiring layers for the capacitive touch panel. In this way, by arranging the first upper outgoing wiring layer 63 and the second lower outgoing wiring layer 62 to overlap each other in a planar view in the non-visible area S2, a narrow frame is achieved. Furthermore, even if the first upper outgoing wiring layer 63 and the second lower outgoing wiring layer 62 overlap each other in a planar view, noise caused by overlapping wiring is prevented because they are both drive wiring layers or detection wiring layers. The area where the first upper wiring layer 63 and the second lower wiring layer 62 can overlap each other in a planar view is the non-visible area S2 excluding the connection portion with the upper electrode layer 40, the external connection area S3, and their vicinity.

[0052] Here, in the case where the input device 1B is bendable, the first upper escape wiring layer 63 connected to the upper electrode layer 40 is preferably disposed away from the bending central axis AX (see FIG. 1 ) of the base material 10. For example, the first upper escape wiring layer 63 is disposed so as not to intersect with the bending central axis AX. This prevents resistance changes and disconnections in the first upper escape wiring layer 63 in the input device 1B that is bendable about the bending central axis AX.

[0053] Although the above example shows that the first upper wiring layer 63 and the second lower wiring layer 62 overlap each other in a planar view in the non-visible region S2, the present invention is not limited to this. For example, the first upper wiring layer 63 and the second lower wiring layer 62 may not overlap each other in a planar view, but may be arranged alternately in the planar direction.

[0054] Furthermore, in a case where the input device 1B is bendable, the first upper outgoing wiring layer 63 may be arranged not to intersect the bending central axis AX, and the second lower outgoing wiring layer 62 may be arranged to intersect the bending central axis AX. This is because, when the input device 1B is bent, the second lower outgoing wiring layer 62, which is closer to the base material 10, can have a smaller bending stress than the wiring of the first upper outgoing wiring layer 63, which is farther from the base material 10.

[0055] Fig. 17A is a schematic plan view illustrating an external connection terminal layer of the input device according to the second embodiment. For ease of explanation, the cover coat 50 is omitted from Fig. 17A. Figs. 17B and 17C are schematic cross-sectional views illustrating the external connection terminal layer of the input device according to the second embodiment. Fig. 17B shows a cross-sectional view taken along line D6-D6 in Fig. 17A, and Fig. 17C shows a cross-sectional view taken along line D7-D7 in Fig. 17A.

[0056] 17A and 17B , the other end of the second lower extraction wiring layer 62 has a second exposed portion 622 exposed from the insulating layer 30. A second external connection terminal layer 72 is formed on this second exposed portion 622. The second external connection terminal layer 72 is formed from the same material and in the same process as the upper electrode layer 40.

[0057] 17A and 17C , a support wiring layer 627, which is at the same level and made of the same material as the second lower wiring layer 62 but is separated from the second lower wiring layer 62, has a fourth exposed portion 624 exposed from the insulating layer 30. The other end of the first upper wiring layer 63 is formed in this fourth exposed portion 624. The first upper wiring layer 63 is formed of the same material and in the same process as the upper electrode layer 40. The other end of this first upper wiring layer 63 is formed as a third external connection terminal layer 73. The third external connection terminal layer 73 is formed of the same material and in the same process as the upper electrode layer 40.

[0058] By using such a laminated structure, it is possible to make the heights of the structure of the second external connection terminal layer 72 connected to the second lower outgoing wiring layer 62 and the structure of the third external connection terminal layer 73, which is the other end of the first upper outgoing wiring layer 63 connected to the support wiring layer 627, uniform, thereby improving stability when cables such as flexible cables are crimped and connected using the anisotropic conductive film 80.

[0059] According to this embodiment, it is possible to provide an input device 1 that uses metal mesh electrodes and that can effectively utilize wiring made of a metal material that is electrically connected to the electrodes.

[0060] Although the present embodiment has been described above, the present invention is not limited to these examples. For example, while an example in which a metal mesh is used as the upper electrode layer 40 and the lower electrode layer 20 has been shown, the present invention is applicable to materials with equivalent etching rates for the upper and lower electrode layers, such as when a material other than a metal mesh (e.g., a transparent electrode (ITO: Indium Tin Oxide)) is used. Furthermore, those in the above-described embodiments in which a person skilled in the art appropriately adds, deletes, or modifies components, or appropriately combines features of the configuration examples of the embodiments, are also included within the scope of the present invention as long as they include the gist of the present invention.

[0061] REFERENCE SIGNS LIST 1...input device 1B...input device 10...substrate 20...lower electrode layer 21...lower main pattern 211...thin wire of metallic material 22...lower connection pad portion 30...insulating layer 30h...through hole 40...upper electrode layer 41...upper main pattern 411...thin wire of metallic material 42...upper connection pad portion 43...connection portion 50...cover coat 61...first lower lead-out wiring layer 62...second lower lead-out wiring layer 63...first upper lead-out wiring layer 71...first external connection terminal layer 72...second external connection terminal layer 73...third external connection terminal layer 80...anisotropic conductive film 621...first exposed portion 622...second exposed portion 623...third exposed portion 624...fourth exposed portion 625...second extension portion 626: Third extending portion 627: Support wiring layer AX: Central bending axis S1: Visible region S2: Non-visible region S3: External connection region

Claims

1. A substrate; a mesh-shaped lower electrode layer provided on the substrate; an insulating layer provided to cover the lower electrode layer; a mesh-shaped upper electrode layer provided on the insulating layer and provided in a direction intersecting the lower electrode layer; a first lower lead wiring layer provided between the substrate and the insulating layer and having one end connected to the lower electrode layer; a second lower lead wiring layer provided between the substrate and the insulating layer and formed separately in the same layer as the first lower lead wiring layer; a first external connection terminal layer connected to the other end of the first lower lead wiring layer; a second external connection terminal layer connected to the other end of the second lower lead wiring layer, wherein the insulating layer has a through hole in a portion overlapping one end of the second lower lead wiring layer, the upper electrode layer is connected to cover a first exposed portion exposed from the insulating layer through the through hole at one end of the second lower lead wiring layer, the second external connection terminal layer is connected to cover a second exposed portion exposed from the insulating layer at the other end of the second lower lead wiring layer, the first external connection terminal layer is connected to cover a third exposed portion exposed from the insulating layer at the other end of the first lower lead wiring layer, the upper electrode layer, the second lower lead wiring layer, the second external connection terminal layer, the lower electrode layer, the first lower lead wiring layer, and the first external connection terminal layer are formed of the same material, the first external connection terminal layer and the second external connection terminal layer are formed separately in the same layer from the upper electrode layer, and the first external connection terminal layer and the second external connection terminal layer are formed in the same layer. An input device characterized by this.

2. The second exposed portion is a second extension portion extending from the outer edge of the insulating layer, the third exposed portion is a third extension portion extending from the outer edge of the insulating layer, the second external connection terminal layer is connected to cover the second extension portion, and the first external connection terminal layer is connected to cover the third extension portion. The input device according to claim 1.

3. The upper electrode layer has a mesh-shaped main pattern formed of thin lines and a connection pad portion continuous with the outer edge of the main pattern, and the connection pad portion is connected to the first exposed portion exposed from the insulating layer at one end of the second lower lead wiring layer through a through hole formed in the insulating layer. The input device according to claim 1.

4. A plurality of the upper electrode layers are arranged in parallel. A first upper lead wiring layer extending and formed in the same layer as one of the plurality of upper electrode layers, and the second lower lead wiring layer connected to another of the plurality of upper electrode layers through a through hole in the insulating layer overlap each other in a plan view, and both the first upper lead wiring layer and the second lower lead wiring layer are a detection wiring layer or a drive wiring layer. The input device according to claim 1.

5. The first upper lead wiring layer connected to the upper electrode layer is arranged at a distance from the bending center axis of the base material. The input device according to claim 4.

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