Encoding method, decoding method, and communication apparatus

Abstract

Provided are an encoding method, a decoding method, and a related apparatus. The encoding method comprises: an encoding end processing a plurality of bits to obtain a first input to be encoded that comprises a first pattern, wherein said first input is arranged on one or more dimensions by using encoding units as granularity, each encoding unit comprises one or more bits among the plurality of bits, and the number of encoding units is less than the number of the plurality of bits; and encoding one or more encoding units in said first input, for example, performing component encoding, so as to obtain a second bit sequence. The number of bits comprised by the encoding unit can be flexibly adjusted, so that a limited number of patterns can adapt to various different amounts of transmitted data. In addition, a plurality of encoding units in said first input can be distributed on the one or more dimensions, a basis is provided for component encoding, thereby easily realizing the degree of parallelism of a product, and improving the peak throughput and the area efficiency.

Description

Coding method, decoding method and communication device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on February 8, 2024, with application number 202410178166.6 and application name “Encoding method, decoding method and communication device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of wireless communications, and in particular to an encoding method, a decoding method, and a communication device. Background Art

[0003] Channel coding is a relatively important technology in the field of wireless communications. Currently, the most commonly used channel coding types in wireless communication systems include low-density parity check code (LDPC) and polar code (Polar).

[0004] However, with the development of some emerging services, higher requirements are placed on channel coding. For example, real-time high-rate services such as mixed reality (MR), extended reality (XR), and immersive services have placed higher requirements on the peak throughput of channel coding. LDPC and Polar can no longer meet this requirement.

[0005] Compared to LDPC and Polar codes, two-dimensional product codes offer higher parallel processing due to their component coding capabilities, which improves throughput. However, due to the need for component coding, the information bits to be encoded must first be arranged into a two-dimensional matrix, and then different rows and / or columns within this matrix must be encoded. Therefore, the number of rows and columns of this matrix must be predefined so that both the encoder and decoder can process the data based on the same number of rows and columns.

[0006] However, in wireless communications, the amount of data transmitted is not fixed. If two-dimensional product codes are used for channel coding, the predefined two-dimensional matrix may not be able to adapt to a variety of different transmission amounts, thus limiting flexibility. Summary of the Invention

[0007] The present application provides an encoding method, a decoding method and a communication device to flexibly adapt to a variety of different data transmission volumes.

[0008] In a first aspect, an encoding method is provided. The method can be applied to a first communication device. The first communication device can be a communication device (such as a terminal device or a network device), or a component used in the communication device (such as a baseband chip, a chip system, a processor, etc.), or a logic module or software capable of implementing all or part of the functions of the communication device. This application is not limited to this.

[0009] Exemplarily, the method includes: obtaining a first bit sequence, the first bit sequence including multiple bits; processing the multiple bits to obtain a first input to be encoded having a first pattern, the first input to be encoded including multiple coding units distributed in one or more dimensions, each of the multiple coding units including one or more bits of the multiple bits, the first pattern being used to indicate the distribution of the multiple coding units in the one or more dimensions; encoding one or more coding units in the first input to be encoded to obtain a second bit sequence.

[0010] The first input to be encoded can be understood as data to be encoded, bits to be decoded, information bits to be encoded, input data to be encoded, input bits to be encoded, etc. In this application, the first input to be encoded has a first pattern. In other words, the multiple coding units in the first input to be encoded are arranged according to the style of the first pattern. The coding unit can be understood as the minimum granularity of the first input to be encoded arranged to have the first pattern, and can also be called a unit, element, coding element, expansion factor, etc. This application does not limit this.

[0011] Each coding unit may include one or more bits in the first bit sequence, or in other words, the number of bits included in each coding unit is not fixed and can be flexibly adjusted to adapt to data transmission volumes of different sizes.

[0012] The first pattern is used to indicate the distribution of multiple coding units in one or more dimensions, that is, the first input to be encoded is distributed in one or more dimensions. The pattern may also be called a basic graph, basic pattern, basic model, etc. This application does not limit this.

[0013] Based on the above technical solution, the first communication device can arrange multiple bits using coding units as the granularity, thereby obtaining a first input to be encoded having a first pattern. Since the number of bits included in a coding unit is not fixed and can be flexibly adjusted, a limited number of patterns can be adapted to a variety of different data transmission rates, and the number of bits in a coding unit can be flexibly adjusted with the data transmission rate. Furthermore, the first pattern can be used to constrain the distribution of multiple coding units in the first input to be encoded along one or more dimensions, meaning that component coding can be used or not for encoding as needed. Furthermore, when using component coding, the first communication device can encode multiple groups of input bits in the same coding direction in parallel. This means that product parallelism is easily achieved, improving processing efficiency and facilitating improvements in peak throughput and area efficiency. Furthermore, since component coding can be performed in multiple different coding directions, the same coding unit can participate in more encoding cycles, thereby improving decoding performance. Furthermore, by arranging bits into coding units, using coding units as the granularity, and then performing component coding on the arranged input to be encoded, greater coding gain can be achieved.

[0014] In combination with the first aspect, in some possible implementations of the first aspect, the processing of the multiple bits to obtain a first input to be encoded having a first pattern includes: arranging the multiple bits according to an arrangement rule to obtain the multiple coding units; and processing the multiple coding units to obtain the first input to be encoded having the first pattern.

[0015] That is, the first communication device may arrange multiple bits in the first bit sequence to obtain multiple coding units, and then process the multiple coding units to obtain the first input to be encoded.

[0016] The specific implementation of the first communication device obtaining the first input to be encoded is not limited to this. In another implementation, the first communication device may also arrange multiple bits in the first bit sequence and map each resulting encoding unit to a corresponding position in the first pattern. That is, while constructing the encoding unit, each encoding unit is mapped to the first pattern.

[0017] In combination with the first aspect, in some possible implementations of the first aspect, each coding unit is a one-dimensional vector or a two-dimensional matrix, and the multiple coding units include at least one one-dimensional vector and / or at least one two-dimensional matrix.

[0018] That is, the bits in each coding unit can be arranged in the form of a one-dimensional vector or a two-dimensional matrix, and different coding units can have different forms. Therefore, the above-mentioned multiple coding units may include at least one one-dimensional vector and / or at least one two-dimensional matrix.

[0019] It is understood that if the above-mentioned multiple coding units are defined as coding units with the same style (or structure), then the above-mentioned multiple coding units are multiple one-dimensional vectors or multiple two-dimensional matrices. Among them, the coding units with the same style mean that different coding units have the same dimension, different coding units include the same number of bits in each dimension, and the order of bits in different coding units is also the same.

[0020] In combination with the first aspect, in some possible implementations of the first aspect, the arrangement rule is used to indicate: the dimension of each coding unit, the number of bits included in each coding unit in each dimension, and the arrangement of one or more bits included in each coding unit.

[0021] In other words, the arrangement rule can be used to indicate the pattern of each coding unit. Based on the arrangement rule, the first communication device can clearly know how to arrange the multiple bits in the first bit sequence.

[0022] One or more items of the permutation rule may be predefined by the protocol, or may be determined by the first communication device, or may be indicated by the second communication device via signaling. In other words, the permutation rule may be predefined by the protocol, or may be determined by the first communication device, or may be indicated by the second communication device, or may be a partial permutation rule predefined by the protocol, with the first communication device and / or the second communication device determining the remaining items, and so on, without limitation.

[0023] In combination with the first aspect, in some possible implementations of the first aspect, the method further includes: sending or receiving first information, where the first information is used to indicate one or more of the following: the dimension of each coding unit, the number of bits included in each coding unit in each dimension, or the arrangement of one or more bits included in each coding unit.

[0024] That is, the first communication device or the second communication device indicates one or more of the above arrangement rules through the first information.

[0025] In combination with the first aspect, in some possible implementations of the first aspect, different coding units in the multiple coding units include the same number of bits.

[0026] The number of bits included in a coding unit may also be referred to as the size of the coding unit. Different coding units may have the same number of bits, and the sizes of the different coding units may also be referred to as the same.

[0027] That is, the multiple encoding units in the first input to be encoded have the same size. The first communication device does not need to define different operation instructions for encoding units of different sizes, making product implementation more user-friendly. Furthermore, the protocol does not need to define encoding units of different sizes, thus simplifying the protocol definition.

[0028] In combination with the first aspect, in some possible implementations of the first aspect, at least two coding units among the multiple coding units include different numbers of bits.

[0029] That is, different coding units may include different numbers of bits, or in other words, different coding units may have different sizes. The first communication device can flexibly configure the number of bits in different coding units based on different data transmission volumes and different service requirements, thereby more accurately controlling the bit rate and improving decoding performance.

[0030] In combination with the first aspect, in some possible implementations of the first aspect, encoding one or more coding units in the first to-be-encoded input to obtain a second bit sequence includes: component encoding one or more coding units in the first to-be-encoded input to obtain the second bit sequence.

[0031] Component coding involves decomposing the multiple bits to be encoded into one or more dimensions, using coding units as the granularity, and encoding them separately in one or more directions. Separate coding in one or more directions means that the coding units in each direction are used as bits to be encoded and input to the encoder for encoding. In other words, each encoding operation is performed on the bits in the coding units in the same direction.

[0032] Through component coding, a coding unit can participate in more encoding operations, thereby improving decoding performance. Furthermore, because the first input to be encoded has one or more dimensions, the encoder can encode multiple groups of bit inputs in the same encoding direction in parallel. Therefore, product parallelization is easy to implement, which can improve processing efficiency and contribute to improving peak throughput and area efficiency.

[0033] In combination with the first aspect, in some possible implementations of the first aspect, the first pattern is used to indicate the distribution of the multiple coding units in multiple dimensions, and the component encoding of one or more coding units in the first to-be-encoded input includes: according to one or more coding directions, obtaining multiple groups of input bits from the one or more coding units in the first to-be-encoded input, the one or more coding directions including one or more of the following multiple directions: a horizontal direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions, a vertical direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions, or a diagonal direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions; encoding each group of input bits in the multiple groups of input bits.

[0034] The direction in which one or more coding units participating in the same encoding are located can be called a coding direction. The coding direction can be the same direction as the dimension in which the multiple coding units are distributed, or can be other directions, which is not limited in this application.

[0035] In combination with the first aspect, in some possible implementations of the first aspect, among the multiple groups of input bits, the encoding types used to encode different groups of input bits in the same encoding direction are the same.

[0036] Using the same encoding type to encode multiple groups of input bits is suitable for parallel processing. Since the multiple encoding types processed in parallel during product implementation are the same, parallel instructions with higher parallelism can be used, resulting in higher processing efficiency.

[0037] Furthermore, the encoding parameters used for different groups of input bits in the same encoding direction are the same, or the encoding parameters used for different groups of input bits in the same encoding direction are different.

[0038] The first communication device may select the same or different encoding parameters for encoding according to service requirements.

[0039] On the basis of the same encoding type, using the same encoding parameters can reduce the implementation complexity and further improve the processing efficiency; using different encoding parameters can obtain better decoding performance.

[0040] In combination with the first aspect, in some possible implementations of the first aspect, among the multiple groups of input bits, different coding types are used to encode at least two groups of input bits in the same coding direction.

[0041] By using different coding types to encode different groups of input bits, the total bit rate can be controlled more flexibly and accurately, thereby improving decoding performance.

[0042] In combination with the first aspect, in some possible implementations of the first aspect, the encoding types used to encode the multiple groups of input bits are the same.

[0043] In other words, regardless of encoding direction, all input bits can be encoded using the same encoding type. Using the same encoding type to encode multiple groups of input bits is suitable for parallel processing. Because the same encoding type is used for parallel processing in product implementations, higher-degree parallel instructions can be used, resulting in higher encoding and decoding efficiency.

[0044] With reference to the first aspect, in some possible implementations of the first aspect, different encoding types are used to encode at least two groups of input bits among the multiple groups of input bits.

[0045] That is, multiple groups of input bits in one or more coding directions may be encoded using different coding types. For example, different groups of input bits in the same coding direction may be encoded using different coding types. Alternatively, one or more groups of input bits in each coding direction may be encoded using one coding type, while input bits in different coding directions may be encoded using different coding types. This application does not limit this.

[0046] By using different coding types to encode different groups of input bits, the total bit rate can be controlled more flexibly and accurately, thereby improving decoding performance.

[0047] In combination with the first aspect, in some possible implementations of the first aspect, the method further includes: sending or receiving second information, wherein the second information is used to indicate one or more of the following: the one or more encoding directions, the encoding order, the encoding type used to encode each group of input bits, or the encoding bit rate of each group of input bits, and the encoding order is used to indicate the order in which each group of input bits is input into the encoder.

[0048] The first communication device and the second communication device communicating therewith may determine one or more of the above parameters through the second information. Either the first communication device or the second communication device may indicate the above parameters through the second information, so that both parties perform encoding and decoding based on the same rules, thereby enabling the second communication device to correctly decode and improving decoding performance.

[0049] The coding order can be used to indicate the order in which the bits in a set of input bits are encoded. Since a set of input bits may be carried in one or more coding units, the coding order can also be said to control the order in which one or more coding units carrying the set of input bits are input to the encoder.

[0050] It is understood that one or more of the above items may also be predefined by the protocol. For example, the protocol may predefine the above items, in which case the first communication device and the second communication device do not need to indicate the above items through the second information; alternatively, some of the above items may be predefined by the protocol, while other items may be determined by the first communication device and / or the second communication device, which is not limited in this application.

[0051] In combination with the first aspect, in certain possible implementations of the first aspect, the first pattern is also used to indicate a coding position, the coding unit located at the coding position in the first input to be encoded is the coding unit to be encoded, and the one or more groups of input bits are determined from the coding unit to be encoded in the first input to be encoded.

[0052] That is, not all coding units in the first input to be encoded may participate in the encoding. By indicating the encoding position, the number of redundant bits can be controlled more flexibly, that is, the code rate can be controlled more flexibly, thereby improving the decoding performance.

[0053] In combination with the first aspect, in some possible implementations of the first aspect, the first pattern is used to indicate the distribution of the multiple coding units in the one or more dimensions, including: the first base map is used to indicate the number of the multiple coding units distributed in each dimension of the one or more dimensions.

[0054] The first pattern may be, for example, a regular pattern, and by indicating the number of the plurality of coding units distributed in each dimension, the distribution of the plurality of coding units in each dimension may be determined.

[0055] Furthermore, the first pattern is used to indicate distribution of the multiple coding units in the one or more dimensions, and further includes: the first pattern is used to indicate blank positions in the first pattern.

[0056] The first pattern may also be an irregular pattern, or the first pattern may include blank positions, where no coding units are mapped. In this case, the first pattern may further indicate the blank positions, and the distribution of the coding units in each dimension may be determined in combination with the number of coding units distributed in each dimension.

[0057] By indicating the blank position, the first pattern can have more possible designs, for example, it can be regular or irregular, so that it can adapt to a wider range of code types and meet the needs of more different services.

[0058] In combination with the first aspect, in some possible implementations of the first aspect, the multiple encoding units include a first encoding unit and at least one copy of the first encoding unit, and the first encoding unit and the at least one copy are in different positions in the first input to be encoded.

[0059] By encoding multiple copies, the bits in the same coding unit can participate in more encodings, thereby improving decoding performance.

[0060] In combination with the first aspect, in some possible implementations of the first aspect, the method further includes: arranging the multiple bits to obtain a second input to be encoded having a second pattern, the second input to be encoded including multiple coding units distributed in one or more dimensions, each of the multiple coding units including one or more bits of the multiple bits, and the second pattern being used to indicate the distribution of the multiple coding units in the one or more dimensions; encoding one or more coding units in the second input to be encoded to obtain a third bit sequence; and obtaining a fourth bit sequence based on the second bit sequence and the third bit sequence.

[0061] That is, the first bit sequence is processed to obtain a second input to be encoded having a second pattern. The second input to be encoded and the first input to be encoded can be thought of as two signals split into the first bit sequence. These two signals can undergo the same or different processing to obtain the second and third bit sequences, which are then combined. This improves decoding performance through diversity.

[0062] In fact, the present application is not limited thereto, and the first bit sequence may also be divided into more signals, which are then combined after multi-path processing.

[0063] In combination with the first aspect, in some possible implementations of the first aspect, the method further includes: sending or receiving third information, where the third information is used to indicate the adopted pattern, and the pattern includes the first pattern.

[0064] The first and second communication devices can pre-store a single pattern or multiple patterns. When multiple patterns are pre-stored, both parties can determine the pattern to be used for the current encoding and decoding, facilitating accurate decoding by the second communication device. Furthermore, pre-stored patterns allow for a wider range of code types to be accommodated, meeting the needs of a wider range of services.

[0065] It is understandable that if the first communication device and the second communication device each pre-store a pattern, both parties do not need to indicate the pattern used for current encoding and decoding through the third information, thereby saving signaling overhead.

[0066] In a second aspect, a decoding method is provided. The method can be applied to a second communication device. The second communication device can be a communication device (such as a terminal device or a network device), or a component used in the communication device (such as a baseband chip, a chip system, a processor, etc.), or a logic module or software capable of implementing all or part of the functions of the communication device. This application is not limited to this.

[0067] Exemplarily, the method includes: obtaining a second bit sequence, the second bit sequence including multiple bits; processing the multiple bits to obtain a first input to be decoded having a third pattern, the first input to be decoded including multiple decoding units distributed in one or more dimensions, each of the multiple decoding units including one or more bits of the multiple bits, the third pattern being used to indicate the distribution of the multiple decoding units in the one or more dimensions; decoding one or more decoding units in the first input to be decoded to obtain a fifth bit sequence.

[0068] The first input to be decoded can be understood as data to be decoded, bits to be decoded, coded bits to be decoded, input data to be decoded, input bits to be decoded, etc. In this application, the first input to be decoded has a third pattern. In other words, the multiple decoding units included in the first input to be decoded are arranged according to the style of the third pattern. The decoding unit can be understood as the smallest granularity of the first input to be decoded arranged to have the third pattern, and can also be referred to as a unit, element, decoding element, expansion factor, etc. This application does not limit this.

[0069] The third pattern in the second aspect corresponds to the first pattern in the first aspect. The third pattern can be used to indicate the distribution of multiple decoding units in the first input to be decoded along one or more dimensions. Because the second bit sequence output after encoding the first input to be encoded in the first aspect includes information bits and parity bits, the second bit sequence has additional parity bits compared to the first bit sequence. Therefore, to arrange the second bit sequence into the first input to be decoded having the third pattern, the third pattern needs to have larger dimensions than the first pattern to accommodate the parity bits.

[0070] The decoding units in the second aspect correspond to the encoding units in the first aspect. The decoding units in the first input to be decoded and the encoding units at the same position in the first input to be encoded may have the same dimensions and include the same number of bits, and the bits in each decoding unit may be arranged in the same manner as the bits in the corresponding encoding unit.

[0071] The fifth bit sequence in the second aspect corresponds to the first bit sequence in the first aspect. The sequence obtained after decoding the second bit sequence is the fifth bit sequence. Theoretically, if the second communication device can correctly decode the second bit sequence, the decoded fifth bit sequence is consistent with the first bit sequence. Therefore, the fifth bit sequence is the first bit sequence obtained through decoding, or in other words, the received first bit sequence.

[0072] Based on the above technical solution, the first communication device can arrange multiple bits at the granularity of decoding units, thereby obtaining a first input to be decoded having a third pattern. Since the number of bits included in a decoding unit is not fixed and can be flexibly adjusted, a limited number of patterns can be adapted to a variety of different data transmission rates, and the number of bits in the encoding unit can be flexibly adjusted with the data transmission rate. Furthermore, the third pattern can be used to constrain the distribution of multiple decoding units in the first input to be decoded along one or more dimensions. This means that component decoding can be used or not for decoding as needed. For example, if the first communication device uses component encoding, the second communication device can use component decoding. Furthermore, when using component decoding, the second communication device can decode multiple groups of input bits in the same decoding direction in parallel. This means that product parallelism is easily achieved, which can improve processing efficiency and contribute to increased peak throughput and area efficiency. Furthermore, since the component decoding process can perform decoding in multiple different decoding directions, the same decoding unit can participate in more decoding operations, which is more conducive to error correction and better decoding performance.

[0073] In addition, the second aspect also provides a decoding method, including: obtaining a second bit sequence, the second bit sequence is obtained by encoding one or more coding units in a first input to be encoded having a first pattern, the first input to be encoded includes multiple coding units distributed in one or more dimensions, each of the multiple coding units includes one or more bits, and the first pattern is used to indicate the distribution of the multiple coding units in the one or more dimensions; decoding the second bit sequence to obtain a fifth bit sequence.

[0074] In combination with the second aspect, in some possible implementations of the second aspect, processing the multiple bits to obtain a first input to be decoded having a third pattern includes: arranging the multiple bits according to an arrangement rule to obtain the multiple decoding units; and processing the multiple decoding units to obtain the first input to be decoded having the third pattern.

[0075] That is, the second communication device may arrange multiple bits in the second bit sequence to obtain multiple decoding units, and then process the multiple decoding units to obtain the first input to be decoded.

[0076] The specific implementation of the second communication device obtaining the first input to be decoded is not limited to this. In another implementation, the second communication device may also arrange multiple bits in the second bit sequence and map each obtained decoding unit to a corresponding position in the third pattern. That is, while constructing the decoding unit, each decoding unit is mapped to the third pattern.

[0077] In combination with the second aspect, in some possible implementations of the second aspect, each decoding unit is a one-dimensional vector or a two-dimensional matrix, and the multiple decoding units include at least one one-dimensional vector and / or at least one two-dimensional matrix.

[0078] That is, the bits in each decoding unit can be arranged in the form of a one-dimensional vector or a two-dimensional matrix, and different decoding units can have different forms. Therefore, the above-mentioned multiple decoding units may include at least one one-dimensional vector and / or at least one two-dimensional matrix.

[0079] In combination with the second aspect, in some possible implementations of the second aspect, the arrangement rule is used to indicate: the dimension of each decoding unit, the number of bits included in each decoding unit in each dimension, and the arrangement of one or more bits included in each decoding unit.

[0080] In other words, the arrangement rule can be used to indicate the pattern of each decoding unit. Based on the arrangement rule, the second communication device can clearly know how to arrange the multiple bits in the second bit sequence.

[0081] Since the decoding unit in the second aspect may correspond to the encoding unit in the first aspect, the arrangement rule in the second aspect may be the same as the arrangement rule in the first aspect.

[0082] One or more items of the permutation rule may be predefined by the protocol, or may be indicated by the first communication device via signaling, or may be determined by the second communication device. In other words, the permutation rule may be predefined by the protocol, or may be indicated by the first communication device, or may be determined by the second communication device, or may be a partial permutation rule predefined by the protocol, with the first communication device and / or the second communication device determining the remaining items, and so on, without limitation.

[0083] In combination with the second aspect, in some possible implementations of the second aspect, the method further includes: receiving or sending first information, where the first information is used to indicate one or more of the following: the dimension of each decoding unit, the number of bits included in each decoding unit in each dimension, or the arrangement of one or more bits included in each decoding unit.

[0084] That is, the first communication device or the second communication device indicates one or more of the above arrangement rules through the first information.

[0085] In combination with the second aspect, in some possible implementations of the second aspect, different decoding units among the multiple decoding units include the same number of bits.

[0086] The number of bits included in a decoding unit may also be referred to as the size of the decoding unit. Different decoding units may have the same number of bits, and the sizes of the different decoding units may also be referred to as the same.

[0087] That is, the multiple decoding units in the first input to be decoded are of the same size. The second communication device does not need to define different operation instructions for decoding units of different sizes, making product implementation more user-friendly. Furthermore, the protocol does not need to define decoding units of different sizes, thus simplifying the protocol definition.

[0088] In combination with the second aspect, in some possible implementations of the second aspect, at least two decoding units among the multiple decoding units include different numbers of bits.

[0089] In other words, different decoding units can include different numbers of bits, or in other words, different decoding units can have different sizes. Since each decoding unit in the first input to be decoded has the same size as the encoding unit at the corresponding position in the first input to be encoded, the sizes of different encoding units can be different. This facilitates more precise bit rate control and improves decoding performance.

[0090] In combination with the second aspect, in some possible implementations of the second aspect, decoding the first input to be decoded to obtain a third bit sequence includes: performing component decoding on the first input to be decoded to obtain the third bit sequence.

[0091] Component decoding involves decomposing the multiple bits to be decoded into one or more dimensions, using decoding units as the granularity, and performing decoding separately in one or more directions. Decoding in one or more directions separately means that the decoding units in each direction are used as the bits involved in decoding and are input into the decoder for decoding. In other words, each decoding operation is performed on the bits in the decoding units in the same direction.

[0092] Through component decoding, a decoding unit can participate in more decoding operations, thereby improving decoding performance. Furthermore, because the first input to be decoded has one or more dimensions, the decoder can decode multiple groups of bit inputs in the same decoding direction in parallel. Therefore, product parallelization is easily implemented, which can improve processing efficiency and contribute to improving peak throughput and area efficiency.

[0093] In combination with the second aspect, in some possible implementations of the second aspect, the performing component decoding on the first input to be decoded to obtain the third bit sequence includes: performing component decoding on the first input to be decoded to obtain a first decoding output having a first pattern, the first decoding output including multiple units distributed in the one or more dimensions, the first pattern being used to indicate the distribution of the multiple units in the one or more dimensions; and obtaining the fifth bit sequence from the first decoding output according to the first pattern.

[0094] The process of component-coding the first input to be decoded is similar to the process of component-coding the first input to be encoded in the first aspect. After decoding, the bits of the decoded output can be arranged according to a first pattern, so that the first decoded output has the first pattern. In this way, the second communication device can extract bits from the first decoded output according to the first pattern to obtain a fifth bit sequence having the same order as the first bit sequence.

[0095] In combination with the second aspect, in some possible implementations of the second aspect, the multiple units include a first unit and at least one copy of the first unit, and the first unit and the at least one copy are in different positions in the first decoding output.

[0096] It should be understood that the first unit in the second aspect corresponds to the first encoding unit in the first aspect. Theoretically, if the first encoding unit is correctly decoded, the resulting first unit is consistent with the first encoding unit. It should also be understood that the first unit can be a single unit or multiple units, or can refer to a class of units that are replicated in one or more copies at the encoding end (e.g., the first communication device).

[0097] Among the multiple units obtained by decoding the first input to be decoded, there are one or more units with copies, which means that the encoding end encodes one or more encoding units and their copies, that is, encodes multiple copies of the same data, so that the decoding performance can be improved through the diversity effect.

[0098] In combination with the second aspect, in some possible implementations of the second aspect, the third pattern indicates the distribution of the multiple decoding units in multiple dimensions, and the component decoding of the first input to be decoded includes: according to one or more decoding directions, one or more decoding units in the first input to be decoded obtain multiple groups of input bits, and the one or more decoding directions include one or more of the following multiple directions: a horizontal direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions, a vertical direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions, or a diagonal direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions; decoding each group of input bits in the multiple groups of input bits.

[0099] The direction in which one or more decoding units participating in the same decoding are located can be called a decoding direction. The decoding direction can be the same direction as the dimension in which the multiple decoding units are distributed, or other directions, which are not limited in this application.

[0100] In combination with the second aspect, in some possible implementations of the second aspect, among the multiple groups of input bits, decoding different groups of input bits corresponding to the same decoding direction use the same decoding type.

[0101] Using the same decoding type to decode multiple groups of input bits is suitable for parallel processing. Since the multiple decoding types processed in parallel during product implementation are the same, parallel instructions with higher parallelism can be used, resulting in higher processing efficiency.

[0102] Furthermore, the decoding parameters used for different groups of input bits in the same decoding direction are the same, or the decoding parameters used for different groups of input bits in the same decoding direction are different.

[0103] On the basis of the same decoding type, using the same decoding parameters can reduce the implementation complexity and further improve the processing efficiency; using different decoding parameters can obtain better decoding performance.

[0104] In combination with the second aspect, in some possible implementations of the second aspect, among the multiple groups of input bits, different decoding types are used to decode at least two groups of input bits corresponding to the same decoding direction.

[0105] By using different coding types to encode different groups of input bits, the total bit rate can be controlled more flexibly and accurately, thereby improving decoding performance.

[0106] In combination with the second aspect, in some possible implementations of the second aspect, decoding types used to decode the multiple groups of input bits are the same.

[0107] In other words, regardless of decoding direction, all input bits can be decoded using the same decoding type. Using the same decoding type to decode multiple groups of input bits is suitable for parallel processing. Because the multiple decoding types processed in parallel during product implementation are the same, parallel instructions with higher parallelism can be used, resulting in higher processing efficiency.

[0108] In combination with the second aspect, in some possible implementations of the second aspect, different decoding types are used to decode at least two groups of input bits among the multiple groups of input bits.

[0109] That is, multiple groups of input bits in one or more decoding directions may be decoded using different decoding types. For example, different groups of input bits in the same decoding direction may be decoded using different decoding types. Alternatively, one decoding type may be used for one or more groups of input bits in each decoding direction, while input bits in different decoding directions may be decoded using different decoding types. This application is not limited to this.

[0110] The decoding type in the second aspect corresponds to the encoding type in the first aspect. A group of input bits in the first input to be encoded having the first pattern can be decoded using the corresponding decoding type for the group of input bits at the same position in the first input to be decoded having the third pattern. By using different encoding types to encode different groups of input bits, the overall bit rate can be more flexibly and accurately controlled, thereby improving decoding performance.

[0111] In combination with the second aspect, in some possible implementations of the second aspect, the method further includes: receiving or sending second information, wherein the second information is used to indicate one or more of the following: the one or more encoding directions, the encoding order, the encoding type used to encode each group of input bits, or the encoding code rate of each group of input bits; the one or more encoding directions are used to determine the one or more decoding directions; the encoding order is used to indicate the order in which each group of input bits enters the encoder, the encoding order is used to determine the decoding order, and the decoding order is used to indicate the order in which each group of input bits enters the decoder; the encoding type used to encode each group of input bits is used to determine the decoding type used to decode each group of input bits.

[0112] The second communication device and the first communication device communicating therewith may determine one or more of the above parameters through the second information. Either the second communication device or the first communication device may indicate the above parameters through the second information, so that both parties perform encoding and decoding based on the same rules, thereby enabling the second communication device to correctly decode and improving decoding performance.

[0113] The decoding order can be used to indicate the order in which the bits in a set of input bits are decoded. Since a set of input bits may be carried by one or more decoding units, the decoding order can also be said to be used to control the order in which one or more decoding units carrying a set of input bits are input into the decoder.

[0114] It is understood that one or more of the above items may also be predefined by the protocol. For example, the protocol may predefine the above items, in which case the first communication device and the second communication device do not need to indicate the above items through the second information; alternatively, some of the above items may be predefined by the protocol, while other items may be determined by the first communication device and / or the second communication device, which is not limited in this application.

[0115] In combination with the second aspect, in some possible implementations of the second aspect, the third pattern is also used to indicate a decoding position, the decoding unit located at the decoding position is a decoding unit to be decoded, and the one or more groups of input bits are determined from the decoding unit to be decoded in the first input to be decoded.

[0116] When encoding the first input to be encoded, the encoding end (e.g., the first communication device) does not necessarily encode all encoding units in the first input to be encoded, but rather encodes the encoding units at the encoding position. Correspondingly, the second communication device can decode the decoding unit at the same position (i.e., the decoding position) as the encoding position in the first input to be decoded. By indicating the decoding position, the second communication device can decode the decoding unit at the decoding position, thereby enabling the second communication device to correctly decode and improve decoding performance.

[0117] In combination with the second aspect, in some possible implementations of the second aspect, the third pattern is used to indicate the distribution of the multiple decoding units in the one or more dimensions, including: the third pattern is used to indicate the number of the multiple decoding units distributed in each of the one or more dimensions.

[0118] The third pattern may be, for example, a regular pattern, and by indicating the number of the multiple decoding units distributed in each dimension, the distribution of the multiple decoding units in each dimension may be determined.

[0119] Furthermore, the third pattern is used to indicate the distribution of the multiple decoding units in the one or more dimensions, and further includes: the third pattern is used to indicate blank positions in the third pattern.

[0120] The third pattern may also be an irregular pattern, or the third pattern may include blank positions, where no decoding units are mapped. In this case, the third pattern may further indicate the blank positions, and combined with the number of decoding units distributed in each dimension, the distribution of the multiple decoding units in each dimension may be determined.

[0121] By indicating the blank position, the second communication device can obtain a first input to be decoded having a pattern corresponding to the first pattern of the first input to be encoded, and then decode the first input to be decoded, thereby enabling the second communication device to correctly decode and improve decoding performance.

[0122] In combination with the second aspect, in certain possible implementations of the second aspect, the second bit sequence is contained in a fourth bit sequence, the fourth bit sequence includes the second bit sequence and a third bit sequence, and the second symbol sequence is obtained from the fourth symbol sequence; the method also includes: obtaining the fourth bit sequence.

[0123] The second and third bit sequences carried by the fourth bit sequence are both obtained by encoding the first bit sequence. Therefore, the fourth bit sequence carrying the second and third bit sequences can also be understood as the fourth bit sequence carrying two copies of the first bit sequence. In this way, decoding performance can be improved through diversity gain.

[0124] In combination with the second aspect, in some possible implementations of the second aspect, the method further includes: obtaining the third bit sequence, the third bit sequence including multiple bits; arranging the multiple bits in the third bit sequence to obtain a second input to be decoded having a fourth pattern, the second input to be decoded including multiple decoding units distributed in one or more dimensions, each of the multiple decoding units including one or more bits of the multiple bits, and the second pattern being used to indicate the distribution of the multiple decoding units in the one or more dimensions; decoding the one or more decoding units in the second input to be decoded to obtain a sixth bit sequence; and obtaining a seventh bit sequence based on the fifth bit sequence and the sixth bit sequence.

[0125] The second input to be decoded is obtained by processing the third bit sequence and has a fourth pattern. The fourth pattern in the second aspect corresponds to the second pattern in the first aspect. The correspondence between the fourth pattern and the second pattern can be understood by referring to the correspondence between the third pattern and the first pattern described above.

[0126] The second input to be decoded and the first input to be decoded can be viewed as two signals, the second bit sequence and the third bit sequence, split into the fourth bit sequence. These two signals can undergo the same or different processing to obtain the fifth and sixth bit sequences, and then be combined to obtain the seventh bit sequence. In this way, decoding performance can be improved through the diversity effect.

[0127] In combination with the second aspect, in some possible implementations of the second aspect, the method further includes: receiving or sending third information, where the third information is used to indicate the adopted pattern, and the pattern includes the third pattern.

[0128] Since the third pattern corresponds to the first pattern, it can also be said that the pattern includes the first pattern.

[0129] The second communication device and the first communication device can pre-store a single pattern or multiple patterns. In the case of pre-stored patterns, both parties determine the pattern to be used for the current encoding and decoding, facilitating accurate decoding by the second communication device. Furthermore, pre-stored patterns allow for a wider range of code types to be accommodated, meeting the needs of a wider range of services.

[0130] It is understandable that if the second communication device and the first communication device each pre-store a pattern, then both parties do not need to indicate the pattern used for current encoding and decoding through the third information, thereby saving signaling overhead.

[0131] In a third aspect, a device is provided. The device may include a module that performs the method / operation / step / action described in the first aspect, or include a module that performs the method / operation / step / action described in the first aspect. The module may be implemented as hardware circuitry, software, or a combination of hardware circuitry and software.

[0132] In one design, the apparatus may include a processing module and a communication module. The communication module is configured to perform the sending and receiving actions performed by the first communication apparatus in the method described in the first aspect above, and the processing module is configured to perform the processing-related actions performed by the first communication apparatus in the method described in the first aspect above.

[0133] In one design, the apparatus may include a processing module and a communication module. The communication module is configured to perform the sending and receiving actions performed by the second communication apparatus in the method described in the second aspect above, and the processing module is configured to perform the processing-related actions performed by the second communication apparatus in the method described in the second aspect above.

[0134] In one design, the device may be a terminal, or a device, module, circuit or chip configured in the terminal, or a device that can be used in conjunction with the terminal.

[0135] In one design, the device may be a network device, or a device, module, circuit or chip configured and arranged in the network device, or a device that can be used in conjunction with the network device.

[0136] In a fourth aspect, a device is provided, comprising a processor and a storage medium, wherein the storage medium stores instructions, which, when executed by the processor, enable the method in the first aspect or any possible implementation of the first aspect to be implemented, or enable the method in the second aspect or any possible implementation of the second aspect to be implemented.

[0137] In a fifth aspect, a device is provided, comprising a processing circuit, wherein the processing circuit is used to process data and / or information so that the method in the first aspect or any possible implementation of the first aspect is implemented, or the method in the second aspect or any possible implementation of the second aspect is implemented.

[0138] The processing circuit may include one or more processors, or all or part of the circuitry in one or more processors for processing functions.

[0139] Optionally, the device may also include a memory for storing programs or instructions, and the processor is used to run the programs or instructions so that the method in the first aspect or any possible implementation of the first aspect is implemented, or the method in the second aspect or any possible implementation of the second aspect is implemented.

[0140] Optionally, the device may further include the transceiver circuit, or an input / output interface.

[0141] In a sixth aspect, a chip is provided, comprising a processing circuit, wherein the processing circuit is used to run a program or instruction so that the method in the first aspect or any possible implementation of the first aspect is implemented, or the method in the second aspect or any possible implementation of the second aspect is implemented.

[0142] Optionally, the chip may further include a memory for storing programs or instructions.

[0143] Optionally, the chip may further include a transceiver circuit, or an input / output interface.

[0144] In the seventh aspect, a computer-readable storage medium is provided, which includes instructions. When the instructions are executed by a processor, the method in the first aspect or any possible implementation of the first aspect is implemented, or the method in the second aspect or any possible implementation of the second aspect is implemented.

[0145] In an eighth aspect, a computer program product is provided, comprising computer program code or instructions, which, when executed, enables the method according to the first aspect and any possible implementation of the first aspect to be implemented, or enables the method according to the second aspect or any possible implementation of the second aspect to be implemented.

[0146] In a ninth aspect, a communication system is provided, which includes an apparatus for executing the first or second aspect and any possible implementation of the first or second aspect.

[0147] It should be understood that the third to ninth aspects of the present application correspond to the technical solutions of the first to second aspects of the present application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation methods are similar and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0148] FIG1 is a schematic diagram of a communication system applicable to the communication method provided in an embodiment of the present application;

[0149] FIG2 is a schematic diagram of several different communication scenarios applicable to the communication method provided in an embodiment of the present application;

[0150] FIG3 is a schematic diagram of a signal processing process of a physical layer provided in an embodiment of the present application;

[0151] FIG4 is a schematic diagram of the encoding process of a two-dimensional product code;

[0152] FIG5 is a schematic flow chart of an encoding method provided in an embodiment of the present application;

[0153] FIG6 is a schematic diagram of an encoding unit provided in an embodiment of the present application;

[0154] 7 to 20 are schematic diagrams of patterns provided in embodiments of the present application;

[0155] 21 and 22 are schematic diagrams of encoding directions provided in embodiments of the present application;

[0156] FIG23 is a schematic diagram of multiple groups of coded bits provided in an embodiment of the present application;

[0157] FIG24 is a schematic diagram of encoding in different encoding directions provided by an embodiment of the present application;

[0158] FIG25 is a schematic diagram of a process for encoding a first bit sequence according to an embodiment of the present application;

[0159] FIG26 is a schematic diagram of obtaining a fourth bit sequence from a first bit sequence according to an embodiment of the present application;

[0160] FIG27 is a schematic flow chart of a decoding method provided in an embodiment of the present application;

[0161] 28 to 31 are schematic diagrams of a decoding unit provided in an embodiment of the present application;

[0162] FIG32 is a schematic diagram of a process for decoding a second bit sequence according to an embodiment of the present application;

[0163] FIG33 is a schematic diagram of obtaining a seventh bit sequence from a fourth bit sequence according to an embodiment of the present application;

[0164] Figures 34 and 35 are schematic block diagrams of the device provided in the embodiments of the present application. DETAILED DESCRIPTION

[0165] The technical solution in this application will be described below with reference to the accompanying drawings.

[0166] To facilitate understanding of the embodiments of the present application, the following points are first explained:

[0167] First, in this application, for the convenience of understanding and explanation, encoders and decoders (or decoders) are introduced herein. These names are given only to distinguish different functions and do not limit the structure of the communication device. For example, the first communication device has the function of encoding, and the first communication device can be said to include an encoder, and the encoder can be understood as a functional module in the first communication device; the second communication device has the function of decoding, and the second communication device can be said to include a decoder, and the decoder can be understood as a functional module in the second communication device. In a specific implementation, the encoder and decoder can be implemented by hardware, software, or a combination of hardware and software, and this application does not limit this.

[0168] Of course, the first communication device may also have a decoding function, and the second communication device may also have an encoding function, that is, the first communication device may also include a decoder, and the second communication device may also include an encoder. This application does not limit this.

[0169] It can be understood that the communication device in this application can also be replaced by a device or an encoding / decoding device, for example, the first communication device is replaced by a first device or an encoding / decoding device, and the second communication device is replaced by a second device or an encoding / decoding device.

[0170] Second, in this application, indications include direct indications (also called explicit indications) and indirect indications (also called implicit indications). Direct indication of information A refers to information A; indirect indication of information A may refer to indicating information A through the correspondence between information A and information B and direct indication of information B; or indicating information A through a preset rule that can be used to determine A based on B and direct indication of information B. The correspondence between information A and information B and the preset rule may be predefined, pre-stored, pre-burned, or pre-configured.

[0171] Third, for ease of understanding, this application describes the encoding and decoding methods provided herein using multiple figures. These figures are merely illustrative and should not constitute any limitation on this application. For example, the order of the steps shown in the various figures may be simply altered based on their functions and inherent logic. For another example, all or part of the steps in the various figures may be executed, as long as the same functionality as in the embodiments of this application is achieved.

[0172] Fourth, in this application, "at least one" means one or more, and "more" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship, but it does not exclude the situation where it indicates that the previous and next associated objects are in an "and" relationship. The specific meaning can be understood in conjunction with the context. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c; a and b; a and c; b and c; or a and b and c. Where a, b, c can be single or multiple.

[0173] Fifth, in this application, prefixes such as "first" and "second" are used solely to distinguish and describe different things belonging to the same category, and do not constrain the order, size, or quantity of things. For example, "first communication device" and "second communication device" are simply different devices, and do not restrict the number of devices or their priority. For another example, "first information" and "second information" are simply different pieces of information, and there is no temporal order, size, or priority relationship between the two.

[0174] Sixth, “sending” and “receiving” in this application indicate the direction of signal transmission. For example, “sending information to the second communication device” can be understood as the destination end of the information is the second communication device, which can include direct sending through the air interface, and also include indirect sending through the air interface by other units or modules. “Receiving information from the second communication device” can be understood as the source end of the information is the second communication device, which can include direct receiving from the second communication device through the air interface, and also include indirect receiving from the second communication device through the air interface from other units or modules. “Sending” can also be understood as the “output” of the chip interface, and “receiving” can also be understood as the “input” of the chip interface.

[0175] In other words, sending and receiving can be performed between devices, for example, between the second communication device and the first communication device; it can also be performed within the device, for example, sending or receiving between components, modules, chips, software modules or hardware modules within the device through a bus, wiring or interface.

[0176] Seventh, in the embodiments of the present application, "when", "if" and "if" all mean that the device will make corresponding processing under certain objective circumstances, which does not limit the time, nor does it require that the device must perform judgment actions when it is implemented, nor does it mean that there are other limitations.

[0177] Eighth, in this application, words such as "example," "exemplarily," "for example," or "such as" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "example," "exemplarily," "for example," or "such as" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "example," "exemplarily," "for example," or "such as" is intended to present the relevant concepts in a concrete manner.

[0178] To facilitate understanding of the embodiments of the present application, several terms involved in this document are briefly explained below.

[0179] Channel coding: Encoding information transmitted over unreliable channels in digital communications to improve transmission reliability. In channel coding, the transmitter can employ a specific coding method to convert original information (e.g., information bits) into coded data in a specific format and transmit it over the channel. The receiver then needs to decode the received data and restore the original information. The most critical component of channel coding is forward error correction coding (FEC). The purpose of FEC is to ensure that errors occurring during data transmission can be automatically corrected by the receiver using minimal overhead. For a given bit error rate, the lower the overhead required, the higher the coding efficiency. Traditional channel coding types generally include linear block codes (LBC) (such as Hamming codes, Gray codes, Bose-Chaudhuri-Hocquenghem codes, and Reed-Solomon codes), conventional codes, and concatenated codes. These codes have different characteristics and performance, making them suitable for different scenarios.

[0180] Coding rate: The ratio of information bits to coded bits after channel coding, where the coded bits after channel coding include information bits and check bits (or redundant bits). For example, if the number of coded bits after channel coding is N and the number of information bits is K, the coding rate is K / N. The number of coded bits after channel coding is also called the code length. It can be understood that high redundancy results in a low coding rate and strong anti-interference capability, but low transmission efficiency; low redundancy results in a high coding rate and weak anti-interference capability, but high transmission efficiency.

[0181] Coding gain: Assuming a constant number of information bits to be transmitted per unit time, adding redundant bits can enhance interference immunity. The reduction in signal-to-noise ratio achieved by coded transmission compared to uncoded transmission, under the same bit error rate requirement, is called coding gain.

[0182] Throughput: refers to the rate at which data is transmitted through a channel in a communication network. Improving coding efficiency helps increase throughput.

[0183] Area efficiency: refers to the ratio of peak throughput to chip area. Given the same chip area, the higher the peak throughput, the greater the area efficiency.

[0184] Interleaving: In wireless communications, deep channel fading can cause a series of data bit errors, making it impossible for the receiver to correctly recover the original information. To avoid continuous interference, the data can be fragmented at the transmitter, randomly dispersing any sudden and regular interference that may be encountered during transmission. This discretizes the continuous interference, making it easier for the receiver to recover the data using error correction techniques.

[0185] The technical solutions provided in this application can be applied to various communication systems, such as: fifth generation (5G) or new radio (NR) systems, long term evolution (LTE) systems, LTE frequency division duplex (FDD) systems, LTE time division duplex (TDD) systems, wireless local area networks (WLAN) systems, satellite communication systems, future communication systems, such as sixth generation (6G) mobile communication systems, or a fusion system of multiple systems. The technical solutions provided in this application can also be applied to device to device (D2D) communication, vehicle-to-everything (V2X) communication, machine to machine (M2M) communication, machine type communication (MTC), and Internet of Things (IoT) communication systems or other communication systems.

[0186] A device in a communication system can send a signal to another device or receive a signal from another device. The signal may include information, signaling, or data, etc. The device may also be replaced by an entity, a network entity, a communication device, a communication module, a node, a communication node, etc. The present disclosure uses the device as an example for description. For example, the communication system may include at least one terminal device and at least one network device. The network device may send a downlink signal to the terminal device, and / or the terminal device may send an uplink signal to the network device. It is understandable that the terminal device in the present disclosure may be replaced by a first communication device, and the network device may be replaced by a second communication device, and both perform the corresponding communication methods in the present disclosure.

[0187] The radio access network (RAN) device in this application is a device with wireless transceiver functions. The radio access network device can provide wireless communication function services and can access the terminal device to the wireless network. The radio access network can also be called an access network device or a network device. The network device in the embodiment of the present application can refer to a radio access network (RAN) node (or device) used in a cellular network (or mobile network) to access the terminal device to the wireless network, and can also be a zigbee base station, a master Bluetooth (BT master), a master low energy (BLE) Bluetooth (BLE master), a Lora base station, or a Wi-Fi access point.

[0188] For example, a network device may be a base station. A base station may broadly cover various names as follows, or be replaced with the following names, such as: NodeB, evolved NodeB (eNB), next generation NodeB (gNB), relay station, access point, transmitting and receiving point (TRP), transmitting point (TP), master station, auxiliary station, multi-standard radio (motor slide retainer, MSR) node, home base station, network controller, access node, wireless node, access point (AP), transmission node, transceiver node, baseband unit (BBU), remote radio unit (RRU), active antenna unit (AAU), remote radio head (RRH), central unit (CU), distributed unit (DU), radio unit (RU), positioning node, etc. A base station may be a macro base station, a micro base station, a relay node, a donor node, or the like, or a combination thereof. A base station may also refer to a communication module, modem, or chip configured within the aforementioned devices or apparatuses. A base station may also be a mobile switching center, a device that performs base station functions in D2D, V2X, or M2M communications, a network-side device in a 6G network, or a device that performs base station functions in future communication systems. A base station may support networks with the same or different access technologies. Optionally, a RAN node may also be a server, a wearable device, a vehicle, or an onboard device. For example, the access network device in vehicle-to-everything (V2X) technology may be a roadside unit (RSU). The embodiments of this application do not limit the specific technology or device form factor employed by the network device. In some deployments, the network device referred to in the embodiments of this application may include a CU, a DU, or both a CU and a DU, or a control plane CU node (central unit-control plane (CU-CP)), a user plane CU node (central unit-user plane (CU-UP)), and a DU node. For example, the network device may include a gNB-CU-CP, a gNB-CU-UP, and a gNB-DU.

[0189] In some deployments, multiple RAN nodes collaborate to assist terminals in achieving wireless access, with different RAN nodes implementing portions of the base station's functionality. For example, a RAN node can be a CU, DU, CU-CP, CU-UP, or RU. The CU and DU can be separate or included in the same network element, such as the BBU. The RU can be included in a radio frequency device or radio unit, such as an RRU, AAU, or RRH.

[0190] The RAN node may support one or more types of fronthaul interfaces, and different fronthaul interfaces correspond to DUs and RUs with different functions. If the fronthaul interface between the DU and the RU is a common public radio interface (CPRI), the DU is configured to implement one or more baseband functions, and the RU is configured to implement one or more radio frequency functions. If the fronthaul interface between the DU and the RU is another interface, relative to the CPRI, it moves part of the downlink and / or uplink baseband functions, such as, for downlink, one or more of precoding, digital beamforming (BF), or inverse fast Fourier transform (IFFT) / adding a cyclic prefix (CP), from the DU to the RU for implementation, and for uplink, one or more of digital beamforming (BF), or fast Fourier transform (FFT) / removing CP, from the DU to the RU for implementation. In one possible implementation, the interface may be an enhanced common public radio interface (eCPRI). In the eCPRI architecture, the division between DU and RU is different, corresponding to different types (category, Cat) of eCPRI, such as eCPRI Cat A, B, C, D, E, and F.

[0191] Taking eCPRI Cat A as an example, for downlink transmission, based on layer mapping, the DU is configured to implement layer mapping and one or more functions before it (i.e., one or more functions among coding, rate matching, scrambling, modulation, and layer mapping), while other functions after layer mapping (e.g., resource element (RE) mapping, digital BF, or IFFT / adding CP) are moved to the RU for implementation. For uplink transmission, based on de-RE mapping, the DU is configured to implement de-mapping and one or more functions before it (i.e., one or more functions among decoding, de-rate matching, de-scrambling, demodulation, inverse discrete Fourier transform (IDFT), channel equalization, and de-RE mapping), while other functions after de-mapping (e.g., one or more functions among digital BF or FFT / de-CP) are moved to the RU for implementation. It can be understood that for the functional description of the DU and RU corresponding to various types of eCPRI, please refer to the eCPRI protocol and will not be repeated here.

[0192] In one possible design, the processing unit for implementing baseband functions in the BBU is called a baseband high layer (BBH) unit, and the processing unit for implementing baseband functions in the RRU / AAU / RRH is called a baseband low layer (BBL) unit.

[0193] In different systems, CU (or CU-CP and CU-UP), DU or RU may also have different names, but those skilled in the art can understand their meanings. For example, in an open radio access network (open-RAN, O-RAN or ORAN) system, CU may also be called O-CU (open CU), DU may also be called O-DU, CU-CP may also be called O-CU-CP, CU-UP may also be called O-CU-UP, and RU may also be called O-RU. Any unit of CU (or CU-CP, CU-UP), DU and RU in this application may be implemented by a software module, a hardware module, or a combination of a software module and a hardware module. The network device in this application may be a virtualized device, for example, implemented by general hardware and instantiated virtualization functions, or by dedicated hardware and instantiated virtualization functions. Among them, the general hardware may be a server, such as a cloud server.

[0194] In the embodiments of the present application, the device for implementing the functions of the network device can be a network device; it can also be a device that can support the network device to implement the functions, such as a chip system, a hardware circuit, a software module, or a hardware circuit and a software module. The device can be installed in the network device or used in conjunction with the network device. In the embodiments of the present application, only the device for implementing the functions of the network device is used as an example to illustrate, and does not constitute a limitation on the solutions of the embodiments of the present application.

[0195] The terminal device in this application may also be referred to as user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent or user device.

[0196] The terminal device may be a device that provides voice / data, such as a handheld device or vehicle-mounted device with a wireless connection function. At present, some examples of terminals are: mobile phones, tablet computers, laptop computers, PDAs, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, wearable devices, terminal devices in 5G networks or future evolved public land mobile communication networks (PLMNs). The terminal device in the PLMN network, the device in the ZigBee network, the device in the Lora network, the Bluetooth slave (BT slave), the BLE slave, the Wi-Fi station (STA), etc. The embodiment of the present application is not limited to this.

[0197] A terminal device can also be a terminal device in an IoT system, also known as an IoT node. IoT is a crucial component of future information technology development. Its primary technical feature is connecting objects to the network through communication technologies, thereby enabling intelligent networks that interconnect humans and machines, and objects and things. Connections can be achieved through both broadband and narrowband technologies. IoT technology, for example, uses narrowband (NB) technology to achieve massive connections, deep coverage, and power-saving terminals. IoT technologies include reflective communication, spread spectrum, and ultra-wideband (UWB), which are not detailed here.

[0198] In addition, terminal devices can also include sensors such as smart printers, train detectors, and gas stations. Their main functions include collecting data (part of the terminal devices), receiving control information and downlink data from network devices, and sending electromagnetic waves to transmit uplink data to network devices.

[0199] As an example and not a limitation, in the embodiment of the present application, the terminal device may also be a wearable device. Wearable devices may also be called wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include those that are fully functional, large in size, and can achieve complete or partial functions without relying on smartphones, such as smart watches or smart glasses, as well as those that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0200] In the embodiments of the present application, the device for realizing the function of the terminal device can be a terminal device, or a device capable of supporting the terminal device to realize the function, such as a chip system, which can be installed in the terminal device or used in combination with the terminal device. In the embodiments of the present application, the chip system can be composed of a chip, or it can include a chip and other discrete devices. In the embodiments of the present application, only the terminal device is used as an example for description, and the embodiments of the present application are not limited to the solutions of the embodiments of the present application.

[0201] The terminal device in this application can be a hardware device, a software function running on dedicated hardware, a software function running on general-purpose hardware, or a virtualized device, for example, implemented by general-purpose hardware and instantiated virtualization functions, or by dedicated hardware and instantiated virtualization functions. The general-purpose hardware can be a server, such as a cloud server.

[0202] The network equipment and / or terminal equipment can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; can also be deployed on the water; and can also be deployed in the air on aircraft, balloons, and satellites. The embodiments of this application do not limit the scenarios in which the network equipment and terminal equipment are located.

[0203] Figure 1 is a schematic diagram of the architecture of a communication system 10 used in an embodiment of the present application. Figure 1 shows a schematic diagram of a possible, non-limiting system architecture. As shown in Figure 1, the communication system 10 includes a radio access network (RAN) 100 and a core network 200. Optionally, the communication system 10 also includes the Internet 300. The RAN 100 may include at least one RAN node (such as 110a and 110b in Figure 1) and may also include at least one terminal device (such as 120a-120j in Figure 1). The terminal device can be connected to the radio access network device via a wireless connection. Terminal devices and radio access network devices can be connected to each other via a wired or wireless connection. The RAN node 110 is connected to the core network 200 via a wireless or wired connection. The core network devices in the core network 200 and the RAN node 110 in the RAN 100 can be different physical devices, or they can be the same physical device that integrates the core network logical functions and the radio access network logical functions.

[0204] FIG1 is only a schematic diagram. The communication system 10 may further include other network devices, such as wireless relay devices and wireless backhaul devices, which are not shown in FIG1 .

[0205] The RAN 100 may be a cellular system related to the Third Generation Partnership Project (3GPP), such as a 4G or 5G mobile communication system, or a future-oriented evolutionary system (such as a 6G mobile communication system). The RAN 100 may also be an ORAN, a cloud radio access network (CRAN), a ZigBee network system, or a wireless fidelity (Wi-Fi) system. The RAN 100 may also be a communication system that integrates two or more of the above systems.

[0206] The RAN node can be a base station deployed in the air, such as a satellite base station 110a, or a base station deployed indoors, such as a micro base station or indoor station 110b. It should be understood that this application does not limit the specific technologies and device forms used by wireless access network devices. For ease of description, the following description uses a base station as an example of a wireless access network device.

[0207] The terminal device can be a terminal device deployed in the air, such as the helicopter or drone 120i in Figure 1; it can also be a terminal device deployed on the ground, such as the mobile phones 120a, 120e, 120f and 120j, vehicle 120b, computer 110b, printer 120h, etc. in Figure 1.

[0208] Optionally, the terminal device can also be used to act as a RAN node. For example, the UE can act as a scheduling entity that provides sidelink signals between terminal devices in vehicle-to-everything (V2X), device-to-device (D2D), or peer-to-peer (P2P) scenarios.

[0209] RAN nodes and terminal devices can be fixed or mobile. They can be deployed on land, indoors or outdoors, handheld or vehicle-mounted; on water; or in the air on aircraft, balloons, and satellites. The embodiments of this application do not limit the application scenarios of RAN nodes and terminal devices.

[0210] The roles of RAN nodes and terminal devices can be relative. For example, the helicopter or drone 120i in Figure 1 can be configured as a RAN node. For terminal devices 120j accessing the RAN 100 via 120i, terminal device 120i is a RAN node. However, for RAN node 110a, 120i is a terminal device, meaning that communication between 110a and 120i occurs via a wireless air interface protocol. Of course, communication between 110a and 120i can also occur via an interface protocol between RAN nodes. In this case, 120i is also a RAN node relative to 110a. Therefore, RAN nodes and terminal devices can be collectively referred to as communication devices. 110a, 110b, and 120a-120j in Figure 1 can be referred to as communication devices with their respective functions, such as communication devices with RAN node functions or communication devices with terminal functions.

[0211] In the embodiments of the present application, the functions of the RAN node may also be performed by a module (such as a chip) in the RAN node, or by a control subsystem that includes the RAN node functions. The control subsystem that includes the RAN node functions here may be a control center in the application scenarios of the above-mentioned terminals, such as smart grid, industrial control, smart transportation, and smart city. The functions of the terminal device may also be performed by a module (such as a chip) in the terminal device, or by a device that includes the terminal device functions. This application does not limit this.

[0212] Figure 2 is a schematic diagram of several different communication scenarios applicable to the communication method provided in the embodiments of the present application. For example, point-to-point transmission between RAN nodes and terminals or between terminals (such as (a) in Figure 2 is point-to-point transmission between RAN nodes and terminals), multi-hop transmission between RAN nodes and terminals (such as (b) in Figure 2, (c) in Figure 2), dual connectivity (DC) of multiple RAN nodes and terminals (such as (d) in Figure 2) or multi-connection scenarios. It should be noted that the above specific communication application scenarios are only examples and do not create limitations. In particular, from a business perspective, the embodiments of the present application are applicable to many business scenarios, such as data coding scenarios in extended reality (XR) services, uplink large-capacity scenarios, etc. In addition, Figure 2 does not impose any restrictions on the network architecture applicable to the present application, and the present application does not limit uplink, downlink, access link, backhaul link, sidelink (SL) and other transmissions.

[0213] In order to better understand the method provided by this application, the signal processing process of the physical layer is briefly described below with reference to FIG3 .

[0214] When sending information data, the transmitter can divide the transport block (TB) from the MAC layer into multiple TBs according to the size of the transport block (TB) supported by the system, and add a cyclic redundancy check (CRC) code to each TB. If the size of the TB after adding the CRC code exceeds the maximum code block length, the TB can be segmented to obtain multiple code blocks CB. Each segmented CB can be further added with a CRC code to obtain the input to be encoded corresponding to each CB. It can be understood that the input to be encoded is a string of bit sequences to be encoded, which may specifically include the information bits and check bits (i.e., CRC code) in the corresponding CB.

[0215] The transmitter can perform channel coding on the input to be coded, such as LDCP coding or Polar coding, to obtain corresponding coded code blocks, perform rate matching on the coded code blocks, and concatenate the rate-matched code blocks to form a codeword (CW).

[0216] The transmitter scrambles the codewords to generate scrambled bits. These scrambled bits are modulated to produce modulation symbols. After RE mapping, the modulation symbols are mapped to multiple REs, resulting in the value carried by each RE. Based on the values ​​carried by these REs, the transmitter generates a baseband signal. The baseband signal is upconverted to a passband signal, which is then transmitted through the antenna after power amplification and other operations.

[0217] The receiving end receives the signal through the antenna. After receiving the passband signal from the transmitting end, the receiving end can downconvert the passband signal to obtain the baseband signal. After that, the receiving end's physical layer can sequentially perform RE demapping, demodulation, descrambling, rate matching, and channel decoding (or decoding) on ​​the signal to obtain the pre-encoded bit sequence, which can specifically include information bits and check bits.

[0218] Optionally, after completing RE demapping and before performing demodulation, the receiving end may also perform channel equalization. Channel equalization uses an equalization algorithm to remove the effects of the channel based on channel estimation, thereby ensuring correct signal demodulation. It will be understood that the information bits received by the receiving end correspond to the information bits to be sent by the transmitting end.

[0219] Optionally, after completing modulation and before performing RE mapping, the transmitter can also perform layer mapping and precoding. For example, the transmitter can map the modulation symbols to multiple layers, and then precode the modulation symbols after layer mapping to obtain a precoded signal. The precoded signal is mapped to multiple REs through RE mapping. Correspondingly, before completing RE demapping and performing channel equalization, the receiver can also perform layer demapping and deprecoding to perform channel equalization.

[0220] Since the specific implementation of each step in FIG3 can be implemented by existing technologies, please refer to the 3rd Generation Partnership Project (3 rd The relevant sections in the 3GPP technical specification (TS) 38.211 are not described in detail here.

[0221] In 3G and 4G mobile communication systems, iterative (Turbo) codes, a convolutional code technology defined by the 3GPP standard, offer excellent performance, very close to the Shannon limit. In the 5G era, data transmission rates are orders of magnitude higher than those of 4G. Turbo codes, based on serial processing, struggle to effectively support such high-speed data transmission. At the same time, the 5G era presents a richer range of service applications and new requirements for channel coding. For example, massive machine-type communication (mMTC) scenarios require smaller data packets, while ultra-reliable low-latency communication (URLLC) scenarios place stringent requirements on coding latency and low bit error. Therefore, based on the key channel coding requirements of the three major 5G application scenarios, LDPC and Polar codes were ultimately adopted in the 5G standard. Compared to traditional linear block codes and convolutional codes, both codes offer superior performance, very close to the Shannon limit. However, they differ in their applicable scenarios and codec complexity.

[0222] With the advent of 6G, a number of real-time, high-data-rate services are emerging, such as XR, MR, and immersive services. These emerging services place higher demands on peak throughput and area efficiency for codecs, with peak rates even reaching terabytes per second (Tbps), while also requiring further reductions in decoder power consumption. 5G's LDPC and Polar codes cannot meet these extremely high requirements. Therefore, for next-generation chip channel codecs, technological breakthroughs are needed in two key areas: high-throughput, low-power codecs and high-reliability codecs.

[0223] Compared to 5G LDPC and Polar codes, two-dimensional product codes can be encoded and decoded in parallel, making it easier to increase product parallelism and peak throughput. Therefore, they are more likely to meet the real-time high data rate service requirements.

[0224] For ease of understanding, the following briefly describes the encoding process of a two-dimensional product code in conjunction with Figure 4. Figure 4 is a schematic diagram of the encoding of a two-dimensional product code. As shown in Figure 4, the encoder of the two-dimensional product code may include two encoders, respectively denoted as component code 1 and component code 2. Component code 1 may use a binary linear code with a code length, information bit length, and shortest distance of (n1, k1, d1) respectively. Component code 2 can use a binary linear code with code length, information bit length, and shortest distance (n2, k2, d2) respectively. A two-dimensional product code can be constructed by the following method: the information bits of length k1×k2 are arranged into a k1×k2 matrix, that is, the k1×k2 information bits are arranged into k1 row vectors and k2 column vectors. Component code 1 can encode each of the k1 row vectors to obtain a k1×n2 matrix, each of which includes k1 information bits and (n2-k1) check bits; component code 2 can encode each of the k2 column vectors to obtain a k2×n1 matrix, each of which includes k2 information bits and n1 check bits. The check bits in the figure can be the check bits obtained by encoding k1×(n2-k1) check bits, or the check bits obtained by encoding (n1-k1)×k2 check bits. Thus, an n1×n2 matrix can be obtained. That is, a matrix consisting of and A deterministic two-dimensional product code word of length n1×n2.

[0225] It's easy to see that two-dimensional product codes are obtained through component coding. By using two encoders (i.e., component code 1 and component code 2) to perform encoding in parallel, processing parallelism is high, which helps improve throughput. However, due to the need for component coding, the information bits to be encoded must first be arranged into a two-dimensional matrix. Therefore, the number of rows and columns of this two-dimensional matrix, referred to as k1 and k2 above, must be predefined so that both the encoder and decoder can process based on the same dimensions.

[0226] However, in wireless communications, data transmission volumes vary. Some services, such as audio and video, may require large data volumes, while others, such as mMTC and URLLC, may require smaller data volumes. If two-dimensional product codes are used for channel coding, the predefined two-dimensional matrix may not be able to accommodate a variety of different transmission volumes, limiting flexibility.

[0227] This application provides a method for arranging multiple bits to be encoded using a coding unit as the granularity, and then encoding the arranged input to be encoded. A coding unit can include one or more bits, so the size of the coding unit can be flexibly adjusted according to the amount of data transmitted, thereby adapting to a variety of different data transmission amounts. Furthermore, since the size of the coding unit can be flexibly adjusted, the number of parity bits obtained by encoding can also be flexibly adjusted within a larger range, thereby facilitating adaptive adjustment of the bit rate.

[0228] The encoding method and decoding method provided by this application will be described below with reference to the accompanying drawings.

[0229] Figure 5 is a schematic flow chart of an encoding method provided in an embodiment of the present application. The encoding method shown in Figure 5 can be performed by a first communication device, which can be, for example, a communication device such as a network device or a terminal device, or a component configured in the communication device, such as a chip, a chip system, a processor, etc. It can also be a logic module or software that can implement some or all of the functions of the communication device, etc. This application does not limit this.

[0230] The encoding method 500 shown in Figure 5 includes steps 510 to 530. Each step in the method 500 is described in detail below.

[0231] In step 510, a first bit sequence is obtained, where the first bit sequence includes a plurality of bits.

[0232] As can be seen from the physical layer processing described above in conjunction with FIG3 , the first bit sequence includes one or more information bits to be encoded. For example, the first bit sequence can be a sequence consisting of information bits in a CB, that is, the first bit sequence includes multiple information bits to be encoded. The first bit sequence can also be a sequence obtained by adding parity bits to the CB, that is, the first bit sequence includes multiple information bits to be encoded and at least one parity bit. In summary, the first bit sequence includes multiple bits to be encoded.

[0233] Optionally, the first bit sequence may also be a bit sequence that has undergone other processing, such as a bit sequence obtained by interleaving the above sequence with added check bits, etc. This can improve the anti-interference capability of signal transmission and the decoding performance.

[0234] In step 520, the plurality of bits are processed to obtain a first input to be encoded having a first pattern.

[0235] That is, the multiple bits in the first bit sequence are processed to obtain a first input to be encoded. It can be understood that the first input to be encoded includes the multiple bits in the first bit sequence. Since the encoding process can be implemented by an encoder, the first input to be encoded can also be understood as the multiple bits to be input to the encoder.

[0236] In the present application, the first input to be encoded has a first pattern. That is to say, the elements in the first input to be encoded are arranged according to the style of the first pattern. Here, element (element) can also be understood as the minimum granularity of the first input to be encoded arranged to have the first pattern. Each element may include one or more bits in the first bit sequence. In other words, the first input to be encoded is arranged with elements as the granularity, rather than with bits as the granularity. Compared to a two-dimensional product code, a bit is expanded into an element, and an element can include one or more bits, so the element can also be called an expansion factor (lifting size). At the encoding end, since one or more bits in each element will be input to the encoder for encoding, each element can also be called a coding unit, coding element, or unit, etc. This application is not limited to this.

[0237] Each coding unit can be a one-dimensional vector or a two-dimensional matrix. In other words, each coding unit can be a one-dimensional or two-dimensional array.

[0238] For ease of understanding, Figure 6 shows several examples of coding units. As shown in (a) of Figure 6, the coding unit is a two-dimensional matrix of M1×M2, that is, the coding unit may include M1×M2 bits. As shown in (b) of Figure 6, the coding unit is a one-dimensional row vector of length M2, that is, the coding unit includes M2 bits. As shown in (c) of Figure 6, the coding unit is a one-dimensional column vector of length M1, that is, the coding unit may include M1 bits. Wherein, M1 and M2 can both be positive integers.

[0239] It should be understood that M1 and M2 above are only examples. This application does not limit the dimension of the coding unit, nor does it limit the number of bits contained in each dimension, nor the arrangement of one or more bit coding units.

[0240] Specifically, the arrangement can be rows first, columns second, or columns first, rows second. Rows first, columns second means arranging by rows first, then by columns. Specifically, the bits can be arranged by rows (e.g., from left to right or from right to left), and when a row is full, the next row is moved to the next. The arrangement order of different rows can be predefined, such as from top to bottom or from bottom to top. If each row is considered as a whole, multiple rows can be considered as a column, and the arrangement of multiple rows can also be considered as the arrangement of a column.

[0241] Columns first, rows second. Specifically, bits can be arranged by column (e.g., from top to bottom) first, and then moved to the next column after a column is full. The order of columns can be predefined, such as from left to right or from right to left. If each column is considered a whole, multiple columns can be arranged into a row, and the arrangement of multiple columns can also be considered as the arrangement of a row.

[0242] Optionally, among the multiple coding units included in the first input to be encoded, different coding units include the same number of bits.

[0243] For example, each coding unit in the multiple coding units includes M1×M2 bits.

[0244] Multiple coding units with the same number of bits may have the same dimensions or different dimensions, and this application does not limit this. For example, each coding unit may be a two-dimensional matrix of M1×M2; for another example, some coding units may be two-dimensional matrices of M1×M2, and some coding units may be two-dimensional matrices of M2×M1; for another example, some coding units may be two-dimensional matrices of M1×M2, and some coding units may be one-dimensional vectors of length M1×M2, and so on, without limitation.

[0245] In different coding units, the arrangement of one or more bits in their respective coding units may be the same or different. For example, assuming that the multiple coding units are all two-dimensional matrices, each coding unit is arranged in the order of rows first and columns second, and arranged in order from left to right when arranged in rows, and arranged in order from top to bottom when arranged in columns; or, some coding units are arranged in the order of rows first and columns second, and some coding units are arranged in the order of columns first and rows second, and arranged in order from left to right when arranged in rows, and arranged in order from top to bottom when arranged in columns.

[0246] Optionally, among the multiple coding units included in the first input to be encoded, at least two coding units include different numbers of bits.

[0247] For example, some coding units include M1 bits, and some coding units include M2 ​​bits. The dimensions of each coding unit can also be different. The arrangement of bits in each coding unit can be the same or different. A more detailed description of the dimensions of the coding units and the arrangement of bits in the coding units can be found above and will not be repeated here.

[0248] The first pattern is a type of pattern. A pattern may also be called a basic graph, a basic pattern, a basic model, etc. This application does not limit this.

[0249] The first pattern may be used to indicate the distribution of multiple coding units in a first input to be encoded having the first pattern in one or more dimensions. In the first input to be encoded having the first pattern, the multiple coding units may be distributed in one dimension or in multiple dimensions. One or more coding units may be distributed in each dimension of the first input to be encoded.

[0250] It should be noted that the input to be encoded (such as the first input to be encoded) can be viewed as arranging multiple coding units in the form of a pattern (such as the first pattern), or it can be viewed as filling multiple coding units into different positions in the pattern. The pattern itself does not contain coding units, but is only used to indicate the distribution of multiple coding units in various dimensions of the pattern, and does not limit the number of bits included in each coding unit, the arrangement method, or the dimensions of the coding units. Therefore, the pattern can also be viewed as a model used to constrain the distribution of multiple coding units in the input to be encoded.

[0251] For the convenience of distinction and explanation, the units included in the pattern and distributed in one or more dimensions are recorded as pattern units in this document. The pattern unit can be regarded as the smallest unit for describing the arrangement of the pattern, or the smallest granularity. The pattern can be used to indicate the distribution of multiple pattern units in one or more dimensions. The arrangement of pattern units is different in different patterns. Each pattern unit can be used to carry (or fill) a coding unit. Each coding unit can correspond to a pattern unit. Since the first input to be encoded has a first pattern, and the first input to be encoded includes multiple coding units, the first pattern can be used to indicate the distribution of the multiple coding units in one or more dimensions.

[0252] The following describes the patterns in detail with reference to Figures 7 to 18. It should be understood that the first pattern can be any one of the multiple patterns exemplified below, or can be obtained by combining two or more of the multiple patterns exemplified below, or can be obtained by performing a simple transformation based on the patterns exemplified below. This application does not limit the specific form of the first pattern.

[0253] Optionally, the multiple pattern units in the pattern are distributed in one dimension. That is, the pattern includes and only includes multiple pattern units distributed in one dimension. In other words, the positions of the projections of the multiple pattern units in any other dimension perpendicular to the dimension in which they are located are the same, or in other words, they overlap. For example, the pattern is in the form of a bar, or in other words, a line. If each pattern unit is regarded as an element, the pattern can be a row vector or a column vector. The pattern can indicate the distribution of multiple coding units in this dimension.

[0254] Figure 7 shows two examples of patterns. The pattern shown in Figure 7 (a) is a column vector consisting of K1 pattern units, that is, the length of the column vector is K1. Assuming that this pattern is the first pattern, the first input to be encoded having this first pattern includes K1 coding units distributed in the vertical direction.

[0255] The pattern shown in (b) of FIG7 is a row vector consisting of K2 pattern units, that is, the length of the row vector is K2. Assuming that the pattern is the first pattern, the first input to be encoded having the first pattern includes K2 coding units distributed in the horizontal direction.

[0256] Optionally, the multiple pattern units in the pattern are distributed in two dimensions. That is, the pattern includes pattern units distributed in two dimensions. In other words, the positions of the projections of the multiple pattern units in any of the two dimensions are not exactly the same, or in other words, they do not completely overlap. The pattern can indicate the distribution of the multiple coding units in the two dimensions.

[0257] For example, the pattern is rectangular. As can be seen, the pattern shown in Figure 8 is a regular pattern. If each pattern unit is regarded as an element, the pattern can be a two-dimensional matrix. Figure 8 shows an example of a pattern. As shown in the figure, the pattern includes K1 row vectors and K2 column vectors, forming a two-dimensional matrix of K1×K2, where K1 and K2 are both positive integers. In other words, the pattern includes K1 groups of pattern units distributed in the horizontal direction, each group of pattern units includes K2 pattern units, or in other words, the pattern includes K2 groups of pattern units distributed in the vertical direction, each group of pattern units includes K1 pattern units. Assuming that the pattern is the first pattern, the first input to be encoded having the first pattern includes K1 groups of encoding units distributed in the horizontal direction, each group of encoding units includes K2 encoding units; or in other words, the first input to be encoded having the first pattern includes K2 groups of encoding units distributed in the vertical direction, each group of encoding units includes K1 encoding units.

[0258] For another example, the pattern is a step-type. That is to say, the pattern can also be an irregular pattern. Figure 9 shows several examples of patterns. The pattern shown in (a) in Figure 9 includes 2 row vectors, which can be regarded as a row vector in a two-dimensional matrix offset by 2 pattern units to the right or left relative to the other row vector, that is, the offset is 2 pattern units. For example, the second row in the figure is shifted to the right by an offset of 2 pattern units relative to the first row, or the first row in the figure is shifted to the left by an offset of 2 pattern units relative to the second row. Assuming that the pattern is the first pattern, the first input to be encoded with the first pattern includes two groups of encoding units distributed in the horizontal direction, that is, two rows in the figure, each group of encoding units includes 4 encoding units, and there is an offset of 2 encoding units between the two groups of encoding units.

[0259] When an offset occurs, the offset can be performed with a row vector as the granularity, or with multiple row vectors as the granularity. For example, the pattern shown in (b) in Figure 9 includes 4 row vectors, and the 4 row vectors can be regarded as two row vectors in a two-dimensional matrix offset by 2 pattern units to the right or left relative to the other two row vectors. Assuming that the pattern is the first pattern, the first input to be encoded with the first pattern includes four groups of encoding units distributed in the horizontal direction, that is, four rows in the figure, each group of encoding units includes 4 encoding units, and there is an offset of 2 encoding units between every two groups of encoding units.

[0260] The offset is also not limited to 2. For example, in the pattern shown in (c) of Figure 9 , the offset between every two adjacent row vectors is 1 pattern unit. Assuming that this pattern is the first pattern, the first input to be encoded having the first pattern is distributed in four groups of encoding units in the horizontal direction, that is, four rows or four columns in the figure, where each of the three groups of encoding units includes 2 encoding units, and the other group of encoding units includes 1 encoding unit, and there is an offset of 1 encoding unit between every two encoding units.

[0261] It can be seen that the staircase pattern is not necessarily obtained by offsetting the row or column vectors in a regular pattern. For example, the pattern shown in (c) in FIG9 is also irregular before the offset.

[0262] It should be understood that, in the description of the staircase pattern above, for ease of understanding, the staircase pattern is described as a pattern obtained by offsetting a regular or irregular pattern, which should not constitute any limitation to this application. In a specific implementation, it is not necessary to perform this offset operation, and the staircase pattern can also be pre-stored.

[0263] It should also be understood that FIG9 is only for the convenience of understanding and explanation, and uses specific numerical values ​​to describe the distribution of pattern units in each pattern. This application does not limit the number of pattern units in each pattern in each dimension.

[0264] Optionally, the multiple pattern units in the pattern are distributed three-dimensionally. That is, the pattern includes pattern units distributed in three dimensions. In other words, the positions of the projections of the multiple pattern units in any of the three dimensions are not exactly the same, or in other words, they do not completely overlap. The pattern can indicate the distribution of the multiple coding units in the three dimensions.

[0265] For example, the pattern is in the shape of a rectangular parallelepiped. That is to say, the pattern can be a regular pattern. Figure 10 shows an example of a pattern. As shown in the figure, the pattern is a three-dimensional matrix of K1×K2×K3, where K1, K2 and K3 are all positive integers. The pattern includes K2 pattern units in the x-direction, K1 pattern units in the y-direction, and K3 pattern units in the z-direction. The x-direction, y-direction and z-direction are examples of the three dimensions in the pattern. It can be seen that the positions of the projections of the multiple pattern units in the x-direction, y-direction and z-direction are not exactly the same, or in other words, they do not completely overlap.

[0266] The pattern includes K2 groups of pattern units distributed in the x-direction, each group of pattern units including K1×K3 pattern units; or, the pattern includes K1 group of pattern units distributed in the y-direction, each group of pattern units including K2×K3 pattern units; or, the pattern includes K3 groups of pattern units distributed in the z-direction, each group of pattern units including K1×K2 pattern units. Assuming that the pattern is a first pattern, the first input to be encoded having the first pattern includes K2 groups of encoding units distributed in the x-direction, each group of encoding units including K1×K3 encoding units; or, the first input to be encoded having the first pattern includes K1 group of encoding units distributed in the y-direction, each group of encoding units including K2×K3 encoding units; or, the first input to be encoded having the first pattern includes K3 groups of encoding units distributed in the z-direction, each group of encoding units including K1×K2 encoding units.

[0267] It should be understood that the pattern shown in FIG10 is only an example of a three-dimensional distribution. The pattern may also be irregularly distributed in three dimensions. For the sake of brevity, the figure is not listed here.

[0268] It should also be understood that the patterns shown in Figures 7 to 10 are merely illustrations of several possible patterns for ease of understanding and should not constitute any limitation on this application. This application does not limit the direction of each dimension of the pattern or the number of pattern units distributed in each dimension.

[0269] In an embodiment of the present application, the first pattern is used to indicate the distribution of multiple coding units in one or more dimensions, including: the first pattern is used to indicate the number of multiple coding units distributed in each dimension.

[0270] It can be understood that since the multiple coding units are coding units in the first input to be encoded, and the first input to be encoded is an input to be encoded with a first pattern, the first pattern is used to indicate the number of multiple coding units in the first input to be encoded distributed in each dimension.

[0271] The above description illustrates multiple examples of patterns in conjunction with various figures. The first pattern can be any of the multiple patterns exemplified above. In other words, the pattern can be used to indicate the number of pattern units distributed in each dimension. As can be seen from the above examples, the first pattern can be a regular pattern. Therefore, by indicating the number of pattern units in each dimension, the distribution of multiple coding units in each dimension in the first input to be encoded having the first pattern can be determined.

[0272] In one possible implementation, the first pattern may indicate the number of coding units distributed in each dimension in the form of a one-dimensional vector, a two-dimensional matrix, or an array of multiple dimensions. The form of the one-dimensional vector, the two-dimensional matrix, or the array of multiple dimensions can be specifically described in the examples described above in conjunction with the multiple figures, and will not be repeated here.

[0273] For example, the pattern shown in FIG7(a) can indicate that the number of pattern units distributed in one dimension is K1 by a one-dimensional vector of length K1; the pattern shown in FIG7(b) can indicate that the number of pattern units distributed in one dimension is K2 by a one-dimensional vector of length K2; the pattern shown in FIG8 can indicate that the number of pattern units distributed in the horizontal direction (i.e., one dimension) is K2 and the number distributed in the vertical direction (i.e., another dimension) is K1 by a two-dimensional matrix of dimensions K1×K2; the pattern shown in FIG10 can indicate that the number of pattern units distributed in the x-axis direction (i.e., one dimension) is K2, the number distributed in the y-axis direction (i.e., another dimension) is K1, and the number distributed in the z-axis direction (i.e., another dimension) is K3 by a three-dimensional array of dimensions K1×K2×K3. And so on and so forth.

[0274] Optionally, the first pattern is used to indicate distribution of multiple coding units in one or more dimensions, and further includes: the first pattern is used to indicate blank positions.

[0275] As can be seen from the above example, the first pattern can also be an irregular pattern. That is, the multiple pattern units in the first pattern can include at least one pattern unit for carrying a coding unit and at least one pattern unit not for carrying a coding unit. In other words, the first pattern can include at least one blank pattern unit.

[0276] For an irregular pattern, the first pattern may indicate not only the number of pattern units distributed in each dimension but also blank positions, thereby determining the distribution of multiple coding units in each dimension in the first input to be encoded having the first pattern.

[0277] Since the first pattern can be any one of the multiple patterns exemplified above, it can also be said that the pattern can be used to indicate a blank position.

[0278] In a possible implementation, the first pattern may indicate the blank position in the form of a one-dimensional vector, a two-dimensional matrix, or an array of multiple dimensions.

[0279] Figure 11 shows another example of a pattern. The patterns shown in (a) and (b) of Figure 11 are the same, including at least one pattern unit used to carry coding units and at least one pattern unit not used to carry coding units. Pattern units that can be used to carry coding units are represented by "X" in the figure, and pattern units that are not used to carry coding units are represented by "0" in the figure. This pattern can indicate blank positions by filling them with "0".

[0280] In another implementation, when the first pattern is used to indicate a blank position, it may specifically indicate the row number and column number of the blank pattern unit in the pattern, or indicate the number of the pattern unit in the pattern.

[0281] As shown in FIG11(a), the rows are numbered sequentially starting from 1 from top to bottom, and the columns are numbered sequentially starting from 1 from left to right, resulting in the numbering of each row and column as shown in the figure. Based on the row and column numbers, the pattern can indicate the blank positions as follows: {column 1, rows 2 to 4}, {column 2, rows 3 to 4}, {column 3, row 4}, {column 4, row 1}, {column 5, rows 1 to 2}, and {column 6, rows 1 to 3}.

[0282] As shown in Figure 11(b), if the pattern elements are numbered in rows first and columns second, the numbers of the pattern elements are as shown in the figure. Due to limited space, the numbers of all pattern elements are not shown in full, but the numbers of the remaining pattern elements can be inferred from the numbers of some of the pattern elements shown in the figure. Based on the numbering of the pattern elements, the pattern can indicate the blank positions: {pattern elements numbered 4, 5, 6, 7, 11, 12, 13, 14, 18, 19, 20, and 21}.

[0283] It should be noted that the pattern unit that is not used to carry the coding unit, that is, the information or data carried in the pattern unit does not need to be encoded, so the pattern shown in Figure 11 can also be understood as a pattern equivalent to Figure 12. In other words, in an irregular pattern similar to that shown in (a) to (c) in Figure 9, the position where the pattern unit is not placed can also be understood as a blank position. Therefore, for the indication of the blank position in the irregular pattern, the blank position can also be determined and indicated by converting the irregular pattern into a regular pattern. For example, in the pattern shown in (a) of Figure 9, the blank position is located at {row 1, column 5 and column 6}, and {row 2, column 1 and column 2}. The pattern can indicate the blank position as: {row 1, column 5 and column 6}, and {row 2, column 1 and column 2}. And so on, for the sake of brevity, no more examples are given.

[0284] In any of the patterns shown above in conjunction with Figures 7 to 12, the number of bits included in the coding units mapped to each pattern unit can be the same or different. For ease of explanation, the number of bits included in the coding unit is recorded as the size of the coding unit. Since the first pattern can be one of the multiple patterns listed above, in the first to-be-encoded unit having the first pattern, the number of bits included in different coding units is the same, or the number of bits included in at least two coding units is different.

[0285] The following uses Figures 13 and 14 as examples.

[0286] Figures 13 and 14 show two examples of inputs to be encoded with different patterns. For ease of distinction and understanding, the size of a coding unit is represented by "X" or "Xi", where i can be any integer, and different i means different values ​​of Xi.

[0287] The pattern shown in (a) of Figure 13 is rectangular and is a regular pattern. The multiple coding units in the input to be encoded with this pattern have the same size, represented by "X" in the figure. For example, each coding unit has a size of 4×4.

[0288] Figure 13 (b) is different from Figure 11 (a). Although the pattern shown in Figure 11 (b) is rectangular, the sizes of multiple coding units in the input to be encoded with this pattern can be different. As shown in the figure, the size of the coding units in the two left columns is X1, and the size of the coding units in the four right columns is X2, where X1 and X2 are different. For example, the size of the coding units in the two left columns is 4×2, and the size of the coding units in the four right columns is 4×4.

[0289] The pattern shown in Figure 14 (a) is a stepped, irregular pattern. The sizes of the different coding units in the input to be encoded with this pattern are the same, all represented by "X" in the figure. Unlike Figure 14 (a), the sizes of the multiple coding units in the input to be encoded with this pattern shown in Figure 14 (b) can be different. This input to be encoded includes six coding units of different sizes, represented by X1 to X6 in the figure, where X1, X2, X3, X4, X5, and X6 are different from each other.

[0290] It should be understood that this article is only for the sake of ease of understanding. Figures 13 and 14 are used as examples to show the input to be encoded including multiple encoding units of different sizes. In fact, the input to be encoded having any of the patterns shown in Figures 7 to 12 above can include encoding units of the same size or encoding units of different sizes. For the sake of brevity, they are no longer listed.

[0291] Optionally, the first pattern is further used to indicate a style (or structure) of coding units distributed in each dimension.

[0292] As mentioned above, the multiple coding units in the first input to be encoded may be coding units of different sizes, and the first pattern may further indicate the size of each coding unit distributed in each dimension. In fact, even coding units of the same size may have differences such as different dimensions and different arrangements. Based on this, the first pattern can also be used to indicate the style of the coding unit in each dimension. Coding units of different styles differ in at least one of the following: dimension, the number of bits included in each dimension, or the arrangement of one or more bits in the coding unit. In the first input to be encoded with the first pattern, the multiple coding units distributed in the same dimension may be coding units of the same style or coding units of different styles. This application does not limit this.

[0293] For example, the first pattern can indicate different styles of coding units through different indexes, and each style of coding unit can be identified by an index. When the first pattern is indicated by a one-dimensional vector, a two-dimensional matrix, or an array of multiple dimensions, the style of the coding unit at that position can be indicated by indicating an index in each element. For example, "Xi" in (b) of Figure 13 and (b) of Figure 14 can be regarded as an example of the above-mentioned index for indicating coding units of different styles.

[0294] Since there is no constraint on the number of bits included in different coding units in the encoding input, the number of bits in different coding units can be flexibly configured according to different data transmission volumes and different business requirements, thereby more accurately controlling the bit rate and improving decoding performance.

[0295] Optionally, the pattern can also be used to indicate the coding position, and the coding unit located at the coding position in the input to be encoded with the pattern is the coding unit to be encoded. It can be understood that the coding unit to be encoded can be one or more. For the convenience of explanation, the one or more coding units to be encoded are referred to as coding blocks here. The coding block may include one or more pattern units, and the coding units carried in one or more pattern units in the coding block are the coding units to be encoded, or in other words, the coding units that need to be encoded. Therefore, the pattern can be used to indicate the coding position, or it can be said that the pattern can be used to indicate the position of the coding block. By indicating the coding position (or the position of the coding block), it can be determined which coding units in the input to be encoded need to be encoded.

[0296] The following will describe the coding block and the method of using the pattern to indicate the coding position in conjunction with the accompanying drawings. For ease of distinction and explanation, the pattern units in the coding block are shown in the drawings as boxes with filled patterns.

[0297] In a one-dimensional pattern, a coding block can include one or more pattern elements in the pattern. Figure 15 shows an example of a coding block. If each pattern element is considered an element, the pattern shown in Figure 15 is a row vector. A coding block includes some of the pattern elements in the pattern. For example, the pattern includes eight pattern elements, and the coding block includes the four pattern elements on the left.

[0298] For example, one possible implementation of the pattern for indicating a coding block is to indicate the number of the pattern units included in the coding block. Assuming that the pattern units in the pattern are numbered sequentially from left to right starting from 1, in the pattern shown in FIG15 , the coding block includes four pattern units numbered 1 to 4. When the pattern is used to indicate the position of a coding block, it can specifically indicate: {the pattern units are numbered 1 to 4}.

[0299] It should be understood that the numbering of pattern elements in a pattern can be determined according to a preset rule. For example, the preset rule may include one or more of the following: numbering from left to right, numbering from top to bottom, numbering from front to back, or a starting value for the numbering. The starting value can be 1, 0, or any integer value, and the starting value in each direction can be the same or different. This application does not limit this.

[0300] In a two-dimensionally distributed pattern, the coding blocks may also be distributed in two dimensions. A coding block may include one or more rows and / or one or more columns in the pattern, or a coding block may include some or all pattern elements in each row of one or more rows in the pattern, and / or some or all pattern elements in each column of one or more columns. For ease of distinction and explanation, the row where the coding block is located is referred to as the coding row, and the column where the coding block is located is referred to as the coding column, i.e., the coding block is located in the coding row and / or coding column.

[0301] If a coding block includes one or more rows and / or one or more columns in a pattern, the coding block can be said to include coding rows and / or coding columns. One possible implementation method of the pattern for indicating the position of the coding block is to indicate the row number of the coding row and / or the column number of the coding column.

[0302] Figure 16 is another example of a coding block. The coding block shown in Figure 16 includes some columns in the pattern, or in other words, includes all pattern units in some columns in the pattern. As shown in the figure, the pattern includes 6 columns, and the coding block includes 1 column located on the leftmost side. Assuming that the column numbers in the pattern are numbered from 1 in order from left to right, the column number of the coding column included in the coding block in the pattern shown in Figure 16 is 1. When the pattern is used to indicate the position of the coding block, it can specifically indicate: {column number is 1}.

[0303] If the coding block includes part or all of the pattern units in each of one or more rows in the pattern, and / or part or all of the pattern units in each of one or more columns, one possible implementation method for the pattern to indicate the position of the coding block is to indicate the row number of the coding row in which the pattern unit in the coding block is located and the number of the pattern unit in the coding row, and / or the column number of the coding column in which the pattern unit in the coding block is located and the number of the pattern unit in the coding column.

[0304] Figure 17 is another example of a coding block. The coding block shown in Figure 17 includes some pattern units in some columns in the pattern. As shown in the figure, the coding block is located in the upper two pattern units in the leftmost column. Assuming that the column numbers in the pattern are numbered sequentially from 1 from left to right, and the pattern unit numbers are numbered sequentially from 1 from top to bottom, then in the pattern shown in Figure 17, the pattern units included in the coding block are two pattern units numbered 1 and 2 in a column numbered 1. When the pattern is used to indicate the position of the coding block, it can specifically indicate: {column number 1, and pattern unit numbers 1 and 2}.

[0305] In another implementation, the pattern may also indicate the number of each pattern unit in the coding block in the pattern. For details, please refer to the above example of the pattern combined with one-dimensional distribution, which will not be repeated here.

[0306] In summary, in a two-dimensionally distributed pattern, when the pattern indicates the position of a coding block, it may specifically indicate one or more of the following: the row number of the coding row, the column number of the coding column, the number of the pattern unit in the coding block in the coding row, the number of the pattern unit in the coding block in the coding column, or the number of the pattern unit in the coding block in the pattern.

[0307] It should be understood that the numbering of rows or columns in the pattern can also be determined according to preset rules, and the numbering of pattern units in each row or column can also be determined according to preset rules. For example, the preset rules may include one or more of the following: numbering in order from left to right, numbering in order from top to bottom, numbering in order from front to back, or a starting value for numbering. The starting value can be 1, 0, or any integer value, and the starting values ​​for numbering different rows and / or different columns can be the same or different. This application does not limit this.

[0308] In a three-dimensionally distributed pattern, a set of planes can be determined for every two dimensions, and three sets of planes can be determined from the three dimensions. Each set of planes can include one plane, or multiple planes parallel to each other. The coding block can exist in at least one plane in the three sets of planes. Similar to the two-dimensionally distributed pattern, in each plane where the coding block is located, the coding block can include coding rows and / or coding columns, or the coding block can also include part or all of the pattern units in each row of one or more rows in the pattern, and / or part or all of the pattern units in each column of one or more columns.

[0309] A possible implementation method for using the pattern to indicate the position of the coding block is to indicate one or more of the following: the number of the plane where the coding block is located, the row number of the coding row in the plane, the column number of the coding column in the plane, the number of the pattern unit in the coding block in the coding row, or the number of the pattern unit in the coding block in the coding column.

[0310] Figures (a), (b), (c), and (d) in Figure 18 are other examples of coding blocks. The pattern shown in Figure 18 is rectangular. For a detailed description, please refer to the description in conjunction with Figure 10 above. For ease of understanding and illustration, Figures (a) through (d) in Figure 18 illustrate the pattern as a set of planes defined by the y-axis and the z-axis.

[0311] The coding block shown in (a) of Figure 18 is located in a plane determined by the y-axis and the z-axis in the pattern. Looking along the z-axis, the coding block includes a column located on the leftmost side of the plane. Assuming that the plane numbers in the pattern are numbered sequentially from 1 along the x-axis and the column numbers are numbered sequentially from 1 along the z-axis, then in the pattern shown in (a) of Figure 18, the coding block is a column numbered 1 in a plane numbered 6 along the x-axis. When the pattern is used to indicate the position of the coding block, it can specifically indicate: {the plane number along the x-axis is 6, and the column number along the z-axis is 1}.

[0312] Alternatively, in another implementation, the coding block shown in (a) of Figure 18 is also located in a plane determined by the x-axis and the y-axis in the pattern. Viewed along the x-axis, the coding block includes a column located on the rightmost side of the plane. Assuming that the plane numbers in the pattern are numbered sequentially from 1 along the z-axis and the column numbers are numbered sequentially from 1 along the x-axis, then in the pattern shown in (a) of Figure 18, the coding block is a column numbered 6 in a plane numbered 1 along the z-axis. When the pattern is used to indicate the position of the coding block, it can specifically indicate: {the plane number along the z-axis is 1, and the column number along the x-axis is 6}.

[0313] The coding block shown in (b) of Figure 18 is located in the three planes determined by the y-axis and the z-axis in the pattern. Looking along the z-axis, the coding block is located in the leftmost column of the three planes. Assuming that the plane numbers in the pattern are numbered sequentially from 1 along the x-axis, and the column numbers are numbered sequentially from 1 along the z-axis, then in the pattern shown in (b) of Figure 18, the coding units included in the coding block are located in a column numbered 1 in the three planes numbered 4 to 6. When the pattern is used to indicate the position of the coding block, it can specifically indicate: {the plane numbers along the x-axis are 4 to 6, and the column number is 1}.

[0314] Alternatively, in another implementation, the coding block shown in (b) of Figure 18 is also located in a plane determined by the x-axis and the y-axis in the pattern. Viewed along the x-axis, the coding block includes three columns located on the right side of the plane. Assuming that the plane numbers in the pattern are numbered sequentially from 1 along the z-axis, and the column numbers are numbered sequentially from 1 along the x-axis, then in the pattern shown in (b) of Figure 18, the coding block is three columns numbered 4 to 6 in a plane numbered 1 along the z-axis. When the pattern is used to indicate the position of the coding block, it can specifically indicate: {the plane number along the z-axis is 1, and the column numbers along the x-axis are 4 to 6}.

[0315] The coding block shown in (c) of Figure 18 is located in the six planes determined by the y-axis and the z-axis in the pattern, or the coding block is located in a plane determined by the x-axis and the y-axis in the pattern. Based on the same method as above, it can be obtained that when the pattern is used to indicate the position of the coding block, it can specifically indicate: {the planes along the x-axis are numbered 1 to 6, and the columns along the z-axis are numbered 1}; or {the planes along the z-axis are numbered 1}.

[0316] The coding block shown in (d) in Figure 18 is located in the six planes determined by the y-axis and the z-axis in the pattern, or the coding block is located in the two planes determined by the x-axis and the y-axis in the pattern. Based on the same method as above, it can be obtained that when the pattern is used to indicate the position of the coding block, it can specifically indicate: {the planes along the x-axis are numbered 1 to 3, and the columns along the z-axis are numbered 1; and the planes along the x-axis are numbered 4 to 6, and the columns along the z-axis are numbered 1 and 2}; or, {the planes along the z-axis are numbered 1, and the columns along the x-axis are numbered 1 to 6; and the planes along the z-axis are numbered 2, and the columns along the x-axis are numbered 5 and 6}.

[0317] In another implementation, the pattern may also indicate the number of each pattern unit in the coding block, or indicate the number of the plane where each pattern unit in the coding block is located and the number of the pattern unit in the plane. For details on the method of indicating the number of pattern units, please refer to the example of the one-dimensional distribution pattern above and will not be repeated here.

[0318] In summary, in a three-dimensionally distributed pattern, when the pattern indicates the position of a coding block, it may specifically indicate one or more of the following: the number of the plane where the coding block is located, the number of the pattern unit in the coding block in the plane, the row number of the coding row in the plane, the column number of the coding column in the plane, the row number of the coding row in the pattern, the column number of the coding column in the pattern, the number of the pattern unit in the coding block in the coding row, the number of the pattern unit in the coding block in the coding column, or the number of the pattern unit in the coding block in the pattern.

[0319] The above description, in conjunction with multiple figures, illustrates several possible indication methods when a pattern is used to indicate the position of a coding block. This application includes but is not limited to this. Based on the same concept, these indication methods can also be extended to patterns of more dimensions to indicate the position of a coding block. In addition, the indication methods listed above are only possible implementations. For example, the dimensions of the pattern can be ignored, and the pattern units in the pattern can be numbered in sequence according to preset rules, and then the number of each pattern unit included in the coding block can be indicated. For the sake of brevity, no examples will be given here.

[0320] It is understandable that the pattern may include coding blocks and non-coding blocks, and the non-coding blocks may contain one or more pattern units. The coding units carried in one or more pattern units in the non-coding blocks are coding units that are not encoded, or in other words, coding units that do not require encoding. Therefore, when the pattern is used to indicate the position of the coding block, it can directly indicate the position of the coding block, or it can indicate the position of the coding block by indicating the position of the non-coding block, and this application does not limit this. Among them, the position of the non-coding block can also be called the non-coding position. In other words, the pattern can also indicate the coding position by indicating the non-coding position.

[0321] By indicating the coding position, not all coding units in the first input to be coded participate in the coding, thereby making it possible to more flexibly control the number of redundant bits, that is, to more flexibly control the code rate, thereby improving decoding performance.

[0322] The above descriptions in conjunction with Figures 7 to 18 illustrate various possible forms of patterns, which the present application includes but is not limited to. In an embodiment of the present application, the first pattern may be one of the multiple patterns shown above in conjunction with Figures 7 to 18. In a first input to be encoded having the first pattern, the number of bits included in different coding units may be the same, or, in the first input to be encoded having the first pattern, the number of bits included in at least two coding units may be different.

[0323] The first input to be encoded refers to the data to be input to the encoder for encoding, that is, the data to be encoded, the bits to be encoded, the information bits to be encoded, the input data to be encoded, or the input bits to be encoded, etc. In the present application, the first input to be encoded has a first pattern, which is used to indicate the distribution of multiple encoding units in one or more dimensions. Therefore, the data to be input into the encoder is distributed in one or more dimensions and may be presented as a one-dimensional vector, a two-dimensional matrix, or an array of larger dimensions. This application does not limit this. In addition, whether it is a one-dimensional vector, a two-dimensional matrix, or an array of larger dimensions, the first input to be encoded is input to the encoder with the encoding unit as the granularity.

[0324] Optionally, step 520 specifically includes:

[0325] Arrange the multiple bits of the first bit sequence according to an arrangement rule to obtain multiple coding units; and

[0326] The plurality of encoding units are processed to obtain a first input to be encoded having a first pattern.

[0327] Among them, the arrangement rule is used to indicate the style of each coding unit, and specifically may indicate: the dimension of each coding unit, the number of bits included in each dimension of each coding unit (or the size of each dimension of each coding unit), and the arrangement of one or more bits included in each coding unit.

[0328] The first communication device may first arrange multiple bits in the first bit sequence into multiple coding units according to an arrangement rule, and then process the multiple coding units with the coding units as granularity to obtain a first input to be encoded having a first pattern.

[0329] In one possible implementation, processing the multiple coding units includes arranging the multiple coding units according to a first pattern, that is, mapping (or filling) the multiple coding units into the multiple pattern units according to the distribution of the multiple pattern units in each dimension indicated by the first pattern.

[0330] Taking the pattern shown in FIG7(a) as an example, the first bit sequence is arranged to obtain K1 coding units (i.e., an example of multiple coding units), which are recorded as: e1, e2, e3, ..., e K1 The K1 coding units are mapped to multiple pattern units according to a preset mapping rule to obtain a first input to be coded having a first pattern. For example, the mapping rule indicates that the multiple coding units are mapped in order from top to bottom, then e1 can be mapped to the first pattern unit from top to bottom, e2 can be mapped to the second pattern unit from top to bottom, and so on. K1 Mapped to the K1th pattern unit from top to bottom.

[0331] In another possible implementation, processing the multiple coding units includes: generating at least one copy for a first coding unit among the multiple coding units; and arranging the multiple coding units and the at least one copy according to a first pattern. That is, mapping the multiple coding units and the at least one copy to multiple pattern units according to the distribution of the multiple coding units in each dimension indicated by the first pattern.

[0332] The first coding unit may be one or more of the multiple coding units, which is not limited in this application. The information bits in the first coding unit can be directly used as check bits. It is understood that since the first coding unit includes one or more bits in the first bit sequence, the copy of the first coding unit also includes one or more bits in the first bit sequence. In other words, the coding units mapped to the first pattern all include one or more bits in the first bit sequence.

[0333] Taking the pattern shown in Figure 19 as an example, the first bit sequence is arranged to obtain six coding units (i.e., one example of multiple coding units), denoted as: e1, e2, ..., e6. The first five of these six coding units are each replicated at least once. For example, e1 is replicated once, e2 is replicated twice, e3 is replicated three times, e4 is replicated two times, and e5 is replicated once, resulting in 15 coding units. These 15 coding units are then mapped to multiple pattern units according to the first pattern.

[0334] Optionally, the first pattern is also used to indicate coding units at different positions.

[0335] As mentioned above, since one or more coding units among the multiple coding units included in the first input to be encoded have one or more copies, whether each coding unit needs to be copied, the number of copies to be copied, and the position in the first pattern can also be indicated by the first pattern. For example, coding units obtained by different bit arrangements can be identified by different indexes. In the first pattern, by indicating the index at different positions, the coding units to be filled at different positions can be indicated. For example, "Xi" shown in Figure 19 is an example of the index of the coding unit. That is, X1 corresponds to the aforementioned e1, X2 corresponds to the aforementioned e2, X3 corresponds to the aforementioned e3, X4 corresponds to the aforementioned e4, X5 corresponds to the aforementioned e5, and X6 corresponds to the aforementioned e6.

[0336] In the first input to be encoded, by mapping the first coding unit and its copy at different positions, the bits in the same coding unit can participate in more encodings, that is, multiple copies of the same data are encoded, thereby improving the decoding performance through the diversity effect.

[0337] It should be understood that the method of processing multiple bit sequences in the first bit sequence to obtain the first input to be encoded having the first pattern is not limited to the method described above. The first communication device can map each coding unit to each pattern unit of the first pattern while constructing the coding unit. That is, the process of obtaining the coding unit and the process of obtaining the first input to be encoded are performed synchronously.

[0338] In step 530, one or more coding units in the first input to be encoded are encoded to obtain a second bit sequence.

[0339] One possible scenario is that the first pattern does not indicate a coding position, or in other words, the first pattern does not indicate a non-coding position, or in other words, the first pattern indicates that all pattern units are coding positions, or in other words, the first pattern indicates that all pattern units belong to a coding block, or in other words, the first pattern indicates that all pattern units participate in coding. In this case, each coding unit in the first input to be encoded can be encoded. In other words, the first communication device (or encoder) can encode all coding units of the first input to be encoded.

[0340] Another possible scenario is that the first pattern indicates a coding position, or in other words, the first pattern indicates a non-coding position, or in other words, the first pattern indicates that the position of some pattern units is a coding position (or non-coding position), or in other words, the first pattern indicates that some pattern units belong to a coding block (or non-coding block), or in other words, the first pattern indicates that some pattern units participate in coding. In this case, the coding units at the coding position can be encoded, while the coding units at the non-coding position are not encoded. In other words, the first communication device (or encoder) can encode some or all coding units in the first input to be encoded.

[0341] As mentioned above, the first pattern may be distributed in one dimension or in two dimensions or more. When encoding each coding unit to be encoded in the first to-be-encoded input having the first pattern, encoding can be performed in different dimensions, thereby achieving a parallel processing effect.

[0342] Optionally, step 530 specifically includes: performing component encoding on one or more coding units in the first to-be-encoded input to obtain a second bit sequence.

[0343] In this application, component coding refers to decomposing the multiple bits to be encoded into one or more dimensions with the coding unit as the granularity, and encoding them separately in one or more directions. Among them, the process of decomposing the multiple bits to be encoded into one or more dimensions with the coding unit as the granularity is also the process of obtaining the first input to be encoded as described above. Encoding separately in one or more directions means that the coding units in each direction are used as bits participating in the encoding and input into the encoder for encoding. In other words, each encoding is performed on the bits in the coding unit in the same direction.

[0344] It should be noted that although the first input to be encoded having the first pattern is obtained at the coding unit granularity in the aforementioned step 520, the encoding process is still performed at the bit granularity. That is, one or more bits in each coding unit can be restored to a one-dimensional vector before encoding, or before being input into the encoder. The process of restoring to a one-dimensional vector is the inverse process of arranging the coding units according to the arrangement rules described in the aforementioned step 520, and will not be described in detail here. It is understandable that if the coding unit is originally a one-dimensional vector, it is not necessary to perform the above-mentioned operation of restoring to a one-dimensional vector.

[0345] As can be seen from the multiple patterns shown in the accompanying drawings above, in the first input to be encoded having the first pattern, multiple encoding units can be distributed across one or more dimensions. The encoder can encode the encoding units distributed across each dimension, or it can encode encoding units located in other dimensions. For ease of distinction and explanation, the direction in which one or more encoding units involved in the same encoding are located is referred to herein as an encoding direction. The one or more directions in the encoding in one or more directions are referred to as one or more encoding directions.

[0346] In an embodiment of the present application, the one or more encoding directions may include directions corresponding to at least one dimension of the one or more dimensions mentioned above, or may include other directions. Optionally, the one or more encoding directions include one or more of the following multiple directions: directions corresponding to one or more dimensions of the distribution of multiple encoding units indicated by the first pattern, horizontal directions within a two-dimensional plane determined by any two dimensions among the multiple dimensions of the first pattern, vertical directions within a two-dimensional plane determined by any two dimensions among the multiple dimensions of the first pattern, or diagonal directions within a two-dimensional plane determined by any two dimensions among the multiple dimensions of the first pattern.

[0347] Since one or more coding units in the first input to be encoded are distributed in each coding direction, the coding units involved in the encoding in different coding directions may be different, that is, the input bits involved in the encoding in different coding directions may be different, or the input bits input into the encoder in different coding directions may be different, or the objects encoded in different coding directions may be different.

[0348] Optionally, the above-mentioned component encoding of one or more coding units in the first input to be encoded may specifically include: obtaining one or more groups of input bits from one or more coding units in the first input to be encoded according to one or more coding directions; and encoding the one or more groups of input bits respectively.

[0349] Among them, one or more coding units in the first input to be encoded may refer to coding units located at the coding position of the first input to be encoded. The one or more groups of input bits are determined from the coding units at the coding position of the first input to be encoded according to one or more coding directions. Each group of input bits may include bits in one or more coding units distributed in the same coding direction, so each group of input bits may include one or more bits. It should be noted that there can be one or more groups of bit inputs in the same coding direction, and this application does not limit the number of groups of bit inputs in each coding direction.

[0350] The following uses different patterns to illustrate the coding direction and one or more groups of bit inputs in each coding direction.

[0351] Assume that the first pattern is distributed in one dimension, that is, the multiple coding units indicated by the first pattern are distributed in one dimension, that is, the horizontal direction or the vertical direction. The coding direction can be the same as the dimension where the coding units are located.

[0352] For example, the first pattern is the pattern shown in (a) of Figure 7, and the encoding direction is the vertical direction, thereby determining a group of input bits; for another example, the first pattern is the pattern shown in (b) of Figure 7, and the encoding direction is the horizontal direction, thereby determining a group of input bits.

[0353] Assume that the first pattern is distributed in two dimensions, that is, the multiple coding units indicated by the first pattern are distributed in two dimensions, namely horizontal and vertical directions. The coding direction can be one or more of the following directions: horizontal, vertical, or diagonal.

[0354] For example, the first pattern is the pattern shown in FIG8 , and the encoding directions are horizontal and vertical. From this, multiple groups of input bits can be determined, namely, K1 groups of input bits in the horizontal direction and K2 groups of input bits in the vertical direction. For another example, the first pattern is the pattern shown in FIG8 , and the encoding directions are horizontal, vertical, and diagonal. From this, multiple groups of input bits can be determined as follows: K1 groups of input bits in the horizontal direction, K2 groups of input bits in the vertical direction, and several groups of input bits in the diagonal direction (11 groups shown in the figure, which is K1+K2-1).

[0355] Assuming that the first pattern is distributed in three dimensions, the multiple coding bits indicated by the first pattern are distributed in three dimensions, namely, the x-axis direction, the y-axis direction, and the z-axis direction. The coding unit can be one or more of the following directions: the x-axis direction (i.e., the horizontal direction in the plane determined by the x-axis and the y-axis, or the vertical direction in the plane determined by the x-axis and the z-axis), the y-axis direction (i.e., the vertical direction in the plane determined by the x-axis and the y-axis, or the vertical direction in the plane determined by the y-axis and the z-axis), the z-axis direction (i.e., the horizontal direction in the plane determined by the x-axis and the z-axis, or the horizontal direction in the plane determined by the y-axis and the z-axis), the diagonal direction in the plane determined by the x-axis and the y-axis, the diagonal direction in the plane determined by the y-axis and the z-axis, and the diagonal direction in the plane determined by the x-axis and the z-axis.

[0356] For example, the first pattern is the pattern shown in Figure 10, and the encoding directions are the x-axis direction and the y-axis direction, thereby determining multiple groups of input bits as follows: K1×K3 groups of input bits in the x-axis direction, and K2×K3 groups of input bits in the y-axis direction; for another example, the first pattern is the pattern shown in Figure 10, and the encoding directions are the x-axis direction and the z-axis direction, thereby determining multiple groups of input bits as follows: K1×K3 groups of input bits in the x-axis direction, and K1×K2 groups of input bits in the z-axis direction.

[0357] Furthermore, encoding the one or more groups of input bits separately may specifically include: encoding each group of input bits in the one or more groups of input bits according to a coding order.

[0358] The coding order can be used to indicate the order in which the individual bits in each group of input bits are encoded. Since the coding can be implemented by the encoder, it can also be said that the coding order can be used to indicate the order in which each group of input bits are input to the encoder. As mentioned above, the coding process is performed at the bit granularity. Since each group of input bits is carried in one or more coding units, the order in which each group of input bits is input to the encoder can be controlled by controlling the order in which the coding units are input to the encoder. Since a group of input bits may be carried in multiple coding units, and the order in which multiple coding units are input to the encoder can be determined according to the coding order, it can also be said that the coding order is used to indicate the order in which multiple coding units used to carry each group of input bits are input to the encoder.

[0359] The coding order can be, for example, the same as the order in which the pattern units are numbered, or it can be opposite to the order in which the pattern units are numbered, or it can be in the order from left to right in the horizontal coding direction, or it can be in the order from top to bottom in the vertical coding direction, or it can be in the order from top left to bottom right in the diagonal coding direction, and so on. This application does not limit this.

[0360] As an example, assuming that the first pattern is the pattern shown in Figure 8, its dimension K1×K2 can be specifically 4×8. The dimension of each coding unit is 1×8, that is, a one-dimensional vector with a length of 8. It can be seen that the 8 coding units in each row include 64 bits, and the 4 coding units in each column include 32 bits. Assume that the 256 bits to be encoded are recorded as: a0, a1, ..., a 255 The bits in each coding unit are arranged in order from left to right, and multiple coding units are arranged in the order of rows first and columns in the first pattern. The distribution of the bits in each coding unit in the first input to be encoded is shown in Figure 20. Figure 20 is a schematic diagram of the first input to be encoded. The details are as follows:

[0361] The 64 bits in the 8 coding units of the first row (i.e., a set of input bits in the horizontal direction) are as follows: [[a0a1…a7][a8a9…a 15 ]…[a 56 a 57 …a 63 ]];

[0362] The 64 bits in the 8 coding units of the second row (ie, another set of input bits in the horizontal direction) are as follows: 64 a 65 …a 71 ][a 72 a 73 …a 79 ]…[a 120 a 121 …a 127 ]];

[0363] The 64 bits in the 8 coding units of the third row (i.e., another set of input bits in the horizontal direction) are as follows: 128 a 129 …a 135 ][a 136 a 137 …a 143 ]…[a 184 a 185 …a 191 ]];

[0364] The 64 bits in the 8 coding units of the fourth row (ie, another set of input bits in the horizontal direction) are as follows: 192 a 193 …a 199 ][a 200 a 201 …a 207 ]…[a 248 a 249 …a 255]];

[0365] The 32 bits in the 4 coding units in the first column (i.e., a set of input bits in the vertical direction) are as follows: [[a0a1…a7][a 64 a 65 …a 71 ][a 128 a 129 …a 135 ][a 192 a 193 …a 199 ]];

[0366] The 32 bits in the 4 coding units in the second column (ie, another set of input bits in the vertical direction) are as follows: [[a8a9…a 15 ][a 72 a 73 …a 79 ][a 136 a 137 …a 143 ][a 200 a 201 …a 207 ]];

[0367] The input bits of the third to eighth columns can be found in FIG20 and are not listed again.

[0368] In the above text, each set of input bits is listed with coding units as the granularity. For easy distinction, the bits in each coding unit are represented by "[]".

[0369] FIG21 shows different encoding directions and encoding orders.

[0370] Figure 21 (a) is a schematic diagram of a horizontal encoding direction and a left-to-right encoding order. If the encoding direction includes the horizontal direction, the encoding order is from left to right, that is, the bits in the multiple encoding units in each row can be input to the encoder in order from right to left. This can obtain 8 groups of input bits, that is, corresponding to the 4 rows in Figure 20, each group of input bits is arranged in the following encoding order: a0, a1, ..., a 62 ,a 63 ; a 64 ,a 65 ,…,a 126 ,a 127 ; a 128 ,a 129 ,…,a 190 ,a 191 ; a 192 ,a 193 ,…,a 254 ,a 255 .

[0371] FIG21(b) shows a schematic diagram in which the encoding direction is vertical and the encoding order is from top to bottom. If the encoding direction includes the vertical direction, the encoding order is from top to bottom, that is, the bits in the multiple encoding units in each column can be input to the encoder in order from top to bottom. Thus, 4 groups of input bits can be obtained, that is, corresponding to the 8 columns in FIG20, and each group of input bits is arranged in the following encoding order: a0, a1, ..., a7, a 64 ,a 65 ,…,a 71 ,a 128 ,a 129 ,…,a 135 ,a 192 ,a 193 ,…,a 199 ; a8,a9,…,a 15 ,a 72 ,a 73 ,…,a 79 ,a 136 ,a 137 ,…,a 143 ,a 200 ,a 201 ,…,a 207 ; a 16 ,a 17 ,…,a 23 ,a 80 ,a 82 ,…,a 87 ,a 144 ,a 145 ,…,a 151 ,a 208 ,a 209 ,…,a 215 ; a 24 ,a 25 ,…,a 31 ,a 88 ,a 89 ,…,a 95 ,a 152 ,a 153 ,…,a 159 ,a 216 ,a 217 ,…,a 223 ; a 32 ,a 33 ,…,a 39 ,a 96 ,a 97 ,…,a 103 ,a 160 ,a 161 ,…,a 167 ,a224 ,a 225 ,…,a 231 ; a 40 ,a 41 ,…,a 47 ,a 104 ,a 105 ,…,a 111 ,a 168 ,a 169 ,…,a 175 ,a 232 ,a 233 ,…,a 239 ; a 48 ,a 49 ,…,a 55 ,a 112 ,a 113 ,…,a 119 ,a 176 ,a 177 ,…,a 183 ,a 240 ,a 241 ,…,a 247 ; a 56 ,a 57 ,…,a 63 ,a 120 ,a 121 ,…,a 127 ,a 184 ,a 185 ,…,a 191 ,a 248 ,a 249 ,…,a 255 .

[0372] Figure 21 (c) shows a schematic diagram in which the encoding direction is diagonal and the encoding order is from upper left to lower right. If the encoding direction includes the diagonal direction, the encoding order is from upper left to lower right, that is, the bits in each diagonal coding unit can be input into the encoder in the order from upper left to lower right. Then 11 groups of input bits are obtained, and each group of input bits is arranged in the following encoding order: a 192 ,a 193 ,…,a 199 ; a 128 ,a 129 ,…,a 135 ,a 200 ,a 201 ,…,a 207 ; a 64 ,a 65 ,…,a 71 ,a 136 ,a 137 ,…,a 143,a 208 ,a 209 ,…,a 215 ; a0,a1,…,a7,a 72 ,a 73 ,…,a 79 ,a 144 ,a 145 ,…,a 151 ,a 216 ,a 217 ,…,a 223 ; a8,a9,…,a 15 ,a 80 ,a 81 ,…,a 87 ,a 152 ,a 153 ,…,a 159 ,a 224 ,a 225 ,…,a 231 ; a 16 ,a 17 ,…,a 23 ,a 88 ,a 89 ,…,a 95 ,a 160 ,a 161 ,…,a 167 ,a 232 ,a 233 ,…,a 239 ; a 24 ,a 25 ,…,a 31 ,a 96 ,a 97 ,…,a 103 ,a 168 ,a 169 ,…,a 175 ,a 240 ,a 241 ,…,a 247 ; a 32 ,a 33 ,…,a 39 ,a 104 ,a 105 ,…,a 111 ,a 176 ,a 177 ,…,a 183 ,a 248 ,a 249 ,…,a 255 ; a 40 ,a 41 ,…,a 47 ,a 112 ,a113 ,…,a 119 ,a 184 ,a 185 ,…,a 191 ; a 48 ,a 49 ,…,a 55 ,a 120 ,a 121 ,…,a 127 ; a 56 ,a 57 ,…,a 63 .

[0373] As another example, assuming that the first pattern is the pattern shown in Figure 10, its dimension K1×K2×K3 can specifically be 4×6×4. The dimension of each coding unit is not limited. Figure 22 shows different coding directions. In the x-axis direction, the coding order of each group of input bits is consistent with the x-axis direction, as shown in the coding direction 1 in the figure; in the y-axis direction, the coding order of each group of input bits is opposite to that along the y-axis, as shown in the coding direction 2 in the figure; in the z-axis direction, the coding order of each group of input bits is consistent with the y-axis direction, as shown in the coding direction 3 in the figure. For the convenience of distinction and explanation, the input bits in each coding unit are described by the number of each coding unit in this example, as follows:

[0374] In encoding direction 1, there are K1×K3 groups of input bits. The encoding order of the i-th group of input bits is: consecutive integer values ​​from K2×(i-1)+1 to K2×i, where i is 1, 2, ..., K1×K3. For example, in the pattern shown in Figure 10, i can take the values ​​1, 2, ..., 16. It can be concluded that: in coding direction 1, the coding units where the first group of input bits are located are numbered: {1, 2, 3, 4, 5, 6}, the coding units where the second group of input bits are located are numbered: {7, 8, 9, 10, 11, 12}, the coding units where the third group of input bits are located are numbered: {13, 14, 15, 16, 17, 18}, the coding units where the fourth group of input bits are located are numbered: {19, 20, 21, 22, 23, 24}, the coding units where the fifth group of input bits are located are numbered: {25, 26, 27, 28, 29, 30}, and so on, which are not enumerated here.

[0375] In encoding direction 2, there are K2×K3 groups of input bits. The encoding order of the jth group of input bits is: from j to j + (K1-1)×K2, with integer values ​​at intervals of K2, where j is 1, 2, ..., K2×K3. For example, in the pattern shown in Figure 10, j can take the values ​​1, 2, ..., 24. It can be concluded that: in coding direction 2, the coding units where the first group of input bits are located are numbered: {1, 7, 13, 19}, the coding units where the second group of input bits are located are numbered: {2, 8, 14, 20}, the coding units where the third group of input bits are located are numbered: {3, 9, 15, 21}, the coding units where the fourth group of input bits are located are numbered: {4, 10, 16, 20}, the coding units where the fifth group of input bits are located are numbered: {5, 11, 17, 23}, the coding units where the sixth group of input bits are located are numbered: {6, 12, 18, 24}, the coding units where the seventh group of input bits are located are numbered: {25, 31, 37, 43}, and so on, which are not enumerated here.

[0376] In coding direction 3, there are K1×K2 groups of input bits. The coding order for the kth group of input bits is: from k to k + (K3 - 1) × K2 × K3, with integer values ​​at intervals of K2 × K3, and j is 1, 2, ..., K1×K2. For example, in the pattern shown in Figure 10, j can take values ​​of 1, 2, ..., 24. It can be concluded that: in coding direction 3, the coding units where the first group of input bits are located are numbered: {1, 25, 49, 73}, the coding units where the second group of input bits are located are numbered: {2, 26, 50, 74}, the coding units where the third group of input bits are located are numbered: {3, 27, 51, 75}, the coding units where the fourth group of input bits are located are numbered: {4, 28, 52, 76}, the coding units where the fifth group of input bits are located are numbered: {5, 29, 53, 77}, the coding units where the sixth group of input bits are located are numbered: 6, 30, 54, 78}, the coding units where the seventh group of input bits are located are numbered: {7, 31, 55, 79}, and so on.

[0377] The above text provides a detailed description of the encoding direction and encoding order with reference to multiple figures. These figures are only examples for ease of understanding and should not constitute any limitation on the specific forms of the patterns and encoding units, nor should they constitute any limitation on the encoding direction and encoding order.

[0378] It is understood that if a set of input bits is carried in a coding unit, one or more bits in the coding unit can be directly input to the encoder in the form of a one-dimensional vector. In this case, the one or more bits in the coding unit can be encoded without having to be encoded based on the coding order.

[0379] In summary, the first input to be encoded is input to the encoder with the coding unit as the granularity. In component coding, inputting the encoder with the coding unit as the granularity can be understood as follows: with the coding unit as the granularity, one or more bits in each of the one or more coding units carrying the same group of input bits are restored into a one-dimensional vector and input into the encoder, and according to the coding order, the input of one coding unit is completed, and then the input of the next coding unit is carried out, and so on and so forth until the input of the same group of input bits is completed; or it can also be understood as follows: with the coding unit as the granularity, one or more bits in each of the one or more coding units carrying the same group of input bits are restored into a one-dimensional vector, and according to the coding order, the one-dimensional vectors restored by the one or more coding units may be spliced ​​into a larger one-dimensional vector, and encoding refers to the encoding of the larger one-dimensional vector.

[0380] In a specific implementation, an encoder can be configured in each encoding direction for component encoding. For ease of distinction and explanation, the encoder used for component encoding is referred to as a sub-encoder in this document. It should be understood that an encoder can include multiple sub-encoders, each of which can be used to encode one or more groups of input bits in a coding direction.

[0381] For example, in the three coding directions shown in (a), (b) and (c) in Figure 21, a sub-encoder can be configured in each coding direction, for example, denoted as sub-encoder 1, sub-encoder 2 and sub-encoder 3. Sub-encoder 1 can be used to encode 4 groups of input bits in the horizontal direction, sub-encoder 2 can be used to encode 8 groups of input bits in the vertical direction, and sub-encoder 3 can be used to encode 11 groups of input bits in the diagonal direction.

[0382] For another example, in the three coding directions shown in Figure 22, an encoder can be configured in each coding direction, for example, recorded as sub-encoder 1, sub-encoder 2 and sub-encoder 3. Sub-encoder 1 can be used to encode 24 groups of input bits in coding direction 1, sub-encoder 2 can be used to encode 16 groups of input bits in coding direction 2, and sub-encoder 3 can be used to encode 24 groups of input bits in coding direction 3.

[0383] As previously mentioned, the encoder can be implemented in software and / or hardware. Configuring a sub-encoder can be understood as configuring a unit module with encoding functionality, such as writing a code segment for implementing the encoding functionality, or configuring a circuit for implementing the encoding functionality, etc., without limitation.

[0384] Since different sub-encoders are configured in different encoding directions, different sub-encoders can implement their respective corresponding operations by executing different codes.

[0385] Furthermore, one or more sub-encoders can be configured in each encoding direction, corresponding to one or more groups of input bits. The one or more sub-encoders in each encoding direction can synchronously encode one or more groups of input bits in the same encoding direction, thereby improving processing efficiency and facilitating improving throughput.

[0386] When encoding the multiple groups of input bits, the first communication device may use the same coding type or different coding types, which is not limited in this application. In this application, the coding type refers to the specific method used to implement bit-level coding. Coding types may include, but are not limited to, LDPC coding, Polar coding, Turbo coding, coupled code coding, etc., which is not limited in this application. Different coding types result in different encoded code types. Therefore, it can also be said that the code types obtained by encoding the multiple groups of input bits can be the same or different.

[0387] Since the first communication device can encode one or more groups of input bits respectively, when the number of groups of input bits is greater than 1, the first communication device can use one or more coding types to encode the multiple groups of input bits.

[0388] Optionally, among the multiple groups of input bits, the same coding type is used to encode different groups of input bits in the same coding direction.

[0389] That is, multiple groups of input bits in the same coding direction can be encoded using the same coding type. For example, in Figure 21(a), four groups of input bits can be encoded using the same coding type; in another example, in Figure 21(b), eight groups of input bits can be encoded using the same coding type; and in another example, in Figure 21(c), eleven groups of input bits can be encoded using the same coding type.

[0390] Furthermore, in the case of the same coding type, the coding parameters used to encode different groups of input bits in the same coding direction may be the same or different.

[0391] Exemplarily, the encoding parameters may include, but are not limited to, information bit length, codeword length, encoding rate, etc.

[0392] Depending on the encoding type, the encoding parameters may include more.

[0393] For example, in LDPC coding, coding parameters may also include base graph (BG) 1, lifting factor (lifting size) Z, and so on. Assuming that the coding type used to encode different groups of input bits in a certain coding direction is LDPC, there are two sets of coding parameters: information bit length 1, codeword length 1, coding rate 1, base graph 1, and lifting factor 1; and information bit length 2, codeword length 2, coding rate 2, base graph 2, and lifting factor 2. One or more parameters in these two sets of coding parameters are different. One set of coding parameters is used for one or more groups of input bits in that coding direction, and the other set of coding parameters is used for other groups of input bits in that coding direction.

[0394] For another example, in Polar coding, coding parameters may also include the number of CRCs, frozen bit positions, and a core sub-matrix. Assuming that the coding type used to encode different groups of input bits in a certain coding direction is Polar coding, there are two sets of coding parameters: information bit length 1, codeword length 1, coding rate 1, number of CRCs 1, frozen bit positions 1, and core sub-matrix 1; and information bit length 2, codeword length 2, coding rate 2, number of CRCs 2, frozen bit positions 2, and core sub-matrix 2. One or more parameters in the two sets of coding parameters are different. One set of coding parameters is used for one or more groups of input bits in that coding direction, and the other set of coding parameters is used for other groups of input bits in that coding direction.

[0395] Optionally, among the multiple groups of input bits, different encoding types are used to encode at least two groups of input bits in the same encoding direction.

[0396] That is, different coding types can be used to encode multiple groups of input bits in the same coding direction. For example, in FIG21(a), the four groups of input bits can be encoded using different coding types, or some of them can be encoded using one coding type and others using another coding type. For example, the first two groups can be encoded using one coding type, such as LDPC coding, and the last two groups can be encoded using another coding type, such as coupled code coding.

[0397] Optionally, the encoding types used to encode the multiple groups of input bits are the same.

[0398] That is to say, regardless of the encoding direction, all input bits can be encoded using the same encoding type.

[0399] Furthermore, the encoding parameters used to encode the multiple groups of input bits may be the same or different.

[0400] Optionally, different encoding types are used to encode at least two groups of input bits among the multiple groups of input bits.

[0401] That is, multiple groups of input bits in one or more coding directions may be encoded using different coding types. For example, different groups of input bits in the same coding direction may be encoded using different coding types. Alternatively, one or more groups of input bits in each coding direction may be encoded using one coding type, while input bits in different coding directions may be encoded using different coding types. This application does not limit this.

[0402] In a specific implementation, different sub-encoders can be configured for different encoding types in the same encoding direction. For example, if two encoding types are used in the horizontal direction, sub-encoders 1a and 1b can be configured in the horizontal direction. If four encoding types are used in the vertical direction, sub-encoders 2a to 2d can be configured in the vertical direction.

[0403] In this way, multiple groups of input bits in the same coding direction can also be encoded in parallel, which can greatly improve processing efficiency. In addition, by using different coding types to encode different groups of input bits, the total bit rate can be controlled more flexibly and accurately, thereby improving decoding performance.

[0404] For easier understanding, the component coding process is described below with reference to the accompanying drawings.

[0405] As an example, the first pattern is the pattern shown in Figure 8, the dimension K1×K2 is specifically 4×8, and the encoding direction is the encoding direction shown in (a) and (b) of Figure 21, that is, it includes the horizontal direction and the vertical direction. The four groups of coding units included in the first input to be encoded in the horizontal direction and the eight groups of coding units included in the first input to be encoded in the vertical direction have been shown above in conjunction with (a) and (b) of Figure 21, respectively, and will not be repeated here. For ease of explanation and understanding, the following examples assume that each coding unit includes 8 bits.

[0406] The first communication device can use a sub-encoder (for example, denoted as sub-encoder 1) to encode 4 groups of coding units in the horizontal direction, and the coding type is represented by function f1(); and use another sub-encoder (for example, denoted as sub-encoder 2) to encode 8 groups of coding units in the vertical direction, and the coding type is represented by function f2().

[0407] As shown in the figure, the horizontal encoding is performed first. The encoding process of the four groups of input bits in the horizontal direction can satisfy: f1(a0, a1, ..., a 62 ,a 63 ); f1(a 64 ,a 65 ,…,a 126 ,a 127 ); f1(a 128 ,a129 ,…,a 190 ,a 191 ); f1(a 192 ,a 193 ,…,a 254 ,a 255 ).

[0408] Thus, 4 groups of coded bits can be obtained in the horizontal direction. Each group of coded bits includes a group of information bits and a corresponding group of check bits. Assuming that each group of check bits includes 16 bits carried in two coding units, n An example of the four groups of coded bits is as follows: a0, a1, ..., a 62 ,a 63 ,b0,…,b7,b8,…,b 15 ; a 64 ,a 65 ,…,a 126 ,a 127 ,b 16 ,…,b 23 ,b 24 ,…,b 31 ; a 128 ,a 129 ,…,a 190 ,a 191 ,b 32 ,…,b 39 ,b 40 ,…,b 47 ; a 192 ,a 193 ,…,a 254 ,a 255 ,b 48 ,…,b 55 ,b 56 ,…,b 63 .

[0409] Since the horizontal encoding obtains 2 groups of check bits, 2 groups of bits to be encoded are added in the vertical direction, for a total of 10 groups of input bits. The encoding process of the 10 groups of input bits in the vertical direction can satisfy: f2(a0, a1, ..., a7, a 64 ,a 65 ,…,a 71 ,a 128 ,a 129 ,…,a 135 ,a 192 ,a 193 ,…,a 199 ); f2(a8,a9,…,a 15 ,a 72 ,a 73,…,a 79 ,a 136 ,a 137 ,…,a 143 ,a 200 ,a 201 ,…,a 207 ); f2(a 16 ,a 17 ,…,a 23 ,a 80 ,a 82 ,…,a 87 ,a 144 ,a 145 ,…,a 151 ,a 208 ,a 209 ,…,a 215 ); f2(a 24 ,a 25 ,…,a 31 ,a 88 ,a 89 ,…,a 95 ,a 152 ,a 153 ,…,a 159 ,a 216 ,a 217 ,…,a 223 ); f2(a 32 ,a 33 ,…,a 39 ,a 96 ,a 97 ,…,a 103 ,a 160 ,a 161 ,…,a 167 ,a 224 ,a 225 ,…,a 231 ); f2(a 40 ,a 41 ,…,a 47 ,a 104 ,a 105 ,…,a 111 ,a 168 ,a 169 ,…,a 175 ,a 232 ,a 233 ,…,a 239 ); f2(a 48 ,a 49 ,…,a 55 ,a 112 ,a 113 ,…,a 119 ,a 176 ,a177 ,…,a 183 ,a 240 ,a 241 ,…,a 247 ); f2(a 56 ,a 57 ,…,a 63 ,a 120 ,a 121 ,…,a 127 ,a 184 ,a 185 ,…,a 191 ,a 248 ,a 249 ,…,a 255 ); f2(b0,…,b7,b 16 ,…,b 23 ,b 32 ,…,b 39 ,b 48 ,…,b 55 ); f2(b8,…,b 15 ,b 24 ,…,b 31 ,b 40 ,…,b 47 ,b 56 ,…,b 63 ).

[0410] Thus, 10 groups of coded bits in the vertical direction are obtained. Each group of coded bits includes a group of information bits and a group of check bits. Assume that each group of check bits includes 4 bits, represented by c, and n is an integer. An example of the 10 groups of coded bits is as follows: a0, a1, ..., a7, a 64 ,a 65 ,…,a 71 ,a 128 ,a 129 ,…,a 135 ,a 192 ,a 193 ,…,a 199 ,c0,c1,…,c7; a8,a9,…,a 15 ,a 72 ,a 73 ,…,a 79 ,a 136 ,a 137 ,…,a 143 ,a 200 ,a 201 ,…,a 207 ,c8,c9,…,c 15 ; a 16 ,a 17 ,…,a23 ,a 80 ,a 82 ,…,a 87 ,a 144 ,a 145 ,…,a 151 ,a 208 ,a 209 ,…,a 215 ,c 16 ,c 17 ,…,c 23 ; a 24 ,a 25 ,…,a 31 ,a 88 ,a 89 ,…,a 95 ,a 152 ,a 153 ,…,a 159 ,a 216 ,a 217 ,…,a 223 ,c 24 ,c 25 ,…,c 31 ; a 32 ,a 33 ,…,a 39 ,a 96 ,a 97 ,…,a 103 ,a 160 ,a 161 ,…,a 167 ,a 224 ,a 225 ,…,a 231 ,c 32 ,c 33 ,…,c 39 ; a 40 ,a 41 ,…,a 47 ,a 104 ,a 105 ,…,a 111 ,a 168 ,a 169 ,…,a 175 ,a 232 ,a 233 ,…,a 239 ,c 40 ,c 41 ,…,c 47 ; a 48 ,a 49 ,…,a 55 ,a 112 ,a 113 ,…,a 119,a 176 ,a 177 ,…,a 183 ,a 240 ,a 241 ,…,a 247 ,c 48 ,c 49 ,…,c 55 ; a 56 ,a 57 ,…,a 63 ,a 120 ,a 121 ,…,a 127 ,a 184 ,a 185 ,…,a 191 ,a 248 ,a 249 ,…,a 255 ,c 56 ,c 57 ,…,c 63 ; b0,…,b7,b 16 ,…,b 23 ,b 32 ,…,b 39 ,b 48 ,…,b 55 ,c 64 ,c 65 ,…,c 71 ; b8,…,b 15 ,b 24 ,…,b 31 ,b 40 ,…,b 47 ,b 56 ,…,b 63 ,c 72 ,c 73 ,…,c 79 .

[0411] After the encoding is completed, the obtained multiple groups of coded bits can be arranged into a one-dimensional vector according to a preset output rule to obtain a second bit sequence. It can be understood that the second bit sequence includes multiple coded bits, specifically multiple information bits and multiple check bits.

[0412] Exemplarily, the preset output rule may be rows first and columns second, or columns first and rows second.

[0413] Row-first, column-later means outputting by row first, then by column. Row-by-row output means outputting the coded bits of each row sequentially, for example, from left to right, at the row granularity. After all the coded bits of each row are output, the next row is output. The output order of different rows can be predefined, for example, from top to bottom or bottom to top. If each row is considered a whole, multiple rows can be considered a column, and the output of multiple rows can be considered the output of a column.

[0414] Column-first, row-later output means outputting by column first, then by row. Column-by-column output uses the column as the granularity, outputting the coded bits of each column sequentially, for example, from top to bottom. After all the coded bits of each column are output, the next column is output. The output order of different columns can also be predefined, for example, from left to right or from right to left. If each column is considered a whole, multiple columns can be grouped into a row, and the output of multiple columns can be considered the output of a row.

[0415] For ease of understanding and explanation, Figure 23 shows multiple groups of coded bits after encoding. If the output rule is row first and column second, the second bit sequence can be obtained as follows: a0, a1, ..., a 63 ,b0,…,b 15 ,a 64 ,a 65 ,…,a 127 ,b 16 ,…,b 31 ,a 128 ,a 129 ,…,a 191 ,b 32 ,…,b 47 ,a 192 ,a 193 ,…,a 255 ,b 48 ,…,b 63 ,c0,…,c 79 .

[0416] It can be understood that if the output rule is columns first and rows later, the second bit sequence can also be obtained based on the same principle in combination with Figure 23. For the sake of brevity, it will not be repeated.

[0417] It should also be understood that the output rule for obtaining the second bit sequence is not limited to the output by row and output by column listed above, and may also be other rules, which are included but not limited to in the present application.

[0418] It should also be understood that the above is only for ease of understanding, showing one possible example of coding bits, and should not constitute any limitation to the present application. In other coding types, the coding bits are not necessarily arranged in the manner exemplified above.

[0419] As another example, the first pattern is the pattern shown in FIG10 , with dimensions K1×K2×K3 being specifically 4×6×4, and encoding directions being encoding direction 1 to encoding direction 3 as shown in FIG22 . The first communication device may employ a subencoder for encoding in each encoding direction, for example, subencoder 1, subencoder 2, and subencoder 3, respectively. If the same encoding type is employed in the three encoding directions, the encoding type may be represented by the same function f().

[0420] The process of sub-encoder 1 encoding 24 groups of input bits in encoding direction 1 can satisfy: f(K2×(i-1)+1:K2×i), where “:” represents continuous values; the process of sub-encoder 2 encoding 16 groups of input bits in encoding direction 2 can satisfy: f(j:K2:j+(K1-1)×K2), where “:K2:” represents values ​​taken at intervals of K2, that is, the difference between the two values ​​taken before and after is K2; the process of sub-encoder 3 encoding 24 groups of input bits in encoding direction 3 can satisfy: f(k:K2×K3:k+(K3-1)×K2×K3), where “:K2×K3:” represents values ​​taken at intervals of K2×K3, that is, the difference between the two values ​​taken before and after is K2×K3.

[0421] The coded bits obtained after encoding can also be arranged into a one-dimensional vector output according to a preset output rule to obtain a second bit sequence. Exemplarily, the output rule can be: determine the output order according to multiple different sortings in the three directions of x, y, and z. The multiple different sortings in the three directions can be, for example, x, y, z, or x, z, y, or y, x, z, or y, z, x, or z, x, y, or z, y, x. The process of obtaining a one-dimensional vector according to any of the sortings is similar to the above-described process of first row and then column and first column and then row. Please refer to the above example in conjunction with Figure 23 and will not be repeated here.

[0422] As another example, the first pattern is the pattern shown in (c) of Figure 9. The dimension of each coding unit is not limited. The coding direction includes a horizontal direction and a vertical direction. The first communication device can use a sub-encoder for encoding in each coding direction, for example, using sub-encoder 1 for encoding in the horizontal direction and using sub-encoder 2 for encoding in the vertical direction. The coding types used in the two coding directions are different. For example, the coding type used by sub-encoder 1 can be represented by function f1(), and the coding type used by sub-encoder 2 can be represented by function f2().

[0423] Figure 24 shows a schematic diagram of encoding in different encoding directions. As shown in Figure 24, there are four groups of input bits in the horizontal direction and the vertical direction respectively. For the convenience of distinction and explanation, the input bits in each encoding unit are described by the number of each encoding unit in this example, as follows:

[0424] There are 4 groups of input bits in the horizontal direction, as follows: [[1][2 3][4 5][6 7]]

[0425] There are 4 groups of input bits in the vertical direction, namely: [[1 2][3 4][5 6][7]].

[0426] The first communication device may use a sub-encoder for encoding in each encoding direction, for example, sub-encoder 1 and sub-encoder 2. The process of sub-encoder 1 encoding four groups of input bits in the horizontal direction may satisfy: f1(1), f1(2,3), f1(4,5), f1(6,7); the process of sub-encoder 2 encoding four groups of input bits in the vertical direction may satisfy: f2(1,2), f2(3,4), f2(5,6), f2(7).

[0427] Sub-encoder 1 and sub-encoder 2 can encode each group of input bits alternately, for example, encoding in order from top to bottom, the encoding order of each encoding unit is as follows: [1], [1 2], [2 3], [3 4], [4 5], [5 6], [6 7], [7]; Sub-encoder 1 and sub-encoder 2 can also encode each group of input bits in the order of completing the encoding in one encoding direction first and then completing the encoding in the other encoding direction, for example, sub-encoder 1 encodes in the horizontal direction first, and sub-encoder 2 encodes in the vertical direction, the encoding order of each encoding unit is as follows: [1], [2 3], [4 5], [6 7], [1 2], [3 4], [5 6], [7], for another example, sub-encoder 2 encodes in the vertical direction first, and sub-encoder 1 encodes in the horizontal direction, the encoding order of each encoding unit is as follows: [1 2], [3 4], [5 6], [7], [1], [2 3], [4 5], [6 7].

[0428] The coded bits obtained after encoding can also be arranged into a one-dimensional vector according to a preset output rule to obtain a second bit sequence. The process of arranging the bits into a one-dimensional vector according to the output rule can be seen in the example of FIG23 above and will not be repeated here.

[0429] It should be noted that, in the example of FIG24 , the case where only one coding unit is included in the horizontal direction and the vertical direction is excluded, and is not determined as a group of input bits, such as coding unit 1 in the horizontal direction and coding unit 7 in the vertical direction.

[0430] It is understood that when the first pattern is distributed in one dimension, encoding can be performed in one dimension or in another dimension perpendicular to the first dimension, thereby obtaining two sets of coded bits based on the same set of input bits. The two sets of coded bits can be obtained by encoding using the same encoding type or different encoding types, which is not limited in this application.

[0431] Encoding the same set of input bits in different encoding directions is equivalent to allowing the same set of input bits to participate in more encodings, thereby improving decoding performance.

[0432] Of course, when the first pattern is distributed in one dimension, component coding can be omitted and a specific coding type can be used to directly encode the first pattern to obtain the second bit sequence. In this case, the bits in one or more coding units distributed in this dimension can be considered as a set of input bits and encoded using a specific coding type to obtain the second bit sequence. This can reduce the number of encoding operations and improve processing efficiency.

[0433] The above description combines multiple figures to describe the process of encoding the first bit sequence by the first communication device. In order to better understand the above process, FIG25 shows the encoding method from the perspective of signal flow.

[0434] As shown in Figure 25, the TB passes through the CB to obtain several CBs. After adding a check bit to each CB, a bit sequence to be encoded can be obtained, such as the first bit sequence shown herein. Multiple bits in the first bit sequence are processed (for example, including but not limited to permutation) to obtain a first input to be encoded. The first input to be encoded is encoded, for example, using multiple sub-encoders for component encoding, to obtain a second bit sequence.

[0435] In a specific implementation, the permutation operation may be implemented by a permutator, and the encoding operation may be implemented by an encoder, which may include multiple sub-encoders for component encoding. This application does not limit the specific names of the modules used to implement each operation.

[0436] Optionally, the method further includes: sending a second bit sequence.

[0437] After encoding to obtain the second bit sequence, the first communication device may perform operations such as scrambling, modulation, precoding, and RE mapping on the second bit sequence. Finally, after performing operations such as up-conversion and power amplification, the second bit sequence may be transmitted via an antenna. It will be understood that the signal transmitted by the first communication device via the antenna may be a radio frequency signal carrying the second bit sequence. In other words, the second bit sequence is transmitted within the radio frequency signal and is not necessarily output as a bit sequence.

[0438] Optionally, sending the second bit sequence includes: sending a radio frequency signal carrying the second bit sequence.

[0439] The specific process of sending the radio frequency signal can be achieved through existing technologies and will not be described in detail here.

[0440] Based on the technical solution provided above, the first communication device can arrange multiple bits with the coding unit as the granularity, thereby obtaining a first input to be encoded having a first pattern. Since the number of bits included in the coding unit is not fixed and can be flexibly adjusted, a limited number of patterns can be adapted to a variety of different data transmission amounts, and the number of bits in the coding unit can be flexibly adjusted with the data transmission amount. In addition, the first pattern can be used to constrain the distribution of multiple coding units in the first input to be encoded in one or more dimensions, that is, component coding can be used or not for encoding according to needs. In addition, when component coding is used, the first communication device can encode multiple groups of input bits in the same coding direction in parallel, that is, product parallelism is easy to implement, which can improve processing efficiency and is conducive to improving peak throughput and area efficiency. Furthermore, since the component coding process can be encoded in multiple different coding directions, the same coding unit can participate in more encodings, thereby improving decoding performance.

[0441] Moreover, since the bits are arranged into coding units and arranged with the coding units as the granularity, and then the arranged input to be encoded is component-coded, a greater coding gain can be brought about.

[0442] For example, the first bit sequence to be encoded includes 10,000 bits. If the above scheme is adopted, assuming that the coding unit is a 10×10 two-dimensional matrix, each coding unit is considered an element, and the first pattern is a 10×10 two-dimensional matrix, then the 10,000 bits can be constructed into 100 10×10 coding units, arranged in a 10×10 two-dimensional matrix, i.e., an example of the first input to be encoded. The first input to be encoded includes 10 rows and 10 columns, each row and each column respectively including 1000 bits. The encoder can perform component encoding on the 10 rows and 10 columns of the first input to be encoded. Each time 1000 bits are input to the encoder, the first input to be encoded can be encoded by 10 encodings in the horizontal direction and 10 encodings in the vertical direction (i.e., a total of 20 encodings).

[0443] If the coding unit is not introduced, the 10,000 bits in the first bit sequence can be arranged into a two-dimensional matrix of more dimensions, such as 100×100, that is, 100 rows and 100 columns, each row includes 100 bits, and each column also includes 100 bits. The encoder can perform component encoding on the 100 rows and 100 columns. The bits input to the encoder each time are 100 bits. The encoding of the 10,000 bits can be completed by encoding 100 times in the horizontal direction and 100 times in the vertical direction respectively (that is, a total of 200 times). Compared with the above, the code length is shortened and the number of encodings is increased.

[0444] It's easy to see that without introducing coding units, it's possible to provide more dimensional patterns to accommodate varying data transmission rates. However, some patterns may segment the first bit sequence, resulting in fewer bits per row and / or column, and thus a shorter encoded code length. This results in low coding gain and compromised coding performance. Furthermore, the number of encodings is high, making implementation difficult. Therefore, while there are many patterns, the coding gain from having more patterns is minimal.

[0445] In contrast, in the solution provided by the present application, the size of the coding unit can be determined according to different data transmission volumes, and the number of coding times can be controlled by the pattern. In this way, it is possible to avoid excessive coding times and too short code length, and the coding performance is not affected. It is also possible to avoid pre-defining a large number of patterns to adapt to different data transmission volumes, and to avoid pre-storing a large number of patterns to bring large storage overhead to the communication device.

[0446] The encoding method provided in this application is described in detail above with reference to multiple figures. In the multiple examples above, the encoding process is described using a first input to be encoded having a first pattern. In fact, this application is not limited to this. The first communication device may also process the first bit sequence to obtain an input to be encoded having a different pattern, such as a second input to be encoded having a second pattern. The inputs to be encoded having different patterns are then encoded separately, and the encoded bits are combined according to certain rules to obtain a one-dimensional vector output.

[0447] Optionally, the method further includes:

[0448] Arranging a plurality of bits in the first bit sequence to obtain a second input to be encoded having a second pattern;

[0449] Encoding one or more coding units in the second to-be-encoded input to obtain a third bit sequence; and

[0450] Based on the second bit sequence and the third bit sequence, a fourth bit sequence is obtained.

[0451] Similar to the first input to be encoded, the second input to be encoded also includes multiple encoding units, each encoding unit including one or more bits. The multiple encoding units in the second input to be encoded can be the same multiple encoding units as the multiple encoding units in the first input to be encoded, or they can be different multiple encoding units. For example, the number of encoding units in the second input to be encoded is different from the number of encoding units in the first input to be encoded; for another example, the dimensions of the encoding units in the second input to be encoded are different from the dimensions of the encoding units in the first input to be encoded, etc., and this application does not limit this.

[0452] Similar to the first pattern, the second pattern may be used to indicate the distribution of multiple coding units in a second to-be-encoded input having the second pattern in one or more dimensions.

[0453] Optionally, the second pattern is the same as the first pattern. In the case where the second pattern is the same as the first pattern, the above-mentioned operation of obtaining the first input to be encoded and the operation of obtaining the second input to be encoded can be regarded as one operation.

[0454] Optionally, the second pattern is different from the first pattern. In the case that the first pattern is different from the second pattern, the operation of obtaining the first input to be encoded and the operation of obtaining the second input to be encoded can be regarded as two operations.

[0455] After obtaining the first input to be encoded and the second input to be encoded, the first input to be encoded and the second input to be encoded can be encoded respectively. The process of encoding the second input to be encoded is similar to the process of encoding the first input to be encoded. Please refer to the relevant description of encoding the first input to be encoded above and will not be repeated here.

[0456] After obtaining the third bit sequence, the first communication device can combine the second and third bit sequences according to certain rules to obtain a fourth bit sequence. For ease of distinction and explanation, the rule used to combine to obtain the fourth bit sequence is referred to herein as a combining rule. Exemplarily, the combining rule includes the second bit sequence first and the third bit sequence second; or the third bit sequence first and the second bit sequence second; or the second and third bit sequences are arranged alternately, etc., without limitation.

[0457] For ease of understanding, Figure 26 illustrates the process of deriving a fourth bit sequence from a first bit sequence. As shown in Figure 26 , the first bit sequence is processed (e.g., including but not limited to permutation) to obtain a first input to be encoded having a first pattern and a second input to be encoded having a second pattern. The first communication device can encode the first input to be encoded to obtain a second bit sequence, and encode the second input to be encoded to obtain a third bit sequence. The second and third bit sequences are merged according to the merging rule to obtain a fourth bit sequence.

[0458] Optionally, the method further includes: sending a fourth bit sequence.

[0459] After encoding to obtain the fourth bit sequence, the first communication device may perform scrambling, modulation, precoding, RE mapping, and other operations on the fourth bit sequence, and finally transmit the fourth bit sequence through an antenna after performing up-conversion, power amplification, and other operations. The signal transmitted by the first communication device through the antenna may be a radio frequency signal carrying the fourth bit sequence. In other words, the fourth bit sequence is transmitted in the radio frequency signal and is not necessarily output as a bit sequence.

[0460] Optionally, sending the fourth bit sequence includes: sending a radio frequency signal carrying the fourth bit sequence.

[0461] The specific process of sending the radio frequency signal can be achieved through existing technologies and will not be described in detail here.

[0462] Because the fourth bit sequence is derived based on the second bit sequence and the third bit sequence, and the second bit sequence is included in the fourth bit sequence, the steps of sending the second bit sequence and sending the fourth bit sequence can be combined into one step. Accordingly, another possible implementation of sending the second bit sequence is to send a fourth bit sequence, where the fourth bit sequence includes the second bit sequence.

[0463] For a more detailed description of the first communication device sending the fourth bit sequence, please refer to the above description of sending the second bit sequence, which will not be repeated here.

[0464] It is not difficult to see that the process shown in Figure 26 is like dividing the first bit sequence into two signals. These two signals can be processed in the same or different ways to obtain the second and third bit sequences, and then the two signals are combined. This can further improve decoding performance.

[0465] In fact, the present application is not limited thereto. The first bit sequence can also be divided into more signals, which are then combined after multiplexing, thereby further improving decoding performance.

[0466] The encoding method provided by the present application is described in detail above in conjunction with a plurality of accompanying drawings. The decoding method provided by the present application will be described in detail below in conjunction with the accompanying drawings. It can be understood that the decoding method provided by the present application can be used to decode a bit sequence obtained by encoding based on the encoding method provided in the above embodiment. In this embodiment, the bit sequence can be the above-mentioned second bit sequence, having the characteristics of the second bit sequence. Exemplarily, the second bit sequence is obtained by encoding one or more coding units in a first input to be encoded having a first pattern, the first input to be encoded including a plurality of coding units distributed in one or more dimensions, each coding unit in the plurality of coding units including one or more bits, and the first pattern being used to indicate the distribution of the plurality of coding units in one or more dimensions. By decoding the second bit sequence, a fifth bit sequence corresponding to the first bit sequence can be obtained.

[0467] In a possible implementation, the decoding method may correspond to the encoding method and may be used to decode a bit sequence obtained by the encoding method provided above.

[0468] Figure 27 is a schematic flow chart of a decoding method provided in an embodiment of the present application. The decoding method shown in Figure 27 can be performed by a second communication device, which can be, for example, a communication device such as a network device or terminal device, or a component configured in the communication device, such as a chip, a chip system, a processor, etc. It can also be a logic module or software that can implement some or all of the functions of the communication device, etc. This application is not limited to this.

[0469] The decoding method 2700 shown in Figure 27 includes steps 2710 to 2730. Each step in the method 2700 is described in detail below.

[0470] In step 2710, a second bit sequence is obtained, where the second bit sequence includes a plurality of bits.

[0471] From the physical layer processing described above in conjunction with FIG. 3 and the encoding process described above in FIG. 5 , it can be seen that the second bit sequence includes multiple coded bits, and the multiple coded bits can be obtained based on the encoding method shown in FIG. 5 above.

[0472] Optionally, obtaining the second bit sequence includes:

[0473] receiving a signal carrying a second bit sequence; and

[0474] A second bit sequence is obtained from the signal.

[0475] When the second communication device is a terminal device or a network device, the second communication device can receive the second bit sequence from the first communication device through an antenna. As mentioned above, the first communication device can carry the second bit sequence through a radio frequency signal, and the second communication device can receive the radio frequency signal carrying the second bit sequence through an antenna. In other words, after the second communication device receives the radio frequency signal, it can obtain the second bit sequence through an operation corresponding to the first communication device. Obtaining the second bit sequence may specifically include: down-converting the radio frequency signal, de-RE mapping, demodulating, de-scrambling, de-rate matching, and other operations, without limitation.

[0476] When the second communication device is a chip or a chip system, the second communication device may receive the second bit sequence through an input / output circuit or an interface circuit.

[0477] For a more detailed description of the second bit sequence, please refer to the relevant description in step 530 of the above method 500, which will not be repeated here.

[0478] In step 2720, the plurality of bits are arranged to obtain a first to-be-decoded input having a third pattern.

[0479] During the encoding process, the first communication device processes multiple bits in the first bit sequence to obtain an input to be encoded having a first pattern. Correspondingly, during the decoding process, the second communication device can process multiple bits in the second bit sequence to obtain a first input to be decoded having a third pattern. It can be understood that the first input to be decoded includes multiple bits in the second bit sequence. Since the decoding process can be performed by a decoder, the first input to be decoded can also be understood as multiple bits to be input to the decoder.

[0480] In this embodiment, the first input to be decoded has a third pattern. That is, the elements in the first input to be decoded are arranged in the style of the third pattern. Similar to the first pattern, the element can be understood as the minimum granularity of an input to be decoded arranged to have the third pattern. Each element includes one or more bits in the second bit sequence. In other words, the first input to be decoded is arranged with elements as the granularity, rather than bits as the granularity. Compared to a two-dimensional product code, a bit is expanded into an element, and an element can include one or more bits, so the element can also be called an expansion factor. At the decoding end, since one or more bits of each element will be input into the decoder for decoding, each element can also be called a decoding unit, a decoding element, etc., which is not limited in this application.

[0481] Similar to the encoding unit, each decoding unit can be a one-dimensional vector or a two-dimensional matrix. In other words, each decoding unit can be a one-dimensional or two-dimensional array. The understanding of the decoding unit is similar to that of the encoding unit. Please refer to the example above in conjunction with Figure 6 for understanding, and will not be repeated here.

[0482] The third pattern is a pattern corresponding to the first pattern. The first pattern can be used to indicate the distribution of multiple coding units in the first input to be encoded in one or more dimensions. Correspondingly, the third pattern can be used to indicate the distribution of multiple decoding units in the first input to be decoded in one or more dimensions. The directions in which the multiple coding units in the first input to be encoded are distributed are also the directions in which the multiple decoding units in the first input to be decoded are distributed. The decoding units at each position in the third pattern can include the same number of bits as the coding units at the corresponding positions in the first pattern, or in other words, the decoding units and the coding units are the same size.

[0483] Similar to the input to be encoded, the input to be decoded (e.g., the first input to be decoded) can be viewed as arranging multiple decoding units in a pattern (e.g., the third pattern), or alternatively, as filling multiple decoding units into different positions within the pattern. The pattern itself does not contain decoding units; the indication is used to indicate the distribution of multiple decoding units along various dimensions within the pattern, without limiting the number of bits included in each decoding unit, the arrangement thereof, or the dimensions of the decoding units. Therefore, the pattern can be viewed as a model constraining the distribution of multiple decoding units within the input to be decoded.

[0484] Because the decoding method for the second bit sequence corresponds to the encoding method for the first bit sequence, it is desirable to arrange the second bit sequence in a pattern similar to the first pattern. However, since parity bits are added to the first input to be encoded with the first pattern after encoding, the total number of bits in the resulting second bit sequence is greater than the total number of bits in the first bit sequence. Therefore, the dimension of the first pattern must be increased. For ease of distinction and explanation, the first pattern after the dimensional increase is referred to as the third pattern.

[0485] For example, the first pattern has a one-dimensional distribution with a dimension of K1, and the third pattern also has a one-dimensional distribution with a dimension of N1, where N1 is a positive integer greater than K1. For another example, the first pattern has a two-dimensional distribution with a dimension of K1×K2, and the third pattern also has a two-dimensional distribution with a dimension of N1×N2, where N1 is a positive integer greater than K1, and N2 is a positive integer greater than K2. For another example, the first pattern has a three-dimensional distribution with a dimension of K1×K2×K3, and the third pattern also has a two-dimensional distribution with a dimension of N1×N2×N3, where N1 is a positive integer greater than K1, N2 is a positive integer greater than K2, and N3 is a positive integer greater than K3.

[0486] Figures 28 to 30 are schematic diagrams of the third pattern. Figures 28 to 30 use the patterns shown in Figures 7, 8, and 10 of method 500 as first patterns to illustrate their corresponding third patterns. For ease of distinction and understanding, the locations corresponding to the first patterns are indicated by solid-line frames, while the pattern elements that are additional to the first pattern are indicated by dashed-line frames.

[0487] Corresponding to FIG7(a), the third pattern shown in FIG28(a) is a column vector consisting of N1 pattern elements, that is, the length of the column vector is N1. The first input to be decoded having the third pattern includes N1 decoding elements distributed in the vertical direction.

[0488] Corresponding to FIG7(b), the third pattern shown in FIG28(b) is a row vector consisting of N2 pattern elements. That is, the length of the row vector is N2, where N2 is a positive integer greater than K2. The first input to be decoded having this third pattern includes N2 decoding elements distributed in the horizontal direction.

[0489] Corresponding to FIG8 , the third pattern shown in FIG29 includes N1 row vectors and N2 column vectors, forming a two-dimensional matrix of N1×N2, where N1 and N2 are both positive integers. That is, the pattern includes N1 groups of pattern elements distributed horizontally, each group including N2 pattern elements. Alternatively, the pattern includes N2 groups of pattern elements distributed vertically, each group including N1 pattern elements. The first input to be decoded having the third pattern includes N1 groups of decoding elements distributed horizontally, each group including N2 decoding elements. Alternatively, the first input to be decoded having the third pattern includes N2 groups of decoding elements distributed vertically, each group including N1 decoding elements.

[0490] Corresponding to Figure 9, the third pattern shown in Figure 30 is an irregular pattern. The third pattern shown in Figures 30 (a), (b), and (c), respectively, corresponds to the patterns shown in Figures 9 (a), (b), and (c), respectively. A comparison reveals that, in each dimension, the number of pattern elements in the third pattern is greater than that in the first pattern.

[0491] Corresponding to Figure 10 , the third pattern shown in Figure 31 is a three-dimensional matrix of N1×N2×N3, where N1, N2, and N3 are all positive integers. This pattern includes N2 pattern elements in the x-direction, N1 pattern elements in the y-direction, and N3 pattern elements in the z-direction. The third pattern includes N2 groups of pattern elements distributed in the x-direction, each group including N1×N3 pattern elements. Alternatively, the pattern includes N1 group of pattern elements distributed in the y-direction, each group including N2×N3 pattern elements. Alternatively, the pattern includes N3 groups of pattern elements distributed in the z-direction, each group including N1×N2 pattern elements. The first input to be decoded having the third pattern includes N2 groups of decoding units distributed in the x-direction, each group of decoding units including N1×N3 decoding units; or, the first input to be decoded having the third pattern includes N1 group of decoding units distributed in the y-direction, each group of decoding units including N2×N3 decoding units; or, the first input to be decoded having the third pattern includes N3 groups of decoding units distributed in the z-direction, each group of decoding units including N1×N2 decoding units.

[0492] It should be noted that the number of pattern units in each dimension of the third pattern can be determined based on the number of bits distributed in each dimension of the first pattern and the code rate. The code rate in each dimension can be the ratio of information bits to coding bits in that dimension. In the first input to be encoded having the first pattern, the number of bits in each dimension can also be determined. The number of bits distributed in any dimension of the first input to be decoded can be determined based on the code rate and number of bits in that dimension, and the number of decoding units in that dimension can then be determined based on the number of bits included in the decoding units.

[0493] In the first input to be decoded having the third pattern, different decoding units have the same number of bits, or at least two decoding units have different numbers of bits. The number of bits included in each decoding unit can be recorded as the size of the decoding unit. In other words, in the first input to be decoded having the third pattern, different decoding units have the same size, or at least two decoding units have different sizes. It should also be noted that the size of each decoding unit in the first input to be decoded is consistent with the size of each encoding unit in the first input to be encoded.

[0494] For example, if the sizes of the multiple encoding units in the first input to be encoded are the same, then the sizes of the multiple decoding units in the first input to be decoded are also the same, and the sizes of the encoding units are consistent with the sizes of the decoding units. For example, if the encoding units are 4×4 in dimension, the decoding units are also 4×4 in dimension.

[0495] For another example, if the first unit to be encoded has two sizes of encoding units, such as 4×2 and 4×4, then the first input to be decoded also has two sizes of decoding units, such as 4×2 and 4×4. Taking the pattern shown in FIG13(b) as an example, assuming that the pattern is the first pattern, in the first input to be encoded having the first pattern, the size of the encoding units in the two left columns is 4×2, and the size of the encoding units in the four right columns is 4×4. Then, in the first input to be decoded having the third pattern, the size of the decoding units in the two left columns is 4×2, and the size of the decoding units in the four right columns is 4×4. The third pattern also includes at least one decoding unit corresponding to each row in the horizontal direction for carrying parity bits, and at least one decoding unit corresponding to each column in the vertical direction for carrying parity bits. The dimensions of at least one decoding unit corresponding to each row in the horizontal direction can follow the dimensions of its adjacent decoding unit, that is, 4×4 dimensions. The dimensions of at least one decoding unit corresponding to each column in the vertical direction can also follow the dimensions of its adjacent decoding unit. For example, the two decoding units on the left are 4×2 dimensions, and the four decoding units on the right are 4×4 dimensions.

[0496] It should be noted that, in order to more accurately control the bit rate, when calculating the coded bits in each dimension using the above bit rate and then calculating the number of decoding units, the calculated number of decoding units may not be an integer. In this case, the last decoding unit can be punctured to facilitate more accurate bit rate control.

[0497] More possible examples of the third pattern can be obtained by referring to the above text and expanding the patterns of Figures 7 to 18 in various dimensions. For the sake of brevity, the examples are not shown here.

[0498] Optionally, the third pattern is used to indicate the distribution of the multiple decoding units in one or more dimensions, including: the third pattern is used to indicate the number of the multiple decoding units distributed in each of the one or more dimensions.

[0499] It can be understood that since the multiple decoding units are decoding units in the first input to be decoded, and the first input to be decoded is an input to be decoded having a first pattern, the first pattern is used to indicate the number of the multiple decoding units in the first input to be decoded distributed in each dimension.

[0500] As can be seen from the above example, the third pattern can be a regular pattern. By indicating the number of pattern units in each dimension, the distribution of multiple decoding units in the first input to be decoded having the third pattern in each dimension can be determined.

[0501] For example, in the multiple examples described above in conjunction with Figures 28, 29, and 31, the third pattern can be used to indicate the number of pattern units distributed in each dimension. For example, the third pattern shown in Figure 28(a) can be used to indicate that the number of pattern units distributed in one dimension is N1; the third pattern shown in Figure 28(b) can be used to indicate that the number of pattern units distributed in one dimension is N2; the third pattern shown in Figure 29 can be used to indicate that the number of pattern units distributed in the horizontal direction (i.e., one dimension) is N2, and the number distributed in the vertical direction (i.e., another dimension) is N1; the pattern shown in Figure 31 can be used to indicate that the number of pattern units distributed in the x-axis direction (i.e., one dimension) is N2, the number distributed in the y-axis direction (i.e., another dimension) is N1, and the number distributed in the z-axis direction (i.e., another dimension) is N3. And so on, no further enumeration is given.

[0502] Optionally, the third pattern is used to indicate the distribution of multiple decoding units in one or more dimensions, and further includes: the third pattern is used to indicate a blank position in the third pattern.

[0503] As can be seen from the above example, the third pattern can also be an irregular pattern. Therefore, in addition to indicating the number of pattern units in each dimension, it can also indicate blank positions, so that the distribution of multiple decoding units in each dimension in the first input to be decoded having the third pattern can be obtained.

[0504] For a more detailed description of how the third pattern is used to indicate the number of pattern units in each dimension, and for a more detailed description of how the third pattern is used to indicate blank positions, please refer to the relevant description of how the first pattern is used to indicate the number of pattern units in each dimension, and for indicating blank positions in method 500, which will not be repeated here.

[0505] Optionally, the third pattern is further used to indicate a decoding position, and the decoding unit located at the decoding position is the decoding unit to be decoded.

[0506] As described in method 500, the first communication device can encode bits in some or all coding units in the first input to be encoded. The first pattern can be used to indicate encoding positions. That is, the first communication device can encode the coding units located at the encoding positions in the first input to be encoded. Corresponding to the encoding, the second communication device can also decode the decoding units corresponding to the same decoding positions in the first input to be decoded.

[0507] That is, excluding the decoding unit used to carry the parity bits, the decoding positions indicated by the third pattern are the same as the encoding positions indicated by the first pattern. Furthermore, the decoding unit used to carry the parity bits is also the decoding unit to be decoded. Therefore, for the third pattern, the decoding positions include the same positions as the encoding positions in the first pattern, as well as the positions where the decoding unit used to carry the parity bits is located.

[0508] Since the first communication device may encode some coding units in the first input to be encoded, the code rate can be more flexibly controlled to improve decoding performance. Indicating the decoding position in the third pattern allows the second communication device to decode the decoding unit at the decoding position corresponding to the encoding position, thereby enabling the second communication device to correctly decode and improve decoding performance.

[0509] In one possible implementation, the third pattern can be in the form of a one-dimensional vector, a two-dimensional matrix, or a multi-dimensional array to indicate the number of decoding units distributed in each dimension, blank positions in the third pattern, and decoding positions in the third pattern. For a more detailed description of how the third pattern indicates the above-mentioned items, please refer to the description of the first pattern in step 520 of method 500 above, and will not be repeated here.

[0510] The first input to be decoded refers to the data to be input into the decoder for decoding, that is, the data to be decoded, the bits to be decoded, the coded bits to be decoded, the input data to be decoded, the input bits to be decoded, etc. In the present application, the first input to be decoded has a third pattern, which is used to indicate the distribution of multiple decoding units in one or more dimensions. Therefore, the data to be input into the decoder may be presented as a one-dimensional vector, a two-dimensional matrix, or an array of larger dimensions, which is not limited in this application. In addition, whether it is a one-dimensional vector, a two-dimensional matrix, or an array of larger dimensions, the first input to be decoded is input into the decoder with the decoding unit as the granularity.

[0511] Optionally, step 2720 specifically includes:

[0512] Arrange the multiple bits of the second bit sequence according to an arrangement rule to obtain multiple decoding units; and

[0513] The plurality of decoding units are arranged to obtain an input to be decoded having a third pattern.

[0514] The permutation rule is used to indicate: the dimension of each decoding unit, the number of bits included in each decoding unit in each dimension, and the permutation of one or more bits included in each decoding unit. A more detailed description of the permutation rule can be found in the relevant description of the permutation rule in method 500 above, and will not be repeated here.

[0515] The second communication device can first arrange multiple bits in the second bit sequence into multiple decoding units according to the arrangement rule, and then use the decoding units as the granularity and map (or fill) the multiple decoding units into multiple pattern units according to the distribution of multiple pattern units indicated by the third pattern in each dimension to obtain a first input to be decoded having the third pattern.

[0516] Alternatively, the second communication device may map each decoding unit to each pattern unit of the third pattern while constructing the decoding unit. That is, the process of obtaining the decoding unit and the process of obtaining the first input to be decoded may be performed synchronously.

[0517] In step 2730, one or more decoding units in the first input to be decoded are decoded to obtain a fifth bit sequence.

[0518] The second communication device can perform decoding using a method corresponding to the encoding. As described in step 530 of method 500, the first communication device can encode the first input to be encoded using component encoding or not. For example, for a first input to be encoded having a one-dimensional distribution pattern, encoding can be performed using existing techniques or component encoding; for a first input to be encoded having a multi-dimensional distribution pattern, component encoding can be performed. Accordingly, the second communication device can perform component decoding on one or more decoding units in the first input to be decoded, or can perform decoding using existing techniques without performing component decoding.

[0519] As mentioned above, the third pattern can be used to indicate the decoding position in the third pattern, that is, the decoding object is one or more decoding units at the decoding position in the first input to be decoded having the third pattern, but not necessarily all decoding units in the first input to be decoded.

[0520] Optionally, step 2730 specifically includes: performing component decoding on one or more decoding units in the first input to be decoded to obtain a fifth bit sequence.

[0521] In this application, component decoding refers to decomposing multiple bits to be decoded into one or more dimensions using decoding units as the granularity, and performing decoding separately in one or more directions. The process of decomposing multiple bits to be decoded into one or more dimensions using decoding units as the granularity is also the process of obtaining the first input to be decoded described above. Decoding separately in one or more directions means that the decoding units in each direction are used as bits involved in decoding and input into the decoder for decoding. In other words, each decoding is performed on the bits in the decoding units in the same direction.

[0522] It should be noted that although the first input to be decoded having the third pattern is obtained at the decoding unit granularity in the aforementioned step 2720, the decoding process is still performed at the bit granularity. That is, one or more bits in each decoding unit can be restored to a one-dimensional vector before decoding, or in other words, before being input into the decoder. The process of restoring to a one-dimensional vector is the inverse process of arranging the decoding units according to the arrangement rules described in the aforementioned step 2720, and will not be described in detail here. It will be understood that if the decoding units are originally one-dimensional vectors, the above-mentioned restoration to a one-dimensional vector operation is not necessary.

[0523] Corresponding to the encoding, the decoder can perform decoding in one or more decoding directions. The decoding direction can be the direction in which the decoding units in the first input to be decoded having the third pattern are distributed, or can be other directions, which are not limited in this application.

[0524] Exemplarily, the decoding direction includes one or more of the following directions: a direction corresponding to one or more dimensions in which the multiple decoding units indicated by the third pattern are distributed, a horizontal direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions of the third pattern, a vertical direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions of the third pattern, or a diagonal direction within a two-dimensional plane determined by any two dimensions among the multiple dimensions of the third pattern.

[0525] It should be understood that the decoding direction of the first input to be decoded is consistent with the encoding direction of the first input to be encoded, thereby ensuring correct decoding at the decoding end.

[0526] For a more detailed description of the decoding direction, please refer to the example and related description of the encoding direction in step 530 of the above method 500 in conjunction with the accompanying drawings, which will not be repeated here.

[0527] Optionally, the component decoding of one or more decoding units in the first input to be decoded may specifically include: obtaining one or more groups of input bits from one or more decoding units in the first input to be decoded according to one or more decoding directions; and decoding the one or more groups of input bits respectively.

[0528] The one or more decoding units in the first input to be decoded may refer to decoding units located at the decoding position of the first input to be decoded. The one or more groups of input bits are determined from the decoding units at the decoding position of the first input to be decoded according to one or more decoding directions. Each group of input bits may include bits distributed in one or more decoding units in the same decoding direction, so each group of input bits may include one or more bits. It should be noted that there may be one or more groups of bit inputs in the same decoding direction, and this application does not limit the number of groups of bit inputs in each decoding direction.

[0529] Corresponding to the encoding, the decoder can perform decoding in each decoding direction according to a decoding order. The decoding order can be used to indicate the order in which the bits in each group of input bits are decoded. The decoding order of the first input to be decoded is consistent with the encoding order of the first input to be encoded, thereby ensuring correct decoding at the decoding end.

[0530] Furthermore, respectively decoding the one or more groups of input bits may specifically include: decoding each group of input bits in the one or more groups of input bits in a decoding order.

[0531] The decoding order can be used to indicate the order in which the individual input bits in each group of input bits are decoded. Since decoding can be implemented by a decoder, it can also be said that the decoding order can be used to indicate the order in which each group of input bits are input into the decoder. As mentioned above, the decoding process is performed at a bit granularity. Since each group of input bits is carried in one or more decoding units, the order in which each group of input bits is input into the decoder can be controlled by controlling the order in which the decoding units are input into the decoder. Since a group of input bits may be carried in multiple decoding units, and the order in which multiple decoding units are input into the decoder can be determined based on the decoding order, it can also be said that the decoding order is used to indicate the order in which multiple decoding units used to carry each group of input bits are input into the decoder.

[0532] Similar to the encoding order, the decoding order can be, for example, the same as the order in which the pattern units are numbered, or it can be opposite to the order in which the pattern units are numbered, or it can be in a left-to-right order in the horizontal decoding direction, or it can be in a top-to-bottom order in the vertical decoding direction, or it can be in a diagonal decoding direction from the upper left to the lower right order, and so on. This application does not limit this.

[0533] For a more detailed description of the decoding order, please refer to the example and related description of the encoding order in step 530 of the above method 500 in conjunction with the accompanying drawings, which will not be repeated here.

[0534] In a specific implementation, a sub-decoder may be configured in each decoding direction for component decoding. It should be understood that a decoder may include multiple sub-decoders, each of which may be used to decode one or more groups of input bits in a decoding direction.

[0535] Furthermore, one or more sub-decoders can be configured in each decoding direction, corresponding to one or more groups of input bits. The one or more sub-decoders in each decoding direction can synchronously decode one or more groups of input bits in the same decoding direction, thereby improving processing efficiency and facilitating increased throughput.

[0536] Corresponding to the encoding, when the decoder decodes multiple groups of input bits, it can use the same decoding type for decoding, or it can use different decoding types for decoding. The decoding type for the first input to be decoded is consistent with the encoding type for the first input to be encoded, thereby ensuring correct decoding at the decoding end.

[0537] Optionally, among the multiple groups of input bits, the same decoding type is used for decoding different groups of input bits in the same decoding direction.

[0538] That is, multiple groups of input bits in the same coding direction can be encoded using the same coding type.

[0539] Furthermore, in the case of the same decoding type, decoding parameters used to decode different groups of input bits in the same decoding direction may be the same or different.

[0540] Optionally, among the multiple groups of input bits, different decoding types are used to decode different groups of input bits in the same decoding direction.

[0541] Optionally, the decoding types used to decode the multiple groups of input bits are the same.

[0542] That is, regardless of the decoding direction, all input bits can be decoded using the same decoding type.

[0543] Optionally, different decoding types are used for decoding at least two groups of input bits among the multiple groups of input bits.

[0544] That is, multiple groups of input bits in one or more decoding directions may be decoded using different decoding types.

[0545] For a more detailed description of the decoding type and decoding parameters, please refer to the description of the encoding type and encoding parameters in step 530 of the above method 500, which will not be repeated here.

[0546] In a specific implementation, different sub-decoders can be configured for different decoding types in the same decoding direction. For example, if two decoding types are used in the horizontal direction, sub-decoders 1a and 1b can be configured in the horizontal direction. If four decoding types are used in the vertical direction, sub-decoders 2a to 2d can be configured in the vertical direction.

[0547] In this way, multiple groups of input bits in the same decoding direction can also be decoded in parallel, which can greatly improve the decoding efficiency.

[0548] The fifth bit sequence corresponds to the first bit sequence. If the second communication device can correctly decode the second bit sequence, the decoded fifth bit sequence is consistent with the first bit sequence obtained by the first communication device. In other words, the fifth bit sequence is the first bit sequence obtained by decoding, or the received first bit sequence.

[0549] It is understandable that since the first input to be encoded is input to the encoder for encoding at a granularity of coding units, although the bits in each coding unit are restored to a one-dimensional form before encoding, the ordering of the bits in the one-dimensional vector restored according to the encoding order is not necessarily the same as the ordering of the bits in the first bit sequence. Therefore, the bit sequence output after decoding (denoted as the eighth bit sequence for ease of distinction and explanation) is not necessarily the same as the fifth bit sequence, or in other words, it is not necessarily the same as the first bit sequence. The second communication device can further combine the first pattern to obtain the fifth bit sequence.

[0550] Furthermore, performing component decoding on one or more decoding units in the first to-be-decoded input to obtain a fifth bit sequence includes:

[0551] performing component decoding on the first input to be decoded to obtain an eighth bit sequence, the eighth bit sequence including a plurality of bits obtained by decoding;

[0552] Arranging the eighth bit sequence to obtain a first decoding output having a first pattern, the first decoding output including a plurality of units distributed in one or more dimensions, the first pattern being used to indicate a distribution of the plurality of units in the one or more dimensions; and

[0553] A fifth bit sequence is obtained from the first decoded output.

[0554] The process of component-wise decoding the first input to be decoded to obtain the eighth bit sequence is similar to the process of component-wise encoding the first input to be encoded to obtain the second bit sequence in step 530 of method 500. The multiple bits obtained after decoding can be output according to a preset output rule to obtain the eighth bit sequence. Since the output rule and the process of obtaining the second bit sequence have been described in detail in method 500 above with reference to various diagrams, the process of component-wise decoding the first input to be decoded to obtain the eighth bit sequence can be referred to above and will not be further described.

[0555] After obtaining the eighth bit sequence, the second communication device may arrange multiple bits in the eighth bit sequence according to the first pattern to obtain a first decoded output having the first pattern. It will be understood that the first decoded output corresponds to the first input to be encoded in method 500. The first pattern may be used to indicate the distribution of multiple units in the first decoded output having the first pattern in one or more dimensions.

[0556] In this embodiment, the first pattern and the third pattern correspond to each other. The second communication device can obtain the first pattern based on the third pattern. For example, the first pattern can be obtained by updating the dimensions of the third pattern. In other words, the second communication device can pre-store one of the first pattern or the third pattern and can then update the other to obtain the other.

[0557] The second communication device can obtain a fifth bit sequence from the first decoded output based on the first pattern. The second communication device can obtain bits from each unit in the first decoded output according to the arrangement rule of each unit, and arrange the bits obtained from each unit into a one-dimensional vector according to the arrangement of each unit in the first pattern, thereby obtaining the fifth bit sequence. The process of obtaining the fifth bit sequence from the bits in each unit of the first decoded output can be called extraction.

[0558] Optionally, the multiple units included in the first decoding output include a first unit and at least one copy of the first unit, and the first unit and the at least one copy are at different positions in the first decoding output.

[0559] It should be understood that the process by which the second communication device obtains the fifth bit sequence from the first decoded output according to the first pattern is similar to the process by which the first communication device obtains the first input to be encoded having the first pattern according to the first pattern in step 520 of method 500. For details, please refer to the relevant description of method 500 and will not be repeated here.

[0560] As described above in method 500, the first input to be encoded includes a first coding unit and at least one replica corresponding to the first coding unit. After decoding to obtain a first decoded output, the first coding unit and the at least one replica are located in the first pattern at the same positions as the first unit and the at least one replica corresponding to the first coding unit.

[0561] It should be understood that the number of the first units may be one or more, and this application does not limit this.

[0562] As previously described, the first pattern can be used to indicate whether each coding unit should be replicated, the number of replicates to be replicated, and their positions within the first pattern. Based on this, the second communication device can determine which units in the first decoded output are identical. In this way, the second communication device can combine the identical units (e.g., weighted combining) to recover one or more bits corresponding to the multiple identical units. The specific implementation of the combining process can be implemented using existing technologies and is not described in detail here.

[0563] Since one coding unit is copied into one or more copies, multiple copies of the one or more bits can be obtained through decoding at the decoding end, and then the one or more bits can be restored from the multiple copies of the data, thereby improving the decoding performance.

[0564] The above describes the process of the second communication device decoding the second bit sequence in conjunction with multiple figures. In order to better understand the above process, Figure 32 shows the encoding method from the perspective of signal flow.

[0565] As shown in Figure 32, the second bit sequence is permuted to obtain a first input to be decoded having a third pattern. Decoding the first input to be decoded, for example, by component decoding using multiple sub-decoders, yields an eighth bit sequence. Permuting the eighth bit sequence yields a first decoded output having a first pattern. Decimating the first decoded output yields a fifth bit sequence.

[0566] In a specific implementation, the permutation and extraction operations may be implemented by a permutator, and the decoding operation may be implemented by a decoder, which may include multiple sub-decoders for component decoding. This application does not limit the specific names of the modules used to implement the various operations.

[0567] Based on the technical solution provided above, the first communication device can arrange multiple bits at the granularity of decoding units, thereby obtaining a first input to be decoded having a third pattern. Since the number of bits included in a decoding unit is not fixed and can be flexibly adjusted, a limited number of patterns can be adapted to a variety of different data transmission rates, and the number of bits in the encoding unit can be flexibly adjusted with the data transmission rate. Furthermore, the third pattern can be used to constrain the distribution of multiple decoding units in the first input to be decoded along one or more dimensions. In other words, component decoding can be used or not for decoding as needed. For example, if the first communication device uses component encoding, the second communication device can use component decoding. Furthermore, when using component decoding, the second communication device can decode multiple groups of input bits in the same decoding direction in parallel. This means that product parallelism is easily achieved, which can improve processing efficiency and facilitate improvements in peak throughput and area efficiency. Furthermore, since the component decoding process can perform decoding in multiple different decoding directions, the same decoding unit can participate in more decoding operations, which is more conducive to error correction and better decoding performance.

[0568] The decoding method provided by the present application is described in detail above with reference to a plurality of accompanying drawings. In the above examples, the decoding process is described based on a first input to be decoded having a third pattern. In fact, the present application is not limited to this. As described in the above method 500, the first communication device may also process the first bit sequence to obtain an input to be encoded having a different pattern, such as a second input to be encoded having a second pattern, and then encode the second input to be encoded to obtain a third bit sequence, and then combine the second bit sequence and the third bit sequence to obtain a fourth bit sequence and send it out. Corresponding to the encoding, the second communication device may obtain the fourth bit sequence, obtain the second bit sequence and the third bit sequence therefrom, and then obtain inputs to be decoded having different patterns for decoding, and then combine the decoded bits according to certain rules to obtain a one-dimensional vector output.

[0569] Optionally, the method further includes:

[0570] Acquire a third bit sequence, where the third bit sequence includes a plurality of bits;

[0571] Arranging a plurality of bits in the third bit sequence to obtain a second input to be decoded having a fourth pattern, the second input to be decoded comprising a plurality of decoding units distributed in one or more dimensions, each of the plurality of decoding units comprising one or more bits of the plurality of bits, the fourth pattern being used to indicate a distribution of the plurality of decoding units in the one or more dimensions;

[0572] Decoding one or more decoding units in the second input to be decoded to obtain a sixth bit sequence;

[0573] Based on the fifth bit sequence and the sixth bit sequence, a seventh bit sequence is obtained.

[0574] It should be understood that the fourth pattern may correspond to the second pattern in method 500 , the second input to be decoded may correspond to the second input to be encoded in method 500 , and the sixth bit sequence may correspond to the first bit sequence in method 500 .

[0575] Similar to the first input to be decoded, the second input to be decoded also includes multiple decoding units, each decoding unit including one or more bits. The multiple decoding units in the second input to be decoded and the multiple decoding units in the first input to be decoded can be the same multiple decoding units, or they can be different multiple decoding units. For example, the number of decoding units in the second input to be decoded is different from the number of decoding units in the first input to be decoded; for another example, the dimensions of the decoding units in the second input to be decoded are different from the dimensions of the decoding units in the first input to be decoded, etc., and this application does not limit this.

[0576] Similar to the third pattern, the fourth pattern may be used to indicate the distribution of multiple decoding units in the second to-be-decoded input having the fourth pattern in one or more dimensions.

[0577] Optionally, the fourth pattern is the same as the third pattern. In the case that the fourth pattern is the same as the third pattern, the above-mentioned operation of obtaining the first input to be decoded and the operation of obtaining the second input to be decoded can be regarded as one operation.

[0578] Optionally, the fourth pattern is different from the third pattern. In the case that the fourth pattern is different from the third pattern, the operation of obtaining the first input to be decoded and the operation of obtaining the second input to be decoded can be regarded as two operations.

[0579] After obtaining the first and second inputs to be decoded, the first and second inputs to be decoded can be decoded respectively. The process of decoding the second input to be decoded is similar to the process of decoding the first input to be decoded. Please refer to the relevant description of decoding the first input to be decoded above and will not be repeated here.

[0580] After obtaining the sixth bit sequence, the first communication device may combine the fifth bit sequence and the sixth bit sequence (eg, weighted combination) to obtain a seventh bit sequence.

[0581] It can be understood that the fifth and sixth bit sequences can both be considered the first bit sequence obtained by decoding, or the first bit sequence received. Because the first communication device splits the first bit sequence into two signals for encoding, the resulting fourth bit sequence is equivalent to carrying two copies of the first bit sequence, thereby improving decoding performance through the diversity effect.

[0582] Optionally, the third bit sequence and the second bit sequence are included in a fourth bit sequence, and the second bit sequence and the third bit sequence are obtained from the fourth bit sequence. Accordingly, the method further includes: obtaining the fourth bit sequence.

[0583] Optionally, obtaining the fourth bit sequence includes:

[0584] receiving a radio frequency signal carrying a fourth bit sequence; and

[0585] A fourth bit sequence is obtained from the radio frequency signal.

[0586] The second communication device may receive the fourth bit sequence from the first communication device via an antenna. As previously described, the first communication device may carry the fourth bit sequence via a radio frequency signal, and the second communication device may receive the radio frequency signal carrying the fourth bit sequence via an antenna. In other words, after receiving the radio frequency signal, the second communication device may obtain the fourth bit sequence through operations corresponding to those of the first communication device. Obtaining the fourth bit sequence may specifically include down-converting the radio frequency signal, performing RE demapping, demodulating, descrambling, and performing rate dematching, without limitation.

[0587] That is, another possible implementation of obtaining the second bit sequence described in step 2710 is: obtaining the second bit sequence from the fourth bit sequence.

[0588] It is not difficult to see that the process shown in Figure 33 corresponds to Figure 26 in method 500 above, and can be understood as the inverse process corresponding to the process shown in Figure 26. In the process shown in Figure 26, the first bit sequence is divided into two signals. These two signals can be processed in the same or different ways to obtain a second bit sequence and a third bit sequence, and then the two signals are merged to output a fourth bit sequence. In Figure 33, two signals, a second bit sequence and a third bit sequence, can be obtained from the fourth bit sequence. These two signals can be processed in the same or different ways to obtain a fifth bit sequence and a sixth bit sequence, and then merged to obtain a seventh bit sequence. By dividing the first bit sequence into more signals and merging them after multi-way processing, decoding performance can be further improved.

[0589] In combination with any one of the embodiments of method 500 or method 2700 above, it can be seen that in the process of implementing the above method, there are multiple parameters between the first communication device and the second communication device that need to be determined. The possible signaling between the first communication device and the second communication device will be described in combination with these parameters below.

[0590] To ensure that the encoder and decoder can obtain bit sequences for the elements in the pattern according to the same rules, the encoder and decoder can predetermine an arrangement rule. This arrangement rule can be used to indicate the style of each element, that is, the dimension of each element, the number of bits included in each element, and the arrangement of one or more bits in each element. It should be understood that for the encoder, an element can be called an encoding unit, and for the decoder, an element can also be called a decoding unit. This application is not limited to this.

[0591] At least one of the dimension of the coding unit, the number of bits included in the coding unit, or the arrangement of one or more bits in the coding unit (or at least one of the arrangement rules) can be predefined, or can be determined by the first communication device itself, or can be instructed by the second communication device communicating with the first communication device. This application is not limited to this. In other words, the arrangement rule can be determined by one or more of the following: determined by a predefined rule, determined by the first communication device itself, or determined according to the instruction of the second communication device.

[0592] For example, the dimension of a coding unit, the number of bits included in a coding unit, or the arrangement of one or more bits in a coding unit are all predefined by the protocol. For another example, some of the dimensions of a coding unit, the number of bits included in a coding unit, or the arrangement of one or more bits in a coding unit are predefined by the protocol, and the remaining items are determined by the first communication device. For another example, some of the dimensions of a coding unit, the number of bits included in a coding unit, or the arrangement of one or more bits in a coding unit are predefined by the protocol, and the remaining items are indicated by the second communication device.

[0593] If at least one of the permutation rules is determined independently by the first communication device, the first communication device may also send information indicating at least one of the permutation rules to a second communication device with which it is communicating. Optionally, the method further includes: the first communication device sending first information indicating one or more of the following: the dimension of each coding unit, the number of bits included in each dimension of each coding unit, or the permutation of one or more bits included in each coding unit. Accordingly, the second communication device receives the first information.

[0594] If at least one of the permutation rules is indicated by the second communication device to the first communication device, the first communication device may receive information indicating at least one of the permutation rules from the second communication device. Optionally, the method further includes: the first communication device receiving first information indicating one or more of the following: the dimension of each coding unit, the number of bits included in each dimension of each coding unit, or the permutation of one or more bits included in each coding unit. Accordingly, the second communication device transmits the first information.

[0595] In order to ensure the correct decoding at the decoding end, the second communication device of the first communication device can pre-store the first pattern or a pattern corresponding to the first pattern (for example, recorded as a third pattern), or can also pre-store multiple patterns including the first pattern or the third pattern. Among them, the third pattern corresponding to the first pattern can be understood as being obtained by expanding the dimensions of the first pattern in different directions on the basis of the first pattern, taking into account the addition of the check bit. For example, the first pattern is K1×K2 dimensional, and the third pattern is N1×N2 dimensional, where N1 is greater than K1 and N2 is greater than K2. By pre-storing a variety of different patterns at both the transmitting and receiving ends, a wider range of code types can be adapted. Since different services often require different code types, for example, real-time video streaming services are better suited to coupled code types, and non-streaming media services are better suited to product code types, by pre-storing a variety of different patterns and adapting a variety of different code types, more different types of business needs can be met.

[0596] In the case that the first communication device and the second communication device each pre-store a plurality of patterns, the first communication device may also determine with the second communication device through signaling which pattern to use for encoding and decoding in this encoding and decoding.

[0597] One of the first communication device and the second communication device may determine a pattern to be used for current coding. For example, in this embodiment, the pattern to be used for current coding includes the first pattern, or includes the first pattern and the second pattern.

[0598] Optionally, the method further includes: the first communication device sending third information, the third information being used to indicate a pattern used for the encoding, and the second communication device correspondingly receiving the third information.

[0599] That is, the first communication device indicates the pattern used for encoding to the second communication device through the third information. Since the pattern used for decoding corresponds to the pattern used for encoding and can be converted between them, the third information can also be used to indicate the pattern used for decoding.

[0600] For example, in some of the above embodiments, the pattern used for encoding is a first pattern, and the third information may be information that can identify the first pattern, such as an identifier or index corresponding to the first pattern in multiple pre-stored patterns. In other embodiments, the patterns used for encoding are a first pattern and a second pattern, and the third information may be information that can identify the first pattern and the second pattern, such as an identifier or index corresponding to the first pattern and the second pattern in multiple pre-stored patterns.

[0601] For example, if the encoding pattern is the first pattern, since the first pattern used by the encoding end corresponds to the third pattern used by the decoding end, the two can be converted to each other. Therefore, based on the third information, the second communication device can use the third pattern corresponding to the first pattern for decoding. In other words, the third information can also be used to indicate the third pattern.

[0602] Optionally, the method further includes: the first communication device receiving third information, the third information being used to indicate a pattern used for the decoding, and the second communication device sending the third information accordingly.

[0603] That is, the second communication device indicates the pattern used for decoding to the first communication device through the third information. Since the pattern used for decoding corresponds to the pattern used for encoding and can be converted between them, the third information can also be used to indicate the pattern used for encoding.

[0604] For example, if the pattern used for encoding is the first pattern, since the first pattern used by the encoding end corresponds to the third pattern used by the decoding end, they can be converted to each other. Therefore, the first communication device can use the first pattern corresponding to the third pattern for decoding based on the third information. In other words, the third information can also be used to indicate the first pattern.

[0605] Furthermore, one or more of the encoding direction, encoding order, encoding type used to encode each group of input bits, or encoding rate of each group of input bits may be predefined, or may be determined by the first communication device itself, or may be instructed by the second communication device. This application does not limit this.

[0606] Optionally, the method further includes: the first communication device sending second information, the second information being used to indicate one or more of the following: one or more encoding directions, an encoding order, an encoding type used to encode each group of input bits, or an encoding rate for each group of input bits. Accordingly, the second communication device receives the second information.

[0607] As described above in method 2700, the decoding direction is consistent with the encoding direction, the decoding order of each group of input bits is consistent with the encoding order of the corresponding group of input bits, the decoding type used to decode each group of input bits is consistent with the encoding type used to encode the corresponding group of input bits, and the encoding rate of each group of input bits can be used to determine the number of bits included in each decoding unit used to carry parity bits in the third pattern. Therefore, based on the second information sent by the first communication device, the second communication device can determine one or more of the following: one or more decoding directions, a decoding order, a decoding type used to decode each group of input bits, or an encoding rate for each group of input bits. In other words, the second information can be used to indicate one or more of the following: one or more decoding directions, a decoding order within each decoding direction, a decoding type used to decode each group of input bits, or an encoding rate for each group of input bits.

[0608] Optionally, the method further includes: the second communication device sending second information, the second information being used to indicate one or more of the following: one or more decoding directions, a decoding order, a decoding type used to decode each group of input bits, or an encoding rate of each group of input bits. Accordingly, the first communication device receives the second information.

[0609] Similar to the above, the first communication device can also determine one or more of the following based on the second information: one or more coding directions, the coding order in each coding direction, the coding type used to encode each group of input bits, or the coding rate of each group of input bits.

[0610] It should be noted that in some cases, the coding type used to encode multiple groups of input bits is the same, and the second information may indicate a single coding type for the multiple groups of input bits, rather than indicating a coding type for each group of input bits. In other cases, the coding type used to encode multiple groups of input bits in the same coding direction is the same, and the second information may indicate a single coding type for each coding direction, rather than indicating a coding type for each group of input bits. It is understood that a communication device that receives the second information can determine, based on the second information, the coding type used to encode the multiple groups of input bits.

[0611] Similarly, in some cases, the encoding rate used to encode multiple groups of input bits is the same, and the second information may indicate a single encoding rate for the multiple groups of input bits, rather than indicating an encoding rate for each group of input bits. In other cases, the encoding rate used to encode multiple groups of input bits in the same coding direction is the same, and the second information may indicate a single encoding rate for each coding direction, rather than indicating an encoding rate for each group of input bits. It is understood that a communication device that receives the second information can determine the encoding rates corresponding to the multiple groups of input bits based on the second information.

[0612] It will be understood that this application does not limit how the second information indicates the above information, but based on the interpretation of the second information, the communication device (such as the first communication device or the second communication device) that receives the second information can determine one or more of the following: one or more coding directions, the coding order in each coding direction, or the coding type used to encode each group of input bits.

[0613] In one possible design, the first communication device indicates the coding rate of each group of input bits through a downlink control message (such as downlink control information (DCI)), and the above-mentioned one or more coding directions, coding order, coding type used for encoding each group of input bits, etc. are predefined by the protocol.

[0614] In one possible design, the first information, second information, and third information may be carried in the same signaling. In another possible design, the first information, second information, and third information may be carried in different signalings, respectively. Alternatively, any two of the first information, second information, and third information may be carried in one signaling, and the other may be carried in another signaling. This application is not limited to this.

[0615] Based on the above scheme, one of the first communication device or the second communication device uses one or more of the above-mentioned first information, second information or third information to indicate various information involved in the encoding and decoding process, such as the arrangement rules, patterns, encoding directions, encoding orders, encoding types, encoding bit rates, etc. of the coding units, so that the encoding end and the decoding end perform encoding and decoding based on the same rules, which is conducive to improving decoding performance.

[0616] The method provided by the embodiment of the present application is described in detail above with reference to a plurality of drawings. The device provided by the embodiment of the present application is described below with reference to the drawings.

[0617] Figures 34 and 35 are schematic block diagrams of possible devices provided in embodiments of the present application. These devices can be used to implement the functions of the first communication device or the second communication device in the above method embodiments, thereby also achieving the beneficial effects of the above method embodiments.

[0618] FIG34 is a schematic block diagram of an apparatus according to an embodiment of the present application. The apparatus 3400 shown in FIG34 may include a processing module 3410 and a communication module 3420.

[0619] In one possible design, the apparatus 3400 may be used to implement the communication method implemented by the first communication apparatus in the embodiment shown in FIG5 . For example, the processing module 3410 is used to implement the processing-related steps such as acquisition and encoding performed by the first communication apparatus in steps 510 to 530 of the method 500 , and the communication module 3420 is used to implement the sending and / or receiving steps performed by the first communication apparatus in the method 500 .

[0620] Exemplarily, the processing module 3410 can be used to: obtain a first bit sequence, the first bit sequence including multiple bits; process the multiple bits to obtain a first input to be encoded having a first pattern, the first input to be encoded including multiple coding units distributed in one or more dimensions, each of the multiple coding units including one or more bits of the multiple bits, the first pattern being used to indicate the distribution of the multiple coding units in the one or more dimensions; encode one or more coding units in the first input to be encoded to obtain a second bit sequence.

[0621] Optionally, the communication module 3420 may be configured to send a second symbol sequence.

[0622] Optionally, the communication module 3420 can be used to send or receive first information, where the first information is used to indicate one or more of the following: the dimension of each coding unit, the number of bits included in each coding unit in each dimension, or the arrangement of one or more bits included in each coding unit.

[0623] Optionally, the communication module 3420 can be used to send or receive second information, where the second information is used to indicate one or more of the following: the one or more encoding directions, the encoding order, the encoding type used to encode each group of input bits, or the encoding bit rate of each group of input bits, and the encoding order is used to indicate the order in which each group of input bits is input into the encoder.

[0624] Optionally, the communication module 3420 may be configured to send or receive third information, where the third information is used to indicate a pattern used for the encoding.

[0625] A more detailed description of the processing module 3410 and the communication module 3420 can be directly obtained by referring to the relevant description in the method embodiment shown in FIG5 , and is not repeated here.

[0626] In another possible design, device 3400 may be used to implement the communication method implemented by the second communication device in the embodiment shown in Figure 27. For example, processing module 3410 is used to implement processing-related steps such as acquisition and encoding performed by the first communication device in steps 2710 to 2730 of method 2700, and communication module 3420 is used to implement steps such as sending and / or receiving performed by the first communication device in method 500.

[0627] Exemplarily, the processing module 3410 may be used to: obtain a second bit sequence, the second bit sequence including multiple bits; process the multiple bits to obtain a first input to be decoded having a third pattern, the first input to be decoded including multiple decoding units distributed in one or more dimensions, each of the multiple decoding units including one or more bits of the multiple bits, the third pattern being used to indicate the distribution of the multiple decoding units in the one or more dimensions; and decode the one or more decoding units in the first input to be decoded to obtain a fifth bit sequence.

[0628] Optionally, the communication module 3420 may be configured to receive a second symbol sequence.

[0629] Optionally, the communication module 3420 can be used to receive or send first information, where the first information is used to indicate one or more of the following: the dimension of each coding unit, the number of bits included in each coding unit in each dimension, or the arrangement of one or more bits included in each coding unit.

[0630] Optionally, the communication module 3420 can be used to receive or send second information, where the second information is used to indicate one or more of the following: the one or more encoding directions, the encoding order, the encoding type used to encode each group of input bits, or the encoding bit rate of each group of input bits, and the encoding order is used to indicate the order in which each group of input bits is input into the encoder.

[0631] Optionally, the communication module 3420 may be configured to receive or send third information, where the third information is used to indicate a pattern used for the decoding.

[0632] A more detailed description of the processing module 3410 and the communication module 3420 can be directly obtained by referring to the relevant description in the method embodiment shown in FIG5 , and is not repeated here.

[0633] It should be noted that a communication module may also be referred to as a transceiver module, transceiver unit, transceiver, transceiver, or transceiver device. A processing module may also be referred to as a processor, processing board, processing unit, or processing device. Optionally, the communication module is used to perform the sending and receiving operations of the first communication device or the second communication device in the above method. The device in the communication module that implements the receiving function may be considered a receiving module, and the device in the communication module that implements the sending function may be considered a sending module. That is, the communication module may include a receiving module and a sending module.

[0634] It should also be noted that, in one possible design, the aforementioned processing module and / or communication module may be implemented through a virtual module. For example, the processing module may be implemented through a software functional unit or a virtual device, and the communication module may be implemented through a software function or a virtual device. In another possible design, the processing module or the communication module may also be implemented through a physical device. For example, if the device is implemented using a chip / chip circuit, the communication module may be an input / output circuit and / or a communication interface that performs input operations (corresponding to the aforementioned receiving operations) and output operations (corresponding to the aforementioned sending operations); the processing module may be an integrated processor, microprocessor, or integrated circuit.

[0635] The division of modules in the embodiments of the present application is illustrative and is merely a logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional modules in the various examples of the embodiments of the present application may be integrated into a single processor, or may exist physically separately, or two or more modules may be integrated into a single module. The integrated modules may be implemented in either hardware or software functional modules.

[0636] Figure 35 is a schematic diagram of the structure of a communication device provided in yet another embodiment of the present application. As shown in Figure 35, the device 3500 includes a processing circuit 3510 and a communication circuit 3520. The processing circuit 3510 and the communication circuit 3520 are coupled to each other.

[0637] It can be understood that the processing circuit 3510 can be one or more processors, or can be all or part of the circuits of the processing functions in one or more processors.

[0638] It is understandable that the communication circuit 3520 may be a transceiver or an input / output interface.

[0639] Optionally, the device 3500 may further include a memory 3530 for storing instructions executed by the processing circuit 3510 or storing input data required for the processing circuit 3510 to run instructions or storing data generated after the processing circuit 3510 runs instructions.

[0640] It is understandable that the memory 3530 may be located outside the processing circuit 3510 or inside the processing circuit 3510 .

[0641] As an example, the processing circuit 3510 is used to implement the functions of the above-mentioned processing module 3410, and the communication circuit 3520 is used to implement the functions of the above-mentioned communication module 3420.

[0642] As an example, the apparatus 3500 may be a communication device, or a chip used in a communication device.

[0643] When the device 3500 is a communication device, the communication circuit can be a transceiver; when the device 3500 is a chip, the communication circuit can be an input-output circuit, a bus, a pin or other type of communication interface, wherein the input circuit in the input-output circuit can be used for receiving and the output interface can be used for sending.

[0644] In some embodiments of the present application, a computer program product is also provided. When the computer program product is run on a processor, it can implement the encoding method implemented by the first communication device in the above method embodiment, or it can implement the decoding method implemented by the second communication device in the above method embodiment.

[0645] In some embodiments of the present application, a computer-readable storage medium is further provided, which contains computer instructions. When the computer instructions are executed on a processor, the encoding method implemented by the first communication device in the above method embodiment can be implemented, or the decoding method implemented by the second communication device in the above method embodiment can be implemented.

[0646] In some embodiments of the present application, a communication system is also provided, including the aforementioned first communication device and second communication device, the first communication device can implement the encoding method provided in the aforementioned embodiment, and the second communication device can implement the decoding method provided in the aforementioned embodiment; alternatively, the communication system can implement the encoding method implemented by the first communication device in the aforementioned method embodiment and the decoding method implemented by the second communication device.

[0647] It is understood that the processor in the embodiments of the present application can be the following devices or all or part of the circuits in the following devices used for processing functions: a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), field programmable gate arrays (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. The general-purpose processor can be a microprocessor or any conventional processor.

[0648] The method steps in the embodiments of the present application can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, and the software modules can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, register, hard disk, mobile hard disk, CD-ROM or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and can write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and the storage medium can be located in a chip, such as an application-specific integrated circuit (ASIC), or a chip system, such as a system on a chip (SOC). In addition, the chip or chip system can be located in a network device or a terminal device. Of course, the processor and the storage medium can also be present in a network device or a terminal device as discrete components.

[0649] In the above embodiments, all or part of the embodiments may be implemented using software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are performed in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device, or other programmable device. The computer program or instructions may be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions may be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; an optical medium, such as a digital video disk; or a semiconductor medium, such as a solid-state drive.

[0650] In the various embodiments of the present application, unless otherwise specified or there is a logical conflict, the terms and / or descriptions between different embodiments are consistent and can be referenced by each other. The technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationships.

[0651] It is understood that the various numbers used in the embodiments of this application are merely for ease of description and are not intended to limit the scope of the embodiments of this application. The order of the sequence numbers of the above-mentioned processes does not necessarily imply a specific order of execution; the order of execution of the processes should be determined by their functions and inherent logic.

Claims

1. A coding method, characterized in that: include: Acquire a first bit sequence, where the first bit sequence includes a plurality of bits; processing the plurality of bits to obtain a first to-be-encoded input having a first pattern, the first to-be-encoded input comprising a plurality of coding units distributed in one or more dimensions, each of the plurality of coding units comprising one or more bits of the plurality of bits, the first pattern being used to indicate a distribution of the plurality of coding units in the one or more dimensions; One or more coding units in the first input to be encoded are encoded to obtain a second bit sequence.

2. The method according to claim 1, wherein The processing of the plurality of bits to obtain a first input to be encoded having a first pattern includes: Arranging the plurality of bits according to an arrangement rule to obtain the plurality of coding units; The plurality of encoding units are processed to obtain the first input to be encoded having the first pattern.

3. The method according to claim 1 or 2, wherein: Each coding unit is a one-dimensional vector or a two-dimensional matrix, and the multiple coding units include at least one one-dimensional vector and / or at least one two-dimensional matrix.

4. The method according to claim 2, wherein The arrangement rule is used to indicate: the dimension of each coding unit, the number of bits included in each coding unit in each dimension, and the arrangement of one or more bits included in each coding unit.

5. The method according to any one of claims 1 to 4, characterized in that The method further comprises: Send or receive first information, where the first information is used to indicate one or more of the following: the dimension of each coding unit, the number of bits included in each coding unit in each dimension, or the arrangement of one or more bits included in each coding unit.

6. The method according to any one of claims 1 to 5, characterized in that Different coding units among the plurality of coding units include the same number of bits.

7. The method according to any one of claims 1 to 5, characterized in that At least two coding units among the plurality of coding units include different numbers of bits.

8. The method according to any one of claims 1 to 7, characterized in that The step of encoding one or more coding units in the first input to be encoded to obtain a second bit sequence includes: Component encoding is performed on one or more coding units in the first input to be encoded to obtain the second bit sequence.

9. The method according to claim 8, wherein The first pattern is used to indicate distribution of the plurality of coding units in a plurality of dimensions, and the component encoding of the one or more coding units in the first to-be-encoded input includes: Obtaining multiple groups of input bits from the one or more coding units in the first to-be-encoded input according to one or more coding directions, the one or more coding directions comprising one or more of the following directions: a horizontal direction within a two-dimensional plane defined by any two of the multiple dimensions, a vertical direction within a two-dimensional plane defined by any two of the multiple dimensions, or a diagonal direction within a two-dimensional plane defined by any two of the multiple dimensions; Each group of input bits in the plurality of groups of input bits is encoded.

10. The method according to claim 9, wherein Among the multiple groups of input bits, the encoding types used to encode different groups of input bits corresponding to the same encoding direction are the same.

11. The method according to claim 9, wherein Among the multiple groups of input bits, different coding types are used to encode at least two groups of input bits corresponding to the same coding direction.

12. The method according to claim 9 or 10, wherein: The encoding types used to encode the multiple groups of input bits are the same.

13. The method according to any one of claims 9 to 11, characterized in that Different coding types are used to encode at least two groups of input bits among the multiple groups of input bits.

14. The method according to any one of claims 9 to 13, characterized in that The method further comprises: Send or receive second information, where the second information is used to indicate one or more of the following: the one or more encoding directions, the encoding order, the encoding type used to encode each group of input bits, or the encoding rate of each group of input bits, and the encoding order is used to indicate the order in which each group of input bits is input into the encoder.

15. The method according to any one of claims 9 to 14, characterized in that The first pattern is further used to indicate a coding position, the coding unit located at the coding position in the first input to be encoded is the coding unit to be encoded, and the multiple groups of input bits are determined from the coding units to be encoded in the first input to be encoded.

16. The method according to any one of claims 1 to 15, characterized in that The first pattern is used to indicate the distribution of the multiple coding units in the one or more dimensions, including: the first pattern is used to indicate the number of the multiple coding units distributed in each dimension of the one or more dimensions.

17. The method according to claim 16, wherein The first pattern is used to indicate the distribution of the multiple coding units in the one or more dimensions, and further includes: the first pattern is used to indicate a blank position in the first pattern.

18. The method according to any one of claims 1 to 17, characterized in that The plurality of encoding units include a first encoding unit and at least one copy of the first encoding unit, and the first encoding unit and the at least one copy are located at different positions in the first input to be encoded.

19. The method according to any one of claims 1 to 18, characterized in that The method further comprises: Arranging the plurality of bits to obtain a second input to be encoded having a second pattern, the second input to be encoded comprising a plurality of coding units distributed in one or more dimensions, each of the plurality of coding units comprising one or more bits of the plurality of bits, the second pattern being used to indicate a distribution of the plurality of coding units in the one or more dimensions; encoding one or more coding units in the second to-be-encoded input to obtain a third bit sequence; A fourth bit sequence is obtained based on the second bit sequence and the third bit sequence.

20. The method according to any one of claims 1 to 19, characterized in that The method further comprises: Third information is sent or received, where the third information is used to indicate a pattern used, and the pattern includes the first pattern.

21. A decoding method, characterized in that: include: Acquire a second bit sequence, where the second bit sequence includes a plurality of bits; processing the plurality of bits to obtain a first input to be decoded having a third pattern, wherein the first input to be decoded includes a plurality of decoding units distributed in one or more dimensions, each of the plurality of decoding units including one or more bits of the plurality of bits, and the third pattern is used to indicate a distribution of the plurality of decoding units in the one or more dimensions; Decode one or more decoding units in the first input to be decoded to obtain a fifth bit sequence.

22. The method according to claim 21, wherein The processing of the plurality of bits to obtain a first input to be decoded having a third pattern includes: Arranging the plurality of bits according to an arrangement rule to obtain the plurality of decoding units; The plurality of decoding units are processed to obtain the first input to be decoded having the third pattern.

23. The method according to claim 21 or 22, wherein: Each decoding unit is a one-dimensional vector or a two-dimensional matrix, and the multiple decoding units include at least one one-dimensional vector and / or at least one two-dimensional matrix.

24. The method of claim 22, wherein: The arrangement rule is used to indicate: the dimension of each decoding unit, the number of bits included in each decoding unit in each dimension, and the arrangement method of one or more bits included in each decoding unit.

25. The method according to any one of claims 21 to 24, characterized in that The method further comprises: Receive or send first information, where the first information is used to indicate one or more of the following: a dimension of each decoding unit, a number of bits included in each decoding unit in each dimension, or an arrangement of one or more bits included in each decoding unit.

26. The method according to any one of claims 21 to 25, characterized in that Different decoding units in the plurality of decoding units include the same number of bits.

27. The method according to any one of claims 21 to 25, characterized in that At least two decoding units among the plurality of decoding units include different numbers of bits.

28. The method according to any one of claims 21 to 27, characterized in that The step of decoding one or more decoding units of the first input to be decoded to obtain a fifth bit sequence includes: Component decoding is performed on one or more decoding units in the first to-be-decoded input to obtain the fifth bit sequence.

29. The method of claim 28, wherein The performing component decoding on one or more decoding units in the first to-be-decoded input to obtain the fifth bit sequence includes: performing component decoding on one or more decoding units in the first to-be-decoded input to obtain a first decoding output having a first pattern, wherein the first decoding output includes a plurality of units distributed in the one or more dimensions, and the first pattern is used to indicate a distribution of the plurality of units in the one or more dimensions; The fifth bit sequence is obtained from the first decoding output according to the first pattern.

30. The method of claim 29, wherein The plurality of units include a first unit and at least one copy of the first unit, and the first unit and the at least one copy are located at different positions in the first decoded output.

31. The method according to any one of claims 28 to 30, wherein The third pattern indicates distribution of the plurality of decoding units in a plurality of dimensions, and the component decoding of the one or more decoding units in the first input to be decoded includes: obtaining, by the one or more decoding units in the first input to be decoded, a plurality of groups of input bits according to one or more decoding directions, the one or more decoding directions comprising one or more of the following directions: a horizontal direction within a two-dimensional plane defined by any two of the multiple dimensions, a vertical direction within a two-dimensional plane defined by any two of the multiple dimensions, or a diagonal direction within a two-dimensional plane defined by any two of the multiple dimensions; Each group of input bits in the plurality of groups of input bits is decoded.

32. The method of claim 31, wherein Among the multiple groups of input bits, different groups of input bits corresponding to the same decoding direction are decoded using the same decoding type.

33. The method of claim 31, wherein Among the multiple groups of input bits, different decoding types are used to decode at least two groups of input bits corresponding to the same decoding direction.

34. The method according to claim 31 or 32, wherein: The decoding types used to decode the multiple groups of input bits are the same.

35. The method according to claim 31 or 33, wherein Different decoding types are used to decode at least two groups of input bits among the multiple groups of input bits.

36. The method according to any one of claims 31 to 35, wherein The method further comprises: Receive or send second information, where the second information is used to indicate one or more of the following: the one or more encoding directions, the encoding order, the encoding type used to encode each group of input bits, or the encoding code rate of each group of input bits; the one or more encoding directions are used to determine the one or more decoding directions; the encoding order is used to indicate the order in which each group of input bits enters the encoder, the encoding order is used to determine the decoding order, and the decoding order is used to indicate the order in which each group of input bits enters the decoder; the encoding type used to encode each group of input bits is used to determine the decoding type used to decode each group of input bits.

37. The method according to any one of claims 31 to 36, wherein The third pattern is further used to indicate a decoding position, the decoding unit located at the decoding position is a decoding unit to be decoded, and the multiple groups of input bits are determined from the decoding units to be decoded in the first input to be decoded.

38. The method according to any one of claims 21 to 37, wherein The third pattern is used to indicate the distribution of the multiple decoding units in the one or more dimensions, including: the third pattern is used to indicate the number of the multiple decoding units distributed in each dimension of the one or more dimensions.

39. The method of claim 38, wherein The third pattern is used to indicate the distribution of the multiple decoding units in the one or more dimensions, and further includes: the third pattern is used to indicate blank positions in the third pattern.

40. The method according to any one of claims 21 to 39, wherein The second bit sequence is included in a fourth bit sequence, the fourth bit sequence includes the second bit sequence and a third bit sequence, and the second bit sequence is obtained from the fourth bit sequence; The method further includes: acquiring the fourth bit sequence.

41. The method of claim 40, wherein: The method further comprises: Obtain the third bit sequence, where the third bit sequence includes a plurality of bits; arrange the plurality of bits in the third bit sequence to obtain a second input to be decoded having a fourth pattern, where the second input to be decoded includes a plurality of decoding units distributed in one or more dimensions, each of the plurality of decoding units including one or more bits of the plurality of bits; decode the one or more decoding units in the second input to be decoded to obtain a sixth bit sequence; and obtain a seventh bit sequence based on the fifth bit sequence and the sixth bit sequence.

42. The method according to any one of claims 21 to 41, wherein The method further comprises: Third information is received or sent, where the third information is used to indicate the adopted pattern, and the pattern includes the third pattern.

43. A communication device, characterized in that The method comprises a functional module for implementing the method according to any one of claims 1 to 20, or comprises a functional module for implementing the method according to any one of claims 21 to 42.

44. A communication device, characterized in that include: One or more processors and communication circuits, wherein the communication circuit is used for the communication device to perform at least one of inputting or outputting signals; the one or more processors are used to implement the method according to any one of claims 1 to 42.

45. A communication system, characterized in that include: A communication device for executing the method according to any one of claims 1 to 20, and a communication device for executing the method according to any one of claims 21 to 42.

46. A computer-readable storage medium, characterized in that Used to store computer program instructions, the computer program causing a computer to execute the method according to any one of claims 1 to 42.

47. A computer program product, characterized in that The method comprises computer program instructions which cause a computer to execute the method according to any one of claims 1 to 42.

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