Integrated cartridge

Abstract

The present disclosure discloses development of microdevices with an optical structure on a substrate with color conversion layers or a lens structure. In particular, it discloses aspects of microdevices having sidewalls, top and bottom sides, and methods to create a housing or cavity using different processes. The processes use protection layers, patterning, and passivation as well as alignment techniques.

Description

Integrated CartridgeCLAIM OF PRIORITY

[0001] The application claims priority United States Provisional Application No. 63 / 550,412 filed February 06, 2024, titled “INTEGRATED CARTRIDGE,” which is incorporated by reference in its entirety.FIELD OF THE INVENTION

[0002] The present disclosure relates to developing microdevices with an optical structure on a donor substrate.SUMMARY

[0003] The present disclosure relates to a method to develop a microdevice with an optical structure on a donor substrate, the method comprising, holding microdevices on a substrate with a layer, having a protection layer partly covering the microdevices, having stacks of reflective layers, dielectric layers, and stop layers, transferring microdevices another substrate to the donor substrate; and forming a passivation layer or an optical layer on at least part of the microdevices, wherein the passivation layer also includes an anchor layer, and the optical layer is formed by patterning on a top of the microdevice and then a next optical layer is formed and patterned.BRIEF DESCRIPTION OF THE DRAWINGS

[0004] The foregoing and other advantages of the disclosure will become apparent upon reading the following detailed description and upon reference to the drawings.

[0005] Figure 1A illustrates a structure of developing microdevice with an optical structure on a donor substrate, in at least one example.

[0006] Figure IB shows the devices etched back to create a housing structure for at least part of the optical layer, in at least one example.

[0007] Figure 1C shows the release layer can be patterned as demonstrated, in at least one example.

[0008] Figure ID shows as the layers are formed on top of the optical structure, a substrate is bonded to the top surface using a bonding layer, in at least one example.

[0009] Figure IE shows that the substrate is a temporary substrate that can be removed, in at least one example.

[0010] Figures 2A illustrates a cross-section of structure that includes many features of structure in Figure IB.

[0011] Figure 2B illustrates a cross-section of structure in Figure 2A following formation of passivation layer.

[0012] Figure 2C illustrates a pattern of internal details of Figure IB, in at least one example.

[0013] Figure 2D illustrates a cross-section of a release layer formed under microdevices, in at least one example.

[0014] Figure 2E illustrates a cross-section of structure that includes an anchor layer between microdevices and a release layer, in at least one example.

[0015] Figure 3A illustrates a cross-section of structure that includes microdevice integrated with an optical structure.

[0016] Figure 3B illustrates a cross-section of structure in Figure 3A following a process to integrate with a receiver backplane, in at least one example.

[0017] Figure 3C illustrates a cross-section of structure in Figure 3A following a process to integrate with a receiver backplane, in at least one example.

[0018] While the present disclosure is susceptible to various modifications and alternative forms, specific embodiments or implementations have been shown by way of example in the drawings and will be described in detail herein. It should be understood, however, that the disclosure is not intended to be limited to the particular forms disclosed. Rather, the disclosure is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of a disclosure as defined by the appended claims.DETAILED DESCRIPTION

[0019] A microdevice on a donor substrate has a top face away from the substrate and down bottom facing the substrate. At least part of the top or bottom face of the microdevice is covered by an optical layer (e.g. color conversion material, or lens, etc.). A layer holding the bottom side of the microdevice to the donor substrate. The layer can be adhesive or anchors. There can be arelease layer between the holding layer and the substrate. There can be a light coupling or encapsulation layer between the device and the optical layer. There can be a protection layer covering at least one other side of the devices that is not covered by the color conversion layer. The protection layer can be extended on the edge of the surface covered by the optical layer to house at least part of the optical layer. The protection layer can be reflective to direct the light toward the optical layer. In one related case, the devices in the donor substrate can have more than one type of optical layer. In another related case, the different devices can have different optical layers. For example, one device can have green color conversion and the other one red color conversion layer. The devices are transferred into a receiver substrate to form an array of microdevices. The optical layer can create different functionality in the devices such as color or directing the input or output light to a specific direction or modifying the light profiles. The microdevices can have pads on either top or bottom side or other sides that are not top or bottom sides. The pads provide electrical connections to the device. And the substrate is coupled to the devices through the pads. The microdevices may have several layers such as p-layer, n-layer, blocking layers, buffer layers, ohmic layers, and active layers. The active layers can be multi quantum well (MQW). Here, all figure descriptions detail method aspects to fabricate optical device and also device structure, in accordance with some examples.

[0020] In some instances, well-known methods and devices are shown in block diagram form, rather than in detail, to avoid obscuring at least one example. Reference throughout this specification to “an example,” “one example,” “in at least one example,” or “some examples” means that a particular feature, structure, function, or characteristic described in connection with example is included in at least one example. Thus, appearances of phrase “in an example,” “in at least one example,” or “in one example,” or “some examples” in various places throughout this specification are not necessarily referring to same example of disclosure. Furthermore, particular features, structures, functions, or characteristics may be combined in any suitable manner in one or more examples. For example, a first example may be combined with a second example anywhere particular features, structures, functions, or characteristics associated with two examples are not mutually exclusive.

[0021] As used in herein, singular forms “a,” “an,” and “the” are intended to include plural forms as well, unless context clearly indicates otherwise. It will also be understood that term “and / or” asused herein refers to and encompasses all possible combinations of one or more of associated listed items.

[0022] Here, “coupled” and “connected,” along with their derivatives, may be used herein to describe functional or structural relationships between components. These terms are not intended as synonyms for each other. Rather, in particular examples, “connected” may be used to indicate that two or more elements are in direct physical, optical, or electrical contact with each other. “Coupled” may be used to indicated that two or more elements are in either direct or indirect (with other intervening elements between them) physical, electrical, or in magnetic contact with each other, and / or that two or more elements co-operate or interact with each other (e.g., as in a cause an effect relationship).

[0023] Here, “over,” “under,” “between,” and “on” as used herein refer to a relative position of one component or material with respect to other components or materials where such physical relationships are noteworthy. For example, in context of materials, one material or material disposed over or under another may be directly in contact or may have one or more intervening materials. Moreover, one material disposed between two materials may be directly in contact with two layers or may have one or more intervening layers. In contrast, a first material “on” a second material is in direct contact with that second material / material. Similar distinctions are to be made in context of component assemblies. As used throughout this description, and in claims, a list of items joined by term “at least one of’ or “one or more of’ can mean any combination of listed terms.

[0024] Here, “adjacent” generally refers to a position of a thing being next to (e.g., immediately next to or close to with one or more things between them) or adjoining another thing (e.g., abutting it).

[0025] Here, “signal” may refer to current signal, voltage signal, magnetic signal, or data / clock signal.

[0026] Here, “device” may generally refer to an apparatus according to context of usage of that term. For example, a device may refer to a stack of layers or structures, a single structure or layer, a connection of various structures having active and / or passive elements, etc. Generally, a device is a three-dimensional structure with a plane along x-y direction and a height along z direction of an x-y-z Cartesian coordinate system. In at least one example, plane of device may also be plane of an apparatus which comprises device.

[0027] Unless otherwise specified in explicit context of their use, terms “substantially equal,” “about equal,” and “approximately equal” mean that there is no more than incidental variation between two things so described. Such variation is typically no more than + / -10% of a predetermined target value.

[0028] Here, “left,” “right,” “front,” “back,” “top,” “bottom,” “over,” “under,” and similar terms are used for descriptive purposes and not necessarily for describing permanent relative positions. For example, terms “over,” “under,” “front side,” “back side,” “top,” “bottom,” “over,” “under,” and “on” as used herein refer to a relative position of one component, structure, or material with respect to other referenced components, structures, or materials within a device, where such physical relationships are noteworthy. These terms are employed herein for descriptive purposes only and predominantly within the context of a device z-axis and therefore may be relative to an orientation of a device. Hence, a first material “over” a second material in context of a figure provided herein may also be “under” second material if the device is oriented upside-down relative to context of figure provided. Similar distinctions are to be made in the context of component assemblies.

[0029] Here, “between” may be employed in context of z-axis, x-axis, or y-axis of a device. A material that is between two other materials may be in contact with one or both of those materials. In another example, a material that is between two or other materials may be separated from both of other two materials by one or more intervening materials. A material “between” two other materials may therefore be in contact with either of other two materials. In another example, a material “between” two other materials may be coupled to other two materials through an intervening material. A device that is between two other devices may be directly connected to one or both of those devices. In another example, a device that is between two other devices may be separated from both of the other two devices by one or more intervening devices.

[0030] Figure 1A illustrates a cross-section of structure 100A. In at least one example, structure 100 A includes a substrate 101 and microdevice 102A, microdevice 102B, and microdevice 102C above substrate 101. In at least one example, structure 100A also includes a layer 104 between microdevices 102A, 102B, and 102C and substrate 101. In at least one example, structure further includes a layer 106 between microdevices 102A, 102B, and 102C and layer 104. In at least one example, layer 104 can include polymers such as benzocyclobutane (BCB), polyamide, epoxybased negative photoresist (SU-8). In at least one example, layer 106 can include a passivation ora protection material. In at least one example, layer 106 is adjacent to at least three sides of microdevices 102A, 102B, and 102C (in the cross-sectional illustration). In at least one example, layer 106 is adjacent to at least five sides of microdevices 102A, 102B, and 102C (in 3-dimensional configuration where microdevices 102A, 102B, and 102C may be rectangular solids). In at least one example, layer 106 extends on portions of layer 104 between neighboring microdevices 102A, 102B, and 102C. For example, portion 106A extends between microdevice 102A and microdevice 102B, a portion 106B extends between microdevice 102B and microdevice 102C. In at least one example, layer 106 includes portions 106C and 106D that extend away from microdevice 102A and microdevice 102C, respectively. In at least one example, layer 106 can comprise a plurality of stacked layers that include different types of insulator materials, such as a dielectric layer. In at least one example, some of the dielectric layers can have etch stop or reflective properties. In at least one example, structure 100A further includes a passivation layer 110 on microdevices 102 A, 102B and 102C and above layer 104. In at least one example, passivation layer 110 extends on a portion of layer 106 outside a periphery of microdevices 102A, 102B, and 102C. In at least one example, passivation layer 110 extends on portions 106A, 106B, 106C, and 106D of layer 106. In at least one example, passivation layer 110 can be an optical layer.

[0031] In at least one example, structure 100A further includes an optical structure above each microdevice. In at least one example, structure 100A includes an optical structure 108A above microdevice 102A, an optical structure 108B above microdevice 102B, and an optical structure 108C above microdevice 102C. In at least one example, optical structure 108A, optical structure 108B and optical structure 108C may include the same material or different materials for flexibility. In at least one example, optical structure 108A, optical structure 108B and optical structure 108C have a cross-sectional surface area (along the X-Y plane) that is the same or greater than a cross-sectional top surfaces of microdevices 102A, 102B, and 102C (along the X-Y plane). In at least one example, optical structure 108A, optical structure 108B and optical structure 108C are aligned with respective microdevices 102A, 102B, and 102C. In the illustrative example optical structure 108A, optical structure 108B and optical structure 108C extend beyond a perimeter of microdevices 102A, 102B, and 102C. In at least one example, optical structures 108A, 108B, and 108C have a block geometry and are laterally spaced apart along the x-axis direction. In at least one example, optical structures 108A, 108B, and 108C are spaced apart to provide for one or moreprotection layers above microdevices 102A, 102B, and 102C. In at least one example, such protection layers can provide for hermetic protection.

[0032] In at least one example, structure 100 A further includes a passivation layer 112 above optical structures 108A, 108B, and 108C. In at least one such example, passivation layer 112 covers a top surface and sidewalls of respective optical structures 108A, 108B, and 108C. In at least one example, passivation layer 112 is contiguous and extends on portions of passivation layer 110, as shown. In at least one example, passivation layer 112 can also include an anchor layer. In at least one such example, the anchor layer may be away from a perimeter of microdevices 102A, 102B, and 102C. In at least one example, structure 100A further includes a release layer 114 adjacent to passivation layer 112. In at least one example, release layer 114 may be conformal with passivation layer 112.

[0033] In at least one example, substrate 101 can include silicon or an alternative semiconductor material. In at least one example, substrate 101 may be a donor substrate. In at least one example, microdevices 102A, 102B, and 102C can be formed on a secondary substrate and transferred from the secondary substrate to substrate 101. In at least one example, microdevices 102A, 102B, and 102C can be formed on substrate 101. In at least one such example, layer 104 may be formed on substrate 101, and patterned to form openings with sidewalls 104A and bottom surfaces 104B. In at least one example, layer 106 may be formed within openings formed in layer 104. In at least one example, layer 106 may be formed or deposited by a conformal deposition process. In at least one such example, layer 106 may have a uniform thickness adjacent to microdevices 102A, 102B, and 102C as well as away from microdevices 102A, 102B, and 102C, such as on surface of layer 104. In at least one example, microdevices 102A, 102B, and 102C may be formed within such openings on layer 106. In at least one example, microdevices 102A, 102B, and 102C maybe placed on layer 106 within openings formed in layer 104 from a donor substrate. In at least one example, microdevices 102A, 102B, and 102C may be held on layer 106 by adhesion between microdevices 102 A, 102B, and 102C and layer 106.

[0034] In at least one example, after formation of microdevices 102A, 102B, and 102C, passivation layer 110 can be formed on at least part of microdevices 102A, 102B, and 102C. In at least one example, passivation layer 110 can be formed selectively on microdevices 102 A, 102B, and 102C. In other examples, passivation layer 110 can be formed by blanket deposition on microdevices 102A, 102B, and 102C and on exposed surfaces of layer 104. In at least one example,passivation layer 110 can also be extended and patterned in areas away from microdevices 102A, 102B, and 102C. In at least one example, surface 102D is a top surface of respective microdevices 102 A, 102B, and 102C. In at least one example, surface 102D of respective microdevices 102 A, 102B, and 102C are substantially planar or co-planar with surface 104C of layer 104. In at least one such example, passivation layer 110 may be formed substantially planar.

[0035] In at least one example, optical structures 108A, 108B, and 108C can be formed on passivation layer 110. In at least one example, optical structures 108A, 108B, and 108C can be formed aligned with microdevices 102A, 102B, and 102C. In at least one example, there can be more than one type of optical structure compatible with microdevices 102 A, 102B, or 102C. In at least one example, different types of optical structures may be tailored to be compatible with different microdevices 102A, 102B, or 102C. In at least one example, different optical structures can be formed by deposition and patterning different materials. In at least one example, the deposition and pattering process may be sequentially performed. In at least one example, optical structure 108A may be formed by depositing a first optical material, followed by a process to mask, etch and form optical structure 108A above microdevice 102A. In at least one such example, a second optical material may be blanket deposited, masked and etched to form optical structure 108B above microdevice 102B. In at least one such example, a third optical material may be blanket deposited, masked and etched to form optical structure 108C above microdevice 102C. In at least one example, where optical structures 108A, 108B, and 108C include the same material, optical structures 108A, 108B, and 108C may be formed simultaneously by processes of blanket deposition, masking and etching. In at least one example, different optical structures can be printed or stamped on passivation layer 110.

[0036] After formation of optical structures 108A, 108B, and 108C, passivation layer 112 can be blanket deposited by a deposition process, in at least one example. In at least one example, the blanket deposition process can include a low temperature deposition process that can form passivation layer 112 having a conformal thickness on sidewalls and on top surfaces of optical structures 108A, 108B, and 108C. In at least one example, where passivation layer 112 includes an anchor layer, such an anchor layer can be patterned outside a vicinity of microdevices 102 A, 102B, and 102C.

[0037] In at least one example, optical structures 108A, 108B, and 108C include one or more materials that can be color conversion layers. In at least one such example, color conversion layerscan be quantum dots or phosphor, or other types of materials where high energy photons can be converted to different light sources. In at least one example, optical structures 108A, 108B, and 108C can be example of a lens structure. In at least one example, lens structure can be developed on another medium and integrated onto microdevices 102A, 102B, and 102C.

[0038] In at least one example, microdevices 102A, 102B, and 102C can be formed by polymer and reflow process, by etching, or deposition. In at least one example, microdevices 102A, 102B, and 102C can be a combination of lens and color conversion, or one or more color filter layers.

[0039] In at least one example, release layer 114 can be blanket deposited on passivation layer 112. In at least one such example, release layer 114 is formed self-aligned with optical structures 108A, 108B, and 108C (as with microdevices 102A, 102B, and 102C). In at least one example, passivation layer 112 can be organic, inorganic or combination of these materials.

[0040] In at least one example, microdevices 102A, 102B, and 102C include upper portions that can be recessed. Figure IB illustrates a cross-section of structure 100B. In at least one example, structure 100B includes many features of structure 100A in Figure 1A. In at least one example, upper portions of microdevices 102A, 102B, and 102C can be recessed by an etch process. In at least one example, etch process can be dry etch or wet etch. In at least one example, upper portions of microdevices 102 A, 102B, and 102C can be recessed to form housing (indicated by dashed lines 120) for an optical structure. In at least one example, by recessing upper portions of microdevices 102 A, 102B, and 102C, surface 102D of respective microdevices 102 A, 102B, and 102C are recessed below surface 104C of layer 104.

[0041] In at least one example, by the process of recessing may be performed selective to layer 106. In at least one example, a selective etch process exposes portions of layer 106 formed on sidewalls 104A of layer 104. In at least one such example, passivation layer 110 can be conformally deposited on microdevices 102A, 102B, and 102C. In at least one example, in contrast to passivation layer 110 illustrated in Figure 1A, passivation layer 110 illustrated in Figure IB is not planar across a surface of layer 104, but follows contours of surfaces of microdevices 102A, 102B, and 102C. In at least one example, when recess of surface 102D of respective microdevices 102 A, 102B, and 102C are not planar but curved, passivation layer 110 formed may have a curved portion below surface 104C.

[0042] Referring again to Figure IB, optical structures 108 A, 108B and 108C can be formed by methods described above. In at least one example, surfaces 102D may be upper surfaces. In at leastone such example, surfaces 102D of microdevices 102A, 102B and 102C are sufficiently recessed. In at least one example, surface 108D may be a lower surface. In at least one example, surface 108D of respective optical structures 108 A, 108B, and 108C can extend below surface 104C. In at least one such example, when surfaces 102D of microdevices 102A, 102B, and 102C are sufficiently recessed, portions of optical structures 108A, 108B, and 108C extend below portions 106A, 106B, 106C, and 106D of layer 106. In at least one such example, portions of optical structures 108A, 108B, and 108C extend within housing defined by dashed lines 120. In at least one example, recess in upper portions of microdevices 102A, 102B, and 102C can be adjusted, such that respective surface 108D of optical structures 108 A, 108B, and 108C can be at a level of surface 104C or below surface 104C. In at least one such example, thickness of passivation layer 110 deposit can be adjusted so that surface 108D can be at or below surface 104C.

[0043] In at least one example, microdevices 102A, 102B, and 102C can be transferred to substrate 101 from a secondary substrate after formation. In at least one such example, prior to placement inside openings in layer 104, sidewalls of microdevices 102A, 102B, and 102C can be covered by one or more layers that can include dielectrics and / or reflective layers. In at least one such example, one or more housing layers on sidewalls of microdevices 102A, 102B, and 102C may also be recessed during a subsequent recessing process. In at least one example, when microdevices 102A, 102B, and 102C are formed on a secondary substrate, one or more housing layers that are formed on sidewalls of microdevices 102 A, 102B, and 102C may be formed on surface 102E of respective microdevices 102A, 102B, and 102C. In at least one example, the one or more housing layers can be formed by different deposition processes such as plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), spin coating, printing, or other related methods. In at least one such example, portions of one or more housing layers formed on surface 102E may be etched prior to placement in opening within layer 104. In at least one such example, surface 102E of microdevices 102 A, 102B, and 102C may be in contact with layer 106. In at least one example, after placement of microdevices 102A, 102B, and 102C on layer 106 within openings in layer 104, surface 102D of microdevices 102A, 102B, and 102C may be recessed. In at least one example, one or more housing layers formed on sidewalls of microdevices 102A, 102B and 102C, may also be recessed to varying levels. In at least one example, the recess or etch back process can include patterning and leaving some of the device materials and materials formed on the sidewalls of microdevices 102 A, 102B, and 102C adjacent to vertical portions oflayer 106. The etch back process can be done by wet etching or dry etching process. In at least one example, while recessing portions of the device material can remain adjacent to vertical portions of vertical portions of layer 106. Such portions of the device material can be between passivation layer 110 and layer 106.

[0044] In at least one example, microdevices 102A, 102B, and 102C can be transferred to substrate 101 from a secondary substrate after formation. The surface 102D of microdevices 102 A, 102B, and 102C can be covered with different housing layers. The housing layers can include dielectrics and or reflective layers. In at least one example, top or bottom surfaces of microdevices 102A, 102B, and 102C can be etched back to expose sidewalls forming a housing cavity on top or bottom surface. In at least one example, passivation layer 110 can be formed on the top or bottom surface of microdevices 102A, 102B, and 102C and at a least part of optical structures 108A, 108B, and 108C are inside a housing cavity formed by the housing layers. There can be other layers before or after the optical structures 108A, 108B, and 108C. In at least one example, the etch back process can include patterning and leaving some of the device materials on the sidewalls and only etching back the inner part of top or bottom surfaces. In at least one example, the remaining layers can form the housing layers or be part of the housing layers. The etch back process can be done by wet etching or dry etching process. The housing layers can be formed by different deposition processes such as PECVD, ALD, spin coating, printing, or other related methods. The process described in association with Figure IB can be used to form and fabricate other related devices and methods described herein.

[0045] Figure 1C illustrates a cross-section of structure 100C. In at least one example, structure 100C is a cross-section of structure 100B in Figure IB following a process to pattern release layer 114. In at least one example, a process of masking and etching can be performed to etch portions of release layer 114 selectively to passivation layer 112.

[0046] In at least one example, portions of structure 100C including microdevices 102A, 102B and 102C can be transferred from substrate 101 to an external substrate (not shown). In at least one example, the external substrate can be a system or a receiver substrate. In at least one example, to remove microdevices 102A, 102B, and 102C selectively and with integrity from above layer 104, layer 106 can include a release layer that can be removed. In at least one such example, layer 106 can include multiple layers including protection layer and release layer, where the protection layer may be adjacent to microdevices 102A, 102B, and 102C and the release layer may beadjacent to layer 104. In at least one example, the release layer can be detached relative to protection layer and microdevices 102A, 102B, and 102C. In at least one example, transfer of microdevices 102A, 102B, and 102C can be performed by bringing substrate 101 in contact with a receiver substrate. In at least one example, top surfaces of release layer 114 are brought into contact with a material of the external substrate. In at least one example, release layer 114 and microdevices 102A, 102B, and 102C can be bonded to the receiver substrate. In at least one example, microdevices 102 A, 102B, and 102C can be subsequently removed by mechanical or laser release. In at least one example, microdevices 102A, 102B and 102C can be picked from substrate 101 and transferred to the receiver substrate.

[0047] Figure ID illustrates a cross-section of structure 100D. In at least one example, structure 100D is a cross-section of structure 100C in Figure 1C following a process of depositing one or more layers. In at least one example, a bonding layer 130 may be blanket deposited on structure 100C (Figure 1C). In at least one example, bonding layer 130 can be blanket deposited on release layer 114 and on exposed portions of passivation layer 112. In at least one example, bonding layer 130 can include polymer or other types of adhesive materials. In at least one example, substrate 140 can be bonded on bonding layer 130 such as a polymer or other types of suitable adhesive materials.

[0048] Figure IE illustrates a cross-section of structure 100E. In at least one example, structure 100E is a cross-section of structure 100D in Figure ID following a process of detaching substrate 101. In at least one example, a removal process can also remove layer 104. In at least one example, while removing layer 104, layer 106 can provide protection to microdevices 102A, 102B and 102C. In at least one example, when layer 106 includes more than one layer, protection layer 106E can remain adjacent to microdevices 102A, 102B, and 102C. In at least one example, protection layer 106E can be reflective. In at least one such example, release layers (not shown) adjacent to protection layer 106E may be removed. In at least one such example, surface 110A of passivation layer 110 can be exposed after removal of layer 104 and release layer adjacent to protection layer 106E.

[0049] In at least one example, layer 104 can be removed exposing surface 102D of microdevices 102A, 102B, and 102C. In at least one example, layer 106 can be removed or patterned. In at least one example, portions of layer 106 cover some surface of the device not covered by the optical structure. In at least one example, passivation layer 110 and passivation layer 112 can be patternedto form anchors. In at least one example, passivation layer 110, passivation layer 112 or bonding layer 130 can also include a temporary adhesive material that can aid in releasing microdevices 102A, 102B, and 102C under different conditions. In at least one example, a laser can be used to release passivation layer 112 and transfer microdevices 102A, 102B, and 102C to substrate 140.

[0050] Figures 2A illustrates a cross-section of structure 200A. In at least one example, structure 200 A includes many features of structure 100B in Figure IB. In at least one example, after formation of optical structures 108A, 108B and 108C, passivation layer 110 may be patterned and etched prior to deposition of passivation layer 112, as shown. In at least one example, after etching passivation layer 110, layer 106 is etched. In at least one example, after etching portions of layer 106 between adjacent optical structures 108A, 108B and 108C, portions of layer 104 are also etched to provide the structure illustrated in Figure 2A. In at least one example, after etching portions of layer 104, surface 104C of layer 104 is exposed. In at least one example, there may be other methods utilized to provide structure 200A other than described above. In at least one example, structure 200A includes layer 106 between microdevices 102 A, 102B and 102C and layer 104. In at least one example, layer 106 extends above surface 102D of microdevices 102A, 102B, and 102C. In at least one example, layer 106 extends on sidewall of portion of passivation layer 110.

[0051] Figure 2B illustrates a cross-section of structure 200B. In at least one example, structure 200B illustrates cross-section of structure 200A in Figure 2A following formation of passivation layer 112. In at least one example, passivation layer 112 may be conformally deposited by an ALD, a PECVD, or a physical vapor deposition (PVD) process. In at least one example, passivation layer 112 is also deposited on surface 104C. In at least one example, layer 106 or layer 104 can be a temporary adhesive that releases the device under some conditions (e.g. temperature, light, etc.). In at least one example, layer 106 can be a release layer. In at least one example, layer 106 can be patterned to enable passivation layer 112 to couple to the device surfaces.

[0052] Figure 2C illustrates a pattern 200C of an internal region of Figure IB. In at least one example, layer 106 is removed in pattern 202. In at least one example, after deposition, passivation layer 112 can be patterned to cover pattern 202 from a side wall. In at least one such example, passivation layer 112 covers a top surface and sidewalls of respective optical structures 108 A, 108B, and 108C. In at least one example, after a release layer is removed, microdevices 102A, 102B, and 102C (not shown) can be connected to layer 104 through passivation layer 112connected in pattern 202. In at least one example, layer 104 can be a temporary adhesive that releases the device under some conditions (e.g. temperature, light, etc.). In at least one example, after microdevices 102A, 102B, and 102C are bonded to a receiver substrate, passivation layer 112 can be removed and microdevices 102A, 102B, and 102C are left behind on a receiver substrate (not shown).

[0053] In at least one example, as shown in structure 200D of Figure 2D, a release layer 204 may be formed under microdevices 102A, 102B, and 102C. In at least one example, release layer 204 can be removed to prepare the microdevices 102A, 102B, and 102C for transfer from substrate 101.

[0054] Figure 2E illustrates a cross-section of structure 200E. In at least one example, structure 200E further includes an anchor layer 206 between microdevices 102A, 102B, and 102C and release layer 204. In at least one example, anchor layer 206 is formed above release layer 204. In at least one example, anchor layer 206 can be organic or inorganic. In at least one example, anchor layer 206 can be deposited by different processes such as evaporation, spin coating, printing, or other methods. In at least one example, release layer 204 can be removed before transferring microdevices 102A, 102B, and 102C onto a system substrate.

[0055] Figure 3A illustrates a cross-section of structure 300A. In at least one example, structure 300A includes microdevice integrated with an optical structure. In at least one example, microdevice 102A is covered by protection layer 302. In at least one example, protection layer 302 can include several sub layers such as a dielectric layer 302A (or high bandwidth material) adjacent to microdevice 102A. In at least one example, protection layer 302 further includes an optical layer 302B (that can be reflective) adjacent to dielectric layer 302A, and a passivation layer 302C adjacent to optical layer 302B.

[0056] In at least one example, protection layer 302 can extend above surface 102D of microdevice 102 A. In at least one example, vertical space between surface 102D and top portion of protection layer 302, provides a space for housing optical structure 108A. In at least one example, structure 300A further includes optical enhancement layer 304 between the optical structure 108A and microdevice 102A. In at least one example, optical enhancement layer 304 includes the same material as material of passivation layer 110 (Figure 1 A). In at least one example passivation layer 112 can cover or encapsulate portions of optical structure 108A and at least part of protection layer 302. In at least one example, passivation layer 112 can include several sub layers such as anchor,optical enhancement, and others. In at least one example, structure 300A can have pads on either the top surface or on a bottom surface. In at least one example, to form a pad at protection layer 302 (dielectric layer 302A, optical layer 302B and passivation layer 302C) dielectric layer 302A, optical layer 302B and passivation layer 302C are patterned or formed around the pad to provide access to the microdevice 102. In at least one example, to form a pad on a side of optical structure 108A, the passivation layer 112, optical structure 108A and the optical enhancement layer 304 are either patterned or formed around existing pads.

[0057] Figure 3B illustrates a cross-section of structure 300B. In at least one example, structure 300B is an illustration of structure 300A in Figure 3A following a process to integrate with a backplane 301. In at least one example, backplane 301 includes pixel circuits, metal traces, and other circuitry layers and can be a receiver backplane. In at least one example, a landing structure 306 is adjacent to backplane 301, where landing structure 306 includes pads. In at least one example, structure 300A is coupled with landing structure 306. In at least one example, a face of microdevice 102A which is covered by protection layer 302 is connected to the backplane 301. In at least one example, pads in landing structure 306 can be coupled with pads in structure 300A. In at least one example, landing structure 306 can also have adhesive layers to adhesively bond structure 300A. In at least one example, other structures such as metallization interconnects, and vias can be used to couple microdevice 102 A through protection layer 302 to backplane 301. In at least one example, backplane circuitry can be fabricated after microdevice 102A is integrated onto backplane 301. In at least one example, light input or output connections can pass through optical structure 108A. For example, when microLEDs are implemented in structure 300B, light generated by microdevice 102A can be transmitted via optical structure 108 A by using optical light input or output connections (not shown). In at least one example, optical structure 108A can use color conversion to convert light from microdevice 102 A to a different wavelength. In at least one example, a lens structure can be implemented to confine and transmit light. In at least one such example, optical layer 302B can reflect light through optical structure 108A. In at least one example, light can transmit through backplane 301 (bottom emission). In at least one such example, there is no in the protection layer 302 does not include a reflective layer, but passivation layer 112 includes a reflective layer.

[0058] Figure 3C illustrates a cross-section of structure 300C. In at least one example, structure 300C is an illustration of structure 300A in Figure 3A following a process to integrate with areceiver backplane 301. In at least one example, landing structure 306 is coupled with passivation layer 112. In at least one example, backplane 301can have pixel circuits, metal traces, and other circuitry layers. In at least one example, pads within landing structure 306 can be coupled to pads of microdevice 102. In at least one example, the face of microdevice 102A is covered by optical structure 108 A and passivation layer 112 is connected to backplane 301. In at least one example, pads above passivation layer 112 can be bonded directly to the pads in landing structure 306 of backplane 301. In at least one example, landing structure 306 can also have adhesive layers to adhesively bond to structure 300A. In at least one example, other structures such as metallization interconnects, and vias can be used to couple microdevice 102A through protection layer 302 to backplane 301. In at least one example, other structures such as metallization interconnects, and vias can be used to couple microdevice 102 A through protection layer 302 to backplane 301. In at least one example, backplane circuitry can be fabricated after microdevice 102A is integrated onto backplane 301. In at least one example, light input or output connections can pass through optical structure 108A and backplane 301 (bottom emission). For example, when microLEDs are implemented in structure 300B, light generated by microdevice 102A can be transmitted via optical structure 108A by using optical light input or output connections (not shown). In at least one example, optical structure 108A can use color conversion to convert light from microdevice 102 A to a different wavelength. In at least one example, a lens structure can be implemented to confine and transmit light. In at least one such example, optical layer 302B can reflect light through optical structure 108A. In at least one example, light can transmit through protection layer 302 (top emission). In at least one such example, protection layer 302 does not include a reflective layer, but passivation layer 112 includes a reflective layer.

[0059] While examples and applications of the present disclosure have been illustrated and described, it is to be understood that the disclosure is not limited to the precise construction and compositions disclosed herein and that various modifications, changes, and variations can be apparent from the foregoing descriptions without departing from the spirit and scope of the disclosure as defined in the appended claims.

[0060] Following examples are provided that illustrate at least one embodiment. Examples can be combined with other examples. As such, at least one embodiment can be combined with at least another embodiment without changing scope of at least one embodiment.

[0061] Example 1 is a method to develop microdevices with optical structures on a donor substrate the method comprising: holding the microdevices on a substrate with a layer, wherein the microdevices include a first microdevice and a second microdevice; having a protection layer partly covering the microdevices; having stacks of reflective layers, dielectric layers, and stop layers; transferring the microdevices from the substrate to the donor substrate; forming a passivation layer on at least part of the microdevices, wherein the passivation layer comprises an anchor layer; forming a first optical structure coupled with the first microdevice by patterning a first optical layer, wherein the first optical structure is formed by patterning an upper portion of the first microdevice; and forming a second optical structure coupled with the second microdevice by patterning a second optical layer, wherein the second optical structure is formed by patterning an upper portion of the second microdevice.

[0062] Example 2 is a method according to any method described herein, in particular example 1 , wherein the first optical layer and the second optical layer are a combination of color conversion layers, wherein the color conversion layers are quantum dots or phosphor, or a type where a high energy light is converted to a different light source.

Claims

AMENDED CLAIMS received by the International Bureau on 16 July 2025 (16.07.2025)1. A method to develop microdevices with optical structures on a donor substrate the method comprising: holding the microdevices on a substrate with a layer, wherein the microdevices include a first microdevice, a second microdevice and a third microdevice; having a protection layer partly covering the microdevices; having stacks of reflective layers, dielectric layers, and stop layers; transferring the microdevices from the substrate to the donor substrate; forming a passivation layer on at least part of the microdevices, wherein the passivation layer comprises an anchor layer, wherein the anchor layer is deposited by different processes such as evaporation, spin coating, or printing; forming a first optical structure coupled with the first microdevice by patterning a first optical layer, wherein the first optical structure is formed by patterning an upper portion of the first microdevice; forming a second optical structure coupled with the second microdevice by patterning a second optical layer, wherein the second optical structure is formed by patterning an upper portion of the second microdevice; and forming a third optical structure coupled with the second microdevice by patterning a third optical layer, wherein the third optical structure is formed by patterning an upper portion of the third microdevice.

2. The method of claim 1 , wherein the protection layer is deposited on sidewalls and on at least a part of a bottom side of the microdevices.

3. The method of claim 2, wherein a first layer covers an interface between the microdevices and the protection layer.

4. The method of claim 1 , wherein a second layer covers a part of an interface between the first optical layer and the first microdevice.

5. The method of claim 1, wherein the substrate is either a second donor substrate or a temporary substrate.

6. The method of claim 3, wherein the first layer is a polymer.

7. The method of claim 4, wherein the second layer is either a second passivation layer, a second anchor layer, a bridge layer, or a third optical layer.

8. The method of claim 1, wherein the first optical layer and the second optical layer include color conversion layers.

9. The method of claim 1, wherein the first optical layer and the second optical layer include color filter layers.

10. The method of claim 1, wherein the first optical layer and the second optical layer comprise a lens structure.

11. The method of claim 1, wherein the first optical layer and the second optical layer are a combination of color conversion layers, wherein the color conversion layers are quantum dots or phosphor, or a type where a high energy light is converted to a different light source.

12. The method of claim 1, wherein the first optical layer is different from the second optical layer.

13. The method of claim 1, wherein the anchor layer is patterned outside the microdevices.

14. The method of claim 6, wherein a release layer is formed and is patterned and aligned with the first optical layer and the first microdevice.

15. The method of claim 14, wherein the release layer is further patterned to fit the first optical layer.

16. The method of claim 1, wherein the microdevices are etched back to create a housing structure for at least a part of the first optical layer, and wherein the part of the first optical layer is formed inside the housing structure.

17. The method of claim 15, wherein additional layers are formed on top of the first optical layer, and a third substrate is bonded to a top surface using a bonding layer.

18. The method of claim 17, wherein the bonding layer is either an adhesive or a polymer.

19. The method of claim 17, wherein the third substrate is a temporary substrate that is removed along with the first layer exposing an original bottom surface of the microdevices.

20. The method of claim 19, wherein the protection layer is removed or patterned.

21. The method of claim 14, wherein anchor layer is formed above release layer.

22. The method of claim 21, wherein the anchor layer is organic or inorganic.

23. The method of claim 21, wherein the release layer is removed before transferring microdevices onto a system substrate.

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