Linear regulator circuit, memory circuit, and microprocessor chip

Abstract

The present application provides a linear regulator circuit, a memory circuit, and a microprocessor chip. By means of the design of the regulator circuit, a load current change rate of a circuit output end can be collected, and a second control signal is generated on the basis of the load current change rate, so that an output transistor can output a stable voltage under the control of a first control signal from an error amplifier and the second control signal, reducing the impact of load change on the output voltage. Thus, the problems caused by load current jumps and temperature change are solved, and the stability and effectiveness of an output voltage are improved.

Description

Linear regulator circuit, storage circuit and microprocessor chip

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on February 27, 2024, with application number 202410218318.0 and application name “Linear regulator circuit, storage circuit and microprocessor chip”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to, but is not limited to, a linear regulator circuit, a storage circuit, and a microprocessor chip. Background Art

[0003] In current linear regulator circuits, the loop bandwidth is limited by loop stability, the transconductance of the operational amplifier in the error amplification module, and the compensation capacitance of the circuit, and is usually a fixed value.

[0004] In some application scenarios, a linear regulator circuit needs to power digital circuits. Digital circuits operate at high clock frequencies, which can lead to rapid transitions from light to heavy loads. Current linear regulator circuits require large external capacitors for voltage regulation. Without these capacitors, the linear regulator circuit's fixed loop bandwidth prevents the output module from delivering current quickly enough when the load current increases from light to heavy loads. Furthermore, the initial gate discharge current corresponding to the error amplifier module is very small. Without additional current, the linear regulator circuit's output undershoot voltage will be excessive, causing operational failure when operating under load and leading to abnormal chip operation.

[0005] In summary, due to the limited loop bandwidth of linear regulators, when driving high-clock frequency circuits, load current fluctuations and temperature variations may occur, resulting in insufficient output voltage stability and effectiveness. Therefore, a linear regulator circuit is needed to improve the stability and effectiveness of the output voltage. Summary of the Invention

[0006] The present application provides a linear regulator circuit, a storage circuit, and a microprocessor chip to improve the stability and effectiveness of the linear regulator output voltage.

[0007] In a first aspect, the present application provides a linear regulator circuit, the circuit comprising:

[0008] Error amplification module, voltage stabilization circuit and output circuit;

[0009] Wherein, the error amplification module includes an error amplifier and a load detection module, the output circuit includes an output transistor and a feedback circuit, and the voltage stabilization circuit includes an overshoot suppression module and a temperature detection module;

[0010] The output end of the error amplifier is connected to the first end of the load detection module, the second end of the load detection module is connected to the first end of the voltage stabilizing circuit, the first end of the voltage stabilizing circuit is connected to the control end of the output transistor, the second end of the output transistor serves as the output end of the linear regulator circuit and is connected to the first end of the feedback circuit, the second end of the feedback circuit is grounded, the third end of the feedback circuit is connected to the first input end of the error amplifier, the second input end of the error amplifier is connected to a reference voltage, and the second end of the voltage stabilizing circuit is connected to the second end of the output transistor;

[0011] In addition, the error amplification module is used to amplify the difference between the output voltage or feedback voltage and the reference voltage to obtain a regulation signal, and adjust the output voltage to a preset value; the voltage stabilization circuit is used to adjust the conductivity of the output transistor according to the load conditions to maintain the stability of the output voltage.

[0012] As an optional implementation, the overshoot suppression module includes: a first load detection circuit, a voltage clamping circuit, and a current scaling circuit;

[0013] Wherein, the voltage clamping circuit includes first to fourth transistors, and the current scaling circuit includes fifth to seventh transistors;

[0014] Wherein, the first ends of the first transistor, the second transistor and the fifth transistor are connected to the power supply line, and the second ends of the third transistor, the fourth transistor, the sixth transistor and the seventh transistor are grounded;

[0015] The control terminals of the first transistor and the second transistor are connected, and are also connected to the second terminal of the first transistor. The second terminal of the first transistor is connected to the first terminal of the third transistor. The second terminal of the second transistor is connected to the control terminal of the fifth transistor and is also connected to the first terminal of the fourth transistor. The control terminals of the third transistor and the fourth transistor are connected. The control terminals of the sixth transistor and the seventh transistor are connected, and are also connected to the second terminal of the fifth transistor and the first terminal of the sixth transistor.

[0016] The second end of the fourth transistor is connected to the output end of the linear regulator circuit, and the first end of the seventh transistor is connected to the control end of the output transistor.

[0017] As an optional implementation manner, the first load detection circuit includes a first capacitor, a first end of the first capacitor is connected to the output end of the linear regulator circuit, and a second end of the first capacitor is connected to the second end of the fourth transistor;

[0018] The first capacitor is used to detect voltage changes of the output transistor.

[0019] As an optional implementation, the current scaling circuit is used to:

[0020] When the load current increases and the rate of change of the load current is greater than a preset threshold, the adjusted control signal is used to increase the conduction degree of the output transistor;

[0021] When the load current decreases and the load current change rate is greater than the preset threshold, the adjusted control signal is used to reduce the conduction degree of the output transistor.

[0022] As an optional implementation, the temperature detection module further includes a current control module, and the current control module includes a temperature acquisition module and a plurality of controllable current mirror branches connected in parallel;

[0023] While traditional circuits can meet the requirements of -40°C without oscillation at the ff process angle, they cannot meet the requirements of 125°C. Alternatively, a circuit setting that meets the regulation requirements at 125°C will produce oscillation at -40°C, resulting in negative effects. It is necessary to configure the current control module for temperature compensation, allowing it to use different regulation ratios at high and low temperatures.

[0024] The temperature acquisition module is connected to the control end of each of the controllable current mirror branches, the first end of each of the controllable current mirror branches is connected to the control ends of the fifth transistor and the sixth transistor, and the second end of each of the controllable current mirror branches is grounded;

[0025] Furthermore, the temperature acquisition module is used to acquire an ambient temperature parameter and send a current control signal to each of the controllable current mirror branches. Each of the controllable current mirror branches is used to adjust the output current according to the current control signal.

[0026] When the temperature acquisition module obtains an ambient temperature parameter greater than the preset temperature parameter, the number of the controllable current mirror branches that are turned on is increased to improve the current drawing capability; when the temperature acquisition module obtains an ambient temperature parameter less than the preset temperature parameter, the number of the controllable current mirror branches that are turned on is reduced to reduce the current drawing capability.

[0027] As an optional implementation, the temperature acquisition module includes a bandgap reference voltage module, a comparison resistor and a comparator;

[0028] The bandgap reference voltage module is connected to the first end of the comparison resistor, the second end of the comparison resistor is connected to the first input end of the comparator, the second end of the comparator is connected to the comparison voltage, and the output end of the comparator is connected to the control end of each controllable current mirror branch.

[0029] As an optional implementation manner, there are multiple comparison resistors and comparators, and the number of the comparison resistors and the comparators is consistent with the number of the controllable current mirror branches, and there is a one-to-one correspondence between each comparison resistor, each comparator and each controllable current mirror branch;

[0030] The first end of each comparison resistor is connected to the bandgap reference voltage module, the second end of each comparison resistor is connected to a corresponding comparator, and the output end of each comparator is connected to a corresponding controllable current mirror branch.

[0031] In a second aspect, the present application provides a storage circuit, which includes the linear regulator circuit according to the first aspect.

[0032] As an optional implementation, the storage circuit includes a flash memory, and the linear regulator circuit is used to stabilize the output voltage of the storage circuit according to a flip signal of the flash memory.

[0033] In a third aspect, the present application provides a microprocessor chip, which includes the linear regulator circuit according to the first aspect.

[0034] The linear voltage regulator circuit provided in the present application can collect the load current change rate at the output end of the circuit through the design of the voltage stabilization circuit, and generate a second control signal based on the load current change rate, so that the output transistor can output a stable voltage under the control of the second control signal and the first control signal from the error amplifier, thereby reducing the impact of load changes on the output voltage, thereby solving the problems caused by load current jumps and temperature changes, and improving the stability and effectiveness of the output voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] FIG1 is a schematic structural diagram of the background technology of an embodiment of the present invention;

[0036] FIG2 is a schematic structural diagram of a linear voltage regulator circuit disclosed in an embodiment of the present invention;

[0037] FIG3 is a schematic structural diagram of another linear voltage regulator circuit disclosed in an embodiment of the present invention;

[0038] FIG4 is a schematic structural diagram of another linear voltage regulator circuit disclosed in an embodiment of the present invention;

[0039] FIG5 is a schematic structural diagram of another linear voltage regulator circuit disclosed in an embodiment of the present invention;

[0040] FIG6 is a schematic structural diagram of another linear voltage regulator circuit disclosed in an embodiment of the present invention;

[0041] FIG7 is a schematic structural diagram of another linear regulator circuit disclosed in an embodiment of the present invention;

[0042] FIG8 is a schematic structural diagram of another linear voltage regulator circuit disclosed in an embodiment of the present invention;

[0043] FIG9 is a schematic structural diagram of a storage circuit disclosed in an embodiment of the present invention;

[0044] FIG10 is a schematic structural diagram of a microprocessor chip disclosed in an embodiment of the present invention.

[0045] Figure markings: 101-reference voltage generating circuit; 102-error comparator; Mp-output transistor; 103-feedback circuit; 104-voltage stabilizing circuit; 1021-error amplifier; 1022-second load detection circuit; 1041-overshoot suppression module; 1042-temperature detection module; 1401-first load detection circuit; 1402-current source circuit; 1403-current mirror circuit; 1404-voltage clamping circuit; M1-first transistor; M2-second transistor; M3-third transistor; M4-fourth transistor; M5-fifth transistor; M6-sixth transistor; M7-seventh transistor; M81-eighth transistor; s1-first switch; C1-first capacitor; C-compensation capacitor. DETAILED DESCRIPTION

[0046] In current linear regulator circuits, the loop bandwidth is limited by loop stability, the transconductance of the operational amplifier in the error amplification module, and the compensation capacitor C of the circuit, and is usually a fixed value.

[0047] In some application scenarios, a linear regulator circuit needs to power digital circuits. Digital circuits operate at high clock frequencies, which can lead to rapid transitions from light to heavy loads. Current linear regulator circuits require large external capacitors for voltage regulation. Without these capacitors, the linear regulator circuit's fixed loop bandwidth prevents the output module from delivering current quickly enough when the load current increases from light to heavy loads. Furthermore, the initial gate discharge current corresponding to the error amplifier module is very small. Without additional current, the linear regulator circuit's output undershoot voltage will be excessive, causing operational failure when operating under load and leading to abnormal chip operation.

[0048] Due to process corner variations, the chip's operating junction temperature varies widely, from -40°C to 125°C. At -40°C, electron mobility is highest at the ff process corner, making conventional circuits adjust fastest. At 125°C, electron mobility is lowest at the ss process corner, making conventional circuits adjust slowest. While conventional circuits do not oscillate at the ff process corner at -40°C, they will significantly underperform at 125°C and fail to meet requirements at 125°C. When adjusted at 125°, they will oscillate at -40°C, resulting in negative effects. Therefore, temperature compensation is necessary to ensure that the circuit uses different adjustment ratios at high and low temperatures.

[0049] In summary, due to the limited loop bandwidth of linear regulators, when driving high-clock frequency circuits, load current jumps may occur, resulting in insufficient output voltage stability and effectiveness. Therefore, a linear regulator circuit is needed to improve the stability and effectiveness of the output voltage.

[0050] It should be noted that the linear regulator circuit involved in this application takes a low-dropout linear regulator circuit (Low-Dropout Regulator, LDO for short) as an example to describe the principles of corresponding modules or components.

[0051] Specifically, please refer to Figure 1, which is a schematic diagram of the background technology of an embodiment of the present invention. As shown in Figure 1, the structure of a common existing capacitor-free LDO circuit is shown. Miller compensation technology is used to keep the dominant pole internal, and the loop bandwidth UGB ≈ gm / C, where gm is the differential pair transconductance of the error amplifier and C is the Miller compensation capacitor C.

[0052] In this circuit, the error op amp's bias current is fixed, resulting in a constant differential pair transconductance, gm, of the op amp. Since the loop bandwidth, UGB, ≈ gm / C, is constant if the capacitance is constant, the loop bandwidth is also constant. However, if a larger loop bandwidth is required for practical applications, a larger gm is required, resulting in higher op amp bias current and increased chip power consumption. Furthermore, the loop bandwidth is limited by loop stability.

[0053] In addition, in one application scenario, the LDO in the on-chip system will power the digital circuit and the Flash storage circuit. The operating clock frequency of the digital circuit can exceed 100M. During the flipping process of the digital circuit, there will be a rapid jump from light load to heavy load. The traditional LDO requires an external large capacitor for voltage stabilization. In the absence of an external large capacitor, since the loop bandwidth of the LDO is fixed, when the load current increases from light load to heavy load, because Mp cannot provide current to the load fast enough, the initial gate discharge current of EA is quite small. If there is no additional current, the output undershoot voltage of the LDO will be quite large, and the operation will fail when the Flash storage circuit is used as a load, causing abnormal chip operation.

[0054] The present application solves the aforementioned problem by designing a voltage stabilizing circuit 104. In the present application, the voltage stabilizing circuit 104 can be implemented with an overcharge suppression module and a correction module corresponding to the overcharge suppression module and based on working environment parameters. A feasible implementation method of the correction module is a temperature detection module that regulates current by temperature.

[0055] Specifically, the voltage stabilization circuit 104 includes an overshoot suppression module 1041, which is a circuit module for improving the performance of the LDO, especially for reducing the transient undershoot of the output voltage when the load current suddenly increases. When the load current suddenly increases from a light load to a heavy load, the overshoot suppression module 1041 can quickly provide sufficient gate charge to the transition transistor to quickly increase its conductivity, thereby maintaining the stability of the regulator output voltage. The overshoot suppression module 1041 is composed of multiple subthreshold transistors that consume very low current (sub-ampere level) under steady-state conditions to ensure that the static power consumption of the regulator is maintained at a very low level. When a significant drop in the output voltage is detected, the overshoot suppression module 1041 can respond quickly and provide a large current to help the gate voltage of the transition transistor drop rapidly, thereby increasing the leakage current of the transistor to compensate for the sudden increase in load current. The temperature detection circuit is connected to the overshoot suppression module 1041. At high temperatures, the number of current mirrors connected to the circuit is increased to improve the current drawing capability, and at low temperatures, the number of current mirrors can be reduced. The intensity of the current drawn by the overshoot suppression module 1041 is adjusted according to the temperature, thereby reducing the transient voltage drop over the entire temperature range. The module numbers can refer to the relevant drawings in this application.

[0056] Please refer to Figure 2, which is a schematic diagram of the structure of a linear voltage regulator circuit disclosed in an embodiment of the present invention. As shown in Figure 2, the linear voltage regulator circuit includes:

[0057] A reference voltage generating circuit 101 is used to generate a reference voltage;

[0058] an error comparator 102 having a first input terminal connected to the output terminal of the reference voltage generating circuit 101 and a second input terminal connected to the output terminal of the feedback circuit 103, for adjusting the first control signal according to the difference between the reference voltage and the feedback voltage;

[0059] an output transistor Mp, having a control end connected to the output end of the error comparator 102, a first end connected to the first power supply end, and a second end being a circuit output end of the linear regulator circuit, and outputting a stable voltage at the circuit output end under the control of the first control signal and the second control signal;

[0060] Feedback circuit 103, whose input end is connected to the output end of the circuit, is used to collect the load condition of the output end of the circuit to generate and output a feedback voltage;

[0061] The voltage stabilizing circuit 104 has an input end connected to the circuit output end and an output end connected to the control end of the output transistor Mp, and is used to collect the load current change rate of the circuit output end and generate a second control signal according to the load current change rate.

[0062] In one application scenario, the circuit can be divided into an error amplification module, a voltage stabilization circuit 104 and an output circuit according to its function;

[0063] The error amplification module includes an error amplifier 1021 and a load detection module, namely a second load detection circuit 1022 ; the output circuit includes an output transistor Mp and a feedback circuit 103 ; the voltage stabilization circuit 104 includes an overshoot suppression module 1041 and a temperature detection module 1042 ;

[0064] The output end of the error amplifier 1021 is connected to the first end of the load detection module, the second end of the load detection module is connected to the first end of the voltage stabilizing circuit 104, the first end of the voltage stabilizing circuit 104 is connected to the control end of the output transistor Mp, the first end of the output transistor Mp is connected to the power supply line, the second end of the output transistor Mp serves as the output end of the linear regulator circuit and is connected to the first end of the feedback circuit 103, the second end of the feedback circuit 103 is grounded, the third end of the feedback circuit 103 is connected to the first input end of the error amplifier 1021, the second input end of the error amplifier 1021 is connected to the reference voltage, and the second end of the voltage stabilizing circuit 104 is connected to the second end of the output transistor Mp;

[0065] In addition, the error amplification module is used to amplify the adjustment signal according to the difference between the output voltage or feedback voltage and the reference voltage, and adjust the output voltage to a preset value; the voltage stabilization circuit 104 is used to adjust the conductivity of the output transistor according to the load conditions to maintain the stability of the output voltage.

[0066] As an optional implementation, the voltage stabilizing circuit 104 is specifically configured to:

[0067] When the load current increases and the rate of change of the load current is greater than a preset threshold, the adjusted control signal is used to increase the conduction degree of the transistor;

[0068] When the load current decreases and the rate of change of the load current is greater than a preset threshold, the adjusted control signal is used to increase the conduction degree of the transistor.

[0069] Through the design of the voltage stabilization circuit 104, when the load current suddenly changes in a short period of time, the conduction degree of the output transistor Mp can be adjusted accordingly, so that the output transistor Mp can output a stable voltage under the control of the second control signal and the first control signal from the error comparator 102, thereby reducing the impact of load changes on the output voltage, thereby solving the problem caused by the load current jump and improving the stability and effectiveness of the output voltage.

[0070] As an optional implementation, the voltage stabilizing circuit 104 further includes a compensation module;

[0071] The compensation module includes a compensation capacitor C, a first end of the compensation module is connected to the second end of the output transistor Mp, and a second end of the compensation module is connected to the compensation end of the error comparator 102;

[0072] Furthermore, the compensation module is used to adjust the stability parameters and transient response parameters of the linear regulator circuit by adjusting the pole positions in the complex frequency domain.

[0073] Through the design of the compensation module, the pole position in the complex frequency domain can be adjusted based on the circuit's transfer function to adjust the stability parameters and transient response parameters of the linear regulator circuit, thereby improving the circuit's complex frequency domain performance, thereby further improving the stability and effectiveness of the output voltage.

[0074] Please refer to Figure 3, which is a schematic diagram of the structure of another linear voltage regulator circuit disclosed in an embodiment of the present invention. As shown in Figure 3, a circuit structure for a specific application scenario is shown, wherein the error comparator 102 may include an error amplifier 1021 and a second load detection circuit 1022, the voltage stabilization circuit 104 may include an overshoot suppression module 1041 and a temperature detection module 1042, and the feedback resistor and grounding capacitor at the output end of the right circuit constitute the feedback circuit 103. In the figure, Vref is connected to the reference voltage generation circuit 101, and the reference voltage Vref can drive the error amplifier 1021 to operate normally.

[0075] The error amplifier 1021 is used to compare the output voltage (feedback voltage) with the reference voltage and amplify the difference between the reference voltage and the feedback voltage. The amplified difference signal is used to regulate the LDO circuit to adjust the output voltage back to the set value. If the output voltage is too low, the error amplifier 1021 will increase the conductivity, allowing more current to flow, thereby increasing the output voltage. Conversely, if the output voltage is too high, the error amplifier 1021 will reduce the conductivity.

[0076] The output of the second load detection circuit 1022 is used to dynamically adjust the bias current of the error amplifier 1021. When the load current changes, the response of the LDO circuit can be quickly adjusted, thereby reducing overshoot or undershoot of the output voltage.

[0077] When the load current suddenly increases from a light load to a heavy load, the overshoot suppression module 1041 can quickly provide sufficient electrical signals to Mp to quickly increase its conductivity, thereby maintaining the stability of the output voltage of the LDO circuit;

[0078] The temperature detection module adjusts the current intensity drawn by the overshoot suppression module 1041 according to the temperature, thereby reducing the transient voltage drop in the full temperature range;

[0079] The output module includes an output transistor Mp, which responds to the signal of the error amplifier 1021 to maintain the stability of the output voltage relative to the reference voltage. When the load or input voltage changes, the error amplifier 1021 adjusts the conduction state of the output transistor Mp to maintain a constant output voltage.

[0080] The LDO circuit may also include a Miller compensation circuit to improve the stability and transient response of the LDO circuit when there is no output capacitor.

[0081] Through the design of the voltage stabilizing circuit 104, the load current change rate at the output end of the circuit can be collected, and a second control signal can be generated based on the load current change rate, so that the output transistor Mp can output a stable voltage under the control of the second control signal and the first control signal from the error comparator 102, thereby reducing the impact of load changes on the output voltage, thereby solving the problem caused by load current jumps and improving the stability and effectiveness of the output voltage.

[0082] As an optional implementation, the voltage stabilizing circuit 104 includes:

[0083] A first load detection circuit 1401, whose input terminal is connected to the circuit output terminal, is used to detect the load current change rate;

[0084] The current source circuit 1402 has an input end connected to the first load detection circuit 1401 and is configured to generate a first current signal according to a load current change rate;

[0085] The current mirror circuit 1403 has an input end connected to the output end of the current source circuit 1402 and is configured to generate a second current signal according to the first current signal, and the second current signal serves as a second control signal.

[0086] The load current change rate is detected by the first load detection circuit 1401, a first current signal is generated according to the load current change rate by the current source circuit 1402, and a second current signal is generated according to the first current signal by the current mirror circuit 1403. The second current signal is used as the second control signal, thereby realizing the requirement of generating the second control signal according to the load current change rate, so that the output transistor Mp can output a stable voltage under the control of the second control signal and the first control signal from the error comparator 102, reducing the influence of the output voltage on the load change, thereby solving the problem caused by the load current jump, and improving the stability and effectiveness of the output voltage.

[0087] As an optional implementation, the current source circuit 1402 includes a voltage clamp circuit 1404 and a fifth transistor M5;

[0088] The input end of the voltage clamp circuit 1404 serves as the input end of the current source circuit 1402, the output end of the voltage clamp circuit 1404 is connected to the control end of the fifth transistor M5, the first end of the fifth transistor M5 is connected to the first power supply end, and the second end of the fifth transistor M5 serves as the output end of the current source circuit 1402.

[0089] The voltage clamp circuit 1404 is used to limit the voltage fluctuation at the control terminal of the fifth transistor M5, thereby outputting a stable current, which is then provided to the subsequent current mirror circuit 1403 to generate a second control signal, thereby improving the stability and effectiveness of the output voltage.

[0090] As an optional implementation, the voltage clamp circuit 1404 includes a first transistor M1, a second transistor M2, a third transistor M3 and a fourth transistor M4;

[0091] The first end of the first transistor and the first end of the second transistor M2 are both connected to the first power supply end;

[0092] The control terminal of the first transistor is connected to the control terminal of the second transistor M2; the control terminal of the first transistor is connected to the second terminal of the first transistor;

[0093] The second end of the first transistor is connected to the first end of the third transistor M3, the second end of the second transistor M2 is connected to the first end of the fourth transistor M4, and the second end of the second transistor M2 serves as the output end of the voltage clamp circuit 1404;

[0094] A second terminal of the third transistor M3 and a second terminal of the fourth transistor M4 are both grounded.

[0095] Two groups of two-paired transistors form an inverting amplification clamp circuit, which improves the circuit performance of the clamp circuit portion, thereby limiting the voltage fluctuation at the control terminal of the fifth transistor M5, thereby outputting a stable current, which is then provided to the subsequent current mirror circuit 1403 to generate a second control signal, thereby improving the stability and effectiveness of the output voltage.

[0096] As an optional implementation, the first load detection circuit 1401 includes a first capacitor C1 , a second end of the first capacitor C1 is connected to the circuit output end, and a first end of the first capacitor C1 is connected to the input end of the current source circuit 1402 .

[0097] The first capacitor C1 is used to detect the degree and rate of load fluctuation from the output end of the circuit, so that the current source circuit 1402 can generate a first current signal according to the detection result of the first capacitor C1, and generate a second current signal according to the first current signal through the current mirror circuit 1403, and use the second current signal as the second control signal, thereby realizing the requirement of generating a second control signal according to the load current change rate, so that the output transistor Mp can output a stable voltage under the control of the second control signal and the first control signal from the error comparator 102, reducing the influence of the output voltage on the load change, thereby solving the problem caused by the load current jump, and improving the stability and effectiveness of the output voltage.

[0098] As an optional implementation, the current mirror circuit 1403 includes a sixth transistor M6 and a seventh transistor M7;

[0099] The second end of the sixth transistor M6 and the second end of the seventh transistor M7 are both grounded;

[0100] The control end of the sixth transistor M6 is connected to the control end of the seventh transistor M7, and the control end of the sixth transistor M6 is connected to the first end of the sixth transistor M6;

[0101] A first end of the sixth transistor M6 serves as an input end of the current mirror circuit 1403 , and a first end of the seventh transistor M7 serves as an output end of the current mirror circuit 1403 .

[0102] By connecting two transistors at the control ends relative to each other, a current mirror circuit 1403 based on the output of the current source circuit 1402 is formed, thereby realizing the generation of a second control signal, thereby realizing the requirement of generating a second control signal according to the load current change rate, so that the output transistor Mp can output a stable voltage under the control of the second control signal and the first control signal from the error comparator 102, reducing the influence of the output voltage on the load change, thereby solving the problem caused by the load current jump, and improving the stability and effectiveness of the output voltage.

[0103] In summary, the overshoot suppression module 1041 includes: a first load detection circuit 1401, a voltage clamping circuit 1404, and a current scaling circuit. The current scaling circuit includes the fifth transistor M5 in the current source circuit 1402 and the sixth transistor M6 and the seventh transistor M7 in the current mirror circuit 1403. The voltage clamping circuit 1404 includes first to fourth transistors M1-M4.

[0104] The first ends of the first transistor M1, the second transistor M2 and the fifth transistor M5 are connected to the power supply line, and the second ends of the third transistor M3, the fourth transistor M4, the sixth transistor M6 and the seventh transistor M7 are grounded;

[0105] The control terminals of the first transistor M1 and the second transistor M2 are connected, and are also connected to the second terminal of the first transistor M1. The second terminal of the first transistor M1 is connected to the first terminal of the third transistor M3. The second terminal of the second transistor M2 is connected to the control terminal of the fifth transistor M5 and is also connected to the first terminal of the fourth transistor M4. The control terminals of the third transistor M3 and the fourth transistor M4 are connected. The control terminals of the sixth transistor M6 and the seventh transistor M7 are connected, and are also connected to the second terminal of the fifth transistor M5 and the first terminal of the sixth transistor M6.

[0106] A second end of the fourth transistor M4 is connected to the output end of the linear regulator circuit, and a first end of the seventh transistor M7 is connected to the control end of the output transistor Mp.

[0107] Please refer to Figure 4, which is a schematic diagram of the structure of another linear regulator circuit disclosed in an embodiment of the present invention. As shown in Figure 4, M1-M4 form the aforementioned voltage clamp circuit 1404. M5 and voltage clamp circuit 1404 together form current source circuit 1402, while M6 and M7 implement current mirror circuit 1403. When the load current increases from light to heavy load, peak detection capacitor C1 detects Vout undershoot and conducts a large current from V1 to Vout. V1 decreases, increasing the gate-source voltage difference of M4, thereby reducing V2. M4 and M2 together form an inverting amplifier. As a result, M5, M6, and M7 conduct exponentially increasing current to release the gate of power transistor MP, increasing |Vgsp| and quickly restoring Vout. When the load current decreases from heavy to light load, the output overshoot voltage is also detected by C1, and M5, M6, and M7 then generate exponentially decreasing current.

[0108] As an optional implementation, the current mirror circuit 1403 further includes a control circuit and a plurality of controllable current mirror branches;

[0109] The control circuit is used to obtain target environmental parameters and generate a third control signal according to the target environmental parameters;

[0110] Each controllable current mirror branch has an input end connected to the control end of the sixth transistor M6 and an output end connected to the output end of the sixth transistor M6. The control end receives a third control signal and provides a third current signal under the control of the control signal.

[0111] Please refer to Figure 5, which is a schematic diagram of the structure of another linear regulator circuit disclosed in an embodiment of the present invention. As shown in Figure 5, the control circuit can be implemented in the form of a temperature detection module, and the multiple controllable current mirror branches are specifically controlled by the temperature sensor portion of the temperature detection module.

[0112] In this scenario, the control circuit and the multiple controllable current mirror branches can also be understood as the aforementioned temperature detection module 1042. In other words, the current mirror circuit 1403 can be composed of a basic current mirror branch, a control circuit based on environmental parameters, and multiple controllable current mirror branches controlled by the control circuit.

[0113] Specifically, the aforementioned current mirror circuit 1403 can be understood as a current control module, which includes a temperature acquisition module and a plurality of controllable current mirror branches connected in parallel;

[0114] The temperature acquisition module is connected to the control end of each controllable current mirror branch, the first end of each controllable current mirror branch is connected to the control end of the fifth transistor M5 and the sixth transistor M6, and the second end of each controllable current mirror branch is grounded;

[0115] Furthermore, the temperature acquisition module is used to acquire the ambient temperature parameter and send a current control signal to each controllable current mirror branch. Each controllable current mirror branch is used to adjust the output current according to the current control signal.

[0116] The overcharge suppression module has significant limitations in regulating the discharge speed. If the load is a Flash memory circuit, adjusting the overcharge suppression speed too quickly will cause oscillation, resulting in excessive voltage drop and negatively impacting the overcharge suppression module. If the overcharge suppression module adjusts too slowly, the overcharge suppression effect is minimal, significantly reducing its effectiveness. Due to process corner variations, the chip's operating junction temperature ranges widely, from -40°C to 125°C. At -40°C, electron mobility is highest at the ff process corner, making the overcharge suppression module adjust fastest. At 125°C, electron mobility is lowest at the ss process corner, making the overcharge suppression module adjust slowest. While the overcharge suppression module does not oscillate at the ff process corner when adjusted at -40°C, its performance at 125°C will be significantly reduced and unable to meet requirements at 125°C. If adjusted at 125°C, it will oscillate at -40°C, resulting in negative effects. Therefore, it is necessary to temperature compensate the circuit to use different adjustment ratios at high and low temperatures. When the temperature sensor senses an ambient temperature T1 greater than a preset temperature, the number of current mirrors connected to the circuit is increased to improve the current drawing capability; when the temperature sensor senses an ambient temperature T2 less than a preset temperature, the number of current mirrors connected to the circuit is reduced to reduce the current drawing capability.

[0117] The target environmental parameters are obtained through the control circuit, and a third control signal is generated according to the target environmental parameters, so that each controllable current mirror branch can be controlled by the third control signal, and the output current of the voltage stabilizing circuit 104 is adjusted according to the target environmental parameters. As a result, the output transistor Mp can output a stable voltage under the control of the second control signal and the first control signal from the error comparator 102, thereby reducing the influence of the output voltage on the load change, thereby solving the problem caused by the load current jump, and improving the stability and effectiveness of the output voltage.

[0118] Please refer to Figure 6, which is a schematic diagram of the structure of another linear regulator circuit disclosed in an embodiment of the present invention. As shown in Figure 6, as an optional embodiment, the controllable current mirror branch includes an eighth transistor M81 and a first switch s1;

[0119] Among them, the control end of the eighth transistor M81 serves as the input end of the controllable current mirror branch, the second end of the eighth transistor M81 is grounded, the first end of the eighth transistor M81 is connected to the first end of the first switch s1, the second end of the first switch s1 serves as the output end of the controllable current mirror, and the control end of the first switch s1 serves as the control end of the current mirror branch.

[0120] In addition, the figure shows the situation of multiple groups of controllable current mirror branches, so M82 and s2, M8n and sn also constitute corresponding controllable current mirror branches, just like the combination of M81 and s1. Inside each controllable current mirror branch, M82, ..., M8n should also be understood as the eighth transistor of the corresponding branch, and s2, ..., sn should be understood as the first switch of the corresponding branch.

[0121] In summary, each controllable current mirror branch includes a current mirror transistor and a current mirror control module;

[0122] The control end of each current mirror transistor is connected to the control end of the fifth transistor M5 and the sixth transistor M6, the second end of each current mirror transistor is grounded, the first ends of each current mirror transistor are connected to each other, and the first end of each current mirror is connected to a corresponding current mirror control module;

[0123] Furthermore, the current mirror control module controls the on-off of the corresponding current mirror transistor in response to the output of the temperature acquisition module.

[0124] Environmental parameters or preset control conditions can be used to control the switches corresponding to each current mirror, thereby fine-tuning the current-drawing capability. This adjustment method can be automatic based on environmental parameters or manually adjusted according to the actual needs of the circuit.

[0125] Through the eighth transistor M81 and the first switch s1, the first switch can be controlled according to the third control signal, thereby limiting the on and off of each eighth transistor M81, thereby achieving independent control of each controllable current mirror branch and improving the stability and effectiveness of the output voltage.

[0126] As an optional implementation, the temperature acquisition module includes a bandgap reference voltage module, a comparison resistor and a comparator;

[0127] The bandgap reference voltage module is connected to the first end of the comparison resistor, the second end of the comparison resistor is connected to the first input end of the comparator, the second end of the comparator is connected to the comparison voltage, and the output end of the comparator is connected to the control end of each controllable current mirror branch.

[0128] Please refer to Figure 7, which is a schematic diagram of the structure of another linear regulator circuit disclosed in an embodiment of the present invention. As shown in Figure 7, the bandgap reference voltage module Bandgap can generate a positive temperature coefficient current based on temperature. This current flows through a resistor to form a voltage signal, which can be compared with the reference voltage in a comparator. The comparison result is used to control the switching of all current mirrors in the circuit.

[0129] Through the bandgap reference voltage module, a current signal associated with the target environmental parameter can be generated, and then a voltage associated with the target environmental parameter is formed through a comparison resistor. Through the comparator, the voltage is compared and amplified with a preset comparison voltage, thereby generating a third control signal according to the target environmental parameter. Then, each controllable current mirror branch can be controlled by the third control signal, and the output current of the voltage stabilizing circuit 104 is adjusted according to the target environmental parameter. As a result, the output transistor Mp can output a stable voltage under the control of the second control signal and the first control signal from the error comparator 102, thereby reducing the influence of the output voltage on the load change, thereby solving the problem caused by the load current jump, and improving the stability and effectiveness of the output voltage.

[0130] As an optional implementation, there are multiple comparison resistors and comparators, and the number of comparison resistors and comparators is consistent with the number of current mirror branches, and there is a one-to-one correspondence between each comparison resistor, each comparator and each controllable current mirror branch;

[0131] The first end of each comparison resistor is connected to the bandgap reference voltage module, the second end of each comparison resistor is connected to the corresponding comparator, and the output end of each comparator is connected to the control end of the corresponding controllable current mirror branch.

[0132] Please refer to Figure 8, which is a schematic diagram of the structure of another linear regulator circuit disclosed in an embodiment of the present invention. As shown in Figure 8, the bandgap reference voltage module Bandgap can generate a positive temperature coefficient current based on temperature. This current flows through multiple resistors to form multiple temperature-dependent voltage signals. These signals are then compared with the corresponding reference voltage in the comparator corresponding to each resistor. The comparison results are used to control the switches of the corresponding current mirror branches.

[0133] Through the corresponding comparison resistors, comparators and current mirror branches, each current mirror branch can be individually controlled, thereby improving the accuracy and effectiveness of the third control signal. As a result, each controllable current mirror branch can be controlled by the third control signal, and the output current of the voltage stabilizing circuit 104 can be adjusted according to the target environmental parameters. As a result, the output transistor Mp can output a stable voltage under the control of the second control signal and the first control signal from the error comparator 102, reducing the impact of load changes on the output voltage, thereby solving the problem caused by load current jumps and improving the stability and effectiveness of the output voltage.

[0134] Please refer to Figure 9, which is a schematic diagram of the structure of a storage circuit disclosed in an embodiment of the present invention. As shown in Figure 9, the storage circuit includes a linear regulator circuit as in any embodiment.

[0135] The LDO in the on-chip system supplies power to the digital circuit and Flash. The operating clock frequency of the digital circuit reaches over 100M. During the flipping process of the digital circuit, there will be a rapid jump from light load to heavy load. The traditional LDO requires an external large capacitor for voltage regulation. In the absence of an external large capacitor, since the loop bandwidth of the LDO is fixed, when the load current increases from light load to heavy load, because MP cannot provide current to the load fast enough, the initial gate discharge current corresponding to the error amplifier 1021 is quite small. If there is no additional current, the output undershoot voltage of the LDO will be quite large, and the operation will fail when the Flash load is loaded, causing abnormal chip operation.

[0136] Specifically, the storage circuit includes a flash memory, and the linear regulator circuit is used to stabilize the output voltage of the storage circuit according to a flip signal of the flash memory.

[0137] The linear regulator circuit provided by any embodiment of the present application can solve the problem that occurs when the above-mentioned LDO supplies power to the Flash.

[0138] Please refer to Figure 10, which is a schematic diagram of the structure of a microprocessor chip disclosed in an embodiment of the present invention. As shown in Figure 10, the microprocessor chip includes a linear regulator circuit as in any embodiment.

[0139] The linear regulator circuit provided in any embodiment of the present application can be applied to a microprocessor chip, and the microprocessor chip can be a control module, DSP, MPU, micro CPU, etc. that can process digital signals, analog signals, or perform signal control functions, instruction processing and calculation functions, etc., a micro central control chip, a system-on-chip chip, etc.

[0140] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A linear voltage regulator circuit, characterized in that: The circuit comprises: Error amplification module, voltage stabilization circuit and output circuit; Wherein, the error amplification module includes an error amplifier and a load detection module, the output circuit includes an output transistor and a feedback circuit, and the voltage stabilization circuit includes an overshoot suppression module and a temperature detection module; The output end of the error amplifier is connected to the first end of the load detection module, the second end of the load detection module is connected to the first end of the voltage stabilizing circuit, the first end of the voltage stabilizing circuit is connected to the control end of the output transistor, the second end of the output transistor serves as the output end of the linear regulator circuit and is connected to the first end of the feedback circuit, the second end of the feedback circuit is grounded, the third end of the feedback circuit is connected to the first input end of the error amplifier, the second input end of the error amplifier is connected to a reference voltage, and the second end of the voltage stabilizing circuit is connected to the second end of the output transistor; In addition, the error amplification module is used to amplify the difference between the output voltage or feedback voltage and the reference voltage to obtain a regulation signal, and adjust the output voltage to a preset value; the voltage stabilization circuit is used to adjust the conductivity of the output transistor according to the load conditions to maintain the stability of the output voltage.

2. The circuit according to claim 1, wherein: The overshoot suppression module includes: a first load detection circuit, a voltage clamping circuit and a current scaling circuit; Wherein, the voltage clamping circuit includes a first transistor, a second transistor, a third transistor and a fourth transistor, and the current scaling circuit includes a fifth transistor, a sixth transistor and a seventh transistor; Wherein, the first ends of the first transistor, the second transistor and the fifth transistor are connected to the power supply line, and the second ends of the third transistor, the fourth transistor, the sixth transistor and the seventh transistor are grounded; The control terminals of the first transistor and the second transistor are connected, and are also connected to the second terminal of the first transistor. The second terminal of the first transistor is connected to the first terminal of the third transistor. The second terminal of the second transistor is connected to the control terminal of the fifth transistor and is also connected to the first terminal of the fourth transistor. The control terminals of the third transistor and the fourth transistor are connected. The control terminals of the sixth transistor and the seventh transistor are connected, and are also connected to the second terminal of the fifth transistor and the first terminal of the sixth transistor. The second end of the fourth transistor is connected to the output end of the linear regulator circuit, and the first end of the seventh transistor is connected to the control end of the output transistor.

3. The circuit according to claim 2, characterized in that The first load detection circuit includes a first capacitor, a first end of the first capacitor is connected to the output end of the linear regulator circuit, and a second end of the first capacitor is connected to the second end of the fourth transistor; The first capacitor is used to detect voltage changes of the output transistor.

4. The circuit according to claim 3, characterized in that The current scaling circuit is used to: When the load current increases and the rate of change of the load current is greater than a preset threshold, the adjusted control signal is used to increase the conduction degree of the output transistor; When the load current decreases and the load current change rate is greater than the preset threshold, the adjusted control signal is used to reduce the conduction degree of the output transistor.

5. The circuit according to claim 2, characterized in that The temperature detection module further includes a current control module, which includes a temperature acquisition module and a plurality of controllable current mirror branches connected in parallel; The temperature acquisition module is connected to the control end of each of the controllable current mirror branches, the first end of each of the controllable current mirror branches is connected to the control ends of the fifth transistor and the sixth transistor, and the second end of each of the controllable current mirror branches is grounded; Furthermore, the temperature acquisition module is used to acquire an ambient temperature parameter and send a current control signal to each of the controllable current mirror branches. Each of the controllable current mirror branches is used to adjust the output current according to the current control signal.

6. The circuit according to claim 5, characterized in that The temperature acquisition module includes a bandgap reference voltage module, a comparison resistor and a comparator; The bandgap reference voltage module is connected to the first end of the comparison resistor, the second end of the comparison resistor is connected to the first input end of the comparator, the second end of the comparator is connected to the comparison voltage, and the output end of the comparator is connected to the control end of each controllable current mirror branch.

7. The circuit according to claim 6, characterized in that There are a plurality of comparison resistors and a plurality of comparators, and the number of the comparison resistors and the comparators is consistent with the number of the controllable current mirror branches, and there is a one-to-one correspondence between each comparison resistor, each comparator and each controllable current mirror branch; The first end of each comparison resistor is connected to the bandgap reference voltage module, the second end of each comparison resistor is connected to a corresponding comparator, and the output end of each comparator is connected to a corresponding controllable current mirror branch.

8. The circuit according to claim 5, characterized in that When the temperature acquisition module obtains an ambient temperature parameter greater than the preset temperature parameter, the number of the controllable current mirror branches that are turned on is increased to improve the current drawing capability; when the temperature acquisition module obtains an ambient temperature parameter less than the preset temperature parameter, the number of the controllable current mirror branches that are turned on is reduced to reduce the current drawing capability.

9. A storage circuit, characterized in that: The storage circuit comprises the linear regulator circuit according to any one of claims 1 to 8.

10. The storage circuit according to claim 9, wherein: The storage circuit includes a flash memory, and the linear regulator circuit is used to stabilize the output voltage of the storage circuit according to a flip signal of the flash memory.

11. A microprocessor chip, characterized in that: The microprocessor chip includes the linear regulator circuit according to any one of claims 1 to 8.

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