Display device

Abstract

The present invention comprises: first frame wiring (18h) that is formed in a frame region by means of a first metal film so as to reach a terminal part, is electrically connected to a power supply line on a display region side, and into which a high power supply voltage is input at the terminal part; and second frame wiring (18i) that is formed adjacent to the first frame wiring (18h) in the frame region by means of the first metal film so as to reach the terminal part, is electrically connected to a second electrode on the display region side, and into which a low power supply voltage is input at the terminal part. The first frame wiring (18h) and the second frame wiring (18i) have an interval (L) of 500 μm or more in a portion covered by a flattening film (19d) on the terminal part side.

Description

display device

[0001] The present invention relates to a display device.

[0002] In recent years, self-luminous organic electroluminescence (EL) display devices using organic electroluminescence (hereinafter also referred to as "EL") elements have been attracting attention as display devices to replace liquid crystal display devices. Here, in organic EL display devices, a sealing structure has been proposed in which a sealing film covering the organic EL elements is formed of a laminated film of an inorganic sealing film and an organic sealing film in order to suppress deterioration of the organic EL elements due to contamination by moisture, oxygen, etc.

[0003] For example, Patent Document 1 discloses a display device having a laminated structure in which inorganic film layers formed by a CVD (chemical vapor deposition) method or the like and organic film layers formed by an inkjet method or the like are alternately arranged, and which is provided with a thin film sealing layer that covers organic light-emitting elements.

[0004] JP 2014-86415 A

[0005] Incidentally, when forming an organic sealing film by an inkjet method, as in the display device disclosed in Patent Document 1, a frame-shaped blocking wall is required to block the ink that will form the organic sealing film in the frame region surrounding the display region where the organic EL elements are provided. The organic EL display device includes, for example, a resin substrate, a thin film transistor (TFT) layer provided on the resin substrate, and an organic EL element layer provided on the TFT layer. Here, the TFT layer includes, for example, a power supply line provided in the display region, first and second frame wirings provided in the frame region, and a planarization film made of an organic resin material that is provided on the power supply line, the first and second frame wirings, and has a flat surface in the display region. The organic EL element layer includes, for example, a plurality of first electrodes, an edge cover made of an organic resin material, a plurality of organic EL layers, and a second electrode, which are sequentially provided on the planarization film. The first frame wiring is electrically connected to a power line on the display area side and drawn to a terminal portion in the frame area to receive a high power supply voltage. The second frame wiring is electrically connected to a second electrode on the display area side and drawn to a terminal portion to receive a low power supply voltage. Therefore, when the organic EL display device is operated, a large potential difference exists between the first frame wiring and the second frame wiring on the terminal portion side. This potential difference can cause electrochemical corrosion, resulting in the elution of a portion of the first frame wiring on the terminal portion side, forming a cavity at the side end of the first frame wiring on the second frame wiring side. Furthermore, when the damming wall is formed of the same material in the same layer as the planarization film and the edge cover, the first frame wiring and the second frame wiring are exposed from the damming wall, and the terminal portions of the first frame wiring and the second frame wiring are covered by the planarization film. Therefore, if moisture penetrates from the outside into the planarization film on the terminal side, the moisture will penetrate into the display area through the cavity formed in the first frame wiring, which may cause deterioration of the organic EL element.

[0006] The present invention has been made in view of the above points, and an object of the present invention is to suppress electrochemical corrosion between the first frame wiring and the second frame wiring.

[0007] In order to achieve the above object, a display device according to the present invention includes a base substrate, a thin film transistor layer provided on the base substrate and including a first metal film and a planarization film made of an organic resin material laminated in this order, a light emitting element layer provided on the thin film transistor layer and including a plurality of light emitting elements, each having a first electrode, a light emitting functional layer, and a second electrode laminated in this order, corresponding to a plurality of subpixels constituting a display area, a sealing film provided on the light emitting element layer and including a first inorganic sealing film, an organic sealing film, and a second inorganic sealing film laminated in this order, a power supply line provided in the display area and formed by the first metal film, a frame area provided around the display area, terminal portions provided at ends of the frame area so as to extend in one direction, and an upper electrode provided in the frame area so as to reach the terminal portions, the upper electrode being formed by the first metal film. a first frame wiring electrically connected to the power line on the display area side and having a high power supply voltage input at the terminal portion; a second frame wiring formed by the first metal film in the frame area adjacent to the first frame wiring and reaching the terminal portion, electrically connected to the second electrode on the display area side and having a low power supply voltage input at the terminal portion; and a blocking wall formed in a frame shape in the frame area so as to overlap a peripheral edge of the organic sealing film and including a resin layer formed in the same layer and made of the same material as the planarization film, wherein the terminal portion side of the first frame wiring and the terminal portion side of the second frame wiring are covered with the planarization film, and the first frame wiring and the second frame wiring are characterized in that the distance between the portions covered with the planarization film on the terminal portion side is 500 μm or more.

[0008] According to the present invention, electrochemical corrosion between the first frame wiring and the second frame wiring can be suppressed.

[0009] FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention. FIG. 2 is a plan view of a display region of the organic EL display device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view of the organic EL display device taken along line III-III in FIG. 1. FIG. 4 is an equivalent circuit diagram of a TFT layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 5 is a cross-sectional view of an organic EL layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view of a frame region of the organic EL display device taken along line VI-VI in FIG. 1. FIG. 7 is an enlarged plan view of region A in FIG. 1. FIG. 8 is a cross-sectional view of the organic EL display device taken along line VIII-VIII in FIG. 7.

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.

[0011] First Embodiment FIGS. 1 to 8 show a first embodiment of a display device according to the present invention. In the following embodiments, an organic EL display device including organic EL elements will be exemplified as a display device including light-emitting elements. FIG. 1 is a plan view showing a schematic configuration of an organic EL display device 50 according to this embodiment. FIG. 2 is a plan view of a display region D of the organic EL display device 50. FIG. 3 is a cross-sectional view of the organic EL display device 50 taken along line III-III in FIG. 1. FIG. 4 is an equivalent circuit diagram of a TFT layer 30 constituting the organic EL display device 50. FIG. 5 is a cross-sectional view of an organic EL layer 33 constituting the organic EL display device 50. FIG. 6 is a cross-sectional view of a frame region F of the organic EL display device 50 taken along line VI-VI in FIG. 1. FIG. 7 is an enlarged plan view of region A in FIG. 1. FIG. 8 is a cross-sectional view of the organic EL display device 50 taken along line VIII-VIII in FIG. 7.

[0012] 1, the organic EL display device 50 includes, for example, a rectangular display area D for displaying an image, and a frame area F provided in the shape of a rectangular frame around the display area D. Note that, although the present embodiment illustrates a rectangular display area D, this rectangular shape also includes, for example, a substantially rectangular shape with arc-shaped sides, arc-shaped corners, or a shape with a notch in one of the sides.

[0013] In the display region D, a plurality of sub-pixels P are arranged in a matrix as shown in Fig. 2. In the display region D, for example, a sub-pixel P having a red light-emitting region Er for displaying red, a sub-pixel P having a green light-emitting region Eg for displaying green, and a sub-pixel P having a blue light-emitting region Eb for displaying blue are provided adjacent to each other as shown in Fig. 2. In the display region D, one pixel is configured by, for example, three adjacent sub-pixels P having the red light-emitting region Er, the green light-emitting region Eg, and the blue light-emitting region Eb.

[0014] A terminal portion T is provided at the end of the frame region F on the positive side in the X direction in FIG. 1 so as to extend in one direction (the Y direction in FIG. 1). Also, in the frame region F, as shown in FIG. 1, a bending portion B is provided between the display region D and the terminal portion T so as to extend in one direction (the Y direction in FIG. 1), which can be bent, for example, 180° (in a U-shape) with the Y direction in FIG. 1 as the bending axis. Also, in the frame region F, a planarization film 19a (described later) is provided with a trench G having a substantially C-shape in plan view so as to penetrate the planarization film 19a, as shown in FIGS. 1, 3, and 6. Here, the trench G is provided in a substantially C-shape in plan view so as to open on the terminal portion T side, as shown in FIG. 1.

[0015] As shown in Figures 3 and 6, the organic EL display device 50 includes a resin substrate 10 provided as a base substrate, a TFT layer 30 provided on the resin substrate 10, an organic EL element layer 40 provided as a light-emitting element layer on the TFT layer 30, and a sealing film 45 provided on the organic EL element layer 40.

[0016] The resin substrate 10 is made of, for example, polyimide resin.

[0017] As shown in FIG. 3 , the TFT layer 30 includes a base coat film 11 provided on a resin substrate 10, a plurality of first TFTs 9 a, a plurality of second TFTs 9 b, and a plurality of capacitors 9 c provided on the base coat film 11, and a planarization film 19 a provided on each of the first TFTs 9 a, each of the second TFTs 9 b, and each of the capacitors 9 c. As shown in FIG. 2 , the TFT layer 30 includes a plurality of gate lines 14 g extending parallel to each other in the X direction. As shown in FIG. 2 , the TFT layer 30 also includes a plurality of source lines 18 f extending parallel to each other in the Y direction. As shown in FIG. 2 , the TFT layer 30 also includes a plurality of power supply lines 18 g extending parallel to each other in the Y direction. Each power supply line 18 g is adjacent to each of the source lines 18 f. 4, the TFT layer 30 includes a first TFT 9a, a second TFT 9b, and a capacitor 9c for each subpixel P. Also, in the TFT layer 30, as shown in FIG. 3, the following are stacked in order on a resin substrate 10: a base coat film 11, a semiconductor film that will become a first semiconductor layer 12a (described later), a gate insulating film 13, a second metal film that will become a first gate electrode 14a (described later), a first interlayer insulating film 15, a third metal film that will become an upper conductive layer 16c (described later), a second interlayer insulating film 17, a first metal film that will become a first source electrode 18a (described later), and a planarization film 19a. Each gate line 14g is formed of the second metal film. Each source line 18f and each power supply line 18g are formed of the first metal film.

[0018] The base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 are each composed of a single layer or a multilayer film of an inorganic insulating film such as silicon nitride, silicon oxide, or silicon oxynitride.

[0019] As shown in FIG. 4 , the first TFT 9a is electrically connected to the corresponding gate line 14g and source line 18f in each subpixel P. As shown in FIG. 3 , the first TFT 9a includes a first semiconductor layer 12a, a gate insulating film 13, a first gate electrode 14a, a first interlayer insulating film 15, a second interlayer insulating film 17, a first source electrode 18a, and a first drain electrode 18b, which are sequentially disposed on a base coat film 11. The first semiconductor layer 12a is made of polysilicon such as low-temperature polysilicon (LTPS) and is disposed in an island shape on the base coat film 11 as shown in FIG. 3 , and includes a first channel region, a first source region, and a first drain region. As shown in FIG. 3 , the gate insulating film 13 is disposed to cover the first semiconductor layer 12a. As shown in FIG. 3 , the first gate electrode 14a is disposed on the gate insulating film 13 so as to overlap the first channel region of the first semiconductor layer 12a. 3, the first interlayer insulating film 15 and the second interlayer insulating film 17 are provided in this order to cover the first gate electrode 14a. The first source electrode 18a and the first drain electrode 18b are provided on the second interlayer insulating film 17 to be spaced apart from each other. The first source electrode 18a and the first drain electrode 18b are electrically connected to the first source region and the first drain region of the first semiconductor layer 12a, respectively, through contact holes formed in the stacked film of the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17.

[0020] As shown in FIG. 4 , the second TFT 9b is electrically connected to the corresponding first TFT 9a and power line 18g in each subpixel P. As shown in FIG. 3 , the second TFT 9b includes a second semiconductor layer 12b, a gate insulating film 13, a second gate electrode 14b, a first interlayer insulating film 15, a second interlayer insulating film 17, a second source electrode 18c, and a second drain electrode 18d, which are sequentially formed on a base coat film 11. Like the first semiconductor layer 12a, the second semiconductor layer 12b is made of, for example, polysilicon and is formed in an island shape on the base coat film 11 as shown in FIG. 3 , and includes a second channel region, a second source region, and a second drain region. As shown in FIG. 3 , the gate insulating film 13 is formed to cover the second semiconductor layer 12b. As shown in FIG. 3 , the second gate electrode 14b is formed on the gate insulating film 13 so as to overlap the second channel region of the second semiconductor layer 12b. 3, the first interlayer insulating film 15 and the second interlayer insulating film 17 are provided in this order to cover the second gate electrode 14b. The second source electrode 18c and the second drain electrode 18d are provided on the second interlayer insulating film 17 to be spaced apart from each other. The second source electrode 18c and the second drain electrode 18d are electrically connected to the second source region and the second drain region of the second semiconductor layer 12b, respectively, through contact holes formed in the stacked film of the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17.

[0021] In this embodiment, the first TFT 9 a and the second TFT 9 b are illustrated as top-gate type, but the first TFT 9 a and the second TFT 9 b may be bottom-gate type. Also, in this embodiment, the first TFT 9 a and the second TFT 9 b are illustrated as having semiconductor layers made of polysilicon, but the first TFT 9 a and the second TFT 9 b may be illustrated as having semiconductor layers made of oxide semiconductors such as In—Ga—Zn—O.

[0022] As shown in Fig. 4, the capacitor 9c is electrically connected to the corresponding first TFT 9a and power supply line 18g in each subpixel P. Here, as shown in Fig. 3, the capacitor 9c includes a lower conductive layer 14c formed of a second metal film, a first interlayer insulating film 15 provided so as to cover the lower conductive layer 14c, and an upper conductive layer 16c formed of a third metal film and provided on the first interlayer insulating film 15 so as to overlap the lower conductive layer 14c. Note that the upper conductive layer 16c is electrically connected to the power supply line 18g via a contact hole formed in the second interlayer insulating film 17, as shown in Fig. 3.

[0023] The planarizing film 19a has a flat surface in the display region D and is made of an organic resin material such as polyimide resin, acrylic resin, or polysiloxane resin.

[0024] 3, the organic EL element layer 40 includes a plurality of first electrodes 31a, an edge cover 32a, a plurality of organic EL layers 33, and a second electrode 34, which are provided in this order on the TFT layer 30. Here, in each subpixel P, as shown in FIG. 3, the first electrode 31a, the organic EL layer 33, and the second electrode 34 are laminated in this order to form an organic EL element 35 (see FIG. 4) provided as a light-emitting element.

[0025] As shown in FIG. 3 , the plurality of first electrodes 31 a are provided in a matrix on the planarization film 19 a so as to correspond to the plurality of sub-pixels P. Here, as shown in FIG. 3 , the first electrodes 31 a are electrically connected to the second drain electrodes 18 d of the respective second TFTs 9 b via contact holes formed in the planarization film 19 a. Furthermore, the first electrodes 31 a are provided as anodes and have the function of injecting holes (positive holes) into the organic EL layer 33. Furthermore, it is more preferable that the first electrodes 31 a be made of a material with a large work function in order to improve the efficiency of hole injection into the organic EL layer 33. Here, examples of materials constituting the first electrode 31a include metal materials such as silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), titanium (Ti), ruthenium (Ru), manganese (Mn), indium (In), ytterbium (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), and tin (Sn). Examples of materials constituting the first electrode 31a include astatine (At) / astatine oxide (AtO ２ The first electrode 31a may be made of an alloy of tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), indium zinc oxide (IZO), or another conductive oxide. The first electrode 31a may be formed by stacking multiple layers made of the above materials. Examples of compound materials with a large work function include indium tin oxide (ITO) and indium zinc oxide (IZO).

[0026] 3, the edge cover 32a is provided in a lattice pattern common to the plurality of sub-pixels P so as to cover the peripheral edge of each first electrode 31a. Here, examples of materials constituting the edge cover 32a include organic resin materials such as polyimide resin, acrylic resin, and polysiloxane resin.

[0027] 3, the plurality of organic EL layers 33 are disposed on each first electrode 31a, and are provided in a matrix as a plurality of light-emitting functional layers so as to correspond to the plurality of sub-pixels P. Here, each organic EL layer 33 includes a hole injection layer 1, a hole transport layer 2, a light-emitting layer 3, an electron transport layer 4, and an electron injection layer 5, which are provided in this order on the first electrode 31a, as shown in FIG.

[0028] The hole injection layer 1 is also called an anode buffer layer, and has the function of bringing the energy levels of the first electrode 31a and the organic EL layer 33 closer to each other, thereby improving the efficiency of hole injection from the first electrode 31a to the organic EL layer 33. Examples of materials that form the hole injection layer 1 include triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives.

[0029] The hole transport layer 2 has a function of improving the efficiency of transporting holes from the first electrode 31a to the organic EL layer 33. Here, examples of materials constituting the hole transport layer 2 include porphyrin derivatives, aromatic tertiary amine compounds, styrylamine derivatives, polyvinylcarbazole, poly-p-phenylenevinylene, polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, zinc sulfide, and zinc selenide.

[0030] The light-emitting layer 3 is a region into which holes and electrons are injected from the first electrode 31 a and the second electrode 34, respectively, and where the holes and electrons recombine when a voltage is applied by the first electrode 31 a and the second electrode 34. Here, the light-emitting layer 3 is made of a material with high luminous efficiency. Examples of materials that can be used to form the light-emitting layer 3 include metal oxinoid compounds [8-hydroxyquinoline metal complexes], naphthalene derivatives, anthracene derivatives, diphenylethylene derivatives, vinylacetone derivatives, triphenylamine derivatives, butadiene derivatives, coumarin derivatives, benzoxazole derivatives, oxadiazole derivatives, oxazole derivatives, benzimidazole derivatives, thiadiazole derivatives, benzothiazole derivatives, styryl derivatives, styrylamine derivatives, bisstyrylbenzene derivatives, trisstyrylbenzene derivatives, perylene derivatives, perinone derivatives, aminopyrene derivatives, pyridine derivatives, rhodamine derivatives, aquidin derivatives, phenoxazone, quinacridone derivatives, rubrene, poly-p-phenylenevinylene, and polysilane.

[0031] The electron transport layer 4 has a function of efficiently transferring electrons to the light-emitting layer 3. Examples of materials constituting the electron transport layer 4 include organic compounds such as oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinodimethane derivatives, diphenoquinone derivatives, fluorenone derivatives, silole derivatives, and metal oxinoid compounds.

[0032] The electron injection layer 5 has a function of bringing the energy levels of the second electrode 34 and the organic EL layer 33 closer to each other and improving the efficiency of electron injection from the second electrode 34 to the organic EL layer 33, and this function makes it possible to reduce the driving voltage of the organic EL element. The electron injection layer 5 is also called a cathode buffer layer. Here, examples of materials constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF ２ ), calcium fluoride (CaF ２ ), strontium fluoride (SrF ２ ), barium fluoride (BaF ２inorganic alkali compounds such as aluminum oxide (Al ２ O ３ ), strontium oxide (SrO), etc.

[0033] The second electrode 34 is provided on the plurality of organic EL layers 33 so as to be common to the plurality of subpixels P, i.e., so as to cover each organic EL layer 33 and the edge cover 32a, as shown in FIG. 3 . The second electrode 34 is provided as a cathode and has the function of injecting electrons into the organic EL layer 33. The second electrode 34 is preferably made of a material with a small work function to improve the efficiency of electron injection into the organic EL layer 33. Examples of materials that can be used for the second electrode 34 include silver (Ag), aluminum (Al), vanadium (V), calcium (Ca), titanium (Ti), yttrium (Y), sodium (Na), manganese (Mn), indium (In), magnesium (Mg), lithium (Li), ytterbium (Yb), and lithium fluoride (LiF). The second electrode 34 may be made of, for example, magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), or astatine (At) / astatine oxide (AtO ２ The second electrode 34 may be formed of an alloy such as lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), or lithium fluoride (LiF) / calcium (Ca) / aluminum (Al). The second electrode 34 may be formed of a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The second electrode 34 may be formed by stacking multiple layers made of the above materials. Examples of materials with a low work function include magnesium (Mg), lithium (Li), lithium fluoride (LiF), magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), and lithium fluoride (LiF) / calcium (Ca) / aluminum (Al).

[0034] 3 and 6 , the sealing film 45 is provided so as to cover the second electrode 34, and includes a first inorganic sealing film 41, an organic sealing film 42, and a second inorganic sealing film 43 laminated in this order on the second electrode 34, and has the function of protecting the organic EL layer 33 of each organic EL element 35 from moisture and oxygen. Here, the first inorganic sealing film 41 and the second inorganic sealing film 43 are made of inorganic insulating films such as silicon nitride films, silicon oxide films, and silicon oxynitride films. Furthermore, the organic sealing film 42 is made of an organic resin material such as acrylic resin, epoxy resin, silicone resin, polyurea resin, parylene resin, polyimide resin, and polyamide resin.

[0035] 1, the organic EL display device 50 includes a damming wall W provided in a frame shape outside the trench G in the frame region F so as to surround the display region D. Here, the damming wall W includes a first damming wall Wa provided in a frame shape so as to overlap the peripheral edge of the organic sealing film 42, and a second damming wall Wb provided in a frame shape so as to surround the first damming wall Wa, as shown in FIGS.

[0036] 6, the first damming wall Wa includes an inner lower resin layer 19b formed in the same layer and made of the same material as the planarizing film 19a, and an inner upper resin layer 32c formed in the same layer and made of the same material as the edge cover 32a, provided on the inner lower resin layer 19b via a connection wiring 31b (described later). The connection wiring 31b is formed in the same layer and made of the same material as the first electrode 31a. As described above, the first damming wall Wa is provided so as to overlap the peripheral edge of the organic sealing film 42, and is configured to suppress the spread of ink that becomes the organic sealing film 42.

[0037] 6, the second dam wall Wb includes an outer lower resin layer 19c formed in the same layer as the planarizing film 19a and made of the same material as the planarizing film 19a, and an outer upper resin layer 32d provided on the outer lower resin layer 19c via a connection wiring 31b and formed in the same layer as the edge cover 32a and made of the same material as the edge cover 32a. In the present embodiment, the first dam wall Wa (second dam wall Wb) including the inner lower resin layer 19b (outer lower resin layer 19c) and the inner upper resin layer 32c (outer upper resin layer 32d) has been exemplified, but the first dam wall Wa (second dam wall Wb) may omit the inner upper resin layer 32c (outer upper resin layer 32d).

[0038] 1 , the organic EL display device 50 includes a first frame wiring 18h that extends widely in the X direction in the frame region F in the opening of the trench G, with both ends on the display region D side extending linearly inside the trench G along the edge of the display region D on the positive side in the X direction in the figure, and both ends on the terminal portion T side reaching the terminal portion T. Here, the first frame wiring 18h is electrically connected to the power line 18g on the display region D side of the frame region F, and is configured so that a high power supply voltage (ELVDD) is input to the terminal portion T.

[0039] 1, the organic EL display device 50 also includes a second frame wiring 18i that is provided in a generally C-shape outside the trench G in the frame region F, with both ends adjacent to the first frame wiring 18h and reaching the terminal portion T. Here, as shown in FIG. 6, the second frame wiring 18i is electrically connected to the second electrode 34 in the display region D via a connection wiring 31b provided in the trench G, and is configured so that a low power supply voltage (ELVSS) is input at the terminal portion T.

[0040] The first frame wiring 18h (second frame wiring 18i) is formed of a first metal film in which a titanium-based metal film, an aluminum-based metal film, and a titanium-based metal film are sequentially stacked, and has a stacked structure in which a titanium layer 6a (6b), an aluminum layer 7a (7b), and a titanium layer 8a (8b) are sequentially stacked, as shown in Fig. 8. Furthermore, the terminal portion T side (the positive side in the X direction in Fig. 7) of the first frame wiring 18h and the second frame wiring 18i is covered with a planarization film 19d formed in the same layer and made of the same material as the planarization film 19a provided in the display region D, as shown in Figs. 7 and 8. The planarization film 19d is also provided on the surfaces of the bent portion B and the terminal portion T (other than the portion where the terminals are arranged). 7, the distance L between the first frame wiring 18h and the second frame wiring 18i and the portion covered with the planarization film 19d on the terminal portion T side is 500 μm or more, which can suppress electrochemical corrosion due to the potential difference between the first frame wiring 18h and the second frame wiring 18i and can suppress the generation of voids C due to elution of the aluminum layer 7a. Furthermore, the first frame wiring 18h and the second frame wiring 18i are provided on the terminal portion T side such that their opposing side ends are bent in a substantially N-shape in plan view. Therefore, even if moisture M penetrates the side ends of the first frame wiring 18h and the second frame wiring 18i, the penetration path is long in the planar direction, which can slow down the deterioration of the organic EL element 35b. Furthermore, on the terminal portion T side, a metal pattern 14d formed of a second metal film is provided on the resin substrate 10 side of the first frame wiring 18h and the second frame wiring 18i, via the first interlayer insulating film 15 and the second interlayer insulating film 17, so as to intersect with the side ends of the first frame wiring 18h and the second frame wiring 18i. As a result, even if moisture M penetrates the side ends of the first frame wiring 18h and the second frame wiring 18i, the penetration path is lengthened in the cross-sectional direction by the metal pattern 14d, thereby slowing down deterioration of the organic EL element 35b. The metal pattern 14d may be provided intermittently in an island shape, as long as there are portions that intersect with the side ends of the first frame wiring 18h and the second frame wiring 18i.

[0041] 3 and 6, the organic EL display device 50 also includes a plurality of peripheral photo spacers 32b provided in the frame region F in the shape of islands so as to protrude upward from both edges of the trench G. Here, the peripheral photo spacers 32b are formed in the same layer as the edge cover 32a and made of the same material.

[0042] In the organic EL display device 50 described above, in each subpixel P, a gate signal is input to the first TFT 9a via the gate line 14g to turn the first TFT 9a on, a data signal is written to the second gate electrode 14b and capacitor 9c of the second TFT 9b via the source line 18f, and a current from the power supply line 18g corresponding to the gate voltage of the second TFT 9b is supplied to the organic EL element 35, causing the light-emitting layer 3 of the organic EL element 35 to emit light, thereby displaying an image. Note that in the organic EL display device 50, even if the first TFT 9a is turned off, the gate voltage of the second TFT 9b is held by the capacitor 9c, so that light emission by the light-emitting layer 3 is maintained until a gate signal for the next frame is input.

[0043] Next, a method for manufacturing the organic EL display device 50 of this embodiment will be described. The method for manufacturing the organic EL display device 50 of this embodiment includes a TFT layer forming step, an organic EL element layer forming step, and a sealing film forming step.

[0044] <TFT Layer Forming Process> First, for example, an inorganic insulating film (having a thickness of about 1000 nm) such as a silicon oxide film is formed on a resin substrate 10 formed on a glass substrate by a plasma CVD (Chemical Vapor Deposition) method, thereby forming a base coat film 11.

[0045] Next, an amorphous silicon film (about 50 nm thick) is formed by plasma CVD over the entire substrate on which the base coat film 11 has been formed, and the amorphous silicon film is crystallized by laser annealing or the like to form a semiconductor film of polysilicon, and then the semiconductor film is patterned to form a first semiconductor layer 12 a, a second semiconductor layer 12 b, etc.

[0046] Thereafter, an inorganic insulating film (with a thickness of about 100 nm) such as a silicon oxide film is formed over the entire substrate on which the first semiconductor layer 12a and the like are formed, for example, by plasma CVD, to form a gate insulating film 13 so as to cover the first semiconductor layer 12a and the like.

[0047] Furthermore, an aluminum film (thickness: about 350 nm) and a molybdenum nitride film (thickness: about 50 nm) are formed in this order, for example, by sputtering, over the entire substrate on which the gate insulating film 13 has been formed, and then these metal stacked films (second metal films) are patterned to form the gate line 14 g, the first gate electrode 14 a, the second gate electrode 14 b, the lower conductive layer 14 c, the metal pattern 14 d, etc.

[0048] Next, using the first gate electrode 14a and the second gate electrode 14b as a mask, impurity ions are doped into the first semiconductor layer 12a and the second semiconductor layer 12b, thereby forming a first channel region, a first source region, and a first drain region in the first semiconductor layer 12a, and forming a second channel region, a second source region, and a second drain region in the second semiconductor layer 12b.

[0049] Thereafter, the first channel region, the first source region, and the first drain region are formed in the first semiconductor layer 12a, and the second channel region, the second source region, and the second drain region are formed in the second semiconductor layer 12b. An inorganic insulating film (with a thickness of about 100 nm) such as a silicon oxide film is then formed, for example, by plasma CVD, over the entire substrate, thereby forming a first interlayer insulating film 15.

[0050] Furthermore, an aluminum film (thickness: about 350 nm) and a molybdenum nitride film (thickness: about 50 nm) are sequentially formed, for example, by sputtering, over the entire substrate on which the first interlayer insulating film 15 is formed, and then these metal stacked films (third metal films) are patterned to form the upper conductive layer 16c, etc.

[0051] Next, an inorganic insulating film (about 500 nm thick) such as a silicon oxide film is formed by, for example, plasma CVD over the entire substrate on which the upper conductive layer 16c and the like are formed, thereby forming a second interlayer insulating film 17.

[0052] Thereafter, appropriate contact holes are formed in the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17, and then, for example, a titanium film (thickness: about 30 nm), an aluminum film (thickness: about 300 nm), and a titanium film (thickness: about 30 nm) are deposited in this order by a sputtering method to form a metal laminate film (first metal film), and then the metal laminate film is patterned to form a source line 18f, a power line 18g, a first source electrode 18a, a first drain electrode 18b, a second source electrode 18c, a second drain electrode 18d, a first frame wiring 18h, a second frame wiring 18i, and the like.

[0053] Finally, a polyimide-based photosensitive resin film (about 2 μm thick) is applied to the entire substrate on which the source lines 18 f and the like are formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed, and post-baked to form planarizing films 19 a and 19 d, an inner lower resin layer 19 b, an outer lower resin layer 19 c, and the like.

[0054] In this manner, the TFT layer 30 can be formed.

[0055] <Organic EL element layer forming process> First, on the surface of the substrate on which the planarizing film 19a and the like have been formed in the TFT layer forming process, an ITO film (thickness: about 10 nm), an Ag film (thickness: about 100 nm), an ITO film (thickness: about 10 nm), and the like are formed in this order by, for example, a sputtering method to form a conductive laminated film, and then the conductive laminated film is patterned to form the first electrodes 31a, the connection wiring 31b, and the like.

[0056] Next, a photosensitive acrylic resin (about 2 μm thick) is applied to the substrate surface on which the first electrode 31 a etc. is formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed and post-baked to form an edge cover 32 a, a peripheral photospacer 32 b, an inner upper resin layer 32 c, an outer upper resin layer 32 d etc.

[0057] Furthermore, on the surface of the substrate on which the edge cover 32a etc. are formed, a hole injection layer 1, a hole transport layer 2, a light emitting layer 3, an electron transport layer 4, and an electron injection layer 5 are sequentially formed by, for example, a vacuum deposition method to a thickness of about several tens of nm to 50 nm, thereby forming an organic EL layer 33.

[0058] Finally, an ITO film (about 100 nm thick) is formed by, for example, sputtering or vacuum deposition so as to cover the edge cover 32 a and each organic EL layer 33 , thereby forming the second electrode 34 .

[0059] In this manner, the organic EL element layer 40 can be formed.

[0060] <Sealing film forming process> First, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed by plasma CVD using a mask on the surface of the substrate on which the organic EL element layer 40 formed in the organic EL element layer forming process is formed, thereby forming a first inorganic sealing film 41.

[0061] Subsequently, an organic resin material such as an acrylic resin is ejected onto the substrate surface on which the first inorganic sealing film 41 has been formed, within the frame of the first damming wall Wa, by, for example, an inkjet method, to form an organic sealing film 42 .

[0062] Furthermore, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed on the substrate on which the organic sealing film 42 has been formed using a mask by plasma CVD to form a second inorganic sealing film 43, thereby forming a sealing film 45.

[0063] Finally, a protective sheet (not shown) is attached to the surface of the substrate on which the sealing film 45 is formed, and then laser light is irradiated from the glass substrate side of the resin substrate 10 to peel the glass substrate from the underside of the resin substrate 10, and further a protective sheet (not shown) is attached to the underside of the resin substrate 10 from which the glass substrate has been peeled.

[0064] In this manner, the organic EL display device 50 of this embodiment can be manufactured.

[0065] As described above, according to the organic EL display device 50 of this embodiment, the first frame wiring 18h provided in the frame region F so as to reach the terminal portion T is electrically connected to the power supply line 18g on the display region D side, and ELVDD is input at the terminal portion T. Furthermore, the second frame wiring 18i provided in the frame region F adjacent to the first frame wiring 18h so as to reach the terminal portion T is electrically connected to the second electrode 34 on the display region D side, and ELVSS is input at the terminal portion T. Further, on the first frame wiring 18h and the second frame wiring 18i, there are provided a first damming wall Wa including an inner lower resin layer 19b formed in the same layer and made of the same material as the planarizing film 19a and an inner upper resin layer 32c formed in the same layer and made of the same material as the edge cover 32a, and a second damming wall Wb including an outer lower resin layer 19c formed in the same layer and made of the same material as the planarizing film 19a and an outer upper resin layer 32d formed in the same layer and made of the same material as the edge cover 32a. Furthermore, the terminal portion T side of the first frame wiring 18h and the terminal portion T side of the second frame wiring 18i are covered with the second damming wall Wb and the separating planarizing film 19d. Here, the distance L between the first frame wiring 18h and the second frame wiring 18i on the terminal portion T side and the portion covered with the planarization film 19d is 500 μm or more, which makes it possible to suppress electrochemical corrosion due to the potential difference between the first frame wiring 18h and the second frame wiring 18i and to suppress the generation of voids C due to elution of the aluminum layer 7a. As a result, even if moisture penetrates the planarization film 19d from the outside, the penetration of moisture into the display region D via the first frame wiring 18h (and the second frame wiring 18i) is suppressed, thereby suppressing deterioration of the organic EL elements 35b.

[0066] Furthermore, according to the organic EL display device 50 of this embodiment, the first frame wiring 18h and the second frame wiring 18i are arranged on the terminal portion T side so that the opposing side ends are bent in an approximately N-shape in plan view. Therefore, even if moisture M penetrates the side ends of the first frame wiring 18h and the second frame wiring 18i, the penetration path becomes longer in the planar direction, and deterioration of the organic EL element 35b can be further suppressed.

[0067] Furthermore, in the organic EL display device 50 of this embodiment, on the terminal portion T side, the metal pattern 14d formed of the second metal film is provided on the resin substrate 10 side of the first frame wiring 18h and the second frame wiring 18i, via the first interlayer insulating film 15 and the second interlayer insulating film 17, so as to intersect with the side ends of the first frame wiring 18h and the second frame wiring 18i. As a result, even if moisture M penetrates the side ends of the first frame wiring 18h and the second frame wiring 18i, the penetration path is made longer in the cross-sectional direction by the metal pattern 14d, and deterioration of the organic EL element 35b can be further suppressed.

[0068] Other Embodiments In the first embodiment, the organic EL layer has a five-layer laminated structure including a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. However, the organic EL layer may have a three-layer laminated structure including, for example, a hole injection layer / hole transport layer, a light-emitting layer, and an electron transport layer / electron injection layer.

[0069] In addition, in the first embodiment described above, an organic EL display device in which the first electrode is an anode and the second electrode is a cathode is exemplified. However, the present invention can also be applied to an organic EL display device in which the layered structure of the organic EL layer is reversed, and the first electrode is a cathode and the second electrode is an anode.

[0070] Furthermore, in the first embodiment described above, an organic EL display device is exemplified in which the electrode of the TFT connected to the first electrode is used as the drain electrode, but the present invention can also be applied to an organic EL display device in which the electrode of the TFT connected to the first electrode is called the source electrode.

[0071] Furthermore, in the above-described first embodiment, an organic EL display device has been described as an example of the display device. However, the present invention can be applied to a display device including a plurality of light-emitting elements driven by current, and can be applied to, for example, a display device including QLEDs (Quantum-dot light emitting diodes), which are light-emitting elements using a quantum dot-containing layer.

[0072] As described above, the present invention is useful for flexible display devices.

[0073] D Display area F Frame area P Sub-pixel T Terminal portion W Damming wall Wa First damming wall Wb Second damming wall 10 Resin substrate (base substrate) 14d Metal pattern 15 First interlayer insulating film (inorganic insulating film) 17 Second interlayer insulating film (inorganic insulating film) 18g Power supply line 18h First frame wiring 18i Second frame wiring 19a, 19d Planarizing film 19b Inner lower resin layer 19c Outer lower resin layer 30 TFT layer (thin film transistor layer) 31a First electrode 32a Edge cover 32c Inner upper resin layer 32d Outer upper resin layer 33 Organic EL layer (organic electroluminescence layer, light-emitting functional layer) 34 Second electrode 35 Organic EL element (light-emitting element) 40 Organic EL element layer (light-emitting element layer) 41 First inorganic sealing film 42 Organic sealing film 43 Second inorganic sealing film 45 Sealing film 50 Organic EL display device

Claims

1. A base substrate; a thin film transistor layer provided on the base substrate, the thin film transistor layer being formed by sequentially laminating a first metal film and a planarization film made of an organic resin material; a light emitting element layer provided on the thin film transistor layer and having a plurality of light emitting elements, each having a first electrode, a light emitting functional layer, and a second electrode sequentially laminated thereon, corresponding to a plurality of subpixels constituting a display area; a sealing film provided on the light emitting element layer, the sealing film being formed by sequentially laminating a first inorganic sealing film, an organic sealing film, and a second inorganic sealing film; a power supply line provided in the display area and formed by the first metal film; a frame area provided around the display area; terminal portions provided at edges of the frame area so as to extend in one direction; and first frame wiring provided in the frame area by the first metal film so as to reach the terminal portions, the first frame wiring being electrically connected to the power supply line on the display area side, the terminal portion receiving a high power supply voltage. a second frame wiring provided by the first metal film in the frame region adjacent to the first frame wiring so as to reach the terminal portion, electrically connected to the second electrode on the display region side, and having a low power supply voltage input at the terminal portion; and a blocking wall provided in a frame shape in the frame region so as to overlap the peripheral edge of the organic sealing film, and including a resin layer formed in the same layer and made of the same material as the planarization film, wherein the terminal portion side of the first frame wiring and the terminal portion side of the second frame wiring are covered with the planarization film, and wherein the distance between the portions of the first frame wiring and the second frame wiring covered with the planarization film on the terminal portion side is 500 μm or more.

2. A display device according to claim 1, wherein the first frame wiring and the second frame wiring are arranged so that the opposing side ends on the terminal portion side are bent in a plan view.

3. A display device according to claim 1 or 2, wherein the thin film transistor layer is laminated in order with a second metal film, an inorganic insulating film, the first metal film and the planarizing film, and on the terminal portion side, a metal pattern formed by the second metal film is provided on the base substrate side of the first frame wiring and the second frame wiring, via the inorganic insulating film, so as to intersect with the side ends of the first frame wiring and the second frame wiring.

4. A display device according to any one of claims 1 to 3, characterized in that the blocking wall comprises a first blocking wall provided in a frame shape so as to overlap the peripheral edge of the organic sealing film, and a second blocking wall provided in a frame shape so as to surround the first blocking wall.

5. A display device according to claim 4, wherein the light-emitting element layer has an edge cover made of an organic resin material between the plurality of first electrodes and the light-emitting functional layer so as to cover the peripheral edge of each of the first electrodes; the first blocking wall comprises an inner lower resin layer formed in the same layer and made of the same material as the planarization film, and an inner upper resin layer formed in the same layer and made of the same material as the edge cover; and the second blocking wall comprises an outer lower resin layer formed in the same layer and made of the same material as the planarization film, and an outer upper resin layer formed in the same layer and made of the same material as the edge cover.

6. A display device according to any one of claims 1 to 5, wherein the first metal film is a metal laminate film in which a titanium-based metal film, an aluminum-based metal film, and a titanium-based metal film are laminated in this order.

7. The display device according to any one of claims 1 to 6, wherein the light-emitting functional layer is an organic electroluminescence layer.

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