Communication method and communication apparatus

Abstract

A communication method and a communication apparatus. The method comprises: determining the number of coding bits corresponding to information to be coded; and on the basis of the number of coding bits, determining the length of LDPC codewords. The length of the LDPC codewords and the number of coding bits meet the following condition: when the number of coding bits is within a first value range, the length of LDPC codewords is a first code length; or when the number of coding bits is within a second value range, if the number of coding bits is greater than or equal to the sum of a bit length corresponding to said information and the product of X and (1-R), the length of the LDPC codewords is the first code length; otherwise, the length of the LDPC codewords is a second code length, wherein R is a coding bitrate and X is a common multiple of denominators of all coding bitrates supported by a system. The longest LDPC code length supported by the system comprises 1944×n, where n is an integer greater than or equal to 2, and the first code length and the second code length are both less than or equal to 1944×n; and / or, X=Y+Zt, where Z is the least common multiple of the denominators of all the coding bitrates supported by the system, all the coding bitrates comprise 7 / 8, t is an integer greater than or equal to -2 and less than or equal to 2, and Y makes the proportion of check bits, which are punctured during coding, among all check bits lower than a first threshold.

Description

Communication method and communication device CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of the People's Republic of China on March 8, 2024, with application number 202410268825.5 and application name "A Communication Method and Communication Device", the entire contents of which are incorporated by reference into this application. Technical Field The present application relates to the field of communication technology, and in particular to a communication method and a communication device. Background Art Low-density parity-check (LDPC) codes offer high performance and low complexity, making them suitable for channel coding. LDPC code performance increases with code length, so the longest LDPC code is often chosen. However, the coding process includes puncturing (i.e., omitting the transmission of some parity bits). This puncturing increases the actual code rate and results in performance degradation. Therefore, choosing the longest LDPC code may result in lower error control performance. Determining the length of an LDPC codeword is an urgent task. Summary of the Invention Embodiments of the present application provide a communication method and a communication device for determining an LDPC code of appropriate length to improve error control performance. To achieve the above objectives, the present invention adopts the following technical solutions: In a first aspect, a communication method is provided. This method can be applied to a transmitting device. Taking the transmitting device as a first device as an example, the method is applied to the first device or a component (e.g., a circuit, chip, or chip system) in the first device. For ease of description, the following example uses the method applied to the first device. The method includes: a first device determines the number of coding bits corresponding to the information to be encoded, and determines the length of the LDPC codeword based on the number of coding bits. The information to be encoded includes data information and check information. The length of the LDPC codeword and the number of coding bits meet the following conditions: when the number of coding bits is within a first value range, the length of the LDPC codeword is the first code length; or, when the number of coding bits is within a second value range, if the number of coding bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, the length of the LDPC codeword is the first code length; otherwise, the length of the LDPC codeword is the second code length. The first value is the product of X and (1-R), R is the coding rate, and X is the common multiple of the denominator of all coding rates supported by the system. The maximum length of an LDPC codeword supported by the system is 1944×n, where n is an integer greater than or equal to 2, and the first code length and the second code length are both less than or equal to 1944×n; and / or, X=Y+Zt, where Z is the least common multiple of the denominators of all coding rates supported by the system, including 7 / 8, and t is an integer greater than or equal to -2 and less than or equal to 2. Y ensures that the proportion of parity bits punctured during the encoding process to all parity bits is lower than a first threshold. In a second aspect, another communication method is provided, which can be applied to a receiving device. Taking the receiving device as an example, the second device is used as the receiving device. The method is applied to the second device or a component (e.g., a circuit, chip, or chip system) in the second device. For ease of description, the following example uses the method applied to the second device. The method includes: a second device receives information from a first device; the second device performs stream parsing on the information to obtain at least one LDPC codeword; and the second device decodes the information according to the at least one LDPC codeword. The methods provided in the first and second aspects provide a method for determining the length of an LDPC codeword (referred to as the LDPC code length) for scenarios with longer LDPC code lengths (e.g., 1944×2) and / or more encoding rates (e.g., including 7 / 8). In scenarios with longer LDPC code lengths and / or more encoding rates, determining the LDPC code length using the methods provided in the embodiments of the present application can ensure that the proportion of parity bits punctured during the encoding process is below a certain threshold, thereby ensuring the error control performance of the LDPC code. In a possible implementation, the length of the LDPC codeword, the number of LDPC codewords N CW The number of coded bits N corresponding to the information to be coded avbits Certain relationships are satisfied between them, for example, including one or more relationships in one or more of the following examples. Example 1: When the longest length of the LDPC codeword supported by the system is 1944×n, the number of LDPC codewords is 1, the first value range and the first code length satisfy the following relationship: (third code length, fourth code length], the first code length is the longest LDPC code length supported by the system, where all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, and the fourth code length is the last to last LDPC code length after sorting. According to Example 1, the first value range is (1944×(n-1), 1944×n], and the first code length is 1944×n. In Example 1, when the longest code length of the LDPC code is at least 1944×2, N avbits When the LDPC code length is in the first value range (e.g., (1944×(n-1), 1944×n), the LDPC code length may be 1944×n. For example, when 1944<N avbits ≤3888, the number of LDPC codewords is 1, and the LDPC code length can be 3888. In this way, the proportion of parity bits punctured during the encoding process in all parity bits can be lower than a certain threshold (for example, 30%), thereby ensuring the better error control performance of the LDPC code. Example 2: When the maximum length of the LDPC codeword supported by the system is 1944×n, the number of LDPC codewords is the data bit length N corresponding to the information to be encoded. pld The first value range and the first code length satisfy any of the following relationships: the first value range is (third code length + fourth code length, +∞], and the first code length is the fourth code length; or, the first value range is (fourth code length - third code length, +∞], and the first code length is the fourth code length; or, the first value range is (fourth code length - fifth code length, +∞], and the first code length is the fourth code length. All LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, the fourth code length is the last-to-last LDPC code length after sorting, and the fifth code length is the third-to-last code length among the LDPC code lengths supported by the system. According to Example 2, it can be seen that: the second value range is (1944×(n+1), +∞], and the first code length is 1944×n; or, the second value range is (1944×(n-1), +∞], and the first code length is 1944×n; the second value range is (1944×(n+1)-648, +∞], and the first code length is 1944×n; or, the second value range is (1944×(n+2), +∞], and the first code length is 1944×n. The difference from Example 1 is that the number of LDPC codewords in Example 2 is N pld / 1944×n×R, N avbits 、N CWThe relationship between LDPC code length and LDPC code length. LDPC code lengths that satisfy any of the relationships in Example 2 can ensure better error control performance of LDPC codes. Example 3: When the maximum length of the LDPC codeword supported by the system is 1944×n, and Z=12, the number of LDPC codewords is 1, and the second value range and the first code length satisfy the following relationship: the second value range is (fifth code length, third code length], if the number of coded bits N avbits Greater than or equal to the bit length N corresponding to the information to be encoded pld The sum of the first value and the first code length is the longest LDPC code length supported by the system. All LDPC code lengths supported by the system are sorted from smallest to largest. The third code length is the second-to-last LDPC code length after sorting. The fifth code length is the third-to-last LDPC code length supported by the system. According to Example 3, when n=2, the second value range is (1944×(n+1)-648, 1944×(n-1)], X=2916+12t, and the first code length is 1944×n; or, when n=3, the second value range is (1944, 1944×2], X=5832+12t, and the first code length is 1944×n. Example 3 shows that based on N avbits and N pld A way to determine the LDPC code length. As mentioned above, when the longest code length of the LDPC code is at least 1944×n, when N avbits Located at [1944×(n+1)-648, 1944×(n-1)], X=2916+12t, the proportion of parity bits punctured during the encoding process in all parity bits can be made lower than a certain threshold (for example, 25%), thereby ensuring better error control performance of the LDPC code. Example 4: When the longest length of the LDPC codeword supported by the system is 1944×n, and Z=12, the number of LDPC codewords is 2, the second value range and the first code length satisfy the following relationship: the second value range is (fourth code length, fourth code length + third code length], if N avbits Greater than or equal to N pld The sum of the first value and the first code length is the longest LDPC code length supported by the system. All LDPC code lengths supported by the system are sorted from smallest to largest. The third code length is the second-to-last LDPC code length after sorting. The fourth code length is the last-to-last LDPC code length supported by the system. According to Example 4, when n=2, the second value range is [1944×n, 1944×(n+1)], X=1944×(n+1)+12t, and the first code length is 1944×n; or, when n=3, the second value range is [1944×n, 1944×(n+2)], X=1944×(n+2)+12t, and the first code length is 1944×n. The difference from Example 3 is that in Example 3, when the number of LDPC codewords is 2, N avbits 、N CW The relationship between LDPC code length and LDPC code length. LDPC code lengths that satisfy any of the relationships in Example 2 can ensure better error control performance of LDPC codes. Example 5: When the maximum length of the LDPC codeword supported by the system is 1944×n, and Z=12i, i is an integer greater than or equal to 2, the number of LDPC codewords is 1, and the second value range and the first code length satisfy the following relationship: the second value range is (fifth code length, third code length], if N avbits Greater than or equal to N pld and the sum of the first value, and X=Y+12i×t, the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fifth code length is the third-to-last code length among the LDPC code lengths supported by the system. According to Example 5, it can be seen that: the second value range includes (1944×(n+1)-648, 1944×(n-1)], X=Y+12i×t, and the first code length is 1944×n; among them, i=2 or 3, Y includes 2928; i=3, Y includes 2916; or, i=3, Y includes 2952. Example 5 provides N for the case where the longest code length of the LDPC code is at least 1944×2 and all coding rates supported by the system include at least 7 / 8. avbits 、N CW 、N pld and the LDPC code length to ensure better error control performance of the LDPC code. Example 6: The second value range and the first code length also satisfy the following relationship: the second value range includes (0, 648], X = Y + 12i × t, and the first code length is 1296; wherein, i = 2, Y includes 912; i = 3, Y includes 936; i = 6, Y includes 936; or, the second value range includes (648, 1296], X = Y + 12i × t, and the first code length is 1944; wherein, i = 2, Y includes 1363; i = 3, Y includes 1376; i = 6, Y includes 1512. Compared with Example 5, Example 6 further provides a method for determining the LPDC code length when the second value range is (0, 648] and (648, 1296] respectively. Example 7: When the longest length of the LDPC codeword supported by the system is 1944×n, and Z=12i, i is an integer greater than or equal to 2, the number of LDPC codewords is 2, and the second value range and the first code length satisfy the following relationship: the second value range is (fourth code length, fourth code length + third code length], X=Y+12i×t, and the first code length is the fourth code length; or, the second value range is (third code length, fourth code length - third code length], X=Y+12i×t, and the first code length is the third code length. Among them, all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, and the fourth code length is the last code length among the LDPC code lengths supported by the system. According to Example 7, it can be seen that: the second value range is (1944×n, 1944×(n+1)], X=Y+12i×t, and the first code length is 1944×n; or, the second value range is (1944×n, 1944×(n+1)-648], X=Y+12i×t, and the first code length is 1944×(n-1). The difference from Example 5 is that in Example 7, when the number of LDPC codewords is 2, N avbits 、N CW 、N pld The relationship between LDPC code length and LDPC code length. LDPC code lengths that satisfy any of the relationships in Example 7 can ensure better error control performance of LDPC codes. On the third aspect, an embodiment of the present application provides a communication device, which has the function of implementing the behavior in the method example of the first aspect or the second aspect above. The beneficial effects can be found in the relevant description of the first aspect or the second aspect and will not be repeated here. For example, the communication device can be the first device in the first aspect, or the communication device can be a device that can support the first device to implement the functions required by the method provided by the first aspect, for example, the communication device can be a chip or chip system in the first device. For example, the communication device can be the second device in the second aspect, or the communication device can be a device that can support the second device to implement the functions required by the method provided by the second aspect, for example, the communication device can be a chip or chip system in the second device. In one possible design, the communication device includes a wireless fidelity (WIFI) chip. In one possible design, the communication device includes corresponding means (means) or modules for executing the method of the first aspect. For example, the communication device: includes a processing unit (sometimes also referred to as a processing module or processor) and / or a transceiver unit (sometimes also referred to as a transceiver module or transceiver). The transceiver unit can realize the sending function and the receiving function. When the transceiver unit realizes the sending function, it can be called a sending unit (sometimes also referred to as a sending module). When the transceiver unit realizes the receiving function, it can be called a receiving unit (sometimes also referred to as a receiving module). The sending unit and the receiving unit can be the same functional unit, which is called a transceiver unit, and the functional unit can realize the sending function and the receiving function; or, the sending unit and the receiving unit can be different functional units, and the transceiver unit is a general term for these functional units. These units (modules) can perform the corresponding functions in the method examples of the first aspect or the second aspect above. Please refer to the detailed description in the method examples for details, which will not be repeated here. In a fourth aspect, an embodiment of the present application provides a communication device, which may be the communication device in the third aspect of the above embodiment, or a chip or chip system provided in the communication device in the third aspect. The communication device includes a communication interface and a processor, and optionally, also includes a memory. The memory is used to store computer programs or instructions or data, and the processor is coupled to the memory and the communication interface. When the processor reads the computer program or instructions or data, the communication device executes the method executed by the first device in the above method embodiment. For example, the communication device may be the first device or a functional module in the first device, such as a WIFI chip. Alternatively, when the processor reads the computer program or instructions or data, the communication device executes the method executed by the second device in the above method embodiment. For example, the communication device may be the first device or a functional module in the second device, such as a WIFI chip. In a fifth aspect, an embodiment of the present application provides a chip system, which includes a processor and may also include a communication interface for implementing the method described in the first aspect or the second aspect. Optionally, the chip system also includes a memory. The memory is used to store computer programs (also referred to as codes, or instructions). The processor is used to call and run the computer program from the memory so that the device equipped with the chip system executes the method in the first aspect or the second aspect and any possible implementation thereof. The chip system can be composed of chips, or it can include chips and other discrete devices. In a sixth aspect, embodiments of the present application provide a communication device comprising an input / output interface and a logic circuit. The input / output interface is used to input and / or output information. The input / output interface can be an interface circuit, an output circuit, an input circuit, a pin, or related circuits. The logic circuit is used to execute the method described in the first or second aspect. In a specific implementation, the communication device may be a chip, the input circuit may be an input pin, the output circuit may be an output pin, and the logic circuit may be a transistor, a gate circuit, a trigger, or various logic circuits. The input signal received by the input circuit may be, for example, but not limited to, received and input by a receiver, and the signal output by the output circuit may be, for example, but not limited to, output to and transmitted by a transmitter. The input circuit and the output circuit may be the same circuit, which functions as an input circuit and an output circuit, respectively, at different times. This application does not limit the specific implementation of the input and output interfaces and logic circuits. In one implementation, when the communication device is a wireless communication device, the wireless communication device may be a terminal device such as a mobile phone, or a network device such as a base station; or a Wi-Fi device such as a router. The interface circuit may be a radio frequency processing chip in the wireless communication device, and the processing circuit may be a baseband processing chip in the wireless communication device. In a seventh aspect, an embodiment of the present application provides a communication system, comprising a first device and a second device, wherein the first device is configured to implement the functions of the method described in the first aspect and can encode information to be encoded and then transmit it to the second device. The second device is configured to implement the functions of the method described in the second aspect and can decode information from the first device to obtain the information to be encoded. In an eighth aspect, an embodiment of the present application provides a computer-readable storage medium, which is used to store computer programs or instructions. When the computer-readable storage medium is executed, the method described in the above-mentioned first aspect or second aspect and any one of its implementation methods is implemented. In a ninth aspect, an embodiment of the present application further provides a computer program product comprising instructions, which, when executed on a computer, enables the method described in the first aspect or the second aspect and any one of its implementations to be implemented. The beneficial effects of the above-mentioned second to ninth aspects and their implementation methods can refer to the beneficial effects of the first aspect and any one of its implementation methods. BRIEF DESCRIPTION OF THE DRAWINGS FIG1 is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application; FIG2A is a schematic diagram of an LDPC code check matrix provided in an embodiment of the present application; FIG2B is a Tanner graph of an LDPC code provided in an embodiment of the present application; FIG3A is a schematic diagram of a parity check matrix of an LDPC code with a code rate of 1 / 2 and a code length of 648 provided in an embodiment of the present application; FIG3B is a schematic diagram of a cyclic shift matrix P1 provided in an embodiment of the present application; FIG4 is a schematic diagram of an LDPC encoding process in a WLAN provided by an embodiment of the present application; FIG5 is a flow chart of a communication method according to an embodiment of the present application; FIG6 is a schematic structural diagram of a communication device provided in an embodiment of the present application; FIG7 is another schematic diagram of the structure of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION In anticipation of the potential introduction of longer LDPC code lengths and / or higher encoding rates in the future, embodiments of this application propose a method for determining the LDPC code length. This solution can mitigate performance losses caused by selecting an inappropriate LDPC code length and improve the error control performance of LDPC codes. The LDPC code length, or the length of an LDPC codeword, can be referred to as the LDPC codeword length or simply the LDPC code length. The technical solution provided in the embodiments of the present application is applicable to local area networks (LANs), in particular wireless local area networks (WLANs), for example, WLANs that adopt any one of the 802.11 series protocols of the Institute of Electrical and Electronics Engineers (IEEE). Among them, the WLAN may include one or more basic service sets (BSSs), and the network nodes in the basic service set include access points (APs) and stations (STAs). The embodiments of the present application can also be applied to wireless local area network systems that support the IEEE 802.11ax next-generation wireless fidelity (Wi-Fi) protocol, such as 802.11be, 802.11bn, Wi-Fi AI and other 802.11 series protocols, and can also be applied to wireless personal area network systems based on ultra-wide band (UWB), and sensing systems. The embodiments of the present application may also be applicable to communication systems related to the 3rd Generation Partnership Project (3GPP), such as long term evolution (LTE), the sixth generation (5G) mobile communication system (such as the new radio (NR) communication system), or may also be applied to other next generation mobile communication systems, such as the sixth generation (6G) communication system, or other similar communication systems. Other similar communication systems may include device-to-device (D2D), WIFI, Internet of Vehicles, Internet of Things (IoT) systems, narrowband Internet of Things (NB-IoT) systems, and the like. Internet of Vehicles, such as vehicle to everything (V2X), vehicle to vehicle (V2V), etc., may be used in communication systems such as intelligent driving, assisted driving, or intelligent connected vehicles. Please refer to Figure 1, which shows a communication system applicable to embodiments of the present application. The communication system includes a first device and a second device. The first device and the second device are capable of communicating, for example, the first device is a data transmitter and the second device is a data receiver. The first device may perform operations such as encoding on the data when transmitting it, and the second device may perform operations such as decoding on the data after receiving it from the first device. The embodiments of the present application do not limit the types of the first device and the second device. For example, the first device may be a network device, and correspondingly, the second device may be a terminal device or a network device; or, the first device may be a terminal device, and the second device may be a network device or a terminal device. The network device in the embodiments of the present application may be a radio access network (RAN) node, and the RAN node may be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next-generation NodeB (gNB), a next-generation base station in a 6G mobile communication system, a base station in a future mobile communication system, etc. The RAN node may be a macro base station, a micro base station, an indoor station, a relay node, a donor node / host node, or a wireless controller, etc. The RAN node may also be a server, a wearable device, a vehicle or an on-board device, etc. For example, the RAN node in V2X technology may be a road side unit (RSU). Among them, the AP is equivalent to a bridge connecting the wired network and the wireless network. Its main function is to connect various wireless network clients together and then connect the wireless network to the Ethernet. The AP serves as the hub of the communication system and can be a base station, router, gateway, repeater, communication server, switch, bridge, or other communication device equipped with a Wi-Fi chip. The AP can support WLAN standards such as 802.11be or its successor, such as Wi-Fi 8. The AP can also support WLAN standards such as 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, and 802.11a. Terminal devices, also known as terminals, user equipment (UE), mobile stations, or mobile terminals, etc. In the embodiments of the present application, anything that can communicate data with a base station can be considered a terminal device. Terminal devices can be widely used in various scenarios, such as D2D communication, V2X communication, machine-type communication (MTC), IoT, virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grid, smart furniture, smart office, smart wearables, smart transportation, or smart cities. For example, terminal devices can be: mobile phones, computers, mobile internet devices (MIDs), stations (STAs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, robotic arms, cameras, robots, or smart home devices (such as TVs, air conditioners, vacuum cleaners, speakers, set-top boxes), relays, customer premise equipment (CPE), vehicles, drones, helicopters, airplanes, ships, robots, robotic arms, smart home devices, etc. The embodiments of the present application do not limit the specific technology and specific device form adopted by the terminal device. Among them, STA can be a mobile phone that supports Wi-Fi communication function, a tablet computer that supports Wi-Fi communication function, a set-top box that supports Wi-Fi communication function, a smart TV that supports Wi-Fi communication function, a smart wearable device that supports Wi-Fi communication function, a vehicle-mounted communication device that supports Wi-Fi communication function, and a computer that supports Wi-Fi communication function, etc. STA can be a router, a switch, a bridge, etc. STA can support the 802.11be standard, and can also support multiple WLAN standards of the 802.11 family such as 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, 802.11a, 802.11be, Wi-Fi 7, Wi-Fi 8 or its next generation. The various terminal devices introduced above, if located on a vehicle (for example, placed / installed in a vehicle), can be considered as vehicle-mounted terminal devices. The vehicle-mounted terminal device can be an on-board module, on-board module, on-board component, on-board chip or on-board unit built into the vehicle as one or more components or units, and the vehicle can implement the method of the present application through the built-in on-board module, on-board module, on-board component, on-board chip or on-board unit. The on-board terminal device can be a complete vehicle device, an on-board module, a vehicle, an on-board unit (OBU), a roadside unit (RSU), a vehicle-mounted system (or a vehicle-mounted sending unit) (telematics box, T-box), a chip or a system on chip (SOC), etc. The above chip or SOC can be installed in a vehicle, OBU, RSU or T-box. To facilitate understanding of the solutions provided in the embodiments of this application, a brief introduction is first given to some relevant contents, terms or nouns involved in this application. 1. LDPC Code The check matrix of the LDPC code is a sparse matrix, that is, the number of non-zero elements in the matrix is ​​much smaller than the number of zero elements, or the ratio of the row weight to the code length and the ratio of the column weight to the code length of the matrix are both very small values. LDPC codes can be represented by a graph, which is called a Tanner graph. The Tanner graph corresponds one-to-one to the check matrix and consists of two types of nodes: the first type of node represents the codeword symbol, called a variable node; the second type of node represents the check constraint relationship, called a check node, and each check node represents a check constraint relationship. For example, as shown in Figures 2A and 2B, Figure 2A is a schematic diagram of the LDPC code check matrix provided in an embodiment of the present application, and Figure 2B is a Tanner graph of the LDPC code provided in an embodiment of the present application. In Figures 2A and 2B, {V i} represents a variable node set, {C i} represents the check node set. The LDPC code used in the 802.11ac / ax standard is a quasi-cyclical LDPC (QC-LDPC) code. QC-LDPC codes are a type of widely used structured LDPC code. Due to the unique structure of its parity check matrix, it can be implemented using a simple feedback shift register during encoding, so it can better solve the coding complexity problem of LDPC codes. Referring to Figure 3A, Figure 3A is a schematic diagram of an LDPC code parity check matrix with a code rate of 1 / 2 and a code length of 648 provided in an embodiment of the present application. As shown in Figure 3A, each element in the LDPC code parity check matrix with a code length of N = 648 and a code rate of R = 1 / 2 represents a square matrix of order Z = N / 24, where "0" represents a Z×Z unit matrix and "-" represents a Z×Z all-zero matrix. For example, the element "22" in Figure 3A represents the Z×Z unit matrix P cyclically shifted 22 bits to the right to obtain the cyclic shift matrix P22. The other non-zero elements in Figure 3A are similar to the element "22" and are not described in detail one by one. Where Pi represents a cyclic shift matrix, and i (0≤i≤Z-1) represents a cyclic shift value. Referring to Figure 3B , Figure 3B is a schematic diagram of a cyclic shift matrix P1 provided in an embodiment of the present application. As shown in Figure 3B , cyclic shift matrix P1 represents a Z×Z unit matrix P cyclically shifted right by 1 bit. 2. Determine the LDPC code length L LDPC Process Existing WLAN standards (such as 802.11n / ac) use orthogonal frequency division multiplexing (OFDM) technology. The LDPC encoding module needs to encode data bits (also known as payload bits) and place them into an integer number of OFDM symbols. These encoded bits must also fit into an integer number of LDPC codewords. Therefore, before transmission, it is necessary to calculate the minimum number of OFDM symbols N required for this transmission. SYM , and then calculate the total number of coded bits N that can be stored in all OFDM symbols based on NSYM and the current coding and modulation scheme avbits =N CBPS ×N SYM , where NCBPS represents the number of coded bits that can be stored in each OFDM symbol. Then, according to the total number of coded bits N avbits Determine the LDPC code length LLDPC used in the current transmission and the number of codewords N required CWHowever, for most encoded data bit lengths and coding modulation schemes, there are not enough data bits to fill the information bit positions in the LDPC codeword. Therefore, a shortening operation is required before generating the parity bits. The shortening operation refers to filling the information bit positions of the LDPC codeword with a certain number of zeros before the LDPC code generates the parity bits, and then deleting these zeros after the LDPC code generates the parity bits. Referring to Figure 4, which is a schematic diagram of an LDPC encoding process in a WLAN according to an embodiment of the present application, the LDPC encoding process in a WLAN includes at least steps 1 to 6. Step 1: Determine the data bits to be encoded, such as payload bits. Step 2: Determine the length L of the LDPC codeword LDPC and the number of codewords N CW , to determine the LDPC codeword, and the specific determination method is described below. Step 3: Shorten the data bits to be encoded, that is, fill in the shortened zero bits after the data bits to be encoded. Step 4: Use the LDPC code check matrix to encode the data bits to be encoded and the shortened 0 bits in each LDPC codeword to generate parity bits, and then delete these shortened 0 bits. Step 5: Repeat some of the data bits to be encoded in the LDPC codeword or puncture the check bits in the LDPC codeword so that the processed (punctured or repeated) codeword bits just fill the OFDM symbol to be transmitted. In other words, the number of codeword bits after processing (puncturing or repeating) is equal to the number of bits that the OFDM symbol can carry. Step 6: Concatenate multiple codewords and perform stream parsing.

[0114] In this application, "LDPC code length" refers to the length of an LDPC codeword (LDPC code word length), and "LDPC code length", "LDPC code word length", and "LDPC code word length" can be used interchangeably. Among them, step 2 is to determine the length L of the LDPC codeword LDPC and the number of codewords N CW The process includes the following steps 21 to 23. Step 21: Calculate the minimum number of OFDM symbols N required for this transmissionSYM . Under 802.11ac / ax and other standards, N SYM satisfy: Among them, m STBC Indicates the space-time coding mode of the data packet (the value is 1 when space-time coding is not used, otherwise it is 2); N DBPS Indicates the number of data bits carried by each OFDM symbol; length refers to the length of the data packet (in bytes). Considering the cyclic redundancy check (CRC) bits required for this data transmission (for example, 16 bits), the data bit length N required for this data transmission is pld Satisfied: N pld =length×8+16. Under the 802.11n standard, Among them, APEP_LENGTH is the parameter APEP_LENGTH in TXVECTOR, N service Refers to the number of bits in the service field. The data bit length N of this data transmission pld Satisfied: N pld =N SYM,init ×N DBPS . Step 22: According to N SYM and the coding modulation scheme to determine N SYM The number of coded bits N that can be stored in an OFDM symbol avbits . Under 802.11ac / ax and other standards, N avbits =N CBPS ×N SYM ; Under the 802.11n standard, N avbits =N SYM,init ×N CBPS ; Among them, N CBPS The number of coded bits that can be stored in each OFDM symbol. Step 23: According to N avbits Determine the LDPC code length L required for this transmission LDPC and the number of codewords N required CW . Generally, longer LDPC code lengths improve error control performance, so longer LDPC codes should be selected whenever possible. However, LDPC codes require puncturing after encoding. This puncturing operation can be understood as not transmitting a number of parity bits at the end of the encoded bits. This puncturing operation increases the actual bit rate, resulting in a certain performance loss. The performance loss caused by puncturing varies for LDPC codes of different code lengths. Therefore, when selecting the code length of an LDPC code, it is also necessary to consider the actual number of punctured bits. For example, L can be determined according to Table 1 below: LDPC and N CW Table 1 supports three code lengths: 648, 1296, and 1944 bits. Each code length supports three different encoding rates: 1 / 2, 2 / 3, 3 / 4, and 5 / 6. R in Table 1 is the encoding rate. Table 1 Each row in Table 1 can be considered as a criterion or a condition for determining the LDPC code length. avbits <=648, if N avbits =N pld +912×(1-R), when the LDPC code length is 1296 bits, the proportion of punctured parity bits in all parity bits is approximately 0.296 (no more than 30%). avbits ≥N pld +912×(1-R), an LDPC code with a code length of 1296 bits can be selected to obtain better error control performance. avbits <N pld When the error is +912×(1-R), when the LDPC code length is 1296 bits, the proportion of punctured parity bits in all parity bits exceeds 0.296, and the error control performance of the LDPC code is low. An LDPC code with a code length of 648 bits should be selected. Similarly, when 648 <N avbits <=1296, if N avbits =N pld +1363×(1-R), when the LDPC code length is 1944 bits, the proportion of punctured parity bits in all parity bits is about 0.237 (no more than 25%). avbits ≥N pld +1363×(1-R), an LDPC code with a code length of 1944 bits can be selected to obtain better error control performance. On the contrary, when N avbits <N pld+1363×(1-R), when the LDPC code length is 1944 bits, the proportion of punctured parity bits in all parity bits exceeds 0.273, and the error control performance of the LDPC code is low. An LDPC code with a code length of 1296 bits should be selected. When 1944 <N avbits <=2592, if N avbits =N pld +2916×(1-R), when the LDPC code length is 1944 bits, the proportion of punctured parity bits in all parity bits is about 0.25 (25%). avbits ≥N pld +2916×(1-R), an LDPC code with a code length of 1944 bits can be selected to obtain better error control performance. avbits <N pld When the error is +2916×(1-R), when the LDPC code length is 1944 bits, the proportion of punctured parity bits in all parity bits exceeds 0.25, and the error control performance of the LDPC code is low. An LDPC code with a code length of 1296 bits should be selected. The sender determines L LDPC and N CW , according to L LDPC and N CW The 802.11ac / ax standard defines 12 LDPC code parity check matrices. In the future, longer LDPC code lengths may be supported. For example, LDPC codes with a code length of 1944 × n bits may be supported, where n is an integer greater than or equal to 2. In this case, the criteria for determining the LDPC code length shown in Table 1 are no longer appropriate. Higher coding rates may also be supported in the future, such as R = 7 / 8 or 8 / 9. In this case, the criteria for determining the LDPC code length shown in Table 1 are also no longer appropriate. In view of this, in the embodiment of the present application, the number of coded bits N corresponding to the information to be coded can be avbits Determine the LDPC code length, for example, when N avbits In the first value range, the LDPC code length is the first code length. In the embodiment of the present application, the number of coded bits N corresponding to the information to be coded may also be used. avbits The data bit length N corresponding to the information to be encoded pld Determine the LDPC code length. For example, when N avbits is in the second value range, and N avbits ≥N pld+X×(1-R), the LDPC code length is the first code length; otherwise, the LDPC code length is the second code length. R is the encoding rate, and X is the common multiple of the denominators of all encoding rates supported by the system. It is understood that both the first code length and the second code length are less than or equal to the longest LDPC code length supported by the system. Optionally, the second code length is less than the first code length and has the smallest difference with the first code length. For future support of longer code lengths, such as code lengths greater than 1944, the first code length / second code length determined in the above manner can ensure that the proportion of parity bits punctured during the encoding process is below a certain threshold, thereby improving the error control performance of the LDPC code. This threshold is related to the error control performance of the LDPC code. For example, when the error control performance of the LDPC code is excellent, the threshold is less than or equal to 30% or 25%. The solution provided by the embodiments of the present application is described in detail below with reference to the accompanying drawings. In order to facilitate the clear description of the technical solution of the present application, the present application is described through multiple embodiments (such as Example 1 and Example 2), and specific references are made below. In the present application, unless otherwise specified, the same or similar parts between the various embodiments or implementations can refer to each other. In the various embodiments of the present application, and the various implementation methods / implementation methods / implementation methods in each embodiment, if there is no special explanation and logical conflict, the terms and / or descriptions between different embodiments and the various implementation methods / implementation methods / implementation methods in each embodiment are consistent and can be referenced to each other, and the technical features in different embodiments and the various implementation methods / implementation methods / implementation methods in each embodiment can be combined to form new embodiments, implementation methods, implementation methods, or implementation methods according to their inherent logical relationships. The implementation methods of the present application described below do not constitute a limitation on the scope of protection of the present application. It should be understood that the order of the following embodiments does not represent the degree of importance. In the following description, the method provided in the embodiment of the present application is applied to the network architecture shown in Figure 1 as an example. The network architecture and application scenarios described in the embodiment of the present application are intended to more clearly illustrate the technical solutions of the embodiment of the present application and do not constitute a limitation on the technical solutions provided in the embodiment of the present application. Those skilled in the art will appreciate that, with the evolution of network architecture and the emergence of new application scenarios, the technical solutions provided in the embodiment of the present application are equally applicable to similar technical problems. In the embodiments of this application, "when," "if," and "if" all indicate that the device will perform a corresponding action under certain objective circumstances. They do not limit the time, do not require the device to perform a judgment action when implemented, and do not imply any other limitations. Unless otherwise specified, "if" and "if" are interchangeable, and "when" and "under the circumstances" are interchangeable. "When" and "if" are interchangeable. In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner. In the embodiments of the present application, the number of nouns, unless otherwise specified, means "singular noun or plural noun", that is, "one or more". "At least one" means one or more, and "plural" means two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. For example, A / B means: A or B. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c means: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, c can be single or multiple. In the embodiments of this application, ordinal numbers such as "first" and "second" are used to distinguish between multiple objects and are not used to limit the size, content, order, timing, priority, or importance of the multiple objects. For example, a first bit length and a second bit length refer to two different bit lengths, but do not indicate a difference in priority or importance between the two bit lengths. The following describes the method provided in the embodiment of the present application as performed by the first device and the second device as an example, from the perspective of the interaction between the first device and the second device. The first device is a transmitting device, and the second device is a receiving device. The first device and the second device are both devices that support the WLAN standard, or the first device and the second device may also be devices that both support the ultra wide band (UWB) standard. The steps performed by the first device may be implemented by the first device itself, or by a component in the first device (such as a processing chip or a processor module). For example, the first device is an AP, and the steps performed by the first device may be performed by the AP itself, or by a WIFI chip in the AP. Similarly, the steps performed by the second device may be implemented by the second device itself, or by a component in the second device (such as a processing chip or a processor module). Please refer to Figure 5, which is a schematic flow chart of a communication method provided in an embodiment of the present application. Figure 5 describes the method from the perspective of interaction between a first device and a second device. The first device is, for example, an AP, and the second device is, for example, a STA; alternatively, the first device is a STA, and the second device is an AP. Alternatively, the first device is a Wi-Fi chip, and the second device is a Wi-Fi chip or a device including a Wi-Fi chip. As shown in Figure 5, the method flow includes the following steps. S501: The first device encodes information to be encoded according to the length of the LDPC codeword and the number of codewords. The information to be encoded refers to the information before channel coding. For example, the information to be encoded includes the data information to be sent and the check information required to send the data information. For example, the length of the data packet to be sent is length bytes, and the percentage of the check information required to send the data information is 16. Then the data bit length N of the information to be encoded is pld =length×8+16. Before encoding the information to be encoded according to the length and number of LDPC codewords, the first device needs to determine the number of coded bits corresponding to the information to be encoded. For example, as mentioned above, the minimum number of OFDM symbols N required to transmit the information to be encoded is SYM satisfy: or, Assume that the number of coded bits that can be stored in each OFDM symbol is N CBPS , then the number of coded bits corresponding to the information to be coded is N avbits Satisfied: N avbits =N CBPS ×N SYM ; or, N avbits =N SYM,init ×N CBPS . Subsequently, the first device determines the length of the LDPC codeword (i.e., the LDPC code length) according to the number of coded bits, including the following two implementations (i.e., implementation method 1 and implementation method 2 below), which are described below. In the following description, different first code lengths may correspond to different first thresholds. For example, N avbits ≥N pld +X×(1-R), the LDPC code length is the first code length, and the first threshold is less than or equal to 30%; when N avbits is in the second value range, and N avbits ≥N pld +X×(1-R), the LDPC code length is the first code length, and the first threshold is less than or equal to 25%. For another example, when N avbits is in the second value range, and N avbits≥N pld When ∑x=1+X×(1-R), the LDPC code length is the first code length, and the first threshold corresponding to different Xs may also be different. Implementation method 1: LDPC code length and number of coding bits N avbits Related. According to the longest LDPC code length supported by the system and the number of LDPC code words, N avbits The first code length may also be different depending on the first value range. The first value range may be one of multiple value ranges divided according to multiple code lengths supported by the system. The end value of one or more value ranges in the multiple value ranges may be one code length or multiple code lengths. For example, the LDPC code lengths supported by the system include 648, 1296, 1944, and 3888, and the multiple value ranges include (0, 648], (648, 1296], (1296, 1944], (1944, 3888], (3888, 3888+1944], (3888+1944, +∞], etc. For another example, the LDPC code lengths supported by the system include 648, 1296, 1944, 3888, and 7776, and the multiple value ranges include (0, 648], (648, 1296], (1296, 1944], (1944, 3888], (3888, 7776], (7776, 7776+3888], (7776+3888, +∞], etc. Embodiment 1 includes Case 11 and Case 12. In Case 11 and Case 12, the longest LDPC code length supported by the system is greater than 1944. For example, the longest code length supported by the system is 1944×2 (i.e., 3888), and the system supports four code lengths in total: 648, 1296, 1944, and 3888. For another example, the longest code length supported by the system is 1944×4 (i.e., 7776), and the system supports five code lengths in total: 648, 1296, 1944, 3888, and 7776. In the following description, all LDPC code lengths supported by the system are sorted from smallest to largest. The third code length is the second-to-last LDPC code length, the fourth code length is the first-to-last LDPC code length, and the fifth code length is the third-to-last LDPC code length. For example, if the longest LDPC code length supported by the system is 3888, the third code length is 1944, the fourth code length is 3888, and the fifth code length is 1296. For another example, if the longest LDPC code length supported by the system is 7776, the third code length is 3888, the fourth code length is 7776, and the fifth code length is 1944. Case 11: The number of LDPC codewords is 1. In one implementation, the first value range and the first code length satisfy the following relationship: the first value range is (third code length, fourth code length], and the first code length is the longest LDPC code length supported by the system. According to case 11, the first value range is (1944×(n-1), 1944×n], and the first code length is 1944×n. For example, n=2, that is, the longest LDPC code length supported by the system is 1944×2. When N avbits Located at (1944×(2-1), 1944×2] (ie (1944, 3888]), the first code length is 3888. For another example, n=4, that is, the longest LDPC code length supported by the system is 1944×4. When N avbits Located at (1944×2, 1944×4] (i.e. (3888, 7776]), the first code length is 7776. The first code length determined according to the implementation method in case 11 can ensure that the proportion of punctured parity bits in all parity bits does not exceed the first threshold. avbits When the first code length is 3888, the punctured parity bits account for no more than 30% of all parity bits. avbits When located at (3888, 7776]], the first code length is 7776, and the proportion of punctured parity bits in all parity bits does not exceed 25%. Therefore, determining the LDPC code length through the above two implementation methods can achieve better error control performance. Case 12: The number of LDPC codewords is N pld / (1944×n×R). In one implementation, the first value range and the first code length satisfy the following relationship: the first value range is (third code length+fourth code length, +∞], and the first code length is the third code length. According to this implementation, the first value range is (1944×n+1944), [+∞], and the first code length is 1944×n; or the first value range is (1944×n+3888, [+∞], and the first code length is 1944×n. For example, if n=2, the first value range includes (1944×n+1944), [+∞], and the first code length is 1944×n. That is, if n=2, N avbits Located at (5832, +∞], the first code length is 3888. For another example, n=4, the first value range includes (1944×n+3888), +∞], and the first code length is 1944×n. That is, n=4, N avbits Located at (11664, +∞], the first code length is 3888. In one implementation, the first value range and the first code length satisfy the following relationship: the first value range is (fourth code length-third code length, +∞], and the first code length is the fourth code length. According to this implementation, the first value range is (1944×n-1944), +∞], and the first code length is 1944×n. For example, if n=2, the first value range includes (1944×n-1944), +∞], and the first code length is 1944×n. That is, n=2, N avbits Located at (1944, +∞], the first code length is 3888. In one implementation, the first value range and the first code length satisfy the following relationship: the first value range is (fourth code length-fifth code length, +∞], and the first code length is the fourth code length. According to this implementation, the first value range is (1944×n-1296), +∞], and the first code length is 1944×n. For example, if n=2, the first value range includes (1944×n-1296), +∞], and the first code length is 1944×n. That is, n=2, N avbits Located at (2592, +∞], the first code length is 3888. The first code length determined according to any of the three implementation methods in Case 12 can ensure that the proportion of punctured check bits in all check bits does not exceed the first threshold, thereby achieving better error control performance. It should be noted that the LDPC code length determination method shown in Cases 11 and 12 is applicable not only to the system-supported coding rates of 1 / 2, 2 / 3, 3 / 4, and 5 / 6, but also to the case where new coding rates are added. For example, if the system supports all coding rates including 1 / 2, 2 / 3, 3 / 4, and 5 / 6, but also includes other coding rates (such as 7 / 8 and / or 8 / 9), the LDPC code length can be determined according to the method shown in Cases 11 and 12. Implementation method 2: LDPC code length and N avbits and N pld Related. In the second implementation, when N avbits is in the second value range, and N avbits ≥N pld +X×(1-R), the LDPC code length is the first code length; otherwise, the LDPC code length is the second code length. The second value range is similar to the first value range and is also one of multiple value ranges divided according to the various code lengths supported by the system. For details, please refer to the relevant content in the aforementioned implementation method 1 and will not be repeated here. R is the encoding rate. If the encoding rate is expressed in fractional form, then X is the common multiple of the denominators of all encoding rates supported by the system. For example, if the encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, and 5 / 6, then X is a common multiple of 12. For another example, if the encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, and 7 / 8, then X is a common multiple of 24; if the encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, 7 / 8, and 8 / 9, then X is a common multiple of 72. It should be noted that if the encoding rate is expressed in fractional form, the encoding rate can be converted into fractional form. Exemplarily, X satisfies: X=Y+Zt, where Z is the least common multiple of the denominators of all encoding rates supported by the system. For example, if all encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, and 7 / 8, Z is 24; if the encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, 7 / 8, and 8 / 9, Z can be 72. Here, t is an integer greater than or equal to -2 and less than or equal to 2, and Y ensures that the proportion of parity bits punctured during the encoding process to all parity bits is lower than a first threshold. Implementation method 2 includes case 21, case 22, case 23, and case 24. Among them, case 21 and case 22 take the case where all coding rates supported by the system are 1 / 2, 2 / 3, 3 / 4, and 5 / 6 (i.e., Z=12), and the longest LDPC code length supported by the system includes 1944×n, where n is an integer greater than or equal to 2. Case 23 and case 24 take the case where all coding rates supported by the system include other coding rates in addition to 1 / 2, 2 / 3, 3 / 4, and 5 / 6, and the longest LDPC code length supported by the system includes 1944×n, where n is an integer greater than or equal to 2. Among them, other coding rates include, for example, 7 / 8 and / or 8 / 9, etc., that is, Z=12i, where i is an integer greater than or equal to 2. For example, if all encoding bit rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, and 7 / 8, Z=23, that is, i=2; for another example, if all encoding bit rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, 7 / 8, and 8 / 9, Z=36, that is, i=3. Case 21: The number of LDPC codewords is 1. In one implementation, the second value range and the first code length may satisfy the following relationship: the second value range is (fifth code length, third code length], when N avbits ≥N pld When 1 = 1 + X × (1-R), the first code length is the longest LDPC code length supported by the system. The value of X can be found in the above related content and will not be repeated here. According to this implementation, when n=2, the second value range is (1944×(n+1)-648, 1944×(n-1)], X=2916+12×t1, when N avbits ≥N pld +X×(1-R), the first code length is 1944×n; otherwise, the second code length is 1944. For example, n=2, the second value range is (1296, 1944], X=2916+12×t1, when N avbits ≥N pld +X×(1-R), the first code length is 1944; otherwise, the second code length is 1944. For another example, the second value range is (1944, 1944×2], X=5832+12t2, and the first code length is 1944×n. t1 can be located in [-2, 2], t2 can be located in [-2, 2], and t2 can be the same as or different from t1. According to this implementation, when n=4, the second value range is (1944×(n+1)-648, 1944×(n-1)], X=5832+12×t2, when N avbits ≥N pld +X×(1-R), the first code length is 1944×n; otherwise, the second code length is 3888. For example, n=4, the second value range is (1296, 1944], X=5832+12×t2, when N avbits ≥N pld +X×(1-R), the first code length is 1944; otherwise, the second code length is 1944. For another example, the second value range is (1944, 1944×2], X=5832+12×t2, and the first code length is 1944×n. t2 can be in the range [-2, 2], and t2 can be the same as or different from t1. The first code length determined according to the implementation method in Case 21 can ensure that the proportion of punctured parity bits in all parity bits does not exceed a first threshold (eg, 25%), thereby achieving better error control performance. Case 22: The number of LDPC codewords is 2 or 3. In case 22, the second value range and the first code length can satisfy the following relationship: the second value range is (the fourth code length, the fourth code length + the third code length), when N avbits ≥N pld When 1 = 1 + X × (1-R), the first code length is the longest LDPC code length supported by the system. The value of X can be found in the above related content and will not be repeated here. According to this implementation, it can be seen that: n=2, the second value range is (1944×n, 1944×(n+1)], X=1944×(n+1)+12×t1, when N avbits≥N pld +X×(1-R), the first code length is 1944×n; otherwise, the second code length is 1944. For example, n=2, the second value range is (3888, 5832], X=5832+12×t2, when N avbits ≥N pld +X×(1-R), the first code length is 1944; otherwise, the second code length is 1944. Wherein, t1 can be located at [-2, 2]. It can be understood that when 3888<N avbits ≤5832, and the number of LDPC codewords is 2, N avbits ≥N pld +X×(1-R), X=2916+12×t1, the first code length is 3888; when 3888<N avbits ≤5832, and the number of LDPC codewords is 3, N avbits <N pld +X×(1-R), when X=5832+12×t2, the first code length is 1944. According to this implementation, when n=4, the second value range is (1944×n, 1944×(n+2)] or (1944×n, 1944×n+1944×n / 2)], X=1944×(n+2)+12×t2, when N avbits ≥N pld +X×(1-R), the first code length is 1944×n; otherwise, the second code length is 1944×n / 2. For example, n=4, the second value range is (7776, 11164], X=11164+12×t3, when N avbits ≥N pld +X×(1-R), the first code length is 7776; otherwise, the second code length is 3888. Among them, t3 can be located in [-2, 2], and t3 and t1 can be the same or different. It can be understood that when 7776<N avbits ≤11663, and the number of LDPC codewords is 2, N avbits ≥N pld +X×(1-R), X=11164+12×t3, the first code length is 7776; when 7776<N avbits ≤11663, and the number of LDPC codewords is 3, N avbits <N pld +X×(1-R), when X=11164+12×t3, the first code length is 3888. The first code length determined according to the implementation method in Case 22 can ensure that the proportion of punctured parity bits in all parity bits does not exceed a first threshold (eg, 25%), thereby achieving better error control performance. Case 23: The number of LDPC codewords is 1. In one implementation, the second value range and the first code length may satisfy the following relationship: the second value range is (fifth code length, third code length], if N avbits ≥N pld +X×(1-R), and X=Y+12i×t, where the first code length is the longest LDPC code length supported by the system. Where i=2 or 3, Y includes 2928; i=3, Y includes 2916; or i=3, Y includes 2942. According to this implementation, the second value range includes [1944×(n+1)-648, 1944×(n-1)], X=Y+12i×t, and the first code length is 1944×n. For example, all the coding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6 and 7 / 8, and X is a common multiple of 23. When n=2, X=912=38×23, when N avbits ≤648, and N avbits ≥N pld +X×(1-R), the first code length is 1296. When n=2, X=1363=61×23, when 648<N avbits ≤1296, and N avbits ≥N pld +X×(1-R), the first code length is 1944. When i=2 or 3, Y=2928, so when n=2, X=2928+23×t1, when 1296<N avbits ≤1944, and N avbits ≥N pld +X×(1-R), the first code length is 3888. For another example, all the encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6 and 8 / 9, and X is a common multiple of 36. When n=2, X=936=26×36, when N avbits ≤648, and N avbits ≥N pld +X×(1-R), the first code length is 1296. When n=2, X=1376=61×36, when 648<N avbits ≤1296, and N avbits ≥N pld +X×(1-R), the first code length is 1944. When i=2 or 3, Y=2916, so when n=2, X=2916+36×t1, when 1296<N avbits ≤1944, and N avbits ≥N pld +X×(1-R), the first code length is 3888. For another example, all the encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, 7 / 8 and 8 / 9, and X is a common multiple of 72. When n=2, X=936=13×72, when N avbits ≤648, and N avbits ≥N pld +X×(1-R), the first code length is 1296. When n=2, X=1512=21×72, when 648<N avbits ≤1296, and N avbits ≥N pld +X×(1-R), the first code length is 1944. When i=3, Y=2952, so, when n=2, X=2952+72×t1, when 1296<N avbits ≤1944, and N avbits ≥N pld +X×(1-R), the first code length is 3888. The first code length determined according to the implementation method in Case 23 can ensure that the proportion of punctured parity bits in all parity bits does not exceed a first threshold (eg, 25%), thereby achieving better error control performance. Case 24: The number of LDPC codewords is 2 or 3. In one implementation, the second value range and the first code length may satisfy the following relationship: the second value range is (fourth code length, fourth code length + third code length], if N avbits ≥N pld +X×(1-R), and X=Y+12i×t, the first code length is the fourth code length. According to this implementation, the second value range is (1944×n, 1944×(n+1)], if N avbits ≥N pld +X×(1-R), and X=Y+12i×t, the first code length is 1944×n. For example, all encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6 and 7 / 8, and X is a common multiple of 24. When n=2, X=5832=243×24, when 3888<N avbits ≤5832, and N avbits ≥N pld +X×(1-R), the first code length is 3888; otherwise, the second code length is 1944. For another example, all encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6 and 8 / 9, and X is a common multiple of 36. When n=2, X=5832=162×36, when 3888<N avbits ≤5832, and N avbits ≥N pld+X×(1-R), the first code length is 3888; otherwise, the second code length is 1944. For another example, all encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, 7 / 8, and 8 / 9, and X is a common multiple of 72. When n=2, X=5832=81×72, when 3888<N avbits ≤5832, and N avbits ≥N pld +X×(1-R), the first code length is 3888; otherwise, the second code length is 1944. In another implementation, the second value range and the first code length may satisfy the following relationship: the second value range is (third code length, fourth code length - third code length), if N avbits ≥N pld +X×(1-R), and X=Y+12i×t, the first code length is the third code length. According to this implementation, the second value range is (1944×n, 1944×(n+1)-648], if N avbits ≥N pld +X×(1-R), and X=Y+12i×t, the first code length is 1944×(n-1). For example, all encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6 and 7 / 8, and X is a common multiple of 24. When n=2, X=2928=122×24, when 1944<N avbits ≤2592, and N avbits ≥N pld +X×(1-R), the first code length is 1944; otherwise, the second code length is 1296. For another example, all encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6 and 8 / 9, and X is a common multiple of 36. When n=2, X=2916=81×36, when 1944<N avbits ≤2592, and N avbits ≥N pld +X×(1-R), the first code length is 1944; otherwise, the second code length is 1296. For another example, all encoding rates supported by the system include 1 / 2, 2 / 3, 3 / 4, 5 / 6, 7 / 8, and 8 / 9, and X is a common multiple of 72. When n=2, X=2952=41×72, when 1944<N avbits ≤2592, and N avbits ≥N pld +X×(1-R), the first code length is 1944; otherwise, the second code length is 1296. The first code length determined according to any implementation method in situation 24 can ensure that the proportion of punctured parity bits in all parity bits does not exceed a first threshold (for example, 25% or 30%), thereby achieving better error control performance. It should be noted that the method for determining the LDPC code length includes the aforementioned implementation method 1 and / or implementation method 2. Alternatively, the method for determining the LDPC code length includes one or more methods involved in one or more of the aforementioned situations 11 to 24. Alternatively, the LDPC code length satisfies one or more conditions involved in one or more of the aforementioned situations 11 to 24. For example, the following Tables 2 to 9 respectively show methods for determining the LDPC code length, and the first device can determine the LDPC code length based on at least one row of one or more tables in Tables 2 to 9. Any one of Tables 2 to 9 can be understood as an extension of Table 1, showing a method for determining the LDPC code length in scenarios with longer LDPC code lengths and / or more coding rates. Among them, the bold lines or bold fonts in any of Tables 2 to 9 are different from Table 1. The meaning of one or more representations of X1 to X5 involved in Tables 2 to 9 is the same as the aforementioned X. It can be understood that Tables 2 to 9 are only examples. In actual applications, the LDPC code length can be determined based on some or all rows in one or more tables in Tables 2 to 9. Tables 2 to 9 can be defined by the standard, or preset, or determined by negotiation between the communicating parties, etc. Table 2 Table 2 can be applied to scenarios where the longest LDPC code length supported by the system is 1944×n, where n is an integer greater than or equal to 2, and all coding rates supported by the system are 1 / 2, 2 / 3, 3 / 4, and 5 / 6. Compared with Table 1, Table 2 newly adds the third to sixth rows to determine the LPDC code. As mentioned above, X1 and X2 are common multiples of 12. In order to ensure that the proportion of punctured check bits to all check bits does not exceed the first threshold, so as to ensure the error control performance of the LDPC code, appropriate X1 and X2 can be selected. For example, it is agreed that the proportion of punctured check bits to all check bits is approximately 0.25. Optionally, X1=2916=12×233, X2=5832=12×386. For another example, the proportion of punctured parity bits to all parity bits is lower than 0.25. Optionally, X1=2916+12×t1, X2=5832+12×t2, where t1 and t2 are both integers greater than or equal to -2 and less than or equal to 2. t1 and t2 may be the same or different. When 3888<N avbits ≤5832, if N avbits ≥N pld+X2×(1-R), select the LDPC code with code length 3888, then the number of LDPC code words is 2. avbits <N pld +X2×(1-R), select an LDPC code with a code length of 1944. In this case, the number of LDPC codewords is 3. Table 3 Table 3 is applicable to scenarios where the longest LDPC code length supported by the system is 1944×n, where n is an integer greater than or equal to 2, and all coding rates supported by the system are 1 / 2, 2 / 3, 3 / 4, and 5 / 6. Compared to Table 1, Table 3 newly adds the third and fourth rows to determine the LPDC code. As mentioned above, X1 is a common multiple of 12. In order to ensure that the proportion of punctured check bits to all check bits does not exceed the first threshold to ensure the error control performance of the LDPC code, a suitable X1 can be selected. For example, it is agreed that the proportion of punctured check bits to all check bits is approximately 0.25. Optionally, X1=2916=12×233. For another example, the proportion of punctured check bits to all check bits is lower than 0.25. Optionally, X1=2916+12×t1. When 1944<N avbits , select the LDPC code with code length 3888, then the number of LDPC code words is [N pld / 3888×R]. Table 4 Table 4 applies to scenarios where the longest LDPC code length supported by the system is 1944×n, where n is an integer greater than or equal to 2, and all supported coding rates are 1 / 2, 2 / 3, 3 / 4, and 5 / 6. Compared to Table 1, Table 4 adds a fifth row to specify the method for determining the LPPC code. When 2592<N avbits , select the LDPC code with code length 3888, then the number of LDPC code words is [N pld / 3888×R]. Table 5 Table 5 is applicable to scenarios where the longest LDPC code length supported by the system is 1944×n, where n is an integer greater than or equal to 2, and the system supports all coding rates, including 1 / 2, 2 / 3, 3 / 4, and 5 / 6, as well as other coding rates. Examples of other coding rates include 7 / 8 and / or 8 / 9. Compared to Table 1, Table 5 adds the third to sixth rows for determining the LDPC code length, and the first and second rows for determining the LDPC code length have been modified. As mentioned above, X1 to X3 are all common multiples of the denominators of all coding rates. In order to ensure that the proportion of punctured parity bits to all parity bits does not exceed the first threshold to ensure the error control performance of the LDPC code, appropriate X1 to X3 can be selected. For example, it is agreed that the proportion of punctured parity bits to all parity bits is approximately 0.25. Assuming that the newly added code rate is R = 7 / 8, optionally, X3 = 912 = 38 × 23, X4 = 1363 = 61 × 23; X1 = 2928 = 122 × 23, X2 = 5832 = 233 × 23. For another example, if the proportion of punctured parity bits to all parity bits is lower than 0.25, optionally, X1 = 2928 + 23 × t1, X2 = 5832 + 23 × t2, X3 = 912 + 23 × t3, X4 = 1363 + 23 × t3. Compared to Table 1, assuming the newly added code rate is R = 8 / 9, optionally, X3 = 936 = 26 × 36, X4 = 1376 = 31 × 36; X1 = 2916 = 81 × 36, X2 = 5832 = 162 × 36. For another example, if the proportion of punctured parity bits to all parity bits is lower than 0.25, optionally, X1 = 2916 + 36 × t1, X2 = 5832 + 36 × t2, X3 = 936 + 36 × t3, and X4 = 1376 + 36 × t3. Compared to Table 1, assuming the new code rates R = 7 / 8 and R = 8 / 9 are increased, optionally, X3 = 936 = 13 × 72, X4 = 1512 = 21 × 72; X1 = 2952 = 31 × 72, X2 = 5832 = 81 × 72. For another example, if the proportion of punctured parity bits to all parity bits is lower than 0.25, optionally, X1 = 2952 + 72 × t1, X2 = 5832 + 72 × t2, X3 = 936 + 72 × t3, and X4 = 1521 + 72 × t3. Table 6 Table 6 is applicable to scenarios where the longest LDPC code length supported by the system is 1944×n, where n is an integer greater than or equal to 2, and all supported coding rates include other coding rates in addition to 1 / 2, 2 / 3, 3 / 4, and 5 / 6. Other coding rates include, for example, 7 / 8 and / or 8 / 9. Compared to Table 1, Table 6 adds the third and fourth rows for determining the LDPC code length, and the first and second rows for determining the LDPC code length have been modified. As mentioned above, X1, X3 and X4 are all common multiples of the denominators of all encoding bit rates. For details, please refer to the values ​​of X1, X3 and X4 in Table 5 above, which will not be repeated here. Table 7 Table 6 is applicable to scenarios where the longest LDPC code length supported by the system is 1944×n, where n is an integer greater than or equal to 2, and all supported coding rates include other coding rates in addition to 1 / 2, 2 / 3, 3 / 4, and 5 / 6. Other coding rates include, for example, 7 / 8 and / or 8 / 9. Compared to Table 1, Table 7 adds the fourth and fifth rows for determining the LDPC code length, and the first and second rows for determining the LDPC code length have been modified. As mentioned above, X1, X3 and X4 are all common multiples of the denominators of all encoding bit rates. For details, please refer to the values ​​of X1, X3 and X4 in Table 5 above, which will not be repeated here. Table 8 Table 8 applies to scenarios where the longest LDPC code length supported by the system is 1944, and the system supports all coding rates, including 1 / 2, 2 / 3, 3 / 4, and 5 / 6, as well as other coding rates. Examples of other coding rates include 7 / 8 and / or 8 / 9. Compared to Table 1, Table 8 adds a fourth row for determining the LDPC code length, and the methods for determining the LDPC code length in the first and second rows have been modified. As mentioned above, X1, X3 and X4 are all common multiples of the denominators of all encoding bit rates. For details, please refer to the values ​​of X1, X3 and X4 in Table 5 above, which will not be repeated here. Table 9 Table 9 applies to systems with a maximum supported LDPC code length of 1944×n, where n is an integer greater than or equal to 2, and all supported coding rates except 1 / 2, 2 / 3, 3 / 4, and 5 / 6. Compared to Table 1, Table 9 adds rows 3 through 7 to describe how to determine the LDPC code length. As mentioned above, X1, X3 and X3 are all common multiples of the denominators of all coding rates. In order to ensure that the proportion of punctured parity bits to all parity bits does not exceed the first threshold to ensure the error control performance of the LDPC code, appropriate X1~X2 and X5 can be selected. For example, it is agreed that the proportion of punctured parity bits to all parity bits is approximately 0.25. Optionally, X1=2916=12×233, X2=5832=12×386, X5=11663=12×972. For another example, if the proportion of punctured parity bits to all parity bits is lower than 0.25, optionally, X1=2916+12×t1, X2=5832+12×t2, X5=11663+12×t3, where t1 and t2 are both integers greater than or equal to -2 and less than or equal to 2. t1, t2 and t3 can be the same or different. When 7776<Navbits ≤11663, if N avbits ≥N pld +X5×(1-R), select the LDPC code with code length 7776, then the number of LDPC code words is 2. avbits <N pld +X5×(1-R), select an LDPC code with a code length of 3888. In this case, the number of LDPC codewords is 3. S502: The first device sends the encoded information to the second device. Correspondingly, the second device receives the encoded information. The first device may be configured to generate an LDPC code word according to the length L LDPC and the number of codewords N CW A check matrix to be used is selected from a plurality of already defined LDPC code validation matrices, and information to be transmitted is encoded according to the selected check matrix. The first device transmits the encoded information to the second device. Correspondingly, the second device receives the encoded information. S503: The second device decodes the received encoded information. After receiving the encoded information, the second device decodes the encoded information. The decoding process of the second device is actually the reverse process of the process in Figure 4. For example, the second device performs stream parsing on the encoded information to obtain at least one LDPC codeword, and then decodes the encoded information based on the at least one LDPC codeword. It is understandable that the second device uses each LDPC codeword to decode the information encoded using the LDPC codeword to obtain the payload in the corresponding encoded information. Regarding the specific implementation of the second device decoding the information encoded using the LDPC codeword based on the LDPC codeword, reference can be made to the prior art and will not be repeated here. In the above embodiments provided by the present application, the method provided by the embodiment of the present application is introduced by taking the execution of the first device and the second device as an example. In the present application, each embodiment can be implemented independently or in combination based on certain internal connections; in each embodiment, different implementation methods can be implemented in combination or independently. In order to realize the various functions in the method provided by the above embodiments of the present application, the steps performed by the first device can be implemented by different functional entities that constitute the first device. The steps performed by the second device can be implemented by different functional entities that constitute the second device. Both the first device and the second aspect may include hardware structures and / or software modules to implement the above functions in the form of hardware structures, software modules, or hardware structures plus software modules. Whether one of the above functions is executed in the form of hardware structures, software modules, or hardware structures plus software modules depends on the specific application and design constraints of the technical solution. Based on the same inventive concept as the method embodiment, the present embodiment provides a communication device. The following describes the communication device used to implement the above method in the present embodiment in conjunction with the accompanying drawings. The above content can be used in subsequent embodiments, and repeated content will not be repeated. Figure 6 is a schematic block diagram of a communication device 600 provided in an embodiment of the present application. The communication device 600 may be a device that requires encoding, for example, the communication device 600 is the first device in the above-mentioned embodiment or a chip (system) in the first device. The communication device 600 may implement the functions or steps implemented by the first device in each of the above-mentioned method embodiments. The communication device 600 may be a device that requires decoding, for example, the communication device 600 is the second device in the above-mentioned embodiment or a chip (system) in the second device. The communication device 600 may implement the functions or steps implemented by the second device in each of the above-mentioned method embodiments. The communication device 600 may include a processing module 610 and a transceiver module 620. Optionally, it may also include a storage module, which may be used to store instructions (code or program) and / or data. The storage module may be, for example, a memory. The processing module 610 and the transceiver module 620 may be coupled to the storage module. For example, the processing module 610 may read the instructions (code or program) and / or data in the storage module to implement the corresponding method. When the communication device 600 is a chip in the first device or the second device, the storage module may be a storage module within the chip, such as a register, a cache, etc. For example, the storage module may also be a storage module located outside the chip within the first device or the second device, such as a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM), etc. The above-mentioned units may be independently provided or partially or fully integrated. The processing module 610 can be a processor or controller, for example, a general-purpose central processing unit (CPU), a general-purpose processor, a digital signal processing (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a transistor logic device, a hardware component or any combination thereof. It can implement or execute the various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. The processor can also be a combination that implements computing functions, for example, including a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and so on. The transceiver module 620 is a transceiver, an interface circuit, a bus, a pin or other possible communication interface for receiving signals from other devices. For example, when the device is implemented in the form of a chip, the transceiver module 620 is the interface circuit of the chip for receiving signals from other chips or devices, or the interface circuit of the chip for sending signals to other chips or devices. In one implementation, the communication device 600 can implement the behaviors and functions of the first device in the above-mentioned method embodiment. For example, the communication device 600 can be the first device, or a component (such as a chip or circuit) used in the first device, or a chip or chipset in the first device, or a part of the chip used to perform the functions of the relevant method, or a software module capable of implementing the method performed by the first device in the above-mentioned method, without limitation. For details, please refer to the relevant content of the above-mentioned method embodiment, which will not be repeated here. For example, the processing module 610 is used to determine the number of coding bits corresponding to the information to be encoded, and determine the length of the LDPC codeword according to the number of coding bits. The information to be encoded includes data information and check information. The length of the LDPC codeword and the number of coding bits meet the following conditions: when the number of coding bits is within a first value range, the length of the LDPC codeword is the first code length; or, when the number of coding bits is within a second value range, if the number of coding bits N is greater than or equal to 0, the length of the LDPC codeword is the first code length; avbits Greater than or equal to the bit length N corresponding to the information to be encoded pldand the sum of the first value, the length of the LDPC codeword is the first code length; otherwise, the length of the LDPC codeword is the second code length. The first value is the product of X and (1-R), R is the coding rate, and X is the common multiple of the denominators of all coding rates supported by the system. Among them, the longest length of the LDPC codeword supported by the system is 1944×n, n is an integer greater than or equal to 2, and the first code length and the second code length are both less than or equal to 1944×n; and / or, X=Y+Zt, Z is the least common multiple of the denominators of all coding rates supported by the system, all coding rates include 7 / 8, and t is an integer greater than or equal to -2 and less than or equal to 2. Y makes the proportion of check bits punctured during the encoding process in all check bits lower than the first threshold. The transceiver module 320 can be used to send information obtained by encoding the information to be encoded. In another implementation, the communication device 600 can implement the behaviors and functions of the second device in the above-mentioned method embodiment. For example, the communication device 600 can be a second device, or a component (such as a chip or circuit) used in the second device, or a chip or chipset in the second device or a part of the chip used to perform the functions of the relevant method, or a software module capable of implementing the method performed by the second device in the above-mentioned method, without limitation. For details, please refer to the relevant content of the above-mentioned method embodiment, which will not be repeated here. For example, the transceiver module 620 is configured to receive information from the first device. The processing module 610 is configured to perform stream parsing on the information to obtain at least one LDPC codeword, and decode the received information according to the at least one LDPC codeword. As an optional implementation method, when the longest length of the LDPC codeword supported by the system is 1944×n and the number of LDPC codewords is 1, the first value range and the first code length satisfy the following relationship: the first value range is (third code length, fourth code length], the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, and the fourth code length is the last to last LDPC code length after sorting. For example, the first value range includes (1944×(n-1), 1944×n], and the first code length is 1944×n. As an optional implementation, when the maximum length of the LDPC codeword supported by the system is 1944×n, the number of LDPC codewords is the data bit length N corresponding to the information to be encoded. pld The ratio of (1944×n×R), the first value range and the first code length satisfy any of the following relationships: The first value range is (the third code length + the fourth code length, +∞], and the first code length is the fourth code length; or the first value range is (the fourth code length - the third code length, +∞], and the first code length is the fourth code length; or the first value range is (the fourth code length - the fifth code length, +∞], and the first code length is the fourth code length. Among them, all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, the fourth code length is the last to last LDPC code length after sorting, and the fifth code length is the first to last LDPC code length after sorting. The length is the third-to-last LDPC code length supported by the system. For example, the first value range is (1944×(n+1), +∞], and the first code length is 1944×n; the first value range is (1944×(n-1), +∞], and the first code length is 1944×n; the first value range is (1944×(n+1)-648, +∞], and the first code length is 1944×n; or the second value range includes (1944×(n+2), +∞], and the first code length is 1944×n. As an optional implementation, when the longest length of the LDPC codeword supported by the system includes 1944×n, and Z=12, the number of LDPC codewords is 1, the second value range and the first code length satisfy the following relationship: the second value range is (fifth code length, third code length], if N avbits Greater than or equal to N pld The sum of the first value and the first value is the first code length, which is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from smallest to largest, the third code length is the second-to-last LDPC code length after sorting, and the fifth code length is the third-to-last LDPC code length supported by the system. For example, if n = 2, the second value range is [1944×(n+1)-648, 1944×(n-1)], X = 2916+12t, and the first code length is 1944×n; or, if n = 3, the second value range is [1944, 1944×2], X = 5832+12t, and the first code length is 1944×n. As an optional implementation, when the longest length of the LDPC codeword supported by the system includes 1944×n, and Z=12, the number of LDPC codewords is 2, the second value range and the first code length satisfy the following relationship: the second value range is (fourth code length, fourth code length + third code length], if N avbits Greater than or equal to N pldThe sum of the first value and the first value is the first code length, which is the longest LDPC code length supported by the system. Among them, all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fourth code length is the last-to-last LDPC code length supported by the system. For example, if n = 2, the second value range is [1944×n, 1944×(n+1)], X = 1944×(n+1)+12t, and the first code length is 1944×n; or, if n = 3, the second value range is [1944×n, 1944×(n+2)], X = 1944×(n+2)+12t, and the first code length is 1944×n. As an optional implementation, when the longest length of the LDPC codeword supported by the system includes 1944×n, and Z=12i, i is an integer greater than or equal to 2, the number of LDPC codewords is 1, and the second value range and the first code length satisfy the following relationship: the second value range is (fifth code length, third code length], if N avbits Greater than or equal to N pld and the sum of the first value, and X=Y+12i×t, the first code length is the longest LDPC code length supported by the system. Among them, all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fifth code length is the third-to-last LDPC code length among the LDPC code lengths supported by the system. For example, the second value range is (1944×(n+1)-648, 1944×(n-1)], X=Y+12i×t, the first code length is 1944×n; wherein, i=2 or 3, Y includes 2928; i=3, Y includes 2916; or, i=3, Y includes 2952. As an optional implementation, the second value range and the first code length further satisfy the following relationship: the second value range includes (0, 648], X=Y+12i×t, and the first code length is 1296; wherein, i=2, Y includes 912; i=3, Y includes 936; i=6, Y includes 936; or, the second value range includes (648, 1296], X=Y+12i×t, and the first code length is 1944; wherein, i=2, Y includes 1363; i=3, Y includes 1376; i=6, Y includes 1512. As an optional implementation, when the longest length of the LDPC codeword supported by the system includes 1944×n, and Z=12i, i is an integer greater than or equal to 2, the number of LDPC codewords is 2, and the second value range and the first code length satisfy the following relationship: the second value range is (fourth code length, fourth code length + third code length], X=Y+12i×t, and the first code length is the fourth code length; or, the second value range is (third code length, fourth code length-third code length], X=Y+12i×t, and the first code length is the third code length. All LDPC code lengths supported by the system are sorted from smallest to largest, with the third code length being the second-to-last LDPC code length after sorting, and the fourth code length being the last-to-last LDPC code length among the LDPC code lengths supported by the system. For example, the second value range is [1944×n, 1944×(n+1)], where X=Y+12i×t, and the first code length is 1944×n; or the second value range is [1944×n, 1944×(n+1)-648], where X=Y+12i×t, and the first code length is 1944×(n-1). When the communication device 600 is a chip-type device or circuit, the transceiver module may be an input / output circuit and / or a communication interface; the processing module may be an integrated processor or microprocessor or integrated circuit. Figure 7 is a schematic block diagram of a communication device 700 provided in an embodiment of the present application. The communication device 700 can be the first device in the above embodiment or the chip (system) in the first device. The communication device 700 can also be the second device in the above embodiment or the chip (system) in the second device. In the embodiment of the present application, the chip system can be composed of a chip, or it can include a chip and other discrete devices. For specific functions, please refer to the description in the above method embodiment. The communication device 700 includes one or more processors 701, which are used to implement or support the communication device 700 to implement the functions of the first device in the method provided in the embodiment of the present application. Please refer to the detailed description in the method example for details, which will not be repeated here. The processor 701 can also be called a processing unit or a processing module, which can implement certain control functions. The processor 701 can be a general-purpose processor or a dedicated processor. For example, it includes: a baseband processor, a central processing unit, an application processor, a modem processor, a graphics processor, an image signal processor, a digital signal processor, a video codec processor, a controller, a memory, and / or a neural network processor. The baseband processor can be used to process communication protocols and communication data. The central processing unit can be used to control the communication device 700 (for example, the first device), execute software programs and / or process data. Different processors can be independent devices or integrated into one or more processors, for example, integrated into one or more dedicated integrated circuits. In one design, the processor 701 may include a program 703 (sometimes also referred to as code or instructions), which may be executed on the processor 701 to cause the communication device 700 to perform the methods described in the following embodiments. In another possible design, the communication device 700 includes circuitry (not shown in FIG. 7 ) configured to implement the functionality of the first device in the above embodiments. In one design, the communication device 700 may include one or more memories 702 on which a program 704 (sometimes also referred to as code or instructions) is stored. The program 704 can be run on the processor 701 so that the communication device 700 performs the method described in the above method embodiment. In one design, the processor 701 and / or the memory 702 may include an artificial intelligence (AI) module 707 and an AI module 708, each configured to implement AI-related functions. The AI ​​module may be implemented using software, hardware, or a combination of software and hardware. For example, the AI ​​module may include a RAN intelligent controller (RIC) module. For example, the AI ​​module may be a near real-time RIC or a non-real-time RIC. In a possible design, data may also be stored in the processor 701 and / or the memory 702. The processor and the memory may be provided separately or integrated together. In one possible design, the communication device 700 may further include a transceiver 705 and / or an antenna 706. The processor 701 may also be sometimes referred to as a processing unit, and controls the communication device 700. The transceiver 705 may also be sometimes referred to as a transceiver unit, a transceiver, a transceiver circuit, or a transceiver, and is configured to implement the transceiver functions of the communication device 700 via the antenna 706. In one possible design, the communication device 700 may further include one or more of the following components: a wireless communication module, an audio module, an external memory interface, an internal memory, a universal serial bus (USB) interface, a power management module, an antenna, a speaker, a microphone, an input / output module, a sensor module, a motor, a camera, or a display screen, etc. It will be appreciated that in some embodiments, the communication device 700 may include more or fewer components, or some components may be integrated or separated. These components may be implemented in hardware, software, or a combination of software and hardware. The communication device in the above embodiments can be a first device, a circuit, a chip used in the first device, or other combined devices, components, etc. having the above first device. When the communication device is the first device, the transceiver module can be a transceiver, which can include an antenna and a radio frequency circuit, etc., and the processing module can be a processor, such as a CPU. When the communication device is a system-on-chip, it can be an FPGA, a dedicated ASIC, a system-on-chip (SoC), a CPU, a network processor (NP), a DSP, a microcontroller unit (MCU), a programmable logic device (PLD), or other integrated circuit. The processing module can be the processor of the system-on-chip. The transceiver module or communication interface can be the input / output interface or interface circuit of the system-on-chip. For example, the interface circuit can be a code / data read / write interface circuit. The interface circuit can be used to receive code instructions (the code instructions are stored in a memory and can be read directly from the memory or read from the memory through another device) and transmit them to the processor; the processor can be used to execute the code instructions to perform the method in the above method embodiment. For another example, the interface circuit may also be a signal transmission interface circuit between the communication processor and the transceiver. The present application also provides a communication system. Specifically, the communication system includes a first device and a second device. The first device is a device for implementing the functions related to the method shown in FIG5 , and the second device is a device for implementing the functions related to the method shown in FIG5 . For details, please refer to the relevant description in the above method embodiment, and will not be repeated here. An embodiment of the present application also provides a computer-readable storage medium, including instructions, which, when executed on a computer, enables the computer to execute the method executed by the first device or the second device in the method shown in Figure 5. A computer program product is also provided in an embodiment of the present application, including computer program code. When the computer program code is executed, the computer executes the method executed by the first device or the second device in the method shown in Figure 5. An embodiment of the present application provides a chip system, which includes a processor and may also include a memory, for implementing the functions of the first device or the second device in the method shown in Figure 5. The chip system can be composed of a chip or include a chip and other discrete devices. To implement the functions of the communication device shown in Figures 6 and 7, embodiments of the present application further provide a chip including a processor for supporting the communication device in implementing the functions of the first device or the second device in the above method embodiments. In one possible design, the chip is connected to or includes a memory, which is used to store computer programs, instructions, and data necessary for the communication device. It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. Those skilled in the art will appreciate that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented using electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application. Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here. In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs. If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the part that essentially contributes to the technical solution of the present application or the part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as USB flash drives, mobile hard drives, ROM, RAM, magnetic disks or optical disks. Obviously, those skilled in the art may make various changes and modifications to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include these modifications and variations.

Claims

1. A communication method, characterized in that: include: Determining the number of coding bits corresponding to information to be encoded, wherein the information to be encoded includes data information and check information; The length of the LDPC codeword is determined according to the number of coding bits, and the length of the LDPC codeword and the number of coding bits satisfy the following conditions: When the number of coded bits is within a first value range, the length of the LDPC codeword is a first code length; Alternatively, when the number of coding bits is within the second value range, if the number of coding bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, the length of the LDPC codeword is the first code length; otherwise, the length of the LDPC codeword is the second code length, and the first value is the product of X and (1-R), where R is the coding rate, and X is the common multiple of the denominators of all coding rates supported by the system; In which, the maximum length of the LDPC codeword supported by the system is 1944×n, where n is an integer greater than or equal to 2, and the first code length and the second code length are both less than or equal to 1944×n; and / or, X=Y+Zt, where Z is the least common multiple of the denominators of all coding rates supported by the system, where all coding rates include 7 / 8, t is an integer greater than or equal to -2 and less than or equal to 2, and Y makes the proportion of check bits punctured during the encoding process in all check bits lower than a first threshold.

2. The method according to claim 1, wherein When the longest length of an LDPC codeword supported by the system is 1944×n and the number of LDPC codewords is 1, the first value range and the first code length satisfy the following relationship: The first value range is (third code length, fourth code length], the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, and the fourth code length is the last LDPC code length after sorting.

3. The method according to claim 1 or 2, wherein: When the longest length of an LDPC codeword supported by the system is 1944×n, the number of LDPC codewords is a ratio of a bit length corresponding to the information to be encoded to (1944×n×R), and the first value range and the first code length satisfy any of the following relationships: The first value range is (third code length + fourth code length, +∞], the first code length is the fourth code length; or, The first value range is (fourth code length - third code length, +∞], and the first code length is the fourth code length; or, The first value range is (the fourth code length - the fifth code length, +∞], and the first code length is the fourth code length; Among them, all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, the fourth code length is the last to last LDPC code length after sorting, and the fifth code length is the third to last code length among the LDPC code lengths supported by the system.

4. The method according to any one of claims 1 to 3, wherein When the longest length of an LDPC codeword supported by the system is 1944×n, and Z=12, the number of LDPC codewords is 1, the second value range and the first code length satisfy the following relationship: The second value range is (fifth code length, third code length]. If the number of coded bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fifth code length is the third-to-last code length among the LDPC code lengths supported by the system.

5. The method according to any one of claims 1 to 3, wherein When the longest length of an LDPC codeword supported by the system is 1944×n, and Z=12, the number of LDPC codewords is 2, and the second value range and the first code length satisfy the following relationship: The second value range is (fourth code length, fourth code length + third code length]. If the number of coded bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fourth code length is the last-to-last code length among the LDPC code lengths supported by the system.

6. The method according to any one of claims 1 to 4, wherein When the longest length of an LDPC codeword supported by the system is 1944×n, and Z=12i, i is an integer greater than or equal to 2, and the number of LDPC codewords is 1, the second value range and the first code length satisfy the following relationship: The second value range is (fifth code length, third code length]. If the number of coded bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, and X=Y+12i×t, the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fifth code length is the third-to-last code length among the LDPC code lengths supported by the system; wherein, if i=2 or 3, Y includes 2928; if i=3, Y includes 2916; or, if i=3, Y includes 2942.

7. The method according to claim 6, wherein The second value range and the first code length also satisfy the following relationship: The second value range is (0, 648], X=Y+12i×t, and the first code length is 1296; wherein, i=2, Y includes 912; i=3, Y includes 936; i=6, Y includes 936; or, The second value range is (648, 1296], X=Y+12i×t, and the first code length is 1944; wherein, when i=2, Y includes 1363; when i=3, Y includes 1376; when i=6, Y includes 1412.

8. The method according to any one of claims 1 to 7, wherein When the maximum length of an LDPC codeword supported by the system is 1944×n, and Z=12i, i is an integer greater than or equal to 2, and the number of LDPC codewords is 2, the second value range and the first code length satisfy the following relationship: The second value range is (fourth code length, fourth code length + third code length], X=Y+12i×t, and the first code length is the fourth code length; or, The second value range is (third code length, fourth code length - third code length], X=Y+12i×t, and the first code length is the third code length; Among them, all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, and the fourth code length is the last code length among the LDPC code lengths supported by the system.

9. A communication device, characterized in that: include: A processing module is configured to determine the number of coding bits corresponding to information to be encoded, and determine the length of an LDPC codeword according to the number of coding bits, wherein the information to be encoded includes data information and check information, and the length of the LDPC codeword and the number of coding bits satisfy the following conditions: when the number of coding bits is within a first value range, the length of the LDPC codeword is a first code length; or, when the number of coding bits is within a second value range, if the number of coding bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, the length of the LDPC codeword is the first code length; otherwise, the length of the LDPC codeword is the second code length, and the first The value is the product of X and (1-R), where R is the coding rate, and X is the common multiple of the denominators of all coding rates supported by the system; wherein the maximum length of the LDPC codeword supported by the system is 1944×n, n is an integer greater than or equal to 2, and the first code length and the second code length are both less than or equal to 1944×n; and / or, X=Y+Zt, Z is the least common multiple of the denominators of all coding rates supported by the system, the all coding rates include 7 / 8, t is an integer greater than or equal to -2 and less than or equal to 2, and Y makes the proportion of check bits punctured during the encoding process in all check bits lower than a first threshold; The transceiver module is used to send the information to be encoded.

10. The device according to claim 9, wherein When the longest length of an LDPC codeword supported by the system is 1944×n and the number of LDPC codewords is 1, the first value range and the first code length satisfy the following relationship: The first value range is (third code length, fourth code length], where the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, and the fourth code length is the last to last LDPC code length after sorting.

11. The device according to claim 9 or 10, characterized in that When the longest length of an LDPC codeword supported by the system is 1944×n, the number of LDPC codewords is a ratio of a bit length corresponding to the information to be encoded to (1944×n×R), and the first value range and the first code length satisfy any of the following relationships: The first value range is (third code length + fourth code length, +∞], the first code length is the fourth code length; or, The first value range is (fourth code length - third code length, +∞], and the first code length is the fourth code length; or, The first value range is (the fourth code length - the fifth code length, +∞], and the first code length is the fourth code length; Among them, all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, the fourth code length is the last to last LDPC code length after sorting, and the fifth code length is the third to last code length among the LDPC code lengths supported by the system.

12. The device according to any one of claims 9 to 11, characterized in that When the longest length of an LDPC codeword supported by the system is 1944×n, and Z=12, the number of LDPC codewords is 1, the second value range and the first code length satisfy the following relationship: The second value range is (fifth code length, third code length]. If the number of coded bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fifth code length is the third-to-last code length among the LDPC code lengths supported by the system.

13. The device according to any one of claims 9 to 12, characterized in that When the longest length of an LDPC codeword supported by the system is 1944×n, and Z=12, the number of LDPC codewords is 2, and the second value range and the first code length satisfy the following relationship: The second value range is (fourth code length, fourth code length + third code length]. If the number of coded bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fourth code length is the last-to-last code length among the LDPC code lengths supported by the system.

14. The device according to any one of claims 9 to 13, characterized in that When the maximum length of an LDPC codeword supported by the system is 1944×n, and Z=12i, i is an integer greater than or equal to 2, and the number of LDPC codewords is 1, the second value range and the first code length satisfy the following relationship: The second value range is (fifth code length, third code length]. If the number of coded bits is greater than or equal to the sum of the bit length corresponding to the information to be encoded and the first value, and X=Y+12i×t, the first code length is the longest LDPC code length supported by the system, wherein all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second-to-last LDPC code length after sorting, and the fifth code length is the third-to-last code length among the LDPC code lengths supported by the system; wherein, if i=2 or 3, Y includes 2928; if i=3, Y includes 2916; or, if i=3, Y includes 2942.

15. The device according to claim 13, wherein The second value range and the first code length also satisfy the following relationship: The second value range is (0, 648], X=Y+12i×t, and the first code length is 1296; wherein, i=2, Y includes 912; i=3, Y includes 936; i=6, Y includes 936; or, The second value range is (648, 1296], X=Y+12i×t, and the first code length is 1944; wherein, when i=2, Y includes 1363; when i=3, Y includes 1376; when i=6, Y includes 1412.

16. The device according to any one of claims 9 to 14, characterized in that When the longest length of an LDPC codeword supported by the system is 1944×n, and Z=12i, i is an integer greater than or equal to 2, and the number of LDPC codewords is 2, the second value range and the first code length satisfy the following relationship: The second value range is (fourth code length, fourth code length + third code length], X=Y+12i×t, and the first code length is the fourth code length; or, The second value range is (third code length, fourth code length - third code length], X=Y+12i×t, and the first code length is the third code length; Among them, all LDPC code lengths supported by the system are sorted from small to large, the third code length is the second to last LDPC code length after sorting, and the fourth code length is the last code length among the LDPC code lengths supported by the system.

17. A communication device, characterized in that: The communication device includes a processor and a memory, the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory, so that the communication device performs the method according to any one of claims 1 to 8.

18. A chip system, characterized in that: The chip system includes: a processor and an interface, the processor is used to call and run instructions from the interface, and when the processor executes the instructions, the method according to any one of claims 1 to 8 is implemented.

19. A computer-readable storage medium, characterized in that The computer-readable storage medium is used to store a computer program, and when the computer program is run on a computer, the computer is caused to execute the method according to any one of claims 1 to 8.

20. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is run on a computer, the computer is caused to perform the method according to any one of claims 1 to 8.

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