Server management and control

Abstract

Embodiments of the present disclosure provide a server management and control method, a device, a storage medium, and a program product. In the embodiments of the present disclosure, for a server, a management and control chip is interconnected to a master chip by means of a PCIe bus; a PCIe root device and a PCIe endpoint device are implemented on the master chip and the management and control chip, respectively; the PCIe root device and the PCIe endpoint device form a video transmission channel between the master chip and the management and control chip; video data generated by the server during startup and / or operation is transmitted to the management and control chip by means of the video transmission channel; and then the management and control chip displays the video data on a display device interconnected to the management and control chip, implementing display control of the server without depending on expensive VGA modules, thus reducing implementation costs.

Description

[0001] Server management and control technology field

[0002]

[0001] The present disclosure relates to the field of chip technology, and in particular to server management and control.

[0003] KVM, short for Keyboard Video Mouse, is a technology that uses a keyboard, monitor, or mouse to control multiple devices. It plays an important role in remote scheduling and monitoring. In environments with multiple servers, such as computer rooms, KVM is introduced to remotely manage multiple servers, reducing the complexity of server management.

[0004] In a traditional solution, a server uses a BMC (Baseboard Management Controller) with a VGA (Video Graphics Array) module for KVM management. The BMC's VGA module can be mounted to the server's CPU (Central Processing Unit), acting as the server's graphics card to display the server's interface.

[0005]

[0004] However, the cost of a BMC with a VGA module is relatively high, which limits the widespread application of KVM technology.

[0006]

[0005] Various aspects of the present disclosure provide a server management and control method, device, storage medium, and program product for implementing display control of a server without relying on a BMC with a VGA module, reducing implementation costs, and promoting widespread application of KVM technology.

[0007]

[0006] An embodiment of the present disclosure provides a server, comprising: a main chip and a control chip interconnected via a PCIe bus; a PCIe root device and a PCIe endpoint device are implemented on the main chip and the control chip respectively, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; the main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device via the PCIe root device; the control chip is used to read the video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

[0008]

[0007] An embodiment of the present disclosure further provides a server, comprising: a main chip and a control chip; a bus controller and a bus device are implemented on the main chip and the control chip respectively, and the bus controller and the bus device are interconnected via a target bus to form a video transmission channel between the main chip and the control chip; the main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the bus device via the bus controller; the control chip is used to read the video data from the bus device and display the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

[0009]

[0008] An embodiment of the present disclosure also provides a control chip, which is applied to a server, and the control chip is interconnected with the main chip of the server through a PCIe bus; the main chip and the control chip respectively implement a PCIe root device and a PCIe endpoint device, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; the control chip is used to read video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip, thereby realizing display control of the server; wherein the video data is generated by the server during startup and / or operation and transmitted by the main chip to the PCIe endpoint device via the PCIe root device.

[0010]

[0009] An embodiment of the present disclosure also provides a main chip, which is applied to a server, and the main chip is interconnected with the control chip of the server through a PCIe bus; a PCIe root device and a PCIe endpoint device are respectively implemented on the main chip and the control chip, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; the main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device via the PCIe root device, so that the control chip can read the video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

[0011]

[0010] An embodiment of the present disclosure further provides a server board, on which a main chip and a control chip are integrated, and the main chip and the control chip are interconnected via a PCIe bus; a PCIe root device and a PCIe endpoint device are respectively implemented on the main chip and the control chip, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; the main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device via the PCIe root device; the control chip is used to read the video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

[0012]

[0011] An embodiment of the present disclosure also provides a server management and control method, which is applied to a main chip in the server, wherein the main chip communicates with a management and control chip via a PCIe bus; a PCIe root device and a PCIe endpoint device are respectively implemented on the main chip and the management and control chip, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the management and control chip; the method comprises: obtaining video data generated by the server during startup and / or operation; transmitting the video data to the PCIe endpoint device via the PCIe root device, so that the management and control chip reads the video data from the PCIe endpoint device and displays the video data on a display device interconnected with the management and control chip, thereby realizing display control of the server.

[0013]

[0012] An embodiment of the present disclosure also provides a server management and control method, which is applied to a management and control chip in the server, wherein the management and control chip is connected to a main chip via a PCIe bus; a PCIe root device and a PCIe endpoint device are respectively implemented on the main chip and the management and control chip, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the management and control chip; the method comprises: reading video data from the PCIe endpoint device, wherein the video data is generated by the server during startup and / or operation and transmitted by the main chip to the PCIe endpoint device via the PCIe root device; and displaying the video data on a display device interconnected with the management and control chip to realize display control of the server.

[0014]

[0013] Embodiments of the present disclosure further provide a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the processor is enabled to implement the steps of the above-described method.

[0014] Embodiments of the present disclosure further provide a computer program product, comprising a computer program / instructions. When the computer program / instructions is executed by a processor, the processor is enabled to implement the steps of the above-described method embodiments.

[0015]

[0015] In the disclosed embodiment, for a server, a control chip and a main chip are interconnected via a PCIe bus, and a PCIe root device and a PCIe endpoint device are implemented on the main chip and the control chip, respectively. The PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip. Video data generated by the server during startup and / or operation is transmitted to the control chip via the video transmission channel, and the control chip then displays the video data on a display device interconnected with the server, thereby achieving display control of the server without relying on expensive VGA modules, reducing implementation costs, and promoting the widespread application of KVM technology.

[0016]

[0016] The drawings described herein are intended to provide a further understanding of the present disclosure and constitute a part of the present disclosure. The illustrative embodiments of the present disclosure and their descriptions are intended to explain the present disclosure and do not constitute an improper limitation of the present disclosure. In the drawings:

[0017] FIG1 is a schematic diagram of the structure of a server provided by an exemplary embodiment of the present disclosure;

[0018] FIG2 is a schematic diagram of a topological structure of a PCIe bus system provided by an exemplary embodiment of the present disclosure;

[0019]

[0019] FIG3 is a schematic diagram of the structure of a server provided by another exemplary embodiment of the present disclosure;

[0020]

[0020] FIG4 is a schematic diagram of the structure of a server provided by another exemplary embodiment of the present disclosure;

[0021] FIG5 is a schematic diagram of an internal implementation framework of a graphics card driver provided by another exemplary embodiment of the present disclosure;

[0022] FIG6 is a schematic diagram illustrating the relationship between various DRM elements provided by another exemplary embodiment of the present disclosure;

[0023] FIG. 7 is a schematic diagram of a graphics driver loading process according to another exemplary embodiment of the present disclosure;

[0024] FIG8 is a schematic diagram of the structure of a server provided by another exemplary embodiment of the present disclosure;

[0025]

[0025] FIG9 is a flow chart of a server management and control method provided by another exemplary embodiment of the present disclosure;

[0026]

[0026] FIG10 is a flow chart of another server management and control method provided by another exemplary embodiment of the present disclosure.

[0027] To make the objectives, technical solutions, and advantages of the present disclosure more clearly apparent, the technical solutions of the present disclosure will be described clearly and completely below in conjunction with specific embodiments of the present disclosure and corresponding drawings. Obviously, the described embodiments are only some of the embodiments of the present disclosure, and are not all of the embodiments. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present disclosure without inventive effort are within the scope of protection of the present disclosure.

[0028]

[0028] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, storage, and display) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties. The collection, use, and processing of relevant data must comply with relevant laws, regulations, and standards of relevant countries and regions, and corresponding operation portals are provided for users to choose to authorize or reject. In addition, the various models involved in this disclosure (including but not limited to language models or large models) comply with relevant laws and standards.

[0029]

[0029] In view of the technical problem that the existing BMC with a VGA module is relatively high in cost, which limits the widespread application of KVM technology, the embodiments of the present disclosure provide a solution. The basic idea is: for the server, the control chip and the main chip are interconnected through the PCIe bus, and the PCIe root device and PCIe endpoint device are respectively implemented on the main chip and the control chip. The PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip. The video data generated by the server during startup and / or operation is transmitted to the control chip through the video transmission channel, and then the control chip displays the video data on the display device interconnected with it, thereby realizing display control of the server without relying on the expensive VGA module, reducing implementation costs, and promoting the widespread application of KVM technology.

[0030]

[0030] The following describes in detail the technical solutions provided by various embodiments of the present disclosure in conjunction with the accompanying drawings.

[0031] FIG1 is a schematic diagram of the structure of a server provided by an exemplary embodiment of the present disclosure. As shown in FIG1 , the server 100 includes a main chip 101 and a control chip 102 interconnected via a PCIe (Peripheral Component Interconnect Express) bus. The main chip 101 is the main chip and the basic chip of the server, and is the chip that the server relies on to implement its main functions. The embodiments of the present disclosure do not limit the implementation form of the main chip 101. The main chip 101 may be implemented according to the application scenario of the server and the functions to be implemented. For example, it may be a CPU chip, a GPU (Graphics Processing Unit) chip, a DPU (Data Processing Unit) chip, etc. The control chip 102 is a hardware unit independent of the main chip 101. It can assist the main chip 101 in providing certain control and management functions for the server, such as power management, temperature monitoring, and peripheral device management. In the embodiments of the present disclosure, the implementation form of the control chip 102 is also not limited. It can be various chips with auxiliary management functions, such as an SoC (System on Chip) chip or a BMC. Preferably, to reduce chip cost, the control chip 102 can be a chip without a VGA module.

[0032] In the disclosed embodiment, a PCIe root device 1011 and a PCIe endpoint device 1021 are implemented on the master chip 101 and the control chip 102, respectively. The PCIe root device 1011 and the PCIe endpoint device 1021 form a video transmission channel between the master chip 101 and the control chip 102. Based on this video transmission channel, the control chip 102 is at least configured to assist the master chip 101 in controlling the display of the server. The master chip 101 is configured to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device 1021 via the PCIe root device 1011. The control chip 102 is configured to read the video data from the PCIe endpoint device 1021 and display the video data on a display device 103 interconnected with the control chip 102, thereby controlling the display of the server 100.

[0033]

[0033] In this embodiment, the PCIe root device 1011 is specifically implemented as an RC (Root Complex), and the PCIe endpoint device 1021 is specifically implemented as an EP (Endpoint). RC and EP are specifically introduced as follows.

[0034]

[0034] In the server architecture using the PCIe bus disclosed in the present invention, it mainly includes RC, EP, Bridge and Switch. FIG2 shows the topology of a PCIe bus system. The RC, located at the root node of the topology, serves as the interface between the CPI and PCIe buses. The processor on the main chip 101 connects to the PCIe bus through it. The EP, located at the end of the PCIe bus system topology, is used to initiate or receive PCIe requests and messages. These EPs include PCIe EPs and Legacy EPs. Legacy EPs are older devices adapted to the PCIe interface for compatibility, rather than being natively designed for the PCIe interface. The Bridge provides access to other buses, such as PCI (Peripheral Component Interconnect) or PCI-X (an upgraded version of the legacy PCI bus), and corresponds to "PCIe Bridge to PCI Or PCLx" in FIG2 . The Switch provides expansion capabilities, allowing more devices to connect to a single PCIe port. It is explained here that multiple PCIe endpoint devices can be interconnected through the Bridge and the Switch, but this is not limited to this. Therefore, the Bridge and the Switch are optional components, and the PCIe root device 1011 and the PCIe endpoint device 1021 can be directly interconnected.

[0035] In this embodiment, a PCIe root device is implemented on the master chip, and a PCIe endpoint device is implemented on the control chip. The master chip and the control chip are interconnected via a PCIe bus. Thus, the PCIe root device and the PCIe endpoint device form a transmission channel between the master chip and the control chip, and this transmission channel serves as a video transmission channel. Using this video transmission channel, the master chip acquires video data generated by the server during startup and / or operation, and transmits the video data to the PCIe endpoint device via the PCIe root device. The control chip reads the video data from the PCIe endpoint device and displays the video data on a display device interconnected with the control chip, thereby controlling the display of the server.

[0036]

[0036] There is no limitation on the implementation method of the video transmission channel. In an optional embodiment, the base address register (BAR) of the PCIe endpoint device is mapped to the memory space of the PCIe root device as a video transmission channel between the master chip and the control chip; the master chip is specifically used to: write video data into the memory space of the PCIe root device, and control the PCIe root device to transmit the video data in the memory space to the cache of the PCIe endpoint device via the PCIe bus.

[0037]

[0037] In the disclosed embodiment, for a server, a control chip is interconnected with a main chip via a PCIe bus, and a PCIe root device and a PCIe endpoint device are implemented on the main chip and the control chip, respectively. The PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip. Video data generated by the server during startup and / or operation is transmitted to the control chip via the video transmission channel, and the control chip then displays the video data on a display device connected thereto, thereby achieving display control of the server without relying on expensive VGA modules, reducing implementation costs and promoting the widespread application of KVM technology. In addition, the technology for BMCs with VGA modules is currently limited to foreign manufacturers. The disclosed technical solution can expand server display control to ordinary chips, and to a certain extent, can also solve the bottleneck problem faced by chip technology, which is of great significance to the entire chip industry.

[0038]

[0038] Since the server itself is not equipped with a graphics card, the server's operating system does not have a driver for driving the graphics card. Therefore, in order to assist the main control chip in completing the acquisition, processing, and transmission of video data, compared to traditional server operating systems, the technical solution disclosed herein requires the server to be equipped with a driver for acquiring, processing, and transmitting video data. The implementation method for adding the driver for acquiring, processing, and transmitting video data to the server can be determined based on the display control requirements of the server.

[0039] In the disclosed embodiments, the entire lifecycle of a server can be divided into a startup process and a post-startup operation process. The server startup process includes the process of booting the operating system based on the server's boot program and the server operating system startup process. The post-startup operation process mainly refers to the process of the server running normally based on the booted operating system. Each of the aforementioned processes involves video data. For example, a boot splash screen may be displayed during the boot program operation, an operating system startup screen may be displayed during the operating system startup process, and various application interfaces and the server's main interface may be displayed during the operating system operation process.

[0040]

[0040] Specifically, if the display control requirement for the server only involves display control during the operating system startup process and / or the normal operation process after the operating system is started, a graphics card driver can be added to the server's operating system; if the display control requirement for the server only involves display control during the boot program startup process, a graphics driver can be added to the server's boot program; if the display control requirement for the server also involves the entire life cycle of the server, that is, the display control during the boot program startup process, the operating system startup process, and the normal operation process after the operating system is started, a graphics card driver can be added to the server's operating system and a graphics driver can be added to the server's boot program at the same time. As shown in FIG3 , the main chip 101 includes a first processor 1012 and a first memory (not shown in the figure). The first memory stores program code of an operating system and / or a boot program. Of course, the first memory can also store other data and program code of other applications running on the server. The first processor 1012 runs a graphics driver to obtain video data generated by the operating system during startup and operation, and transmits the video data to the PCIe endpoint device 1021 via the PCIe root device 1011. And / or, the first processor 1012 runs a graphics driver to obtain video data generated by the boot program during operation, and transmits the video data to the PCIe endpoint device 1021 via the PCIe root device 1011.

[0041]

[0041] In this embodiment, the operating system runs on the main chip, which manages the hardware resources of the server and executes application programs. Common operating systems include Windows (an operating system launched by Microsoft with a graphical user interface), Linux

[0042] (an open source UNIX-like operating system), etc., which is not limited in this disclosure. The boot program is responsible for guiding the operating system startup. It performs hardware initialization when the server starts up and provides some control before running the operating system. Optionally, the boot program can be BIOS (Basic Input Output System) or UEFI (Unified Extensible Firmware Interface), etc., which is not limited in this disclosure.

[0043]

[0042] Further optionally, a data migration service is deployed on the control chip; as shown in Figure 3, the control chip 102 includes a second processor 1022 and a second memory (not shown in the figure), the second memory is used to store at least the program code of the data migration service, and of course the second memory is also used to store other data or program codes related to the control chip 102; the second processor 1022 runs the data migration service, which is used to read video data from the PCIe endpoint device 1021 and display the video data on the display device 301 to achieve display control of the server.

[0044]

[0043] It should be noted that the data migration service is a software program developed by the present disclosure for the control chip to assist the control chip in completing the migration and display control of video data.

[0045]

[0044] In the embodiments of the present disclosure, the implementation of the display device is not limited and may include a local display device, a remote display device, or both. The local display device can display video data from the server locally, and the remote display device can display video data from the server remotely. In an optional embodiment, the display device includes a local display device, and the management and control chip includes: a video interconnect interface interconnected with the local display device, and a first frame buffer area that provides storage services for the local display device; a second processor runs a data migration service for reading video data from a cache of a PCIe endpoint device, writing the video data to the first frame buffer area (Framebuffer), and sending the video data in the first frame buffer area to the local display device via the video interconnect interface for display.

[0046]

[0045] The first frame buffer area is a memory area for storing and managing video data to be displayed; the video interconnection interface is responsible for sending the video data in the first frame buffer area to the local display device for display. The video interconnection interface can be HDMI (High Definition Multimedia Interface) or VGA (Video Graphics Array), etc., and the present disclosure does not limit this.

[0047]

[0046] With respect to the local display device, optionally, the display device includes a remote display device; in order to realize remote display control, a virtual network console VNC (Virtual Network Computing) server is further deployed on the control chip, wherein the program code of the VNC server is stored in the second memory, and the second processor runs the program code to realize the function of the VNC server; a VNC client is deployed and run on the remote display device, and remote transmission and display control of video data are realized with the help of the VNC server and the VNC client; based on this, the second processor runs a data migration service, and is also used to read the video data from the cache of the PCIe endpoint device, write the video data into the second frame buffer area of ​​the VNC server, and control the VNC server to transmit the video data to the remote display device via the network for display, and the remote display device runs the VNC client, and displays the video data on the screen through the VNC client.

[0048]

[0047] In this embodiment, the second frame buffer area is a memory area of ​​the VNC server, which is used to store video data to be displayed; in an optional embodiment, the second frame buffer area can be a virtual memory area that is not mapped to any physical display device, but serves as a storage area for video data, which is then transmitted to the VNC client via the network; in another optional embodiment, the second frame buffer area can also be an actual memory area, and the video data in the memory area is directly sent to the connected display device, so that the video data is displayed using the display device.

[0049]

[0048] That is, the second frame buffer area can be at the software level, used for displaying video data (such as a remote display device), or can be at the hardware level, an actual memory area, used for physical output of video data.

[0050]

[0049] The above embodiment realizes the video function in the "KVM", and the following embodiment will describe the keyboard and mouse functions in detail.

[0051]

[0050] In an optional embodiment, as shown in FIG4 , the control chip 102 includes a serial interface interconnected with an external interactive device, and the external interactive device includes a keyboard and / or a mouse; the control chip 102 is also interconnected with the main chip via a serial bus, and the serial interface and the serial bus belong to the same serial bus protocol; the control chip 102 is further used to: obtain interaction events generated by the external interactive device and transmit the interaction events to the main chip via the serial bus; the main chip 101 is further used to: receive interaction events and respond to the interaction events to achieve interactive control of the server.

[0052]

[0051] In this embodiment, there is no restriction on the serial interface and serial bus. As long as the corresponding drivers are deployed on the control chip and the main chip, all serial interfaces and serial buses belonging to the same serial bus protocol are applicable to this embodiment.

[0053]

[0052] In an optional embodiment, the serial interface is a Universal Serial Bus (USB) interface, and the serial bus is a USB bus; a USB device controller (UDC) is deployed on the management and control chip to obtain interaction events generated by the external interactive device and transmit the interaction events to the main chip through the serial bus; a USB host controller (UHC) is deployed on the main chip to receive interaction events and respond to the interaction events.

[0054] Specifically, USB device drivers are classified as either USB device host drivers (master mode) or USB device slave drivers (slave mode) based on the operating mode (master mode or slave mode) of the USB controller associated with the device. A USB controller operating in master mode is called a USB host controller, while a USB controller operating in slave mode is called a USB device controller.

[0055] In one example, a USB device slave driver is used under a Linux system, referred to as a USB gadget driver. The control chip is configured as a USB gadget device through its built-in USB device controller and USB gadget driver, simulating HID (Human Interface Devices) devices such as a keyboard and mouse. When the USB gadget device is connected to the USB host controller via the USB bus, the USB host controller detects the new device access and immediately initiates the enumeration process to identify and configure the device. The control chip captures interaction events (such as keyboard strokes or mouse movements) from external interactive devices and encapsulates these interaction events into data packets according to the HID protocol via the USB bus. The data packets are then transmitted to the main chip via the USB serial bus. The USB host controller of the main chip receives the data packets from the control chip, parses the data packets, and extracts the corresponding interaction events. The operating system then performs corresponding operations based on the parsed interaction events, such as updating the cursor position or inputting characters.

[0056]

[0055] It should be noted that, based on the USB Gadget driver, various USB device types (such as sound cards, serial ports, etc.) can be simulated, and are not limited to simulating HID devices. This disclosure does not impose any restrictions on this.

[0057]

[0056] In the embodiment of the present disclosure, it is not limited whether the main chip and the control chip are integrated on the same board. In an optional embodiment, the main chip and the control chip are integrated on the same board.

[0058]

[0057] In the above embodiments of the present disclosure, the interconnection between the main chip and the control chip via the PCIe bus is described as an example, but the embodiment is not limited to the PCIe bus. Other buses similar to the PCIe bus, such as the PCI bus, may also be used, and this is not limited to this. Based on this, the embodiments of the present disclosure also provide a server, including a main chip and a control chip; a bus controller and a bus device are respectively implemented on the main chip and the control chip, and the bus controller and the bus device are interconnected via a target bus to form a video transmission channel between the main chip and the control chip; the main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the bus device via the bus controller; the control chip is used to read the video data from the bus device and display the video data on a display device interconnected with the control chip, thereby achieving display control of the server. Compared to the server in the preceding embodiment, the server provided in this embodiment differs only in that the interconnection bus between the master chip and the control chip is specifically a target bus, and the bus controller and bus device are implemented on the master chip and the control chip, respectively. The target bus can be a generalization of similar buses such as PCIe and PCI. When the target bus is implemented as a PCIe bus, the bus controller and bus device are the PCIe root device and PCIe endpoint device, respectively. Therefore, the relevant description of the server provided in this embodiment can be found in the preceding embodiment and will not be repeated here.

[0059]

[0058] Furthermore, the embodiments of the present disclosure do not limit the implementation of the graphics card driver and the graphics driver. Different chip manufacturers may have their own implementation methods. Existing graphics card drivers may be used, or graphics card drivers developed by chip manufacturers themselves may be used. Any driving method that can realize the corresponding functions of the graphics card driver and the graphics driver in the above embodiments is applicable to the embodiments of the present disclosure.

[0060]

[0059] An example of an implementation of a graphics card driver is given below.

[0061] In an optional embodiment, the server's operating system is implemented as a Linux system. Accordingly, the graphics card driver added to the operating system can be implemented using an existing graphics card driver in the Linux system. FIG. 5 shows an internal implementation framework of a graphics card driver in the Linux system, including XII at the application layer and DRM (Direct Rendering Manager) at the kernel layer.

[0062]

[0061] Specifically, as shown in FIG5 , XII includes at least one X Client and an X Server. XII, also known as the X Window System, is a client-server system for graphical display, designed to manage and render graphical user interfaces (GUIs). XII allows multiple X clients to share the same display device, with each client displaying its graphical output as a window on the screen.

[0063]

[0062] X Server is the server-side component of XII, responsible for managing graphics hardware and processing graphics display requests. It interacts with display hardware (such as a video card and monitor) through device drivers, such as AMD (Advanced Micro Devices) or NVIDIA (NVIDIA) graphics drivers, and renders graphics data on the screen. X Server is specifically responsible for the following key tasks:

[0064] Initialization and startup: Loading at system startup, initializing graphics hardware, and establishing connections with hardware devices such as graphics cards and displays;

[0065] Device and display management: Communicates with graphics hardware through corresponding device drivers, identifies display devices, and configures them;

[0066] Window management: handles window creation, resource allocation, drawing window title bars and borders, and window status tracking;

[0067] Graphics rendering and output: Receive graphics requests from X Client, process and output the rendering results to the screen;

[0068]

[0067] Event processing: Capture user input events and system events and distribute them to the corresponding X Client;

[0069]

[0068] Multitasking support: allows multiple X Clients to run and display simultaneously, manages resource allocation and scheduling between them, and enables them to work together.

[0070] The X Client is the client component of XII, representing user programs or applications and providing a graphical interface to users. The X Client does not communicate directly with graphics hardware, but instead uses the X Server for graphics display. It sends graphics requests and events to the X Server, which processes and displays the graphics output on the screen. The X Client can be a variety of graphics applications, such as window managers, terminal emulators, browsers, and graphics editors. Each X Client only manages its own graphics area and is independent of each other. Specifically, the X Client is responsible for the following key tasks:

[0071] Connecting to X Server: When the X Client starts, it will try to connect to the X Server through a network socket to establish a communication channel.

[0072]

[0071] Sending a graphics request: After a successful connection, the X Client sends a graphics request to the X Server using the XII protocol, which includes creating a window, drawing graphics, setting colors, processing events, etc.

[0073]

[0072] Receive Events: The X Client is responsible for receiving events from the X Server. These events include user input (such as keyboard keystrokes and mouse clicks) and system events (such as window changes). The X Client responds to user operations or updates the interface based on these events.

[0074] Graphics rendering: The X Client uses the XII protocol's graphics rendering functions to perform graphics rendering based on the received request, including drawing graphic objects, text, and images, and encapsulates the rendering results into the XII protocol format and sends them to the X Server for display.

[0075]

[0074] Processing event responses: The X Client performs corresponding processing based on the event type and content received from the X Server. For example, for keyboard events, the X Client may process text input based on the ASCII (American Standard Code for Information Interchange) code of the keystroke; for mouse click events, the X Client may trigger corresponding operations or graphical interface updates.

[0076]

[0075] Window management: If the X Client is a graphical interface application, it will also be responsible for managing the windows it creates, including controlling the window's position, size, and display status, and processing various window operations (such as moving, resizing, maximizing, and minimizing).

[0077]

[0076] Disconnection: When the X Client ends its operation or needs to disconnect from the X Server, it will close the connection channel, release resources, and notify the X Server so that the X Server can clean up the resources corresponding to the X Client.

[0078]

[0077] Common X Clients include window managers (managing window layout and operations), terminal emulators (providing command line terminal interfaces), graphic editors (editing images and vector graphics), and browsers (browsing web pages and displaying web page content).

[0079]

[0078] Optionally, XII further includes an X Window Manager (X Window Manager), which is a special X Client responsible for managing multiple X Clients for the X server and plays the role of a window manager. Optionally, the X Window Manager can be XFCE (X Forms Common Environment, a lightweight Unix-like desktop system), KDE (K Desktop Environment), etc., which is not limited in this disclosure.

[0080] In this embodiment, DRM is a subsystem within the Linux kernel specifically designed to support graphics hardware acceleration and direct rendering. It provides an interface for accessing graphics card hardware, enabling user-space graphics applications to directly access the graphics card hardware and achieve efficient graphics rendering. The DRM subsystem includes two important components: KMS (Kernel Mode Setting) and GEM (Graphics Execution Manager), which are used for graphics hardware management and framebuffer management, respectively.

[0081]

[0080] KMS is used for graphics hardware management, allowing the operating system kernel to directly control display hardware, such as screen resolution and image display mode, without relying on user space programs (such as X Server). These tasks are transferred to the kernel through KMS, so that the display device can be automatically detected and set when the kernel starts, and the application can also dynamically change the display settings at runtime.

[0082] GEM is used for Framebuffer management and provides an interface for graphics memory management. It is specifically used to allocate and manage memory buffers of graphics hardware. These buffers are primarily used to store graphics data and rendering results. GEM also provides a memory management mechanism between graphics drivers and applications, facilitating communication between them and reducing conflicts and competition for graphics memory resources. Using the GEM interface, graphics applications can request graphics buffers and perform graphics rendering operations in these buffers. Furthermore, GEM supports memory mapping, allowing applications to directly access graphics buffers, thereby achieving more efficient graphics rendering.

[0083]

[0082] Among them, DRM involves many elements, and KMS includes Framebuffer, Plane (hardware layer), CRTC (display controller), Encoder (encoder), Connector (connector), etc. The relationship between each element is shown in Figure 6. The working content of each element is introduced in detail below:

[0084] Framebuffer: used to store image data to be displayed;

[0085] Plane: used to implement multi-layer composite display;

[0086]

[0085] CRTC: used to read the image data to be displayed from the Framebuffer and output it to the Encoder in the corresponding format;

[0087] Encoder: used to convert the output of the CRTC into a signal suitable for a specific type of display device (e.g., HDMI, VGA, etc.);

[0088]

[0087] Connector: refers to the physical interface with the display device, used to connect to the display device and transmit the generated signal to the display device.

[0089]

[0088] In this embodiment, there are multiple ways for the Connector to transmit the generated signal to the display device. In an optional embodiment, the Connector specifically implements a PCIe root device. Accordingly, the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip, which is PCIe. The video data is transmitted to the PCIe endpoint device via the PCIe root device, so that the control chip reads the video data from the PCIe endpoint device and displays the video data on a display device interconnected with the control chip, thereby realizing display control of the server. In another optional embodiment, the Connector is interconnected with the PCIe root device via an internal bus, transmits the video data to the PCIe root device, and then transmits the video data to the PCIe endpoint device via the PCIe root device, so that the control chip reads the video data from the PCIe endpoint device and displays the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

[0090]

[0089] Accordingly, an implementation of a graphics driver is described below by way of example.

[0091]

[0090] As shown in FIG7 , when the boot program is UEFI, the graphics driver loading process includes: UEFI DXE (Driver Execution Environment) → UEFI display protocol → GOP (Graphics Output Protocol) driver.

[0092] It should be noted that the stages included in the above-mentioned graphics driver are for illustration only and do not necessarily mean that the graphics driver only includes the above-mentioned stages. The following describes the stages of the graphics driver:

[0093] UEFI DXE performs most of the system initialization work. When entering this stage, memory initialization is complete. In addition, during the UEFI DXE stage, PCIe device enumeration is performed. Enumeration refers to the identification, initialization, and operation of all PCIe devices in the system. This process ensures that each device is correctly identified and resources are allocated to each device for normal operation. During this stage, PCIe endpoint devices are enumerated as display devices, ensuring that video data is correctly transmitted to PCIe endpoint devices during the UEFI boot process. In addition, after enumeration and resource allocation are completed, the memory space of each PCIe device has been determined, and the corresponding data register can be confirmed through the base address register (BAR).

[0094] The UEFI display protocol, also known as the graphics output protocol, defines which video data is stored in the display buffer; this video data includes video data generated during the boot process and after boot from mouse and keyboard interactions.

[0095]

[0094] The GOP driver is a specific implementation of the UEFI display protocol. According to the definition of the protocol, the corresponding video data is captured from the memory space and output to the PCIe endpoint device.

[0096]

[0095] In combination with the embodiments of the display driver and the graphics driver, as shown in FIG8 , the present disclosure further provides a server, the server including a main chip and a control chip interconnected via a PCIe bus; the main chip and the control chip are integrated on the same board; a PCIe root device and a PCIe endpoint device are implemented on the main chip and the control chip respectively, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; the main chip includes a first processor, the first processor runs a graphics driver, and the specific implementation of the graphics driver is shown in the embodiment shown in FIG5 , and is used to obtain video data generated by the operating system during the startup process and the operation process, and transmit the video data to the PCIe endpoint device via the PCIe root device; and the boot program of the server includes a graphics driver; the first processor runs the graphics driver, and the specific implementation of the graphics driver is shown in the embodiment shown in FIG7 , and is used to obtain video data generated by the boot program during the operation process, and transmit the video data to the PCIe endpoint device via the PCIe root device.

[0097]

[0096] In which, the base address register BAR of the PCIe endpoint device is mapped to the memory space of the PCIe root device as a video transmission channel between the main chip and the control chip; the main chip is specifically used to: write video data into the memory space of the PCIe root device, and control the PCIe root device to transmit the video data in the memory space to the cache of the PCIe endpoint device via the PCIe bus.

[0098]

[0097] Further, a data migration service is deployed on the control chip; the control chip includes a second processor, and the second processor runs the data migration service for reading video data from the PCIe endpoint device and displaying the video data on the display device to realize display control of the server.

[0099]

[0098] The display device includes a local display device; the control chip further includes: a video interconnection interface interconnected with the local display device, and a first frame buffer area providing storage services for the local display device; the second processor runs a data migration service for reading video data from a cache of a PCIe endpoint device, writing the video data into the first frame buffer area, and sending the video data in the first frame buffer area to the local display device via the video interconnection interface for display. Furthermore, the display device also includes a remote display device; a virtual network console (VNC) server is further deployed on the control chip; the second processor runs a data migration service for reading video data from a cache of the PCIe endpoint device, writing the video data into the second frame buffer area of ​​a VNC server, and controlling the VNC server to transmit the video data via a network to a remote display device for display, wherein a VNC client runs on the remote display device.

[0100]

[0099] Furthermore, the control chip includes a USB interface interconnected with an external interactive device, and the external interactive device includes a keyboard and / or a mouse; the control chip is also interconnected with the main chip through a USB bus; a USB device controller is deployed on the control chip to obtain interactive events generated by the external interactive device and transmit the interactive events to the main chip through the USB bus; a USB host controller is deployed on the main chip to receive interactive events and respond to the interactive events.

[0101]

[0100] The embodiment of the present disclosure also provides a control chip, which is applied to a server. The control chip is interconnected with the main chip of the server through a PCIe bus; the main chip and the control chip respectively implement a PCIe root device and a PCIe endpoint device, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; the control chip is used to read video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip to realize display control of the server; wherein the video data is generated by the server during startup and / or operation and transmitted by the main chip to the PCIe endpoint device via the PCIe root device.

[0102]

[0101] In an optional embodiment, a data migration service is deployed on the control chip; the control chip includes a processor, and the processor runs the data migration service to read video data from the PCIe endpoint device and display the video data on the display device to achieve display control of the server.

[0103]

[0102] In an optional embodiment, the display device includes a local display device; the management and control chip also includes: a video interconnection interface interconnected with the local display device, and a first frame buffer area that provides storage services for the local display device; the processor is specifically used to: read video data from the cache of the PCIe endpoint device, write the video data into the first frame buffer area, and send the video data in the first frame buffer area to the local display device through the video interconnection interface for display.

[0104]

[0103] In an optional embodiment, the control chip includes a serial interface interconnected with an external interactive device, and the external interactive device includes a keyboard and / or a mouse; the control chip is also interconnected with the main chip via a serial bus, and the serial interface and the serial bus belong to the same serial bus protocol; the processor in the control chip is also used to: obtain interactive events generated by the external interactive device, and transmit the interactive events to the main chip via the serial bus, so that the main chip responds to the interactive events and realizes interactive control of the server.

[0105]

[0104] In an optional embodiment, the serial interface is a universal serial bus (USB) interface, and the serial bus is a USB bus.

[0106]

[0105] The embodiment of the present disclosure also provides a main chip, which is applied to a server. The main chip is interconnected with a control chip of the server through a PCIe bus; a PCIe root device and a PCIe endpoint device are respectively implemented on the main chip and the control chip, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; the main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device via the PCIe root device, so that the control chip can read the video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

[0107]

[0106] In an optional embodiment, the server's operating system includes a graphics driver; the main chip includes a processor, and the processor runs the graphics driver to obtain video data generated by the operating system during startup and operation, and transmits the video data to the PCIe endpoint device via the PCIe root device; and / or, the server's boot program includes a graphics driver; the processor runs the graphics driver to obtain video data generated by the boot program during operation, and transmits the video data to the PCIe endpoint device via the PCIe root device.

[0107] Accordingly, an embodiment of the present disclosure provides a server board, which integrates a main chip and a control chip, and the main chip and the control chip are interconnected via a PCIe bus; the PCIe root device and the PCIe endpoint device are respectively implemented on the main chip and the control chip, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip;

[0108]

[0108] The main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device via the PCIe root device; the control chip is used to read the video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip to realize display control of the server.

[0109]

[0109] In an optional embodiment, the control chip has a serial interface for interconnecting external interactive devices, which include a keyboard and / or a mouse; the control chip is also interconnected with the main chip via a serial bus, and the serial interface and the serial bus belong to the same serial bus protocol; the control chip is also used to: obtain interactive events generated by external interactive devices, and transmit the interactive events to the main chip via the serial bus; the main chip is also used to: receive interactive events and respond to the interactive events to achieve interactive control of the server.

[0110]

[0110] As shown in FIG9, an embodiment of the present disclosure further provides a server management and control method, which is applied to a main chip in the server, wherein the main chip communicates with the management and control chip via a PCIe bus; PCIe root devices and PCIe endpoint devices are implemented on the main chip and the management and control chip, respectively, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the management and control chip; the method includes steps S901 and S902.

[0111]

[0111] S901: Obtain video data generated by the server during startup and / or operation.

[0112]

[0112] S902: The video data is transmitted to the PCIe endpoint device via the PCIe root device, so that the control chip reads the video data from the PCIe endpoint device and displays the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

[0113]

[0113] In an optional embodiment, the base address register BAR of the PCIe endpoint device is mapped to the memory space of the PCIe root device as a video transmission channel between the main chip and the control chip; the video data is transmitted to the PCIe endpoint device via the PCIe root device, including: writing the video data into the memory space of the PCIe root device, and controlling the PCIe root device to transmit the video data in the memory space to the cache of the PCIe endpoint device via the PCIe bus.

[0114]

[0114] As shown in FIG10, an embodiment of the present disclosure further provides a server management and control method, which is applied to a management and control chip in a server, wherein the management and control chip is connected to a main chip via a PCIe bus; a PCIe root device and a PCIe endpoint device are implemented on the main chip and the management and control chip respectively, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the management and control chip; the method includes steps S1001 and S1002.

[0115]

[0115] S1001: Read video data from the PCIe endpoint device. The video data is generated by the server during startup and / or operation and is transmitted from the main chip to the PCIe endpoint device via the PCIe root device.

[0116]

[0116] S1002: Display the video data on a display device interconnected with the control chip to implement display control of the server.

[0117]

[0117] In an optional embodiment, the display device includes a local display device, and the video data is displayed on the display device interconnected with the control chip, including: reading the video data from the cache of the PCIe endpoint device, and writing the video data into the first frame cache area corresponding to the local display device; sending the video data in the first frame cache area to the local display device for display through the video interconnection interface.

[0118]

[0118] In an optional embodiment, the display device includes a remote display device; displaying the video data on the display device interconnected with the control chip includes: reading the video data from the cache of the PCIe endpoint device, and writing the video data into the second frame cache area corresponding to the VNC server; controlling the VNC server to transmit the video data to the remote display device via the network for display, and a VNC client is running on the remote display device.

[0119]

[0119] In an optional embodiment, the method further includes: obtaining an interaction event generated by an external interactive device interconnected with the control chip; transmitting the interaction event to the main chip through a serial bus between the control chip and the main chip, so that the main chip responds to the interaction event and realizes interactive control of the server.

[0120]

[0120] The detailed implementation and beneficial effects of each step in the method of this embodiment have been described in detail in the aforementioned embodiments and will not be elaborated here.

[0121] It should be noted that the execution entity of each step of the method provided in the above embodiment may be the same device, or the method may be executed by different devices. For example, the execution entity of steps 901 to 902 may be device A; for another example, the execution entity of step 901 may be device A, and the execution entity of step 902 may be device B; and so on.

[0122]

[0122] In addition, some of the processes described in the above embodiments and accompanying drawings include multiple operations that appear in a specific order. However, it should be understood that these operations may not be executed in the order in which they appear herein or may be executed in parallel. Operation sequence numbers, such as 901 and 902, are merely used to distinguish between different operations and do not represent any specific order of execution. Furthermore, these processes may include more or fewer operations, and these operations may be executed sequentially or in parallel. It should be noted that terms such as "first" and "second" herein are used to distinguish between different messages, devices, modules, etc., and do not represent a specific order of precedence, nor do they limit "first" and "second" to different types.

[0123]

[0123] Accordingly, an embodiment of the present disclosure further provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the processor is enabled to implement each step in the above method embodiment.

[0124]

[0124] Accordingly, an embodiment of the present disclosure further provides a computer program product, which includes a computer program / instruction. When the computer program / instruction is executed by a processor, the processor is enabled to implement the steps in the above method embodiment.

[0125]

[0125] The above-mentioned memory can be implemented by any type of volatile or non-volatile memory device or a combination thereof, such as static random-access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0126] The communication component is configured to facilitate wired or wireless communication between the device containing the communication component and other devices. The device containing the communication component can access wireless networks based on communication standards, such as WiFi, 2G, 3G, and 4G / LTE.

[0126] 5G and other mobile communication networks, or a combination thereof. In an exemplary embodiment, the communication component receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component further includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0127]

[0127] The display includes a screen, which may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a user. The touch panel includes one or more touch sensors to sense touches, slides, and gestures on the touch panel. The touch sensor may not only sense the boundaries of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation.

[0128]

[0128] The power supply assembly provides power to various components of the device in which the power supply assembly is located. The power supply assembly may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the device in which the power supply assembly is located.

[0129]

[0129] The audio component may be configured to output and / or input audio signals. For example, the audio component includes a microphone (MIC), and when the device where the audio component is located is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is configured to receive an external audio signal. The received audio signal may be further stored in a memory or sent via a communication component. In some embodiments, the audio component further includes a speaker for outputting the audio signal.

[0130]

[0130] Those skilled in the art will appreciate that the embodiments of the present disclosure may be provided as methods, systems, or computer program products. Therefore, the present disclosure may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present disclosure may take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to magnetic disk storage, compact disc read-only memory (CD-ROM), optical storage, etc.) containing computer-usable program code.

[0131] The present disclosure is described with reference to the flow chart and / or block diagram according to the method, equipment (system) and computer program product of the embodiment of the present disclosure.It should be understood that each flow process and / or box in the flow chart and / or block diagram and the combination of the flow process and / or box in the flow chart and / or block diagram can be realized by computer program instructions.These computer program instructions can be provided to the processor of general-purpose computer, special-purpose computer, embedded processor or other programmable data processing equipment to produce a machine, so that the instruction executed by the processor of computer or other programmable data processing equipment produces the device for realizing the function specified in flow chart one flow process or multiple flow processes and / or block diagram one box or multiple boxes.

[0132]

[0132] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0133]

[0133] These computer program instructions may also be loaded onto a computer or other programmable data processing device so that a series of operating steps are performed on the computer or other programmable device to produce computer-implemented processing, whereby the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0134]

[0134] In a typical configuration, a computing device includes one or more processors (Central Processing Unit, CPU), input / output interface, network interface and memory.

[0135]

[0135] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash memory.

[0136] (flash RAM). Memory is an example of a computer-readable medium.

[0137]

[0136] Computer-readable media include permanent and non-permanent, removable and non-removable media that can be used to store information using any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change random access memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape, disk storage or other magnetic storage devices, or any other non-transmitting media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media, such as modulated data signals and carrier waves.

[0138]

[0137] It should also be noted that the terms "comprise," "include," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or device comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, commodity, or device. In the absence of further limitations, an element defined by the phrase "comprising a . . . . " does not preclude the presence of other identical elements in the process, method, commodity, or device comprising the element.

[0139]

[0138] The above are merely embodiments of the present disclosure and are not intended to limit the present disclosure. For those skilled in the art, the present disclosure may have various modifications and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure should be included within the scope of the claims of the present disclosure.

Claims

Claims 1. A server, comprising: The main chip and control chip are interconnected through the PCIe bus; Implementing a PCIe root device and a PCIe endpoint device on the master chip and the control chip, respectively, wherein the PCIe root device and the PCIe endpoint device form a video transmission channel between the master chip and the control chip; The main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device via the PCIe root device; The control chip is configured to read the video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip, thereby implementing display control of the server.

2. The server according to claim 1, wherein: The server's operating system includes a graphics card driver; the main chip includes a first processor, the first processor runs the graphics card driver, and is configured to obtain video data generated by the operating system during startup and operation, and transmit the video data to the PCIe endpoint device via the PCIe root device; and / or the boot program of the server includes a graphics driver; the first processor runs the graphics driver to obtain video data generated during the running of the boot program, and transmits the video data to the PCIe endpoint device via the PCIe root device.

3. The server according to claim 1, wherein: A data migration service is deployed on the control chip; the control chip includes a second processor, and the second processor runs the data migration service to read the video data from the PCIe endpoint device and display the video data on the display device to achieve display control of the server.

4. The server according to claim 3, wherein: The display device includes a local display device; the control chip also includes: a video interconnection interface interconnected with the local display device, and a first frame buffer area providing storage services for the local display device; the second processor runs the data migration service to read the video data from the cache of the PCIe endpoint device, write the video data into the first frame buffer area, and send the video data in the first frame buffer area to the local display device through the video interconnection interface for display; and / or, the display device includes a remote display device; a virtual network console VNC server is also deployed on the control chip; the second processor runs the data migration service to read the video data from the cache of the PCIe endpoint device, write the video data into the second frame buffer area of ​​the VNC server, and control the VNC server to transmit the video data to the remote display device via the network for display, and a VNC client is running on the remote display device.

5. The server according to claim 1, wherein: The control chip includes a serial interface interconnected with an external interactive device, wherein the external interactive device includes a keyboard and / or a mouse; the control chip is also interconnected with the main chip via a serial bus, and the serial interface and the serial bus belong to the same serial bus protocol; The control chip is further configured to obtain interaction events generated by the external interaction device and transmit the interaction events to the main chip via the serial bus. The main chip is further configured to receive the interaction events and respond to the interaction events to implement interaction control of the server.

6. The server according to claim 5, wherein: The serial interface is a universal serial bus (USB) interface, and the serial bus is a USB bus. A USB device controller is deployed on the management and control chip, which is used to obtain interaction events generated by the external interactive device and transmit the interaction events to the main chip through the serial bus. The main chip is provided with a USB host controller for receiving the interaction event and responding to the interaction event.

7. The server according to any one of claims 1 to 6, wherein: The base address register BAR of the PCIe endpoint device is mapped to the memory space of the PCIe root device as a video transmission channel between the main chip and the control chip; The master chip is specifically configured to write the video data into the memory space of the PCIe root device, and control the PCIe root device to transmit the video data in the memory space to the cache of the PCIe endpoint device via the PCIe bus.

8. A server, comprising: Main chip and control chip; A bus controller and a bus device are implemented on the master chip and the control chip respectively, and the bus controller and the bus device are interconnected via a target bus to form a video transmission channel between the master chip and the control chip; The main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the bus device via the bus controller; The control chip is configured to read the video data from the bus device and display the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

9. A control chip, applied to a server, wherein: The control chip is interconnected with the main chip of the server via a PCIe bus; a PCIe root device and a PCIe endpoint device are implemented on the main chip and the control chip respectively, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; The control chip is configured to read video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip, thereby implementing display control of the server; The video data is generated by the server during startup and / or operation and is transmitted by the main chip to the PCIe endpoint device via the PCIe root device.

10. The control chip according to claim 9, wherein: A data migration service is deployed on the control chip; the control chip includes a processor, and the processor runs the data migration service to read the video data from the PCIe endpoint device and display the video data on the display device to achieve display control of the server.

11. The control chip according to claim 10, wherein: The display device includes a local display device; The control chip also includes: a video interconnection interface interconnected with the local display device, and a first frame buffer area providing storage services for the local display device; the processor is specifically used to: read the video data from the cache of the PCIe endpoint device, write the video data into the first frame buffer area, and send the video data in the first frame buffer area to the local display device for display through the video interconnection interface; and / or, the display device includes a remote display device; a virtual network console VNC server is also deployed on the control chip; the processor is specifically used to: read the video data from the cache of the PCIe endpoint device, write the video data into the second frame buffer area of ​​the VNC server, and control the VNC server to transmit the video data to the remote display device for display via the network, and a VNC client is running on the remote display device.

12. The control chip according to any one of claims 9 to 11, wherein: The control chip includes a serial interface for interconnecting with an external interactive device, wherein the external interactive device includes a keyboard and / or a mouse. The control chip is also interconnected with the main chip via a serial bus, and the serial interface and the serial bus belong to the same serial bus protocol. The processor in the control chip is further used to: obtain interaction events generated by the external interactive device and transmit the interaction events to the main chip via the serial bus, so that the main chip can respond to the interaction events and implement interactive control of the server.

13. A main chip is used in a server, wherein: The main chip is interconnected with the control chip of the server via a PCIe bus; Implementing a PCIe root device and a PCIe endpoint device on the master chip and the control chip, respectively, wherein the PCIe root device and the PCIe endpoint device form a video transmission channel between the master chip and the control chip; The main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device via the PCIe root device, so that the management and control chip can read the video data from the PCIe endpoint device and display the video data on a display device interconnected with the management and control chip, thereby realizing display control of the server.

14. A server board, wherein a main chip and a control chip are integrated on the server board, and the main chip and the control chip are interconnected via a PCIe bus; Implementing a PCIe root device and a PCIe endpoint device on the master chip and the control chip, respectively, wherein the PCIe root device and the PCIe endpoint device form a video transmission channel between the master chip and the control chip; The main chip is used to obtain video data generated by the server during startup and / or operation, and transmit the video data to the PCIe endpoint device via the PCIe root device; The control chip is configured to read the video data from the PCIe endpoint device and display the video data on a display device interconnected with the control chip, thereby implementing display control of the server.

15. A server management and control method, applied to a main chip in the server, wherein the main chip is connected to a management and control chip via a PCIe bus; PCIe root device and PCIe endpoint settings are implemented on the main chip and the management and control chip respectively. The PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the control chip; The method comprises: Acquiring video data generated by the server during startup and / or operation; The video data is transmitted to the PCIe endpoint device via the PCIe root device, so that the control chip reads the video data from the PCIe endpoint device and displays the video data on a display device interconnected with the control chip, thereby realizing display control of the server.

16. A server management and control method, applied to a management and control chip in the server, wherein the management and control chip communicates with a main chip via a PCIe bus; a PCIe root device and a PCIe endpoint device are implemented on the main chip and the management and control chip, respectively, and the PCIe root device and the PCIe endpoint device form a video transmission channel between the main chip and the management and control chip; the method comprising: Reading video data from the PCIe endpoint device, where the video data is generated by the server during startup and / or operation and transmitted by the main chip to the PCIe endpoint device via the PCIe root device; and displaying the video data on a display device interconnected with the management and control chip to implement display control of the server.

17. The method according to claim 16, wherein: The display device includes a local display device, and the video data is displayed on the display device interconnected with the control chip, including: reading the video data from the cache of the PCIe endpoint device, and writing the video data into the first frame cache area corresponding to the local display device; sending the video data in the first frame cache area to the local display device through the video interconnection interface for display; and / or, the display device includes a remote display device; displaying the video data on the display device interconnected with the control chip includes: reading the video data from the cache of the PCIe endpoint device, and writing the video data into the second frame cache area corresponding to the VNC server; controlling the VNC server to transmit the video data to the remote display device via the network for display, and a VNC client is running on the remote display device.

18. A computer-readable storage medium storing a computer program / instruction, wherein: When the computer program is executed by a processor, the processor is enabled to implement the steps of the method according to any one of claims 15 to 17.

19. A computer program product comprising: A computer program / instruction, wherein, when the computer program / instruction is executed by a processor, the processor is enabled to implement the steps of the method according to any one of claims 15 to 17. 21

Images