Light-receiving device and distance measuring device

Abstract

This light-receiving device comprises a light-receiving unit (3), a clock unit (14), a reception unit (15), a phase shift unit (15), and a calculation unit (16). The light-receiving unit (3) receives reflected light emitted from a light source unit (2) and reflected by a target object (4). The clock unit (14) outputs a first clock signal (sensor clock signal). The reception unit (15) receives a detection trigger signal (histogram generation trigger signal) for detecting the light reception timing of the reflected light synchronized with a light emission trigger signal for controlling the light emission timing of the light source unit (2). The phase shift unit (15) detects phase difference information related to the phase difference of the detection trigger signal with respect to the first clock signal, and outputs a second clock signal (phase shift clock signal) in which the phase of the first clock signal is shifted in accordance with the detected phase difference information. The calculation unit (16) detects the light reception timing on the basis of the second clock signal, and calculates duration information regarding the duration from the light emission timing to the light reception timing.

Description

Light receiving device and distance measuring device

[0001] The present technology relates to a light receiving device and a distance measuring device.

[0002] One known distance measurement method for measuring the distance to a target object using light is the direct Time of Flight (ToF) method. Direct ToF distance measurement measures the time difference between the emission of light from a light source and the reception of the light reflected by the target object by a light receiving element, and determines the distance to the target object based on the measured time difference.

[0003] In the distance measuring device described in Patent Document 1, improved distance measurement accuracy is achieved by measuring the time difference between the timing at which a light emission trigger to cause the light source unit to emit light is issued and the timing at which the feedback signal output in response to the timing at which the light source unit emits light is received by the sensor IC.

[0004] Japanese Patent Application Laid-Open No. 2020-153909

[0005] Thus, there is a demand for a technology that enables highly accurate distance measurement in the direct ToF method.

[0006] In view of the above circumstances, an object of the present technology is to provide a light receiving device and a distance measuring device that enable highly accurate distance measurement in a direct ToF system.

[0007] In order to achieve the above object, a light receiving device according to an embodiment of the present technology includes a light receiving unit, a clock unit, a receiving unit, a phase shift unit, and a calculating unit. The light receiving unit receives light emitted from a light source unit and reflected by a target object. The clock unit outputs a first clock signal. The receiving unit receives a detection trigger signal for detecting a light receiving timing of the reflected light synchronized with an emission trigger signal for controlling an emission timing of the light source unit. The phase shift unit detects phase difference information regarding a phase difference of the detection trigger signal with respect to the first clock signal, and outputs a second clock signal in which the phase of the first clock signal is shifted in accordance with the detected phase difference information. The calculating unit detects the light receiving timing based on the second clock signal, and calculates time information from the emission timing to the light receiving timing.

[0008] In this light receiving device, phase difference information of the detection trigger signal relative to the first clock signal is detected, and a second clock signal is output in which the phase of the first clock signal is shifted in accordance with the phase difference information. Then, light reception timing is detected based on the second clock signal, and time information from the light emission timing of the light source unit to the light reception timing is calculated. This makes it possible to suppress the influence of the phase difference of the detection trigger signal relative to the first clock signal on the detection of the light reception timing. As a result, it becomes possible to accurately calculate time information from the light emission timing of the light source unit to the light reception timing of the reflected light, enabling highly accurate distance measurement using the direct ToF method.

[0009] The receiving unit may receive the detection trigger signal synchronized with the light emission trigger signal for each of a plurality of light emissions from the light source unit. In this case, the phase shift unit may detect the phase difference information for each of the plurality of light emissions and output the second clock signal. The calculating unit may detect the light reception timing for each of the plurality of light emissions based on the second clock signal, thereby generating a histogram of time information from the light emission timing to the light reception timing.

[0010] The light receiving unit may include a light receiving element that receives the reflected light and outputs a light receiving signal. In this case, the calculation unit may start sampling the light receiving signal at a sampling frequency higher than a frequency of the first clock signal based on the second clock signal, and detect the light receiving timing based on the number of samplings until the sampled value reaches a peak.

[0011] The phase shift unit may detect the phase difference information with a time resolution equal to or greater than the sampling frequency.

[0012] The calculation unit may start sampling the received signal in synchronization with a rising edge of the second clock signal a predetermined number of clocks after a first rising edge of the second clock signal after receiving the detection trigger signal.

[0013] The calculation unit may start sampling the received signal in synchronization with a falling edge of the second clock signal a predetermined number of clocks after a first falling edge of the second clock signal after receiving the detection trigger signal.

[0014] If L=360 / M (M is a divisor of 360 excluding 1 and 360), the phase shift unit may detect the phase difference information using the first clock signal and M−1 phase-shifted clock signals obtained by shifting the phase of the first clock signal by L degrees. Furthermore, the phase shift unit may output one of the first clock signal and the M−1 phase-shifted clock signals as the second clock signal based on the detected phase difference information.

[0015] The phase shift unit may detect, as the phase difference information, which of M phase difference ranges the phase difference of the detection trigger signal with respect to the first clock signal falls within, the range being defined as a range of greater than (N−1)L degrees and less than NL degrees (N is an integer from 1 to M). Furthermore, the phase shift unit may output the first clock signal as the second clock signal when the phase difference falls within a phase difference range of greater than 0 degrees and less than L degrees, and may output the phase-shifted clock signal, in which the phase of the first clock signal is shifted by (C−1)L degrees, as the second clock signal when the phase difference falls within a phase difference range of greater than (C−1)L degrees and less than CL degrees (C is an integer from 2 to M).

[0016] The phase shift unit may detect the phase difference information using the first clock signal, a first phase-shifted clock signal obtained by shifting the phase of the first clock signal by 90 degrees, a second phase-shifted clock signal obtained by shifting the phase of the first clock signal by 180 degrees, and a third phase-shifted clock signal obtained by shifting the phase of the first clock signal by 270 degrees. Furthermore, the phase shift unit may output one of the first clock signal, the first phase-shifted clock signal, the second phase-shifted clock signal, and the third phase-shifted clock signal as the second clock signal based on the detected phase difference information.

[0017] The phase shift unit may detect, as the phase difference information, whether the phase difference of the detection trigger signal with respect to the first clock signal is within a first phase difference range greater than 0 degrees and less than 90 degrees, a second phase difference range greater than 90 degrees and less than 180 degrees, a third phase difference range greater than 180 degrees and less than 270 degrees, or a fourth phase difference range greater than 270 degrees and less than 360 degrees. Furthermore, the phase shift unit may output the first clock signal as the second clock signal when the phase difference is within the first phase difference range, output the first phase-shifted clock signal as the second clock signal when the phase difference is within the second phase difference range, output the second phase-shifted clock signal as the second clock signal when the phase difference is within the third phase difference range, and output the third phase-shifted clock signal as the second clock signal when the phase difference is within the third phase difference range.

[0018] A distance measuring device according to one aspect of the present technology includes a light source unit, a light receiving unit, and a control unit. The light receiving unit receives light emitted from the light source unit and reflected by a target object. The control unit generates an emission trigger signal for controlling the emission timing of the light source unit based on a predetermined clock signal, outputs the signal to the light source unit, and generates a detection trigger signal for detecting the reception timing of the reflected light synchronized with the emission trigger signal based on the predetermined clock signal, outputs the detection trigger signal to the light receiving unit. The light receiving unit includes the light receiving unit, the clock unit, the receiving unit, the phase shift unit, and the calculation unit. The control unit calculates the distance to the target object based on the time information calculated by the light receiving unit.

[0019] 1 is a diagram schematically illustrating distance measurement using a direct ToF method by a distance measuring device. FIG. 1 is a diagram illustrating an example of a histogram of time difference. FIG. 2 is a diagram illustrating an example of a LiDAR system employing distance measurement using a direct ToF method. FIG. 3 is a timing chart illustrating the effect of a clock timing deviation on distance measurement accuracy (ideal state with zero deviation). FIG. 4 is a timing chart illustrating the effect of a clock timing deviation on distance measurement accuracy (with deviation). FIG. 5 is a timing chart illustrating the effect of a clock timing deviation on distance measurement accuracy (with deviation). FIG. 6 is a block diagram illustrating a basic configuration of a sensor IC according to the present technology. FIG. 7 is a timing chart illustrating an example of a basic operation of the sensor IC. FIG. 8 is a schematic diagram illustrating a specific configuration example of the sensor IC. FIG. 9 is a schematic diagram illustrating an example of a circuit configuration of a phase measurement circuit. FIG. 10 is a timing chart illustrating an example of detection of phase difference information by the phase measurement circuit. FIG. 11 is a flowchart illustrating an example of operation from reception of a histogram generation trigger signal by the sensor IC to generation of a histogram. FIG. 12 is a timing chart illustrating an example of operation of the sensor IC. It is a timing chart showing an example of the operation of a sensor IC. It is a schematic diagram showing an example of the use of a distance measuring device and a distance measuring system according to the present technology. It is a block diagram showing an example of a schematic configuration of a vehicle control system. It is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit.

[0020] Hereinafter, embodiments of the present technology will be described with reference to the drawings.

[0021] [Principle of distance measurement by direct ToF method] The principle of distance measurement by the direct ToF method will be described. The direct ToF method is a method in which light emitted from a light source unit and reflected by a target object is received by a light receiving unit, and distance measurement is performed based on the time difference between the light emission timing and the light reception timing.

[0022] Fig. 1 is a diagram showing a direct ToF distance measurement by a distance measuring device. As shown in Fig. 1, the distance measuring device 1 includes a light source unit 2 and a light receiving unit 3. The light source unit 2 is, for example, a laser diode, and is driven to emit pulsed laser light.

[0023] The pulsed light L1 emitted from the light source unit 2 is reflected by the target object 4 and received as reflected light L2 by the light receiving unit 3. The light receiving unit 3 includes a light receiving element that converts light into an electrical signal by photoelectric conversion, and outputs a light receiving signal corresponding to the received light.

[0024] The time difference between the light emission timing of the light source unit 2 and the light reception timing of the light receiving unit 3 receiving the reflected light L2 from the target object 4 is defined as t1. The constant c is the speed of light (2.9979×10 8 [m / sec]), the distance D between the distance measuring device 1 and the target object 4 is calculated by the following equation (1).

[0025] D=(c×t1) / 2...(1)

[0026] The distance measuring device 1 repeatedly executes the above-described process multiple times. That is, the light reception timing is detected for each of the multiple light emissions from the light source unit 2, and the time difference t1 is calculated. Note that the time difference t1 corresponds to an embodiment of time information from the light emission timing to the light reception timing according to the present technology.

[0027] It should be noted that the light received by the light receiving unit 3 is not limited to the reflected light L2, and may also receive, for example, ambient light around the distance measuring device 1 (light receiving unit 3). For example, if the time difference t1 is calculated at the timing when the ambient light is received and equation (1) is calculated, the calculated distance D will be a value different from the distance to the target object 4.

[0028] In this embodiment, the distance measuring device 1 classifies the time difference t1 from the light emission timing to the light reception timing based on classes (bins) and generates a histogram.

[0029] 2 is a schematic diagram showing an example of a histogram of the time difference t1. In FIG. 2, the horizontal axis represents bins (time widths), and the vertical axis represents the frequency of each bin. The bins are obtained by classifying the time difference t1 into predetermined unit time d.

[0030] Therefore, bin #0 has 0≦t1<d, bin #1 has d≦t1<2d, and the time difference t1 is classified into n+1 bins up to bin #n. For example, the number of bins is determined by the value obtained by dividing the exposure time of the light receiving unit 3 by the unit time d. Of course, this is not limitative.

[0031] The distance measuring device 1 counts the number of times the time difference t1 is acquired based on the bin, calculates the frequency for each bin, and generates a histogram. As described above, the light receiving unit 3 also receives ambient light and the like other than the reflected light L2. Such ambient light and the like other than the reflected light L2 is light that is randomly incident on the light receiving unit 3 and becomes noise in the reflected light L2 that is the detection target.

[0032] The reflected light L2 to be detected is light received by the light receiving unit 3 according to the distance to the target object 4, and the frequency of the obtained time difference t1 increases, showing a peak in the histogram. The bin corresponding to the frequency of this peak is the bin corresponding to the distance to the target object 4.

[0033] The distance measuring device 1 calculates the distance D to the target object 4 according to equation (1), using the representative time of the bin indicating the peak (for example, the time at the center of the bin) as the time difference t1. In this way, by using multiple light reception results, it is possible to achieve highly accurate distance measurement with the influence of random noise sufficiently suppressed.

[0034] 3 is a schematic diagram showing an example of a LiDAR system 6 employing direct ToF ranging. The LiDAR system 6 includes a host IC 7, a driver IC 8, a laser 9, a sensor IC 10, and a pixel array 11.

[0035] The LiDAR system 6 shown in Fig. 3 is an embodiment of the distance measuring device 1 shown in Fig. 1. The driver IC 8 and laser 9 shown in Fig. 3 are included in the light source unit 2 shown in Fig. 1. The sensor IC 10 and pixel array 11 are included in the light receiving unit 3 shown in Fig. 1.

[0036] The host IC 7 controls the overall operation of the LiDAR system 6, for example, in accordance with a pre-installed program. The specific circuit configuration of the host IC 7 is not limited, and any configuration may be adopted. Any hardware and software may be used to realize the host IC 7. For example, a programmable logic device (PLD) such as a field programmable gate array (FPGA), or other devices such as an application specific integrated circuit (ASIC), may be used.

[0037] 3, in this embodiment, the host IC 7 generates a laser emission trigger signal for controlling the emission timing of the laser 9 and outputs it to the driver IC 8. The host IC 7 also generates a histogram generation trigger signal and outputs it to the sensor IC 10.

[0038] As described above, the histogram of the time difference t1 shown in Fig. 2 is generated by detecting the reception timing of the reflected light L2 and calculating the time difference t1. The histogram generation trigger signal shown in Fig. 3 is one embodiment of a detection trigger signal for detecting the reception timing of the reflected light L2 according to the present technology.

[0039] The host IC 7 generates and outputs a laser emission trigger signal based on a clock signal (hereinafter referred to as a host clock signal) generated by, for example, a PLL (Phase-Locked Loop) circuit or the like within the host IC 7. The host IC 7 also generates and outputs a histogram generation trigger signal based on the same host clock signal.

[0040] The host IC 7 also generates the laser emission trigger signal and the histogram generation trigger signal as trigger signals synchronized with each other, i.e., the histogram generation trigger signal is a trigger signal synchronized with the laser emission trigger signal.

[0041] The driver IC 8 drives the laser 9 to emit pulsed light L1 based on the laser emission trigger signal output from the host IC 7. The specific circuit configuration of the driver IC is not limited and may be designed arbitrarily. The driver IC 8 does not generate a clock signal, and instead drives the laser 9 in response to receiving the laser emission trigger signal.

[0042] The laser 9 emits pulsed light L1 under the control of a driver IC. The specific configuration of the laser 9 is not limited and may be designed arbitrarily. For example, a VCSEL (Vertical Cavity Surface Emitting Laser) that emits laser light as a surface light source can be used as the laser 9. It is also possible to use an array in which laser diodes are arranged in a line, and to employ a configuration in which the laser light emitted from the laser diode array is scanned in a direction perpendicular to the line. It is also possible to employ a laser diode as a single light source, and to employ a configuration in which the laser light emitted from the laser diode is scanned in both horizontal and vertical directions.

[0043] The pixel array 11 includes a plurality of pixels arranged in an array. Each pixel includes a light-receiving element that converts light into an electrical signal through photoelectric conversion and outputs a light-receiving signal (also referred to as a pixel signal) corresponding to the received light. Examples of light-receiving elements that can be used include a PN junction, a PD (PhotoDiode), an APD (Avalanche PhotoDiode), and a SPAD (Single Photon Avalanche Diode).

[0044] The pixel array 11 can control the readout of light-receiving signals from each pixel by a pixel control circuit (not shown). For example, the pixel array 11 may be divided into a plurality of pixel regions, and light-receiving signals may be read for each pixel region in response to multiple emissions of the laser 9. This makes it possible to perform multiple emissions and readout of light-receiving signals in a single scan of the entire pixel array 11.

[0045] Furthermore, when reading is performed from multiple pixels for one light emission, multiple light reception signals read from the multiple pixels may be integrated. For example, an average value of the multiple light reception signals may be calculated and used.

[0046] The light reception signal read out from each pixel of the pixel array 11 is output to the sensor IC 10. The light reception signal read out from each pixel of the pixel array 11 is one embodiment of a light reception signal output by receiving reflected light L2 according to the present technology.

[0047] The sensor IC 10 receives the histogram generation trigger signal. Based on the histogram generation trigger signal, the sensor IC 10 detects the timing of reception of the reflected light L2 and calculates the time difference t1 between the emission timing and the reception timing. The sensor IC 10 calculates the time difference t1 for each of the multiple emissions of the laser 9, and generates the histogram shown in FIG. 2.

[0048] In this embodiment, the sensor IC 10 starts sampling the light reception signal output from the pixel array 11 at a predetermined sampling frequency based on the histogram generation trigger signal. Then, the light reception timing is detected based on the number of samples taken until the sampled value reaches a peak. The sampling of the light reception signal will be described in detail later.

[0049] The sensor IC 10 samples the received light signal based on a clock signal (hereinafter referred to as a sensor clock signal) generated by, for example, a PLL circuit or the like within the sensor IC 10. It is difficult to always perfectly synchronize the host clock signal generated within the host IC with the sensor clock signal generated within the sensor IC.

[0050] The specific circuit configuration of the sensor IC 10 is not limited, and any configuration may be adopted. Any hardware and software may be used to realize the sensor IC 10. For example, a PLD such as an FPGA, or other devices such as an ASIC may be used.

[0051] [Study on the impact of clock timing deviation on distance measurement accuracy] The inventor studied how the clock timing deviation between the host IC 7, which operates based on a host clock signal, and the sensor IC 10, which operates based on a sensor clock signal, affects the calculation of the distance to the target object 4.

[0052] 4 to 6 are timing charts for explaining the influence of clock timing deviation on distance measurement accuracy.

[0053] The "clock in the host IC" shown in Figures 4 to 6 refers to the host clock signal. In this embodiment, a pulse signal with a frequency of 250 MHz is generated as the host clock signal. In other words, the clock frequency of the host clock signal is 250 MHz, and the clock period is 4 ns.

[0054] The "laser emission trigger signal" is a laser emission trigger signal generated based on the host clock signal by the host IC 7. As shown in Figures 4 to 6, in this embodiment, the laser emission trigger signal is generated in synchronization with the rising edge of a predetermined clock (pulse) of the host clock signal.

[0055] 4 to 6, it is assumed that the "laser emission trigger signal" is input to the driver IC 8 at the timing when the "laser emission trigger signal" is generated.

[0056] "Laser light (laser output)" represents the pulsed light L1 emitted from the laser 9 based on the "laser emission trigger signal." In Figures 4 to 6, the pulsed light L1 is shown at the position of the emission timing.

[0057] 4 to 6, a laser control delay occurs from when the "laser emission trigger signal" is input to the driver IC 8 until the pulsed light L1 is emitted. This laser control delay can be grasped as a known parameter.

[0058] "Reflected light (sensor input)" represents the reflected light L2 received by the light receiving unit 3 (pixel array 11). In Figures 4 to 6, the reflected light L2 is illustrated at the position of the light reception timing. Furthermore, "reflected light (sensor input)" is illustrated so as to correspond to the analog waveform of the light reception signal output together with the light reception.

[0059] The "histogram generation trigger signal" is a histogram generation trigger signal generated based on the host clock signal by the host IC 7. As shown in Figures 4 to 6, the histogram generation trigger signal is generated in synchronization with the rising edge of a predetermined clock of the host clock signal.

[0060] 4 to 6, it is assumed that the "histogram generation trigger signal" is input to the sensor IC 10 at the timing when the "histogram generation trigger signal" is generated.

[0061] The clock edge of the host clock signal may be the falling edge of the clock, i.e., the present technology is applicable even when the laser emission trigger signal and the histogram generation trigger signal are generated in synchronization with the falling edge of the host clock signal.

[0062] The "clock in the sensor IC" refers to the sensor clock signal. In this embodiment, a pulse signal with a frequency of 250 MHz, similar to the host clock signal, is generated as the sensor clock signal. That is, the clock frequency of the sensor clock signal is also 250 MHz, and the clock period is 4 ns.

[0063] The "reflected light sampling clock" is a clock signal for sampling the light reception signal output from the pixel array 11 in response to reception of the reflected light L2. The light reception signal is sampled based on the "reflected light sampling clock." Therefore, the "reflected light sampling clock" corresponds to the sampling frequency.

[0064] In this embodiment, the received light signal is sampled at a sampling frequency of 1 GHz, so the sampling interval is 1 ns.

[0065] In this embodiment, after the sensor IC 10 receives the histogram generation trigger signal, the histogram generation trigger signal is captured in synchronization with the rising edge of the first clock, and sampling of the received light signal begins in synchronization with the rising edge after a predetermined number of clocks have elapsed.

[0066] 4 to 6, sampling of the light receiving signal starts in synchronization with the rising edge after four clocks have elapsed. The time equivalent to these four clocks is a sensor control delay, which can be grasped as a known parameter.

[0067] FIG. 4 is a timing chart showing the so-called ideal state in which the host clock signal and the sensor clock signal are perfectly synchronized and there is no clock timing discrepancy.

[0068] 4, a histogram generation trigger signal is generated by the host IC 7 in synchronization with rising edge timing t2. The histogram generation trigger signal is received by the sensor IC 10. In the timing chart shown in FIG. 4, the host clock signal and the sensor clock signal are perfectly synchronized, so the sensor clock signal rises at timing t2, and the histogram generation trigger signal is captured at the rising edge timing t3 (= t2).

[0069] The host IC 7 generates a laser emission trigger signal in synchronization with the rising edge three clocks after the timing t2 when the histogram generation trigger signal is generated. Based on the laser emission trigger signal, pulsed light L1 is emitted after a known laser control delay.

[0070] The sensor IC 10 starts sampling of the light reception signal in synchronization with timing t5 of the rising edge after 4 clocks, which is the sensor control delay, have elapsed since timing t3 (=t2) when the histogram generation trigger signal is received.

[0071] In this way, the generation timing t2 of the histogram generation trigger signal and the generation timing t4 of the laser emission trigger signal are appropriately set so that the emission timing of the pulsed light L1 and the start timing of sampling of the light reception signal are synchronized. That is, the generation timings of both trigger signals are set by taking into account the laser control delay and the sensor control delay.

[0072] The light reception signal of the reflected light L is sampled, and the light reception timing is detected based on the number of samples taken until the sampled value reaches a peak. In the example shown in Figure 4, the peak occurs at the 13th sample. Therefore, the number of samples = 13, and the time from the start of sampling to the light reception timing is calculated as (sampling interval) x 12.

[0073] In this embodiment, the sampling frequency is 1 GHz and the sampling interval is 1 ns, so the time from the start of sampling to the light receiving timing is 12 ns.

[0074] As described above, the timing of emitting pulsed light L1 and the timing of starting sampling of the light reception signal are designed to be synchronized, so the time from the start of sampling to the light reception timing is the time difference t1 from the light emission timing to the light reception timing. Therefore, in the example shown in Fig. 4, the time difference t1 = 12 ns, and the frequency of the bin with the time difference t1 = 12 ns in the histogram shown in Fig. 2 is increased by one. Note that since the sampling frequency is 1 GHz, the unit time d of the generated histogram is d = 1 ns.

[0075] Of course, the specific values ​​of the host clock signal, the sensor clock signal, and the sampling frequency described in the example shown in Fig. 4 are merely examples and do not limit the application of the present technology. The present technology can also be applied when other frequencies are set.

[0076] FIG. 5 is a timing chart showing an example in which the clock timing of the host IC and the clock timing of the sensor IC are out of sync.

[0077] In the example shown in Fig. 5, the host IC 7 generates a histogram generation trigger signal based on a host clock signal and a laser emission trigger signal in the same manner as in the example shown in Fig. 4. That is, the "clock in the host IC," "laser emission trigger signal," "laser light (laser output)," "reflected light (sensor input)," and "histogram generation trigger signal" shown in Fig. 5 have the same timing chart as in Fig. 4.

[0078] On the other hand, unlike in Fig. 4, the sensor clock signal is not synchronized with the host clock signal. In the example shown in Fig. 5, the clock timing of the sensor clock signal lags behind the host clock signal by about 1 / 4 clock period (= 1 ns). This means that the phase of the sensor clock signal lags behind the host clock signal by about 90 degrees.

[0079] A histogram generation trigger signal is generated in synchronization with timing t2 of the rising edge of the host clock signal, and the generated histogram generation trigger signal is received by the sensor IC 10.

[0080] The histogram generation trigger signal is captured in the sensor IC 10 in synchronization with the rising edge of the first clock at timing t3 after the histogram generation trigger signal is received. Then, sampling of the light reception signal of the reflected light L is started in synchronization with the rising edge at timing t5 after the lapse of four clocks, which is the sensor control delay, from timing t3.

[0081] Therefore, in the example shown in FIG. 5, the timing at which sampling of the light reception signal starts is delayed by about 1 / 4 clock period (=1 ns) of the sensor clock signal compared to the timing chart in the ideal state shown in FIG.

[0082] As a result, as shown in Fig. 5, in sampling at a sampling frequency of 1 GHz (sampling interval of 1 ns), the number of samples until the sampled value reaches its peak decreases by one, and the 12th sampled value reaches its peak. In this case, the time from the start of sampling to the light reception timing is (sampling interval of 1 ns) x 11 = 11 ns.

[0083] Thus, in the example shown in Fig. 5, the calculated 11 ns is calculated as the time difference t1 between the light emission timing and the light reception timing. That is, in the example shown in Fig. 5, the calculation result of the time difference t1 is different from that in the ideal timing chart shown in Fig. 4. Furthermore, since the frequency of the bin with the time difference t1 = 11 ns is increased by one in the histogram shown in Fig. 2, the shape of the generated histogram also changes.

[0084] FIG. 6 is another example of a timing chart when the clock timing of the host IC and the clock timing of the sensor IC are out of sync.

[0085] In the example shown in FIG. 6, the host IC 7 generates the histogram generation trigger signal based on the host clock signal and the laser emission trigger signal in the same manner as in the example shown in FIG.

[0086] The phase of the sensor clock signal lags behind the host clock signal even more than in the example shown in Fig. 5. Specifically, in the example shown in Fig. 6, the clock timing of the sensor clock signal lags behind the host clock signal by about 3 / 4 clock period (= 3 ns). This means that the phase of the sensor clock signal lags behind the host clock signal by about 270 degrees.

[0087] A histogram generation trigger signal is generated in synchronization with timing t2 of the rising edge of the host clock signal, and the generated histogram generation trigger signal is received by the sensor IC 10.

[0088] The histogram generation trigger signal is captured in the sensor IC 10 in synchronization with the rising edge of the first clock at timing t3 after the histogram generation trigger signal is received. Then, sampling of the light reception signal of the reflected light L is started in synchronization with the rising edge at timing t5 after the lapse of four clocks, which is the sensor control delay, from timing t3.

[0089] Therefore, in the example shown in FIG. 6, the timing at which sampling of the light reception signal starts is delayed by about 3 / 4 clock period (=3 ns) of the sensor clock signal compared to the timing chart in the ideal state shown in FIG.

[0090] As a result, as shown in Fig. 6, when sampling at a sampling frequency of 1 GHz (sampling interval of 1 ns), the number of samples until the peak value is reached is reduced by three, and the peak value is reached at the tenth sample value. In this case, the time from the start of sampling to the light reception timing is (sampling interval of 1 ns) x 9 = 9 ns.

[0091] Thus, in the example shown in Fig. 6, the calculated time difference t1 between the light emission timing and the light reception timing is 9 ns. That is, in the example shown in Fig. 6, the calculation result of the time difference t1 is different from that in the timing chart of the ideal state shown in Fig. 4. Furthermore, in the example shown in Fig. 6, the calculation result of the time difference t1 is different from that in the timing chart shown in Fig. 5.

[0092] Furthermore, in the histogram shown in FIG. 2, the frequency of the bin with the time difference t1=9 ns is increased by one, so the shape of the generated histogram also changes.

[0093] As shown in Figures 4 to 6, when the histogram generation trigger signal generated by the host IC 7 is input to the sensor IC 10, it is synchronized with the sensor clock signal of the sensor IC 10, resulting in an error between the timing at which the laser 9 emits light and the timing at which the sensor IC 10 starts generating the histogram.

[0094] In other words, the difference between the clock timing of the host IC 7 and the clock timing of the sensor IC 10, i.e., the phase difference between the host clock signal and the sensor clock signal, causes the calculated result of the time difference t1 from the light emission timing to the light reception timing to be different.

[0095] 4 to 6, the time between receiving the histogram generation trigger signal from the host IC 7 and capturing the histogram generation trigger signal at the first rising edge of the sensor clock signal corresponds to the clock timing deviation. The time between receiving and capturing the histogram generation trigger signal falls within the range from 0 (perfect synchronization) to less than one clock period (4 ns) of the sensor clock signal.

[0096] The time from receiving the histogram generation trigger signal to capturing it corresponds to the shift in the timing at which the sampling of the light reception signal of reflected light L2 starts. Therefore, the timing at which the sampling of the light reception signal starts also shifts in accordance with the shift in the clock timing, and the shift in the sampling start timing falls within a range from 0 (perfect synchronization) to less than one clock period (4 ns) of the sensor clock signal.

[0097] If the start timing of sampling of the received light signal is shifted, the number of samples taken until the sampled value reaches its peak will also be shifted. The maximum deviation in the number of samples is less than the maximum deviation in the start timing of sampling (4 ns) divided by the sampling interval (1 ns). In this example, a deviation of up to three samples can occur. Therefore, a deviation in the clock timing between the host IC 7 and the sensor IC 10 will result in a distance error of up to 3 ns, i.e., a maximum distance error of (c × 3 ns) / 2 = 45 cm.

[0098] Furthermore, the clock timing difference between the host IC 7 and the sensor IC 10 does not occur uniformly during each of the multiple light emissions used to generate a histogram. For example, there may be a difference of about 1 / 4 clock period (=1 ns) as shown in Figure 5, or a difference of about 3 / 4 clock period (=3 ns) as shown in Figure 6. In other words, there is a variation in the clock timing difference between the host IC 7 and the sensor IC 10 during the multiple light emissions.

[0099] Therefore, the shape of the histogram generated by multiple flashes of light varies depending on the variations in the clock timing between the host IC 7 and the sensor IC 10. For example, depending on the variations in the clock timing, the bin showing the peak may differ, which reduces the accuracy of calculating the distance to the target object 4.

[0100] As described above, the present inventor has newly discovered that a difference in clock timing between the host IC 7 and the sensor IC 10 causes an error in the calculated distance to the target object 4. The present inventor has then devised a new technique for suppressing the effect of such a difference in clock timing on the detection of the light reception timing (i.e., the effect on the calculation of the distance to the target object 4), which will be described below.

[0101] [Basic Configuration and Basic Operation of Sensor IC] First, the basic configuration and basic operation of a sensor IC according to the present technology will be described, followed by a detailed description of an embodiment of the sensor IC.

[0102] 7 is a block diagram showing a basic configuration of a sensor IC according to the present technology. In this example, a case where a sensor IC 13 shown in FIG. 7 is used as the sensor IC 10 shown in FIG. 3 will be described as an example.

[0103] The sensor IC 13 includes a clock unit 14, a phase shift unit 15, and a calculation unit 16. The clock unit 14, the phase shift unit 15, and the calculation unit 16 can be realized by, for example, a digital circuit designed by a general method.

[0104] Any hardware and software may be used to realize each block, for example, a PLD such as an FPGA, or other devices such as an ASIC.

[0105] The clock unit 14 outputs a sensor clock signal (shown as "clock" in FIG. 7). In this embodiment, similar to the examples shown in FIGS. 4 to 6, a pulse signal with a frequency of 250 MHz and a clock period of 4 ns is output as the sensor clock signal. The clock unit 14 can be realized by, for example, a PLL circuit.

[0106] The clock unit 14 is an embodiment of a clock unit according to the present technology, and the sensor clock signal is an embodiment of a first clock signal according to the present technology.

[0107] The phase shift unit 15 receives a histogram generation trigger signal for detecting the timing of receiving the reflected light L2, which is synchronized with a laser emission trigger signal for controlling the timing of emitting light from the light source unit 2 (laser 9).

[0108] The phase shift unit 15 also detects phase difference information regarding the phase difference of the histogram generation trigger signal relative to the sensor clock signal, and outputs a phase-shifted clock signal in which the phase of the sensor clock signal is shifted according to the detected phase difference information (shown as "clock (phase shift)" in Figure 7).

[0109] In the present disclosure, the phase difference information includes not only information about the phase difference (0 degrees to 360 degrees) relative to the clock edge (rising edge or falling edge) of the sensor clock signal, but also information about the time difference (0 seconds to the clock period) relative to the clock edge (rising edge or falling edge) of the sensor clock signal.

[0110] 5, information on the phase difference (approximately 90 degrees) between the reception timing of the histogram generation trigger signal and the timing t3 of the rising edge may be detected as the phase difference information. Alternatively, information on the time difference (1 / 4 clock period (=1 ns)) between the reception timing of the histogram generation trigger signal and the timing t3 of the rising edge may be detected as the phase difference information.

[0111] Alternatively, information on the phase difference (approximately 270 degrees) between the timing of the rising edge immediately preceding the timing of the reception of the histogram generation trigger signal may be detected as phase difference information at the timing of the reception of the histogram generation trigger signal.Furthermore, information on the time difference (3 / 4 clock period (=3 ns)) between the timing of the rising edge immediately preceding the timing of the reception of the histogram generation trigger signal may be detected as phase difference information at the timing of the reception of the histogram generation trigger signal.

[0112] Alternatively, information on a predetermined phase difference range may be detected as the phase difference information. For example, information on whether the timing of reception of the histogram generation trigger signal falls within a phase difference range of greater than 0 degrees and less than 90 degrees, a phase difference range of greater than 90 degrees and less than 180 degrees, a phase difference range of greater than 180 degrees and less than 270 degrees, or a phase difference range of greater than 270 degrees and less than 360 degrees, based on the immediately preceding rising edge, may be detected as the phase difference information at the timing of reception of the histogram generation trigger signal.

[0113] Additionally, any information relating to the phase difference of the histogram generation trigger signal relative to the sensor clock signal is included in the phase difference information according to the present technology.

[0114] In the present disclosure, outputting a phase-shifted clock signal in which the phase of the sensor clock signal is shifted in accordance with the detected phase difference information also includes outputting a phase-shifted clock signal in which the phase shift amount is zero (i.e., the signal is the same) relative to the sensor clock signal based on phase difference information indicating that the phase difference is zero.

[0115] 7, the phase shift unit 15 generates a synchronized histogram generation trigger signal (shown as "histogram generation trigger signal (synchronized)" in FIG. 7). The synchronized histogram generation trigger signal is a signal that determines the start timing of sampling of the light-receiving signal by the calculation unit 16.

[0116] The detection of the phase difference information can be realized, for example, by a phase detection circuit or a phase comparison circuit. Furthermore, shifting the phase of the sensor clock signal based on the detected phase difference information to generate a phase-shifted clock signal can also be realized by a well-known phase shift circuit using, for example, a DLL (Delay Locked Loop) circuit. For example, a variable-phase clock may be generated by using a selector from output clocks with multiple phases. The synchronized histogram generation trigger signal can also be realized by a well-known circuit configuration.

[0117] The phase shift unit 15 is an embodiment of the receiving unit and the phase shift unit according to the present technology, and the phase shift clock signal is an embodiment of the second clock signal according to the present technology.

[0118] The calculation unit 16 detects the timing of receiving the reflected light L2 based on the phase shift clock signal and the synchronized histogram generation trigger signal, and calculates the time difference t1 between the emission timing and the reception timing of the pulsed light L1.

[0119] In this embodiment, similar to the examples shown in Figures 4 to 6, sampling of the light-receiving signal output from the light-receiving element of the light-receiving unit 3 is performed at a sampling frequency of 1 GHz (sampling interval of 1 ns). Then, the light-receiving timing is detected based on the number of samples taken until the sampled value reaches a peak. Then, the time from the start of sampling to the light-receiving timing is calculated as the time difference t1 from the light-emitting timing to the light-receiving timing, and the histogram shown in Figure 2 is generated.

[0120] An example of the basic operation of the sensor IC will be described with reference to Figures 8 and 9. The timing chart shown in Figure 8 corresponds to the timing chart shown in Figure 5, and the "clock in the host IC," "laser emission trigger signal," "laser light (laser output)," "reflected light (sensor input)," "histogram generation trigger signal," and "clock in the sensor IC" are the same as those in the timing chart shown in Figure 5.

[0121] The host IC 7 generates a histogram generation trigger signal in synchronization with timing t2 of the rising edge of the host clock signal, and the generated histogram generation trigger signal is received by the sensor IC 13 .

[0122] The phase shift unit 15 of the sensor IC 13 detects phase difference information regarding the phase difference of the histogram generation trigger signal relative to the sensor clock signal in synchronization with timing t3 of the first rising edge of the clock after receiving the histogram generation trigger signal.

[0123] Furthermore, the phase shift unit 15 outputs a phase shifted clock signal in which the phase of the sensor clock signal is shifted in accordance with the phase difference information in synchronization with timing t6, which is the rising edge of the clock next to timing t3.

[0124] 8 , at timing t3, the phase difference (approximately 90 degrees) between the reception timing of the histogram generation trigger signal and timing t3 of the rising edge is detected as phase difference information. Then, at timing t6, the phase of the sensor clock signal is shifted so as to advance the phase by the detected phase difference (approximately 90 degrees), and a phase-shifted clock signal is output.

[0125] 8, the phase shift clock signal from timing t6 onwards becomes a clock signal synchronized with the host sensor clock generated in the host IC. That is, in this embodiment, it is possible to synchronize the sensor clock signal with the host sensor clock signal based on the phase difference information between the histogram generation trigger signal and the sensor clock signal.

[0126] Furthermore, although not shown in the figure, the phase shift unit 15 generates a synchronized histogram generation trigger signal that goes high at timing t8 of the rising edge after a predetermined number of clocks have elapsed since timing t7 of the first rising edge after receiving the histogram generation trigger signal of the phase shift clock signal.

[0127] The calculation unit 16 starts sampling the light-receiving signal based on the phase shift clock signal generated by the phase shift unit 15 and the synchronized histogram generation trigger signal. Specifically, the calculation unit 16 starts sampling the light-receiving signal in synchronization with timing t8 of the rising edge that occurs a predetermined number of clocks after timing t7 of the first rising edge of the phase shift clock signal after receiving the histogram generation trigger signal.

[0128] In the example shown in FIG. 8, sampling of the light-receiving signal starts in synchronization with the rising edge two clocks after timing t7 of the first rising edge of the phase shift clock signal.

[0129] The number of clocks is appropriately set so that timing T8 of starting sampling of the light reception signal is synchronized with timing t5 of starting sampling of the light reception signal in the ideal state timing chart shown in FIG.

[0130] For example, the number of clocks between timing t7 and timing t8 is set to be smaller by the time required to detect the phase difference information of the histogram generation trigger signal relative to the sensor clock signal and generate the phase shift clock signal based on the phase difference information. Alternatively, taking into consideration the time required to detect the phase difference information and generate the phase shift clock signal based on the phase difference information, it is also possible to increase the number of clocks between timing t2 when the histogram generation trigger signal is generated and timing t4 when the laser emission trigger signal is generated on the host IC 7 side.

[0131] As shown in Figure 8, the start timing t8 of sampling the light receiving signal is synchronized with the start timing t5 of sampling the light receiving signal in the ideal state timing chart shown in Figure 4, so it is possible to sufficiently suppress the impact on the detection of the light receiving timing (i.e., the impact on the calculation of the distance to the target object 4) due to the difference in clock timing between the host IC 7 and the sensor IC 13.

[0132] The timing chart shown in FIG. 9 corresponds to the timing chart shown in FIG. 6, and the "clock in the host IC," "laser emission trigger signal," "laser light (laser output)," "reflected light (sensor input)," "histogram generation trigger signal," and "clock in the sensor IC" have the same timing chart as FIG. 6.

[0133] The phase shift unit 15 of the sensor IC 13 detects phase difference information regarding the phase difference of the histogram generation trigger signal relative to the sensor clock signal in synchronization with timing t3 of the first rising edge of the clock after receiving the histogram generation trigger signal.

[0134] Furthermore, the phase shift unit 15 outputs a phase shifted clock signal in which the phase of the sensor clock signal is shifted in accordance with the phase difference information in synchronization with timing t3, which is the rising edge of the clock next to timing t3.

[0135] 9 , at timing t3, the phase difference (approximately 270 degrees) between the reception timing of the histogram generation trigger signal and timing t3 of the rising edge is detected as phase difference information. Then, at timing t6, the phase of the sensor clock signal is shifted so as to advance the phase by the detected phase difference (approximately 270 degrees), and a phase-shifted clock signal is output.

[0136] As shown in FIG. 9, the phase shift clock signal from timing t6 onwards becomes a clock signal synchronized with the host sensor clock generated in the host IC.

[0137] Furthermore, although not shown in the figure, the phase shift unit 15 generates a synchronized histogram generation trigger signal that goes high at timing t8 of the rising edge after a predetermined number of clocks (two clocks) have elapsed since timing t7 of the first rising edge after receiving the histogram generation trigger signal of the phase shift clock signal.

[0138] The calculation unit 16 starts sampling the light-receiving signal based on the phase shift clock signal generated by the phase shift unit 15 and the synchronized histogram generation trigger signal. Specifically, the calculation unit 16 starts sampling the light-receiving signal in synchronization with timing t8 of the rising edge that occurs a predetermined number of clocks (two clocks) after timing t7 of the first rising edge of the phase shift clock signal after receiving the histogram generation trigger signal.

[0139] In the example shown in Fig. 9, as in the example shown in Fig. 8, the start timing t8 of sampling the light reception signal is synchronized with the start timing t5 of sampling the light reception signal in the ideal state timing chart shown in Fig. 4. This makes it possible to sufficiently suppress the influence of a difference in clock timing between the host IC 7 and the sensor IC 13 on the detection of the light reception timing (i.e., the influence on the calculation of the distance to the target object 4).

[0140] In calculating the time difference t1 shown in Figures 8 and 9, if the histogram generation trigger signal is perfectly synchronized with the rising edge timing t3 of the sensor clock signal, i.e., if the clock timing deviation is zero, a signal with a phase shift of zero (i.e., the same signal as the sensor clock signal) is generated as the phase-shifted clock signal at the rising edge timing t6.

[0141] The first rising edge of the phase shift clock signal after the histogram generation trigger signal is received is used as the rising edge of the next clock, and a synchronized histogram generation trigger signal is generated that goes high at rising edge timing t8 a predetermined number of clocks (two clocks) after the rising edge timing t7 of the phase shift clock signal. This makes it possible to detect the light reception timing with high accuracy, as in the ideal timing chart shown in Figure 4, and to calculate the distance to the target object 4 with high accuracy.

[0142] Alternatively, the first rising edge of the phase shift clock signal after the histogram generation trigger signal is received is set as rising edge timing t6, and a synchronized histogram generation trigger signal that goes high at rising edge timing t8 three clocks after timing t6 (one more clock).

[0143] When calculating the time difference t1 according to the present technology illustrated in Figures 8 and 9, it is preferable to detect phase difference information regarding the phase difference of the histogram generation trigger signal relative to the sensor clock signal with a time resolution equal to or greater than the sampling frequency of the light receiving signal.

[0144] That is, in this embodiment, it is preferable to detect the phase difference information with a time resolution of a sampling frequency of 1 GHz or more. As described with reference to Figures 4 to 6, a difference in the clock timing between the host IC 7 and the sensor IC 10 causes a difference in the number of samples taken until the sampled value of the received light signal reaches its peak, resulting in a distance error.

[0145] If it is possible to detect phase difference information with a time resolution of a sampling frequency of 1 GHz or higher, it will be possible to sufficiently suppress the discrepancy in the number of samples, making it possible to detect the light reception timing with high accuracy, and improving the accuracy of calculating the distance to the target object 4.

[0146] When the histogram illustrated in FIG. 2 is generated by calculating the time difference t1 according to the present technology illustrated in FIGS. 8 and 9, the blocks of the sensor IC 13 illustrated in FIG. 7 operate as follows.

[0147] The phase shift unit 15, functioning as a receiver, receives a histogram generation trigger signal synchronized with the laser emission trigger signal for each of the multiple emissions from the light source unit 2. The phase shift unit 15 also detects phase difference information for each of the multiple emissions and outputs a phase shift clock signal. The calculation unit 16 detects the light reception timing for each of the multiple emissions based on the phase shift clock signal, thereby generating a histogram of the time difference t1 from the emission timing to the light reception timing.

[0148] Since it is possible to sufficiently suppress the influence of the clock timing difference between the host IC 7 and the sensor IC 13 on the detection of the light reception timing (i.e., the influence on the calculation of the distance to the target object 4), it is possible to generate a histogram of the time difference t1 with high accuracy.

[0149] 8 and 9, the calculation of the time difference t1 (generation of the histogram) according to the present technology can also be performed using the falling edges of the host clock signal, the sensor clock signal, and the phase shift clock signal as clock edges. In this case, control may be performed such that sampling of the light-receiving signal starts in synchronization with the falling edge of the phase shift clock signal a predetermined number of clocks after the first falling edge after the histogram generation trigger signal is received.

[0150] [Example of a specific embodiment of an IC sensor] An example of a specific embodiment of an IC sensor according to the present technology will be described. Fig. 10 is a schematic diagram showing an example of the configuration of a sensor IC 18.

[0151] The sensor IC 18 has a clock generation circuit 19, a phase measurement circuit 20, a phase shift circuit 21, and a histogram generation circuit 22. The histogram generation circuit 22 also includes a sampling circuit for the reflected light L2. The specific circuit configuration of each circuit is not limited and may be designed arbitrarily.

[0152] 10, a clock generation circuit 19 functions as the clock unit 14 shown in FIG. 7. A phase measurement circuit 20 and a phase shift circuit 21 function as the phase shift unit 15. A histogram generation circuit 22 functions as the calculation unit 16.

[0153] The clock generation circuit 19 generates a sensor clock signal. In this embodiment, a pulse signal with a frequency of 250 MHz and a clock period of 4 ns is output as the sensor clock signal.

[0154] In addition, in this embodiment, the clock generation circuit 19 generates and outputs a 90-degree phase-shifted clock signal in which the phase of the sensor clock signal is shifted by 90 degrees, a 180-degree phase-shifted clock signal in which the phase of the sensor clock signal is shifted by 180 degrees, and a 270-degree phase-shifted clock signal in which the phase of the sensor clock signal is shifted by 270 degrees.

[0155] The phase measurement circuit 20 detects phase difference information relating to the phase difference of the histogram generation trigger signal relative to the sensor clock signal.

[0156] 11 is a schematic diagram showing an example of the circuit configuration of the phase measurement circuit 20. FIG. 12 is a timing chart showing an example of detection of phase difference information by the phase measurement circuit 20.

[0157] 11 and 12, the histogram generation trigger signal is illustrated as "TRG_I." Also, the sensor clock signal, the 90-degree phase-shifted clock signal, the 180-degree phase-shifted clock signal, and the 270-degree phase-shifted clock signal are illustrated as "CLK_0deg," "CLK_90deg," "CLK_180deg," and "CLK_270deg."

[0158] As shown in FIG. 11, the phase measurement circuit 20 includes DFFs 24a to 24d and DFFs 25a to 25d.

[0159] It is assumed that "TRG_I" is input to "CLK_0deg," "CLK_90deg," "CLK_180deg," and "CLK_270deg," which are shifted in 90-degree increments, at the timing shown in FIG. 12A.

[0160] The DFFs 24a to 24d perform sampling on the input "TRG_I" at each of "CLK_0deg", "CLK_90deg", "CLK_180deg", and "CLK_270deg".

[0161] 12B, "TRG_0deg" is output from DFF 24a, "TRG_90deg" is output from DFF 24b, "TRG_180deg" is output from DFF 24c, and "TRG_2700deg" is output from DFF 24d.

[0162] As shown in FIG. 11, DFFs 25a to 25d perform sampling again at "CLK_0deg" for "TRG_0deg," "TRG_90deg," "TRG_180deg," and "TRG_270deg."

[0163] 12C, DFF 25a outputs "Phase 0," DFF 25b outputs "Phase 1," DFF 25c outputs "Phase 2," and DFF 25d outputs "Phase 3."

[0164] In this embodiment, as shown in FIG. 12C, based on the logical levels (high level / low level) of the output "Phase 0," "Phase 1," "Phase 2," and "Phase 3," it is possible to detect which of the phase difference ranges P0 to P3 shown in FIG. 12A the phase difference φ of the input timing (reception timing) of the histogram generation trigger signal ("TRG_I") relative to the sensor clock signal ("CLK_0deg") falls within.

[0165] In this embodiment, the phase difference range P0 is a phase difference range where, for the sensor clock signal ("CLK_0deg"), 0 degrees < phase difference φ≦90 degrees, the phase difference range P1 is a phase difference range where 90 degrees < phase difference φ≦180 degrees, the phase difference range P2 is a phase difference range where 180 degrees < phase difference φ≦270 degrees, and the phase difference range P3 is a phase difference range where 270 degrees < phase difference φ≦360 degrees.

[0166] When the logic levels of "Phase 0", "Phase 1", "Phase 2", and "Phase 3" are "0111", the phase difference φ falls within the phase difference range P0 (0 degrees < phase difference φ ≦ 90 degrees). When the logic levels are "0011", the phase difference φ falls within the phase difference range P1 (90 degrees < phase difference φ ≦ 180 degrees).

[0167] When the logic level is "0001", the phase difference φ falls within a phase difference range P2 (180 degrees < phase difference φ ≦ 270 degrees). When the logic level is "0000", the phase difference φ falls within a phase difference range P3 (270 degrees < phase difference φ ≦ 360 degrees).

[0168] In this embodiment, as phase difference information regarding the phase difference of the histogram generation trigger signal ("TRG_I") relative to the sensor clock signal ("CLK_0deg"), it is detected whether the phase difference φ of the input timing (reception timing) of the histogram generation trigger signal ("TRG_I") relative to the sensor clock signal ("CLK_0deg") falls within any of the phase difference ranges P0 to P3 shown in Figure 12A.

[0169] As shown in FIGS. 11 and 12, the phase difference information can be detected as a thermometer code such as "0011" using a relatively simple circuit configuration.

[0170] 10, the phase measurement circuit 20 generates a phase signal and outputs it to the phase shift circuit 21. The phase signal is a signal corresponding to the phase difference φ of the input timing of the histogram generation trigger signal (“TRG_I”).

[0171] When the phase difference φ is within the phase difference range P0 (0 degrees<phase difference φ≦90 degrees), that is, when the logic level is "0111", a signal indicating "0" is output as the phase signal. When the phase difference φ is within the phase difference range P1 (90 degrees<phase difference φ≦180 degrees), that is, when the logic level is "0011", a signal indicating "1" is output as the phase signal.

[0172] When the phase difference φ is within the phase difference range P2 (180 degrees < phase difference φ ≦ 270 degrees), that is, when the logic level is "0001", a signal indicating "2" is output as the phase signal. When the phase difference φ is within the phase difference range P3 (270 degrees < phase difference φ ≦ 360 degrees), that is, when the logic level is "0000", a signal indicating "3" is output as the phase signal. These phase signals are also included in the phase difference information related to the present technology.

[0173] The phase shift circuit 21 outputs a phase shift clock signal based on the phase signal output from the phase measurement circuit 20. In this embodiment, when a phase signal indicating "0" is received, which indicates that the phase difference φ is within the phase difference range P0, a sensor clock signal "CLK_0deg" in which the phase shift amount is zero is output.

[0174] When a phase signal indicating "1" is received when the phase difference φ is within the phase difference range P1, a 90-degree phase-shifted clock signal "CLK_90deg" with the phase shifted by 90 degrees is output. When a phase signal indicating "2" is received when the phase difference φ is within the phase difference range P2, a 180-degree phase-shifted clock signal "CLK_180deg" with the phase shifted by 180 degrees is output. When a phase signal indicating "3" is received when the phase difference φ is within the phase difference range P3, a 270-degree phase-shifted clock signal "CLK_270deg" with the phase shifted by 270 degrees is output.

[0175] Thus, in this embodiment, based on the detected phase difference information (phase signal), one of the sensor clock signal, the 90-degree phase shift clock signal, the 180-degree phase shift clock signal, and the 270-degree phase shift clock signal is output as the phase shift clock signal "clock (phase shift)."

[0176] The phase measurement circuit 20 also generates a synchronized histogram generation trigger signal, which defines the timing at which the histogram generation circuit 22 starts sampling the received light signal.

[0177] The histogram generating circuit 22 samples the light receiving signal based on the phase shift clock signal and the synchronized histogram generating trigger signal, and generates a histogram of the time difference t1 between the light emission timing and the light reception timing.

[0178] FIG. 13 is a flowchart showing an example of the operation from reception of a histogram generation trigger signal by the sensor IC 18 to generation of a histogram.

[0179] In response to receiving the histogram generation trigger signal, the phase measurement circuit 20 outputs a phase signal (step 101). The phase shift circuit 21 changes the phase of the sensor clock signal ("clock") based on the phase signal to generate a phase-shifted clock signal ("clock (phase)") (step 102).

[0180] A synchronized histogram generation trigger signal ("histogram generation trigger (synchronized)") is generated by the phase measurement circuit 20 (step 103). The synchronized histogram generation trigger signal ("histogram generation trigger") is generated based on the timing of the rising edge of the next clock of the signal corresponding to the "phase signal" out of "CLK_0deg," "CLK_90deg," "CLK_180deg," or "CLK_270deg" after receiving the histogram generation trigger signal.

[0181] The histogram generation circuit 22 performs sampling of the received signal of the reflected light L2 in accordance with the rising timing of the phase shift clock signal ("clock (phase)") from the rising timing of the synchronized histogram generation trigger signal ("histogram generation trigger (synchronization)") (step 104).

[0182] The histogram generating circuit 22 generates a histogram of the time difference t1 between the light emission timing and the light reception timing based on the results of sampling the light reception signal (step 105).

[0183] 14 to 17 are timing charts showing an example of the operation of the sensor IC 18. When a histogram generation trigger signal is received at timing t2 shown in Fig. 14, the histogram generation trigger signal transitions between the rising edges of the sensor clock signal and the 90-degree phase clock signal, so the phase difference φ of the histogram generation trigger signal is 0 degrees < phase difference φ ≦ 90 degrees, and the phase measurement circuit 20 outputs a phase signal of "0."

[0184] The phase signal is switched in synchronization with the rising edge t3 of the first clock of the sensor clock signal after the histogram generation trigger signal is received. The "value before phase switching" shown in Fig. 14 is the value of the phase signal output for the immediately preceding light emission, and may be either a different value or the same value.

[0185] Furthermore, the timing at which the phase signal is switched is not limited to being synchronized with the sensor clock signal, and the phase signal may be switched in synchronization with a phase shift signal other than the sensor clock signal.

[0186] The phase shift circuit 21 changes the phase of the phase shift clock signal in response to the switching of the phase signal so that it becomes equal to the sensor clock signal corresponding to phase signal "0." In the example shown in Fig. 14, the "value before phase switching" is also illustrated as "0," so the phase does not change, but of course, there may be cases where the phase is shifted from a clock signal corresponding to another "phase signal" to generate a sensor clock signal corresponding to phase signal "0."

[0187] In this embodiment, a time period of a predetermined number of clocks M (M is an integer equal to or greater than 1) from the timing t3 at which the phase is changed is set as the phase stabilization waiting time, which makes it possible to improve the accuracy of generating the histogram.

[0188] A synchronized histogram generation trigger signal is generated by the phase measurement circuit 20. In this embodiment, the timing at which the synchronized histogram generation trigger signal is output is set based on a clock signal corresponding to the "phase signal."

[0189] Specifically, the histogram generation trigger signal is output at rising timing t10, a predetermined number of clocks N (N is an integer greater than M) after the rising timing t9 of the clock signal (sensor clock signal in the example of FIG. 14) corresponding to the "phase signal (0)" after receiving the histogram generation trigger signal is used as a reference. The number of clocks N is set appropriately so that the emission timing of the pulsed light L1 and the start timing of sampling the light reception signal are synchronized.

[0190] Typically, taking into consideration the laser control delay, the laser emission trigger signal is output at an appropriate timing before timing t10, but this is not limitative, and the signal may be output at the same timing as timing t10 ​​or after timing t10.

[0191] After the synchronized histogram generation trigger signal rises, sampling of the light reception signal of the reflected light L2 starts in accordance with the phase shift clock signal.

[0192] 14 is commonly executed when the phase difference φ of the reception timing of the histogram generation trigger signal is within the range of 0 degrees < phase difference φ≦90 degrees. This means that sampling of the light-receiving signal can be executed with an error of 90 degrees or less as the phase of one clock of the sensor clock signal.

[0193] In this example, an error of 90 degrees or less in the phase of one clock of the sensor clock signal results in an error of 1 ns or less, and the error in the number of samples is almost completely suppressed. As a result, a highly accurate histogram can be generated, and the distance to the target object 4 can be calculated with high accuracy.

[0194] When the histogram generation trigger signal is received at timing t2 shown in FIG. 15, the histogram generation trigger signal transitions between the rising edges of the 90-degree phase clock signal and the 180-degree phase clock signal, so the phase difference φ of the histogram generation trigger signal is 90 degrees < phase difference φ ≦ 180 degrees, and the phase measurement circuit 20 outputs a phase signal of “1.”

[0195] Then, the phase signal is switched in synchronization with the rising edge timing t3 of the first clock of the sensor clock signal after the histogram generation trigger signal is received.

[0196] In response to the switching of the phase signal, the phase shift circuit 21 changes the phase of the phase-shifted clock signal so that it becomes equal to the 90-degree phase clock signal corresponding to the phase signal "1." Note that the time period of a predetermined number M of clocks (M is an integer equal to or greater than 1) from the timing t3 at which the phase is changed is a phase stabilization waiting time.

[0197] A synchronized histogram generation trigger signal is generated by the phase measurement circuit 20. In the example shown in Fig. 15, the synchronized histogram generation trigger signal is output at rising timing t10 ​​a predetermined number of clocks N (N is an integer greater than M) after the rising timing t9 of the clock signal (90-degree phase clock signal) corresponding to the "phase signal (1)" after the histogram generation trigger signal is received.

[0198] After the synchronized histogram generation trigger signal rises, sampling of the light reception signal of the reflected light L2 starts in accordance with the phase shift clock signal.

[0199] In the timing chart shown in Fig. 15, the reception timing t2 of the histogram generation trigger signal is delayed compared to the timing chart shown in Fig. 14, and the phase difference φ is included in the phase difference range P1. Corresponding to the delay in the reception timing t2, the sampling start timing 10 can also be delayed by the same amount.

[0200] This allows the delay in the reception timing t2 of the histogram generation trigger signal to be absorbed, and allows the sampling of the light reception signal to be performed with an error of 90 degrees or less in terms of the phase of one clock of the sensor clock signal, as in the example shown in Fig. 4. As a result, it becomes possible to generate a highly accurate histogram, and to calculate the distance to the target object 4 with high accuracy.

[0201] When the histogram generation trigger signal is received at timing t2 shown in FIG. 16, the histogram generation trigger signal transitions between the rising edges of the 180-degree phase clock signal and the 270-degree phase clock signal, so the phase difference φ of the histogram generation trigger signal is 180 degrees < phase difference φ ≦ 270 degrees, and the phase measurement circuit 20 outputs a phase signal of “2.”

[0202] Then, the phase signal is switched in synchronization with the rising edge timing t3 of the first clock of the sensor clock signal after the histogram generation trigger signal is received.

[0203] In response to the switching of the phase signal, the phase shift circuit 21 changes the phase of the phase shift clock signal so that it becomes equal to the 180-degree phase clock signal corresponding to phase signal "2." Note that the time period of a predetermined number M of clocks (M is an integer equal to or greater than 1) from timing t3 at which the phase is changed is a phase stabilization waiting time.

[0204] A synchronized histogram generation trigger signal is generated by the phase measurement circuit 20. In the example shown in Fig. 15, the synchronized histogram generation trigger signal is output at rising timing t10, a predetermined number of clocks N (N is an integer greater than M), based on rising timing t9 of the clock signal (180-degree phase clock signal) corresponding to "phase signal (2)" after the histogram generation trigger signal is received.

[0205] After the synchronized histogram generation trigger signal rises, sampling of the light reception signal of the reflected light L2 starts in accordance with the phase shift clock signal.

[0206] 16, the reception timing t2 of the histogram generation trigger signal is further delayed, and the phase difference φ falls within a phase difference range P2. Corresponding to the delay in the reception timing t2, the sampling start timing 10 can also be delayed by the same amount.

[0207] This allows the delay in the reception timing t2 of the histogram generation trigger signal to be absorbed, and allows the light reception signal to be sampled with an error of 90 degrees or less as a phase of one clock of the sensor clock signal. As a result, a highly accurate histogram can be generated, and the distance to the target object 4 can be calculated with high accuracy.

[0208] When the histogram generation trigger signal is received at timing t2 shown in FIG. 17, the histogram generation trigger signal transitions between the rising edges of the 270-degree phase clock signal and the 360-degree phase clock signal, so the phase difference φ of the histogram generation trigger signal is 270 degrees < phase difference φ ≦ 360 degrees, and the phase measurement circuit 20 outputs a phase signal of “3.”

[0209] Then, the phase signal is switched in synchronization with the rising edge timing t3 of the first clock of the sensor clock signal after the histogram generation trigger signal is received.

[0210] In response to the switching of the phase signal, the phase shift circuit 21 changes the phase of the phase shift clock signal so that it becomes equal to the 270-degree phase clock signal corresponding to phase signal "3." Note that the time period of a predetermined number M of clocks (M is an integer equal to or greater than 1) from timing t3 at which the phase is changed is a phase stabilization waiting time.

[0211] A synchronized histogram generation trigger signal is generated by the phase measurement circuit 20. In the example shown in Fig. 15, the synchronized histogram generation trigger signal is output at rising timing t10, a predetermined number of clocks N (N is an integer greater than M), based on rising timing t9 of the clock signal (270-degree phase clock signal) corresponding to "phase signal (3)" after the histogram generation trigger signal is received.

[0212] After the synchronized histogram generation trigger signal rises, sampling of the light reception signal of the reflected light L2 starts in accordance with the phase shift clock signal.

[0213] 17, the reception timing t2 of the histogram generation trigger signal is further delayed, and the phase difference φ falls within a phase difference range P3. Corresponding to the delay in the reception timing t2, the sampling start timing 10 can also be delayed by the same amount.

[0214] This allows the delay in the reception timing t2 of the histogram generation trigger signal to be absorbed, and allows the light reception signal to be sampled with an error of 90 degrees or less as a phase of one clock of the sensor clock signal. As a result, a highly accurate histogram can be generated, and the distance to the target object 4 can be calculated with high accuracy.

[0215] In the processing shown in Figures 14 to 17, if there is perfect synchronization with the timing t3 of the rising edge of the sensor clock signal, i.e., if the clock timing deviation is zero, the phase difference φ = 0 = 360, so the phase difference φ is included in the phase difference range P3, and sampling begins at timing t10 ​​shown in Figure 17.

[0216] 17, assume that the timing t10 ​​for the phase difference φ=0 degrees=360 degrees is set so that the start timing of sampling the received light signal is most synchronized with the emission timing of the pulsed light L1. In this case, if the phase difference φ is within the phase difference range P0, the start timing of sampling the received light signal is most synchronized with the emission timing of the pulsed light L1 when the phase difference φ=90 degrees.

[0217] When the phase difference φ is within the phase difference range P1, the start timing of sampling the received light signal is most synchronized with the emission timing of the pulsed light L1 when the phase difference φ = 180 degrees. When the phase difference φ is within the phase difference range P2, the start timing of sampling the received light signal is most synchronized with the emission timing of the pulsed light L1 when the phase difference φ = 270 degrees.

[0218] Furthermore, regardless of the range of phase difference φ that the phase difference φ falls within, it is possible to sample the light reception signal with an error of 90 degrees or less in terms of the phase of one clock of the sensor clock signal. Of course, the present invention is not limited to such settings.

[0219] 14 to 17, phase difference information is detected based on the sensor clock signal, the 90-degree phase shift clock signal, the 180-degree phase shift clock signal, and the 270-degree phase shift clock signal. Then, based on the detected phase difference information, one of the sensor clock signal, the 90-degree phase shift clock signal, the 180-degree phase shift clock signal, and the 270-degree phase shift clock signal is output as a phase shift clock signal.

[0220] As the phase difference information, it is detected whether the phase difference φ of the histogram generation trigger signal relative to the sensor clock signal falls within one of the phase difference ranges P0 to P3. If the phase difference φ falls within the phase difference range P0, the sensor clock signal is output as the phase-shifted clock signal. If the phase difference φ falls within the phase difference range P1, a 90-degree phase-shifted clock signal is output as the phase-shifted clock signal. If the phase difference φ falls within the phase difference range P2, a 180-degree phase-shifted clock signal is output as the phase-shifted clock signal. If the phase difference φ falls within the phase difference range P3, a 270-degree phase-shifted clock signal is output as the phase-shifted clock signal.

[0221] 14 to 17, the 90-degree phase-shifted clock signal is an embodiment of a first phase-shifted clock signal according to the present technology, the 180-degree phase-shifted clock signal is an embodiment of a second phase-shifted clock signal according to the present technology, and the 270-degree phase-shifted clock signal is an embodiment of a third phase-shifted clock signal according to the present technology.

[0222] Furthermore, with respect to the phase difference φ of the histogram generation trigger signal relative to the sensor clock signal, a phase difference range P0 is one embodiment of a first phase difference range greater than 0 degrees and less than 90 degrees according to the present technology. A phase difference range P1 is one embodiment of a second phase difference range greater than 90 degrees and less than 180 degrees. A phase difference range P2 is one embodiment of a third phase difference range greater than 180 degrees and less than 270 degrees. A phase difference range P3 is one embodiment of a fourth phase difference range greater than 270 degrees and less than 360 degrees.

[0223] 14 to 17, a four-phase clock signal in which the sensor clock signal is shifted in units of 90 degrees is used. However, the present technology is not limited to this, and it is also possible to apply the present technology using a plurality of clock signals shifted in units of other angles.

[0224] For example, let L=360 / M (M is a divisor of 360 excluding 1 and 360). The clock unit 14 (clock generation circuit 19) detects phase difference information using the sensor clock signal (first clock signal) and M-1 phase-shifted clock signals obtained by shifting the sensor clock signal (first clock signal) in units of L degrees (using clock signals of a total of M phases).

[0225] Based on the detected phase difference information, the sensor clock signal (first clock signal) and one of the M-1 phase shift clock signals are output as a phase shift clock signal (second clock signal).

[0226] The phase difference information is detected as to which of M phase difference ranges the phase difference of the histogram generation trigger signal (detection trigger signal) relative to the sensor clock signal (first clock signal) falls within, defined as a range greater than (N-1)L degrees and less than NL degrees (N is an integer from 1 to M).

[0227] When the phase difference is within a phase difference range of more than 0 degrees and less than L degrees, the sensor clock signal (first clock signal) is output as a phase-shifted clock signal (second clock signal). When the phase difference is within a phase difference range of more than (C-1)L degrees and less than CL degrees (C is any integer from 2 to M), a phase-shifted clock signal in which the phase of the sensor clock signal (first clock signal) is shifted by (C-1)L degrees is output as a phase-shifted clock signal (second clock signal).

[0228] In the above formula L=360 / M (M is a divisor of 360 excluding 1 and 360), the case where M=4 corresponds to the examples shown in FIGS. 14 to 17. The larger the value of M, the smaller the error in the sampling start timing can be made. On the other hand, the smaller the value of M, the simpler the circuit configuration can be made.

[0229] When performing distance measurement using the direct ToF method by applying the present technology, a device including the sensor IC 10 and the light receiving unit 3 shown in Fig. 7 can be configured as an embodiment of the light receiving device according to the present technology. Also, a device including the sensor IC 18 and the light receiving unit 3 shown in Fig. 10 can be configured as an embodiment of the light receiving device according to the present technology.

[0230] In addition, as in the LiDAR system 6 shown in Figure 3, an apparatus including a light source unit 2 including a driver IC 8 and a laser 9, a light receiving device related to the present technology (sensor IC 10 + light receiving unit 3, sensor IC 18 + light receiving unit 3, etc.), and a host IC 7 can be configured as a distance measuring device related to the present technology.

[0231] In this case, the light receiving device according to the present technology (sensor IC 10+light receiving unit 3, sensor IC 18+light receiving unit 3, etc.) can be configured as a light receiving unit included in the distance measuring device 1. Also, the control unit including the host IC 7 can be configured as an element included in the distance measuring device 1. Also, the distance measuring device 1 can be called a distance measuring system.

[0232] The control unit including the host IC 7 generates an emission trigger signal (laser emission trigger signal) for controlling the emission timing of the light source unit 2 based on a predetermined clock signal (host clock signal), outputs the signal to the light source unit 2, and generates a detection trigger signal (histogram generation trigger signal) for detecting the reception timing of the reflected light L2 synchronized with the emission trigger signal (laser emission trigger signal) based on the same predetermined clock signal (host clock signal), outputs the detection trigger signal to the light receiving unit (light receiving device). The control unit also calculates the distance to the target object 4 based on the time difference t1 (time information) calculated by the light receiving unit.

[0233] As described above, in the distance measuring device 1 and the light receiving device according to this embodiment, phase difference information of the histogram generation trigger relative to the sensor clock signal is detected, and a phase shifted clock signal in which the phase of the sensor clock signal is shifted in accordance with the phase difference information is output. Then, the light receiving timing is detected based on the phase shifted clock signal, and the time difference t1 between the light emission timing of the light source unit 2 and the light receiving timing is calculated.

[0234] This makes it possible to suppress the influence of the phase difference of the histogram generation trigger signal relative to the sensor clock signal on the detection of the light reception timing, which in turn makes it possible to calculate with high accuracy the time difference t1 between the light emission timing of the light source unit 2 and the reception timing of the reflected light L2, thereby enabling high-accuracy distance measurement in the direct ToF method.

[0235] 12, in this embodiment, the histogram generation trigger signal from the host IC 7 can be sampled at a frequency equal to or higher than the sampling frequency of the reflected light L2. Then, using information about the phase difference between the histogram generation trigger signal and the sensor clock signal inside the sensor IC 18, which is determined from the sampling result of the histogram generation trigger signal, the phase of the sensor clock signal output from the clock generation circuit 19 is shifted and input to the histogram generation circuit 22, which performs sampling and histogram generation.

[0236] This configuration uses a high-speed clock only for sampling the histogram generation trigger signal, and can adjust the sampling point of the sampling clock for reflected light L2 to a time step equal to or smaller than the sampling period. This makes it possible to minimize distance measurement errors caused by misalignment of the clock timing between the host IC 7 and the sensor IC 18 without operating the entire sensor IC with a high-speed sensor clock signal.

[0237] In other words, even if there is a phase difference between the histogram generation trigger signal and the sensor clock signal inside the sensor IC 18, sampling of the reflected light L2 can be started in synchronization with the histogram generation trigger signal generated by the host IC 7, thereby minimizing distance errors.

[0238] By applying this technology, it becomes possible to calculate the time difference t1 between the light emission timing and the light reception timing with high accuracy without passing the laser light emission trigger signal output from the host IC 7 through the sensor IC 18. This makes it possible to achieve high-accuracy distance measurement without imposing restrictions on the shape and timing of the light emission pulse by the host IC 7.

[0239] Other Embodiments The present technology is not limited to the above-described embodiments, and various other embodiments can be realized.

[0240] In the examples shown in Figures 14 to 17, the phase selected when generating the phase shifted clock signal is equal to the phase of any one of the sensor clock signal, the 90-degree phase shifted clock signal, the 180-degree phase shifted clock signal, and the 270-degree phase shifted clock signal.

[0241] Without being limited to this, as described with reference to Figures 8 and 9, the phase of the sensor shift clock signal may be changed by the same value as the detected phase difference to generate a phase shift clock signal.

[0242] When the phase of the sensor clock signal, the 90-degree phase-shifted clock signal, the 180-degree phase-shifted clock signal, or the 270-degree phase-shifted clock signal is selected as the phase to be shifted, the phase may be shifted by including a fixed offset, i.e., 0 degrees + offset value, 90 degrees + offset value, 180 degrees + offset value, or 270 degrees + offset value.

[0243] The distance measuring device 1, distance measuring system, sensor IC, configurations of each circuit, and processing flows such as detection of phase difference, generation of phase shift clock signal, sampling of received light signal, calculation of time information, and generation of histogram, which have been described with reference to the drawings, are merely one embodiment and can be arbitrarily modified without departing from the spirit of the present technology. In other words, any other configurations, algorithms, etc. for implementing the present technology may be adopted.

[0244] In this disclosure, terms such as "about," "approximately," "almost," and "roughly" may be used as appropriate to facilitate understanding of the description. However, there is no clear difference between using and not using terms such as "about," "approximately," "almost," and "approximately." In other words, in this disclosure, concepts that define shape, size, positional relationship, state, etc., such as "center," "middle," "uniform," and "equal," are concepts that include "substantially center," "substantially central," "substantially uniform," and "substantially equal." For example, states that fall within a predetermined range (e.g., a range of ±10%) based on "completely centered," "completely central," "completely uniform," and "completely equal" are also included. Therefore, even if terms such as "approximately," "almost," and "approximately" are not used, concepts expressed by adding "approximately," "almost," and "approximately" may be included. Conversely, states expressed by adding terms such as "approximately," "almost," and "approximately" do not necessarily exclude perfect states.

[0245] In the present disclosure, expressions using "than", such as "greater than A" and "smaller than A", are expressions that comprehensively include both concepts that include the case where it is equivalent to A and concepts that do not include the case where it is equivalent to A. For example, "greater than A" is not limited to cases that do not include equivalent to A, but also includes "A or greater". Furthermore, "smaller than A" is not limited to "less than A" but also includes "A or less". When implementing the present technology, specific settings and the like can be appropriately adopted from the concepts included in "greater than A" and "smaller than A" so that the effects described above can be achieved.

[0246] It is also possible to combine at least two of the features of the present technology described above. That is, the various features described in each embodiment may be arbitrarily combined without distinguishing between the embodiments. Furthermore, the various effects described above are merely examples and are not intended to be limiting, and other effects may also be achieved.

[0247] [Application Example of the Present Technology] The present technology can be applied to any distance measuring device and distance measuring system that employs distance measurement by the direct ToF method.

[0248] 18 is a schematic diagram showing an example of use of the distance measuring device and distance measuring system. The distance measuring device and distance measuring system according to the present technology can be used in various cases of sensing light such as visible light, infrared light, ultraviolet light, and X-rays, for example, as follows:

[0249] Devices that capture images for viewing, such as digital cameras and mobile devices with camera functions. Devices for traffic purposes, such as on-board sensors that capture images of the front, rear, surroundings, and interior of a vehicle for safe driving such as automatic stopping and for recognizing the driver's state, surveillance cameras that monitor moving vehicles and roads, and distance measuring sensors that measure distances between vehicles. Devices for home appliances such as TVs, refrigerators, and air conditioners that capture user gestures and operate the device according to those gestures. Devices for medical and healthcare purposes, such as endoscopes and devices that capture blood vessels by receiving infrared light. Devices for security purposes, such as surveillance cameras for crime prevention and cameras for person authentication. Devices for beauty purposes, such as skin measuring devices that capture skin images and microscopes that capture scalp images. Devices for sports, such as action cameras and wearable cameras for sports, etc. Devices for agricultural purposes, such as cameras for monitoring the condition of fields and crops.

[0250] <Application to a Mobile Body> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0251] FIG. 19 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0252] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 19, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0253] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0254] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0255] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0256] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0257] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0258] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0259] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0260] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0261] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 19, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0262] FIG. 20 is a diagram showing an example of the installation position of the imaging unit 12031.

[0263] In FIG. 20, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0264] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0265] 20 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0266] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0267] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0268] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0269] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0270] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the outside vehicle information detection unit 12030 of the above-described configuration when constructing a ranging device or a ranging system. For example, the image capturing unit 12031 can also be used as the light receiving unit 3 shown in FIG. 1 . By applying the present technology, highly accurate ranging can be achieved, making it possible to detect outside vehicle information with high accuracy.

[0271] The present technology may also be configured as follows: (1) A light-receiving device including: a light-receiving unit that receives light emitted from a light source unit and reflected by a target object; a clock unit that outputs a first clock signal; a receiving unit that receives a detection trigger signal for detecting a light-receiving timing of the reflected light synchronized with an emission trigger signal for controlling an emission timing of the light source unit; a phase shift unit that detects phase difference information regarding a phase difference of the detection trigger signal with respect to the first clock signal, and outputs a second clock signal obtained by shifting the phase of the first clock signal in accordance with the detected phase difference information; and a calculation unit that detects the light-receiving timing based on the second clock signal, and calculates time information from the emission timing to the light-receiving timing. (2) The light receiving device according to (1), wherein the receiver receives the detection trigger signal synchronized with the light emission trigger signal for each of a plurality of emissions from the light source, the phase shifter detects the phase difference information for each of the plurality of emissions and outputs the second clock signal, and the calculator detects the light reception timing for each of the plurality of emissions based on the second clock signal to generate a histogram of time information from the light emission timing to the light reception timing. (3) The light receiving device according to (1) or (2), wherein the light receiving unit has a light receiving element that receives the reflected light and outputs a light reception signal, and the calculator starts sampling the light reception signal at a sampling frequency higher than the frequency of the first clock signal based on the second clock signal, and detects the light reception timing based on the number of samples taken until the sampled value reaches a peak. (4) The light receiving device according to (3), wherein the phase shifter detects the phase difference information with a time resolution equal to or higher than the sampling frequency. (5) The light receiving device according to (3) or (4), wherein the calculation unit starts sampling of the received signal in synchronization with a rising edge of the second clock signal after a predetermined number of clocks have elapsed since the first rising edge after receiving the detection trigger signal.(6) The light receiving device according to (3) or (4), wherein the calculation unit starts sampling of the received signal in synchronization with a falling edge of the second clock signal a predetermined number of clocks after a first falling edge after receiving the detection trigger signal. (7) The light receiving device according to any one of (1) to (6), wherein, when L=360 / M (M is a divisor of 360 excluding 1 and 360), the phase shift unit detects the phase difference information using the first clock signal and M-1 phase-shifted clock signals obtained by shifting the phase of the first clock signal by L degrees, and outputs one of the first clock signal and the M-1 phase-shifted clock signals as the second clock signal based on the detected phase difference information. (8) The light receiving device according to (7), wherein the phase shift unit detects, as the phase difference information, which of M phase difference ranges defined as a range greater than (N-1)L degrees and less than NL degrees (N is an integer from 1 to M) the phase difference of the detection trigger signal with respect to the first clock signal falls within, and outputs the first clock signal as the second clock signal when the phase difference falls within a phase difference range greater than 0 degrees and less than L degrees, and outputs the phase-shifted clock signal in which the phase of the first clock signal is shifted by (C-1)L degrees as the second clock signal when the phase difference falls within a phase difference range greater than (C-1)L degrees and less than CL degrees (C is any integer from 2 to M).(9) The photodetector according to any one of (1) to (8), wherein the phase shift unit detects the phase difference information using the first clock signal, a first phase-shifted clock signal obtained by shifting the phase of the first clock signal by 90 degrees, a second phase-shifted clock signal obtained by shifting the phase of the first clock signal by 180 degrees, and a third phase-shifted clock signal obtained by shifting the phase of the first clock signal by 270 degrees, and outputs one of the first clock signal, the first phase-shifted clock signal, the second phase-shifted clock signal, and the third phase-shifted clock signal as the second clock signal based on the detected phase difference information. (10) The light receiving device according to (9), wherein the phase shift unit detects, as the phase difference information, whether the phase difference of the detection trigger signal with respect to the first clock signal is included in a first phase difference range greater than 0 degrees and less than 90 degrees, a second phase difference range greater than 90 degrees and less than 180 degrees, a third phase difference range greater than 180 degrees and less than 270 degrees, or a fourth phase difference range greater than 270 degrees and less than 360 degrees; and outputs the first clock signal as the second clock signal when the phase difference is included in the first phase difference range, outputs the first phase-shifted clock signal as the second clock signal when the phase difference is included in the second phase difference range, outputs the second phase-shifted clock signal as the second clock signal when the phase difference is included in the third phase difference range, and outputs the third phase-shifted clock signal as the second clock signal when the phase difference is included in the third phase difference range.(11) A distance measuring device comprising: a light source unit; a light receiving unit that receives light emitted from the light source unit and reflected by a target object; and a control unit that generates a light emission trigger signal for controlling the light emission timing of the light source unit based on a predetermined clock signal, outputs the signal to the light source unit, and generates a detection trigger signal for detecting the light reception timing of the reflected light synchronized with the light emission trigger signal based on the predetermined clock signal, and outputs the detection trigger signal to the light receiving unit, wherein the light receiving unit has: a light receiving unit that receives the reflected light, a clock unit that outputs a first clock signal, a receiving unit that receives the detection trigger signal, a phase shift unit that detects phase difference information regarding a phase difference of the detection trigger signal with respect to the first clock signal, and outputs a second clock signal obtained by shifting the phase of the first clock signal in accordance with the detected phase difference information, and a calculation unit that detects the light reception timing based on the second clock signal, and calculates time information from the light emission timing to the light reception timing, and the control unit calculates the distance to the target object based on the time information calculated by the light receiving unit.

[0272] L1...pulsed light L2...reflected light 1...range measuring device 2...light source unit 3...light receiving unit 4...target object 6...LiDAR system 7...host IC 10, 13, 18...sensor IC 9...laser 11...pixel array 12000...vehicle control system

Claims

1. A light receiving device comprising: a light receiving unit that receives light emitted from a light source unit and reflected by a target object; a clock unit that outputs a first clock signal; a receiving unit that receives a detection trigger signal for detecting the light receiving timing of the reflected light synchronized with an emission trigger signal for controlling the emission timing of the light source unit; a phase shift unit that detects phase difference information regarding the phase difference of the detection trigger signal relative to the first clock signal, and outputs a second clock signal in which the phase of the first clock signal is shifted in accordance with the detected phase difference information; and a calculation unit that detects the light receiving timing based on the second clock signal, and calculates time information from the emission timing to the light receiving timing.

2. A light receiving device according to claim 1, wherein the receiving unit receives the detection trigger signal synchronized with the light emission trigger signal for each of a plurality of emissions from the light source unit, the phase shift unit detects the phase difference information for each of the plurality of emissions and outputs the second clock signal, and the calculation unit detects the light reception timing for each of the plurality of emissions based on the second clock signal, thereby generating a histogram of time information from the light emission timing to the light reception timing.

3. A light receiving device according to claim 1, wherein the light receiving section has a light receiving element that receives the reflected light and outputs a light receiving signal, and the calculation section starts sampling the light receiving signal at a sampling frequency higher than the frequency of the first clock signal based on the second clock signal, and detects the light receiving timing based on the number of samples taken until the sampled value reaches a peak.

4. A light receiving device according to claim 3, wherein said phase shift section detects said phase difference information with a time resolution equal to or greater than said sampling frequency.

5. A light receiving device according to claim 3, wherein the calculation unit starts sampling of the received signal in synchronization with a rising edge of the second clock signal a predetermined number of clocks after the first rising edge after receiving the detection trigger signal.

6. A light receiving device according to claim 3, wherein the calculation unit starts sampling of the received signal in synchronization with the falling edge of the second clock signal a predetermined number of clocks after the first falling edge after receiving the detection trigger signal.

7. A light receiving device according to claim 1, wherein, when L=360 / M (M is a divisor of 360 excluding 1 and 360), the phase shift section detects the phase difference information using the first clock signal and M-1 phase-shifted clock signals obtained by shifting the phase of the first clock signal by L degrees, and outputs one of the first clock signal and the M-1 phase-shifted clock signals as the second clock signal based on the detected phase difference information.

8. A light receiving device according to claim 7, wherein the phase shift section detects, as the phase difference information, which of M phase difference ranges the phase difference of the detection trigger signal with respect to the first clock signal falls within, defined as a range of greater than (N-1)L degrees and less than NL degrees (N is an integer from 1 to M); and outputs the first clock signal as the second clock signal if the phase difference falls within a phase difference range of greater than 0 degrees and less than L degrees, and outputs the phase-shifted clock signal, in which the phase of the first clock signal is shifted by (C-1)L degrees, as the second clock signal if the phase difference falls within a phase difference range of greater than (C-1)L degrees and less than CL degrees (C is any integer from 2 to M).

9. A photodetector according to claim 1, wherein the phase shift section detects the phase difference information using the first clock signal, a first phase-shifted clock signal obtained by shifting the phase of the first clock signal by 90 degrees, a second phase-shifted clock signal obtained by shifting the phase of the first clock signal by 180 degrees, and a third phase-shifted clock signal obtained by shifting the phase of the first clock signal by 270 degrees, and outputs one of the first clock signal, the first phase-shifted clock signal, the second phase-shifted clock signal, and the third phase-shifted clock signal as the second clock signal based on the detected phase difference information.

10. A light receiving device according to claim 9, wherein the phase shift section detects, as the phase difference information, whether the phase difference of the detection trigger signal relative to the first clock signal is included in a first phase difference range greater than 0 degrees and less than 90 degrees, a second phase difference range greater than 90 degrees and less than 180 degrees, a third phase difference range greater than 180 degrees and less than 270 degrees, or a fourth phase difference range greater than 270 degrees and less than 360 degrees; and if the phase difference is included in the first phase difference range, outputs the first clock signal as the second clock signal; if the phase difference is included in the second phase difference range, outputs the first phase-shifted clock signal as the second clock signal; if the phase difference is included in the third phase difference range, outputs the second phase-shifted clock signal as the second clock signal; and if the phase difference is included in the third phase difference range, outputs the third phase-shifted clock signal as the second clock signal.

11. A distance measuring device comprising: a light source section; a light-receiving unit that receives light emitted from the light source section and reflected by a target object; and a control unit that generates a light-emission trigger signal for controlling the light-emission timing of the light source section based on a predetermined clock signal, outputs the signal to the light source section, and generates a detection trigger signal for detecting the light-receiving timing of the reflected light synchronized with the light-emission trigger signal based on the predetermined clock signal, and outputs the detection trigger signal to the light-receiving unit, wherein the light-receiving unit has: a light-receiving section that receives the reflected light; a clock section that outputs a first clock signal; a receiving section that receives the detection trigger signal; a phase shift section that detects phase difference information regarding the phase difference of the detection trigger signal with respect to the first clock signal, and outputs a second clock signal obtained by shifting the phase of the first clock signal in accordance with the detected phase difference information; and a calculation section that detects the light-receiving timing based on the second clock signal, and calculates time information from the light-emission timing to the light-receiving timing, and the control unit calculates the distance to the target object based on the time information calculated by the light-receiving unit.

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