Mounting device and positioning method

Abstract

The present invention provides a mounting device and a positioning method capable of placing chip components at prescribed positions on a substrate with minimal misalignment in the case of mounting the chip components on the substrate by using a stamp that holds a plurality of chip components. Specifically, the present invention provides a mounting device and a positioning method using same, the mounting device comprising a substrate stage that holds a substrate, a stamp that holds a plurality of chip components, a stamp base that holds the stamp, and an imaging means for observing the stamp base and the substrate from the same direction, wherein the stamp and the stamp base are transparent, and the imaging means can acquire position information about the stamp and / or the stamp base along with position information about the substrate at the same time.

Description

Mounting device and alignment method

[0001] The present invention relates to a mounting apparatus and alignment method for mounting chip components on a substrate, and more particularly to a mounting apparatus and alignment method using a stamp that holds a plurality of chip components.

[0002] There are applications where a large number of chip components are mounted on a substrate, such as a micro LED display in which a large number of micro LEDs are mounted on a TFT substrate. In such applications, it is necessary to align and mount the chip components on each of the many mounting positions PC on the substrate B shown in FIG.

[0003] For example, in a micro LED display, at least several hundred thousand LED chips need to be mounted on a single TFT substrate, and mounting the LED chips one by one would take an enormous amount of time. Therefore, efforts are being made to improve productivity by using a so-called stamp method (see, for example, Patent Document 1), which allows multiple chip components C to be mounted at once in accordance with the pitch of the mounting locations PC on the substrate B.

[0004] FIG. 10 illustrates a stamp used when mounting multiple chip components C on a substrate B at one time, with FIG. 10( a) being a side view and FIG. 10( b) being a view from the surface holding the chip components C. In FIG. 10, the stamp 6 has protrusions 61 arranged on a stamp body 60. The protrusions 61 function to hold the chip components C, and the protrusions 61 are arranged to match the pitch of the mounting positions PC. The stamp 6 is held by a stamp base 5 from the side opposite the surface with the protrusions 61. The first stamp recognition mark 6A1 and the second stamp recognition mark 6A2 are provided at fixed positions relative to the arrangement of the protrusions 61. Position information for the stamp 6 can be obtained from the positions of the first stamp recognition mark 6A1 and the second stamp recognition mark 6A2, and the arrangement of the protrusions 61 arranged on the stamp 6 can also be known.

[0005] FIG. 11 shows the state in which chip components C are mounted on a portion of a substrate B using the stamp 6 shown in FIG. 10, and a plurality of chip components C held by the stamp 6 are mounted on the substrate B at one time.

[0006] Japanese Patent Application Laid-Open No. 2023-145354

[0007] In order to mount a plurality of chip components C on the mounting locations PC of the substrate B using the stamp 6, each of the plurality of chip components C held by the stamp 6 must be aligned with the mounting locations PC of the substrate B before being mounted.

[0008] For this reason, alignment is performed using stamp recognition marks 6A (first stamp recognition mark 6A1 and second stamp recognition mark 6A2), which serve as a guide for determining the position information of the stamp and the arrangement of the chip components C held on the stamp, and board recognition marks BA, which serve as a guide for the arrangement of the mounting locations PC within the board B. Fig. 12(a) shows a state in which the stamp recognition marks 6A and board recognition marks BA are observed using a dual-viewpoint camera 70 with an upper and lower field of view. The amount of positional misalignment is calculated from the relative positions of the stamp 6 and board 2 obtained here, and the position of at least one of the board B and stamp 6 is adjusted to correct the amount of positional misalignment. Fig. 12(b) shows a state in which the stamp 6 is lowered to bring the chip components C into close contact with the board B.

[0009] The chip component C is then heated to bond its electrodes to the electrodes of the substrate B, thereby bonding the chip component C to the substrate B. Recently, a method using a laser to heat the chip component C has been gaining attention, and an example of this is shown in FIG. 13 . FIG. 13 shows a method for heating individual chip components C with laser light L. Due to the high energy density of the laser light, the chip components C can be heated instantaneously. Therefore, even when heating individual chip components C sequentially as shown in FIGS. 13( a ) to 13 ( c ), the time required to heat all of the chip components C held by the stamp 6 is short. To heat the chip components C with laser light L using the method shown in FIG. 13 , the stamp base 5 and stamp 6 must be able to transmit light linearly. That is, the stamp base 5 and stamp 6 are transparent.

[0010] After all of the chip components C held by the stamp 6 have been heated and mounted on the board B, the stamp 6 is raised as shown in Fig. 14(b). Thereafter, the stamp 6 holding the chip components C is placed over a predetermined area where the next chip component C will be mounted, as shown in Fig. 14(b), and the stamp 6 and board B are aligned before mounting.

[0011] 12(a) and 14(b), conventionally, a two-view imaging means 70, known as a two-view camera, has been used to obtain position information of the stamp recognition mark 6A and the board recognition mark BA. Here, the two-view imaging means 70 has an upper camera that images the stamp 6 and a lower camera that images the board B, so the two-view imaging means 70 needs to be placed between the stamp 6 and the board B. In other words, a space large enough to place the two-view imaging means 70 is required between the stamp 6 and the board B.

[0012] However, if there is a slight tilt in the axis of the lifting means used to raise and lower the stamp 6, even if there is no positional misalignment when observed with the two-view imaging means 70, this is undesirable as it will cause a positional misalignment when the chip component C comes into close contact with the substrate B.

[0013] The present invention has been made in consideration of the above-mentioned problems, and provides a mounting device and alignment method that can position chip components on a substrate while minimizing misalignment when mounting chip components on the substrate using a stamp that holds multiple chip components.

[0014] In order to solve the above problem, the invention described in claim 1 is a mounting device that mounts multiple chip components at predetermined positions on a substrate at one time, comprising: a substrate stage that holds the substrate; a stamp that holds the multiple chip components; a stamp base that holds the stamp; and imaging means that observes the stamp base and the substrate from the same direction, wherein the stamp and the stamp base are transparent, and the imaging means can simultaneously obtain positional information of at least one of the stamp and the stamp base, and positional information of the substrate.

[0015] A second aspect of the present invention is the mounting apparatus according to the first aspect, further comprising a chip surface imaging means for observing the stamp direction from the substrate stage side.

[0016] The invention of claim 3 is an alignment method for arranging a plurality of chip components held on a stamp at predetermined positions on a substrate, the alignment method comprising: a position information collection step of acquiring position information of the substrate and position information of the stamp from images captured from the same direction; a relative position calculation step of calculating the relative position of the stamp and the substrate based on the result obtained in the position information collection step; a correction amount calculation step of calculating a correction amount if the result obtained in the relative position calculation step is outside an allowable range; and an adjustment step of adjusting the position of at least one of the stamp and the substrate based on the correction amount.

[0017] The invention described in claim 4 is the alignment method described in claim 3, wherein, in the position information collection step, when acquiring the position information of the stamp, an image of a stamp recognition mark provided on the stamp is captured.

[0018] The invention described in claim 5 is an alignment method described in claim 4, in which, prior to the position information collection step, a chip information collection step is performed to obtain the positional relationship between the arrangement of chip components held by the stamp and the stamp recognition mark using an image captured from the surface side holding the chip components.

[0019] The invention described in claim 6 is an alignment method for arranging multiple chip components held on a stamp at predetermined positions on a substrate, comprising: a position information collection step for acquiring position information of the substrate and position information of a stamp base holding the stamp from images captured from the same direction; a relative position calculation step for calculating the relative position of the stamp base and the substrate based on the results obtained in the position information collection step; a correction amount calculation step for calculating a correction amount if the result obtained in the relative position calculation step is outside an allowable range; and an adjustment step for adjusting the position of at least one of the stamp base and the substrate based on the correction amount.

[0020] The invention described in claim 7 is the alignment method described in claim 6, wherein, in the position information collection step, when acquiring position information of the stamp base, an image of a stamp base recognition mark provided on the stamp base is captured.

[0021] The invention described in claim 8 is an alignment method described in claim 7, which includes, prior to the position information collection step, a chip information collection step in which the positional relationship between the arrangement of chip components held by the stamp and the stamp base recognition mark is obtained using an image captured from the surface side holding the chip components.

[0022] The invention described in claim 9 is an alignment method described in any one of claims 3 to 8, wherein, in the position information collection step, when acquiring position information of the substrate, an image of a substrate recognition mark provided on the substrate is captured.

[0023] A tenth aspect of the present invention is the alignment method according to the ninth aspect, wherein an image of the board recognition mark is captured through the stamp base.

[0024] The invention described in claim 11 is an alignment method described in any one of claims 3 to 8, wherein, in the position information collection step, an image of a chip component already mounted on the board is captured when acquiring position information of the board.

[0025] A twelfth aspect of the present invention is the alignment method according to the eleventh aspect, wherein an image of the chip component is taken through the stamp base.

[0026] According to the present invention, when chip components are mounted on a substrate using a stamp that holds a plurality of chip components, it is possible to position the chip components in predetermined positions on the substrate while suppressing misalignment.

[0027] 1 is a schematic diagram of a mounting apparatus according to an embodiment of the present invention. This is an explanation of the alignment method according to a first embodiment of the present invention, and (a) shows a state in which positional information about the stamp and the board is being acquired, and (b) is a diagram showing a state in which the positional relationship between the stamp recognition mark used to acquire the positional information of the stamp and the arrangement of chip components held by the stamp is being acquired. This is a diagram showing a state in which positional information about the board is being acquired using chip components already mounted on the board in alignment according to the first embodiment of the present invention. This is an explanation of an example in which stamp-compatible board recognition marks arranged according to the stamp are used for alignment according to the first embodiment of the present invention, and (a) shows the arrangement of the stamp-compatible board recognition marks provided on the board, and (b) is a diagram showing a state in which positional information about the board is being acquired using the stamp-compatible board recognition marks. In an example in which stamp-compatible board recognition marks are used in alignment according to the first embodiment of the present invention, this is an explanation of a case in which it is difficult to simultaneously capture images of both the stamp recognition mark and the stamp-compatible board recognition mark, and (a) shows a state in which positional information about the stamp recognition mark is being acquired, and (b) is a diagram showing a state in which positional information about the stamp-compatible board recognition mark is being acquired. This is an explanation of the arrangement of stamp-based recognition marks used in an alignment method according to a second embodiment of the present invention, and (a) is a side view, and (b) is a view seen from the surface holding the chip components. 10A is a diagram showing, with regard to alignment of a second embodiment of the present invention, (a) a state in which the positional relationship between the stamp-based recognition mark used to acquire position information of the stamp base and the arrangement of chip components held by the stamp is acquired, and (b) a state in which relative position information of the stamp recognition mark and the board is acquired. In an example in which a stamp-corresponding board recognition mark is used in alignment of a second embodiment of the present invention, (a) a state in which the stamp-corresponding board recognition mark and the stamp-based recognition mark are simultaneously imaged, and (b) a state in which position information of only the stamp-corresponding board recognition mark is acquired when it is difficult to simultaneously image both the stamp-based recognition mark and the stamp-corresponding board recognition mark. A diagram showing an example of a board on which a large number of chip components are mounted.1A and 1B are diagrams illustrating a stamp capable of mounting multiple chip components at once and a stamp base that holds the stamp, where (a) is a side view and (b) is a view from the surface that holds the chip components.

[0024] FIG. 1C is a diagram illustrating an example of mounting multiple chip components at once on a substrate using a stamp.

[0025] FIG. 1D is a diagram illustrating a process of mounting multiple chip components on a substrate using a stamp, where (a) shows a state of alignment and (b) shows a state where the chip components are in close contact with the substrate.

[0026] FIG. 1D is a diagram illustrating a process of mounting multiple chip components on a substrate using a stamp, where (a) shows a state where the chip components are being heated and mounted with a laser, (b) shows a state where different chip components are being heated and mounted in sequence with a laser, and (c) shows a stage where mounting of the chip components held by the stamp is completed.

[0027] FIG. 1D is a diagram illustrating a process of mounting multiple chip components on a substrate using a stamp, where (a) shows a state where the stamp that has mounted multiple chip components at once has been raised, and (b) shows a state where the stamp holding multiple chip components is being aligned in an area of ​​the substrate where no chip components are mounted.

[0028] 1 shows a mounting apparatus 1 used in a first and second embodiment of the present invention.

[0029] The mounting device 1 in Figure 1 uses a stamp 6 to mount multiple chip components C on a substrate B at once, and is equipped with a substrate stage 2, a lifting means 3, a head unit 4, a stamp base 5, the stamp 6, and an imaging means 7.

[0030] Here, the substrate stage 2 holds the substrate B on a flat surface by suction or the like, and may have a function to move the substrate B in the in-plane direction (XY direction).

[0031] The lifting means 3 is fixed to a frame (not shown), has a drive shaft connected to the head unit 4, and has the function of moving the head 4 up and down and the function of applying a predetermined pressure to the head 4. The lifting means 3 may also have the function of adjusting the rotation angle of the head 4, with the drive shaft movement direction (Z direction) as the rotation axis.

[0032] The head 4 has a stamp base 5 fixed to the bottom, and is moved up and down (and the rotation angle around the vertical axis) by the lifting means 3, and has a cavity through which the imaging means 7 can enter and exit.

[0033] The stamp base 5 is a transparent plate-like object that forms the underside of the head 4, and has the function of holding the stamp 6 on its underside. Here, it is preferable that the stamp 6 be replaceable, as the stamp 6 is held by suction or the like, but care must be taken when attempting to heat the chip component C with a laser, because the laser light will be scattered if there is a reduced pressure flow path in the optical path of the laser light leading to the part that holds the chip component C (the protrusion 61 in FIG. 10(a)).

[0034] As shown in Figure 10, the stamp 6 has protrusions 61 provided at locations on the stamp body 60, which is a transparent plate-like object, where the chip component C is to be held, and the side opposite to the side with the protrusions 61 is held by the stamp base 5. The protrusions 61 are provided at a pitch that matches the chip mounting locations PC of the board on which the chip component C is to be mounted. The surface of the protrusions 61 that comes into close contact with the chip component C may be adhesive, and the protrusions 61 themselves may be made of an adhesive material. Alternatively, there may be no protrusions 61, and the flat surface of the stamp body 60 may directly hold the chip component C.

[0035] The imaging means 7 has a field of view from above the stamp base 5 toward the substrate, and is configured so as to be able to move in and out of the cavity of the head portion 4 by a driving means (not shown).

[0036] The mounting apparatus 1 in Fig. 1 mainly shows the components related to alignment, but also includes a heating means for heating the chip components C. In the embodiment of the present invention, it is assumed that the chip components C are heated with laser light, and is provided with a laser irradiation means 9 (not shown), which is composed of a laser light source and a scanning mechanism. Note that the laser irradiation by the laser irradiation means 9 may be a method of scanning the laser light L to sequentially heat the chip components C, as shown in Fig. 13, but the takt time can be shortened by configuring the laser light emitted from a high-output laser light source to branch and heat multiple chip components C simultaneously.

[0037] The mounting apparatus 1 also includes a control unit 10 (not shown), which is connected to the substrate stage 2, the lifting means 3, the imaging means 7, and the laser irradiation means 9 (not shown).

[0038] The control unit 10 is connected to the substrate stage 2 and has the function of controlling whether or not the substrate B is attracted and the position of the substrate within the XY plane.

[0039] The control unit 10 is connected to the lifting means 3 and has the function of controlling the lifting and pressure of the head unit 4, as well as the rotation angle around the lifting direction (Z direction) as the rotation axis.

[0040] The control unit 10 is connected to the imaging means 7 (and a driving means for moving the imaging means 7), and has the function of controlling the position of the imaging means 7, and capturing and processing images acquired by the imaging means 7.

[0041] The control unit 10 is connected to the laser irradiation means 9 (not shown) and has the function of controlling the output and irradiation position of the laser light.

[0042] A method for aligning the substrate B and the stamp 6 using the mounting device 1 of FIG. 1 will be described below.

[0043] First, FIG. 2( a) illustrates the alignment method according to the first embodiment. In FIG. 2( a), the imaging unit 7 is placed on the stamp base 5 and faces the substrate B. This embodiment assumes that the chip components C are heated with laser light. Therefore, the stamp base 5 and stamp 6 are transparent, allowing images of the stamp recognition marks 6A and the substrate recognition marks BA on the substrate B to be captured from the same direction. This allows for the acquisition of positional information for the stamp 6 and the substrate B (positional information collection step). This allows the relative position of the stamp 6 with respect to the substrate B to be calculated, and the positional relationship between the arrangement of the chip components C held on the stamp 6 and the arrangement of the mounting positions PC on the substrate B is also calculated (relative position calculation step). If the result is within the allowable range, no positional correction is required. On the other hand, if the result is outside the allowable range, the amount of correction required to correct the misalignment is calculated (correction amount calculation step).

[0044] Therefore, once the correction amount is calculated, the position of at least one of the stamp 6 and the substrate B is adjusted according to the correction amount (adjustment step) to perform alignment. Here, in the configuration of the mounting device 1 shown in Fig. 1, the stamp 6 undergoes angle adjustment (with the Z direction as the axis of rotation) using the elevating means 3, and the substrate B undergoes position adjustment within the XY plane using the substrate stage 2. However, the configuration of the mounting device 1 is one embodiment, and the substrate stage 2 may have a function for adjusting the angle, or the head unit 4 may have a function for adjusting the position of the stamp base 5 in the X and Y directions.

[0045] As shown in Fig. 2(a), the stamp recognition mark 6A (related to the positional information of the stamp 6) and the board recognition mark BA (related to the positional information of the board B) can be observed from the same direction, so alignment can be performed with the stamp 6 close to the board B within a range where the chip component C does not come into contact with the board B. Therefore, the distance that the stamp 6 descends from alignment to bringing the chip component C into close contact with the board B can be made extremely short compared to the case where the two-view imaging means 70 shown in Fig. 12(a) is used. In other words, it is possible to prevent misalignment of the chip component C with respect to the mounting location on the board after alignment, and it is possible to place the chip component C at the predetermined position on the board B while preventing misalignment.

[0046] Incidentally, when the stamp 6 picks up the chip components C in the previous process, the arrangement of the protrusions 61 must be aligned with the arrangement of the chip components C to be picked up, but the chip components C may be picked up with a positional deviation. In such a case, even if the relative position calculation step and subsequent steps are performed using the positional relationship between the stamp recognition mark 6A and the protrusions 61, the amount of positional deviation at the time of picking up remains.

[0047] Therefore, the chip information collecting step shown in Fig. 2(b) is performed to mount the chip component C at the predetermined position on the board B even when the chip component C is held in a misaligned state with respect to the protrusion 61. The chip information collecting step is performed prior to the position information collecting step, and uses the chip surface imaging means 8 shown in Fig. 2(b) to obtain the positional relationship of the stamp recognition marks 6A with respect to the arrangement of the chip components C from the side of the stamp 6 that holds the chip components C, and this positional relationship can be used in the relative position calculating step. The chip surface imaging means 8 is also connected to the control unit 10, and the control unit 10 has the function of importing and processing the images obtained by the chip surface imaging means 8.

[0048] In the example shown in Figure 2(a), position information for board B is obtained using board recognition marks BA, but there is often only one set of board recognition marks BA per board B. Therefore, when aligning a large board B using only board recognition marks BA as a reference, there is a concern that the positional accuracy of the board may decrease. For this reason, it is also possible to use mounted chip components C as a reference for obtaining position information for board B. Figure 3 shows a state in which board position information is obtained using mounted chip components C, and the position information collection step is performed using chip components C at the corners, etc., of the chip component array that has already been mounted using stamp 6, and stamp recognition marks 6A.

[0049] Note that in the method using chip components C at corners of the chip component array, caution is required because there is a concern that if there is misalignment in the mounted chip components C, the amount of misalignment will accumulate with each mounting. Also, in mounting using the stamp 6, chip components C may be missing from the specified position on the board, and it is necessary to incorporate measures to deal with the case where chip components C are missing from a specific location (for example, a corner of the array).

[0050] For the reasons described above, in order to mount chip components C on a large substrate B with high precision, it is preferable to provide stamp-corresponding board recognition marks BPA on the substrate B in accordance with the stamp 6 (and the arrangement of chip components C held by the stamp 6). Figure 4(a) shows the stamp-corresponding board recognition marks BPA provided on the substrate B, and Figure 4(b) shows the imaging means 7 capturing images of the stamp-corresponding board recognition marks BPA to obtain substrate position information. Specifically, the relative positional relationship between the substrate B and the stamp 6 is determined from positional information regarding the stamp recognition first mark 6A1 and the stamp-corresponding board recognition mark BPAnm (n and m are natural numbers), and the stamp recognition mark 6A2 and the stamp-corresponding board recognition mark BPAn+1m+1. Note that even when using stamp-corresponding board recognition marks BPA, the chip position information step as shown in Figure 2(b) may be performed.

[0051] When the stamp-corresponding recognition mark BPA is used, as shown in FIG. 4B, the stamp recognition mark 6A (of the stamp 6) and the stamp-corresponding substrate recognition mark BPA are imaged for each alignment. Here, depending on the positional relationship between the stamp-corresponding substrate recognition mark BPA and the stamp 6 (for example, a situation in which the outer periphery of the stamp 6 is positioned directly above the stamp-corresponding substrate recognition mark BPA), it may not be possible to simultaneously image the stamp recognition mark 6A and the stamp-corresponding substrate recognition mark BPA. Taking such a situation into consideration, the observation may be divided into two observations, one for the stamp recognition mark 6A only and the other for the stamp-corresponding substrate recognition mark BPA only, as shown in FIG. 5A. When observing only the stamp-corresponding substrate recognition mark BPA, the relative position of the substrate B (and the imaging means 7) and the stamp 6 is changed by a predetermined amount, and then returned to its original position after observing only the stamp-corresponding substrate recognition mark BPA.

[0052] In the explanation up to this point, it has been assumed that the stamp 6 has a stamp recognition mark 6A, but the guide for arranging the chip components C held on the stamp 6 may be provided on the stamp base 5 instead of the stamp 6.

[0053] 6A and 6B show a stamp base 5 according to a second embodiment of the present invention, in which the stamp base 5 holds a stamp 6 (holding a chip component C), with Fig. 6A being a side view and Fig. 6B being a view seen from the surface holding the chip component C. The stamp base 5 of the second embodiment shown in Fig. 6 is provided with stamp base recognition marks 5A (stamp base first recognition mark 5A1 and stamp base second recognition mark 5A2). In the alignment method of the second embodiment, the stamp base recognition marks 5A are used instead of the stamp recognition marks 6A of the first embodiment, and the arrangement of the chip components C held by the stamp 6 can be known from the position information of the stamp base recognition marks 5A.

[0054] However, because the stamp recognition marks 6A are arranged at fixed positions relative to the arrangement of the protrusions 61, the arrangement of the protrusions 61 can be known only from the positional information of the stamp recognition marks 6A, but the arrangement of the protrusions 61 cannot be accurately known only from the stamp base recognition marks 5A provided on the stamp base 5 to which the stamp 6 can be detached. For this reason, when performing alignment using the stamp base recognition marks 5A, it is necessary to grasp the positional relationship of the stamp base recognition marks 5A relative to the arrangement of the chip components C using chip surface imaging means 8 as a chip information collection step, as shown in Figure 7(a).

[0055] When the stamp-based recognition mark 5A is used, as in the case of using the stamp recognition mark 6A in embodiment 1, the position information of the substrate B can be obtained using the substrate recognition mark BA shown in Figure 7(a), the mounted chip component C shown in Figure 8(a), or the stamp-compatible substrate recognition mark BPA shown in Figure 8(b).

[0056] In other words, by replacing the stamp recognition mark 6A in embodiment 1 with the stamp base recognition mark 5A, alignment can be performed through a position information collection step, a relative position calculation step, a correction amount calculation step, and an adjustment step, assuming that a chip information collection step is performed.

[0057] 7(b), 8(a), and 8(b), the stamp base recognition mark 5A and the mark related to the position information of the board B can be observed from the same direction, so alignment can be performed with the stamp 6 close to the board B within a range where the chip component C does not come into contact with the board B. This makes it possible to extremely shorten the distance required for descending from alignment to bringing the chip component C into close contact with the board B. In other words, it is possible to suppress misalignment of the chip component C with respect to the mounting location on the board that occurs after alignment.

[0058] REFERENCE SIGNS LIST 1 Mounting device 2 Substrate stage 3 Elevating means 4 Head section 5 Stamp base 6 Stamp 7 Imaging means (camera) 8 Chip surface imaging means 9 Laser irradiation means 10 Control section 60 Stamp body 61 Protrusion 70 Two-field imaging means (two-field camera) 5A (5A1, 5A2) Stamp base recognition mark 6A (6A1, 6A2) Stamp recognition mark B Substrate BA (BA1, BA2) Substrate recognition mark BPA Stamp-corresponding substrate recognition mark C Chip component L Laser light PC Chip component mounting location

Claims

1. A mounting apparatus that mounts multiple chip components at predetermined positions on a substrate at one time, comprising: a substrate stage that holds the substrate; a stamp that holds the multiple chip components; a stamp base that holds the stamp; and imaging means that observes the stamp base and the substrate from the same direction, wherein the stamp and the stamp base are transparent, and the imaging means can simultaneously obtain positional information of at least one of the stamp and the stamp base, and positional information of the substrate.

2. The mounting apparatus according to claim 1, further comprising a chip surface imaging means for observing the stamp direction from the substrate stage side.

3. An alignment method for arranging multiple chip components held on a stamp at predetermined positions on a substrate, comprising: a position information collection step for acquiring position information of the substrate and position information of the stamp from images captured from the same direction; a relative position calculation step for calculating the relative position of the stamp and the substrate based on the results obtained in the position information collection step; a correction amount calculation step for calculating the amount of correction if the result obtained in the relative position calculation step is outside an allowable range; and an adjustment step for adjusting the position of at least one of the stamp and the substrate based on the correction amount.

4. A positioning method according to claim 3, wherein, in the position information collection step, when acquiring the position information of the stamp, an image of a stamp recognition mark provided on the stamp is captured.

5. An alignment method as claimed in claim 4, wherein, prior to said position information collection step, a chip information collection step is carried out to obtain the positional relationship between the arrangement of chip components held by the stamp and the stamp recognition mark using an image captured from the surface side holding the chip components.

6. An alignment method for arranging multiple chip components held on a stamp at predetermined positions on a substrate, comprising: a position information collection step for acquiring position information of the substrate and position information of a stamp base holding the stamp from images captured from the same direction; a relative position calculation step for calculating the relative position of the stamp base and the substrate based on the results obtained in the position information collection step; a correction amount calculation step for calculating the amount of correction if the result obtained in the relative position calculation step is outside an allowable range; and an adjustment step for adjusting the position of at least one of the stamp base and the substrate based on the correction amount.

7. A positioning method according to claim 6, wherein, in the position information collection step, an image of a stamp base recognition mark provided on the stamp base is captured when acquiring the position information of the stamp base.

8. An alignment method as described in claim 7, wherein, prior to the position information collection step, a chip information collection step is performed in which the positional relationship between the arrangement of chip components held by the stamp and the stamp base recognition marks is obtained using an image captured from the surface side holding the chip components.

9. An alignment method according to any one of claims 3 to 8, wherein, in the position information collection step, when acquiring position information of the substrate, an image of a substrate recognition mark provided on the substrate is captured.

10. The alignment method according to claim 9, wherein the substrate recognition mark is imaged through the stamp base.

11. An alignment method according to any one of claims 3 to 8, wherein, in the position information collection step, when acquiring position information of the board, an image of a chip component already mounted on the board is taken.

12. The alignment method according to claim 11, wherein an image of the chip component is taken through the stamp base.

Images