Terminal device starting method, terminal device, and storage medium

Abstract

A terminal device starting method, a terminal device, and a storage medium. The method comprises: an adapter circuit receives a power-on instruction transmitted by a serial port of a central control device (S101); the adapter circuit transmits the power-on instruction to an interface chip circuit (S102); the interface chip circuit generates a power-up signal in response to the power-on instruction, and transmits the power-up signal to a power-up circuit (S103); and in response to the power-up signal, the power-up circuit performs voltage conversion on a voltage signal transmitted by a power supply circuit so as to generate a plurality of different power-up voltages, and powers up a central processing unit on the basis of the power-up voltages (S104). The method can not only achieve network-based remote startup but also enable startup operations on a plurality of terminal devices connected by means of serial ports, thereby improving the stability and reliability of remote startup of the terminal devices.

Description

A terminal device startup method, a terminal device, and a storage medium TECHNICAL FIELD

[0001] The present specification relates to the technical field of computers, and in particular to a terminal device startup method, a terminal device, and a storage medium. BACKGROUND

[0002] Nowadays, with the continuous development of electronic science and technology, in order to improve the operation convenience of users when operating a device, there are scenarios that require remote startup of the device to control the device to operate.

[0003] SUMMARY

[0004] The terminal device startup method, the terminal device, and the storage medium provided by the embodiments of the present specification can complete the startup of the terminal device, that is, can meet the network remote startup of the terminal device by the central control software and the central control device, and can also perform startup operations on multiple terminal devices connected according to one or more serial ports, thereby improving the stability and reliability of the remote startup of the terminal device.

[0005] In a first aspect, the embodiments of the present specification provide a device startup method. The method is applied to a terminal device, and the terminal device is used to be connected to a central control device. The terminal device includes an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit, and a power supply circuit. One end of the interface chip circuit is connected to one end of the switching circuit, and the other end of the interface chip circuit is connected to a first end of the power-on circuit. The other end of the switching circuit is connected to a serial port of the central control device. A second end of the power-on circuit is connected to the central processing unit, and a third end of the power-on circuit is connected to the power supply circuit.

[0006] The method includes the following steps.

[0007] The switching circuit receives a startup instruction transmitted by the serial port of the central control device. The startup instruction is generated by the central control device in response to a startup instruction transmitted by a central control software.

[0008] The switching circuit transmits the startup instruction to the interface chip circuit.

[0009] The interface chip circuit generates a power-on signal in response to the startup instruction and transmits the power-on signal to the power-on circuit.

[0010] The power-on circuit converts a direct current voltage transmitted by the power supply circuit into a plurality of different power-on voltages in response to the power-on signal, and powers on the central processing unit based on each power-on voltage.

[0011] According to the technical solution, the starting instruction generated by the network or offline operation is received by the central control software on the central control device, the generated starting instruction is transmitted to the terminal device through the serial port connected with the terminal device in response to the starting instruction, and the starting of the terminal device is completed, that is, the network remote starting of the terminal device by the central control software and the central control device can be met, and the starting operation on the plurality of terminal devices connected through one or more serial ports can be performed, and thus the stability and reliability of the remote starting of the terminal device are improved.

[0012] In combination with the first aspect, in some possible implementation manners, when the switching circuit is an isolation circuit, the isolation circuit comprises a first instruction receiving end, a field effect tube and a first instruction output end, the first instruction receiving end is connected with the ring detection port of the central control device, and the first instruction output end is connected with the interface chip circuit.

[0013] The gate of the field effect tube is connected with the first instruction receiving end, the drain of the field effect tube is connected with the first instruction output end, and the source of the field effect tube is grounded.

[0014] The switching circuit transmits the starting instruction to the interface chip circuit, comprising:

[0015] The first instruction receiving end transmits the received starting instruction to the gate of the field effect tube, when the starting instruction received by the gate of the field effect tube is a low-level signal, the drain and the source of the field effect tube are turned on, the first instruction output end transmits the low-level signal to the interface chip circuit, so that the interface chip circuit enables the power supply circuit and the power-on circuit to power on the central processing unit in response to the low-level signal transmitted by the isolation circuit.

[0016] According to the technical solution, when the central control device has the ring detection port, the interface chip circuit is enabled to trigger the starting function by the isolation circuit, the high-level signal is isolated, the high-level signal is prevented from damaging the interface chip circuit, and thus the efficiency and safety of the starting of the terminal device are improved.

[0017] In combination with the first aspect and the implementation manners, in some possible implementation manners, when the switching circuit comprises a first conversion circuit and a micro control circuit, one end of the first conversion circuit is connected with the output port of the central control device, the other end of the first conversion circuit is connected with one end of the micro control circuit, and the other end of the micro control circuit is connected with the interface chip circuit.

[0018] The switching circuit transmits the starting instruction to the interface chip circuit, comprising:

[0019] The first conversion circuit receives the starting instruction transmitted by the output port of the central control device, and transmits the starting instruction to the micro control circuit.

[0020] The micro control circuit compares the start-up instruction with a preset start-up condition, and when the start-up instruction meets the start-up condition, generates a start-up signal and transmits the start-up signal to the interface chip circuit.

[0021] By the above technical solution, when the central control device does not have a ring detection port, the start-up instruction is transmitted to the switching circuit through the output port, so that the micro control circuit generates a start-up signal in response to the start-up instruction and transmits the start-up signal to the interface chip circuit, enabling the interface chip circuit to trigger the start-up function, meeting the equipment models of different central control devices, thereby ensuring that the central control device can start the terminal equipment through the output port while providing the stability of the isolation circuit solution, and thus improving the applicability of starting the terminal equipment through the central control device.

[0022] In some possible implementation manners, in combination with the first aspect and the above implementation manners, the first conversion circuit includes a first conversion chip, a second instruction receiving end and a second instruction output end, and the micro control circuit includes a micro control chip, a third instruction receiving end and a start-up signal output end;

[0023] The second instruction receiving end is connected with the output port of the central control device, the second instruction receiving end is connected with the first conversion chip, the first conversion signal is connected with the second instruction output end, the second instruction output end is connected with the third instruction receiving end, the third instruction receiving end is connected with the micro control chip, the micro control chip is connected with the start-up signal output end, and the start-up signal output end is connected with the interface chip circuit;

[0024] The switching circuit transmits the start-up instruction to the interface chip circuit, including:

[0025] The first conversion chip receives the start-up instruction output by the output port of the central control device based on the second instruction receiving end, and transmits the start-up instruction to the third instruction receiving end of the micro control circuit based on the second instruction output end;

[0026] The micro control chip receives the start-up instruction based on the third instruction receiving end, and compares the start-up code in the start-up instruction with a preset start-up condition;

[0027] When the start-up code matches the preset start-up condition, the micro control chip determines that the start-up instruction meets the preset start-up condition, and generates a start-up signal, which is transmitted to the interface chip circuit based on the start-up signal output end.

[0028] In some possible implementation manners, in combination with the first aspect and the above implementation manners, the interface chip circuit includes a fourth instruction receiving end, an interface chip and a first power-on signal output end, the fourth instruction receiving end is connected with the switching circuit, and the first power-on signal output end is connected with the power-on circuit.

[0029] The interface chip circuit generates a power-on signal in response to a start-up instruction, and transmits the power-on signal to the power-on circuit, including:

[0030] The interface chip receives the start-up instruction transmitted by the switching circuit based on the fourth instruction receiving end, generates a power-on signal in response to the start-up instruction, and transmits the power-on signal to the power-on circuit based on the first power-on signal output end.

[0031] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected with the interface chip circuit, the other end of the power-on control circuit is connected with one end of the power supply circuit, the other end of the power supply circuit is connected with one end of the power management circuit, and the other end of the power management circuit is connected with the central processing unit;

[0032] The power-on circuit generates a plurality of different power-on voltages by voltage conversion on the direct current power voltage transmitted by the power supply circuit in response to the power-on signal, and powers on the central processing unit based on each power-on voltage, including:

[0033] The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal;

[0034] The power supply circuit generates a direct current power voltage by voltage conversion on an alternating current power in response to the power-on signal, and transmits the direct current power voltage to the power management circuit;

[0035] The power management circuit generates a power-on voltage corresponding to each unit of the central processing unit by voltage conversion, and transmits each power-on voltage to each unit of the central processing unit for power-on.

[0036] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the power-on control circuit includes a second signal receiving end, a power-on chip, and a second signal output end, the second signal receiving end is connected with the interface chip circuit, and the second signal output end is connected with the power supply circuit;

[0037] The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal, including:

[0038] The power-on chip receives the power-on signal transmitted by the interface chip circuit based on the first power-on signal receiving end, and transmits the power-on signal to the power supply circuit based on the second power-on signal output end.

[0039] With reference to the first aspect and the above implementation manners, in some possible implementation manners, the power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip, and a first voltage output end, the second power-on signal receiving end is connected with the power-on control circuit, the first voltage receiving end is connected with the external power supply, and the first voltage output end is connected with the power management circuit.

[0040] The power supply circuit converts the alternating power supply into a direct current power supply voltage in response to the power-on signal, and transmits the direct current power supply voltage to the power management circuit, including:

[0041] The power supply circuit transmits the alternating power supply received by the first voltage receiving end to the first voltage conversion chip in response to the power-on signal received based on the second power-on signal receiving end.

[0042] The first voltage conversion chip converts the alternating power supply into a direct current power supply voltage, and transmits the direct current power supply voltage to the power management circuit based on the first voltage output end.

[0043] With reference to the first aspect and the above implementation manners, in some possible implementation manners, the power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip, and a second voltage output end, the second voltage receiving end is connected with the power supply circuit, and the voltage distribution chip is connected with each unit of the central processing unit based on the second voltage output end.

[0044] The power management circuit converts the voltage for each unit in the central processing unit, generates a power-on voltage corresponding to each unit, and transmits each power-on voltage to each unit in the central processing unit for power-on, including:

[0045] The second voltage conversion chip receives the direct current power supply voltage based on the second voltage receiving end, converts the direct current power supply voltage based on the working voltage of each unit in the central processing unit, and generates a power-on voltage corresponding to each unit.

[0046] The power-on voltage is transmitted to the voltage distribution chip, and the voltage distribution chip powers on each unit in the central processing unit based on the second voltage output end and the power-on voltage.

[0047] Through the above technical solution, the direct current power supply voltage transmitted by the power supply circuit is distributed according to the working voltage of each unit in the central processing unit, and each unit is powered on to enable the central processing unit to enter a working state.

[0048] In some possible implementation manners, in combination with the first aspect and the foregoing implementation manners, the voltage distribution chip includes a first voltage supply end, a second voltage supply end, and a third voltage supply end, the central processing unit includes at least a processing unit, a memory unit, and a management unit, the voltage distribution chip is connected to the processing unit based on the first voltage supply end, is connected to the memory unit based on the second voltage supply end, and is connected to the management unit based on the third voltage supply end;

[0049] The voltage distribution chip powers on each unit in the central processing unit based on the second voltage output end, including:

[0050] The voltage distribution chip powers on the processing unit based on the first voltage supply end and the first voltage, and the first voltage is the power-on voltage corresponding to the processing unit;

[0051] The voltage distribution chip powers on the memory unit based on the second voltage supply end and the second voltage, and the second voltage is the power-on voltage corresponding to the memory unit;

[0052] The voltage distribution chip powers on the management unit based on the third voltage supply end and the third voltage, and the third voltage is the power-on voltage corresponding to the management unit.

[0053] In some possible implementation manners, in combination with the first aspect and the foregoing implementation manners, the central processing unit includes a power-off instruction output end, the power-on circuit further includes a power supply circuit, the power supply circuit includes a power-off instruction receiving end, a third voltage receiving end, a first power supply end, a second power supply end, and a third power supply end, the first conversion circuit further includes a first power supply receiving end, the micro control circuit further includes a second power supply receiving end, and the interface chip circuit further includes a third power supply receiving end;

[0054] The power-off instruction output port is connected to the power-off instruction receiving port, the third voltage receiving end is connected to the power supply circuit, the first power supply end is connected to the first conversion circuit based on the first power supply receiving end, the second power supply end is connected to the micro control circuit based on the second power supply receiving end, and the third power supply end is connected to the interface chip circuit based on the third power supply receiving end;

[0055] The method further includes:

[0056] When the central processing unit enters the power-off state, the central processing unit outputs a power-off instruction to the power-on circuit based on the power-off instruction output port, and the power-on circuit stops providing power to the central processing unit in response to the power-off instruction received based on the power-off instruction receiving port;

[0057] The power supply circuit provides power for the first conversion circuit based on the first power supply and the first power supply end provided by the power supply circuit, and enables the first conversion circuit to run in a low-power state based on the power received by the first power supply receiving end;

[0058] The power supply circuit provides power supply for the micro control circuit based on the second power supply provided by the power supply circuit and the second power supply end, so that the micro control circuit operates in a low power consumption state in response to the power supply received based on the second power supply receiving end;

[0059] The power supply circuit provides power supply for the interface chip circuit based on the third power supply provided by the power supply circuit and the third power supply end, so that the interface chip circuit operates in a low power consumption state based on the power supply received by the third power supply receiving end.

[0060] Through the above technical solution, the terminal device can respond to the power-on instruction transmitted by the central control device to start the terminal device.

[0061] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the first switching circuit includes a first signal receiving end, a first signal output end, a second signal receiving end and a second signal output end, and the micro control circuit further includes a third signal receiving end and a third signal output end;

[0062] The first signal receiving end is connected with the output port of the central control device, the first signal output end is connected with the third signal receiving end, the third signal output end is connected with the second signal receiving end, and the second signal output end is connected with the input port of the central control device;

[0063] The method further includes:

[0064] When the first signal receiving end of the first switching circuit receives the state acquisition signal transmitted by the output port of the central control device in the case that the central processing unit is in the power-on state, the first switching circuit transmits the state acquisition signal to the third signal receiving end of the micro control circuit based on the first signal output end;

[0065] The micro control circuit transmits the stored device state information to the second signal receiving end of the first switching circuit based on the third output end;

[0066] The second signal output end of the first switching circuit transmits the device state information to the central control device based on the input port of the central control device.

[0067] Through the above technical solution, the device state information is transmitted to the central control device according to the micro control circuit and the first switching circuit, so that the response to the state acquisition request of the central control device is realized.

[0068] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the central processing unit further includes a fourth signal output end, the interface chip circuit includes a fourth signal receiving end and a fifth signal output end, and the micro control circuit includes a fifth signal receiving end;

[0069] The fourth signal output end is connected with the fourth signal receiving end, and the fifth signal output end is connected with the fifth signal receiving end.

[0070] The method further includes:

[0071] When the device state of the terminal device changes, the central processor generates device state information corresponding to the device state, and transmits the device state information to the fourth signal receiving end of the interface chip circuit based on the fourth signal output end;

[0072] The interface chip circuit transmits the device state information to the fifth signal receiving end of the micro control circuit based on the fifth signal output end, and the micro control circuit stores the device state information.

[0073] Through the above technical solution, the micro control circuit receives and stores the device state information transmitted by the central processor, so that when a state acquisition request of the central control device is received, the state acquisition request can be responded based on the device state information.

[0074] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the terminal device further includes a second conversion circuit, the central processor includes a first output end and a first result receiving end, the interface chip circuit includes a first receiving end, a second result receiving end, a second output end and a first result output end, and the second conversion circuit includes a second receiving end, a third output end, a third result receiving end and a second result output end;

[0075] The first output end is connected with the first receiving end, the second output end is connected with the second receiving end, the third output end is connected with the input port of the central control device, the third result receiving end is connected with the output port of the central control device, the second result output end is connected with the second result receiving end, and the first result output end is connected with the first result receiving end;

[0076] The method further includes:

[0077] The first receiving end of the interface chip circuit receives the serial port debugging instruction transmitted by the central processor based on the first output end, and transmits the serial port debugging instruction to the second receiving end of the second conversion circuit based on the second output end;

[0078] The second conversion circuit transmits the serial port debugging instruction to the input port of the central control device based on the third output end, so as to perform serial port debugging on the serial port of the central control device;

[0079] The third result receiving end of the second conversion circuit receives the serial port debugging result of the central control device, and transmits the serial port debugging result to the second result receiving end of the interface chip circuit based on the second result output end;

[0080] The interface chip circuit transmits the serial port debugging result to the first result receiving end of the central processor based on the first result output end.

[0081] By the technical solution, the second conversion circuit is used to detect the serial port of the central control device by the terminal device, so that the serial port of the central control device can normally operate, and the stability of the terminal device and the central control device is improved.

[0082] In a second aspect, the embodiments of the present specification provide a terminal device, which is used to be connected with a central control device. The terminal device comprises an interface chip circuit, a conversion circuit, a central processing unit, a power-on circuit and a power supply circuit. One end of the interface chip circuit is connected with one end of the conversion circuit, the other end of the interface chip circuit is connected with a first end of the power-on circuit, the other end of the conversion circuit is connected with a serial port of the central control device, a second end of the power-on circuit is connected with the central processing unit, and a third end of the power-on circuit is connected with the power supply circuit.

[0083] In combination with the second aspect, in some possible implementation manners, when the conversion circuit is an isolation circuit, the isolation circuit comprises a first instruction receiving end, a field effect tube and a first instruction output end. The first instruction receiving end is connected with a ring detection port of the central control device, and the first instruction output end is connected with the interface chip circuit.

[0084] The gate of the field effect tube is connected with the first instruction receiving end, the drain of the field effect tube is connected with the first instruction output end, and the source of the field effect tube is grounded.

[0085] In combination with the second aspect and the above implementation manners, in some possible implementation manners, when the conversion circuit comprises a first conversion circuit and a micro control circuit, one end of the first conversion circuit is connected with an output port of the central control device, the other end of the first conversion circuit is connected with one end of the micro control circuit, and the other end of the micro control circuit is connected with the interface chip circuit.

[0086] In combination with the second aspect and the above implementation manners, in some possible implementation manners, the first conversion circuit comprises a first conversion chip, a second instruction receiving end and a second instruction output end, the micro control circuit comprises a micro control chip, a third instruction receiving end and a start-up signal output end.

[0087] The second instruction receiving end is connected with the output port of the central control device, the second instruction receiving end is connected with the first conversion chip, the first conversion signal is connected with the second instruction output end, the second instruction output end is connected with the third instruction receiving end, the third instruction receiving end is connected with the micro control chip, the micro control chip is connected with the start-up signal output end, and the start-up signal output end is connected with the interface chip circuit.

[0088] In combination with the second aspect and the above implementation manners, in some possible implementation manners, the interface chip circuit comprises a fourth instruction receiving end, an interface chip and a first power-on signal output end. The fourth instruction receiving end is connected with the conversion circuit, and the first power-on signal output end is connected with the power-on circuit.

[0089] With reference to the second aspect and the foregoing implementations, in some possible implementations, the power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected with the interface chip circuit, the other end of the power-on control circuit is connected with one end of the power supply circuit, the other end of the power supply circuit is connected with one end of the power management circuit, and the other end of the power management circuit is connected with the central processor.

[0090] With reference to the second aspect and the foregoing implementations, in some possible implementations, the power-on control circuit includes a second signal receiving end, a power-on chip and a second signal output end, the second signal receiving end is connected with the interface chip circuit, and the second signal output end is connected with the power supply circuit.

[0091] With reference to the second aspect and the foregoing implementations, in some possible implementations, the power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip and a first voltage output end, the second power-on signal receiving end is connected with the power-on control circuit, the first voltage receiving end is connected with the external power supply, and the first voltage output end is connected with the power management circuit.

[0092] With reference to the second aspect and the foregoing implementations, in some possible implementations, the power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip and a second voltage output end, the second voltage receiving end is connected with the power supply circuit, and the voltage distribution chip is connected with each unit of the central processor based on the second voltage output end.

[0093] With reference to the second aspect and the foregoing implementations, in some possible implementations, the voltage distribution chip includes a first voltage supply end, a second voltage supply end and a third voltage supply end, the central processor at least includes a processing unit, a memory unit and a management unit, the voltage distribution chip is connected with the processing unit based on the first voltage supply end, is connected with the memory unit based on the second voltage supply end, and is connected with the management unit based on the third voltage supply end.

[0094] With reference to the second aspect and the foregoing implementations, in some possible implementations, the central processor includes a power-off instruction output end, and the power-on circuit further includes a power supply circuit, the power supply circuit includes a power-off instruction receiving end, a third voltage receiving end, a first supply end, a second supply end and a third supply end, the first conversion circuit further includes a first power supply receiving end, the micro-control circuit further includes a second power supply receiving end, and the interface chip circuit further includes a third power supply receiving end.

[0095] The power-off instruction output port is connected with the power-off instruction receiving port, the third voltage receiving end is connected with the power supply circuit, the first power supply end based on the first power source receiving end is connected with the first switching circuit, the second power supply end based on the second power source receiving end is connected with the micro-control circuit, and the third power supply end based on the third power source receiving end is connected with the interface chip circuit.

[0096] In some possible implementation manners, in combination with the second aspect and the foregoing implementation manners, the first switching circuit comprises a first signal receiving end, a first signal output end, a second signal receiving end and a second signal output end, and the micro-control circuit further comprises a third signal receiving end and a third signal output end.

[0097] The first signal receiving end is connected with the output port of the central control device, the first signal output end is connected with the third signal receiving end, the third signal output end is connected with the second signal receiving end, and the second signal output end is connected with the input port of the central control device.

[0098] In some possible implementation manners, in combination with the second aspect and the foregoing implementation manners, the central processing unit further comprises a fourth signal output end, the interface chip circuit comprises a fourth signal receiving end and a fifth signal output end, and the micro-control circuit comprises a fifth signal receiving end.

[0099] The fourth signal output end is connected with the fourth signal receiving end, and the fifth signal output end is connected with the fifth signal receiving end.

[0100] In some possible implementation manners, in combination with the second aspect and the foregoing implementation manners, the terminal device further comprises a second switching circuit, the central processing unit comprises a first output end and a first result receiving end, the interface chip circuit comprises a first receiving end, a second result receiving end, a second output end and a first result output end, and the second switching circuit comprises a second receiving end, a third output end, a third result receiving end and a second result output end.

[0101] The first output end is connected with the first receiving end, the second output end is connected with the second receiving end, the third output end is connected with the input port of the central control device, the third result receiving end is connected with the output port of the central control device, the second result output end is connected with the second result receiving end, and the first result output end is connected with the first result receiving end.

[0102] In a third aspect, a computer storage medium is provided in the embodiments of the present specification, and the computer storage medium stores a plurality of instructions. The instructions are suitable for being loaded by a processor and performing the steps of the method described above. BRIEF DESCRIPTION OF DRAWINGS

[0103] In order to more clearly illustrate the technical solutions in the specification or the related art, the drawings needed to be used in the embodiments or the related description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the specification, and other drawings can be obtained by those skilled in the art without creative effort.

[0104] Fig. 1 is a system architecture diagram of a device startup method provided by an embodiment of the specification;

[0105] Fig. 2 is a structural schematic diagram of a terminal device provided by an embodiment of the specification;

[0106] Fig. 3 is a flow schematic diagram of a device startup method provided by an embodiment of the specification;

[0107] Fig. 4 is a flow schematic diagram of a device startup method provided by an embodiment of the specification;

[0108] Fig. 5 is a structural schematic diagram of an isolation circuit provided by an embodiment of the specification;

[0109] Fig. 6 is a structural schematic diagram of a conversion circuit provided by an embodiment of the specification;

[0110] Fig. 7 is a structural schematic diagram of a conversion circuit provided by an embodiment of the specification;

[0111] Fig. 8 is a structural schematic diagram of a second conversion circuit provided by an embodiment of the specification;

[0112] Fig. 9 is a structural schematic diagram of an interface chip circuit provided by an embodiment of the specification;

[0113] Fig. 10 is a structural schematic diagram of a serial port debugging method provided by an embodiment of the specification;

[0114] Fig. 11 is a structural schematic diagram of a power-on circuit provided by an embodiment of the specification;

[0115] Fig. 12 is a structural schematic diagram of a power-on control circuit provided by an embodiment of the specification;

[0116] Fig. 13 is a structural schematic diagram of a power supply circuit provided by an embodiment of the specification;

[0117] Fig. 14 is a structural schematic diagram of a power management circuit provided by an embodiment of the specification;

[0118] Fig. 15 is a structural schematic diagram of a voltage distribution method provided by an embodiment of the specification;

[0119] Fig. 16 is a structural schematic diagram of a power supply circuit provided by an embodiment of the specification. DETAILED DESCRIPTION

[0120] In order to make the features and advantages of the present specification more apparent and easy to understand, the technical solutions in the present specification will be described clearly and completely below in conjunction with the drawings in the present specification. Obviously, the described embodiments are only some of the embodiments of the present specification, but not all the embodiments. Based on the embodiments in the present specification, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present specification.

[0121] In the related art, when starting a device remotely, the method adopted is to wake up the device through the network, the Ethernet chip in the device receives the boot data packet transmitted by other terminal devices according to the network communication of the device, analyzes the boot data packet to obtain the boot instruction, and transmits the boot instruction to the interface chip to power on the central processor of the terminal device, so as to realize waking up the device. However, this method is affected by the network configuration of the device. If the devices are not in the same local area network, or the network quality of the device is insufficient, etc., the boot data packet cannot be obtained, and there is a problem that the device cannot be successfully woken up by transmitting the boot data packet.

[0122] Specifically, in the classroom, the terminal device of the teacher as the administrator device is connected with other terminal devices in the classroom through the local area network. In order to facilitate starting all terminal devices in the classroom before the teacher teaches a course, when remotely waking up the terminal device of the student, the administrator device transmits the boot data packet to each terminal device through the local area network, and the network communication module in the terminal device receives and analyzes the boot data packet, and transmits the analyzed boot instruction to the interface chip in the terminal device to power on the central processor in the terminal device. However, when waking up by using the wireless communication mode, the terminal device and other terminal devices need to be in the same local area network. If they are not in the same local area network, or the network signal is unstable, the boot data packet cannot be successfully transmitted to the terminal device, resulting in failure to wake up the terminal device.

[0123] And by using the device starting method provided in the present application, in the classroom, the administrator device of the teacher and other terminal devices are connected through a plurality of ports drawn out from the serial port of the central control device, or each terminal device is configured with a central control device. The teacher can transmit the boot instruction to each central control device through the cloud server of the central control software to wake up each terminal device connected with the central control device. The administrator device can also transmit the boot instruction to each terminal device through the central control device to wake up each terminal device.

[0124] Based on this, the application provides a device starting method, which receives a starting instruction generated by network or offline operation through the central control software on the central control device, transmits the generated starting instruction to the terminal device through the serial port connected with the terminal device in response to the starting instruction, and thus completes the starting of the terminal device, that is, can meet the network remote starting of the terminal device through the central control software and the central control device, and can also perform starting operation on the connected multiple terminal devices according to one or more serial ports, and thus improves the stability and reliability of the remote starting of the terminal device.

[0125] Please refer to FIG. 1, which is a system structure diagram of the device starting method provided in the embodiment of the present application.

[0126] As shown in FIG. 1, the central control device generates a starting instruction in response to the starting instruction received by the central control software installed on the central control device, and transmits the starting instruction to the terminal device since the serial port of the central control device is connected with the terminal device, and the terminal device powers on the central processing unit in response to the starting instruction, and thus completes the starting of the terminal device. The serial port of the central control device is connected with the terminal device, the starting instruction is transmitted to the central control device by other devices through the server of the central control software for remote communication, the starting instruction generated by the starting instruction is transmitted to the connected terminal device, the remote starting of the terminal device is realized, and the stability and reliability of the remote starting of the terminal device are improved.

[0127] The terminal device can be a device with network communication function or port data receiving function, for example, can be a notebook computer, a personal computer or a smart interactive tablet, etc.; the central control device can be a device including a serial port for data transmission, and the central control software is installed in the central control device to generate and transmit the starting instruction to the terminal device for device wake-up.

[0128] Further, when the central control device is connected with multiple terminal devices through the serial port, the central control device sets multiple serial ports, connects each serial port with multiple terminal devices respectively, generates the starting instruction by operating the central control software, and transmits the starting instruction generated by the starting instruction to each terminal device connected according to each serial port, so as to realize the remote starting of the terminal device according to the hardware connection.

[0129] In the embodiment of the present application, the starting instruction generated by network or offline operation is received through the central control software on the central control device, the starting instruction generated is transmitted to the terminal device through the serial port connected with the terminal device in response to the starting instruction, and thus the starting of the terminal device is completed, that is, the network remote starting of the terminal device through the central control software and the central control device can be met, and the starting operation on the connected multiple terminal devices according to one or more serial ports can also be performed, and thus the stability and reliability of the remote starting of the terminal device are improved.

[0130] Based on the system architecture shown in Figure 1, the device starting method provided by the embodiments of the present application will be described in detail below in combination with Figures 2-16.

[0131] Please refer to Figure 2, which is a structural schematic diagram of the terminal device of the present application. The terminal device is used to be connected with the central control device, and the terminal device comprises an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit. One end of the interface chip circuit is connected with one end of the switching circuit, the other end of the interface chip circuit is connected with the first end of the power-on circuit, the other end of the switching circuit is connected with the serial port of the central control device, the second end of the power-on circuit is connected with the central processing unit, and the third end of the power-on circuit is connected with the power supply circuit.

[0132] The switching circuit can be used to detect the starting instruction transmitted by the central control device; the interface chip circuit is used to generate a power-on signal in response to the starting instruction, so that the power supply circuit transmits the power voltage to the power-on circuit; the power-on circuit is used to convert the power voltage transmitted by the power supply circuit to obtain the power-on voltage of each unit in the central processing unit, and power on each unit in the central processing unit to complete the starting of the terminal device.

[0133] The switching circuit can be an isolation circuit, or can comprise a first conversion circuit and a micro control circuit. When the switching circuit is an isolation circuit, the isolation circuit is connected with the ring detection port of the central control device; when the switching circuit is the first conversion circuit and the micro control circuit, the first conversion circuit is connected with the output port of the central control device.

[0134] The central control device can be used to generate a starting signal according to the starting instruction of the central control software, and the starting signal is transmitted to the terminal device through the serial port of the central control device to start the terminal device. The serial port of the central control device can comprise an input port, an output port and a ring detection port, and the input port, the output port and the ring detection port can be three pins on the serial port of the central control device. For example, when the serial port of the central control device is RS232, the input port can be the second pin in RS232, the output port can be the third pin in RS232, and the ring detection port can be the ninth pin in RS232.

[0135] Please refer to Figure 3, which is a flowchart of a device starting method provided by the embodiments of the present application. As shown in Figure 3, the device starting method can comprise the following steps S101-S104.

[0136] S101, the switching circuit receives the starting instruction transmitted by the serial port of the central control device;

[0137] In one embodiment, the central control device installs central control software, which generates a booting instruction when receiving a starting instruction, and transmits the booting instruction to the switching circuit, which receives the booting instruction transmitted by the central control device through the serial port.

[0138] The central control device can be a device installed with the central control software, and the central control device can include an RS232 serial port (asynchronous transmission standard interface), which can include an input port, an output port and a ring detection port. The central control device can also have a network communication function, and communicate with other devices through a connected local area network or the Internet.

[0139] The central control software can be software installed on the central control device, and other devices can transmit a starting instruction to the central control device according to network communication through the server of the central control software, and the central control device generates a booting instruction in response to the starting instruction and transmits the booting instruction to the switching circuit of the terminal device through the serial port of the central control device.

[0140] Further, in addition to receiving the starting instruction transmitted by the network communication, the user can also operate the central control software on the display interface of the central control device, generate a starting instruction in response to the operation, and then generate a booting instruction according to the starting instruction and transmit it to the switching circuit of the terminal device.

[0141] The switching circuit can be a circuit in the terminal device for receiving the booting instruction transmitted by the central control device, and transmitting a booting signal to the interface chip circuit in response to the booting instruction.

[0142] The booting instruction is an instruction generated by the central control device in response to the starting instruction transmitted by the central control software, and the corresponding booting instruction is different based on different ports connected to the switching circuit. If the port connected to the switching circuit is the ring detection port, the booting instruction is a booting signal with a low level. If the port connected to the switching circuit is the output port, the booting instruction is a data packet including a booting code. If the port connected to the central control device and the terminal device includes both the ring detection port and the output port, the corresponding booting instruction can be generated according to the pre-set port and transmitted to the terminal device through the port.

[0143] S102, the switching circuit transmits the booting instruction to the interface chip circuit;

[0144] In one embodiment, the switching circuit receives the booting instruction and transmits it to the interface chip circuit in the terminal device.

[0145] Specifically, the switching circuit can be an isolation circuit, or can include a first switching circuit and a micro control circuit. When the switching circuit is the isolation circuit, one end of the isolation circuit is connected to the ring detection port of the central control device, and the other end of the isolation circuit is connected to the interface chip circuit. When the switching circuit is the first switching circuit and the micro control circuit, one end of the first switching circuit is connected to the output port of the central control device, the other end of the first switching circuit and one end of the micro control circuit are connected, and the other end of the micro control circuit is connected to the interface chip circuit.

[0146] When the serial port of the central control device includes the ring detection port, the isolation circuit can be selected as the switching circuit, and the isolation circuit transmits the power-on instruction received through the ring detection port to the interface chip circuit. When the serial port of the central control device does not include the ring detection port, the first switching circuit and the micro control circuit can be selected as the switching circuit, the first switching circuit receives the power-on instruction transmitted from the output port of the central control device, the first switching circuit transmits the power-on instruction to the micro control circuit, and the micro control circuit generates the power-on signal after verifying the power-on instruction, and transmits the power-on signal to the interface chip circuit. It should be noted that when the serial port of the central control device includes the ring detection port and the output port, the transmission method of the power-on instruction can be set according to the actual situation.

[0147] In S103, the interface chip circuit generates a power-on signal in response to the power-on instruction, and transmits the power-on signal to the power-on circuit.

[0148] In one embodiment, the interface chip circuit can be an SIO chip (super input output chip) circuit in the terminal device, which generates a power-on signal after receiving the power-on instruction, and transmits the power-on signal to the power-on circuit.

[0149] It can be understood that when the interface chip circuit receives the power-on instruction, the wake-up function of the interface chip circuit is triggered, the power-on signal is generated, and the power-on signal is transmitted to the power-on circuit, so that the power-on circuit powers on the central processor.

[0150] In S104, the power-on circuit converts the direct current voltage transmitted by the power supply circuit into a plurality of different power-on voltages in response to the power-on signal, and powers on the central processor based on the power-on voltages.

[0151] In one embodiment, the power-on circuit, in response to the received power-on signal, transmits the power-on signal to a power supply circuit in the terminal device, the power supply circuit, in response to the power-on signal, receives an alternating current power from outside of the terminal device according to a power supply interface, converts the voltage of the received alternating current power, generates a direct current power voltage, and outputs the direct current power voltage to a power management circuit in the power-on circuit for voltage distribution to generate power-on voltages for units in the central processing unit, transmits the power-on voltages to the units in the central processing unit, and powers on the units in the central processing unit, thereby completing the booting of the terminal device.

[0152] The power-on circuit can be a circuit for powering on the central processing unit in the terminal device, and obtains a voltage signal transmitted by the power supply circuit according to the power-on signal, and divides the voltage signal to power on the units in the central processing unit. It should be noted that, in order to enable the micro control circuit, the first conversion circuit and the interface chip circuit to power on the central processing unit in response to the booting instruction, the power-on circuit supplies power to the micro control circuit, the first conversion circuit and the interface chip circuit when the terminal device is in a power-off state. Since the isolation circuit does not need to be powered to complete the transmission of the booting instruction, the power-on circuit does not supply power to the isolation circuit.

[0153] It can be understood that, in order to reduce the power consumption of the terminal device when the central processing unit is in an unpowered state, the micro control circuit, the first conversion circuit and the interface chip circuit operate in a low-power mode. After powering on the central processing unit, the micro control circuit, the first conversion circuit and the interface chip circuit are switched from the low-power mode to a normal power mode. The power consumption of the normal power mode is higher than that of the low-power mode.

[0154] The power supply circuit can be a circuit for converting the voltage of an external alternating current power in the terminal device, such as converting an external 220V alternating current to a 12V direct current.

[0155] The alternating current power can be a stabilized alternating current signal source received by the power plug and other components of the terminal device from the outside of the terminal device.

[0156] The direct current power voltage can be a voltage obtained by voltage conversion by the power supply circuit, used to provide operating power for elements or circuits in the terminal device, such as a 12V direct current.

[0157] The power-on voltage can be a voltage transmitted when powering on the units in the central processing unit. It can be understood that the operating voltages of the units in the central processing unit are different, so the voltage signal needs to be divided by the power-on circuit to obtain the corresponding power-on voltages of the units.

[0158] The central processor can be the operation and control core in the terminal device, used for performing data processing, program running and the like. The central processor can include a plurality of units, for example, a processing unit for issuing and calculating various data, a memory unit for temporarily storing data, a management unit for managing the relationship between various hardware, and the like.

[0159] In the embodiment of the present specification, the starting instruction generated by the network or offline operation is received by the central control software on the central control device, and the generated boot signal is transmitted to the terminal device through the serial port connected with the terminal device in response to the starting instruction, so as to complete the starting of the terminal device, that is, the network remote starting of the terminal device through the central control software and the central control device can be met, and the starting operation of the plurality of terminal devices connected according to one or more serial ports can be performed, thereby improving the stability and reliability of the remote starting of the terminal device.

[0160] Please refer to FIG. 4, which is a flow diagram of a device starting method provided in the embodiment of the present specification. As shown in FIG. 4, the method is applied to a device starting system, and can include the following steps S201-S208.

[0161] S201, the switching circuit receives the boot instruction transmitted by the serial port of the central control device;

[0162] In one embodiment, when the central control software installed in the central control device receives the starting instruction, the boot instruction is generated and transmitted to the switching circuit, and the switching circuit receives the boot instruction transmitted by the serial port of the central control device.

[0163] The specific definitions of the central control device, the central control software, the switching circuit and the boot instruction can refer to the related contents in step S101, which will not be described here.

[0164] S202, the first instruction receiving end transmits the received boot instruction to the gate of the field effect tube, and when the boot instruction received by the gate of the field effect tube is a low-level signal, the drain and the source of the field effect tube are turned on, and the first instruction output end transmits the low-level signal to the interface chip circuit;

[0165] In one embodiment, the first instruction receiving end in the isolation circuit receives the boot instruction transmitted by the ring detection port in the central control device, and when the boot instruction received by the first instruction receiving end in the isolation circuit is a low-level signal, the drain and the source of the field effect tube are turned on, and the low-level signal is transmitted to the interface chip circuit through the first instruction output port of the isolation circuit, so as to enable the power supply circuit and the power-on circuit to power on the central processor in response to the low-level signal.

[0166] Specifically, as shown in FIG. 5, when the switching circuit is an isolation circuit, the first instruction receiving end of the isolation circuit is connected with the ring detection port of the central control device, the first instruction output end of the isolation circuit is connected with the interface chip circuit, and the isolation circuit comprises a field effect tube, the gate of the field effect tube is connected with the first instruction receiving end, the drain of the field effect tube is connected with the first instruction output end, and the source of the field effect tube is grounded.

[0167] The field effect tube in FIG. 5 receives the start-up instruction transmitted by the ring detection port through the first instruction receiving end, detects the start-up instruction, and when the start-up instruction output by the ring detection port and detected by the G pole (gate) of the field effect tube is a low-level signal, the D pole (drain) and the S pole (source) of the field effect tube are turned on. Due to the turn-on of the field effect tube and the grounding of the S pole, the first instruction output end transmits the low-level signal (0V) transmitted from the S pole to the D pole of the field effect tube to the interface chip circuit.

[0168] The first instruction receiving end and the first instruction output end can be transmission ports of the isolation circuit.

[0169] Further, when the first instruction receiving end receives a high-level signal, the G pole cuts off the D pole and the S pole according to the received high-level signal, so as to realize isolation of the high-level signal transmitted by the central control device through the isolation circuit, prevent the high-level signal from damaging the interface chip circuit, and further improve the safety of the terminal device. If the terminal device is in the shutdown state, the central control device continuously transmits a high-level signal to the first instruction receiving end, so as to make the field effect tube remain in the cut-off state.

[0170] It should be noted that since the field effect tube comprises two types of NMOS tube (N field effect tube) and PMOS tube (P field effect tube), and the turn-on conditions of the two types are opposite, the detection conditions can be set and adjusted according to the type of the field effect tube. For example, if the field effect tube is a PMOS tube, the central control device transmits a low-level signal to the PMOS tube to turn on the PMOS tube; if the field effect tube is an NMOS tube, the central control device transmits a high-level signal to the NMOS tube to turn on the NMOS tube.

[0171] S203, the first conversion circuit receives the start-up instruction transmitted by the output port of the central control device, and transmits the start-up instruction to the micro control circuit;

[0172] In one embodiment, when the switching circuit comprises the first conversion circuit and the micro control circuit, the second instruction receiving end in the first conversion circuit receives the start-up instruction transmitted by the output port of the central control device, and transmits the start-up instruction to the third instruction receiving end of the micro control circuit based on the second instruction output end.

[0173] Exemplarily, as shown in FIG. 6, when the switching circuit includes the first switching circuit and the micro-control circuit, one end of the first switching circuit in FIG. 6 is connected with the output port of the central control device, and the other end of the first switching circuit is connected with one end of the micro-control circuit. Specifically, the first switching circuit includes a first switching chip, a second instruction receiving end and a second instruction output end, the micro-control circuit includes a third instruction receiving end, the second instruction receiving end of the first switching circuit is connected with the output port of the central control device, the second instruction receiving end is connected with the first switching chip, the first switching chip is connected with the second instruction output end, the second instruction output end is connected with the third instruction receiving end. Among them, the first switching chip is a chip for data processing in the first switching circuit.

[0174] Among them, the second instruction receiving end and the second instruction output end can be pins on the first switching chip, and the third instruction receiving end can be a pin on the micro-control chip.

[0175] The first switching circuit can be a circuit in the terminal device for converting the power-on instruction and transmitting the converted power-on instruction to the micro-control circuit.

[0176] The power-on instruction can be a power-on code sent by the central control device to the terminal device, and the power-on code can be a pre-set string. For example, it can be "AA BB CC 01 00 00 01 DD EE FF".

[0177] S204, the micro-control circuit compares the power-on instruction with the preset power-on condition, and when the power-on instruction meets the power-on condition, generates a power-on signal and transmits the power-on signal to the interface chip circuit;

[0178] In one embodiment, the micro-control circuit receives the power-on signal transmitted by the second instruction output port of the first switching circuit based on the second receiving end, compares the power-on code in the power-on instruction with the preset power-on condition pre-stored in the micro-control chip of the micro-control circuit, and when the power-on code matches the preset power-on condition, the micro-control chip determines that the power-on instruction meets the preset power-on condition, generates a power-on signal, and transmits the power-on signal to the interface chip circuit based on the power-on signal output end.

[0179] Exemplarily, as shown in FIG. 6, one end of the micro-control circuit in FIG. 6 is connected with the first switching circuit, and the other end of the micro-control circuit is connected with the interface chip circuit. Specifically, the micro-control circuit includes a micro-control chip, a third instruction receiving end and a power-on signal output end, the third instruction receiving end is connected with the second instruction output end in the first switching circuit and the micro-control chip, the micro-control chip is connected with the power-on signal output end, and the power-on signal output end is connected with the interface chip circuit. Among them, the micro-control chip can be a data processing chip in the micro-control circuit.

[0180] The start-up signal output end can be a pin on the micro-control chip.

[0181] The method in which the micro-control circuit and the first conversion circuit generate the start-up signal and transmit it to the interface chip circuit in response to the start-up instruction can be that the first conversion chip receives the start-up instruction output by the output port of the central control device based on the second instruction receiving end, transmits the start-up instruction to the third instruction receiving end of the micro-control circuit based on the second instruction output end, the micro-control chip receives the start-up instruction based on the third instruction receiving end, compares the start-up code in the start-up instruction with the preset start-up condition, and when the start-up code matches the preset start-up condition, the micro-control chip determines that the start-up instruction meets the preset start-up condition and generates the start-up signal, and transmits the start-up signal to the interface chip circuit based on the start-up signal output end.

[0182] The micro-control circuit can be an MCU (micro-control unit) circuit, which is used to identify and respond to the start-up instruction. It should be noted that the micro-control circuit has a pre-stored start-up code, and when the central control device outputs the start-up instruction to the micro-control circuit, the micro-control circuit verifies the start-up code in the start-up instruction, and when the start-up code matches the start-up code stored in the micro-control circuit, it can be considered that the start-up signal meets the preset start-up condition.

[0183] Further, as shown in FIG. 7, the central processor includes a fourth signal output end, the interface chip circuit includes a fourth signal receiving end and a fifth signal output end, the micro-control circuit includes a fifth signal receiving end, the fourth signal output end in FIG. 7 is connected with the fourth signal receiving end, and the fifth signal output end is connected with the fifth signal receiving end.

[0184] The fourth signal output end can be an output port on the central processor, the fourth signal receiving end and the fifth signal output end can be pins on the interface chip, and the fifth signal receiving end can be a pin on the micro-control chip.

[0185] When the device state of the terminal device changes, the central processor generates device state information corresponding to the device state, transmits the device state information to the fourth signal receiving end of the interface chip circuit through the fourth signal output end, the interface chip in the interface chip circuit transmits the device state information to the fifth signal receiving end of the micro-control circuit based on the fifth signal output end, and the micro-control circuit stores the device state information received through the fifth signal receiving end into the micro-control chip.

[0186] For example, when the device state of the terminal device changes, the central processor transmits the device state information carrying the device state to the micro-control circuit, and when the central control device transmits a state acquisition request to the terminal device to acquire the device state of the terminal device, the micro-control circuit transmits the device state information to the central control device through the first conversion circuit.

[0187] The state acquisition request can be a pre-set state acquisition code. The micro control circuit checks the state acquisition code and, after the check is passed, transmits the device state information to the central control device through the first conversion circuit.

[0188] The device state can be a state of the terminal device. The device state information can be information for indicating the device state of the terminal device, such as a sleep state, a hibernate state, and a power-off state.

[0189] It should be noted that the interface chip circuit cannot recognize the state acquisition request transmitted by the central control device, and therefore the device state information is not transmitted to the central control device through the interface chip circuit.

[0190] Further, as shown in FIG. 8, the first conversion circuit further includes a first signal receiving end, a first signal output end, a second signal receiving end, and a second signal output end. The micro control circuit further includes a third signal receiving end and a third signal output end. The first signal receiving end is connected to the output port of the central control device. The first signal output end is connected to the third signal receiving end. The third signal output end is connected to the second signal receiving end. The second signal output end is connected to the input port of the central control device.

[0191] The first signal receiving end, the first signal output end, the second signal receiving end, and the second signal output end can be pins on the first conversion chip. The third signal receiving end and the third signal output end can be pins on the micro control chip.

[0192] Specifically, the method for the micro control circuit to respond to the state acquisition signal transmitted by the central control device can be as follows. When the first signal receiving end of the first conversion circuit receives the state acquisition signal transmitted by the output port of the central control device, the first conversion circuit transmits the state acquisition signal to the third signal receiving end of the micro control circuit based on the first signal output end. The micro control circuit transmits the stored device state information to the second signal receiving end of the first conversion circuit based on the third output end. The second signal output port of the first conversion circuit transmits the device state information to the central control device based on the input port of the central control device.

[0193] S205, the interface chip circuit generates a power-on signal in response to the power-on signal and transmits the power-on signal to the power-on circuit.

[0194] In one embodiment, the interface chip circuit can be an SIO chip (super input output chip) circuit in the terminal device. After receiving the power-on signal, the interface chip circuit generates a power-on signal and transmits the power-on signal to the power-on circuit.

[0195] It can be understood that when the interface chip circuit receives the boot signal, the wake-up boot function of the interface chip circuit is triggered to generate the power-on signal, and the power-on signal is transmitted from the interface chip circuit to the power-on circuit.

[0196] For example, as shown in FIG. 9, the interface chip circuit includes a fourth instruction receiving end, an interface chip, and a first power-on signal output end. The fourth instruction receiving end is connected with the switching circuit, and the first power-on signal output end is connected with the power-on circuit. The interface chip generates the power-on signal in response to the boot instruction received by the fourth instruction receiving end from the switching circuit, and transmits the power-on signal to the power-on circuit based on the first power-on signal output end. The power-on signal can be a signal generated by the interface chip to enable the power-on circuit to enter the power-on state. The interface chip can be a chip in the interface chip circuit for data processing, such as an SIO chip.

[0197] The first power-on signal output end and the fourth instruction receiving end can be pins on the interface chip.

[0198] Further, as shown in FIG. 10, the terminal device further includes a second conversion circuit in FIG. 10, the central processing unit includes a first output end and a first result receiving end, the interface chip circuit includes a first receiving end, a second result receiving end, a second output end, and a first result output end, the second conversion circuit includes a second receiving end, a third output end, a third result receiving end, and a second result output end, the first output end is connected with the first receiving end, the second output end is connected with the second receiving end, the third output end is connected with the input port of the central control device, the third result receiving end is connected with the output port of the central control device, the second result output end is connected with the second result receiving end, and the first result output end is connected with the first result receiving end.

[0199] The first output end and the first result receiving end can be transmission ports on the central processing unit, the first receiving end, the second result receiving end, the second output end, and the first result output end can be pins on the interface chip, and the second receiving end, the third output end, the third result receiving end, and the second result output end can be pins on the micro control chip.

[0200] In the case that the terminal device completes the startup and the central processor is in the power-on state, when the serial port of the central control device needs to be debugged, a feasible method for serial port debugging can be that the first receiving end of the interface chip circuit receives the serial port debugging instruction transmitted by the central processor based on the first output end, the serial port debugging instruction is transmitted to the second receiving end of the second conversion circuit based on the second output end, the second conversion circuit transmits the serial port debugging instruction to the input port of the central control device based on the third output end, so as to debug the serial port of the central control device, and the third result receiving end of the second conversion circuit receives the serial port debugging result of the central control device, the serial port debugging result is transmitted to the second result receiving end of the interface chip circuit based on the second result output end, and the interface chip circuit transmits the serial port debugging result to the first result receiving end of the central processor based on the first result output end.

[0201] It should be noted that in addition to debugging the serial port of the central control device, the second conversion circuit can also perform other data transmission and debugging operations, which can be set according to actual conditions.

[0202] The second conversion circuit can be a circuit in the terminal device for debugging the serial port of the central control device and the like.

[0203] The power-on signal can be a signal generated by the interface chip circuit for indicating that the power-on circuit powers on the central processor.

[0204] S206, the power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal;

[0205] In one embodiment, when the power-on signal transmitted by the interface chip circuit is received by the power-on circuit, the power-on signal is transmitted to the power supply circuit in the terminal device by the power-on control signal in the power-on circuit.

[0206] The power-on circuit can be used to power each component in the terminal device, such as the central processor in the terminal device, the micro-control circuit in the terminal device, and the interface chip circuit and the like.

[0207] Specifically, the power-on circuit can include a power-on control circuit and a power management circuit, and the circuit for powering on the central processor by the power-on signal transmitted by the interface chip circuit can be as shown in FIG. 11, which includes the interface chip circuit, the power-on control circuit, the power supply circuit, the power management circuit and the central processor. One end of the power-on control circuit is connected with the interface chip circuit, the other end of the power-on control circuit is connected with one end of the power supply circuit, the other end of the power supply circuit is connected with one end of the power management circuit, and the other end of the power management circuit is connected with the central processor.

[0208] Further, the circuit that the power-on control circuit transmits the power-on signal to the power supply circuit can be as shown in FIG. 12. The power-on control circuit includes a first power-on signal receiving end, a power-on chip, and a second power-on signal output end. The first power-on signal receiving end is connected with the interface chip circuit, and the second power-on signal output end is connected with the power supply circuit. The method that the power-on control circuit transmits the power-on signal to the power supply circuit can be that the power-on chip receives the power-on signal transmitted by the interface chip circuit based on the first power-on signal receiving end, and transmits the power-on signal to the power supply circuit based on the second power-on signal output end. The power-on chip can be a chip in the power-on circuit for data processing.

[0209] The first power-on signal receiving end and the second power-on signal output end can be pins on the power-on chip.

[0210] The power-on control circuit can be a circuit in the terminal device for enabling the power supply circuit to work in the start mode in response to the power-on signal transmitted by the interface chip circuit.

[0211] The start mode can be a power supply mode corresponding to the power supply circuit in the start state and the running state of the terminal device.

[0212] S207, the power supply circuit converts the alternating current power into direct current power voltage in response to the power-on signal, generates direct current power voltage, and transmits the direct current power voltage to the power management circuit.

[0213] In one embodiment, when the power supply circuit receives the power-on signal transmitted by the power-on control circuit, the power supply circuit converts the alternating current power from the outside of the terminal device into direct current power voltage in response to the power-on signal, generates direct current power voltage, and transmits the direct current power voltage to the power management circuit.

[0214] The alternating current power can be a power signal received by the terminal device from the outside, for example, 220V alternating current voltage, etc.

[0215] Specifically, the power management circuit can be configured to convert the voltage of the alternating power supply, and transmit the direct current power supply voltage converted by the power management circuit to the circuit. As shown in FIG. 13, the power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip, and a first voltage output end. The second power-on signal receiving end is connected to the power-on control circuit. The first voltage receiving end is connected to the external power supply. The first voltage output end is connected to the power management circuit. The power supply circuit can transmit the direct current power supply voltage to the power management circuit by the following method. The power supply circuit transmits the alternating power supply received by the first voltage receiving end to the first voltage conversion chip in response to the power-on signal received by the second power-on signal receiving end. The first voltage conversion chip converts the voltage of the alternating power supply to generate a direct current power supply voltage. The direct current power supply voltage is transmitted to the power management circuit based on the first voltage output end.

[0216] The first voltage conversion chip can be a chip in the power supply circuit for converting the alternating power supply to the direct current power supply voltage. The first voltage output end and the second power-on signal receiving end can be pins on the first voltage conversion chip.

[0217] The power supply circuit can be a circuit in the terminal device connected to the external power supply for converting the voltage of the external alternating power supply to generate a direct current power supply voltage. The converted direct current power supply voltage is transmitted to the power management circuit on the mainboard of the terminal device. For example, the external 220V alternating current is converted to 12V direct current, etc. The external power supply can be a power supply for providing alternating power supply to the terminal device.

[0218] The direct current power supply voltage can be the voltage obtained after the voltage conversion by the power supply circuit, which is used to provide working power supply to each element or circuit in the terminal device, for example, 12V direct current.

[0219] In S208, the power management circuit converts the voltage of each unit in the central processing unit to generate a power-on voltage corresponding to each unit, and transmits each power-on voltage to each unit in the central processing unit for power-on.

[0220] In one embodiment, after the power management circuit receives the direct current power supply voltage output by the power supply circuit, the power management circuit converts the working voltage of each unit in the central processing unit to generate a power-on voltage of each unit, and transmits each power-on voltage to each unit of the central processing unit to implement power-on of each unit, so that each unit enters a working state, and then the power-on of the central processing unit is completed, and the central processing unit enters a power-on state.

[0221] Specifically, the circuit for powering up the central processor according to the DC power supply voltage can be as shown in FIG. 14. The power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip, and a second voltage output end. The second voltage receiving end is connected to the power supply circuit. The voltage distribution chip is connected to each unit of the central processor based on the second voltage output end. The method for powering up the central processor by the power management circuit receiving voltage can be as follows. The second voltage conversion chip receives the DC power supply voltage based on the second voltage receiving end, converts the DC power supply voltage based on the working voltage of each unit of the central processor, generates the corresponding power-up voltage of each unit, transmits the power-up voltage to the voltage distribution chip, and powers up each unit of the central processor based on the second voltage output end and the power-up voltage. The second voltage conversion chip can be a chip in the power management circuit for converting the DC power supply voltage based on the working voltage of each unit of the central processor. The voltage distribution chip can be a chip in the power management circuit for voltage distribution for each unit of the central processor, transmitting the corresponding power-up voltage of each unit to the corresponding voltage supply end.

[0222] The second voltage receiving end can be a transmission port on the second voltage conversion chip in the power management circuit. The second voltage output end can be a transmission port on the voltage distribution chip. The second voltage conversion chip and the voltage distribution chip can be connected by wires.

[0223] Further, the circuit for supplying power to each unit of the central processor by the voltage distribution chip can be as shown in FIG. 15. The voltage distribution chip includes a first voltage supply end, a second voltage supply end, and a third voltage supply end. The central processor includes at least a processing unit, a memory unit, and a management unit. The voltage distribution chip is connected to the processing unit based on the first voltage supply end, connected to the memory unit based on the second voltage supply end, and connected to the management unit based on the third voltage supply end.

[0224] The first voltage supply end, the second voltage supply end, and the third voltage supply end can be included in the second voltage output end. Specifically, they can be transmission ports on the voltage distribution chip or three different wires.

[0225] Illustratively, the method for powering up each unit of the central processor by the voltage distribution chip can be as follows. The voltage distribution chip powers up the processing unit based on the first voltage supply end and the first voltage. The voltage distribution chip powers up the memory unit based on the second voltage supply end and the second voltage. The voltage distribution chip powers up the management unit based on the third voltage supply end and the third voltage.

[0226] The first voltage is the power-on voltage corresponding to the processing unit, the second voltage is the power-on voltage corresponding to the memory unit, and the third voltage is the power-on voltage corresponding to the management unit. The specific values of the first voltage, the second voltage and the third voltage correspond to the working voltages of the units, and can be the same or different. It should be noted that the voltage distribution circuit powers on each unit in the central processing unit based on each power supply terminal. In the embodiments of the present application, only the processing unit, the memory unit and the management unit are taken as examples for description.

[0227] The power management circuit can be a circuit for supplying power to each chip in the central processing unit in the terminal device.

[0228] It can be understood that the central processing unit includes at least one unit, and the working voltages of the units are different. Therefore, the voltage distribution circuit is used to distribute the voltage signal to obtain the power-on voltage corresponding to the working voltage of each unit.

[0229] Further, when the terminal device enters the power-off state from the working state, in order to ensure that the interface chip circuit, the micro control circuit and the first conversion circuit in the terminal device can respond to the power-on instruction to power on the central processing unit when the terminal device is in the power-off state, it is necessary to supply power through the power supply circuit to ensure that the interface chip circuit, the micro control circuit and the first conversion circuit are in the working state.

[0230] Specifically, a feasible power supply method of the power supply circuit can be that the power supply circuit provides power for the first conversion circuit based on the first power supply provided by the power supply circuit and the first power supply terminal, enables the first conversion circuit to run in a low-power state based on the power received by the first power supply receiving terminal, the power supply circuit provides power for the micro control circuit based on the second power supply provided by the power supply circuit and the second power supply terminal, enables the micro control circuit to run in a low-power state based on the power received by the second power supply receiving terminal, and the power supply circuit provides power for the interface chip circuit based on the third power supply provided by the power supply circuit and the third power supply terminal, enables the interface chip circuit to run in a low-power state based on the power received by the third power supply receiving terminal.

[0231] As shown in FIG. 16, the central processor in FIG. 16 further includes a power-off instruction output terminal, the power-on circuit further includes a power supply circuit, the power supply circuit includes a power-off instruction receiving terminal, a third voltage receiving terminal, a first power supply terminal, a second power supply terminal and a third power supply terminal, the first conversion circuit further includes a first power supply receiving terminal, the micro control circuit further includes a second power supply receiving terminal, the interface chip circuit further includes a third power supply receiving terminal, the power-off instruction output terminal is connected with the power-off instruction receiving terminal, the third voltage receiving terminal is connected with the power supply circuit, the first power supply terminal is connected with the first conversion circuit based on the first power supply receiving terminal, the second power supply terminal is connected with the micro control circuit based on the second power supply receiving terminal, and the third power supply terminal is connected with the interface chip circuit based on the third power supply receiving terminal.

[0232] The power-off instruction receiving terminal, the third voltage receiving terminal, the first power supply terminal, the second power supply terminal and the third power supply terminal can be transmission terminals on the power supply circuit, or wires connected with the power supply circuit; the power-off instruction output terminal can be a transmission terminal or a pin on the central processor, the first power supply receiving terminal can be a pin on a first conversion chip in the first conversion circuit, the second power supply receiving terminal can be a pin on a micro control chip in the micro control circuit, and the third power supply receiving terminal can be a pin on an interface chip in the interface chip circuit.

[0233] The power-off state can be a state in which the central processor stops working, and only the power supply circuit provides the interface chip circuit, the micro control circuit and the first conversion circuit with voltages required for low-power state operation.

[0234] The power-off instruction can be an instruction generated by the central processor in response to a user's closing operation performed on the terminal device, for enabling the power-on circuit to stop providing power to the central processor.

[0235] The power supply circuit can be a circuit in the power-on circuit for providing power to the interface chip circuit, the micro control circuit and the first conversion circuit when the terminal device is in the power-off state. It can be understood that, in order to enable the terminal device to respond to a power-on signal and power on when the central control device transmits the power-on signal to the terminal device, it is necessary to ensure that the interface chip circuit, the micro control circuit and the first conversion circuit in the terminal device are always in a working state. In order to avoid unnecessary energy loss and component loss, the interface chip circuit and the micro control circuit can operate in a low-power mode when the terminal device is in the power-off state.

[0236] It should be noted that, in the case that the power-on circuit powers on the central processor and the terminal device is in a running state after the power-on is completed, the power supply circuit in the power-on circuit continuously supplies power to the interface chip circuit, the micro-control circuit and the first conversion circuit, and the interface chip circuit, the micro-control circuit and the first conversion circuit are switched from the low-power mode to the normal power mode when the central processor is powered on. The energy consumption of the normal power mode is higher than that of the low-power mode. It can be understood that the power-on circuit is also used to supply power to other components in the terminal device, which is not listed here.

[0237] The receiving end and the output end involved in the above embodiments can be a pin or a transmission port of a chip, or can be set according to the actual product production situation. The specific pin position of the pin can be set according to the specific model of the chip. It can be understood that the pins on the same chip can be simultaneously different receiving ends or output ends, which can be set according to the specific model of the chip and the function of the pin.

[0238] In the embodiments of the present specification, the starting instruction generated by the network or offline operation is received through the central control software on the central control device, and the generated boot signal is transmitted to the terminal device through the serial port connected with the terminal device in response to the starting instruction, so as to complete the starting of the terminal device, that is, the network remote starting of the terminal device through the central control software and the central control device can be met, and the starting operation of the plurality of terminal devices connected through one or more serial ports can be performed, thereby improving the stability and reliability of the remote starting of the terminal device. Further, by providing the isolation circuit and the ring detection port of the central control device, and the first conversion circuit and the output port of the micro-control circuit and the central control device, the device model of different central control devices is met, so as to provide the stability of the isolation circuit scheme, and ensure that the central control device can start the terminal device through the output port, thereby improving the applicability of starting the terminal device through the central control device. In addition, the information of the terminal device is transmitted to the central control device through the first conversion circuit and the second conversion circuit, so as to realize the data interaction between the terminal device and the central control device. Further, the power supply circuit in the power-on circuit provides power for the interface chip circuit, the micro-control circuit and the first conversion circuit, so that the terminal device can respond to the boot signal transmitted by the central control device, and the starting of the terminal device is realized.

[0239] The embodiments of the present specification also provide a computer storage medium, which can store a plurality of program instructions, the program instructions being suitable for being loaded and executed by a processor to perform the method steps of the embodiments shown in FIG. 1-FIG. 16, and the specific execution process can be referred to the specific description of the embodiments shown in FIG. 1-FIG. 16, which will not be repeated here.

[0240] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by a computer program instructing related hardware. The program can be stored in a computer readable storage medium, and when the program is executed, the processes of the above-mentioned embodiment methods can be included. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM), a random access memory (RAM), or the like.

[0241] The above disclosure is only the preferred embodiment of the present application, and of course cannot limit the scope of the rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope of the present application.

Claims

1. A method of starting a terminal device, characterized by, The method is applied to a terminal device connected with a central control device, and the terminal device comprises an interface chip circuit, a relay circuit, a central processing unit, a power-on circuit and a power supply circuit, one end of the interface chip circuit is connected with one end of the relay circuit, the other end of the interface chip circuit is connected with a first end of the power-on circuit, the other end of the relay circuit is connected with a serial port of the central control device, a second end of the power-on circuit is connected with the central processing unit, and a third end of the power-on circuit is connected with the power supply circuit; The method comprises: The relay circuit receives a start-up instruction transmitted by the serial port of the central control device, and the start-up instruction is generated by the central control device in response to a start-up instruction transmitted by a received central control software; The relay circuit transmits the start-up instruction to the interface chip circuit; The interface chip circuit generates a power-on signal in response to the start-up instruction and transmits the power-on signal to the power-on circuit; The power-on circuit converts a direct-current power voltage transmitted by the power supply circuit into a plurality of different power-on voltages in response to the power-on signal, and powers on the central processing unit based on each power-on voltage.

2. The method of claim 1, wherein, When the relay circuit is an isolation circuit, the isolation circuit comprises a first instruction receiving end, a field effect transistor and a first instruction output end, the first instruction receiving end is connected with a ring detection port of the central control device, and the first instruction output end is connected with the interface chip circuit; The gate of the field effect transistor is connected with the first instruction receiving end, the drain of the field effect transistor is connected with the first instruction output end, and the source of the field effect transistor is grounded; The relay circuit transmits the start-up instruction to the interface chip circuit, comprising: The first instruction receiving end transmits the received start-up instruction to the gate of the field effect transistor, when the start-up instruction received by the gate of the field effect transistor is a low-level signal, the drain and the source are turned on, the first instruction output end transmits a low-level signal to the interface chip circuit, so that the interface chip circuit enables the power supply circuit and the power-on circuit to power on the central processing unit in response to the low-level signal.

3. The method of claim 1, wherein, When the relay circuit comprises a first conversion circuit and a micro control circuit, one end of the first conversion circuit is connected with an output port of the central control device, the other end of the first conversion circuit is connected with one end of the micro control circuit, and the other end of the micro control circuit is connected with the interface chip circuit; The relay circuit transmits the start-up instruction to the interface chip circuit, comprising: The first conversion circuit receives the start-up instruction transmitted by the output port of the central control device and transmits the start-up instruction to the micro control circuit; The micro control circuit compares the start-up instruction with a preset start-up condition, and generates a start-up signal and transmits the start-up signal to the interface chip circuit when the start-up instruction meets the start-up condition.

4. The method of claim 3, wherein, The first conversion circuit comprises a first conversion chip, a second instruction receiving end and a second instruction output end, and the micro control circuit comprises a micro control chip, a third instruction receiving end and a start-up signal output end; The second instruction receiving end is connected with the output port of the central control device, the second instruction receiving end is connected with the first conversion chip, the first conversion signal is connected with the second instruction output end, the second instruction output end is connected with the third instruction receiving end, the third instruction receiving end is connected with the micro control chip, the micro control chip is connected with the start-up signal output end, and the start-up signal output end is connected with the interface chip circuit; The adapter circuit transmits the start-up instruction to the interface chip circuit, comprising: The first conversion chip receives the start-up instruction output by the output port of the central control device based on the second instruction receiving end, and transmits the start-up instruction to the third instruction receiving end of the micro control circuit based on the second instruction output end; The micro control chip receives the start-up instruction based on the third instruction receiving end, compares the start-up code in the start-up instruction with the preset start-up condition; When the start-up code matches the preset start-up condition, the micro control chip determines that the start-up instruction meets the preset start-up condition, generates a start-up signal, and transmits the start-up signal to the interface chip circuit based on the start-up signal output end.

5. The method of claim 1, wherein, The interface chip circuit comprises a fourth instruction receiving end, an interface chip and a first power-on signal output end, the fourth instruction receiving end is connected with the adapter circuit, and the first power-on signal output end is connected with the power-on circuit; The interface chip circuit generates a power-on signal in response to the start-up instruction, and transmits the power-on signal to the power-on circuit, comprising: The interface chip receives the start-up instruction transmitted by the adapter circuit based on the fourth instruction receiving end, generates a power-on signal in response to the start-up instruction, and transmits the power-on signal to the power-on circuit based on the first power-on signal output end.

6. The method of claim 1, wherein, The power-on circuit comprises a power-on control circuit and a power supply management circuit, one end of the power-on control circuit is connected with the interface chip circuit, the other end of the power-on control circuit is connected with one end of the power supply circuit, the other end of the power supply circuit is connected with one end of the power supply management circuit, and the other end of the power supply management circuit is connected with the central processing unit; The power-on circuit generates a plurality of different power-on voltages by voltage conversion of the direct current power voltage transmitted by the power supply circuit in response to the power-on signal, and powers on the central processing unit based on each power-on voltage, comprising: The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal; The power supply circuit converts the alternating current power into a direct current power voltage in response to the power-on signal, and transmits the direct current power voltage to the power supply management circuit. The power management circuit converts the voltage for each unit in the central processor, generates the power-on voltage corresponding to each unit, and transmits each power-on voltage to each unit in the central processor for power-on.

7. The method of claim 6, wherein, The power-on control circuit includes a first power-on signal receiving end, a power-on chip, and a second power-on signal output end. The first power-on signal receiving end is connected with the interface chip circuit, and the second power-on signal output end is connected with the power supply circuit. The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal, including: The power-on chip receives the power-on signal transmitted by the interface chip circuit based on the first power-on signal receiving end, and transmits the power-on signal to the power supply circuit based on the second power-on signal output end.

8. The method of claim 7, wherein, The power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip, and a first voltage output end. The second power-on signal receiving end is connected with the power-on control circuit, the first voltage receiving end is connected with an external power supply, and the first voltage output end is connected with the power management circuit. The power supply circuit converts the alternating current power supply into direct current power supply voltage in response to the power-on signal, and transmits the direct current power supply voltage to the power management circuit, including: The power supply circuit transmits the alternating current power supply received by the first voltage receiving end to the first voltage conversion chip in response to the power-on signal received based on the second power-on signal receiving end. The first voltage conversion chip converts the alternating current power supply into direct current power supply voltage, and transmits the direct current power supply voltage to the power management circuit based on the first voltage output end.

9. The method of claim 8, wherein, The power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip, and a second voltage output end. The second voltage receiving end is connected with the power supply circuit, and the voltage distribution chip is connected with each unit of the central processor based on the second voltage output end. The power management circuit converts the voltage for each unit in the central processor, generates the power-on voltage corresponding to each unit, and transmits each power-on voltage to each unit in the central processor for power-on, including: The second voltage conversion chip receives the direct current power supply voltage based on the second voltage receiving end, converts the direct current power supply voltage based on the working voltage of each unit in the central processor, and generates the power-on voltage corresponding to each unit; The power-on voltage is transmitted to the voltage distribution chip, and the voltage distribution chip powers on each unit in the central processor based on the second voltage output end and the power-on voltage.

10. The method of claim 9, wherein, The voltage distribution chip includes a first voltage supply end, a second voltage supply end and a third voltage supply end, the central processor includes at least a processing unit, a memory unit and a management unit, the voltage distribution chip is connected with the processing unit based on the first voltage supply end, is connected with the memory unit based on the second voltage supply end, and is connected with the management unit based on the third voltage supply end; The voltage distribution chip powers on each unit in the central processor based on the second voltage output end, including: The voltage distribution chip powers on the processing unit based on the first voltage supply end and a first voltage, and the first voltage is the corresponding power-on voltage of the processing unit; The voltage distribution chip powers on the memory unit based on the second voltage supply end and a second voltage, and the second voltage is the corresponding power-on voltage of the memory unit; The voltage distribution chip powers on the management unit based on the third voltage supply end and a third voltage, and the third voltage is the corresponding power-on voltage of the management unit.

11. The method of claim 3, wherein, The central processor includes a power-off instruction output end, the power-on circuit further includes a power supply circuit, the power supply circuit includes a power-off instruction receiving end, a third voltage receiving end, a first power supply end, a second power supply end and a third power supply end, the first conversion circuit further includes a first power supply receiving end, the micro control circuit further includes a second power supply receiving end, and the interface chip circuit further includes a third power supply receiving end; The power-off instruction output port is connected with the power-off instruction receiving port, the third voltage receiving end is connected with the power supply circuit, the first power supply end is connected with the first conversion circuit based on the first power supply receiving end, the second power supply end is connected with the micro control circuit based on the second power supply receiving end, and the third power supply end is connected with the interface chip circuit based on the third power supply receiving end; The method further includes: When the central processor enters a power-off state, the central processor outputs a power-off instruction to the power-on circuit based on the power-off instruction output port, and the power-on circuit stops providing power supply to the central processor in response to the power-off instruction received based on the power-off instruction receiving port; The power supply circuit provides power supply for the first conversion circuit based on the first power supply provided by the power supply circuit and the first power supply end, so that the first conversion circuit runs in a low-power consumption state based on the power supply received by the first power supply receiving end; The power supply circuit provides power supply for the micro control circuit based on the second power supply provided by the power supply circuit and the second power supply end, so that the micro control circuit runs in a low-power consumption state in response to the power supply received by the second power supply receiving end; The power supply circuit provides power supply for the interface chip circuit based on the third power supply provided by the power supply circuit and the third power supply end, so that the interface chip circuit runs in a low-power consumption state based on the power supply received by the third power supply receiving end.

12. The method of claim 3, wherein, The first adapter circuit comprises a first signal receiving end, a first signal output end, a second signal receiving end and a second signal output end, and the micro control circuit further comprises a third signal receiving end and a third signal output end; The first signal receiving end is connected with the output port of the central control device, the first signal output end is connected with the third signal receiving end, the third signal output end is connected with the second signal receiving end, and the second signal output end is connected with the input port of the central control device; The method further comprises: When the first signal receiving end of the first adapter circuit receives the state acquisition signal transmitted by the output port of the central control device, the first adapter circuit transmits the state acquisition signal to the third signal receiving end of the micro control circuit based on the first signal output end, under the condition that the central processor is in the power-on state; The micro control circuit transmits the stored device state information to the second signal receiving end of the first adapter circuit based on the third output end; The second signal output port of the first adapter circuit transmits the device state information to the central control device based on the input port of the central control device.

13. The method of claim 12, wherein, The central processor further comprises a fourth signal output end, the interface chip circuit comprises a fourth signal receiving end and a fifth signal output end, and the micro control circuit comprises a fifth signal receiving end; The fourth signal output end is connected with the fourth signal receiving end, and the fifth signal output end is connected with the fifth signal receiving end; The method further comprises: When the device state of the terminal device changes, the central processor generates the device state information corresponding to the device state, and transmits the device state information to the fourth signal receiving end of the interface chip circuit based on the fourth signal output end; The interface chip circuit transmits the device state information to the fifth signal receiving end of the micro control circuit based on the fifth signal output end, and the micro control circuit stores the device state information.

14. The method of claim 1, wherein, The terminal device further comprises a second conversion circuit, the central processor comprises a first output end and a first result receiving end, the interface chip circuit comprises a first receiving end, a second result receiving end, a second output end and a first result output end, and the second conversion circuit comprises a second receiving end, a third output end, a third result receiving end and a second result output end; The first output end is connected with the first receiving end, the second output end is connected with the second receiving end, the third output end is connected with the input port of the central control device, the third result receiving end is connected with the output port of the central control device, the second result output end is connected with the second result receiving end, and the first result output end is connected with the first result receiving end; The method further comprises: The first receiving end of the interface chip circuit receives the serial debugging instruction transmitted by the central processor based on the first output end, and transmits the serial debugging instruction to the second receiving end of the second conversion circuit based on the second output end; The second conversion circuit transmits the serial port debugging instruction to the input port of the central control device based on the third output end, so as to perform serial port debugging on the serial port of the central control device; The third result receiving end of the second conversion circuit receives the serial port debugging result of the central control device, and transmits the serial port debugging result to the second result receiving end of the interface chip circuit based on the second result output end; The interface chip circuit transmits the serial port debugging result to the first result receiving end of the central processing unit based on the first result output end.

15. A terminal device for connecting with a central control device, comprising an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit, one end of the interface chip circuit being connected with one end of the switching circuit, the other end of the interface chip circuit being connected with the first end of the power-on circuit, the other end of the switching circuit being connected with the serial port of the central control device, the second end of the power-on circuit being connected with the central processing unit, and the third end of the power-on circuit being connected with the power supply circuit.

16. The terminal device according to claim 15, characterized by When the switching circuit is an isolation circuit, the isolation circuit comprises a first instruction receiving end, a field effect tube and a first instruction output end, the first instruction receiving end being connected with the ring detection port of the central control device, and the first instruction output end being connected with the interface chip circuit. The isolation circuit comprises a field effect tube, the gate of the field effect tube being connected with the ring detection port of the central control device, the drain of the field effect tube being connected with the interface chip circuit, and the source of the field effect tube being grounded.

17. The terminal device of claim 15, wherein, When the switching circuit comprises a first conversion circuit and a micro control circuit, one end of the first conversion circuit is connected with the output port of the central control device, the other end of the first conversion circuit is connected with one end of the micro control circuit, and the other end of the micro control circuit is connected with the interface chip circuit.

18. The terminal device of claim 17, wherein, The first conversion circuit comprises a first conversion chip, a second instruction receiving end and a second instruction output end, the micro control circuit comprises a micro control chip, a third instruction receiving end and a start-up signal output end; The second instruction receiving end is connected with the output port of the central control device, the second instruction receiving end is connected with the first conversion chip, the first conversion signal is connected with the second instruction output end, the second instruction output end is connected with the third instruction receiving end, the third instruction receiving end is connected with the micro control chip, the micro control chip is connected with the start-up signal output end, and the start-up signal output end is connected with the interface chip circuit.

19. The terminal device of claim 15, wherein, The interface chip circuit comprises a fourth instruction receiving end, an interface chip and a first power-on signal output end, the fourth instruction receiving end is connected with the switching circuit, and the first power-on signal output end is connected with the power-on circuit.

20. The terminal device of claim 15, wherein, The power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected with the interface chip circuit, the other end of the power-on control circuit is connected with one end of the power supply circuit, the other end of the power supply circuit is connected with one end of the power management circuit, and the other end of the power management circuit is connected with the central processor.

21. The terminal device of claim 20, wherein, The power-on control circuit includes a first power-on signal receiving end, a power-on chip and a second power-on signal output end, the first power-on signal receiving end is connected with the interface chip circuit, and the second power-on signal output end is connected with the power supply circuit.

22. The terminal device of claim 20, wherein, The power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip and a first voltage output end, the second power-on signal receiving end is connected with the power-on control circuit, the first voltage receiving end is connected with an external power supply, and the first voltage output end is connected with the power management circuit.

23. The terminal device of claim 20, wherein, The power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip and a second voltage output end, the second voltage receiving end is connected with the power supply circuit, and the voltage distribution chip is connected with units of the central processor based on the second voltage output end.

24. The terminal device of claim 23, wherein, The voltage distribution chip includes a first voltage supply end, a second voltage supply end and a third voltage supply end, the central processor at least includes a processing unit, a memory unit and a management unit, the voltage distribution chip is connected with the processing unit based on the first voltage supply end, connected with the memory unit based on the second voltage supply end, and connected with the management unit based on the third voltage supply end.

25. The terminal device of claim 17, wherein, The central processor includes a power-off instruction output end, the power-on circuit further includes a power supply circuit, the power supply circuit includes a power-off instruction receiving end, a third voltage receiving end, a first power supply end, a second power supply end and a third power supply end, the first conversion circuit further includes a first power supply receiving end, the micro control circuit further includes a second power supply receiving end, and the interface chip circuit further includes a third power supply receiving end. The power-off instruction output port is connected with the power-off instruction receiving port, the third voltage receiving end is connected with the power supply circuit, the first power supply end is connected with the first conversion circuit based on the first power supply receiving end, the second power supply end is connected with the micro control circuit based on the second power supply receiving end, and the third power supply end is connected with the interface chip circuit based on the third power supply receiving end.

26. The terminal device of claim 17, wherein, The first conversion circuit includes a first signal receiving end, a first signal output end, a second signal receiving end and a second signal output end, the micro control circuit further includes a third signal receiving end and a third signal output end. The first signal receiving end is connected with an output port of the central control equipment, the first signal output end is connected with the third signal receiving end, the third signal output end is connected with the second signal receiving end, and the second signal output end is connected with an input port of the central control equipment.

27. The terminal device of claim 26, wherein, The central processor further comprises a fourth signal output end, the interface chip circuit comprises a fourth signal receiving end and a fifth signal output end, and the micro control circuit comprises a fifth signal receiving end; The fourth signal output end is connected with the fourth signal receiving end, and the fifth signal output end is connected with the fifth signal receiving end.

28. The terminal device of claim 15, wherein, The terminal device further comprises a second conversion circuit, the central processor comprises a first output end and a first result receiving end, the interface chip circuit comprises a first receiving end, a second result receiving end, a second output end and a first result output end, and the second conversion circuit comprises a second receiving end, a third output end, a third result receiving end and a second result output end; The first output end is connected with the first receiving end, the second output end is connected with the second receiving end, the third output end is connected with the input port of the central control device, the third result receiving end is connected with the output port of the central control device, the second result output port is connected with the second result receiving end, and the first result output end is connected with the first result receiving end. 29.A computer storage medium, the computer storage medium storing a plurality of instructions, the instructions being adapted to be loaded and executed by a processor to perform the steps of the method according to any one of claims 1 to 14.

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