Luminance compensation control method and apparatus, and display driving apparatus and storage medium

Abstract

Provided in the present disclosure are a luminance compensation control method and apparatus, and a display driving apparatus and a storage medium. The luminance compensation control method comprises: detecting whether a display apparatus has a first anomaly, wherein the first anomaly comprises at least one of a clock signal anomaly, a luminance compensation data change and a luminance compensation data offset; and when it is detected that the display apparatus has the first anomaly, disabling a long-term luminance decay compensation module, so as to stop the long-term luminance decay compensation from being performed on the display apparatus. In the present disclosure, whether a display apparatus has a first anomaly is detected, and when the display apparatus has the first anomaly, a long-term luminance decay compensation module is disabled, such that a display anomaly or luminance compensation noise caused by electrostatic interference of the display apparatus can be alleviated, thereby improving the display effect of the display apparatus.

Description

Brightness compensation control method and device, display driving device and storage medium

[0001] The present disclosure claims priority to the Chinese patent application No. 202410704247.5, filed on May 31, 2024, and entitled "Brightness compensation control method, display driving device and storage medium", the entire content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present disclosure relates to the technical field of display. Specifically, the present disclosure relates to a brightness compensation control method, device, display driving device and storage medium. BACKGROUND

[0003] OLED (Organic Light-Emitting Diode) display screens have advantages of high contrast, wide color gamut, fast response time, etc., and have become one of the important representatives of the new generation of display technologies, which are widely used in smart phones, tablet computers, wearable devices, vehicle displays, etc. SUMMARY

[0004] The present disclosure aims to provide a brightness compensation control method, device, display driving device and storage medium.

[0005] The first aspect of the present disclosure provides a brightness compensation control method, the method comprising:

[0006] detecting whether a first abnormality exists in a display device, the first abnormality comprising at least one of a clock signal abnormality, brightness compensation data change and brightness compensation data offset;

[0007] when it is detected that the first abnormality exists in the display device, closing a long-term brightness decay compensation module to stop long-term brightness decay compensation to the display device.

[0008] Optionally, the display device comprises a display driving unit and a display panel, the display driving unit is configured to output an effective display data strobe signal and a pixel clock signal to the display panel, the first abnormality is the clock signal abnormality, and the detecting whether the first abnormality exists in the display device comprises:

[0009] detecting a number of cycles of the pixel clock signal corresponding to a first level period of the effective display data strobe signal, denoted as a first number, the first level period being any high level period;

[0010] detecting, according to the first number, whether the clock signal abnormality exists in the display device.

[0011] Optionally, the detecting whether the display device has the clock signal abnormality according to the first quantity comprises:

[0012] determining an error of the first quantity and a reference quantity, the reference quantity being a horizontal resolution of the display panel;

[0013] detecting whether the display device has the clock signal abnormality according to the error.

[0014] Optionally, the detecting whether the display device has the clock signal abnormality according to the error comprises:

[0015] in a case where the error is greater than a set threshold, determining that the display device has the clock signal abnormality;

[0016] in a case where the error is not greater than the set threshold, determining that the display device does not have the clock signal abnormality.

[0017] Optionally, the detecting the number of periods of the pixel clock signal corresponding to the active display data enable signal during the first level comprises:

[0018] detecting, by a signal synchronization detector, the number of periods of the pixel clock signal corresponding to the active display data enable signal during the first level.

[0019] Optionally, the detecting the number of periods of the pixel clock signal corresponding to the active display data enable signal during the first level comprises:

[0020] detecting, by a signal synchronization detector, the number of rising edges in the pixel clock signal corresponding to the active display data enable signal during the first level to obtain the number of periods of the pixel clock signal corresponding to the active display data enable signal during the first level.

[0021] Optionally, the detecting the number of periods of the pixel clock signal corresponding to the active display data enable signal during the first level comprises:

[0022] detecting, by a signal synchronization detector, the number of falling edges in the pixel clock signal corresponding to the active display data enable signal during the first level to obtain the number of periods of the pixel clock signal corresponding to the active display data enable signal during the first level.

[0023] Optionally, the long-term brightness decay compensation module is configured to accumulate the brightness compensation data of the input image frame to obtain first accumulated brightness compensation data, and store the first accumulated brightness compensation data to a first memory, the first memory is configured to periodically update the first accumulated brightness compensation data stored in the first memory to a second memory, the first accumulated brightness compensation data stored in the second memory is recorded as historical accumulated brightness compensation data; the first exception is the change of the brightness compensation data, and the detection of whether the display device has the first exception comprises:

[0024] reading the first accumulated brightness compensation data currently stored in the first memory and the historical accumulated brightness compensation data currently stored in the second memory;

[0025] calculating the current maximum accumulated brightness compensation data according to the read historical accumulated brightness compensation data;

[0026] detecting whether the display device has the change of the brightness compensation data according to the first accumulated brightness compensation data and the maximum accumulated brightness compensation data.

[0027] Optionally, the detection of whether the display device has the change of the brightness compensation data according to the first accumulated brightness compensation data and the maximum accumulated brightness compensation data comprises:

[0028] in the case that the first accumulated brightness compensation data is greater than the maximum accumulated brightness compensation data, it is determined that the display device has the change of the brightness compensation data;

[0029] in the case that the first accumulated brightness compensation data is not greater than the maximum accumulated brightness compensation data, it is determined that the display device does not have the change of the brightness compensation data.

[0030] Optionally, the calculation of the current maximum accumulated brightness compensation data according to the read historical accumulated brightness compensation data comprises:

[0031] calculating the current maximum accumulated brightness compensation data according to the read historical accumulated brightness compensation data according to the following formula: Max Offset = (Offset1 / T1)*T2

[0032] wherein, the Max Offset represents the maximum accumulated brightness compensation data, the Offset1 represents the read historical accumulated brightness compensation data, the T1 represents the accumulated time corresponding to the read historical accumulated brightness compensation data, and the T2 represents the accumulated time corresponding to the read first accumulated brightness compensation data.

[0033] Optionally, the long-term brightness decay compensation module is configured to accumulate the brightness compensation data of the input image frame to obtain first accumulated brightness compensation data, and store the first accumulated brightness compensation data to a first memory, the first memory is configured to periodically update the first accumulated brightness compensation data stored in the first memory to a second memory; the first abnormality is a brightness compensation data offset, and the detection of whether the display device has the first abnormality comprises:

[0034] detecting whether a clock signal has a delay when the first memory processes data, the first memory processing data including any one of the first memory reading data and the first memory writing data;

[0035] in the case that the clock signal has a delay when the first memory processes data, determining that the display device has the brightness compensation data offset;

[0036] in the case that the clock signal has no delay when the first memory processes data, determining that the display device has no brightness compensation data offset.

[0037] Optionally, the detection of whether the clock signal has a delay when the first memory processes data comprises:

[0038] detecting whether the clock signal is at a rising edge or a falling edge when the first memory processes data;

[0039] in the case that the clock signal is at a rising edge or a falling edge when the first memory processes data, determining that the clock signal has no delay when the first memory processes data;

[0040] in the case that the clock signal is not at a rising edge or a falling edge when the first memory processes data, determining that the clock signal has a delay when the first memory processes data.

[0041] Optionally, the method further comprises:

[0042] stopping updating the first accumulated brightness compensation data in the first memory and the second memory when it is detected that the display device has the first abnormality.

[0043] The second aspect of the present disclosure provides a brightness compensation control device, the device comprising:

[0044] a detection module configured to detect whether a display device has a first abnormality, the first abnormality including at least one of a clock signal abnormality, a brightness compensation data change, and a brightness compensation data offset;

[0045] The control module is configured to close a long-term brightness decay compensation module to stop long-term brightness decay compensation to the display device when the display device is detected to have the first abnormality.

[0046] Optionally, the display device comprises a display driving unit and a display panel, the display driving unit is configured to output an effective display data strobe signal and a pixel clock signal to the display panel, and the first abnormality is an abnormality of the clock signal.

[0047] The detection module is configured to detect a number of periods of the pixel clock signal corresponding to the effective display data strobe signal during a first level period, denoted as a first number, and determine whether the display device has the abnormality of the clock signal according to the first number.

[0048] Optionally, the detection module is configured to determine an error between the first number and a reference number, the reference number being a horizontal resolution of the display panel, and determine whether the display device has the abnormality of the clock signal according to the error.

[0049] Optionally, the detection module is configured to determine that the display device has the abnormality of the clock signal when the error is greater than a set threshold, and determine that the display device does not have the abnormality of the clock signal when the error is not greater than the set threshold.

[0050] Optionally, the detection module is configured to detect the number of periods of the pixel clock signal corresponding to the effective display data strobe signal during the first level period by a signal synchronization detector.

[0051] Optionally, the detection module is configured to detect the number of rising edges in the pixel clock signal corresponding to the effective display data strobe signal during the first level period by the signal synchronization detector to obtain the number of periods of the pixel clock signal corresponding to the effective display data strobe signal during the first level period.

[0052] Optionally, the detection module is configured to detect the number of falling edges in the pixel clock signal corresponding to the effective display data strobe signal during the first level period by the signal synchronization detector to obtain the number of periods of the pixel clock signal corresponding to the effective display data strobe signal during the first level period.

[0053] Optionally, the long-term brightness decay compensation module is configured to accumulate the brightness compensation data of the input image frame to obtain first accumulated brightness compensation data, and store the first accumulated brightness compensation data to a first memory, the first memory is configured to periodically update the first accumulated brightness compensation data stored in the first memory to a second memory, the first accumulated brightness compensation data stored in the second memory is recorded as historical accumulated brightness compensation data; the first exception is that the brightness compensation data changes;

[0054] The detection module is configured to read the first accumulated brightness compensation data currently stored in the first memory and the historical accumulated brightness compensation data currently stored in the second memory, calculate the current maximum accumulated brightness compensation data according to the read historical accumulated brightness compensation data, and detect whether the display device has the brightness compensation data change according to the first accumulated brightness compensation data and the maximum accumulated brightness compensation data.

[0055] Optionally, the detection module is configured to determine that the display device has the brightness compensation data change when the first accumulated brightness compensation data is greater than the maximum accumulated brightness compensation data, and determine that the display device does not have the brightness compensation data change when the first accumulated brightness compensation data is not greater than the maximum accumulated brightness compensation data.

[0056] Optionally, the detection module is configured to calculate the current maximum accumulated brightness compensation data according to the read historical accumulated brightness compensation data according to the following formula: Max Offset = (Offset1 / T1)*T2

[0057] wherein, the Max Offset represents the maximum accumulated brightness compensation data, the Offset1 represents the read historical accumulated brightness compensation data, the T1 represents the accumulated time corresponding to the read historical accumulated brightness compensation data, and the T2 represents the accumulated time corresponding to the read first accumulated brightness compensation data.

[0058] Optionally, the long-term brightness decay compensation module is configured to accumulate the brightness compensation data of the input image frame to obtain first accumulated brightness compensation data, and store the first accumulated brightness compensation data to a first memory, the first memory is configured to periodically update the first accumulated brightness compensation data stored in the first memory to a second memory; the first exception is that the brightness compensation data offset;

[0059] The detection module is used to detect whether there is a delay in the clock signal when the first memory processes data, wherein the data processed by the first memory includes either data read from the first memory or data written to the first memory; if there is a delay in the clock signal when the first memory processes data, it is determined that the display device has the brightness compensation data offset; if there is no delay in the clock signal when the first memory processes data, it is determined that the display device does not have the brightness compensation data offset.

[0060] Optionally, the detection module is used to detect whether the clock signal is at a rising edge or a falling edge when the first memory processes data; if the clock signal is at a rising edge or a falling edge when the first memory processes data, it is determined that the clock signal has no delay when the first memory processes data; if the clock signal is not at a rising edge or a falling edge when the first memory processes data, it is determined that the clock signal has a delay when the first memory processes data.

[0061] Optionally, the control module is further configured to stop updating the first cumulative brightness compensation data in the first memory and the second memory when a first abnormality is detected in the display device.

[0062] A third aspect of this disclosure provides a display driving device, the display driving device including a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor executing the computer program to implement the brightness compensation control method as described above.

[0063] The fourth aspect of this disclosure provides a computer-readable storage medium storing a computer program that is executed by a processor to implement the brightness compensation control method described above.

[0064] The fifth aspect of this disclosure provides a computer program product comprising a computer program that is executed by a processor to implement the brightness compensation control method described above. Attached Figure Description

[0065] The embodiments of this disclosure will now be described in further detail with reference to the accompanying drawings.

[0066] Figure 1 is a schematic diagram of the reverse afterimage appearing on the display panel after electrostatic interference in the related technology;

[0067] Figure 2 is a flowchart of a brightness compensation control method provided in an embodiment of this disclosure;

[0068] Figure 3 is a schematic diagram of the structure of a display device provided in an embodiment of this disclosure;

[0069] FIG. 4 is a timing diagram of the DE signal and the CLK signal according to an embodiment of the present disclosure;

[0070] FIG. 5 is a schematic diagram of detecting whether the display device has a clock signal abnormality and closing the DBI module when the display device has a clock signal abnormality according to an embodiment of the present disclosure;

[0071] FIG. 6 is a schematic diagram of long-term brightness decay compensation by the DBI module according to an embodiment of the present disclosure;

[0072] FIG. 7 is a schematic diagram of the historical cumulative brightness compensation data and the maximum cumulative brightness compensation data according to an embodiment of the present disclosure;

[0073] FIG. 8 is a schematic diagram of detecting whether the display device has a brightness compensation data change and closing the DBI module when the display device has a brightness compensation data change according to an embodiment of the present disclosure;

[0074] FIG. 9 is a schematic diagram of the storage structure of the DDR memory and the Flash memory according to an embodiment of the present disclosure;

[0075] FIG. 10 is a schematic diagram of data interaction between the DBI module, the DDR memory, and the Flash memory according to an embodiment of the present disclosure;

[0076] FIG. 11 is a schematic diagram of the data in the SRAM buffer before and after the ESD according to an embodiment of the present disclosure;

[0077] FIG. 12 is a schematic diagram of the data in the DDR memory and the input data of the DBI module when the brightness compensation data offset occurs according to an embodiment of the present disclosure;

[0078] FIG. 13 is a schematic diagram of reading out the data of the DDR memory according to an embodiment of the present disclosure;

[0079] FIG. 14 is a schematic diagram of detecting whether the display device has a brightness compensation data offset and closing the DBI module when the display device has a brightness compensation data offset according to an embodiment of the present disclosure;

[0080] FIG. 15 is a timing diagram of the pixel clock signal and the data of the DDR memory according to an embodiment of the present disclosure;

[0081] FIG. 16 is a schematic diagram of a brightness compensation control device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0082] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the following will be combined with the drawings of the embodiments of the present disclosure to make a clear and complete description of the technical solutions of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without any inventive effort fall within the protection scope of the present disclosure.

[0083] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the ordinary meaning understood by a person of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are used to distinguish different components. Similarly, the terms "one", "a" or "the" and similar terms do not denote a quantity restriction, but mean that there is at least one. The terms "include", "contain" and similar terms mean that the components or objects before the terms encompass the components or objects listed after the terms and their equivalents, without excluding other components or objects. The terms "connect" or "connected" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right" and the like are only used to represent relative positional relationships, and when the absolute positions of the described objects are changed, the relative positional relationships can also be changed accordingly.

[0084] In order to better understand the technical solutions of the present disclosure, the inventive concept of the present disclosure will be described in detail first.

[0085] In the related art, long-term brightness decay compensation (De-Burn-in, referred to as DBI) is one of the main compensation algorithms of an OLED display screen. DBI has two functions: (1) life compensation of the OLED display screen; (2) afterimage compensation of the OLED display screen. Life compensation, i.e. increasing the display time and service life of the OLED display screen, for the vehicle display industry, the life of a vehicle display screen needs to reach at least 5-8 years, through DBI, the original 2-3 years of service life of the OLED product can be increased to 5-8 years due to the compensation function; when used for a long time, the OLED light-emitting material will age and its efficiency will decrease with the increase of the lighting time, resulting in brightness decay, and the display screen is also prone to afterimage phenomenon after long-term use, which can be effectively solved by DBI, thereby improving the display effect.

[0086] The DBI module is usually run in a display driver chip (DDIC) of the display screen, and is affected by environmental factors, circuit design factors, component factors, and the like, especially electro-static discharge (ESD).

[0087] It is found through research that when the display screen is affected by electro-static discharge, the following adverse phenomena are prone to occur, affecting the display effect.

[0088] (1) Display abnormality, that is, the content to be displayed on the display screen is scattered, and the display is disordered.

[0089] (2) Brightness compensation noise, including error compensation or overcompensation, and overcompensation can cause reverse image sticking, that is, after long-term brightness attenuation compensation of the original image during the display process of the display screen, image sticking or aggravated image sticking occurs on the display screen.

[0090] Please refer to FIG. 1, which is a schematic diagram of reverse image sticking of the display screen. The display screen has a DBI compensation function. Before electro-static discharge (ESD), the display screen displays a white image (Full White PTN) without any abnormality after displaying a black and white checkerboard image (Chess PTN) for a long time, indicating that the image sticking problem of the display panel is eliminated by the DBI compensation function. After electro-static discharge, the display screen displays a white image after displaying a black and white checkerboard image for a long time, and serious image sticking occurs, indicating that the DBI compensation function aggravates the image sticking problem after electro-static discharge, which represents the occurrence of reverse image sticking.

[0091] It can be understood that the display screen described above can be set to other types according to actual needs, for example, the display screen can also be a quantum dot light emitting diode (QLED) display screen or a micro light emitting diode (Micro LED) display screen, etc.

[0092] In order to solve the display abnormality or brightness compensation noise caused by electro-static discharge, the present embodiment provides a brightness compensation control method, device, display driving device and storage medium. As shown in FIG. 2, the brightness compensation control method includes the following steps:

[0093] Step S10, detecting whether the display device has a first abnormality, the first abnormality including at least one of clock signal abnormality, brightness compensation data change and brightness compensation data offset.

[0094] The first abnormality is used to represent various abnormalities of the display device caused by electrostatic interference. Optionally, the first abnormality includes one, two or three of clock signal abnormality, brightness compensation data change and brightness compensation data offset. For example, the first abnormality includes clock signal abnormality, brightness compensation data change and brightness compensation data offset, and the detection methods of the respective abnormalities are in parallel relationship and have no sequence. It can be understood that for the display device, electrostatic interference can also cause other abnormalities, and the first abnormality in the embodiment of the present disclosure can also include other abnormalities.

[0095] In step S20, when it is detected that the display device has the first abnormality, the long-term brightness attenuation compensation module is closed to stop the long-term brightness attenuation compensation to the display device.

[0096] Optionally, when it is detected that the display device has any one of clock signal abnormality, brightness compensation data change and brightness compensation data offset, the DBI module is closed to stop the long-term brightness attenuation compensation to the display device. Since the display device will have the first abnormality after the electrostatic interference, and the electrostatic interference will gradually disappear after the display device is removed from the electrostatic interference environment, the first abnormality of the display device will also gradually disappear, therefore, when it is detected that the display device has the first abnormality, the DBI module is closed until the next restart, that is, when the display device is powered off and then powered on again, the DBI module is restarted, and at this time, the long-term brightness attenuation compensation module is started to perform the long-term brightness attenuation compensation to the display device.

[0097] Compared with the related art, the brightness compensation control method of the embodiment of the present disclosure can detect whether the display device has the first abnormality, and close the long-term brightness attenuation compensation module when the display device has the first abnormality, so as to alleviate the display abnormality or brightness compensation noise caused by the electrostatic interference of the display device, and improve the display effect, wherein the brightness compensation noise includes inverse residual image caused by brightness compensation data change or error compensation caused by brightness compensation data offset.

[0098] In a possible implementation, the clock signal abnormality refers to that when the display device displays an image, the electrostatic interference causes abnormality of the pixel clock signal, and the abnormality of the pixel clock signal will cause error of the display content on the display device. At this time, even if the long-term brightness attenuation compensation is performed on the to-be-displayed image, the compensated to-be-displayed image is also incorrect when displayed, and even the display error can be aggravated, therefore, at this time, the long-term brightness attenuation compensation is not needed.

[0099] In a possible implementation, the display device comprises a display driving unit and a display panel, the display driving unit is configured to output a data enable signal for valid display data (DE signal) and a pixel clock signal (CLK signal) to the display panel. When the first abnormality is a clock signal abnormality, the embodiments of the present disclosure detect the clock signal abnormality to determine whether to close the long-term brightness decay compensation module. Optionally, the step of detecting whether the display device has a clock signal abnormality comprises:

[0100] (1) detecting a number of cycles of the pixel clock signal corresponding to the period of the data enable signal for valid display data at a first level, denoted as a first number, the first level period being any high level period;

[0101] (2) detecting whether the display device has a clock signal abnormality according to the first number.

[0102] In a possible implementation, the process of detecting whether the display device has a clock signal abnormality according to the first number comprises: determining an error between the first number and a reference number, the reference number being the horizontal resolution of the display panel; and detecting whether the display device has a clock signal abnormality according to the error.

[0103] Exemplarily, when the horizontal resolution of the display panel is 1024, the reference number is 1024.

[0104] Optionally, the process of detecting whether the display device has a clock signal abnormality according to the error comprises: determining that the display device has a clock signal abnormality when the error is greater than a set threshold; and determining that the display device does not have a clock signal abnormality when the error is not greater than the set threshold.

[0105] The set threshold is set based on experience or is flexibly adjusted according to the implementation environment, and the embodiments of the present disclosure do not limit this. Exemplarily, the set threshold is 2.

[0106] Referring to FIG. 3, FIG. 3 is a structural schematic diagram of a display device provided by an embodiment of the present disclosure. As shown in FIG. 3, the display device includes a display driving unit 10 and a display panel 30. The display driving unit 10 is configured to output a valid display data selection signal (DE signal) and a pixel clock signal (CLK signal) to the display panel 30. FIG. 4 is a timing diagram of the DE signal and the CLK signal. As shown in FIG. 4, the DE signal is a high-level valid signal. During the high-level period of the DE signal, the corresponding RGB (Red-Green-Blue) data is considered as a valid display data signal. The CLK signal is used to control the RGB data to be transmitted from the display driving unit 10 to the display panel 30 in a certain order, so as to realize image display. Optionally, the display driving unit 10 reads the RGB data only when the falling edge (or the rising edge) of the CLK signal arrives, so as to ensure the correctness of the read data. Therefore, if the CLK signal is abnormal, the reading and writing of the RGB data will be affected. When the display device is subjected to electrostatic interference, the electrostatic interference can cause the CLK signal to be abnormal (jitter or disorder). When the CLK signal is abnormal, the writing of the RGB data to the display panel 30 is also abnormal, which causes the content to be displayed to be scattered and the display to be disordered.

[0107] For example, for a display panel with a resolution of 1024 (columns) * 768 (rows), each row has 1024 pixels. Therefore, the DE signal corresponding to one frame of image needs to include 768 high-level intervals, each high-level interval represents the DE signal of one row period, and each high-level interval needs to include 1024 CLK signal periods, so as to realize the writing of the RGB data to one row of 1024 pixels.

[0108] Correspondingly, the step of detecting whether the display device has clock signal abnormality is: detecting the number of CLK signal periods corresponding to the high-level period of the DE signal, denoted as a first number, and determining whether the error between the first number and a reference number is greater than a set threshold. The reference number is related to the horizontal resolution of the display panel 30. For example, when the horizontal resolution is 1024, the reference number is 1024. In implementation, since the CLK signal itself can also cause a slight error in the number of CLK signal periods corresponding to the high-level period of the DE signal, such as an error of one to two CLK signal periods, the set threshold can be set to avoid the influence of the jitter of the CLK signal itself on the detection result of whether the display device has clock signal abnormality.

[0109] Optionally, the step of detecting the number of periods of the pixel clock signal corresponding to the active display data enable signal in the first level includes: detecting the number of periods of the pixel clock signal corresponding to the active display data enable signal in the first level by a signal synchronization detector. For example, the signal synchronization detector can be a signal synchronization detector inside the display driving unit 10, such as a Sync Checker. The Sync Checker can be used for synchronization signal counting, i.e. counting the rising edge or falling edge of the CLK signal during the high level of the DE signal, and the counting result can represent the number of periods of the CLK signal. Please refer to FIG. 5, which is a schematic diagram of detecting whether the display device has a clock signal abnormality and turning off the DBI module when the display device has a clock signal abnormality by the Sync Checker. As shown in FIG. 5, when the detection result of the Sync Checker is Sync OK, the return signal controls the Sync Checker to continue detecting. When there is static interference, the detection result of the Sync Checker is Sync NG, and the DBI module is controlled to be turned off (DBI off).

[0110] In a possible implementation, the process of detecting the number of periods of the pixel clock signal corresponding to the active display data enable signal in the first level by the signal synchronization detector includes: detecting the number of rising edges in the pixel clock signal corresponding to the active display data enable signal in the first level by the signal synchronization detector to obtain the number of periods of the pixel clock signal corresponding to the active display data enable signal in the first level.

[0111] In another possible implementation, the process of detecting the number of periods of the pixel clock signal corresponding to the active display data enable signal in the first level by the signal synchronization detector includes: detecting the number of falling edges in the pixel clock signal corresponding to the active display data enable signal in the first level by the signal synchronization detector to obtain the number of periods of the pixel clock signal corresponding to the active display data enable signal in the first level.

[0112] In a possible implementation, as shown in FIG. 3, the display device further includes a long-term brightness attenuation compensation module (i.e. DBI module), which is arranged in the display driving unit 10. The DBI module is configured to accumulate the brightness compensation data of the input image frame to obtain first accumulated brightness compensation data, and store the first accumulated brightness compensation data to a first storage. The first storage is configured to periodically update the first accumulated brightness compensation data stored in the first storage to a second storage, and the first accumulated brightness compensation data stored in the second storage is recorded as historical accumulated brightness compensation data.

[0113] Exemplarily, the display driving unit 10 comprises a display driving chip, which can be a timing controller (TCON) or a source driver IC, and the DBI module is integrated in the display driving chip. Optionally, the first memory is a double data rate synchronous dynamic random access memory (i.e., a DDR memory), and the second memory is a flash memory.

[0114] When the display device is interfered by static electricity, the static electricity interference can cause the luminance compensation data to change or shift. When the luminance compensation data changes or shifts, overcompensation or error compensation can occur when the luminance compensation data is used to perform long-term luminance decay compensation on the image to be displayed.

[0115] Please refer to FIG. 6, which is a working principle of long-term luminance decay compensation by the DBI module. As shown in FIG. 6, the long-term luminance decay compensation scheme comprises the following steps:

[0116] Step 1: When the display driving chip is initialized and powered on, the historical cumulative luminance compensation data stored in the flash memory is loaded to the DDR memory.

[0117] In the above step, when the display driving chip is initialized and powered on, the historical cumulative luminance compensation data in the flash memory is an initialization value (exemplarily, the initialization value is 0). After the display panel displays for a period of time, the initialization value is updated to the cumulative luminance compensation data accumulated in the period of time, which is referred to as the historical cumulative luminance compensation data.

[0118] Step 2: The image to be displayed is input to the DBI module, which is the original image.

[0119] In order to facilitate understanding of the embodiments of the present disclosure, the image to be displayed is taken as a black-and-white checkerboard image as an example, in which the gray scale data corresponding to the black squares is 0, and the gray scale data corresponding to the white squares is 255. When the display panel displays the image to be displayed, the image to be displayed is first input to the DBI module, and the DBI module performs long-term luminance decay compensation on the image to be displayed.

[0120] Step 3: The DBI module accumulates the luminance compensation data of the input image frame (i.e., the image to be displayed) to obtain first cumulative luminance compensation data, and stores the first cumulative luminance compensation data to the DDR memory.

[0121] Optionally, the DBI module calculates compensation values for the current image to be displayed by using a plurality of historical image frames, and therefore, the brightness compensation data in the embodiment of the present disclosure represents gray scale data, i.e., the gray scale data of the input image frame is accumulated to obtain the first accumulated brightness compensation data. For example, the gray scale data can be represented by RGB values.

[0122] In a possible implementation, the DBI module periodically accumulates the brightness compensation data (gray scale data) of the input image frame in a unit time length, and stores the first accumulated brightness compensation data obtained by the accumulation to the DDR memory. For example, the unit time length is the display time corresponding to one image frame, for example, for a display panel with a frame frequency of 60 Hz, the unit time length t1 = 1 / 60 = 16.7 ms (milliseconds), and then the DBI module calculates the gray scale data of each image frame and stores the gray scale data of each image frame to the DDR memory. It can be understood that the unit time length t1 can also be other time, for example, 1 second, and then the DBI module accumulates and updates the DDR memory for the image to be displayed in 1 second.

[0123] In the process of long-term brightness attenuation compensation of the input image frame by the DBI module, the different regions of the input image frame are compensated respectively, and therefore, the DBI module accumulates the brightness compensation data respectively for different regions. For example, the image to be displayed can be divided into a plurality of image blocks in the direction of vertical resolution, each image block corresponds to a plurality of rows of pixels, and then the brightness compensation data of each image block is accumulated to obtain the accumulated brightness compensation data of each image block as the first accumulated brightness compensation data. For example, for a display panel with a resolution of 1920 (rows) * 1080 (columns), the display panel can be divided into 48 sub-regions in the direction of vertical resolution, each sub-region includes 40 rows of pixels, and the position of each sub-region is marked by Q#i (i is greater than or equal to 0 and less than or equal to 47). In the vertical resolution of the display panel, the sub-regions from top to bottom can be represented as Q#0, Q#1, Q#2,..., Q#47. Correspondingly, for any image to be displayed, the image to be displayed corresponds to 48 image blocks, and each image block includes 40 rows of image data. For example, the data of each image block is represented by Sector#j (j is greater than or equal to 0 and less than or equal to 47), and the data corresponding to one frame of the image to be displayed is represented as Sector#0, Sector#1, Sector#2,..., Sector#47. Each sub-region corresponds to an image block, for example, Sector#0 represents the accumulated brightness compensation data of the image to be displayed in the sub-region Q#0, Sector#1 represents the accumulated brightness compensation data of the image to be displayed in the sub-region Q#1, and so on.

[0124] In step 4, the DDR memory re-inputs the first accumulated brightness compensation data in the preset time period before the current time to the DBI module, and the DBI module compensates the long-term brightness attenuation of the to-be-displayed image by using the first accumulated brightness compensation data in the preset time period, wherein the preset time period includes N unit time periods, and the value of N is greater than or equal to 1.

[0125] Optionally, the current time represents the time when the to-be-displayed image is input, and the present disclosure compensates the brightness attenuation of the to-be-displayed image by using the first accumulated brightness compensation data in the preset time period before the to-be-displayed image. At the same time, in order to prevent the first accumulated brightness compensation data obtained by the DBI module from the DDR memory from being the initial value 0 when the display device suddenly powers off or restarts, the DDR memory also periodically updates the first accumulated brightness compensation data stored in the DDR memory to the Flash memory. Thus, when the display device suddenly powers off, if it is restarted again, the Flash memory loads the most recently updated historical accumulated brightness compensation data to the DDR memory at this time, the DDR memory can feed back the historical accumulated brightness compensation data to the DBI module, and the DBI module compensates the long-term brightness attenuation of the to-be-displayed image by using the historical accumulated brightness compensation data. Conversely, if the DDR memory does not update the first accumulated brightness compensation data to the Flash memory in real time or periodically, the Flash memory always stores the initial value 0, and the compensation by using the initial value 0 does not conform to the actual situation and has poor compensation effect.

[0126] For example, the update period of the flash memory is recorded as t2, and the DDR memory updates the first accumulated brightness compensation data stored in the DDR memory to the flash memory at a period of t2. For example, if t2 is 1 second, the DDR memory updates the flash memory once per second, and the data updated each time is the first accumulated brightness compensation data accumulated in the latest 1 second. Taking a display panel with a frame frequency of 60 Hz and a unit time t1 of 1 / 60=16.7 ms as an example, the data updated by the DDR memory to the flash memory each time is the first accumulated brightness compensation data of 60 frames of images accumulated in 1 second. Since t1 is the time for the DBI module to accumulate input image frames, that is, the period for the DBI module to update data to the DDR memory, and t2 is the period for the DDR memory to update data to the flash memory, t2 is usually greater than t1. The accumulated data stored in the DDR memory is updated to the flash memory at a period of t2, which can avoid the loss of historical accumulated brightness compensation data after power failure, and can also avoid the blocking and delay of the read operation of the flash memory caused by frequent insertion of the update operation. For example, t1=16.7 ms and t2=1 s (second), or t1=1 s and t2=1 min (minute). It can be understood that the values of t1 and t2 can be set according to actual needs, and the values are not limited to the examples in the embodiments of the present disclosure.

[0127] Step 5: The DBI module calculates a compensation value according to the first accumulated brightness compensation data in the preset time, and compensates the to-be-displayed image by using the compensation value to obtain a compensated to-be-displayed image, and outputs the compensated to-be-displayed image to the display panel for display.

[0128] In implementation, the DBI module performs weighted summation on the first accumulated brightness compensation data and the compensation factor corresponding to each of the N unit times, and the weighted summation result is used as a statistical value. Then, the statistical value is used to determine a compensation value corresponding to the statistical value by using a table lookup or a formula calculation method. It can be understood that each image block in the to-be-displayed image corresponds to a statistical value and a compensation value.

[0129] Step 6: The DDR memory periodically updates the first accumulated brightness compensation data.

[0130] Optionally, the DDR memory periodically sends the first accumulated brightness compensation data to the flash memory to update the first accumulated brightness compensation data stored in the flash memory.

[0131] Based on the long-term brightness decay compensation scheme described in FIG. 6, the mechanism of the change of the brightness compensation data, and the principle of detecting whether the display device has the change of the brightness compensation data are as follows:

[0132] When the display device is interfered by static electricity, part of the data input from the DDR memory to the DBI module can be changed to an abnormal large value by the static electricity interference, and the compensation value calculated by the DBI module using the abnormal large value will also be large. For example, assuming that, under normal circumstances, the first cumulative brightness compensation data input from the DDR memory to the DBI module within a preset time period for a certain image block is represented as 1, and the first cumulative brightness compensation data is changed to an abnormal large value 30000 when the display device is interfered by static electricity, when the compensation value is calculated using the abnormal large value and long-term brightness attenuation compensation is performed on the image block, over-compensation of the image block will be caused, and thus inverse ghosting phenomenon will be caused. Therefore, when the display device has a change in brightness compensation data, the DBI module needs to be closed.

[0133] In a possible implementation, the first abnormality is a change in brightness compensation data, and the step of detecting whether the display device has a change in brightness compensation data comprises:

[0134] (1) reading first cumulative brightness compensation data currently stored in the first memory and historical cumulative brightness compensation data currently stored in the second memory.

[0135] (2) calculating the current maximum cumulative brightness compensation data according to the read historical cumulative brightness compensation data.

[0136] (3) detecting whether the display device has a change in brightness compensation data according to the first cumulative brightness compensation data and the maximum cumulative brightness compensation data.

[0137] In a possible implementation, the process of detecting whether the display device has a change in brightness compensation data according to the first cumulative brightness compensation data and the maximum cumulative brightness compensation data comprises: in a case where the first cumulative brightness compensation data is greater than the maximum cumulative brightness compensation data, determining that the display device has a change in brightness compensation data; and in a case where the first cumulative brightness compensation data is not greater than the maximum cumulative brightness compensation data, determining that the display device does not have a change in brightness compensation data.

[0138] Optionally, the current maximum cumulative brightness compensation data is calculated according to the read historical cumulative brightness compensation data according to the following formula: Max Offset = (Offset1 / T1)*T2.

[0139] wherein Max Offset represents the maximum cumulative brightness compensation data, Offset1 represents the read historical cumulative brightness compensation data, T1 represents the cumulative time corresponding to the read historical cumulative brightness compensation data, and T2 represents the cumulative time corresponding to the read first cumulative brightness compensation data.

[0140] Please refer to FIG. 7, which is a schematic diagram of historical accumulated brightness compensation data and maximum accumulated brightness compensation data provided by the embodiment of the present disclosure, wherein the horizontal coordinate X represents the horizontal position of the display panel corresponding to the accumulated brightness compensation data (such as Sector#1), and the vertical coordinate Y represents the size of the accumulated brightness compensation data. As shown in FIG. 7, the solid line (the lower line in the coordinate diagram) in FIG. 7 represents the historical accumulated brightness compensation data Offset1, the dashed line (the upper line in the coordinate diagram) represents the sum of Offset1 and Max Offset, and the area between the solid line and the dashed line represents Max Offset. When the first accumulated brightness compensation data read from the DDR memory is located between the solid line and the dashed line in FIG. 7, it is determined that the display device does not have brightness compensation data offset.

[0141] Please refer to FIG. 8, which is a schematic diagram of detecting whether the display device has brightness compensation data change and closing the DBI module when the display device has brightness compensation data change provided by the embodiment of the present disclosure. As shown in FIG. 8, the current stored first accumulated brightness compensation data read from the DDR memory and the current maximum accumulated brightness compensation data determined based on the current stored historical accumulated brightness compensation data read from the Flash memory are compared. In FIG. 8, Diff represents the current stored first accumulated brightness compensation data read from the DDR memory, and offset is Max Offset. When Diff is less than or equal to offset, it is OK, that is, the display device does not have brightness compensation data change. When Diff is greater than offset, it is NG, that is, the display device has brightness compensation data change. At this time, the DBI module is controlled to be closed (DBI off).

[0142] For example, assuming that at the current time, the historical accumulated brightness compensation data stored in the flash memory is first accumulated brightness compensation data accumulated by the display panel for 10 hours, and the first accumulated brightness compensation data stored in the DDR memory is first accumulated brightness compensation data accumulated in the latest 30 minutes, that is, T1 = 10 hours and T2 = 0.5 hours, since the historical accumulated brightness compensation data for 10 hours is Offset1 at this time, ideally, the first accumulated brightness compensation data for 0.5 hours is not greater than (Offset1 / 10)*0.5, and therefore (Offset1 / T1)*T2 can be expressed as the maximum accumulated brightness compensation data. When detecting whether the display device has brightness compensation data offset, only the first accumulated brightness compensation data read from the DDR memory needs to be compared with the maximum accumulated brightness compensation data, if the first accumulated brightness compensation data is greater than the maximum accumulated brightness compensation data (not within the range of the maximum accumulated brightness compensation data), it is determined that the display device has brightness compensation data change, otherwise it is determined that the display device does not have brightness compensation data change. It can be understood that Offset1 in the embodiment of the present disclosure represents the read historical accumulated brightness compensation data, and the historical accumulated brightness compensation data here refers to the accumulated compensation value.

[0143] Optionally, please refer to FIG. 9, which is a schematic diagram of the storage structure of the DDR memory and the Flash memory. As shown in FIG. 9, the DDR memory and the Flash memory store and read / write data in units of sectors (SB). It is assumed that the display panel is divided into 10 sub-regions in the vertical resolution direction, and the data corresponding to each frame of image is divided into 10 sectors (regions), which are denoted as Sector#0, Sector#1, Sector#2, …, Sector#9. The DDR memory includes 10 storage units, which are denoted as SB#0, SB#1, …, SB#9. The Flash memory includes 11 storage units, which are denoted as SB#00, SB#0, SB#1, …, SB#9. The SB#00 of the Flash memory is used for temporarily storing update data. The SB#0, SB#1, …, SB#9 of the DDR memory correspond to the SB#0, SB#1, …, SB#9 of the Flash memory one by one, and are used for storing the first accumulated brightness compensation data of the same position of the display panel. The DDR memory periodically updates the first accumulated brightness compensation data of one block to the Flash memory in units of blocks. The Flash memory updates the stored historical accumulated brightness compensation data by using the first accumulated brightness compensation data. As shown in FIG. 9, it is assumed that, at a certain time of update, the DDR memory updates the first accumulated brightness compensation data (denoted as date1) stored in SB#1 to the Flash memory. At this time, date1 is first stored in the temporary unit SB#00 of the Flash memory. The data stored in SB#00 is denoted as date2. Then, date2 is used to update the historical accumulated brightness compensation data of the same position (SB#1 of the Flash memory), to obtain date3. Date3 is the historical accumulated brightness compensation data of the position SB#1 before the current update and the updated historical accumulated brightness compensation data accumulated by date2. When detecting whether the brightness compensation data of the display device changes, it is necessary to determine whether the brightness compensation data of each region changes. For example, for the sub-region Q#1, when detecting whether the brightness compensation data of the sub-region changes, the first accumulated brightness compensation data in SB#1 of the DDR memory is read as the first accumulated brightness compensation data currently stored in the first memory, and the historical accumulated brightness compensation data in SB#1 of the Flash memory is read as the historical accumulated brightness compensation data.

[0144] Based on the long-term brightness attenuation compensation scheme described in FIG. 6, the mechanism of the brightness compensation data offset and the principle of detecting whether the brightness compensation data of the display device changes are as follows.

[0145] Referring to FIG. 10, FIG. 10 is a schematic diagram of data interaction between the DBI module, the DDR memory, and the Flash memory. As shown in FIG. 10, the DDR memory interacts data with the DBI module or the Flash memory under the control of a DDR controller, and the data interaction is transferred via a buffer unit (SRAM buffer). That is, the DBI module writes the first cumulative brightness compensation data of a unit time length to the DDR memory via the SRAM buffer 1, and the DDR memory writes the first cumulative brightness compensation data of a preset time length to the DBI module via the SRAM buffer 1. Similarly, the DDR memory periodically updates the first cumulative brightness compensation data stored in the DDR memory to the Flash memory via the SRAM buffer 2, and when the display driving chip is powered on, the Flash memory writes the historical cumulative brightness compensation data to the DDR memory via the SRAM buffer 2. It should be noted that the SRAM buffer 1 between the DDR controller and the DBI module and the SRAM buffer 2 between the DDR controller and the Flash memory in FIG. 10 are the same structure (denoted as SRAM buffer) in the actual product, but are denoted as the SRAM buffer 1 and the SRAM buffer 2 in FIG. 10 for the convenience of description. For example, in the embodiment of the present disclosure, the reading unit of the DDR memory when reading data is 32-bit binary data, that is, 32 bits.

[0146] By analyzing the data in the SRAM buffer before electrostatic interference (before ESD) and after electrostatic interference (after ESD), it is found that during electrostatic interference, the data stored in the SRAM buffer may be offset, i.e., the brightness compensation data is offset. Referring to FIG. 11, which is a schematic diagram of the data in the SRAM buffer before ESD and after ESD, it can be seen from FIG. 11 that before electrostatic interference, the data in the SRAM buffer is: 00000000 03340003 34000334 00066800 06680006 680006..., and after electrostatic interference, the data in the SRAM buffer becomes: 03340003 34000334 00066800 06680006 680006..., wherein each bit in each 8-bit number represents 4 bits, i.e., the data in the SRAM buffer after the display device is electrostatically interfered has an offset of 32 bits, so the first cumulative brightness compensation data read by the DBI module from the DDR memory within a preset time period will also be offset, and when the offset first cumulative brightness compensation data is used for brightness decay compensation, an error compensation will occur, affecting the compensation effect, and therefore, the DBI module needs to be closed. Wherein, the data offset in the SRAM buffer, on the one hand, may be due to the offset of the DDR Write Path (DDR data writing process, including two cases of DBI module or Flash memory writing), and on the other hand, may be due to the offset of the DDR Read Path (DDR data reading process, including two cases of reading data to the DBI module or the Flash memory).

[0147] The principle of data offset is described below by taking the data offset occurring in the process of reading out data of the DDR memory as an example. Please refer to FIG. 12, which is a schematic diagram of data in the DDR memory and input data of the DBI module when the DDR memory reads out the brightness compensation data to the DBI module. As shown in FIG. 12, the data of the DDR memory when performing read / write operation is 32 bits, and the data of the image to be displayed in the DBI module is 24 bits. For example, the first cumulative brightness compensation data stored in the DDR memory in FIG. 12 is 0x0000003, 0x0000003, 0x0000003, …, after electrostatic interference, the first cumulative brightness compensation data written from the DDR memory to the DBI module via the SRAM buffer is offset, and the offset data is 0x0000300, 0x0000300, 0x0000300, …, which can be understood as that the data in the DDR memory is offset by 32 bits (from the dotted arrow in the figure, it can be clearly seen that the data is offset by 32 bits). It is found through research that the data offset is caused by the delay of the clock signal (CLK signal) when the DDR memory reads out data (as shown in FIG. 13). DQ0 to DQ31 in FIG. 13 represent 32 data lines, which are used to write or read out 32-bit data. Therefore, by detecting the clock signal when the DDR memory reads or writes data, it can be determined whether the display device currently has the abnormality of brightness compensation data offset. It can be understood that the principle of data offset occurring in the process of writing data of the DDR memory is the same, which will not be described in detail here.

[0148] In a possible implementation, the first abnormality is brightness compensation data offset, and the step of detecting whether the display device has the brightness compensation data offset includes: detecting whether the clock signal is delayed when the first memory processes data, the first memory processing data including any one of reading out data of the first memory and writing data of the first memory; in the case that the clock signal is delayed when the first memory processes data, determining that the display device has the brightness compensation data offset; in the case that the clock signal is not delayed when the first memory processes data, determining that the display device does not have the brightness compensation data offset.

[0149] In a possible implementation, the step of detecting whether the clock signal is delayed when the first memory processes data includes: detecting whether the clock signal is located at a rising edge or a falling edge when the first memory processes data; in the case that the clock signal is located at the rising edge or the falling edge when the first memory processes data, determining that the clock signal is not delayed when the first memory processes data, and in the case that the clock signal is not located at the rising edge or the falling edge when the first memory processes data, determining that the clock signal is delayed when the first memory processes data.

[0150] Please refer to FIG. 14, which is a schematic diagram of detecting whether the display device has luminance compensation data skew and closing the DBI module when the display device has luminance compensation data skew. As shown in FIG. 14, it is detected whether the DDR memory processes data at the rising edge and the falling edge of the clock signal (i.e., DDR Tap Check). If the detection result is yes (DDR Tap OK), it is determined that the display device does not have luminance compensation data skew. If the detection result is no (DDR Tap NG), it is determined that the display device has luminance compensation data skew, and the DBI module is closed (DBI off).

[0151] In the read and write operation of the DDR memory, the readout or writing of data is performed under the control of the clock signal. Optionally, the readout or writing of data is performed at the rising edge and the falling edge of the clock signal. Please refer to FIG. 15, which is a timing diagram of the clock signal and data of the DDR memory provided in the embodiment of the present disclosure. As shown in FIG. 15, under normal circumstances, such as before electrostatic interference, data (DQ) is read out or written into the storage unit of the DDR memory at the rising edge and the falling edge of the clock signal (DLL CLK). The storage unit monitors whether data is read out or written at the rising edge and the falling edge of the clock signal. If it is detected that no data is read out or written at the rising edge and the falling edge of the clock signal, it is determined that clock signal delay occurs. In the embodiment of the present disclosure, the DQ is the first cumulative luminance compensation data.

[0152] When the display device is interfered by electrostatic or after the electrostatic interference, the electrostatic interference can cause data skew (as shown in the dashed box in FIG. 15). Taking the writing operation as an example, data is sequentially written into the DDR memory row by row at the rising edge and the falling edge of the clock signal (DLL CLK). When the electrostatic interference occurs, the clock signal is skewed and cannot write data (as shown in FIG. 15, DDR DQ SKEW represents that the data cannot be written, and the data is skewed). When the next rising edge or falling edge comes, the data is written into the DDR memory, thereby causing the data written into the DDR memory to be skewed. It can be understood that when the data is read out from the DDR memory, if it is detected that no data is read out at the existing rising edge and falling edge of the clock signal, the read-out data is also skewed.

[0153] In a possible implementation, when the first abnormality is detected, in addition to closing the DBI module, the updating of the first cumulative luminance compensation data in the first memory and the second memory is also stopped, so that the first cumulative luminance compensation data written into the DDR memory or the Flash memory is avoided.

[0154] The brightness compensation control method provided by the embodiments of the present disclosure can detect whether the display device has a first abnormality, and turn off the long-term brightness decay compensation module when the display device has the first abnormality, so as to stop the long-term brightness decay compensation to the display device. In this way, the display abnormality or brightness compensation noise caused by the static interference on the display device can be alleviated, and the display effect of the display device can be improved.

[0155] Based on the same inventive concept, the second aspect of the present disclosure provides a brightness compensation control device, as shown in FIG. 16, which includes the following contents.

[0156] The detection module 1601 is configured to detect whether the display device has a first abnormality, and the first abnormality includes at least one of a clock signal abnormality, brightness compensation data change, and brightness compensation data offset.

[0157] The control module 1602 is configured to turn off the long-term brightness decay compensation module to stop the long-term brightness decay compensation to the display device when it is detected that the display device has the first abnormality.

[0158] Optionally, the display device includes a display driving unit and a display panel, the display driving unit is configured to output an effective display data strobe signal and a pixel clock signal to the display panel, and the first abnormality is a clock signal abnormality.

[0159] The detection module 1601 is configured to detect the number of cycles of the pixel clock signal corresponding to the effective display data strobe signal during a first level period, denoted as a first number, and the first level period is any high level period; and detect whether the display device has a clock signal abnormality according to the first number.

[0160] Optionally, the detection module 1601 is configured to determine an error between the first number and a reference number, the reference number being a horizontal resolution of the display panel; and detect whether the display device has a clock signal abnormality according to the error.

[0161] Optionally, the detection module 1601 is configured to determine that the display device has a clock signal abnormality when the error is greater than a set threshold; and determine that the display device does not have a clock signal abnormality when the error is not greater than the set threshold.

[0162] Optionally, the detection module 1601 is configured to detect the number of cycles of the pixel clock signal corresponding to the effective display data strobe signal during the first level period by a signal synchronization detector.

[0163] Optionally, the detection module 1601 is configured to detect the number of cycles of the pixel clock signal corresponding to the effective display data strobe signal during the first level period by a signal synchronization detector.

[0164] Optionally, the detection module 1601 is configured to detect, by the signal synchronization detector, a number of falling edges of the pixel clock signal corresponding to the period of the active display data strobe signal at the first level.

[0165] Optionally, the long-term brightness attenuation compensation module is configured to accumulate the brightness compensation data of the input image frame to obtain first accumulated brightness compensation data, and store the first accumulated brightness compensation data to a first memory, the first memory is configured to periodically update the first accumulated brightness compensation data stored in the first memory to a second memory, the first accumulated brightness compensation data stored in the second memory is recorded as historical accumulated brightness compensation data; the first exception is a brightness compensation data change.

[0166] The detection module 1601 is configured to read the first accumulated brightness compensation data currently stored in the first memory and the historical accumulated brightness compensation data currently stored in the second memory, calculate the current maximum accumulated brightness compensation data according to the read historical accumulated brightness compensation data, and detect whether the display device has a brightness compensation data change according to the first accumulated brightness compensation data and the maximum accumulated brightness compensation data.

[0167] Optionally, the detection module 1601 is configured to determine that the display device has a brightness compensation data change when the first accumulated brightness compensation data is greater than the maximum accumulated brightness compensation data, and determine that the display device does not have a brightness compensation data change when the first accumulated brightness compensation data is not greater than the maximum accumulated brightness compensation data.

[0168] Optionally, the detection module 1601 is configured to calculate the current maximum accumulated brightness compensation data according to the read historical accumulated brightness compensation data according to the following formula: Max Offset = (Offset1 / T1)*T2.

[0169] Wherein, Max Offset represents the maximum accumulated brightness compensation data, Offset1 represents the read historical accumulated brightness compensation data, T1 represents the accumulated time corresponding to the read historical accumulated brightness compensation data, and T2 represents the accumulated time corresponding to the read first accumulated brightness compensation data.

[0170] Optionally, the long-term brightness attenuation compensation module is configured to accumulate the brightness compensation data of the input image frame to obtain first accumulated brightness compensation data, and store the first accumulated brightness compensation data to a first memory, the first memory is configured to periodically update the first accumulated brightness compensation data stored in the first memory to a second memory; the first exception is a brightness compensation data offset.

[0171] The detection module 1601 is configured to detect whether a clock signal is delayed when the first memory processes data, the first memory processes data including any one of first memory read data and first memory write data; in a case where the clock signal is delayed when the first memory processes data, it is determined that the display device has brightness compensation data offset; in a case where the clock signal is not delayed when the first memory processes data, it is determined that the display device has no brightness compensation data offset.

[0172] Optionally, the detection module 1601 is configured to detect whether the clock signal is located at a rising edge or a falling edge when the first memory processes data; in a case where the clock signal is located at the rising edge or the falling edge when the first memory processes data, it is determined that the clock signal is not delayed when the first memory processes data; in a case where the clock signal is not located at the rising edge or the falling edge when the first memory processes data, it is determined that the clock signal is delayed when the first memory processes data.

[0173] Optionally, the control module 1602 is further configured to stop updating the first accumulated brightness compensation data in the first memory and the second memory when it is detected that the display device has the first exception.

[0174] Based on the same inventive concept, the third aspect of the present disclosure provides a display driving device, which comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the brightness compensation control method as described above when executing the computer program. For example, the display driving device can be the display driving unit 10 shown in FIG. 3.

[0175] Based on the same inventive concept, the fourth aspect of the present disclosure provides a display device, which comprises a display panel and a display driving device, the display driving device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the brightness compensation control method as described above when executing the computer program.

[0176] In a possible implementation, the display device can be any product or component with a display function, such as electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc., and the present embodiment does not limit the display device.

[0177] Based on the same inventive concept, the fifth aspect of the present disclosure provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the brightness compensation control method as described above.

[0178] In a possible implementation, the computer storage medium can include a Universal Serial Bus Flash Drive (USB), a mobile hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and the like, which can store program codes.

[0179] Based on the same inventive concept, the sixth aspect of the present disclosure provides a computer program product, which includes a computer program executed by a processor to implement the brightness compensation control method as described above. Since the principle of the computer program for solving the problem is similar to that of the brightness compensation control method, the implementation of the computer program can refer to the implementation of the brightness compensation control method, and the repeated parts will not be described herein.

[0180] The computer program product can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium includes, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or apparatus, or any combination of the above. Alternatively, the readable storage medium includes an electrical connection with one or more conductive wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or a flash memory, an optical fiber, a portable compact disk read-only memory (Compact Disc-Read-Only Memory, CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0181] Obviously, the above embodiments of the present disclosure are merely examples for clearly illustrating the present disclosure, and are not intended to limit the implementation manners of the present disclosure. For those skilled in the art, on the basis of the above description, other different forms of changes or modifications can also be made, and it is impossible to enumerate all the implementation manners here. Any obvious changes or modifications derived from the technical solutions of the present disclosure are still within the protection scope of the present disclosure.

Claims

1. A brightness compensation control method, wherein, The method includes: The display device is checked for a first abnormality, which includes at least one of clock signal abnormality, brightness compensation data change, and brightness compensation data offset. When the first abnormality is detected in the display device, the long-term brightness attenuation compensation module is turned off to stop long-term brightness attenuation compensation to the display device.

2. The brightness compensation control method according to claim 1, wherein, The display device includes a display driving unit and a display panel. The display driving unit is configured to output a valid display data strobe signal and a pixel clock signal to the display panel. The first abnormality is an abnormality in the clock signal. Detecting whether the display device has a first abnormality includes: The number of cycles of the pixel clock signal corresponding to the valid display data strobe signal during the first level period is recorded as the first quantity, and the first level period is any high level period; Based on the first quantity, detect whether the display device has an abnormal clock signal.

3. The brightness compensation control method according to claim 2, wherein, The step of detecting whether the display device has an abnormal clock signal based on the first quantity includes: Determine the error between the first quantity and the reference quantity, wherein the reference quantity is the horizontal resolution of the display panel; Based on the error, detect whether the display device has an abnormal clock signal.

4. The brightness compensation control method according to claim 3, wherein, The step of detecting whether the display device has an abnormal clock signal based on the error includes: If the error exceeds a set threshold, it is determined that the display device has an abnormal clock signal. If the error is not greater than the set threshold, it is determined that the display device does not have the clock signal abnormality.

5. The brightness compensation control method according to claim 2, wherein, The detection of the number of cycles of the pixel clock signal corresponding to the valid display data strobe signal during the first level includes: The number of cycles of the pixel clock signal corresponding to the effective display data strobe signal during the first level is detected by a signal synchronization detector.

6. The brightness compensation control method according to claim 5, wherein, The step of detecting the number of cycles of the pixel clock signal corresponding to the valid display data strobe signal during the first level by means of a signal synchronization detector includes: The number of rising edges in the pixel clock signal corresponding to the effective display data strobe signal during the first level is detected by a signal synchronization detector to obtain the number of cycles of the pixel clock signal corresponding to the effective display data strobe signal during the first level.

7. The brightness compensation control method according to claim 5, wherein, The step of detecting the number of cycles of the pixel clock signal corresponding to the valid display data strobe signal during the first level by means of a signal synchronization detector includes: The number of falling edges in the pixel clock signal corresponding to the effective display data strobe signal during the first level is detected by a signal synchronization detector to obtain the number of cycles of the pixel clock signal corresponding to the effective display data strobe signal during the first level.

8. The brightness compensation control method according to claim 1, wherein, The long-term brightness attenuation compensation module is configured to accumulate the brightness compensation data of the input image frame to obtain the first accumulated brightness compensation data, and store the first accumulated brightness compensation data in the first memory. The first memory is configured to periodically update the first accumulated brightness compensation data stored in the first memory to the second memory. The first accumulated brightness compensation data stored in the second memory is recorded as historical accumulated brightness compensation data. The first anomaly is a change in the brightness compensation data. The detection of whether the display device exhibits the first anomaly includes: Read the first cumulative brightness compensation data currently stored in the first memory and the historical cumulative brightness compensation data currently stored in the second memory; Calculate the current maximum cumulative brightness compensation data based on the historical cumulative brightness compensation data read. Based on the first cumulative brightness compensation data and the maximum cumulative brightness compensation data, detect whether the display device has changed the brightness compensation data.

9. The brightness compensation control method according to claim 8, wherein, The step of detecting whether the display device has changed its brightness compensation data based on the first cumulative brightness compensation data and the maximum cumulative brightness compensation data includes: If the first cumulative brightness compensation data is greater than the maximum cumulative brightness compensation data, it is determined that the display device has a change in the brightness compensation data; If the first cumulative brightness compensation data is not greater than the maximum cumulative brightness compensation data, it is determined that the display device does not have a change in the brightness compensation data.

10. The brightness compensation control method according to claim 8, wherein, The step of calculating the current maximum cumulative brightness compensation data based on the read historical cumulative brightness compensation data includes: Based on the retrieved historical cumulative brightness compensation data, calculate the current maximum cumulative brightness compensation data using the following formula. Max Offset = (Offset1 / T1) * T2 Wherein, Max Offset represents the maximum cumulative brightness compensation data, Offset1 represents the historical cumulative brightness compensation data read, T1 represents the cumulative time corresponding to the historical cumulative brightness compensation data read, and T2 represents the cumulative time corresponding to the first cumulative brightness compensation data read.

11. The brightness compensation control method according to claim 1, wherein, The long-term brightness attenuation compensation module is configured to accumulate the brightness compensation data of the input image frame to obtain first accumulated brightness compensation data, and store the first accumulated brightness compensation data in a first memory. The first memory is configured to periodically update the first accumulated brightness compensation data stored in the first memory to a second memory. The first anomaly is the brightness compensation data offset. Detecting whether the display device has the first anomaly includes: Detect whether there is a delay in the clock signal when the first memory processes data, wherein the data processed by the first memory includes either data read from the first memory or data written to the first memory; If there is a delay in the clock signal when the first memory processes data, it is determined that the display device has the brightness compensation data offset; If there is no delay in the clock signal when the first memory processes data, it is determined that the display device does not have the brightness compensation data offset.

12. The brightness compensation control method according to claim 11, wherein, The step of detecting whether there is a delay in the clock signal when the first memory processes data includes: When the first memory is processing data, it is detected whether the clock signal is at the rising edge or the falling edge; When the first memory processes data, the clock signal is located at the rising edge or falling edge, and it is determined that there is no delay in the clock signal when the first memory processes data; When the first memory processes data, if the clock signal is not at the rising or falling edge, it is determined that there is a delay in the clock signal when the first memory processes data.

13. The brightness compensation control method according to claim 8 or 11, wherein, The method further includes: When a first anomaly is detected in the display device, the updating of the first cumulative brightness compensation data in the first memory and the second memory is stopped.

14. A brightness compensation control device, wherein, The device includes: The detection module is used to detect whether the display device has a first abnormality, the first abnormality including at least one of clock signal abnormality, brightness compensation data change and brightness compensation data offset; The control module is configured to disable the long-term brightness attenuation compensation module when the first abnormality is detected in the display device, so as to stop long-term brightness attenuation compensation to the display device.

15. The brightness compensation control device according to claim 14, wherein, The display device includes a display driving unit and a display panel. The display driving unit is configured to output a valid display data strobe signal and a pixel clock signal to the display panel. The first abnormality is an abnormality of the clock signal. The detection module is used to detect the number of cycles of the pixel clock signal corresponding to the effective display data strobe signal during the first level period, denoted as the first quantity, where the first level period is any high level period; Based on the first quantity, detect whether the display device has an abnormal clock signal.

16. The brightness compensation control device according to claim 15, wherein, The detection module is used to determine the error between the first quantity and the reference quantity, wherein the reference quantity is the horizontal resolution of the display panel; Based on the error, detect whether the display device has an abnormal clock signal.

17. The brightness compensation control device according to claim 16, wherein, The detection module is used to determine that the display device has an abnormal clock signal when the error is greater than a set threshold. If the error is not greater than the set threshold, it is determined that the display device does not have the clock signal abnormality.

18. A display driving device, wherein, The display driving device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the brightness compensation control method as described in any one of claims 1-13.

19. A computer-readable storage medium, wherein, The computer-readable storage medium stores a computer program, which is executed by a processor to implement the brightness compensation control method as described in any one of claims 1-13.

20. A computer program product, wherein, The computer program product includes a computer program that is executed by a processor to implement the brightness compensation control method as described in any one of claims 1-13.

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