CXL module, controller, task processing method, medium, and system

Abstract

A CXL module, a controller, a task processing method, a medium, and a system. The CXL module comprises a controller and a memory connected to the controller; and the memory is provided with a shared storage space allowing access by the controller and a host, a first storage space only allowing access by the controller, and a second storage space only allowing access by the host. The controller is configured to: establish a first address mapping relationship from a virtual address to an external physical address corresponding to the shared storage space, and a second address mapping relationship from the virtual address to a memory address of the first storage space; when executing a computing task, convert, on the basis of the first address mapping relationship, a virtual address carried in a data access instruction into an external physical address, and access corresponding data on the basis of the external physical address; and convert, on the basis of the second address mapping relationship, the virtual address carried in the data access instruction into a memory address, and access corresponding data on the basis of the memory address.

Description

CXL module, controller, task processing method, medium and system

[0001] The present application claims priority to the Chinese patent application No. 202410904395.1, filed on July 5, 2024, and entitled "CXL module, controller, task processing method, medium and system", the content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] Embodiments of the present disclosure relate to, but are not limited to, the technical field of data access, and in particular to a CXL module, controller, task processing method, medium and system. BACKGROUND

[0003] CXL (Compute Express Link) is a memory interface protocol based on the PCIe (Peripheral Component Interconnect Express) physical layer, which can realize the sharing of multiple computing nodes, so that the application layer software can read and write the memory in the CXL module as reading and writing the host memory.

[0004] SUMMARY

[0005] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims. Embodiments of the present disclosure provide a CXL module, controller, task processing method, medium and system.

[0006] In a first aspect, embodiments of the present disclosure provide a CXL module, comprising a controller and a memory chip connected to the controller, the memory being provided with a shared storage space allowing access by the controller and a host, a first storage space allowing access only by the controller, and a second storage space allowing access only by the host; the controller is configured to: establish a first address mapping relationship of a virtual address to an external physical address corresponding to the shared storage space; when executing a computing task, convert a virtual address carried in a data access instruction into an external physical address according to the first address mapping relationship, and access the corresponding data according to the converted external physical address; establish a second address mapping relationship of a virtual address to a memory address of the first storage space; when executing a computing task, convert a virtual address carried in a data access instruction into a memory address according to the second address mapping relationship, and access the corresponding data according to the converted memory address; receive an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; and access any one or more of the second storage space and the shared storage space according to the to-be-accessed external physical address.

[0007] In a second aspect, the embodiments of the present disclosure provide a controller applied to the CXL module in the above embodiments, the CXL module comprising a memory connected with the controller, the memory being provided with a shared storage space allowing the controller and the host to access, a first storage space allowing only the controller to access, and a second storage space allowing only the host to access, the controller comprising a processor and a virtual memory manager; wherein the virtual memory manager is configured to: convert a virtual address carried in a data access instruction into an external physical address according to a first address mapping relationship of the virtual address to the external physical address corresponding to the shared storage space; and convert the virtual address in the data access instruction into a memory address according to a second address mapping relationship of the virtual address to the memory address of the first storage space; and the processor is configured to: establish the first address mapping relationship; access corresponding data according to the external physical address converted by the virtual memory manager when performing a computing task; establish the second address mapping relationship; access corresponding data according to the memory address converted by the virtual memory manager when performing the computing task; receive an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; and access any one or more of the second storage space and the shared storage space according to the to-be-accessed external physical address.

[0008] In a third aspect, the embodiments of the present disclosure provide a task processing method applied to the CXL module in the above embodiments, the CXL module comprising a controller and a memory connected with the controller, the memory being provided with a shared storage space allowing the controller and the host to access, a first storage space allowing only the controller to access, and a second storage space allowing only the host to access, the method comprising: establishing a first address mapping relationship of a virtual address to an external physical address corresponding to the shared storage space and a second address mapping relationship of the virtual address to a memory address of the first storage space; when performing a computing task, converting a virtual address carried in a data access instruction into an external physical address according to the first address mapping relationship, and accessing corresponding data according to the converted external physical address; converting the virtual address in the data access instruction into a memory address according to the second address mapping relationship, and accessing corresponding data according to the converted memory address; and receiving an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; and accessing any one or more of the second storage space and the shared storage space according to the to-be-accessed external physical address.

[0009] In a fourth aspect, the embodiments of the present disclosure provide a non-transitory computer storage medium, the computer storage medium storing a computer program, the computer program being executed by a processor to implement the task processing method in the above embodiments.

[0010] In a fifth aspect, the embodiments of the present disclosure provide a computer system, comprising a host and the CXL module in the above embodiments, the host communicates with the CXL module through a CXL interface to realize discovery, configuration and data transmission of the CXL module.

[0011] Other aspects can become apparent from the following detailed description, when taken in conjunction with the accompanying drawings, which together illustrate the exemplary embodiments.

[0012] SUMMARY

[0013] The accompanying drawings are included to provide a further understanding of the present disclosure, and constitute a part of this specification. The drawings illustrate the embodiments of the present disclosure, and together with the specification serve to explain the principles of the present disclosure, and do not limit the present disclosure.

[0014] FIG. 1 is a structural schematic diagram of one embodiment of the CXL module of the present disclosure;

[0015] FIG. 2 is a schematic diagram of one embodiment of the CXL module of the present disclosure;

[0016] FIG. 3 is a structural schematic diagram of one embodiment of the CXL module of the present disclosure;

[0017] FIG. 4 is a structural schematic diagram of one embodiment of the CXL module of the present disclosure;

[0018] FIG. 5 is a structural schematic diagram of one embodiment of the controller of the present disclosure;

[0019] FIG. 6 is a structural schematic diagram of one embodiment of the controller of the present disclosure;

[0020] FIG. 7 is a flow schematic diagram of one embodiment of the task processing method of the present disclosure;

[0021] FIG. 8 is a flow schematic diagram of establishing a first address mapping relationship in one embodiment of the task processing method of the present disclosure;

[0022] FIG. 9 is a flow schematic diagram of establishing a second address mapping relationship in one embodiment of the task processing method of the present disclosure;

[0023] FIG. 10 is a flow schematic diagram of another embodiment of the task processing method of the present disclosure;

[0024] FIG. 11 is a flow schematic diagram of terminating a task in one embodiment of the task processing method of the present disclosure;

[0025] FIG. 12 is a structural schematic diagram of one embodiment of the computer system of the present disclosure.

[0026] DETAILED DESCRIPTION

[0027] Embodiments of the present disclosure will be described below in detail with reference to the accompanying drawings. Embodiments in the present disclosure and features in the embodiments can be combined with each other as long as there is no conflict.

[0028] Embodiments of the present disclosure are not necessarily limited to the sizes shown in the drawings, and the shapes and sizes of the components in the drawings do not reflect true proportions. Furthermore, the drawings schematically show ideal examples, and embodiments of the present disclosure are not limited to the shapes or values shown in the drawings.

[0029] The ordinal numbers "first", "second", and the like in the present disclosure are set in order to avoid confusion of the components, and do not represent any order, number, or importance.

[0030] The present disclosure describes a plurality of embodiments, but the description is exemplary, not limiting, and more embodiments and implementation schemes can be possible within the scope encompassed by the embodiments described in the present disclosure for those of ordinary skill in the art. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Unless specifically intended to be limited, any feature or element of any embodiment can be used in combination with any other feature or element of any other embodiment, or in combination with any other feature or element of the same embodiment.

[0031] The present disclosure includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features, and elements disclosed in the present disclosure can also be combined with any conventional features or elements to form a solution defined by the claims. Any feature or element of any embodiment can also be combined with features or elements from other disclosed solutions to form another solution defined by the claims. Therefore, it should be understood that any feature shown and discussed in the present disclosure can be implemented alone or in any appropriate combination. Therefore, the embodiments are not limited other than as set forth in the claims and their equivalents. Furthermore, various modifications and changes can be made within the scope of the appended claims.

[0032] Furthermore, in describing representative embodiments, the specification can have presented the method and process descriptions and process steps as a particular sequence of steps. However, as those of ordinary skill in the art will comprehend, the steps of the disclosed methods and processes can be performed in other sequences than the illustrated or described ones, and the methods and processes described are not limited to the particular order of steps disclosed. Other steps can be provided among steps described and other steps can be replaced by the steps described. Thus, the particular order of the steps disclosed is not an inherent part of the methods and processes described. The methods and processes described are preferably carried out in the order in which they are described, but other orders are possible. In addition, the present disclosure contemplates that each of the steps described herein can be performed by more than one component or agent. Furthermore, the methods and processes described are not inherently associated with any particular electronic device, hardware component, software code, etc. Therefore, the methods and processes described can be carried out in any device or hardware component or general purpose processor programmed with the software code, as desired.

[0033] As shown in FIG. 1, the CXL module provided by the embodiment of the present disclosure includes a controller 110 and a memory 120 connected with the controller 110, and the memory 120 may, for example, include a plurality of DRAM (Dynamic Random Access Memory) chips. The memory 120 is provided with a shared storage space allowing the controller 110 and a host to access, a first storage space allowing only the controller to access, and a second storage space allowing only the host to access; the controller 110 is configured to: establish a first address mapping relationship of a virtual address (Virtual Address) to an external physical address corresponding to the shared storage space; when performing a computing task, convert the virtual address carried in a data access instruction into an external physical address according to the first address mapping relationship, and access the corresponding data according to the converted external physical address; establish a second address mapping relationship of the virtual address to a memory address of the first storage space; when performing the computing task, convert the virtual address carried in the data access instruction into the memory address according to the second address mapping relationship, and access the corresponding data according to the converted memory address; receive an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; and access any one or more of the second storage space and the shared storage space according to the to-be-accessed external physical address.

[0034] Exemplarily, the controller 110 may, for example, be in the form of a control chip, or be integrated in a memory chip. The controller 110 may be provided with a CXL interface based on a CXL protocol, so that the host (Host) interacts with the controller 110 through the CXL interface. For example, based on the CXL.mem protocol or the CXL.cache protocol, the host CPU may send a memory access instruction to the controller 110 to access the data in the memory 120, where the address information involved in the memory access instruction is an external physical address, i.e., an address carried in a message sent by the host CPU to the CXL module through an address bus; after the CXL module receives the message from the address bus, the external physical address can be extracted therefrom, and then the external physical address can be converted into the address of a storage unit in a memory chip (e.g., a DRAM chip) through a special hardware (e.g., an address translator). The controller 110 may also be provided with a DDR (Double Data Rate) controller for managing the memory 120, e.g., accessing the data in the memory 120 according to the memory address. For another example, based on the CXL.io protocol, the host CPU may also send a task instruction or other control instruction to the controller 110.

[0035] Virtual memory technology can allow an application to read and write data using a virtual address, and a host CPU can translate the virtual address into a physical address in real time, so as to manage the memory usage of each task and ensure that the storage spaces corresponding to each task do not tread on each other. In addition, with the help of virtual memory technology, a unified programming environment can be provided for developers, and multiple applications can be dynamically loaded and run. At present, the virtual address involved in the host instruction (for example, an instruction indicating that the CXL module takes data from a certain address) can only be translated into a physical address by a memory management unit (MMU) in the host CPU, and this processing process needs to occupy the computing resources of the host, increases the load of the host, and needs to consume a long time and has a certain security risk.

[0036] In this embodiment, the data access instruction is an instruction generated by the controller 110 for accessing data in the memory 120. The controller 110 first determines the virtual address corresponding to the data to be accessed, and then converts the virtual address into an external physical address or a memory address, and then accesses the corresponding data in the memory 120 according to the external physical address or the memory address, thereby realizing the conversion of the virtual address and the external physical address or the memory address inside the CXL module. In this way, the controller 110 can manage the data storage of multiple tasks through the virtual address, avoid mutual trampling, and shorten the response time of the CXL module and the host in cooperative processing of tasks.

[0037] In addition, the shared storage space can allow the controller 110 and the host to access, and when the host needs to access data in the shared storage space, it can send a memory access instruction to the controller 110 based on the CXL.mem protocol or the CXL.cache protocol, and the address information carried in the memory access instruction is an external physical address. Therefore, when the controller accesses data, the virtual address is converted into an external physical address, and then the corresponding data is accessed according to the external physical address, so that the consistency management of the data in the shared storage space can be more convenient.

[0038] When the CXL module cooperates with the host to process a computing task, the data required by the CXL module in the process of executing the computing task is less important to the host, and the data can be stored in the first storage space which is only allowed to be accessed by the controller, and a second address mapping relationship of a virtual address to a memory address of the first storage space is established. Subsequently, the controller can generate a data access instruction carrying a virtual address according to the requirement in the process of executing the computing task, and then translate the virtual address into a memory address to access the data in the first storage space. For example, the original data of the computing task can be read from the first storage space, or the intermediate data generated in the process of executing the task can be stored in the first storage space. In this way, the controller can manage the storage of the original data and the intermediate data involved in the computing task in the first storage space based on the virtual address. Optionally, when the controller completes the execution of the computing task, the processing result obtained can be stored in the shared storage space, so that the host can read the processing result from the shared storage space.

[0039] In some optional embodiments of the present embodiment, the controller can also establish a third address mapping relationship of a virtual address to an external physical address corresponding to the first storage space. When the controller needs to access the data in the first storage space, the virtual address can be first translated into an external physical address according to the third address mapping relationship, and then the external physical address is translated into a memory address of the first storage space.

[0040] In the present embodiment, the data required for executing the computing task is saved in the first storage space, which can reduce the storage resources occupied by the computing task in the shared storage space and the number of addresses recorded in the first address mapping relationship, and reduce the storage resources occupied by the first address mapping relationship in the CXL module and the host. On the other hand, since the first storage space is only allowed to be accessed by the controller, the second address mapping relationship only needs to be saved in the CXL module and does not need to be stored in the host, thereby reducing the storage pressure of the host.

[0041] In one example, the host CPU can instruct the processor of the controller 110 to establish a computing task through a task instruction, at this time, the task instruction can include a virtual address corresponding to the computing task and a size of storage space to be occupied, the controller 110 can allocate a storage area for the computing task in the shared storage space according to the task instruction, and establish a first address mapping relationship between the external physical address of the storage area and the virtual address. Subsequently, when the controller 110 executes the computing task, it can generate a data access instruction according to the virtual address corresponding to the computing task to access the data required in the execution process, for example, the data generated in the execution process and the processing result obtained after the execution can be stored in the shared storage space, and the host can access this part of data through an external access instruction. In this way, the controller 110 can manage the data storage of the computing task based on the virtual address, and in the multi-task scenario, the mutual trampling of the data of multiple tasks can be avoided.

[0042] The CXL module in the embodiment, the controller can establish a first address mapping relationship between the virtual address and the external physical address corresponding to the shared storage space and a second address mapping relationship between the virtual address and the memory address of the first storage space, so that when executing the computing task, the virtual address carried in the data access instruction can be converted into the external physical address according to the first address mapping relationship, the virtual address carried in the data access instruction can be converted into the memory address according to the second address mapping relationship, and the corresponding data can be accessed according to the converted external physical address and memory address; and any one or more of the second storage space and the shared storage space can also be accessed according to the external physical address to be accessed carried in the external access instruction. Not only improves the utilization rate of the storage space of the CXL module, but also realizes the memory access processing according to the virtual address without the need of the operating system of the host, on the one hand, shortens the response time of the CXL module and the host in cooperative processing of tasks, which helps to improve the efficiency and reliability of the CXL module and the host in cooperative processing of tasks; on the other hand, the conversion of the virtual address to the external physical address is realized by the CXL module instead of the host, which can reduce the load of the virtual memory manager of the host.

[0043] In some embodiments, the first address mapping relationship includes a first address mapping table corresponding to each computing task; and the controller is configured to establish the first address mapping relationship from the virtual address to the external physical address corresponding to the shared storage space, including: receiving a first task allocation instruction sent by the host, the first task allocation instruction including an identifier of a task to be allocated, a first virtual address corresponding to the task to be allocated, and a size of a storage space required by the task to be allocated; determining a storage area corresponding to the task to be allocated in the shared storage space according to the first task allocation instruction, and determining a first address mapping table between the external physical address of the storage area and the first virtual address; determining a correspondence between the first address mapping table and the identifier of the task to be allocated; and sending the first address mapping table to the host.

[0044] In the present embodiment, the controller can process multiple computing tasks, and generate a first address mapping table for each computing task according to a first task allocation instruction of the host. Here, the first task allocation instruction is used to instruct the controller to divide a storage area for a task to be allocated in the shared storage space, and determine the first address mapping table. Both the CXL module and the host store the first address mapping table corresponding to each computing task, so as to subsequently access the shared storage space according to the virtual address and the external physical address recorded in the first address mapping table.

[0045] In some embodiments, the second address mapping relationship includes a second address mapping table corresponding to each computing task; and the controller is configured to establish the second address mapping relationship from the virtual address to the memory address of the first storage space, including: receiving a second task allocation instruction sent by the host, the second task allocation instruction including an identifier of a task to be allocated, a second virtual address corresponding to the task to be allocated, and a size of a storage space required by the task to be allocated; determining a storage area corresponding to the task to be allocated in the first storage space according to the second task allocation instruction, and determining a second address mapping table between the memory address of the storage area and the second virtual address; and determining a correspondence between the second address mapping table and the identifier of the task to be allocated.

[0046] In the present embodiment, the controller can generate a second address mapping table for each computing task according to a second task allocation instruction of the host. Here, the second task allocation instruction is used to instruct the controller to divide a storage area for a task to be allocated in the first storage space, and determine the second address mapping table. Subsequently, the controller can access the first storage space according to the virtual address and the memory address recorded in the second address mapping table corresponding to each computing task. In this way, each computing task can correspond to a first address mapping table and a second address mapping table at the same time, so as to facilitate the controller to manage the execution process and the data storage of the processing result of the computing task according to the virtual address, respectively.

[0047] Next, refer to FIG. 2, which shows a schematic diagram of one embodiment of the CXL module of the present disclosure. As shown in FIG. 2, the memory 210 of the CXL module includes a shared storage space 211, a first storage space 212, and a second storage space 213. The controller 220 can receive a task execution instruction sent by the host, the task execution instruction including an identification of a to-be-executed computing task.

[0048] After receiving the task execution instruction, the controller 220 can complete the conversion of the virtual address according to the identification of the to-be-executed computing task. The conversion process can include the conversion of the virtual address to the external physical address of the shared storage space and the conversion of the virtual address to the memory address of the first storage space.

[0049] The conversion of the virtual address to the external physical address of the shared storage space can be performed in the following manner: according to the identification of the to-be-executed computing task, determining a target first address mapping table corresponding to the to-be-executed computing task in the first address mapping relationship; and finding the external physical address corresponding to the virtual address carried in the data access instruction in the target first address mapping table.

[0050] The conversion of the virtual address to the memory address of the first storage space can be performed in the following manner: according to the identification of the to-be-executed computing task, determining a target second address mapping table corresponding to the to-be-executed computing task in the second address mapping relationship; and finding the memory address corresponding to the virtual address carried in the data access instruction in the target second address mapping table.

[0051] In one specific example, the controller 220 can be loaded with a plurality of executable computing tasks and manage the data storage of the computing tasks through the virtual address corresponding to each computing task. When the host needs to call the CXL module to process a certain computing task, the controller 220 can be sent a task execution instruction based on the CXL.io protocol, and the controller 220 can switch the currently executed computing task to the computing task according to the identification of the to-be-executed computing task carried in the task execution instruction, and switch the currently used address mapping table to the target first address mapping table and the target second address mapping table corresponding to the identification. Subsequently, the controller 220 can access the data in the shared storage space according to the target first address mapping table, for example, the processing result can be stored in the shared storage space; and the controller 220 can also access the first storage space according to the target second address mapping table, for example, the intermediate data generated in the process of executing the computing task can be stored in the first storage space.

[0052] In addition, when the controller 220 receives an external access instruction sent by the host, the controller 220 can access any one or more of the second storage space and the shared storage space according to the to-be-accessed external physical address carried in the external access instruction.

[0053] In this embodiment, the controller can determine the target first address mapping table and the target second address mapping table corresponding to the task to be executed according to the identification of the task to be executed, so as to complete the conversion of the virtual address to the external physical address and the memory address. This helps to improve the processing efficiency of the controller in a multi-task scenario.

[0054] Referring to FIG. 3, FIG. 3 shows a schematic diagram of one embodiment of the CXL module of the present disclosure. As shown in FIG. 3, the memory 310 includes a shared storage space 311, a first storage space 312, and a second storage space 313. The controller 320 is further provided with a cache 321 configured to store data in the shared storage space 311; and when the controller 320 accesses data according to an external physical address, the controller 320 can access data in the cache 321 according to the converted external physical address; and when the data to be accessed does not exist in the cache 321, the converted external physical address is translated into a memory address, and data in the shared storage space 311 is accessed according to the memory address.

[0055] For example, the controller 320 can load data in the shared storage space 311 into the cache 321, and record the correspondence between the external physical address of the data and the cache address. When the controller 320 performs a computing task, the virtual address is converted into an external physical address, and the external physical address is searched in the correspondence. If the external physical address exists in the correspondence, the data in the cache 321 is accessed according to the cache address corresponding to the external physical address; if the external physical address does not exist in the correspondence, the external physical address is translated into a memory address, and data in the shared storage space 311 is accessed according to the memory address.

[0056] In this embodiment, by setting a cache for storing data in the shared storage space and preferentially accessing data in the cache, the time-consuming of the controller accessing data in the shared storage space can be shortened, which helps to improve the efficiency of data access within the CXL module.

[0057] Continuing to refer to FIG. 3, in some optional embodiments of the present embodiment, the cache 321 is further configured to store data in the first storage space 312; and when the controller 320 performs a computing task, the controller 320 can access data in the cache 321 according to the converted memory address; and when the data to be accessed does not exist in the cache 321, data in the first storage space 312 is accessed according to the converted memory address.

[0058] As an example, the controller 320 can load the data in the first storage space 312 into the cache 321, and record the correspondence between the memory address of the data and the cache address. When the controller 320 performs a computing task, after converting the virtual address into a memory address, the controller 320 can look up the memory address in the correspondence. If the memory address exists in the correspondence, the controller 320 accesses the data in the cache 321 according to the cache address corresponding to the memory address; if the memory address does not exist in the correspondence, the controller 320 accesses the data in the first storage space 312 according to the memory address.

[0059] In this embodiment, storing the data in the first storage space in the cache so as to preferentially access the data in the cache can shorten the time consumption of the controller accessing the data in the first storage space, and help further improve the efficiency of data access in the CXL module.

[0060] In some embodiments, the controller is further configured to: in response to receiving a task end instruction sent by the host, determine, according to an identifier of a to-be-ended task carried in the task end instruction, a first address mapping table and a second address mapping table corresponding to the to-be-ended task; release, according to an external physical address in the first address mapping table corresponding to the to-be-ended task, a storage space occupied by the to-be-ended task in the shared storage space; release, according to a memory address in the second address mapping table corresponding to the to-be-ended task, a storage space occupied by the to-be-ended task in the first storage space; and release storage spaces occupied by the first address mapping table and the second address mapping table corresponding to the to-be-ended task.

[0061] In this embodiment, the controller can terminate a corresponding computing task according to a task end instruction sent by the host, and release resources occupied by the computing task, for example, including data stored by the computing task in the shared storage space and the first storage space, and storage resources occupied by the first address mapping table and the second address mapping table corresponding to the computing task, so as to improve the utilization rate of the memory in the CXL module.

[0062] Referring to FIG. 4, FIG. 4 shows a schematic diagram of one embodiment of the CXL module of the present disclosure. As shown in FIG. 4, the memory 410 includes a shared storage space 411, a first storage space 412, and a second storage space 413 which is only allowed to be accessed by the host. The controller 420 is further configured to: receive an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; and access any one or more of the second storage space 413 and the shared storage space 411 according to the to-be-accessed external physical address.

[0063] In this embodiment, the memory space of the CXL module is divided into the shared storage space, the first storage space, and the second storage space, and the permissions and functions of each storage space are different, which helps improve the memory utilization rate of the CXL module.

[0064] With reference back to FIG. 4, the CXL module further comprises a flash memory 430; and the controller 420 is further configured to: replace the cold data in the memory 410 into the flash memory 430, and record the correspondence between the external physical address of the cold data and the flash memory address.

[0065] In this embodiment, the cold data refers to data with low access frequency, and the controller can replace the cold data into the flash memory to reduce the storage pressure of the memory.

[0066] FIG. 5 shows a schematic diagram of one embodiment of the controller of the present disclosure, which is applied to the CXL module in any of the above embodiments. As shown in FIG. 5, the CXL module comprises a memory 520 connected with a controller 510, the memory 520 is provided with a shared storage space 521 allowing the controller 510 and a host to access, a first storage space 522 allowing only the controller to access, and a second storage space 523 allowing only the host to access, and the controller 510 comprises a processor 511 and a virtual memory management unit (MMU) 512. The virtual memory management unit 512 is configured to: convert a virtual address carried in a data access instruction into an external physical address according to a first address mapping relationship between the virtual address and the external physical address corresponding to the shared storage space 521; and convert the virtual address in the data access instruction into a memory address according to a second address mapping relationship between the virtual address and the memory address of the first storage space. The processor 511 is configured to: establish the first address mapping relationship; access corresponding data according to the external physical address converted by the virtual memory management unit when performing a computing task; establish the second address mapping relationship; access corresponding data according to the memory address converted by the virtual memory management unit when performing the computing task; receive an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; and access any one or more of the second storage space 523 and the shared storage space 521 according to the to-be-accessed external physical address.

[0067] As an example, the processor 511 as the computing resource of the controller 510 can be one or more CPU cores (i.e., CPU core) or data processing accelerators, which perform corresponding computing tasks by running application programs. When performing a task, the processor 511 can generate a data access instruction according to the demand, the data access instruction carrying a virtual address of to-be-accessed data. The processor 511 sends the data access instruction to the virtual memory management unit 512, which can translate the virtual address into an external physical address according to the first address mapping relationship, or translate the virtual address into a memory address according to the second address mapping relationship, so that the processor 511 can access corresponding data according to the external physical address or the memory address.

[0068] In this embodiment, the part of data can be stored in the first storage space 522, and subsequently, the controller 510 can generate a data access instruction carrying a virtual address according to the requirement when performing a computing task, and then translate the virtual address into a memory address to access the data in the first storage space 522, for example, the original data of the computing task can be read from the first storage space 522 or the intermediate data generated in the task execution process can be stored in the first storage space. In this way, the controller can manage the storage of the original data and the intermediate data related to the computing task in the first storage space based on the virtual address, on the one hand, the storage resources occupied by the computing task in the shared storage space and the number of addresses recorded in the first address mapping relationship can be reduced, thereby reducing the storage resources occupied by the first address mapping relationship in the CXL module and the host; on the other hand, since the first storage space is only allowed to be accessed by the controller, the second address mapping relationship only needs to be saved in the CXL module and does not need to be stored in the host, thereby further reducing the storage pressure of the host.

[0069] In this embodiment, when the controller 510 receives the external access instruction sent by the host, the controller 510 can access any one or more of the second storage space 523 and the shared storage space 521 according to the external physical address to be accessed carried in the external access instruction.

[0070] In this embodiment, the memory space of the CXL module is divided into a shared storage space, a first storage space and a second storage space, and the permissions and functions of each storage space are different. Not only does it help to improve the memory utilization rate of the CXL module, but also it can realize the memory access processing according to the virtual address without the operation system of the host, on the one hand, it shortens the response time of the CXL module and the host in cooperative processing tasks, and helps to improve the efficiency and reliability of the CXL module and the host in cooperative processing tasks; on the other hand, the conversion of the virtual address to the external physical address is realized by the CXL module instead of the host, which can reduce the load of the virtual memory manager of the host. The virtual memory manager is arranged in the controller to complete the conversion of the virtual address to the external physical address or the memory address in the controller, which shortens the response time of the CXL module and the host in cooperative processing tasks, and helps to improve the efficiency and reliability of the CXL module and the host in cooperative processing tasks.

[0071] In some embodiments, the first address mapping relationship includes a first address mapping table corresponding to each computing task; and the processor is configured to establish the first address mapping relationship, including: receiving a first task allocation instruction sent by the host, the first task allocation instruction including an identifier of a task to be allocated, a first virtual address corresponding to the task to be allocated, and a size of a storage space required by the task to be allocated; determining a storage area corresponding to the task to be allocated in the shared storage space according to the first task allocation instruction, and determining a first address mapping table between an external physical address of the storage area and the first virtual address; determining a correspondence between the first address mapping table and the identifier of the task to be allocated; and sending the first address mapping table to the host.

[0072] In the present embodiment, the processor can process multiple computing tasks, and generate a first address mapping table for each computing task according to a first task allocation instruction of the host. Here, the first task allocation instruction is used to instruct the controller to divide a storage area for a task to be allocated in the shared storage space, and determine the first address mapping table. The CXL module and the host both store the first address mapping table corresponding to each computing task, so as to subsequently access the shared storage space according to the virtual address and the external physical address recorded in the first address mapping table.

[0073] In some embodiments, the second address mapping relationship includes a second address mapping table corresponding to each computing task; and the processor is configured to establish the second address mapping relationship, including: receiving a second task allocation instruction sent by the host, the second task allocation instruction including an identifier of a task to be allocated, a second virtual address corresponding to the task to be allocated, and a size of a storage space required by the task to be allocated; determining a storage area corresponding to the task to be allocated in the first storage space according to the second task allocation instruction, and determining a second address mapping table between a memory address of the storage area and the second virtual address; and determining a correspondence between the second address mapping table and the identifier of the task to be allocated.

[0074] In the present embodiment, the processor can generate a second address mapping table for each computing task according to a second task allocation instruction of the host. Here, the second task allocation instruction is used to instruct the processor to divide a storage area for a task to be allocated in the first storage space, and determine the second address mapping table. Subsequently, the processor can access the first storage space according to the virtual address and the memory address recorded in the second address mapping table corresponding to each computing task. In this way, each computing task can correspond to a first address mapping table and a second address mapping table at the same time, so as to facilitate the processor to manage the execution process and the data storage of the processing result of the computing task according to the virtual address, respectively.

[0075] In some embodiments, the processor is further configured to receive a task execution instruction sent by the host, the task execution instruction comprising an identification of a to-be-executed computing task; determine, according to the identification of the to-be-executed computing task, a target first address mapping table corresponding to the to-be-executed computing task in the first address mapping relationship, and a target second address mapping table corresponding to the to-be-executed computing task in the second address mapping relationship; the virtual memory manager is configured to convert the virtual address carried in the data access instruction into an external physical address according to the first address mapping relationship of the virtual address to the external physical address corresponding to the shared storage space, comprising: searching for the external physical address corresponding to the virtual address carried in the data access instruction in the target first address mapping table; the virtual memory manager is configured to convert the virtual address carried in the data access instruction into a memory address according to the second address mapping relationship, comprising: searching for the memory address corresponding to the virtual address carried in the data access instruction in the target second address mapping table.

[0076] In this embodiment, the processor can determine the target first address mapping table and the target second address mapping table corresponding to the to-be-executed task according to the identification of the to-be-executed task, and then the virtual memory manager completes the conversion of the virtual address into the external physical address and the memory address. This helps to improve the processing efficiency of the controller in a multi-task scenario.

[0077] As shown in FIG. 6, the controller comprises a cache 610, an address translator 620, a processor 630 and a virtual memory manager 640,

[0078] The controller is also provided with a cache 610 and an address translator 620, the cache 610 is configured to store data in the shared storage space; the address translator 620 is configured to translate the external physical address into the memory address; and the processor 630 can access the data in the cache according to the external physical address converted by the virtual memory manager 640; in the case that the to-be-accessed data does not exist in the cache 610, the converted external physical address is sent to the address translator 620, and the data in the shared storage space is accessed according to the memory address translated by the address translator 620.

[0079] In this embodiment, the address translator 620 is used to translate the external physical address into the memory address. Generally, the address carried in the external access instruction sent by the host to the CXL module based on the CXL.mem protocol or the CXL.cache protocol is the external physical address, and the controller can use the address translator 620 to translate the external physical address into the memory address to complete the memory access operation of the host. Here, the address translator 620 can also translate the external physical address output by the virtual memory manager 640 into the memory address to complete the memory access operation when the processor 630 executes the computing task.

[0080] In the embodiment, by setting the cache to store the data in the shared storage space and preferentially accessing the data in the cache, the time consumption of the processor accessing the data in the shared storage space can be shortened, and the efficiency of the data access in the CXL module can be improved.

[0081] With reference back to FIG. 6, in some optional implementations of the embodiment, the cache 610 is further configured to store the data in the first storage space; and the processor 630 can preferentially access the data in the cache 610 according to the memory address converted by the virtual memory manager 640, and access the data in the first storage space according to the converted memory address in a case where the data to be accessed does not exist in the cache 610.

[0082] In the implementation, by storing the data in the first storage space in the cache to preferentially access the data in the cache, the time consumption of the processor accessing the data in the first storage space can be shortened, and the efficiency of the data access in the CXL module can be further improved.

[0083] In some embodiments, the processor is further configured to: in response to receiving the task end instruction sent by the host, determine the first address mapping table and the second address mapping table corresponding to the task to be ended according to the identifier of the task to be ended carried in the task end instruction; release the storage space occupied by the task to be ended in the shared storage space according to the external physical address in the first address mapping table corresponding to the task to be ended; release the storage space occupied by the task to be ended in the first storage space according to the memory address in the second address mapping table corresponding to the task to be ended; and release the storage space occupied by the first address mapping table and the second address mapping table corresponding to the task to be ended.

[0084] In the embodiment, the processor can terminate the corresponding computing task according to the task end instruction sent by the host, and release the resources occupied by the computing task, for example, the data stored by the computing task in the shared storage space and the first storage space, and the storage resources occupied by the first address mapping table and the second address mapping table corresponding to the computing task. In this way, the utilization rate of the memory in the CXL module can be improved.

[0085] In some embodiments, the CXL module further includes a flash memory; and the processor is further configured to: replace the cold data in the memory into the flash memory, and record the correspondence between the external physical address of the cold data and the flash memory address.

[0086] In the embodiment, the cold data refers to data with a low access frequency, for example, data with an access frequency lower than a preset frequency threshold. The controller can replace the cold data into the flash memory to reduce the storage pressure of the memory.

[0087] The embodiment of the present disclosure further provides a task processing method, which is applied to the CXL module in any of the above embodiments, and the CXL module comprises a controller and a memory connected with the controller, and the memory is provided with a shared storage space allowing the controller and the host to access, a first storage space allowing only the controller to access, and a second storage space allowing only the host to access, as shown in FIG. 7, the method comprises the following steps 710 to 750.

[0088] Step 710, a first address mapping relationship of a virtual address to an external physical address corresponding to the shared storage space and a second address mapping relationship of the virtual address to a memory address of the first storage space are established.

[0089] Step 720, when performing a computing task, the virtual address carried in a data access instruction is converted into an external physical address according to the first address mapping relationship, and the corresponding data is accessed according to the converted external physical address.

[0090] Step 730, the virtual address carried in a data access instruction is converted into a memory address according to the second address mapping relationship, and the corresponding data is accessed according to the converted memory address.

[0091] Step 740, an external access instruction sent by the host is received.

[0092] The external access instruction carries a to-be-accessed external physical address.

[0093] Step 750, any one or more of the second storage space and the shared storage space is accessed according to the to-be-accessed external physical address.

[0094] In this embodiment, the first address mapping relationship of the virtual address to the external physical address corresponding to the shared storage space and the second address mapping relationship of the virtual address to the memory address of the first storage space can be established, so that when performing a computing task, the virtual address carried in a data access instruction can be converted into an external physical address according to the first address mapping relationship, the virtual address carried in a data access instruction can be converted into a memory address according to the second address mapping relationship, and the corresponding data can be accessed according to the converted external physical address and memory address; and any one or more of the second storage space and the shared storage space can be accessed according to the to-be-accessed external physical address carried in an external access instruction. Not only the utilization rate of the storage space of the CXL module is improved, but also the memory access processing according to the virtual address can be realized without the operation system of the host, on the one hand, the response time of the CXL module and the host for cooperatively processing a task is shortened, which helps to improve the efficiency and reliability of the CXL module and the host for cooperatively processing a task; on the other hand, the conversion of the virtual address to the external physical address is realized by the CXL module instead of the host, which can reduce the load of the virtual memory manager of the host.

[0095] Referring to FIG. 8, FIG. 8 shows a flowchart of establishing a first address mapping relationship in one embodiment of the task processing method of the present disclosure. As shown in FIG. 8, the flow includes the following steps 810 to 840.

[0096] Step 810, receiving a first task allocation instruction sent by the host.

[0097] The first task allocation instruction includes the identifier of the to-be-allocated task, the first virtual address corresponding to the to-be-allocated task, and the size of the storage space required by the to-be-allocated task.

[0098] Step 820, determining the storage area corresponding to the to-be-allocated task in the shared storage space according to the first task allocation instruction, and determining the first address mapping table between the external physical address of the storage area and the first virtual address.

[0099] Step 830, determining the correspondence between the first address mapping table and the identifier of the to-be-allocated task.

[0100] Step 840, sending the first address mapping table to the host.

[0101] In this embodiment, the controller of the CXL module can process multiple computing tasks, and the first address mapping relationship includes the first address mapping table corresponding to each computing task. Through the flow shown in FIG. 8, a first address mapping table can be generated for each computing task according to the first task allocation instruction of the host. Here, the first task allocation instruction is used to instruct the controller to divide a storage area for the to-be-allocated task in the shared storage space and determine the first address mapping table. The CXL module and the host both store the first address mapping table corresponding to each computing task, so as to subsequently access the shared storage space according to the virtual address and the external physical address recorded in the first address mapping table.

[0102] Referring to FIG. 9, FIG. 9 shows a flowchart of establishing a second address mapping relationship in one embodiment of the task processing method of the present disclosure. As shown in FIG. 9, the flow includes the following steps 910 to 930.

[0103] Step 910, receiving a second task allocation instruction sent by the host.

[0104] The second task allocation instruction includes the identifier of the to-be-allocated task, the second virtual address corresponding to the to-be-allocated task, and the size of the storage space required by the to-be-allocated task.

[0105] Step 920, determining the storage area corresponding to the to-be-allocated task in the first storage space according to the second task allocation instruction, and determining the second address mapping table between the memory address of the storage area and the second virtual address.

[0106] Step 930, determining the correspondence between the second address mapping table and the identifier of the task to be allocated.

[0107] In this embodiment, the second address mapping relationship includes a second address mapping table corresponding to each computing task. Through the flow shown in FIG. 9, the controller can generate a second address mapping table for each computing task according to the second task allocation instruction of the host. Here, the second task allocation instruction is used to instruct the controller to divide a storage area for the task to be allocated in the first storage space, and to determine the second address mapping table. Subsequently, the controller can access the first storage space according to the virtual address and the memory address recorded in the second address mapping table corresponding to each computing task.

[0108] In combination with the flow shown in FIG. 8, each computing task can correspond to a first address mapping table and a second address mapping table at the same time, which facilitates the controller to manage the execution process of the computing task and the data storage of the processing result according to the virtual address, respectively.

[0109] Referring to FIG. 10, FIG. 10 shows a flowchart of another embodiment of the task processing method of the present disclosure. As shown in FIG. 10, the flow includes the following steps 1010 to 1050.

[0110] Step 1010, receiving a task execution instruction sent by the host.

[0111] The task execution instruction includes the identifier of the computing task to be executed.

[0112] Step 1020, determining, according to the identifier of the computing task to be executed, a target first address mapping table corresponding to the computing task to be executed in the first address mapping relationship, and determining, according to the identifier of the computing task to be executed, a target second address mapping table corresponding to the computing task to be executed in the second address mapping relationship.

[0113] Step 1030, searching for, in the target first address mapping table, an external physical address corresponding to the virtual address carried in the data access instruction.

[0114] Step 1040, searching for, in the target second address mapping table, a memory address corresponding to the virtual address carried in the data access instruction.

[0115] Step 1050, accessing the corresponding data according to the searched external physical address and memory address.

[0116] In this embodiment, the target first address mapping table and the target second address mapping table corresponding to the task to be executed can be determined according to the identifier of the task to be executed, so as to complete the conversion of the virtual address to the external physical address and the memory address. This helps to improve the processing efficiency of the controller in a multi-task scenario.

[0117] In some embodiments, the controller is further provided with a cache configured to store data in the shared storage space; and the step 720 can include: preferentially accessing data in the cache according to the external physical address obtained through the conversion; and in the case that the data to be accessed does not exist in the cache, translating the external physical address obtained through the conversion into a memory address and accessing data in the shared storage space according to the memory address.

[0118] In the embodiment, by configuring the cache to store data in the shared storage space and preferentially accessing data in the cache, the time consumption of the controller in accessing data in the shared storage space can be shortened, and the efficiency of internal data access of the CXL module can be improved.

[0119] In some embodiments, the cache is further configured to store data in the first storage space; and the step 730 can include: preferentially accessing data in the cache according to the memory address obtained through the conversion; and in the case that the data to be accessed does not exist in the cache, accessing data in the first storage space according to the memory address obtained through the conversion.

[0120] In the embodiment, by storing data in the first storage space in the cache and preferentially accessing data in the cache, the time consumption of the controller in accessing data in the first storage space can be shortened, and the efficiency of internal data access of the CXL module can be further improved.

[0121] Referring to FIG. 11, FIG. 11 shows a flowchart of terminating a task in an embodiment of the task processing method of the present disclosure. As shown in FIG. 11, the flow includes the following steps 1110-1140.

[0122] Step 1110, in response to receiving a task end instruction sent by a host, determining a first address mapping table and a second address mapping table corresponding to a task to be ended according to an identifier of the task to be ended carried in the task end instruction.

[0123] Step 1120, releasing storage space occupied by the task to be ended in a shared storage space according to an external physical address in the first address mapping table corresponding to the task to be ended.

[0124] Step 1130, releasing storage space occupied by the task to be ended in a first storage space according to a memory address in the second address mapping table corresponding to the task to be ended.

[0125] Step 1140, releasing storage space occupied by the first address mapping table and the second address mapping table corresponding to the task to be ended.

[0126] In this embodiment, the corresponding computing task can be terminated according to the task end instruction sent by the host, and the resources occupied by the computing task are released, for example, the data stored by the computing task in the shared storage space and the first storage space, and the storage resources occupied by the first address mapping table and the second address mapping table corresponding to the computing task, so that the utilization rate of the memory in the CXL module can be improved.

[0127] The embodiments of the present disclosure further provide a non-transitory computer storage medium, the computer storage medium storing a computer program, and the computer program is executed by a processor to implement the task processing method in the above embodiments.

[0128] The embodiments of the present disclosure further provide a computer system, as shown in FIG. 12, which includes a host 1210 and a CXL module 1220 in any of the above embodiments, the host 1210 communicates with the CXL module 1220 through a CXL interface to realize the discovery, configuration and data transmission of the CXL module 1220.

[0129] In this embodiment, the CXL module 1220 can manage the storage of the data involved in the computing task in the memory according to the virtual address, and when the host 1210 jointly executes the budget task, the CXL module 1220 can complete the conversion process of the virtual address internally, on the one hand, avoiding the conversion of the virtual address through the operating system of the host, which can shorten the task response time; on the other hand, based on the virtual address, the data storage of multiple tasks in the CXL module can be managed, which can avoid the mutual encroachment of the storage resources of multiple tasks.

[0130] Those of ordinary skill in the art will realize and understand that all or some of the steps in the methods disclosed above and the functional modules / units in the systems and devices can be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementation, the division between the functional modules / units referred to in the above description does not necessarily correspond to the division of physical components; for example, one physical component can have multiple functions, or one function or step can be performed by several physical components in cooperation. Some or all of the components can be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on computer-readable media, which can include computer storage media (or non-transitory media) and communication media (or transitory media). As is well known to those of ordinary skill in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and that can be accessed by a computer. Furthermore, it is common and well understood by those of ordinary skill in the art that communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and can include any information delivery media.

Claims

1. A CXL module, comprising a controller and a memory connected with the controller, the memory being provided with a shared storage space accessible by the controller and a host, a first storage space accessible only by the controller, and a second storage space accessible only by the host; The controller is configured to: establish a first address mapping relationship of a virtual address to an external physical address corresponding to the shared memory space; in executing a computing task, converting a virtual address carried in a data access instruction into an external physical address according to the first address mapping relationship, and accessing corresponding data according to the converted external physical address; establishing a second address mapping relationship of a virtual address to a memory address of the first storage space; in executing a computing task, converting a virtual address carried in a data access instruction into a memory address according to the second address mapping relationship, and accessing corresponding data according to the converted memory address; and receiving an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; and accessing any one or more of the second storage space and the shared storage space according to the to-be-accessed external physical address.

2. The CXL module of claim 1, wherein, The first address mapping relationship comprises a first address mapping table corresponding to each computing task. The controller is configured to establish a first address mapping relationship of a virtual address to a corresponding external physical address of the shared storage space, comprising: receiving a first task allocation instruction sent by the host, the first task allocation instruction comprising an identification of a to-be-allocated task, a first virtual address corresponding to the to-be-allocated task, and a size of a storage space required by the to-be-allocated task; determining a storage area corresponding to the to-be-allocated task in the shared storage space according to the first task allocation instruction, and determining a first address mapping table between an external physical address of the storage area and the first virtual address; determining a correspondence between the first address mapping table and the identification of the to-be-allocated task; and sending the first address mapping table to the host. The second address mapping relationship comprises a second address mapping table corresponding to each computing task.

3. The CXL module of claim 2, wherein, The controller is configured to establish a second address mapping relationship of a virtual address to a memory address of the first storage space, comprising: receiving a second task allocation instruction sent by the host, the second task allocation instruction comprising an identification of a to-be-allocated task, a second virtual address corresponding to the to-be-allocated task, and a size of a storage space required by the to-be-allocated task; determining a storage area corresponding to the to-be-allocated task in the first storage space according to the second task allocation instruction, and determining a second address mapping table between a memory address of the storage area and the second virtual address; and determining a correspondence between the second address mapping table and the identification of the to-be-allocated task. The controller is further configured to: receive a task execution instruction sent by the host, the task execution instruction comprising an identification of a to-be-executed computing task. ​ ​ 4. The CXL module of claim 3, wherein, ​ The controller is configured to convert the virtual address carried in the data access instruction into an external physical address according to the first address mapping relationship when performing a computing task, comprising: determining a target first address mapping table corresponding to the to-be-executed computing task in the first address mapping relationship according to the identification of the to-be-executed computing task; and searching for the external physical address corresponding to the virtual address carried in the data access instruction in the target first address mapping table. The controller is configured to convert the virtual address carried in the data access instruction into a memory address according to the second address mapping relationship when performing a computing task, comprising: determining a target second address mapping table corresponding to the to-be-executed computing task in the second address mapping relationship according to the identification of the to-be-executed computing task; and searching for the memory address corresponding to the virtual address carried in the data access instruction in the target second address mapping table.

5. The CXL module of claim 4, wherein, The controller is further provided with a cache configured to store data in the shared storage space. And, The controller is configured to access corresponding data according to the converted external physical address, comprising: the controller preferentially accesses data in the cache according to the converted external physical address; When the to-be-accessed data does not exist in the cache, the controller translates the converted external physical address into a memory address, and accesses data in the shared storage space according to the memory address.

6. The CXL module of claim 5, wherein, The cache is further configured to store data in the first storage space. And, The controller is configured to access corresponding data according to the converted memory address, comprising: the controller preferentially accesses data in the cache according to the converted memory address; When the to-be-accessed data does not exist in the cache, the controller accesses data in the first storage space according to the converted memory address.

7. The CXL module of claim 3, wherein, The controller is further configured to: in response to receiving a task end instruction sent by a host, determine a first address mapping table and a second address mapping table corresponding to a to-be-ended task according to the identification of the to-be-ended task carried in the task end instruction; release the storage space occupied by the to-be-ended task in the shared storage space according to the external physical address in the first address mapping table corresponding to the to-be-ended task; Release the storage space occupied by the to-be-ended task in the first storage space according to the memory address in the second address mapping table corresponding to the to-be-ended task; Release the storage space occupied by the first address mapping table and the second address mapping table corresponding to the to-be-ended task.

8. The CXL module of any one of claims 1 to 7, further comprising a flash memory; and the controller is further configured to: replace cold data in the memory into the flash memory, and record the correspondence between the external physical address and the flash memory address of the cold data.

9. A controller applied to the CXL module of any one of claims 1 to 8, the CXL module comprising a memory connected with the controller, the memory being provided with a shared storage space allowing the controller and a host to access, a first storage space allowing only the controller to access, and a second storage space allowing only the host to access, the controller comprising a processor and a virtual memory manager; wherein the virtual memory manager is configured to: convert a virtual address carried in a data access instruction into an external physical address according to a first address mapping relationship of the virtual address to an external physical address corresponding to the shared storage space; and convert the virtual address in the data access instruction into a memory address according to a second address mapping relationship of the virtual address to a memory address of the first storage space; the processor is configured to: establish the first address mapping relationship; access corresponding data according to the external physical address converted by the virtual memory manager when performing a computing task; establish the second address mapping relationship; and access corresponding data according to the memory address converted by the virtual memory manager when performing the computing task; receive an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; and access any one or more of the second storage space and the shared storage space according to the to-be-accessed external physical address. The first address mapping relationship comprises a first address mapping table corresponding to each computing task; and The processor is configured to establish the first address mapping relationship, including: the processor receives a first task allocation instruction sent by the host, the first task allocation instruction comprising an identifier of a to-be-allocated task, a first virtual address corresponding to the to-be-allocated task, and a size of a storage space required by the to-be-allocated task; the processor determines a storage area corresponding to the to-be-allocated task in the shared storage space and determines a first address mapping table between an external physical address of the storage area and the first virtual address according to the first task allocation instruction; determines a correspondence between the first address mapping table and the identifier of the to-be-allocated task; and sends the first address mapping table to the host. The second address mapping relationship comprises a second address mapping table corresponding to each computing task; and The processor is configured to establish the second address mapping relationship, including: the processor receives a second task allocation instruction sent by the host, the second task allocation instruction comprising the identifier of the to-be-allocated task, a second virtual address corresponding to the to-be-allocated task, and the size of the storage space required by the to-be-allocated task; the processor determines a storage area corresponding to the to-be-allocated task in the first storage space and determines a second address mapping table between a memory address of the storage area and the second virtual address according to the second task allocation instruction; and determines a correspondence between the second address mapping table and the identifier of the to-be-allocated task. ​ 10. The controller of claim 9, wherein, ​ ​ ​ ​ 11. The controller of claim 10, wherein, ​ ​ 12. The controller of claim 11, wherein, The processor is further configured to: receive a task execution instruction sent by the host, the task execution instruction comprising an identification of a to-be-executed computing task; determine, according to the identification of the to-be-executed computing task, a target first address mapping table corresponding to the to-be-executed computing task in the first address mapping relationship, and a target second address mapping table corresponding to the to-be-executed computing task in the second address mapping relationship; The virtual memory manager is configured to convert a virtual address carried in a data access instruction into an external physical address according to a first address mapping relationship of the virtual address to an external physical address corresponding to the shared storage space, comprising: searching for, in the target first address mapping table, an external physical address corresponding to the virtual address carried in the data access instruction; The virtual memory manager is configured to convert a virtual address carried in a data access instruction into a memory address according to the second address mapping relationship, comprising: searching for, in the target second address mapping table, a memory address corresponding to the virtual address carried in the data access instruction.

13. The controller of claim 12, further provided with a cache and an address translator, the cache being arranged to store data in the shared memory space; the address translator being configured to translate external physical addresses to memory addresses; And, The processor is configured to access corresponding data according to the external physical address converted by the virtual memory manager, comprising: The processor accesses data in the cache in priority according to the converted external physical address; When the to-be-accessed data does not exist in the cache, the processor sends the converted external physical address to the address translator, and accesses data in the shared storage space according to a memory address translated by the address translator.

14. The controller of claim 13, wherein, The cache is further configured to store data in the first storage space; And, The processor is configured to access corresponding data according to the memory address converted by the virtual memory manager, comprising: the processor accesses data in the cache in priority according to the converted memory address; When the to-be-accessed data does not exist in the cache, the processor accesses data in the first storage space according to the converted memory address.

15. The controller of claim 11, wherein, The processor is further configured to: in response to receiving a task end instruction sent by the host, determine, according to an identification of a to-be-ended task carried in the task end instruction, a first address mapping table and a second address mapping table corresponding to the to-be-ended task; release storage space occupied by the to-be-ended task in the shared storage space according to an external physical address in the first address mapping table corresponding to the to-be-ended task; Release storage space occupied by the to-be-ended task in the first storage space according to a memory address in the second address mapping table corresponding to the to-be-ended task; Release storage space occupied by the first address mapping table and the second address mapping table corresponding to the to-be-ended task.

16. The controller of one of claims 9 to 15, wherein, The CXL module further comprises a flash memory; and the processor is further configured to: replace cold data in the memory into the flash memory, and record a correspondence between an external physical address and a flash memory address of the cold data.

17. A task processing method applied to the CXL module of any one of claims 1 to 8, the CXL module comprising a controller and a memory connected to the controller, the memory being provided with a shared storage space accessible by the controller and a host, a first storage space accessible only by the controller, and a second storage space accessible only by the host, the method comprising: establishing a first address mapping relationship of a virtual address to an external physical address corresponding to the shared storage space, and a second address mapping relationship of a virtual address to a memory address of the first storage space; in executing a computing task, converting a virtual address carried in a data access instruction into an external physical address according to the first address mapping relationship, and accessing corresponding data according to the converted external physical address; converting a virtual address carried in a data access instruction into a memory address according to the second address mapping relationship, and accessing corresponding data according to the converted memory address; and receiving an external access instruction sent by the host, the external access instruction carrying a to-be-accessed external physical address; accessing any one or more of the second storage space and the shared storage space according to the to-be-accessed external physical address.

18. The method of claim 17, wherein, the first address mapping relationship comprises a first address mapping table corresponding to each computing task; and the establishing of the first address mapping relationship of a virtual address to an external physical address corresponding to the shared storage space comprises: receiving a first task allocation instruction sent by the host, the first task allocation instruction including an identification of a to-be-allocated task, a first virtual address corresponding to the to-be-allocated task, and a size of a storage space required by the to-be-allocated task; determining a storage area corresponding to the to-be-allocated task in the shared storage space according to the first task allocation instruction, and determining a first address mapping table between an external physical address of the storage area and the first virtual address; determining a correspondence between the first address mapping table and the identification of the to-be-allocated task; and sending the first address mapping table to the host.

19. The method of claim 18, wherein, the second address mapping relationship comprises a second address mapping table corresponding to each computing task; and the establishing of the second address mapping relationship of a virtual address to a memory address of the first storage space comprises: receiving a second task allocation instruction sent by the host, the second task allocation instruction including the identification of the to-be-allocated task, a second virtual address corresponding to the to-be-allocated task, and the size of the storage space required by the to-be-allocated task; determining a storage area corresponding to the to-be-allocated task in the first storage space according to the second task allocation instruction, and determining a second address mapping table between a memory address of the storage area and the second virtual address; and determining a correspondence between the second address mapping table and the identification of the to-be-allocated task.

20. The method of claim 19, before performing the compute task, the method further comprising: receiving a task execution instruction sent by the host, the task execution instruction including an identification of a to-be-executed computing task; According to the identification of the to-be-executed computing task, a target first address mapping table corresponding to the to-be-executed computing task is determined in the first address mapping relationship, and a target second address mapping table corresponding to the to-be-executed computing task is determined in the second address mapping relationship; According to the first address mapping relationship, the virtual address carried in the data access instruction is converted into an external physical address in the process of executing the computing task, which includes: searching for the external physical address corresponding to the virtual address carried in the data access instruction in the target first address mapping table; According to the second address mapping relationship, the virtual address carried in the data access instruction is converted into a memory address in the process of executing the computing task, which includes: searching for the memory address corresponding to the virtual address carried in the data access instruction in the target second address mapping table. The controller is further provided with a cache configured to store data in the shared storage space; 21. The method of claim 20, wherein, And, According to the converted external physical address, the corresponding data is accessed preferentially in the cache; In the case that the to-be-accessed data does not exist in the cache, the converted external physical address is translated into a memory address, and the data in the shared storage space is accessed according to the memory address. The cache is further configured to store data in the first storage space; 22. The method of claim 21, wherein, And, According to the converted memory address, the corresponding data is accessed preferentially in the cache; In the case that the to-be-accessed data does not exist in the cache, the data in the first storage space is accessed according to the converted memory address. In response to receiving a task end instruction sent by a host, according to the identification of the to-be-ended task carried in the task end instruction, a first address mapping table and a second address mapping table corresponding to the to-be-ended task are determined; according to the external physical address in the first address mapping table corresponding to the to-be-ended task, the storage space occupied by the to-be-ended task in the shared storage space is released; 23. The method of one of claims 19 to 22, further comprising: According to the memory address in the second address mapping table corresponding to the to-be-ended task, the storage space occupied by the to-be-ended task in the first storage space is released; The storage space occupied by the first address mapping table and the second address mapping table corresponding to the to-be-ended task is released.

24. A non-transitory computer storage medium, the computer storage medium storing a computer program, the computer program being executed by a processor to implement the task processing method according to any one of claims 17 to 23.

25. A computer system comprising a host and a CXL module according to any one of claims 1 to 8, the host communicating with the CXL module through a CXL interface to realize discovery, configuration and data transmission of the CXL module. ​

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