Smart contract compilation method and apparatus, terminal device and storage medium

Abstract

The present application is applicable to the technical field of blockchains, and provides a smart contract compilation method and apparatus, a terminal device and a storage medium. The compilation method comprises: on the basis of a plurality of IR instructions and the current compilation auxiliary stack, performing instruction compilation in a register on a plurality of stack variables corresponding to each IR instruction, so as to generate assembly instructions, the register being one of an empty register and a register corresponding to a register stack element within the current compilation auxiliary stack, and the plurality of IR instructions being obtained by compiling bytecodes of the current smart contract to be compiled; and compiling the assembly instructions into corresponding machine codes, wherein if the register is an empty register, stack variables in another register are transferred to a memory, so that the another register is converted into an empty register. The solution can improve machine code execution efficiency.

Description

Smart contract compiling method and device, terminal equipment and storage medium TECHNICAL FIELD

[0001] The present application belongs to the technical field of blockchains, and in particular relates to a smart contract compiling method and device, terminal equipment and storage medium. BACKGROUND

[0002] A smart contract is an automated contract based on blockchain technology, which can execute contract terms without intermediaries and ensure the rights and interests of all parties to the contract. The compilation of a smart contract is mainly to convert the bytecode corresponding to the smart contract into machine code. However, the machine code obtained by the existing compilation method has the problem of low execution efficiency, which needs to be solved urgently. TECHNICAL PROBLEM

[0003] The purpose of the embodiments of the present application is to provide a smart contract compiling method and device, terminal equipment and storage medium, which aims to improve the execution efficiency of machine code. TECHNICAL SOLUTION

[0004] To solve the above technical problems, the technical solution adopted by the embodiments of the present application is:

[0005] In a first aspect, the embodiments of the present application provide a smart contract compiling method, which comprises:

[0006] According to a plurality of IR instructions and a current compilation auxiliary stack, a plurality of stack variables corresponding to each IR instruction are placed in a corresponding register for instruction compilation to generate an assembly instruction; the register is one of a null register and a register stack element corresponding register in the current compilation auxiliary stack, and the plurality of IR instructions are obtained by compiling the bytecode of the current smart contract to be compiled;

[0007] The assembly instruction is compiled into corresponding machine code; wherein if the register is the null register, the stack variables in another register are transferred to the memory to convert the other register into a null register.

[0008] In an optional implementation of the first aspect, the IR instruction includes an arithmetic instruction, and correspondingly, the placing of a plurality of stack variables corresponding to each IR instruction in a corresponding register for instruction compilation to generate an assembly instruction according to a plurality of IR instructions and a current compilation auxiliary stack comprises:

[0009] According to the arithmetic instruction, a plurality of to-be-operated stack elements are taken out from the current compilation auxiliary stack, an operation is performed on the stack variables corresponding to the plurality of to-be-operated stack elements to obtain an operation result;

[0010] store the operation result into the corresponding register, generate a corresponding register stack element, and write the plurality of register stack elements into the top of the compilation auxiliary stack;

[0011] generate an assembly instruction according to the operation operation and the register.

[0012] In an optional implementation of the first aspect, the IR instruction includes an immediate number write instruction and an arithmetic instruction. Correspondingly, the instruction compilation of placing a plurality of stack variables corresponding to each IR instruction into a corresponding register according to a plurality of IR instructions and a current compilation auxiliary stack to generate an assembly instruction includes:

[0013] store the constant value corresponding to the immediate number write instruction into a plurality of constant stack elements, and write the plurality of constant stack elements into the top of the compilation auxiliary stack;

[0014] perform an operation operation on the stack variables corresponding to the plurality of to-be-operated stack elements in the compilation auxiliary stack according to the arithmetic instruction to obtain an operation result;

[0015] store the operation result into the corresponding register, generate a corresponding register stack element, and write the plurality of register stack elements into the top of the compilation auxiliary stack;

[0016] generate an assembly instruction according to the operation operation and the register.

[0017] In an optional implementation of the first aspect, the IR instruction includes an immediate number write instruction and an arithmetic instruction. Correspondingly, the instruction compilation of placing a plurality of stack variables corresponding to each IR instruction into a corresponding register according to a plurality of IR instructions and a current compilation auxiliary stack to generate an assembly instruction includes:

[0018] store the constant value corresponding to the immediate number write instruction into a plurality of register stack elements, and write the plurality of register stack elements into the top of the compilation auxiliary stack;

[0019] perform an operation operation on the stack variables corresponding to the plurality of to-be-operated stack elements in the compilation auxiliary stack according to the arithmetic instruction to obtain an operation result;

[0020] store the operation result into the corresponding register, generate a corresponding register stack element, and write the plurality of register stack elements into the top of the compilation auxiliary stack;

[0021] generate an assembly instruction according to the operation operation and the register.

[0022] In an optional implementation of the first aspect, the operation of performing an operation operation on the stack variables corresponding to the plurality of to-be-operated stack elements in the compilation auxiliary stack according to the arithmetic instruction to obtain an operation result includes:

[0023] If the arithmetic instruction corresponds to an assembly instruction of one operand, a plurality of to-be-operated stack elements are taken out from the compiling auxiliary stack, a first operation operation is performed on the corresponding stack variable to obtain an operation result;

[0024] If the arithmetic instruction corresponds to an assembly instruction of two operands, a plurality of to-be-operated stack elements are taken out from the compiling auxiliary stack, a second operation operation is performed on the corresponding stack variable to obtain an operation result.

[0025] In an optional implementation of the first aspect, if the arithmetic instruction corresponds to an assembly instruction of one operand, the operation result is stored in a corresponding register, including:

[0026] If the to-be-operated stack element is a constant stack element, an empty register is applied, and the operation result is stored in the empty register;

[0027] If the to-be-operated stack element is a register stack element, the operation result is stored in a register corresponding to the register stack element;

[0028] If the to-be-operated stack element is a memory stack element, an empty register is applied, and the operation result is stored in the empty register.

[0029] In an optional implementation of the first aspect, if the arithmetic instruction corresponds to an assembly instruction of two operands, the plurality of operation results are stored in corresponding registers, including:

[0030] If both operands are register stack elements, the operation result is stored in a register corresponding to one of the register stack elements;

[0031] If one operand is a register stack element and the other operand is a constant stack element, the operation result is stored in a register corresponding to the register stack element;

[0032] If one operand is a register stack element and the other operand is a memory stack element, the operation result is stored in a register corresponding to the register stack element;

[0033] If both operands are memory stack elements or constant stack elements, an empty register is applied, and the operation result is stored in the empty register.

[0034] In a second aspect, an embodiment of the present application provides a compiling device of a smart contract, the compiling device of the smart contract including:

[0035] The first compiling module is configured to place a plurality of stack variables corresponding to each IR instruction in a corresponding register for instruction compiling to generate an assembly instruction, wherein the register is one of a null register and a register corresponding to a register stack element in the current compiling auxiliary stack, and the plurality of IR instructions are obtained by compiling bytecode of the smart contract currently to be compiled;

[0036] The second compiling module is configured to compile the assembly instruction into a corresponding machine code, wherein if the register is the null register, the stack variables in another register are transferred to the memory to convert the another register into the null register.

[0037] In a third aspect, an embodiment of the present application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the steps of any optional mode of the first aspect when executing the computer program.

[0038] In a fourth aspect, an embodiment of the present application provides a computer readable storage medium, which stores a computer program, and the computer program is executable by a processor to implement the steps of any optional mode of the first aspect.

[0039] In a fifth aspect, an embodiment of the present application provides a computer program product, which, when running on a terminal device, causes the terminal device to perform the steps of any optional mode of the first aspect.

[0040] The smart contract compiling method, device, terminal device and storage medium provided by the embodiment of the present application have the following beneficial effects:

[0041] The smart contract compiling method, device, terminal device and storage medium provided by the embodiment of the present application place a plurality of stack variables corresponding to each IR instruction in a register for instruction compiling, and for the case where there is no null register, the embodiment transfers the stack variables in a register to the memory to convert the register into a null register, so that there is a null register for use in the compiling process, and since the reading speed of the register data is faster than the reading speed of the memory data, the execution efficiency of the machine code can be improved. BRIEF DESCRIPTION OF DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or exemplary technical descriptions. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor based on these drawings.

[0043] FIG. 1 is a flowchart of a compiling method of a smart contract according to an embodiment of the present application;

[0044] FIG. 2 is a flowchart of a compiling method of a smart contract according to another embodiment of the present application;

[0045] FIG. 3 is a structural diagram of a compiling auxiliary stack according to an embodiment of the present application;

[0046] FIG. 4 is a flowchart of a compiling method of a smart contract according to a further embodiment of the present application;

[0047] FIG. 5 is a structural diagram of a compiling auxiliary stack according to another embodiment of the present application;

[0048] FIG. 6 is a flowchart of a compiling method of a smart contract according to a still further embodiment of the present application;

[0049] FIG. 7 is a structural diagram of a compiling auxiliary stack according to a further embodiment of the present application;

[0050] FIG. 8 is a structural diagram of a compiling device of a smart contract according to an embodiment of the present application;

[0051] FIG. 9 is a structural diagram of a terminal device according to an embodiment of the present application. Embodiments of the present application

[0052] In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application can be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

[0053] It is to be understood that the terminology "includes", "has", "holds", "contains" and / or "comprising", when used in this specification and in the following claims, indicates the presence of the described features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0054] It is also to be understood that the terminology "and / or" when used in this specification and in the following claims, refers to at least one of the items, or any combination of one or more of the items, and includes all possible combinations of one or more of the items.

[0055] As used in the description of the application and the appended claims, the term “if’ can be interpreted to mean “when” or “upon” or “in response to determining” or “in response to detecting” depending on the context. Similarly, the phrase “if it is determined” or “if [a described condition or event] is detected” can be interpreted to mean “upon determining” or “in response to determining” or “upon detecting [the described condition or event]” or “in response to detecting [the described condition or event]”, depending on the context.

[0056] In addition, in the description of the application and the appended claims, the terms “first”, “second”, “third”, etc. are used only to distinguish descriptions, and cannot be understood as indicating or implying relative importance.

[0057] Reference in the specification to “one embodiment” or “some embodiments” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrases “in one embodiment”, “in some embodiments”, “in other embodiments”, “in additional embodiments”, etc. in various places in the specification are not necessarily all referring to the same embodiment, although they can. The terms “comprising”, “including”, “having” and their variants mean “including but not limited to”, unless otherwise expressly specified.

[0058] It should be understood that the size of the serial number of each step in the embodiments does not mean the order of execution, and the execution order of each process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the application.

[0059] A smart contract is an automated contract based on blockchain technology, which can execute contract terms without intermediaries and ensure the rights and interests of all parties to the contract. A smart contract can be regarded as a piece of computer code written in a programming language, which is deployed on a blockchain and can automatically execute the contract rules defined therein. In a smart contract, the source code is compiled to generate bytecode, which is then executed by the Ethereum Virtual Machine (EVM). Bytecode is a series of hexadecimal values, each value representing an operation code, each operation code representing an instruction, which is executed by the virtual machine according to the instructions in the bytecode, thereby implementing the functions of the smart contract. To further optimize execution efficiency, some blockchains use AOT, JIT and other compilers to compile contract bytecode into machine code for execution. Machine code is a binary instruction that can be directly executed by a computer, and is usually composed of operation code and address code. The operation code indicates the operation to be performed by the instruction, i.e. the function of the instruction, and the address code indicates the objects participating in the operation and the location where the operation result is stored.

[0060] The existing machine code compiling process is as follows:

[0061] Step 1) The compiler parses the bytecode and compiles the contract bytecode into corresponding IR instructions;

[0062] Step 2) The IR instructions are converted into assembly code instructions;

[0063] Step 3) The assembly code instructions are compiled into machine code.

[0064] In the above step 2), the IR instruction needs to query the idle register. If there is an empty register, the register is bound to the IR instruction, and the value corresponding to the IR instruction is stored in the corresponding register. Subsequently, the compilation is performed according to the operation register mode. If there is no empty register, the value corresponding to the IR instruction is stored in the memory, and the subsequent compilation is performed according to the stack memory mode. However, if there are many IR instructions, the registers will be bound by the previous IR instructions, resulting in no empty register available for the compilation of subsequent other IR instructions, which can only be compiled according to the stack memory mode. Since the reading speed of the memory is slower than that of the register, the execution efficiency of the machine code obtained by this part of the compilation is low. In addition, the smart contract includes multiple languages. The operands of languages such as Java, Rust, and C++ are usually 64 bits, and the operand of the Solidity language is 256 bits. Taking the Solidity language as an example, the bit number of the current mainstream computer is 64 bits, and one operand needs to occupy 4 registers. Therefore, the empty registers are quickly used up, so that the subsequent IR instructions can only be compiled according to the stack memory mode, further reducing the execution efficiency of the machine code.

[0065] To solve the above problems, the present application provides a smart contract compiling method, device, terminal equipment and storage medium. The present application places multiple stack variables corresponding to each IR instruction in a register for instruction compilation. For the case where there is no empty register, the present application transfers the stack variables in a register to the memory, so that the register is converted into an empty register. Therefore, there are always empty registers available for use during the compilation process. Since the reading speed of the register data is faster than that of the memory data, the execution efficiency of the machine code can be improved.

[0066] In order to illustrate the technical solutions of the present application, specific embodiments are described below.

[0067] FIG. 1 shows a flowchart of a smart contract compiling method according to an embodiment of the present application. Referring to FIG. 1, the smart contract compiling method according to an embodiment of the present application includes the following steps:

[0068] Step S101: according to a plurality of IR instructions and a current compilation auxiliary stack, a plurality of stack variables corresponding to each IR instruction is placed in a corresponding register for instruction compilation to generate an assembly instruction; the register is one of a null register and a register corresponding to a register stack element in the current compilation auxiliary stack, and the plurality of IR instructions are obtained by compiling a bytecode of the smart contract currently to be compiled;

[0069] Step S102: the assembly instruction is compiled into a corresponding machine code; wherein if the register is the null register, the stack variable in another register is transferred to the memory to convert the another register into the null register.

[0070] It can be seen that in step S101 of the embodiment of the present application, a plurality of stack variables corresponding to each IR instruction is placed in a corresponding register for instruction compilation to generate an assembly instruction, and then the assembly instruction is compiled in step S102 to obtain a corresponding machine code. In step S101, the register is one of a null register and a register corresponding to a register stack element in the current compilation auxiliary stack. If the null register is selected, the stack variable in a used register is transferred to the memory to convert the register into the null register, so that the null register can be continuously used in the compilation process, thereby improving the execution efficiency of the subsequent machine code.

[0071] It should be noted that the register is a high-speed storage area in the CPU (central processing unit) for temporarily storing data and instructions, and has a faster read-write speed than the main memory, which can enable the CPU to more effectively process data and execute instructions.

[0072] In addition, it should be noted that since the bytecode execution of the smart contract is based on a stack, a stack is needed to simulate the execution process during the compilation process. Therefore, the present application sets a compilation auxiliary stack, which stores information of elements in the stack when executing a certain instruction. The present application sets the compilation auxiliary stack to include the following three types of stack elements: 1) memory stack element: the value of the stack variable is stored in a specified memory, and the memory location information is recorded in the memory stack element; 2) register stack element: the value of the stack variable is stored in a specified register, and the register name information is recorded in the register stack element; 3) constant stack element: the value of the stack variable has not been stored anywhere, and the constant value of the stack variable is recorded in the constant stack element, which can be directly written into the assembly instruction in the compilation phase. In the present application, each IR instruction corresponds to a plurality of stack variables, and each stack variable corresponds to a stack element in the current compilation auxiliary stack, so that each IR instruction is bound to a plurality of stack elements in the current compilation stack.

[0073] It should be noted that the register in step S101 is selected from one of the empty register and the register corresponding to the register stack element in the current compilation auxiliary stack, and the specific selection can include the following cases:

[0074] 1) Selecting the empty register: if there is an idle empty register, the empty register is put into use; if there is no idle empty register, the stack variable in a used register is transferred to the memory, so that the register is converted into an empty register for use;

[0075] 2) Selecting the register corresponding to the register stack element in the current compilation auxiliary stack: if the IR instruction currently participating in the compilation is bound with the register stack element in the current compilation auxiliary stack, the register corresponding to the register stack element is selected for use; if there is no register stack element, a register stack element is selected in the current compilation auxiliary stack, the stack variable in the register corresponding to the selected register stack element is transferred to the memory, and the register is released for use in the next step.

[0076] Specifically, in an embodiment that can be implemented in the present application, the register in step S101 is selected from one of the empty register and the register corresponding to the register stack element in the current compilation auxiliary stack, if the empty register is selected, an unused register is searched first, and the unused register is used as the empty register, if no unused register is found, the stack variable in a used register is transferred to the memory, so that the register is converted into an empty register.

[0077] In the above embodiment, a used register needs to be selected to be converted into an empty register, and correspondingly, the selection of the used register can be performed in the following manner: 1) starting from the bottom of the current compilation auxiliary stack and searching for the first register stack element in the top direction, the register bound with the register stack element is determined as the used register for subsequent conversion; 2) starting from the top of the current compilation auxiliary stack and searching for the first register stack element in the bottom direction, the register bound with the register stack element is determined as the used register for subsequent conversion.

[0078] In another embodiment that can be implemented in the present application, the register in step S101 is selected from one of the empty register and the register corresponding to the register stack element in the current compilation auxiliary stack, if the register corresponding to the register stack element in the current compilation auxiliary stack is selected, it is needed to search whether the IR instruction currently participating in the compilation is bound with the register stack element in the current compilation auxiliary stack, if yes, the result after the compilation is stored in the register corresponding to the register stack element, if no, a register stack element is selected in the current compilation auxiliary stack, the stack variable in the register corresponding to the selected register stack element is transferred to the memory, and the register is released for use in the next step.

[0079] In the above embodiment, the register stack element in the current compilation auxiliary stack can be selected in the following ways: 1) randomly selecting a register stack element in the current compilation auxiliary stack; 2) starting from the bottom of the current compilation auxiliary stack and searching in the direction of the top, and selecting the first register stack element found; 3) starting from the top of the current compilation auxiliary stack and searching in the direction of the bottom, and selecting the first register stack element found.

[0080] The step S101 will be described in detail below.

[0081] The IR instruction in the step S101 refers to an intermediate form of instruction set created by the compiler before the bytecode is converted into machine code. The IR instruction can include immediate number write instruction and arithmetic instruction. The compilation of the IR instruction in the present application is mainly for the above two types of IR instructions. Since the compilation methods of different instructions are different, they will be described in detail below.

[0082] FIG. 2 shows a flowchart of a second method for compiling a smart contract according to an embodiment of the present application. If the IR instruction in the embodiment of the present application includes an arithmetic instruction, the step S101 specifically includes the following steps:

[0083] Step S201: According to the arithmetic instruction, a plurality of to-be-operated stack elements are taken out from the current compilation auxiliary stack, an operation operation is performed on the stack variables corresponding to the plurality of to-be-operated stack elements, and an operation result is obtained;

[0084] Step S202: The operation result is stored in the corresponding register, a corresponding register stack element is generated, and the plurality of register stack elements are written into the top of the compilation auxiliary stack;

[0085] Step S203: According to the operation operation and the register, an assembly instruction is generated.

[0086] In the above step S201, the stack elements participating in the operation are taken out from the compilation auxiliary stack according to the arithmetic instruction, the operation operation is performed to obtain the operation result, and the operation result is stored in the corresponding register in the step S202, so that the subsequent operation can directly access the register without reading from other slow memory, thereby preparing for generating the assembly instruction in the step S203. The assembly instruction is generated according to the operation operation in the step S202 and the register storing the operation result.

[0087] It should be noted that the arithmetic instruction can be an instruction such as ADD, SUB, MUL, etc. that performs operations on stack elements. Usually, several operands are read from the stack, and after the operation, the operation result is written back to the top of the stack.

[0088] Taking the ADD instruction as an example, the current compilation auxiliary stack is shown in FIG. 3. According to the ADD instruction, 8 stack elements to be operated are taken out from the compilation auxiliary stack, two-by-two addition operation is performed, 4 operation results are obtained, and the 4 operation results are respectively stored in 4 registers to generate 4 register stack elements which are re-stored at the top of the stack. According to the operation and the registers, the assembly instruction is generated.

[0089] The above steps show the compilation process of the arithmetic instruction in the IR instruction. By using the compilation auxiliary stack and the registers, the arithmetic operation can be efficiently processed, and the optimized machine code can be generated.

[0090] FIG. 4 shows a third flowchart of a compilation method of a smart contract according to an embodiment of the present application. If the IR instruction in the embodiment of the present application includes an immediate write instruction and an arithmetic instruction, the step S101 specifically includes the following steps:

[0091] Step S301: storing a constant value corresponding to the immediate write instruction into a plurality of constant stack elements, and writing the plurality of constant stack elements at the top of a compilation auxiliary stack;

[0092] Step S302: performing an operation on a plurality of stack variables corresponding to a plurality of stack elements to be operated in the compilation auxiliary stack according to the arithmetic instruction to obtain an operation result;

[0093] Step S303: storing the operation result in a corresponding register to generate a register stack element, and writing the plurality of register stack elements at the top of the compilation auxiliary stack;

[0094] Step S304: generating an assembly instruction according to the operation and the register.

[0095] The step S301 stores the constant value corresponding to the immediate write instruction into the plurality of constant stack elements and writes the plurality of constant stack elements at the top of the compilation auxiliary stack, so that subsequent instructions can access them. In step S302, the stack elements participating in the operation are taken out from the compilation auxiliary stack according to the arithmetic instruction, the operation is performed to obtain the operation result. In step S303, the operation result is stored in the corresponding register, so that subsequent operations can directly access the register without reading from other slow memories, thereby preparing for generating the assembly instruction. In step S304, the assembly instruction is generated according to the operation in step S302 and the register storing the operation result in step S303.

[0096] The immediate write instruction generally refers to the PUSH instruction in the EVM, which is to write an immediate constant value to the top of the stack.

[0097] For example, the current compilation auxiliary stack is shown in FIG. 5. First, the PUSH instruction is compiled. Since the immediate number after the PUSH instruction is known to be 256 bits, and the number of bits of the stack element of the compilation auxiliary stack is the same as the number of bits of the target machine code, which is usually 64 bits, the immediate number constant value corresponding to the PUSH instruction is stored in four 64-bit constant stack elements, and the four constant stack elements are written to the top of the compilation auxiliary stack. The updated compilation auxiliary stack is shown in FIG. 3. Then, the ADD instruction is compiled. Eight stack elements to be operated are taken out from the compilation auxiliary stack, and a pair of them are added to obtain four operation results, which are respectively stored in four registers. According to the operation and the registers, the assembly instruction is generated.

[0098] Compared with the prior art of directly storing the constant value into the register, the register is quickly used up, and the instruction data can only be stored into the memory, so that the corresponding instruction data needs to be read from the memory during the compilation process, thereby causing the execution efficiency of the machine code to be reduced. The above embodiment of the present application can improve the use efficiency of the register by first storing the constant value into the constant stack element and then storing the operation result into the register after operation, avoid the shortage of available registers from causing contention for other stack element registers, and quickly read the corresponding value from the required register during the compilation, thereby improving the execution efficiency of the machine code.

[0099] If the IR instruction in the embodiment of the present application includes an immediate number write instruction and an arithmetic instruction, FIG. 6 shows a fourth flowchart of a compilation method of a smart contract according to an embodiment of the present application. Correspondingly, step S101 specifically includes the following steps:

[0100] Step S401: storing a constant value corresponding to the immediate number write instruction into a plurality of register stack elements, and writing the plurality of register stack elements to the top of the compilation auxiliary stack;

[0101] Step S402: performing an operation on a plurality of stack variables corresponding to a plurality of stack elements to be operated in the compilation auxiliary stack according to the arithmetic instruction, to obtain an operation result;

[0102] Step S403: storing the operation result into a corresponding register, generating a corresponding register stack element, and writing the plurality of register stack elements to the top of the compilation auxiliary stack;

[0103] Step S404: generating an assembly instruction according to the operation and the register.

[0104] The step S401 writes the immediate number corresponding to the instruction into the constant value of a plurality of register stack elements and the top of the compilation auxiliary stack, so that subsequent instructions can access them. The step S402 takes the stack elements participating in the operation from the compilation auxiliary stack according to the arithmetic instruction, performs the operation to obtain the operation result, and the step S403 stores the operation result in the corresponding register, so that subsequent operations can directly access the register without reading from other slow memory, preparing for generating the assembly instruction. The step S404 generates the assembly instruction according to the operation in the step S402 and the register storing the operation result in the step S403.

[0105] For example, first, the PUSH instruction is compiled, the immediate number constant value corresponding to the PUSH instruction is stored in 4 64-bit register stack elements, and the 4 register stack elements are written into the top of the compilation auxiliary stack. Then, the ADD instruction is compiled, 8 stack elements to be operated are taken from the compilation auxiliary stack, pairwise addition operation is performed to obtain 4 operation results, which are respectively stored in 4 registers, and the assembly instruction is generated according to the operation and the register.

[0106] It should be noted that the above-mentioned immediate number corresponding to the constant value of the instruction is directly stored in a plurality of register stack elements, so that subsequent operations can directly store the operation result in the register corresponding to the register stack element, without further searching for an empty register, thereby improving the efficiency of instruction compilation.

[0107] In the embodiments that can be implemented in the present application, when the IR instruction is compiled into an assembly instruction, the assembly instruction corresponding to the arithmetic instruction is selected in advance, which is usually an assembly instruction with 1 or 2 operands. Correspondingly, the above-mentioned step of performing an operation on the stack variables corresponding to the plurality of to-be-operated stack elements in the compilation auxiliary stack to obtain a plurality of operation results can specifically include the following steps:

[0108] Step S501: If the arithmetic instruction corresponds to an assembly instruction with one operand, a plurality of to-be-operated stack elements are taken from the compilation auxiliary stack, a first operation is performed on the corresponding stack variables to obtain an operation result;

[0109] Step S502: If the arithmetic instruction corresponds to an assembly instruction with two operands, a plurality of to-be-operated stack elements are taken from the compilation auxiliary stack, a second operation is performed on the corresponding stack variables to obtain an operation result.

[0110] The first operation includes negation operation, increment operation and decrement operation, and the second operation includes addition operation, subtraction operation, multiplication operation and division operation.

[0111] For example, referring to the compiling auxiliary stack of FIG. 3, if the arithmetic instruction corresponds to an assembly instruction of one operand, taking the negation operation as an example, four stack elements W1, W2, W3, and W4 to be operated are taken out from the compiling auxiliary stack, and the negation operation is performed on the stack variables corresponding to the four stack elements respectively to obtain four operation results; if the arithmetic instruction corresponds to an assembly instruction of two operands, taking the addition operation as an example, eight stack elements to be operated are taken out from the compiling auxiliary stack, and the addition operation is performed on the eight stack elements two by two to obtain four operation results.

[0112] The above steps ensure that the corresponding operation can be accurately selected and performed according to the arithmetic instruction in the compiling process, thereby providing correct results and conditions for the subsequent assembly instruction generation.

[0113] In an embodiment of the present application, it is provided that the arithmetic instruction corresponds to an assembly instruction of one operand, and the storing of the operation results into the corresponding registers in the above steps can specifically include the following steps:

[0114] In step S601, if the stack element to be operated is a constant stack element, an empty register is applied, and the operation result is stored in the empty register.

[0115] In step S602, if the stack element to be operated is a register stack element, the operation result is stored in the register corresponding to the register stack element.

[0116] In step S603, if the stack element to be operated is a memory stack element, an empty register is applied, and the operation result is stored in the empty register.

[0117] In the above steps, if the selected stack element to be operated is a register stack element, the result can be stored in the register since the register stack element is bound to a register. If the selected stack element to be operated is not a register stack element, but a constant stack element or a memory stack element, an empty register needs to be applied to store the operation result since the constant stack element and the memory stack element are not register stack elements.

[0118] In this embodiment of the present application, the operation result is stored according to the type of the stack element to be operated, thereby optimizing the program execution efficiency and resource utilization.

[0119] In another embodiment of the present application, it is provided that the arithmetic instruction corresponds to an assembly instruction of two operands, and the storing of the operation results into the corresponding registers in the above steps can specifically include the following steps:

[0120] In step S701, if both of the two operands are register stack elements, the operation result is stored in the register corresponding to one of the register stack elements.

[0121] Step S702: If one operand is a register stack element and the other is a constant stack element, store the operation result in the register corresponding to the register stack element;

[0122] Step S703: If one operand is a register stack element and the other is a memory stack element, store the operation result in the register corresponding to the register stack element;

[0123] Step S704: If both operands are memory stack elements or constant stack elements, apply for an empty register and store the operation result in the empty register.

[0124] Since the register is a high-speed storage unit inside the CPU, storing the operation result directly in the register can speed up the subsequent processing and reduce unnecessary memory access. Therefore, if one operand is a register stack element in each of the above steps, the operation result should be stored in the register bound to the register stack element, and if both operands are not register stack elements, the operation result should be stored in an empty register, thereby avoiding frequent data transmission between the register and the memory and improving execution efficiency.

[0125] It should be noted that after storing the operation result in the register in each of the above embodiments, the register stack element corresponding to the register needs to be created and bound to the register, and then the register stack element is placed at the top of the compilation auxiliary stack to obtain the updated compilation auxiliary stack, which facilitates subsequent instruction compilation.

[0126] In the embodiments that can be implemented in the present application, when applying for an empty register in each of the above embodiments, the main application process is as follows:

[0127] First, check whether there is an empty register in the general register, if there is, take the required empty register from the general register, mark it as used, and return; if there is no empty register, select a register stack element in the compilation auxiliary stack and seize the register bound to it, and the process is as follows:

[0128] 1) Find a register stack element: start from the bottom of the compilation auxiliary stack and search in the direction of the top to get the first register stack element; since the stack elements closer to the top will be used earlier, preferentially selecting the register stack element closer to the bottom can improve the frequency of register access;

[0129] 2) The compiler writes an instruction to transfer the value of the register bound to the register stack element to the specified memory, so that the register is converted into an empty register, and the register stack element is converted into a memory stack element.

[0130] The above steps enable the availability of empty registers for use during the compilation process, thereby improving the execution efficiency of the machine code.

[0131] In other embodiments implementable by the present application, the IR instruction further comprises a return instruction, which means ending the execution and returning the execution result of the contract. For the compiled machine code, all the value records need to be saved in the memory for the blockchain process to take from the memory to obtain the execution result. When the return instruction is compiled, all the constant stack elements and register stack elements in the current compilation auxiliary stack need to be converted into memory stack elements, i.e., all the values are ensured to be saved in the memory.

[0132] Among them, for the constant stack element, one assembly instruction is compiled to write the constant value into the specified memory and change the constant stack element into a memory stack element; for the register stack element, one assembly instruction is compiled to write the value of the target register into the specified memory, return the register, and change the register stack element into a memory stack element.

[0133] The specific embodiments will be described in detail below.

[0134] Taking the EVM contract as an example, the compilation process under the amd64 architecture is introduced.

[0135] The IR instruction to be compiled is set as [..., PUSH, ADD,...], and the state of the compilation auxiliary stack at this time is shown in FIG. 5.

[0136] When the PUSH instruction is compiled, since the PUSH instruction is an immediate number write instruction and the immediate number constant value after the PUSH instruction is known, the 256-bit number is split into four 64-bit numbers c1, c2, c3, and c4 to form four constant stack elements W1, W2, W3, and W4, each of which stores a part of the immediate number constant value. The four constant stack elements are written into the top of the compilation auxiliary stack to form the updated compilation auxiliary stack, as shown in FIG. 3.

[0137] Then, the next ADD instruction is compiled, and the assembly instructions of the two operands are selected. According to the ADD instruction, two 256-bit operands, i.e., eight stack elements, are taken from the compilation auxiliary stack, to obtain the first operand as [W4, W3, W2, W1] and the second operand as [V4, V3, V2, V1]. According to the ADD instruction, the two operands need to be added from the low bit, and the operation result is stored in four registers. According to the register name information, four register stack elements Z1, Z2, Z3, and Z4 are established, and the four register stack elements are written into the top of the compilation auxiliary stack to obtain the updated compilation auxiliary stack, as shown in FIG. 7.

[0138] Next, the operation process of the two operands is described in detail.

[0139] 1, Z1 = V1 + W1

[0140] Since V1 and W1 are not register stack elements, first, an empty register R10 is applied; an assembly instruction is compiled to write the value of memory a into R10; an assembly instruction is compiled to add W1 and R10 and record the result in R10.

[0141] Finally, two assembly instructions are compiled:

[0142] MOV Memory(a) R10 / / write the value of memory a into R10

[0143] ADD R10 c1 / / add the value of constant c1 to R10 and save it to R10

[0144] 2, Z2 = V2 + W2 + CARRY (carry)

[0145] Since V2 and W2 are not register stack elements, first, an empty register R11 is applied; an assembly instruction is compiled to write the value of memory b into R11; an assembly instruction is compiled to add W2 and R11 and record the result in R11.

[0146] Finally, two assembly instructions are compiled:

[0147] MOV Memory(b) R11 / / write the value of memory b into R11

[0148] ADC R11 c2 / / add the value of constant c2 to R1 and the carry value and save it to R11

[0149] 3, Z3 = V3 + W3 + CARRY (carry)

[0150] Since V3 is a register stack element, it can be directly operated on the register R8 held by V3, and an assembly instruction is compiled to add W3 and R8 and record the result in R8.

[0151] Finally, one assembly instruction is compiled:

[0152] ADC R8 c3 / / add the value of constant c3 to R8 and the carry value and save it to R8

[0153] 4, Z4 = V4 + W4 + CARRY (carry)

[0154] Since V4 is a register stack element, it can be directly operated on the register R9 held by V4, and an assembly instruction is compiled to add W4 and R9 and record the result in R9.

[0155] Finally, compile an assembly instruction:

[0156] ADC R9 c4 / / add the value of constant c4 to R9 and the carry value, and save to R9

[0157] After the above 4 groups of addition operations are completed, the operation results are recorded in registers R9, R8, R11, and R10 respectively, and are bound with register stack elements Z1, Z2, Z3, and Z4 respectively, and finally the four register stack elements are pushed to the top of the stack.

[0158] Combine the compiled assembly instructions obtained above to obtain an assembly instruction sequence, and compile the assembly instruction sequence into machine code for direct computer execution.

[0159] FIG. 8 is a structural schematic diagram of a smart contract compiling device provided by an embodiment of the present application. For ease of illustration, only parts related to the embodiments of the present application are shown.

[0160] The smart contract compiling device can specifically include the following modules:

[0161] The first compiling module M1 is configured to place a plurality of stack variables corresponding to each IR instruction in a corresponding register for instruction compilation according to a plurality of IR instructions and a current compiling auxiliary stack, to generate an assembly instruction; the register is one of a null register and a register corresponding to a register stack element in the current compiling auxiliary stack, and the plurality of IR instructions are obtained by compiling a bytecode of the smart contract currently to be compiled;

[0162] The second compiling module M2 is configured to compile the assembly instruction into corresponding machine code; wherein if the register is the null register, the stack variable in another register is transferred to the memory to convert the another register into the null register.

[0163] The above places a plurality of stack variables corresponding to each IR instruction in a corresponding register for instruction compilation by the first compiling module M1 to generate an assembly instruction, and then the second compiling module M2 compiles the assembly instruction to obtain corresponding machine code. The register in the first compiling module M1 is one of a null register and a register corresponding to a register stack element in the current compiling auxiliary stack, and if the register is the null register, the stack variable in a used register is transferred to the memory to convert the register into the null register, so that there are always null registers available for use during the compilation process, thereby improving the execution efficiency of the subsequent machine code.

[0164] Based on the same inventive concept, the first compiling module in the embodiments of the present application includes:

[0165] The first operation module is configured to, according to the arithmetic instruction, take out a plurality of to-be-operated stack elements from a current compilation auxiliary stack, perform an operation operation on stack variables corresponding to the plurality of to-be-operated stack elements, and obtain a plurality of operation results.

[0166] The second operation module is configured to store the plurality of operation results into corresponding registers.

[0167] The third operation module is configured to generate an assembly instruction according to the operation operation and the registers.

[0168] Based on the same inventive concept, the first compilation module in the embodiment of the present application comprises:

[0169] The fourth operation module is configured to store constant values corresponding to the immediate number write instruction into a plurality of constant stack elements, and write the plurality of constant stack elements into a top of a compilation auxiliary stack.

[0170] The fifth operation module is configured to, according to the arithmetic instruction, take out a plurality of to-be-operated stack elements from the compilation auxiliary stack, perform an operation operation on stack variables corresponding to the plurality of to-be-operated stack elements, and obtain a plurality of operation results.

[0171] The sixth operation module is configured to store the plurality of operation results into corresponding registers.

[0172] The seventh operation module is configured to generate an assembly instruction according to the operation operation and the registers.

[0173] Based on the same inventive concept, the first compilation module in the embodiment of the present application comprises:

[0174] The eighth operation module is configured to store constant values corresponding to the immediate number write instruction into a plurality of register stack elements, and write the plurality of register stack elements into a top of a compilation auxiliary stack.

[0175] The ninth operation module is configured to, according to the arithmetic instruction, take out a plurality of to-be-operated stack elements from the compilation auxiliary stack, perform an operation operation on stack variables corresponding to the plurality of to-be-operated stack elements, and obtain a plurality of operation results.

[0176] The tenth operation module is configured to store the plurality of operation results into corresponding registers.

[0177] The generating module is configured to generate an assembly instruction according to the operation operation and the registers.

[0178] Based on the same inventive concept, the first operation module, the fifth operation module and the ninth operation module in the embodiment of the present application comprise:

[0179] The first operation module is configured to, if the arithmetic instruction corresponds to an assembly instruction of one operand, take out a plurality of stack elements to be operated from the compiling auxiliary stack, and perform a NOT operation on corresponding stack variables to obtain a plurality of operation results.

[0180] The second operation module is configured to, if the arithmetic instruction corresponds to an assembly instruction of two operands, take out a plurality of stack elements to be operated from the compiling auxiliary stack, and perform an addition operation on corresponding stack variables to obtain a plurality of operation results.

[0181] Based on the same inventive concept, the first operation module in the embodiment of the present application comprises:

[0182] The first storage module is configured to, if the stack element to be operated is a constant stack element, apply for an empty register, and store the operation result in the empty register.

[0183] The second storage module is configured to, if the stack element to be operated is a register stack element, store the operation result in a register corresponding to the register stack element.

[0184] The third storage module is configured to, if the stack element to be operated is a memory stack element, apply for an empty register, and store the operation result in the empty register.

[0185] Based on the same inventive concept, the second operation module in the embodiment of the present application comprises:

[0186] The fourth storage module is configured to, if both the two operands are register stack elements, store the operation result in a register corresponding to one of the register stack elements.

[0187] The fifth storage module is configured to, if one operand is a register stack element and the other operand is a constant stack element, store the operation result in a register corresponding to the register stack element.

[0188] The sixth storage module is configured to, if one operand is a register stack element and the other operand is a memory stack element, store the operation result in a register corresponding to the register stack element.

[0189] The seventh storage module is configured to, if both the two operands are memory stack elements or constant stack elements, apply for an empty register, and store the operation result in the empty register.

[0190] FIG. 9 is a structural schematic diagram of a terminal device according to an embodiment of the present application. The terminal device E1 includes at least one processor E2 (only one processor is shown in FIG. 9), a memory E3, and a computer program E4 stored in the memory E3 and executable on the at least one processor E2, wherein the processor E2 executes the computer program E4 to implement the steps in the above method embodiments.

[0191] The terminal device E1 can be a desktop computer, a notebook computer, a palm computer, a cloud server, or the like. The terminal device can include, but is not limited to, the processor E2 and the memory E3. Those skilled in the art can understand that FIG. 9 is only an example of the terminal device E1, and does not limit the terminal device E1, which can include more or fewer components than those shown in the figure, or combine certain components, or different components, for example, can also include an input / output device, a network access device, and the like.

[0192] The processor E2 can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, or the like. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor.

[0193] The memory E3 can be an internal storage unit of the terminal device E1 in some embodiments, for example, a hard disk or a memory of the terminal device E1. The memory E3 can also be an external storage device of the terminal device E1 in other embodiments, for example, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, or the like. Further, the memory E3 can include both the internal storage unit and the external storage device of the terminal device E1. The memory E3 is used to store an operating system, an application program, a boot loader, data, and other programs, for example, program codes of the computer program, and the like. The memory E3 can also be used to temporarily store data that has been output or will be output.

[0194] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional units and modules is taken as an example for description, and in actual application, the above functions can be completed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of software functional unit. In addition, the specific names of each functional unit and module are only for convenient distinction, and do not limit the protection scope of the present application. The specific working process of the units and modules in the system can refer to the corresponding process in the foregoing method embodiments, which will not be described here.

[0195] In the above embodiments, the description of each embodiment has its own emphasis, and the rated part is not described or recorded in detail in a certain embodiment. Please refer to the related description of other embodiments.

[0196] The embodiment of the present application provides a computer readable storage medium, the computer readable storage medium stores a computer program, the computer program is executed by a processor to realize the steps in each method embodiment described above.

[0197] The embodiment of the present application provides a computer program product, when the computer program product runs on the mobile terminal, so that the mobile terminal executes to realize the steps in each method embodiment described above.

[0198] Those skilled in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0199] In the embodiments of the present application, it should be understood that the disclosed apparatus / network device and method can be implemented in other manners. For example, the described apparatus / network device embodiments are merely schematic. For example, the division of the modules or units is merely logical function division. There can be another division manner for actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, can be indirect couplings or communication connections through some interfaces, devices or units.

[0200] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place, or can be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiments.

[0201] In addition, each functional unit in the various embodiments of the present application can be integrated in one processing unit, or each unit can be a physically independent unit, or two or more units can be integrated in one unit. The above-mentioned units can be realized in the form of hardware or in the form of software.

[0202] The integrated module / unit, if realized in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, all or part of the flow of the above-mentioned embodiment methods can also be completed by a computer program instructing related hardware, and the computer program can be stored in a computer readable storage medium. When the processor executes the computer program, the steps of each method embodiment described above can be implemented. The computer program includes computer program code, which can be in the form of source code, object code, executable file or some intermediate form. The computer readable medium can include any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the computer readable medium can include appropriate contents according to the requirements of legislation and patent practice in the jurisdiction, for example, in some jurisdictions, according to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.

[0203] The above-described embodiments are only used to illustrate the technical solutions of the present application, but not limit them; although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A method for compiling a smart contract, characterized in that, The compiling method comprises: According to a plurality of IR instructions and a current compiling auxiliary stack, a plurality of stack variables corresponding to each IR instruction is placed in a corresponding register for instruction compiling to generate an assembly instruction; the register is one of a null register and a register corresponding to a register stack element in the current compiling auxiliary stack, and the plurality of IR instructions are obtained by compiling bytecode of the smart contract currently to be compiled; The assembly instruction is compiled into corresponding machine code; wherein, if the register is the null register, a stack variable in another register is transferred to a memory to convert the another register into a null register.

2. The method of claim 1, wherein, The IR instruction comprises an arithmetic instruction, and correspondingly, the instruction compiling method comprises: According to the arithmetic instruction, a plurality of to-be-operated stack elements is taken out from the current compiling auxiliary stack, an operation is performed on stack variables corresponding to the plurality of to-be-operated stack elements to obtain an operation result; The operation result is stored in a corresponding register to generate a corresponding register stack element, and the plurality of register stack elements are written into a top of the compiling auxiliary stack; According to the operation and the register, an assembly instruction is generated.

3. The method of claim 1, wherein, The IR instruction comprises an immediate number write instruction and an arithmetic instruction, and correspondingly, the instruction compiling method comprises: A constant value corresponding to the immediate number write instruction is stored in a plurality of constant stack elements, and the plurality of constant stack elements are written into a top of the compiling auxiliary stack; According to the arithmetic instruction, a plurality of to-be-operated stack elements is taken out from the current compiling auxiliary stack, an operation is performed on stack variables corresponding to the plurality of to-be-operated stack elements to obtain an operation result; The operation result is stored in a corresponding register to generate a corresponding register stack element, and the plurality of register stack elements are written into a top of the compiling auxiliary stack; According to the operation and the register, an assembly instruction is generated.

4. The method of claim 1, wherein, The IR instruction comprises an immediate number write instruction and an arithmetic instruction, and correspondingly, the instruction compiling method comprises: A constant value corresponding to the immediate number write instruction is stored in a plurality of constant stack elements, and the plurality of constant stack elements are written into a top of the compiling auxiliary stack; According to the arithmetic instruction, a plurality of to-be-operated stack elements is taken out from the current compiling auxiliary stack, an operation is performed on stack variables corresponding to the plurality of to-be-operated stack elements to obtain an operation result; The operation result is stored in a corresponding register to generate a corresponding register stack element, and the plurality of register stack elements are written into a top of the compiling auxiliary stack; According to the operation and the register, an assembly instruction is generated.

5. The method according to claim 2 or 3 or 4, characterized in that, According to the arithmetic instruction, a plurality of to-be-operated stack elements is taken out from the current compiling auxiliary stack, an operation is performed on stack variables corresponding to the plurality of to-be-operated stack elements to obtain an operation result, comprising: If the arithmetic instruction corresponds to an assembly instruction of one operand, a plurality of to-be-operated stack elements are taken out from the compiling auxiliary stack, a first operation operation is performed on corresponding stack variables to obtain an operation result; If the arithmetic instruction corresponds to an assembly instruction of two operands, a plurality of to-be-operated stack elements are taken out from the compiling auxiliary stack, a second operation operation is performed on corresponding stack variables to obtain an operation result.

6. The method of claim 5, wherein, Correspondingly, the storing the operation result into the corresponding register comprises: If the to-be-operated stack element is a constant stack element, an empty register is applied, and the operation result is stored in the empty register; If the to-be-operated stack element is a register stack element, the operation result is stored in the register corresponding to the register stack element; If the to-be-operated stack element is a memory stack element, an empty register is applied, and the operation result is stored in the empty register.

7. The method of claim 5, wherein, Correspondingly, the storing the plurality of operation results into the corresponding registers comprises: If both the two operands are register stack elements, the operation result is stored in the register corresponding to one of the register stack elements; If one operand is a register stack element and the other operand is a constant stack element, the operation result is stored in the register corresponding to the register stack element; If one operand is a register stack element and the other operand is a memory stack element, the operation result is stored in the register corresponding to the register stack element; If both the two operands are memory stack elements or constant stack elements, an empty register is applied, and the operation result is stored in the empty register. 8.A compiling apparatus of a smart contract, characterized by comprising: The compiling device of the smart contract comprises: A first compiling module is configured to place a plurality of stack variables corresponding to each IR instruction in a corresponding register for instruction compiling according to a plurality of IR instructions and a current compiling auxiliary stack to generate an assembly instruction; the register is one of an empty register and a register corresponding to a register stack element in the current compiling auxiliary stack; the plurality of IR instructions are obtained by compiling a bytecode of the smart contract currently to be compiled; A second compiling module is configured to compile the assembly instruction into corresponding machine code; if the register is the empty register, the stack variables in another register are transferred to a memory to convert the another register into an empty register.

9. The apparatus of claim 8, wherein, Correspondingly, the first compiling module comprises: A first operation module is configured to take out a plurality of to-be-operated stack elements from the current compiling auxiliary stack according to the arithmetic instruction, perform an operation operation on stack variables corresponding to the plurality of to-be-operated stack elements to obtain a plurality of operation results; A second operation module is configured to store the plurality of operation results into corresponding registers; A third operation module is configured to generate an assembly instruction according to the operation operation and the register.

10. The apparatus of claim 8, wherein, Correspondingly, the first compiling module comprises: The fourth operation module is configured to store the constant value corresponding to the immediate number write instruction into a plurality of constant stack elements, and write the plurality of constant stack elements into a top of a compilation auxiliary stack; The fifth operation module is configured to perform an operation on a plurality of to-be-operated stack elements corresponding to a plurality of stack variables in the compilation auxiliary stack according to the arithmetic instruction, to obtain a plurality of operation results; The sixth operation module is configured to store the plurality of operation results into corresponding registers; The seventh operation module is configured to generate an assembly instruction according to the operation and the registers.

11. The apparatus of claim 8, wherein, The IR instruction includes an immediate number write instruction and an arithmetic instruction, and the first compiling module includes: The eighth operation module is configured to store the constant value corresponding to the immediate number write instruction into a plurality of register stack elements, and write the plurality of register stack elements into a top of a compilation auxiliary stack; The ninth operation module is configured to perform an operation on a plurality of to-be-operated stack elements corresponding to a plurality of stack variables in the compilation auxiliary stack according to the arithmetic instruction, to obtain a plurality of operation results; The tenth operation module is configured to store the plurality of operation results into corresponding registers; The generating module is configured to generate an assembly instruction according to the operation and the registers.

12. The apparatus of claim 9 or 10 or 11, wherein, The first operation module, the fifth operation module, and the ninth operation module include: The first operation module is configured to, if the arithmetic instruction corresponds to an assembly instruction of one operand, take out a plurality of to-be-operated stack elements in the compilation auxiliary stack, perform a NOT operation on corresponding stack variables, and obtain a plurality of operation results; The second operation module is configured to, if the arithmetic instruction corresponds to an assembly instruction of two operands, take out a plurality of to-be-operated stack elements in the compilation auxiliary stack, perform an addition operation on corresponding stack variables, and obtain a plurality of operation results.

13. The apparatus of claim 12, wherein, The first operation module includes: The first storage module is configured to, if the to-be-operated stack element is a constant stack element, apply for an empty register, and store the operation result into the empty register; The second storage module is configured to, if the to-be-operated stack element is a register stack element, store the operation result into a register corresponding to the register stack element; The third storage module is configured to, if the to-be-operated stack element is a memory stack element, apply for an empty register, and store the operation result into the empty register.

14. The apparatus of claim 12, wherein, The second operation module includes: The fourth storage module is configured to, if both the two operands are register stack elements, store the operation result into a register corresponding to one of the register stack elements; The fifth storage module is configured to, if one operand is a register stack element and the other operand is a constant stack element, store the operation result into a register corresponding to the register stack element; and The sixth storage module is configured to, if one operand is a register stack element and the other operand is a memory stack element, store the operation result into a register corresponding to the register stack element. A sixth storage module is configured to store the operation result in a register corresponding to a register stack element if one of the two operands is the register stack element and the other is a memory stack element; A seventh storage module is configured to apply for an empty register and store the operation result in the empty register if both of the two operands are memory stack elements or constant stack elements.

15. A terminal device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, The processor implements the following steps when executing the computer program: According to a plurality of IR instructions and a current compilation auxiliary stack, a plurality of stack variables corresponding to each IR instruction are placed in corresponding registers for instruction compilation to generate assembly instructions; the register is one of an empty register and a register corresponding to a register stack element in the current compilation auxiliary stack, and the plurality of IR instructions are obtained by compiling bytecode of the smart contract to be currently compiled; The assembly instructions are compiled into corresponding machine code; if the register is the empty register, stack variables in another register are transferred to the memory to convert the another register into the empty register.

16. The terminal device of claim 15, wherein, The IR instructions include arithmetic instructions, and correspondingly, the instruction compilation according to the plurality of IR instructions and the current compilation auxiliary stack to generate the assembly instructions includes: According to the arithmetic instructions, a plurality of to-be-operated stack elements are taken out from the current compilation auxiliary stack, an operation is performed on stack variables corresponding to the plurality of to-be-operated stack elements to obtain an operation result; The operation result is stored in a corresponding register to generate a plurality of register stack elements, and the plurality of register stack elements are written into a top of the compilation auxiliary stack; According to the operation and the register, an assembly instruction is generated.

17. The terminal device of claim 15, wherein, The IR instructions include immediate number write instructions and arithmetic instructions, and correspondingly, the instruction compilation according to the plurality of IR instructions and the current compilation auxiliary stack to generate the assembly instructions includes: A constant value corresponding to the immediate number write instruction is stored in a plurality of constant stack elements, and the plurality of constant stack elements are written into a top of the compilation auxiliary stack; According to the arithmetic instructions, stack variables corresponding to a plurality of to-be-operated stack elements are taken out from the current compilation auxiliary stack to perform an operation to obtain an operation result; The operation result is stored in a corresponding register to generate a plurality of register stack elements, and the plurality of register stack elements are written into a top of the compilation auxiliary stack; According to the operation and the register, an assembly instruction is generated.

18. The terminal device of claim 15, wherein, The IR instructions include immediate number write instructions and arithmetic instructions, and correspondingly, the instruction compilation according to the plurality of IR instructions and the current compilation auxiliary stack to generate the assembly instructions includes: A constant value corresponding to the immediate number write instruction is stored in a plurality of register stack elements, and the plurality of register stack elements are written into a top of the compilation auxiliary stack; According to the arithmetic instructions, stack variables corresponding to a plurality of to-be-operated stack elements are taken out from the current compilation auxiliary stack to perform an operation to obtain an operation result; store the operation result into a corresponding register, generate a corresponding register stack element, and write the plurality of register stack elements to a top of a compilation auxiliary stack; generate an assembly instruction according to the operation operation and the register.

19. The terminal device according to claim 16 or 17 or 18, characterized by, The operation operation is performed on the stack variables corresponding to the plurality of to-be-operated stack elements in the compilation auxiliary stack according to the arithmetic instruction to obtain an operation result, and the operation result is obtained. If the assembly instruction corresponding to the arithmetic instruction is one operand, the plurality of to-be-operated stack elements are taken out from the compilation auxiliary stack, a first operation operation is performed on the corresponding stack variables, and an operation result is obtained. If the assembly instruction corresponding to the arithmetic instruction is two operands, the plurality of to-be-operated stack elements are taken out from the compilation auxiliary stack, a second operation operation is performed on the corresponding stack variables, and an operation result is obtained.

20. A computer-readable storage medium, the computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, the following steps are implemented: According to a plurality of IR instructions and a current compilation auxiliary stack, a plurality of stack variables corresponding to each IR instruction are placed in a corresponding register for instruction compilation to generate an assembly instruction; the register is one of a null register and a register corresponding to a register stack element in the current compilation auxiliary stack, and the plurality of IR instructions are obtained by compiling bytecode of the smart contract currently to be compiled; The assembly instruction is compiled into corresponding machine code; wherein, if the register is the null register, the stack variables in another register are transferred to the memory to convert the another register into the null register.

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