Information processing apparatus, information processing method and computer-readable storage medium

Abstract

An information processing apparatus 100 includes: a bottleneck specification unit 10 that specifies a layer to be a bottleneck in a neural network to be optimized, a network building unit 20 that specifies candidate operations capable of replacing an operation of the specified layer, and arranges the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification unit 30 that verifies each of the arranged candidate operations in parallel, and selects one of the candidate operations based on the verification result, a network optimization unit 40 replaces the layer to be bottleneck in the neural network with the selected one candidate operation.

Description

INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD AND COMPUTER-READABLE STORAGE MEDIUM

[0001] The present invention relates to an information processing apparatus and an information processing method for construct a neural network, and a computer-readable storage medium storing a program for realizing these.

[0002] Recently, the popularity of the convolution neural network (CNN) model has been growing rapidly in the field of computer vision. The primary reason for its growing popularity is its ability to achieve high accuracy on various computer vision tasks such as image classification, object detection, segmentation, and so on.

[0003] Generally, the CNN model is initially designed to achieve high accuracy and later the respective CNN model is optimized to achieve high speed. In real time application cases, the CNN model is required to perform at high speed.

[0004] The CNN model optimization basically means replacing the one or more existing convolution operations in the CNN model with more efficient convolution operations. The process of CNN model optimization requires human expertise and is time consuming. The primary reason for the time consumption is that several options for the replacing the convolution operations exist and exhaustively trying all options consume a lot of time.

[0005] In order to solve the problem of the requirement of human expertise and the amount of time required to design a CNN mode architecture, a method of automatically designing CNN model architecture was developed known as Neural Architecture search (NAS).For example, Non-Patent Literature 1 discloses NAS.

[0006] [NPL1] Fast Neural Network Adaptation via Parameter Remapping and Architecture Search; Jiemin Fang, Yuzhu Sun, Kangjian Peng, Qian Zhang, Yuan Li, Wenyu Liu, Xinggang Wang; https: / / openreview.net / attachment?id=rklTmyBKPH&name=original_pdf

[0007] However, the NAS disclosed in Non-Patent Literature 1 has a problem in that it takes time to identify an optimal convolution operation that can replace the existing convolution operation. This is time consuming because there are several options to replace the convolution operation and each option needs to be thoroughly tried.

[0008] One example of an object of the present discloser is to reduce a time required for optimization of a neural network.

[0009] In order to achieve the foregoing object, an information processing apparatus according to one aspect of the present discloser includes: a bottleneck specification unit that specifies a layer to be a bottleneck in a neural network to be optimized, a network building unit that specifies candidate operations capable of replacing an operation of the specified layer, and arranges the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification unit that verifies each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization unit that replaces the layer to be bottleneck in the neural network with the selected one candidate operation.

[0010] In order to achieve the foregoing object, an information processing method according to another aspect of the present discloser includes: a bottleneck specification step of specifying a layer to be a bottleneck in a neural network to be optimized, a network building step of specifying candidate operations capable of replacing an operation of the specified layer, and arranging the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification step of verifying each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization step of replacing the layer to be bottleneck in the neural network with the selected one candidate operation.

[0011] In order to achieve the foregoing object, a computer-readable recording medium according to still another aspect of the present discloser has recorded therein a program, and the program includes an instruction to cause the computer to execute: a bottleneck specification step of specifying a layer to be a bottleneck in a neural network to be optimized, a network building step of specifying candidate operations capable of replacing an operation of the specified layer, and arranging the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification step of verifying each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization step of replacing the layer to be bottleneck in the neural network with the selected one candidate operation.

[0012] As described above, according to the present discloser, it is possible to reduce a time required for optimization of a neural network.

[0013] FIG. 1 is a block diagram schematically illustrating a configuration of an example of the information apparatus.FIG. 2 is a block diagram more specifically illustrating a configuration of the example of the information apparatus.FIG. 3 is a block diagram specifically illustrating the configuration of the layer replacement information generator.FIG. 4 is a diagram illustrating an example of an input model.FIG. 5 is a diagram illustrating an example of an input model in which a bottleneck layer is specified.FIG. 6 is a diagram illustrating an example of the input model in which a bottleneck layer is replaced with a candidate operation.FIG. 7 is a diagram illustrating the input model in a case where there are four candidate operations for replacing the bottleneck layer.FIG. 8 is a diagram illustrating an example of architecture parameters of each candidate operation before training by the NAS module.FIG. 9 is a diagram illustrating an example of architecture parameters of each candidate operation after training by the NAS module.FIG. 10 is a block diagram specifically illustrating the configuration of the network optimization unit 40.FIG. 11 is a diagram illustrating an example of an output model.FIG. 12 is a flowchart illustrating an example of the operation of the information processing apparatus.FIG.13 is a block diagram illustrating an example of a computer that realizes the information processing apparatus.

[0014] (Example Embodiment) Example embodiment of the present discloser is described in detail below referring to the accompanying drawings.

[0015] Configuration of Apparatus First, a configuration of an information processing apparatus 100 according to the example embodiment will be described using FIG. 1. FIG. 1 is a block diagram schematically illustrating a configuration of an example of the information apparatus.

[0016] An information processing apparatus 100 illustrated in FIG. 1 is an apparatus for optimizing a neural network. As illustrated in FIG. 1, the information processing apparatus 100 includes a bottleneck specification unit 10, a network building unit 20, a network verification unit 30 and a network optimization unit 40.

[0017] The bottleneck specification unit 10 specifies a layer to be a bottleneck (hereinafter, it is referred to as “bottleneck layer”.) in a neural network to be optimized. The network building unit 20 selects candidate operations capable of replacing an operation of the specified layer. And then, the network building unit 20 arranges the specified candidate operations in parallel instead of the bottleneck layer in the neural network.

[0018] The network verification unit 30 verifies each of the arranged candidate operations in parallel. The network verification unit 30 selects one of the candidate operations based on the verification result. The network optimization unit 40 replaces the bottleneck layer in the neural network with the selected one candidate operation.

[0019] As described above, according to the information processing apparatus 100 can specify the candidate operation that can be replaced with the bottleneck layer, and select an optimal operation from the specified candidate operations. According to the information processing apparatus 100, it is possible to reduce the time required for optimization of a neural network.

[0020] Next, the configuration and function of the information processing apparatus 100 will be described in detail using FIGS. 2 to 11 in addition to FIG. 1. FIG. 2 is a block diagram more specifically illustrating a configuration of the example of the information apparatus.

[0021] As illustrated in FIG. 2, in the information processing apparatus 100, the bottleneck specification unit 10, network building unit 20 and the network verification unit 30 are configured as a layer replacement information generator 50. The neural network 200 to be optimized is input to the information processing apparatus 100. The neural network 200 is hereinafter referred to as “input model”.

[0022] The input model 200 is Convolutional Neural Network (CNN) model comprising of several layers, wherein each layer consists of convolutional operations. The parameter and type of convolution operation in each layer may vary. The parameter and type of the convolution operation is carefully designed such that high accuracy is achieved for the desired task.

[0023] A configuration of the layer replacement information generator 40 will be specifically described with reference to FIG.3. FIG. 3 is a block diagram specifically illustrating the configuration of the layer replacement information generator. The layer replacement information generator 50 includes a database 51 in addition to the bottleneck specification unit 10, the network building unit 20 and the network verification unit 30.

[0024] The bottleneck specification unit 10 functions as a model parser. The bottleneck specification unit 10 first receives the input model 200 illustrated in FIG.4 and performs syntax analysis on the input model 200. Next, the bottleneck specification unit 10 extracts each layer constituting the input model 200. Further, the bottleneck specification unit 10 builds a new neural network having only a single layer for each layer by using each extracted layer. Next, the bottleneck specification unit 10 extracts the execution time for each constructed neural network from the database 51. FIG. 4 is a diagram illustrating an example of an input model. The input model 200 illustrated in FIG. 4 includes layers 1 to M.

[0025] The database 51 is database comprising of the information about the performance of different types of convolutional operations with different weight parameter size. For example, the database 51 stores information of execution time of standard convolution operations that are different in kernel size, input channel, output channel, stride size, and so on. In another example, the database 51 stores information of execution time of the group convolution operations that are different in group number, kernel size, input channel, output channel, stride size and so on.

[0026] The bottleneck specification unit 10 specifies the bottleneck layer based on the execution time of the operation in each extracted layer constituting the input model 200 as illustrated in FIG. 5. Specifically, the bottleneck specification unit 10 specifies the layer having a comparatively large execution time as the bottleneck layers. FIG. 5 is a diagram illustrating an example of an input model in which a bottleneck layer is specified. In FIG. 5, the bottleneck layer is layer 3.

[0027] The network building unit 20 functions as SuperNet builder. The network building unit 20 takes structure information of the input model 200 and information for specifying the bottleneck layer information from the bottleneck specification unit 10.

[0028] The network building unit 20 specifies the several candidate operations for replacing operation in the bottleneck layer from database 51, using the structure information of the input model 200 and the information for specifying the bottleneck layer information. The specified candidate operation may be, for example, a candidate operation of the same type as the operation in the bottleneck layer and with a lesser weight parameter, a candidate operation with a different convolution operation type, such as pooling, skip, eltwise, and so on. However, the execution time of the specified candidate operation needs to be shorter than the execution time of the operation of the bottleneck layer.

[0029] Next, the network building unit 20 builds a large neural network in which the layers (1, 2, and 4 to M) other than the bottleneck layer 3 are the same as the input model 200. In this neural network, the bottleneck layer is removed, and the specified candidate operations are arranged in parallel in place of the operation of the bottleneck layer. In the example of FIG. 6, the candidate operations are represented as layers 3.1 to 3. N. Further, the network building unit 20 adds an architecture parameter α as an output of each candidate operation. FIG. 6 is a diagram illustrating an example of the input model in which a bottleneck layer is replaced with a candidate operation.

[0030] FIG. 7 is a diagram illustrating the input model in a case where there are four candidate operations for replacing the bottleneck layer. In the example of FIG. 7, bottleneck layer 3 in the input model 200 is replaced by candidate operations shown in layer 3.1, layer 3.2, layer 3.3, and layer 3.4. The architecture parameter α illustrated in FIGS. 6 and 7 is a trainable parameter. Next, the network building unit 20 outputs the input model 200 in which the bottleneck layer is replaced with the candidate operations to the network verification unit 30. The input model 200 in which the bottleneck layer is replaced with the candidate operations is also referred to as "SuperNet" below.

[0031] The network verification unit 30 performs training on each of the arranged candidate operations in parallel and selects one of the candidate operations based on the architecture parameter value of each of the candidate operations after the training. The network verification unit 30 functions as a NAS module.

[0032] The network verification unit 30 performs the training of the SuperNet by the NAS module. At this time, the network verification unit 30 trains only the replaced candidate operation in the bottleneck layer and the architecture parameter α. On the other hand, the network verification unit 30 freezes the operation of the other layers in the SuperNet 200 and does not perform training in the other layers. Subsequently, the network verification unit 30 identifies the best candidate operation from the candidate operations based on the result of the training. Specifically, the network verification unit 30 selects the candidate operation with the highest architecture parameter α value as the best candidate operation.

[0033] The process of selecting a candidate operation will be described using a specific example. FIG. 8 is a diagram illustrating an example of architecture parameters of each candidate operation before training by the NAS module. FIG. 9 is a diagram illustrating an example of architecture parameters of each candidate operation after training by the NAS module.

[0034] As illustrated in FIG. 8, before the training, the value of the architecture parameter α is the same in the layer 3.1, the layer 3.2, the layer 3.3, and the layer 3.4, which are the candidate operations. These layers have the same probability of being selected. On the other hand, as shown in FIG. 9, after the training, the architecture parameter α value is different among the layer 3.1, the layer 3.2, the layer 3.3, and the layer 3.4.

[0035] In the example of FIGS. 8 and 9, the network verification unit 30 selects the layer 3.2 having the highest architecture parameter α value as the best candidate operation. When the network verification unit 30 selects the best candidate operation, the network building unit 20 outputs layer replacement candidate information 31 that specifies the selected candidate operation.

[0036] As described above, the layer replacement information generator 50 evaluates all the candidate operations at once i.e. not evaluates all the candidate operations exhaustively. For training and evaluation of candidate operations, the trainable architecture parameter α and Neural Architecture Search methodology are used. Due to the ability of the layer replacement information generator 50 to evaluate all candidate operations at once, the information processing apparatus 100 makes the model optimization i.e. replacing the bottleneck operations very time efficient.

[0037] The configuration of the network optimization unit 40 will be described in detail with reference to FIG. 10. FIG. 10 is a block diagram specifically illustrating the configuration of the network optimization unit 40. As illustrated in FIG. 10, the network optimization unit 40 includes a layer replacer 41. The layer replacer 41 receives the layer replacement candidate information 31 from the layer replacement information generator 50 and replaces the operation in the bottleneck layer with the selected best candidate operation.

[0038] After that, the layer replacer 41 outputs, as the output model 300, a model obtained by replacing the bottleneck layer in the input model 200. FIG. 11 is a diagram illustrating an example of an output model. As illustrated in FIG. 11, in the output model 300, the layer 3 of the input model 200 is replaced with a layer 3.2.

[0039] Operation of Apparatus Next, operation of the information processing apparatus 100 embodiment will be described using FIG. 12. FIG. 12 is a flowchart illustrating an example of the operation of the information processing apparatus. In the following description, FIGS. 1 to 11 are referred to as appropriate. In the example embodiment, the information processing method is implemented by operating the information processing apparatus 100. Accordingly, the description of the information processing method according to the example embodiment is replaced with the following description of the operations of the information processing apparatus 100.

[0040] First, as, illustrated in FIG.12, the bottleneck specification unit 10 receives the input model 200 and performs syntax analysis on the input model 200 (Step A1).

[0041] Next, the bottleneck specification unit 10 extracts each layer constituting the input model 200 based on the syntax analysis, and builds a new neural network having only a single layer for each layer by using each extracted layer (Step A2).

[0042] Next, the bottleneck specification unit 10 specifies the bottleneck layer based on the execution time of the operation in each extracted layer constituting the input model 200 (Step A3).

[0043] Next, the network building unit 20 specifies the several candidate operations using the structure information of the input model 200 and the information for specifying the bottleneck layer information, and builds a large neural network (SuperNet) by arranging the specified candidate operations in parallel instead of the bottleneck layer in the neural network (Step A4).

[0044] Next, the network verification unit 30 performs the training of the SuperNet by the NAS module, and identifies the best candidate operation from the candidate operations based on the result of the training (Step A5).

[0045] Next, the network optimization unit 40 replaces the operation in the bottleneck layer with the best candidate operation, and outputs, as the output model 300, a model obtained by replacing the bottleneck layer in the input model 200 (Step A6).

[0046] Effects of the present embodiment As described above, in the example embodiment, the optimal neural network is constructed by constructing a large neural network using candidate operations that can be replaced with a bottleneck layer and training the large neural network. According to the example embodiment, it is possible to reduce the time required for optimization of a neural network.

[0047] Program It suffices for a program in the example embodiment to be a program that causes a computer to carry out steps A1 to A6 illustrated in FIG. 12. Also, by this program being installed and executed in the computer, the information processing apparatus100 and the information processing method according to the example embodiment can be realized. In this case, a processor of the computer functions and performs processing as the bottleneck specification unit 10, the network building unit 20, the network verification unit 30 and the network optimization unit 40.

[0048] The database 51 is implemented by a storage device provided in the computer or by a storage device provided in another external computer. The computer includes a general-purpose PC, a server computer, a smartphone and a tablet-type terminal device.

[0049] Furthermore, the program according to the example embodiment may be executed by a computer system constructed with a plurality of computers. In this case, for example, each computer may function as one of the bottleneck specification unit 10, the network building unit 20, the network verification unit 30 and the network optimization unit 40.

[0050] Physical configuration Physical configuration Using FIG. 13, the following describes a computer that realizes the information processing apparatus100 by executing the program according to the example embodiment. FIG.13 is a block diagram illustrating an example of a computer that realizes the information processing apparatus.

[0051] As shown in FIG. 13, a computer 110 includes a CPU (Central Processing Unit) 111, a main memory 112, a storage device 113, an input interface 114, a display controller 115, a data reader / writer 116, and a communication interface 117. These components are connected in such a manner that they can perform data communication with one another via a bus 121.

[0052] The computer 110 may include a GPU (Graphics Processing Unit) or an FPGA (Field-Programmable Gate Array) in addition to the CPU 111, or in place of the CPU 111. In this case, the GPU or the FPGA can execute the programs according to the example embodiment.

[0053] The CPU 111 deploys the program according to the example embodiment, which is composed of a code group stored in the storage device 113 to the main memory 112 and carries out various types of calculation by executing the codes in a predetermined order. The main memory 112 is typically a volatile storage device, such as a DRAM (dynamic random-access memory).

[0054] Also, the program according to the example embodiment is provided in a state where it is stored in a computer-readable recording medium 120. Note that the program according to the present example embodiment may be distributed over the Internet connected via the communication interface 117.

[0055] Also, specific examples of the storage device 113 include a hard disk drive and a semiconductor storage device, such as a flash memory. The input interface 114 mediates data transmission between the CPU 111 and an input device 118, such as a keyboard and a mouse. The display controller 115 is connected to a display device 119, and controls display on the display device 119.

[0056] The data reader / writer 116 mediates data transmission between the CPU 111 and the recording medium 120, reads out the program from the recording medium 120, and writes the result of processing in the computer 110 to the recording medium 120. The communication interface 117 mediates data transmission between the CPU 111 and another computer.

[0057] Specific examples of the recording medium 120 include: a general-purpose semiconductor storage device, such as CF (CompactFlash (Registered Trademark)) and SD (Secure Digital); a magnetic recording medium, such as a flexible disk; and an optical recording medium, such as a CD-ROM (Compact Disk Read Only Memory).

[0058] Note that the information processing apparatus 100 can also be realized by using items of hardware that respectively correspond to the components, such as an electronic circuit, rather than the computer in which the program is installed. Furthermore, a part of the information processing apparatus 100 may be realized by the program, and the remaining part of the information processing apparatus 100 may be realized by hardware. The computer is not limited to the computer illustrated in FIG. 12.

[0059] A part or an entirety of the above-described example embodiment can be represented by (Supplementary Note 1) to (Supplementary Note 12) described below but is not limited to the description below.

[0060] (Supplementary Note 1) An information processing apparatus comprising: a bottleneck specification means for specifying a layer to be a bottleneck in a neural network to be optimized, a network building means for specifying candidate operations capable of replacing an operation of the specified layer, and arranging the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification means for verifying each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization means for replacing the layer to be bottleneck in the neural network with the selected one candidate operation.

[0061] (Supplementary Note 2) The information processing apparatus according to Supplementary Note 1, wherein the bottleneck specification means specifies the layer to be bottleneck based on an execution time of an operation in each layer constituting the neural network.

[0062] (Supplementary Note 3) The information processing apparatus according to Supplementary Note 1, wherein the network building means specifies, as the candidate operation, an operation of the same type as the operation of the layer to be bottleneck and having a lesser weight parameter or an operation of a different type from the operation of the layer to be bottleneck.

[0063] (Supplementary Note 4) The information processing apparatus according to Supplementary Note 1, wherein the network verification means performs training on each of the arranged candidate operations in parallel, and selects one of the candidate operations based on an architecture parameter value of each of the candidate operations after the training.

[0064] (Supplementary Note 5) An information processing method comprising: a bottleneck specification step of specifying a layer to be a bottleneck in a neural network to be optimized, a network building step of specifying candidate operations capable of replacing an operation of the specified layer, and arranging the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification step of verifying each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization step of replacing the layer to be bottleneck in the neural network with the selected one candidate operation.

[0065] (Supplementary Note 6) The information processing method according to Supplementary Note 5, wherein, in the bottleneck specification step, specifying the layer to be bottleneck based on an execution time of an operation in each layer constituting the neural network.

[0066] (Supplementary Note 7) The information processing method according to Supplementary Note 5, wherein, in the network building step, specifying, as the candidate operation, an operation of the same type as the operation of the layer to be bottleneck and having a lesser weight parameter or an operation of a different type from the operation of the layer to be bottleneck.

[0067] (Supplementary Note 8) The information processing method according to Supplementary Note 5, wherein, in the network verification step, performing training on each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on an architecture parameter value of each of the candidate operations after the training.

[0068] (Supplementary Note 9) A computer-readable storage medium storing a program that includes commands for causing a computer to execute: a bottleneck specification step of specifying a layer to be a bottleneck in a neural network to be optimized, a network building step of specifying candidate operations capable of replacing an operation of the specified layer, and arranging the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification step of verifying each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization step of replacing the layer to be bottleneck in the neural network with the selected one candidate operation.

[0069] (Supplementary Note 10) The computer-readable storage medium according to Supplementary Note 9, wherein, in the bottleneck specification step, specifying the layer to be bottleneck based on an execution time of an operation in each layer constituting the neural network.

[0070] (Supplementary Note 11) The computer-readable storage medium according to Supplementary Note 9, wherein, in the network building step, specifying, as the candidate operation, an operation of the same type as the operation of the layer to be bottleneck and having a lesser weight parameter or an operation of a different type from the operation of the layer to be bottleneck.

[0071] (Supplementary Note 12) The computer-readable storage medium according to Supplementary Note 9, wherein, in the network verification step, performing training on each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on an architecture parameter value of each of the candidate operations after the training.

[0072] Although the invention of the present application has been described above with reference to the embodiment, the invention of the present application is not limited to the above embodiment. Various changes that can be understood by a person skilled in the art can be made to the configurations and details of the invention of the present application within the scope of the invention of the present application.

[0073] As described above, according to the present discloser, it is possible to reduce a time required for optimization of a neural network. The present discloser is useful in machine learning systems, and the like.

[0074] 1 to M Layer 3 Bottleneck layer 10 Bottleneck specification unit (Model parser) 20 Network building unit (SuperNet builder) 30 Network verification unit 31 Layer replacement candidate information 40 Network optimization unit 41 Layer replacer 50 Layer replacement information generator 51 Data base 100 Information processing apparatus 110 Computer 111 CPU 112 Main memory 113 Storage device 114 Input interface 115 Display controller 116 Data reader / writer 117 Communication interface 118 Input device 119 Display device 120 Recording medium 121 Bus 200 Input model 300 Output model

Claims

1. An information processing apparatus comprising: a bottleneck specification means for specifying a layer to be a bottleneck in a neural network to be optimized, a network building means for specifying candidate operations capable of replacing an operation of the specified layer, and arranging the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification means for verifying each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization means for replacing the layer to be bottleneck in the neural network with the selected one candidate operation.

2. The information processing apparatus according to claim 1, wherein the bottleneck specification means specifies the layer to be bottleneck based on an execution time of an operation in each layer constituting the neural network.

3. The information processing apparatus according to claim 1, wherein the network building means specifies, as the candidate operation, an operation of the same type as the operation of the layer to be bottleneck and having a lesser weight parameter or an operation of a different type from the operation of the layer to be bottleneck. 。4. The information processing apparatus according to claim 1, wherein the network verification means performs training on each of the arranged candidate operations in parallel, and selects one of the candidate operations based on an architecture parameter value of each of the candidate operations after the training.

5. An information processing method comprising: a bottleneck specification step of specifying a layer to be a bottleneck in a neural network to be optimized, a network building step of specifying candidate operations capable of replacing an operation of the specified layer, and arranging the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification step of verifying each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization step of replacing the layer to be bottleneck in the neural network with the selected one candidate operation.

6. The information processing method according to claim 5, wherein, in the bottleneck specification step, specifying the layer to be bottleneck based on an execution time of an operation in each layer constituting the neural network.

7. The information processing method according to claim 5, wherein, in the network building step, specifying, as the candidate operation, an operation of the same type as the operation of the layer to be bottleneck and having a lesser weight parameter or an operation of a different type from the operation of the layer to be bottleneck.

8. The information processing method according to claim 5, wherein, in the network verification step, performing training on each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on an architecture parameter value of each of the candidate operations after the training.

9. A computer-readable storage medium storing a program that includes commands for causing a computer to execute: a bottleneck specification step of specifying a layer to be a bottleneck in a neural network to be optimized, a network building step of specifying candidate operations capable of replacing an operation of the specified layer, and arranging the specified candidate operations in parallel instead of the layer to be the bottleneck in the neural network, a network verification step of verifying each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on the verification result, a network optimization step of replacing the layer to be bottleneck in the neural network with the selected one candidate operation.

10. The computer-readable storage medium according to claim 9, wherein, in the bottleneck specification step, specifying the layer to be bottleneck11. The computer-readable storage medium according to claim 9, wherein, in the network building step, specifying, as the candidate operation, an operation of the same type as the operation of the layer to be bottleneck and having a lesser weight parameter or an operation of a different type from the operation of the layer to be bottleneck.

12. The computer-readable storage medium according to claim 9, wherein, in the network verification step, performing training on each of the arranged candidate operations in parallel, and selecting one of the candidate operations based on an architecture parameter value of each of the candidate operations after the training.

Images