Display device and display method

Abstract

A display device (100) and a display method, relating to the technical field of display. The display device (100) comprises a driving circuit (130); a first control circuit (110) electrically connected to the driving circuit (130) via a first data line (LD1), and configured to send a first data signal (d1) to the driving circuit (130) via the first data line (LD1) in response to a selection signal from the driving circuit (130) being at a first level, so that the driving circuit (130) drives a display panel (140) to display in a first display mode; and a second control circuit (120) electrically connected to the driving circuit (130) via a second data line (LD2), and configured to send a second data signal (d2) to the driving circuit (130) via the second data line (LD2) in response to the selection signal being at a second level, so that the driving circuit (130) drives the display panel (140) to display in a second display mode, wherein the display power of the display panel (140) in the first display mode is greater than the display power of the display panel (140) in the second display mode.

Description

Display device and display method Technical Field

[0001] This disclosure relates to the field of display technology, and more particularly to a display device and display method. Background Technology

[0002] Some display products typically use a single host to control multiple functional modules. For example, a smartwatch has only one host and one interface. The host sends commands and data through this interface to control the entire smartwatch. However, this results in higher power consumption and shorter standby time for the display product.

[0003] Summary of the Invention

[0004] This disclosure provides a display device and a display method.

[0005] According to a first aspect, this disclosure provides a display device, comprising: a display panel; a driving circuit; a first control circuit electrically connected to the driving circuit via a first data line, configured to send a first data signal to the driving circuit via the first data line in response to a selection signal from the driving circuit being at a first level, causing the driving circuit to drive the display panel to display in a first display mode; and a second control circuit electrically connected to the driving circuit via a second data line, configured to send a second data signal to the driving circuit via the second data line in response to a selection signal being at a second level, causing the driving circuit to drive the display panel to display in a second display mode; wherein the transmission power of the first data line transmitting the first data signal is greater than the transmission power of the second data line transmitting the second data signal, and the display power of the display panel in the first display mode is greater than the display power of the display panel in the second display mode.

[0006] According to a second aspect, this disclosure provides a display method, including: applying to a display device provided in an embodiment of this disclosure, the method including: in response to a selection signal being at a first level, controlling a first control circuit to send a first data signal to a display panel via a first data line to drive the display panel to display in a first display mode; and in response to a selection signal being at a second level, controlling a second control circuit to send a second data signal to the display panel via a second data line to drive the display panel to display in a second display mode. Attached Figure Description

[0007] Figure 1 shows a schematic diagram of the structure of a display device according to an embodiment of the present disclosure;

[0008] Figure 2 shows a schematic diagram of the first control circuit and the second control circuit according to an embodiment of the present disclosure;

[0009] Figure 3A shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure;

[0010] Figure 3B shows a timing diagram of signals according to an embodiment of the present disclosure;

[0011] Figure 4A shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure;

[0012] Figure 4B shows a timing diagram of a signal according to another embodiment of the present disclosure;

[0013] Figure 5 shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure;

[0014] Figure 6A shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure;

[0015] Figure 6B shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure;

[0016] Figure 7A shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure;

[0017] Figure 7B shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure;

[0018] Figure 8A shows a schematic diagram of the stacking of a display device according to an embodiment of the present disclosure;

[0019] Figure 8B shows a schematic diagram of the stacking of a display device according to another embodiment of the present disclosure;

[0020] Figure 8C shows a schematic diagram of the stacking of a display device according to another embodiment of the present disclosure;

[0021] Figure 9 shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure;

[0022] Figure 10A shows a timing diagram of a signal according to another embodiment of the present disclosure;

[0023] Figure 10B shows a timing diagram of a signal according to another embodiment of the present disclosure; and

[0024] Figure 11 shows a schematic flowchart of a display method according to an embodiment of the present disclosure. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Based on the described embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure. In the following description, some specific embodiments are for descriptive purposes only and should not be construed as limiting this disclosure in any way, but are merely examples of embodiments of this disclosure. Conventional structures or constructions will be omitted where they may cause confusion in understanding this disclosure. It should be noted that the shapes and dimensions of the components in the figures do not reflect actual size and proportion, but are only schematic representations of the contents of the embodiments of this disclosure.

[0026] Unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure shall have the ordinary meaning as understood by those skilled in the art. The terms "first," "second," and similar words used in the embodiments of this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components.

[0027] Furthermore, in the description of the embodiments disclosed herein, the terms "connected to" or "linked" can refer to a direct connection between two components, or to a connection between two components via one or more other components, wherein the connection method is electrical connection or electrical coupling. Additionally, the two components can also be connected or coupled via wired or wireless means.

[0028] Figure 1 shows a schematic diagram of the structure of a display device according to an embodiment of the present disclosure.

[0029] As shown in Figure 1, the display device 100 includes a first control circuit 110, a second control circuit 120, a drive circuit 130, and a display panel 140.

[0030] In this embodiment of the disclosure, the display panel 140 includes a plurality of light-emitting elements. The light-emitting elements in the display panel 140 are illuminated to display an image. For example, the display panel may be an active matrix organic light-emitting diode (AMOLED) panel, and the light-emitting elements are OLEDs.

[0031] In this embodiment, the driving circuit 130 may be a display driver integrated circuit (DDIC). The driving circuit 130 sends data signals and scan signals to the display panel 140, causing the display panel 140 to display. The driving circuit 110 may also be a touch and display driver integration circuit (TDDIC). The driving circuit 130 may send data circuit signals and scan signals to the display panel 140 based on the received touch signal indicating a touch command, causing the display panel 140 to display based on the touch command.

[0032] For example, the display panel 140 may include a display area and a non-display area. A light-emitting element is disposed in the display area, and the driving circuit 130 may be disposed in the non-display area of ​​the display panel 140.

[0033] In this embodiment of the disclosure, the first control circuit 110 is electrically connected to the drive circuit 130 via the first data line LD1. In response to a selection signal from the drive circuit 130 being at a first level, the first control circuit 110 sends a first data signal d1 to the drive circuit 130 via the first data line LD1, causing the drive circuit 130 to drive the display panel 140 to display in a first display mode.

[0034] In this embodiment, the second control circuit 120 is electrically connected to the drive circuit 130 via the second data line LD2. In response to a selection signal from the drive circuit 130 being at a second level, the second control circuit 120 sends a second data signal d2 to the drive circuit 130 via the second data line LD2, causing the drive circuit 130 to drive the display panel 140 to display in a second display mode.

[0035] In this embodiment of the disclosure, the selection signal can indicate whether the first data line LD1 and the second data line LD2 transmit data signals. For example, in response to the level of the selection signal, the first control circuit 110 and the second control circuit 120 send data signals to the driving circuit 130 via the first data line LD1 and the second data line LD2, respectively, to drive the display panel 140 to display in the corresponding display mode.

[0036] For example, the first level is low, and the second level is high. In response to the selection signal being low, the first control circuit 110 can send a first data signal d1 to the drive circuit 130 via the first data line LD1, causing the drive circuit 130 to drive the display panel 140 to display in the first display mode. In response to the selection signal being low, the second control circuit 120 can send a second data signal d2 to the drive circuit 130 via the second data line LD2, causing the drive circuit 130 to drive the display panel 140 to display in the second display mode.

[0037] For example, the first display mode could be the Normal Brightness Monitor (NBM) mode. During the use of the display device, complex images can be displayed in NBM mode. For instance, when a user browses information through the display device, the device can be set to NBM mode.

[0038] In NBM mode, all functional components of the display device 100 can be active. For example, the display device 100 has a light-emitting element and a wireless communication device. The first control circuit 110 can control the wireless communication device to receive the target image and send image data signals, control signals, and signal timing signals representing the target image to the driving circuit 130, so that the driving circuit 130 can send data voltage signals and scan signals to the display panel 140, thereby driving the light-emitting element in the display panel 140 to emit light to display the target image.

[0039] For example, the second display mode can be an Always On Display (AOD) mode. When the display panel 140 is in standby mode, a simple image can be displayed using AOD mode. For example, when the user is not using the display panel 140, it can display only a simple wallpaper or static image. For example, the display panel 140 can display only a clock image, with a solid color background. For example, a digital or analog clock face can be displayed on a solid color background. The attributes of the display screen on the display panel 140 in AOD mode...

[0040] In AOD mode, all functional components in the display device 100 except those used to drive the light-emitting elements to emit light can be in a sleep state. For example, the display device 100 has a light-emitting element and a wireless communication device. The second control circuit 120 can only send image data signals, control signals, and signal timing signals representing the digital dial image to the driving circuit 130, so that the driving circuit 130 can send data voltage signals and scan signals to the display panel 140, thereby driving the light-emitting elements in the display panel 140 to emit light to display the digital dial image.

[0041] In this embodiment, the first data signal d1 is used to transmit a data voltage signal from the first control circuit 110 to the driving circuit 130. The first data signal d1 indicates the image data that the display panel 140 needs to display in the first display mode. For example, the first data signal d1 may be image data output by the first control circuit 110 in the first display mode as a display command, or it may be image data generated by the first control circuit 110 based on touch data in the first display mode. The first data signal d1 can characterize the pixel value of each pixel in the image data. In the first display mode, in response to receiving the first data signal d1 from the first control circuit 110, the driving circuit 130 outputs a scan signal and a data voltage signal to the display panel 140.

[0042] In this embodiment of the disclosure, the transmission power of the first data line LD1 transmitting the first data signal d1 is greater than the transmission power of the second data line LD2 transmitting the second data signal d2.

[0043] For example, in the first display mode, the workload of the first control circuit 110 is greater than that of the second control circuit 120 in the second display mode, and the amount of data that the display panel 140 needs to display in the first display mode is greater than that in the second display mode. Therefore, in a unit of time, the amount of data transmitted by the first data line LD1 is greater than the amount of data transmitted by the second data line LD2, and the power consumption of the first data line LD1 in transmitting the first data signal d1 is greater than the power consumption of the second data line LD2 in transmitting the second data signal d2.

[0044] In this embodiment of the present disclosure, the display power of the display panel 140 in the first display mode is greater than the display power of the display panel 140 in the second display mode.

[0045] For example, if the light-emitting element in the display panel 140 is a sub-pixel, the number of sub-pixels lit up in the display panel 140 in the first display mode is greater than the number of sub-pixels lit up in the display panel 140 in the second display mode. The duration for which the sub-pixels in the display panel 140 are lit up in the first display mode is also greater than the duration for which the sub-pixels in the display panel 140 are lit up in the second display mode.

[0046] In this embodiment, the first control circuit 110 can be a system-on-chip (SoC). The second control circuit 120 can be a microcontroller unit (MCU). The operating frequency and size of the second control circuit 120 are both smaller than those of the first control circuit 110. The power consumption generated by the first control circuit 110 is greater than that generated by the second control circuit 120.

[0047] In this embodiment, the display process of the display panel 140 in two display modes is controlled by two control circuits and two data lines respectively. The first control circuit 110 controls the driving circuit 130 to provide the display panel 140 with the normal driving power required for the first display mode, while the second control circuit 120 controls the driving circuit 130 to provide the display panel 140 with the less driving power required for the second display mode. This can reduce the overall power consumption of the display device in the second display mode, thereby extending the standby time of the display device 100.

[0048] The control principles of the first and second control circuits provided in this disclosure are illustrated in conjunction with Figure 2.

[0049] Figure 2 shows a schematic diagram of the first control circuit and the second control circuit according to an embodiment of the present disclosure.

[0050] As shown in Figure 2, the display device 200 includes a first control circuit 210, a second control circuit 220, a light-emitting element (EL), a sensor, a near-field communicator (NFC), an optical sensor (ALS), and a wireless communication device (WiFi). The light-emitting element (EL), sensor, NFC, ALS, and WiFi can be various functional devices in the display device 200 to realize various functions of the display device 200.

[0051] It should be noted that Figure 2 only schematically illustrates the control methods of the first control circuit 210 and the second control circuit 220 on multiple functional devices in the display device 200, and does not limit the connection relationship between the first control circuit 210 and the second control circuit 220 and each functional device.

[0052] In this embodiment of the disclosure, the first control circuit 210 can control the light-emitting element EL, the sensor, the near-field communicator (NFC), the optical sensor (ALS), and the wireless communication device (WiFi). The second control circuit 220 only controls the light-emitting element EL.

[0053] The first control circuit 210 can directly control each functional device, or indirectly control each functional device through other devices. For example, the first control circuit 210 can directly control the near-field communicator (NFC), controlling whether the NFC is enabled, receiving information from the NFC, and sending information to the NFC so that the NFC can transmit information from the first control circuit 210. For example, the first control circuit 210 can also indirectly control the light-emitting element EL through a driving circuit (such as the driving circuit 130 shown in Figure 1). The first control circuit 210 can send a first data signal and timing control signal to the driving circuit, and the driving circuit generates a scan signal and data voltage information based on the first data signal and timing control signal to drive the light-emitting element EL to emit light.

[0054] In this embodiment of the disclosure, in the first display mode, the light-emitting element (EL), sensor, near-field communicator (NFC), optical sensor (ALS), and wireless communication device (WiFi) are all active. The first control circuit 210 can control the operation of the light-emitting element (EL), sensor, NFC, ALS, and WiFi. The first control circuit 110 can control multiple functional devices, enabling them to operate in conjunction to meet various display requirements in the first mode.

[0055] In this embodiment of the disclosure, in the second display mode, the light-emitting element EL is in an active state, while the sensor, near-field communicator (NFC), optical sensor (ALS), and wireless communication device (WiFi) are all in a sleep state. The second control circuit 220 can only control the light-emitting element EL. In the second display mode, the second control circuit 220 cannot wake up the sensor, near-field communicator (NFC), optical sensor (ALS), and wireless communication device (WiFi), thereby ensuring that functional devices other than the light-emitting element ELy are always in a low-power state.

[0056] Since only the light-emitting element EL needs to be controlled in the second display mode, the light-emitting element EL can be controlled by the second control circuit 220, which has a lower operating power consumption than the first control circuit 210, thereby reducing the operating power consumption of the display device 200 in the second display mode.

[0057] In this embodiment, two control circuits act as two hosts to differentiate and control different functional devices in the display device 200, thereby reducing the power consumption of the display device and increasing its standby time. Furthermore, by controlling the two display modes of the display panel separately through the two control circuits, precise control of the different display modes of the display panel can be achieved, further reducing the overall power consumption of the display device 200.

[0058] Figure 3A shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure.

[0059] As shown in Figure 3A, the display device 300 includes a first control circuit 310, a second control circuit 320, a drive circuit 330, and a display panel 340.

[0060] In this embodiment, the first control circuit 310, the second control circuit 320, the drive circuit 330, and the display panel can be referred to the first control circuit 110, the second control circuit 120, the drive circuit 130, and the display panel 140 described above. For the sake of brevity, similar parts will not be described again.

[0061] In this embodiment, the first control circuit 310 sends a first switching command C1 to the second control circuit 320. The first switching command C1 indicates a switch from the first display mode to the second display mode and controls the first data line LD1 to switch from the first transmission mode to the second transmission mode. In response to the first switching command, the second control circuit 320 switches the selection signal sel from the first level to the second level and controls the second data line LD2 to switch from the second transmission mode to the first transmission mode.

[0062] In this embodiment, the display panel 340 is currently controlled by the first control circuit 310 and is in a first display mode. When the display panel switches from the first display mode to the second display mode, the first control circuit 310 sends a first switching command C1 to the second control circuit 320 to instruct the second control circuit 320 to control the display panel 340 to display in the second display mode.

[0063] For example, the first control circuit 310 can directly send the first switching instruction C1 to the second control circuit 320, or it can write the first switching instruction C1 into a register, and the second control circuit 320 can read the first switching instruction C1 from the register.

[0064] In this embodiment, the first data line LD1 and the second data line LD2 can support multiple transmission protocols and transmit data in different transmission modes. The transmission power of the first transmission mode is greater than that of the second transmission mode. For example, the first transmission mode can be a high-speed (HS) transmission mode. The second transmission mode can be a low-power (Low Power) transmission mode.

[0065] Since the first control circuit 310 and the first data line LD1 may not participate in data transmission or may only perform a small amount of data transmission after the display panel 340 switches from the first display mode to the second display mode, the first control circuit 310 switches the first data line LD1 from the HS transmission mode to the LP mode, thereby reducing the transmission power consumption generated by the first data line LD1 in the second display mode. For example, the second transmission mode may be the LP11 transmission mode in the LP mode.

[0066] For example, the first control circuit 310 can also switch the first data line LD1 from HS transmission mode to Ultra-Low Power State (ULPS) transmission mode. When the first data line LD1 is in ULPS mode, the first data line LD1 is in a floating state and does not transmit data signals.

[0067] Since the second control circuit 320 and the second data line LD2 participate in data transmission after the display panel 340 switches from the first display mode to the second display mode, the second control circuit 320 switches the second data line LD2 from the LP transmission mode to the HS mode to improve the transmission efficiency of the second data line LD2.

[0068] For example, before the display panel 340 switches from the first display mode to the second display mode, the second data line LD2 can be in ULPS mode. The second control circuit 320 switches the second data line LD2 from ULPS transmission mode to HS mode.

[0069] In this embodiment of the disclosure, the selection signal indicates whether the first data line LD1 and the second data line LD2 transmit data signals. Different display modes transmit data signals via different data lines. Therefore, in response to the level of the selection signal sel, the transmission state of the data line can be switched to transmit data signals via the data line corresponding to the display mode.

[0070] Figure 3B shows a timing diagram of signals according to an embodiment of the present disclosure. The process of switching the display panel from a first display mode to a second display mode is illustrated in conjunction with Figures 3A and 3B.

[0071] The first display mode (mode1) can be NBM mode, and the second display mode (mode2) can be AOD mode. The first transmission mode (t1) can be HS mode, and the second transmission mode (t2) can be LP11 mode or ULPS mode. The selection signal (sel) indicates whether the first data line LD1 and the second data line LD2 are transmitting data signals. For example, a low level of the selection signal (sel) indicates that the first data line LD1 is in the first transmission mode (t1), and the first data line LD1 can transmit data signals. A high level of the selection signal (sel) indicates that the second data line LD2 is in the first transmission mode (t2), and the second data line LD2 can transmit data signals.

[0072] It should be noted that when the first control circuit 310 sends the first switching command C1, the first data line LD1 enters the LP11 mode. At this time, the first control circuit 310, the second control circuit 320, and the drive circuit 330 respond to the first switching command C1 and determine that the first data line LD1 has entered the LP11 mode, rather than determining that the first data line LD1 is in the first transmission mode t1 based on the low level of the selection signal sel.

[0073] Understandably, the first switching instruction C1 has a higher priority than the level of the selection signal sel. For example, in the first display mode, the transmission of the first data signal d1 via the first data line LD1 can be determined solely based on the low level of the selection signal sel. After the first control circuit 310 sends the first switching instruction C1, the transmission mode of the first data line LD1 is determined preferentially based on the first switching instruction C1. Furthermore, if the transmission mode of the first data line LD1 is determined to be LP11 based on the first switching instruction C1, the second control circuit 320 switches the selection signal sel from low to high level after a first duration Q1.

[0074] After the selection signal sel completes its transition from low to high, the second data line LD1 is still in LP11 mode. At this time, the first control circuit 310, the second control circuit 320, and the drive circuit 330, in response to the transition of the selection signal sel from low to high, determine that the first data line LD1 has entered LP11 mode, but do not determine that the second data line LD2 is in the first transmission mode t1 based on the high level of the selection signal sel. After a second duration Q2, the first control circuit 310, the second control circuit 320, and the drive circuit 330, in response to the high level of the selection signal sel, determine that the second data line LD2 is in the first transmission mode t1.

[0075] The data line information interface can indicate the data line currently in the first transmission mode t1, that is, whether the driving circuit 330 is currently receiving data signals via the first data line LD1 or the second data line LD2. For example, in the first display mode, before the first control circuit 310 completes sending the first switching command C1, the driving circuit 330 determines that the first data line LD1 is in the first transmission mode t1 based on the low level of the selection signal sel, and receives the first data signal d1 via the first data line LD1. After the selection signal sel switches from low level to high level and a second duration Q2 has elapsed, the driving circuit 330 determines that the second data line LD2 is in the first transmission mode t1 based on the high level of the selection signal sel, and receives the second data signal d2 via the second data line LD2.

[0076] In NBM mode, the first control circuit 310 is the main control unit, and the first data line LD1 is the transmission line. The first control circuit 310 sends the first data signal d1 to the drive circuit 330 in HS mode via the first data line LD1. In AOD mode, the second control circuit 320 is the main control unit, and the second data line LD2 is the transmission line. The second control circuit 320 sends the second data signal d2 to the drive circuit 330 in HS mode via the second data line LD2. This allows the drive circuit 330 to perform operations such as gamma correction on the second data signal d2 and then send the resulting data voltage signal to the display panel 340. The data voltage signal represents the image information in the first data signal d2.

[0077] As shown in Figure 3B, the frequencies of the Tear Effect (TE) signal and the Vertical Synchronization (Vsync) signal determine the frequency at which the first control circuit 310 and the second control circuit 320 transmit data signals. Each pulse of the TE signal and the Vsync signal accompanies a valid data signal transmitted by either the first control circuit 310 or the second control circuit 320.

[0078] For example, in NBM mode, the first control circuit 310 communicates with the drive circuit 330 via the first data line LD1. At this time, the selection signal sel is at a low level, the first data line LD1 is in HS mode, and the second data line LD2 is in LP11 mode or ULPS mode. The first control circuit 310 sends a first data signal d1 to the drive circuit 330 via the first data line LD1. The frequency of the effective pulse of the first data signal d1 is consistent with the pulse frequencies of the TE signal and the Vsync signal.

[0079] When the display mode needs to be switched from NBM mode to AOD mode, the first control circuit 310 sends a first switching command C1 to the second control circuit 320, instructing the display panel 340 to switch from NBM mode to AOD mode. After the first data line LD1 completes the transmission of the first switching command C1, the first control circuit 310 controls the first data line LD1 to switch from HS mode to LP11 mode. At this time, the second control circuit 320 also controls the second data line LD2 to enter LP11 mode.

[0080] For example, if the second data line LD2 is in LP11 mode in the first display mode, the second control circuit 320 keeps the second data line LD2 in LP11 mode when the first data line LD1 switches from HS mode to LP11 mode. If the second data line LD2 is in ULPS mode in the first display mode, the second control circuit 320 switches the second data line LD2 from ULPS mode to LP11 mode when the first data line LD1 switches from HS mode to LP11 mode. When the second data line LD2 is in ULPS mode, the second control circuit 320 needs to wake up the second data line LD2 first, so that the second data line LD2 is in LP11 mode, which can confirm in advance that the second data line LD2 has data transmission capability.

[0081] In this embodiment of the disclosure, in response to the first switching instruction C1, the second control circuit 320 switches the selection signal sel from the first level to the second level after a first duration Q1, and controls the second data line LD2 to switch from LP11 mode to HS mode after the selection signal sel is at the second level and a second duration Q2 has elapsed.

[0082] For example, after the first control circuit 310 sends the first switching command C1, the second control circuit 320 delays switching the selection signal sel from low to high. Therefore, before the selection signal sel is switched to high, the first control circuit 310 can, if necessary, transmit command signals to the drive circuit 330 at low speed via the first data line LD1 to meet the requirements of the first display mode of the display panel 340. After a first duration Q1, the second control circuit 320 switches the selection signal sel from low to high. At this time, the first control circuit 310, the second control circuit 320, and the drive circuit 330 synchronously confirm that they are about to enter the second display mode and reset or power on the hardware structure required for the second display mode. After a second duration Q2, the second control circuit 320 switches the second data line LD2 from LP11 mode to HS mode. When the second data line LD2 switches from LP11 mode to HS mode, it can be considered that the data signal transmission has been switched from the first data line LD1 to the second data line LD2.

[0083] For example, when only the first data line LD1 is in HS mode, the display device is in a state of transmitting data signals to the drive circuit 330 via the first data line LD1. When only the second data line LD2 is in HS mode, the display device is in a state of transmitting data signals to the drive circuit 330 via the second data line LD2.

[0084] During the switch from NBM mode to AOD mode, the main control circuit needs to switch from the first control circuit 310 to the second control circuit 320, and the transmission line also needs to switch from the first data line LD1 to the second data line LD2. Once the second data line LD2 switches from LP11 mode to HS mode, the transmission line switch from the first data line LD1 to the second data line LD2 is achieved. The main control circuit switch can be completed while both the first data line LD1 and the second data line LD2 are in LP11 mode, thus avoiding simultaneous switching of the main control circuit and the transmission line. By delaying the end of transmission on the first data line LD1 and delaying the start of transmission on the second data line LD2, a black screen phenomenon on the display panel 340 can be avoided if the main control circuit switch and the transmission line switch occur simultaneously.

[0085] During the first duration Q1, the first control circuit 310 can control the hardware structure participating in the first display mode (mode1) to enter a sleep or standby state. During the second duration Q2, the second control circuit 320 can wake up the hardware structure participating in the second display mode (mode2). The time required to wake up the hardware is longer than the time required to put it into standby mode, and the wake-up effect of the second control circuit 320 affects the display effect of the second display mode (mode2). Therefore, to avoid display abnormalities due to a hardware structure not being woken up, the second duration Q2 is longer than the first duration Q1. For example, the range of the first duration Q1 can be 0.1us < Q1 < 2us, and the range of the second duration Q2 can be 32us < Q2 < 40us.

[0086] For example, the hardware structure participating in the first display mode (mode1) and the second display mode (mode2) may include hardware circuits such as gate drive circuits, source drive circuits, timing control circuits, and gamma correction circuits. For instance, in NBM mode, all sub-pixels in the display panel 340 can be refreshed, while in AOD mode, only a portion of the sub-pixels in the display panel 340 are refreshed. Therefore, when switching from NBM mode to AOD mode, the hardware circuits controlling pixels that do not need to be refreshed can enter a sleep or standby state, while the hardware circuits controlling pixels that need to be refreshed continue to operate. When switching from AOD mode to NBM mode, the hardware circuits that were originally in a sleep or standby state are awakened and enter the operating state.

[0087] For example, the hardware structure participating in the first display mode (mode1) and the second display mode (mode2) may also include hardware components such as registers and signal lines. For instance, the registers and signal lines participating in NBM mode and AOD mode may be different. In NBM mode, the registers and signal lines participating in AOD mode are in standby or sleep mode to reduce power consumption. When switching from NBM mode to AOD mode, the registers and signal lines participating in NBM mode can enter sleep or standby mode, while the registers and signal lines participating in AOD mode are woken up and enter the working state to store and transmit display data for AOD mode. For example, the registers can be located in the driver circuit 330, such as in the Touch and Display Driver Integration Circuit (TDDIC); or they can be set separately, such as registers and capacitors (Cap) being set together with flash memory.

[0088] When the second control circuit 320 wakes up the hardware required to participate in the second display mode, the first control circuit 310 can also perform a sleep operation to control the hardware required to participate in the first display mode (mode 1). After the first control circuit 310 completes the sleep operation, the first display mode (mode 1) switches to the second display mode (mode 2).

[0089] During the time periods corresponding to the first duration Q1 and the second duration Q2, the main control circuit switching from the first control circuit 310 to the second control circuit 320 is completed. After the end of the time periods corresponding to the first duration Q1 and the second duration Q2, the first data line LD1 can switch from LP11 mode to ULPS mode, or remain in LP11 mode, and the second data line LD1 switches from LP11 mode to HS mode, thereby completing the main control circuit switching from the first data line LD1 to the second data line LD2.

[0090] During the time periods corresponding to the first duration Q1 and the second duration Q2, both the first data line LD1 and the second data line LD2 are in LP11 mode.

[0091] For the first data line LD1, after the first control circuit 310 sends the first switching command C1, the first control circuit 310 controls the first data line LD1 to switch from HS mode (first transmission mode t1) to LP11 mode. After the first duration Q1 and the second duration Q2, the first control circuit 310 switches the first data line LD1 from LP11 mode to ULPS mode (second transmission mode t2) or continues to keep the first data line LD1 in LP11 mode (second transmission mode t2). During the time periods corresponding to the first duration Q1 and the second duration Q2, the first control circuit 310 can transmit necessary information to the drive circuit 330 via the first data line LD1 in a low-power mode. For example, the first control circuit shown in Figure 2 can receive information from multiple functional modules. After the first control circuit 310 completes sending the first switching instruction C1, within the time period corresponding to the first duration Q1, the first control circuit 310 receives an instruction from the user inputting through other functional modules to switch from the second display mode back to the first display mode. Since the main control unit has not yet completed the switching, the first control circuit 310 can send an instruction to the drive circuit 330 and the second control circuit 320 to switch from the second display mode to the first display mode.

[0092] For the second data line LD2, when the first data line LD1 switches from HS mode to LP11 mode, the second control circuit 320 controls the second data line LD2 to synchronously enter LP11. After the second data line LD2 enters LP11 mode, the second control circuit 320 can transmit test data via the second data line LD2 in low-power mode to detect whether the second data line LD2 has data transmission capability. This can avoid the inability to switch the second data line LD2 to HS mode, or the inability of the second data line LD2 to transmit the second data signal d2 in the second display mode. If the main control unit completes the switch from the first control circuit 310 to the second control circuit 320 within the time period corresponding to the first duration Q1 and the second duration Q2, at this time the first control circuit 310 receives an instruction from the user to switch back from the second display mode to the first display mode via other function modules. The first control circuit 310 can send this instruction to the second control circuit, and the second control circuit 320 sends the instruction to the drive circuit 330 via the second data line LD2 in low-power mode (LP11 mode).

[0093] In this embodiment of the disclosure, in response to the first data line LD1 switching from HS mode to LP11, the first control circuit 310 stops sending the first data signal d1 to the drive circuit 330. In response to the second data line LD2 switching from LP11 mode to HS mode, the second control circuit 320 sends the second data signal d2 to the drive circuit 330 via the second data line LD2.

[0094] In this embodiment of the disclosure, no data signal switching is performed during the switching process from the first data line LD1 to the second data line LD2, so as to ensure that the display screen does not refresh during the switching process of the transmission line and the main control unit, and to avoid the display screen going black during the display mode switching process.

[0095] For example, in response to the pulses of the TE signal and Vsync signal after the transmission line and the main control unit have completed the switching, the second control circuit 320 sends the second data signal d2 to the drive circuit 330 via the second data line LD2, thereby realizing the switching from the first data signal d1 to the second data signal d2 and realizing the display in the second display mode.

[0096] For example, after the first control circuit 310 sends the first switching command C1 via the first data line LD1, the hardware structure participating in the NBM mode gradually enters a sleep or standby state. If the first control circuit 310 continues to send the first data signal d1 to the drive circuit 330 at this time, the display panel 340 may fail to display normally. During the period corresponding to the second duration Q2, the hardware structure participating in the AOD mode is gradually woken up. If the second control circuit 320 sends the second data signal d2 to the drive circuit 330 at this time, the display panel 340 may also fail to display normally.

[0097] Furthermore, during the transition from the first display mode to the second display mode, after the main control unit has switched from the first control circuit 310 to the second control unit 320, the transmission line has not yet switched from the first data line LD1 to the second data line LD2. Therefore, if the main control unit switch is completed but the transmission line switch is not, the drive circuit 330 may not be able to receive accurate data signals, resulting in the display panel 340 failing to display properly.

[0098] For example, after the first control circuit 310 sends the first switching command C1 via the first data line LD1, the first control circuit 310 no longer sends the first data signal d1 via the first data line LD1. At this time, both the first data line LD1 and the second data line LD2 enter the LP11 state. Since the first data line LD1 and the second data line LD2 do not transmit data signals during the time periods corresponding to the first duration Q1 and the second duration Q2, controlling the first data line LD1 and the second data line LD2 to enter the LP11 state can reduce the transmission power consumption of the first data line LD1 and the second data line LD2, and can also confirm that the first data line LD1 and the second data line LD2 have transmission capabilities.

[0099] When the second data line LD2 switches from LP11 mode to HS mode, the first data line LD1 can switch from LP11 mode to ULPS mode, or it can remain in LP11 mode. At this time, it can be considered that the transmission route has been switched from the first data line LD1 to the second data line LD2, and the hardware structure participating in AOD mode has been fully awakened. Therefore, the second control circuit 320 can send the second data signal d2 via the second data line LD2, so that the drive circuit 330 drives the display panel 340 to display the display screen in AOD mode.

[0100] In some embodiments, after the second control circuit 320 controls the second data line LD2 to switch from LP11 mode to HS mode, the second control circuit 320 starts sending the second data signal d2 via the second data line LD2, corresponding to the start pulse of the next TE signal and Vsync signal. In this embodiment, the driving circuit 330 includes a first unit and a second unit. The first unit is electrically connected to the first data line LD1 and is used to process the first data signal d1. The second unit is electrically connected to the second data line LD2 and is used to process the second data signal d2.

[0101] For example, the first control circuit 310 sends a first data signal d1 via the first data line LD1, the first unit receives the first data signal d1 and processes the first data signal d1 to send a scan signal and a data voltage signal to the display panel 340, so that the display panel 340 displays the image indicated by the first data signal d1.

[0102] In this embodiment of the present disclosure, after the first control circuit 310 sends the first switching command C1 to the drive circuit 330 via the first data line LD1, the drive circuit 330 responds to the first switching command C1 by controlling the first unit to switch from the working state to the sleep state, and controlling the second unit to switch from the sleep state to the working state.

[0103] For example, when the first unit enters a sleep state, it stops processing the first data signal d1. When the second unit enters a working state, it processes the received second data signal d2.

[0104] For example, the driving circuit 330 can be a chip, the first unit can be a first pin in the chip that is electrically connected to the first data line LD1, and the second unit can be a second pin in the chip that is electrically connected to the second data line LD2. In response to the first switching command C1, the driving circuit 330 controls the first pin to stop receiving the first data signal d1 and controls the second pin to start receiving the second data signal d2.

[0105] In this embodiment of the present disclosure, when the display panel 340 is powered on, the first control circuit 310 controls the selection signal sel to a first level and communicates with the drive circuit 330 via the first data line LD1.

[0106] For example, when the display panel 340 is powered on, the first control circuit 310 is activated by default, and the first control circuit 310 is the main control unit. In this case, the display panel 340 can enter the first display mode by default, using the first data line LD1 as the transmission line. The first control circuit 320 communicates with the drive circuit 330 via the first data line LD1.

[0107] In this embodiment of the disclosure, when the display panel 340 needs to switch from the first display mode to the second display mode, the second control circuit 320 is activated, and the second control circuit 320 is the main control unit. In this case, the second data line LD2 is used as the transmission line, and the second control circuit 320 communicates with the drive circuit 330 via the second data line LD2.

[0108] In this embodiment of the present disclosure, in a first display mode, the first data line LD1 transmits a first data signal d1 at a first rate. In a second display mode, the second data line LD2 transmits a second data signal d2 at a second rate, where the first rate is greater than the second rate.

[0109] For example, in the first display mode, the first data line LD1 transmits the first data signal d1 at X Mbps. In the second display mode, the second data line LD2 transmits the second data signal d2 at X / 2 Mbps. Because the refresh rate of the second display mode is low, the second data line LD2 can transmit the second data signal d2 at a lower transmission rate, thereby reducing transmission power consumption and enabling the display device to enter an energy-saving standby (AOD) mode.

[0110] Figure 4A shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure.

[0111] As shown in Figure 4A, the display device 400 includes a first control circuit 410, a second control circuit 420, a drive circuit 430, and a display panel 440.

[0112] In this embodiment, the first control circuit 410, the second control circuit 420, the drive circuit 430, and the display panel 440 can be referred to the first control circuit 110, the second control circuit 120, the drive circuit 130, and the display panel 140 described above. For the sake of brevity, similar parts will not be described again.

[0113] In this embodiment, the second control circuit 420 sends a second switching command C2 to the first control circuit 410. The second switching command C2 indicates a switch from the second display mode to the first display mode, and controls the second data line LD2 to switch from the first transmission mode to the second transmission mode. In response to the second switching command C2, the first control circuit 410 switches the selection signal sel from the second level to the first level, and controls the first data line LD1 to switch from the second transmission mode to the first transmission mode.

[0114] In this embodiment, the display panel 440 is currently controlled by the second control circuit 420 and is in a second display mode. When the display panel 440 switches from the second display mode to the first display mode, the second control circuit 420 sends a second switching command C2 to the first control circuit 410 to instruct the first control circuit 410 to control the display panel 440 to display in the first display mode.

[0115] For example, the second control circuit 420 can directly send the second switching instruction C2 to the first control circuit 410, or it can write the first switching instruction C1 into the register, and the first control circuit 410 reads the second switching instruction C2 from the register.

[0116] Since the second control circuit 420 and the second data line LD2 can not participate in data transmission or perform a small amount of data transmission after the display panel 440 switches from the second display mode to the first display mode, the second control circuit 420 switches the second data line LD2 from the HS transmission mode to the LP mode, thereby reducing the transmission power consumption generated by the second data line LD2 in the first display mode.

[0117] For example, the second control circuit 420 can also switch the second data line LD2 from HS transmission mode to ultra-low power ULPS mode. When the second data line LD2 is in ULPS mode, the second data line LD2 is in a floating state and does not transmit data signals.

[0118] Since the first control circuit 410 and the first data line LD1 participate in data transmission after the display panel 440 switches from the second display mode to the first display mode, the first control circuit 410 switches the first data line LD1 from the LP transmission mode to the HS mode to improve the transmission efficiency of the first data line LD1.

[0119] For example, before the display panel 440 switches from the second display mode to the first display mode, the first data line LD1 can be in ULPS mode. The first control circuit 410 switches the first data line LD1 from ULPS transmission mode to HS mode.

[0120] Figure 4B shows a timing diagram of signals according to another embodiment of the present disclosure. The process of switching the display panel from a second display mode to a first display mode is illustrated in conjunction with Figures 4A and 4B.

[0121] The first display mode (mode1), second display mode (mode2), first transmission mode (t1), second transmission mode (t2), selection signal (sel), data line information interface, TE signal, and Vsync signal shown in Figure 4B can be referred to the description in Figure 3B. For simplicity, further details are omitted.

[0122] For example, in AOD mode, the second control circuit 420 communicates with the drive circuit 430 via the second data line LD2. At this time, the selection signal sel is high, the second data line LD2 is in HS mode, and the first data line LD1 is in LP11 or ULPS mode. The second control circuit 420 sends the second data signal d2 to the drive circuit 430 via the second data line LD2. The frequency of the effective pulse of the second data signal d2 is consistent with the pulse frequency of the TE signal and the Vsync signal.

[0123] When the display mode needs to switch from AOD mode to NBM mode, the second control circuit 420 sends a second switching command C2 to the first control circuit 410, instructing the display panel 440 to switch from AOD mode to NBM mode. After the second data line LD2 completes the transmission of the second switching command C2, the second control circuit 420 controls the second data line LD2 to switch from HS mode to LP11 mode. At this time, the first control circuit 410 also controls the first data line LD1 to enter LP11 mode.

[0124] For example, if the first data line LD1 is in LP11 mode in the second display mode, when the second data line LD2 switches from HS mode to LP11 mode, the first control circuit 410 keeps the first data line LD1 in LP11 mode. If the first data line LD1 is in ULPS mode in the second display mode, when the second data line LD2 switches from HS mode to LP11 mode, the first control circuit 410 switches the first data line LD1 from ULPS mode to LP11 mode. When the first data line LD1 is in ULPS mode, the first control circuit 410 needs to wake up the first data line LD1 first to make it in LP11 mode, which can confirm in advance that the first data line LD1 has data transmission capability.

[0125] In this embodiment of the disclosure, in response to the second switching instruction C2, after a first duration Q1, the first control circuit 410 switches the selection signal sel from the second level to the first level. After the selection signal sel is at the first level and a second duration Q2 has elapsed, the first data line LD1 is controlled to switch from LP11 mode to HS mode.

[0126] For example, after the second control circuit 420 sends the second switching command C2, the first control circuit 410 delays switching the selection signal sel from high to low. Therefore, before the selection signal sel is switched to low, the second control circuit 420 can also transmit command signals to the drive circuit 430 at low speed via the second data line LD2 if necessary, to meet the requirements of the first display mode of the display panel 440. After the first duration Q1, the first control circuit 410 switches the selection signal sel from high to low. At this time, the first control circuit 410, the second control circuit 420, and the drive circuit 430 synchronously confirm that they are about to enter the first display mode, and reset or power on the hardware structure required for the first display mode. After the second duration Q2, the first control circuit 410 switches the first data line LD1 from LP11 mode to HS mode. When the first data line LD1 switches from LP11 mode to HS mode, it can be considered that the switching of the transmission route from the second data line LD2 to the first data line LD1 is completed.

[0127] In this embodiment of the disclosure, in response to the second data line LD2 switching from HS mode to LP11, the second control circuit 420 stops sending the second data signal d2 to the drive circuit 430. In response to the first data line LD1 switching from LP11 mode to HS mode, the first control circuit 410 sends the first data signal d1 to the drive circuit 430 via the first data line LD1.

[0128] For example, in response to the pulses of the TE signal and Vsync signal after the transmission line and the main control unit have completed the switching, the first control circuit 410 sends the first data signal d1 to the drive circuit 430 via the first data line LD1, thereby realizing the switching from the second data signal d2 to the first data signal d1 and realizing the display in the first display mode.

[0129] In some embodiments, after the first control circuit 410 controls the first data line LD1 to switch from LP11 mode to HS mode, the first control circuit 410 starts sending the first data signal d1 through the first data line LD1 after the next TE signal and Vsync signal start pulse.

[0130] In this embodiment of the present disclosure, the second control circuit 420 sends a second switching command C2 to the drive circuit 430 via the second data line LD2. In response to the second switching command C2, the drive circuit 430 controls the first unit to switch from a sleep state to an operating state, and controls the second unit to switch from an operating state to a sleep state.

[0131] For example, when the second unit enters a sleep state, it stops processing the second data signal d2. When the first unit enters a working state, it processes the received first data signal d1.

[0132] In this embodiment, in the second display mode, the second data line LD2 transmits the second data signal d2 at X / 2 Mbps. After switching from the second display mode to the first display mode, in the first display mode, the first data line LD1 transmits the first data signal d1 at X Mbps, where X is a positive number. This ensures reduced power consumption of the data line in the second display mode with a low refresh rate.

[0133] Figure 5 shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure.

[0134] As shown in Figure 5, the display device 500 includes a first control circuit 510, a second control circuit 520, a driving circuit 530, and a display panel 540.

[0135] In this embodiment, the first control circuit 510, the second control circuit 520, the drive circuit 530, and the display panel 540 can be referred to the first control circuit 110, the second control circuit 120, the drive circuit 130, and the display panel 140 described above. For the sake of brevity, similar parts will not be described again.

[0136] In this embodiment of the present disclosure, the first control circuit 510 and the second control circuit 520 are both electrically connected to the drive circuit 530 through the selection signal line SLsel, and the selection signal is transmitted from the drive circuit 530 to the first control circuit 510 and the second control circuit 520 respectively through the selection signal line SLsel.

[0137] In this embodiment of the disclosure, when the level of the selection signal changes, the first control circuit 510 and the second control circuit 520 can directly determine the level of the selection signal via the selection signal line SLsel, thereby switching the display mode and the data line transmission mode, ensuring the synchronization of the first control circuit 510 and the second control circuit 520 in obtaining the level of the selection signal.

[0138] Figure 6A shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure.

[0139] As shown in Figure 6A, the display device 600a includes a first control circuit 610, a second control circuit 620, a drive circuit 630, a display panel 640, and a register 650.

[0140] In this embodiment, the first control circuit 610, the second control circuit 620, the drive circuit 630, and the display panel 640 can be referred to the first control circuit 110, the second control circuit 120, the drive circuit 130, and the display panel 140 described above. For the sake of brevity, similar parts will not be described again.

[0141] In this embodiment, the first control circuit 610 is electrically connected to the drive circuit 630 via the selection signal line SLsel. A selection signal is transmitted from the drive circuit 630 to the first control circuit 610 via the selection signal line SLsel, and the first control circuit 610 writes the selection signal into a register 650. The register 650 stores the selection signal written by the first control circuit 610, and the second control circuit 620 reads the selection signal from the register 650.

[0142] For example, the first control circuit 610 controls the selection signal to be low and writes the low level of the selection signal into register 650. The second control circuit 620 reads the low level from register 650 and controls the second data line to be in LP11 mode or ULPS mode.

[0143] Figure 6B shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure.

[0144] As shown in Figure 6B, the display device 600b includes a first control circuit 610, a second control circuit 620, a drive circuit 630, a display panel 640, and a register 650.

[0145] In this embodiment, the first control circuit 610, the second control circuit 620, the drive circuit 630, and the display panel 640 can be referenced to the first control circuit 110, the second control circuit 120, the drive circuit 130, and the display panel 140 described above. For simplicity, similar parts will not be repeated. In this embodiment, the second control circuit 620 is electrically connected to the drive circuit 630 via the selection signal line SLsel. The selection signal is transmitted from the drive circuit 630 to the second control circuit 620 via the selection signal line SLsel, and the second control circuit 620 writes the selection signal into the register 650. The register 650 stores the selection signal written by the second control circuit 620, and the first control circuit 610 reads the selection signal from the register 650.

[0146] For example, the second control circuit 620 controls the selection signal to be high and writes the high level of the selection signal into register 650. The first control circuit 610 reads the high level from register 650 and controls the first data line to be in LP11 mode or ULPS mode.

[0147] Figure 7A shows a schematic diagram of the structure of a display device according to an embodiment of the present disclosure.

[0148] As shown in Figure 7A, the display device 700 includes a first control circuit 710, a second control circuit 720, a drive circuit 730, a display panel 740, a circuit board 760, a connector 770, data lines MIPI1 and MIPI2, a select signal line MIPI_SEL, and a pull-down resistor R.

[0149] In this embodiment, the first control circuit 710, the second control circuit 720, the drive circuit 730, and the display panel 740 can be referred to the first control circuit 110, the second control circuit 120, the drive circuit 130, and the display panel 140 described above. For the sake of brevity, similar parts will not be described again.

[0150] In this embodiment, data lines MIPI1 and MIPI2 are Mobile Industry Processor Interface (MIPI) data lines. The first control circuit 710 is electrically connected to the drive circuit 730 via data line MIPI1, and the second control circuit 720 is electrically connected to the drive circuit 730 via data line MIPI2. Data line MIPI1 can be the first data line LD1 described above, and data line MIPI2 can be the second data line LD2 described above.

[0151] In this embodiment, the process of switching the display panel 740 from the first display mode to the second display mode can be referred to the previous description of FIG. 3B, and the process of switching the display panel 740 from the second display mode to the first display mode can be referred to the previous description of FIG. 4B. For the sake of brevity, these details will not be repeated.

[0152] In this embodiment of the disclosure, the driving circuit 730 includes a selection pin. The selection pin is electrically connected to a first terminal of the selection signal line MIPI_SEL and a first terminal of the pull-down resistor R. The second terminal of the pull-down resistor R is electrically connected to a target power supply V, and the target power supply voltage is consistent with the first level.

[0153] For example, the first control circuit 710 is electrically connected to the drive circuit 730 via the data line MIPI1, which is the first data line LD1 described above. When the level of the selection signal is low (at this time the first level is low), the first control circuit 710 sends a first data signal to the drive circuit 730 via the data line MIPI1.

[0154] In this embodiment of the disclosure, the first control circuit 710 connects to the drive circuit 730 via the selection signal line MIPI_SEL. The method by which the first control circuit 710 and the second control circuit 720 determine the level of the selection signal can be referred to FIG6A, and will not be described in detail for the sake of simplicity.

[0155] In some embodiments, the second control circuit 720 may also be connected to the drive circuit 730 via the selection signal line MIPI_SEL. The method by which the first control circuit 710 and the second control circuit 720 determine the level of the selection signal can be referred to FIG. 6B. Alternatively, both the first control circuit 710 and the second control circuit 720 may be connected to the drive circuit 730 via the selection signal line MIPI_SEL. The method by which the first control circuit 710 and the second control circuit 720 determine the level of the selection signal can be referred to FIG. 5. For simplicity, further details will not be provided.

[0156] In some embodiments, the first control circuit 710 and the second control circuit 720 may also be connected to the drive circuit 730 via two selection signal lines respectively. The drive circuit 730 may send selection signals to the first control circuit 710 and the second control circuit 720 via the two selection signal lines respectively, and the selection signals transmitted in the two selection signal lines are consistent. In this embodiment, the second terminal of the pull-down resistor R may be grounded (target power supply V), and the target power supply voltage of the target power supply V is 0V. When the display panel 740 is powered on, the level of the selection pin can be set to 0V, and the level of the selection signal is 0V (low level). In response to the low level of the selection signal, the first control circuit 710 is communicatively connected to the drive circuit 730 via the data line MIPI1.

[0157] In this embodiment, the pull-down resistor R has a resistance greater than 500KΩ, for example, 1MΩ. The resistance value of the pull-down resistor R affects the magnitude of the leakage current in the select signal line MIPI_SEL. Taking a high level of 1.8V for the select pin as an example, 500KΩ corresponds to a leakage current of 3.6uA, and 1MΩ corresponds to a leakage current of 1.8uA. Therefore, the leakage current generated in the select signal line MIPI_SEL is negligible.

[0158] In this embodiment, the driving circuit 730 includes a first pin and a second pin. A data line MIPI1 is led out from the first pin, and a data line MIPI2 is led out from the second pin. Data lines MIPI1 and MIPI2 are arranged on a fan-out packaging (FOP) circuit board. The FOP is bonded to a circuit board 760. Data lines MIPI1 and MIPI2 span the FOP circuit board and the circuit board 760 and connect to a connector 770. The connector 770 engages with a first control circuit 710 and a second control circuit 720, thereby establishing a communication connection between the first control circuit 710, the second control circuit 720, and the driving circuit 730.

[0159] In this embodiment of the disclosure, the circuit board 760 may be a main flexible printed circuit (MFPC), and the connector 770 may be a board-to-board (BTB) connector.

[0160] In this embodiment of the disclosure, data lines MIPI1 and MIPI2 may each include multiple data lines. Data lines MIPI1 and MIPI2 are schematically illustrated with reference to Figures 7A and 7B. Figure 7B shows a schematic structural diagram of a display device according to another embodiment of the present disclosure.

[0161] As shown in Figure 7B, data line MIPI1 may include a clock signal positive line MIPI1_CLKP, a clock signal negative line MIPI1_CLKN, a data 0 channel positive line MIPI1_D0P, and a data 0 channel positive line MIPI1_D0N. Data line MIPI2 may include a clock signal positive line MIPI2_CLKP, a clock signal negative line MIPI2_CLKN, a data 0 channel positive line MIPI2_D0P, and a data 0 channel positive line MIPI2_D0N.

[0162] In this embodiment, the clock signal positive line MIPI1_CLKP, the clock signal negative line MIPI1_CLKN, the data 0 channel positive line MIPI1_D0P, and the data 0 channel positive line MIPI1_D0N transmit various signals from the first control circuit 710 to the drive circuit 730. The clock signal positive line MIPI2_CLKP, the clock signal negative line MIPI2_CLKN, the data 0 channel positive line MIPI2_D0P, and the data 0 channel positive line MIPI1_D0N transmit various signals from the second control circuit 720 to the drive circuit 730.

[0163] The stacked structure of the display device is illustrated by way of example with reference to Figures 8A, 8B and 8C.

[0164] Figure 8A shows a schematic diagram of the stacking of a display device according to an embodiment of the present disclosure.

[0165] As shown in Figure 8A, the TDDIC (driver circuit) leads the data lines MIPI1 and MIPI2 to the pins of the FOP. Both the TDDIC and the FOP can be located in the non-display area of ​​the display panel.

[0166] The TDDIC includes multiple pins associated with data lines MIP1 and MIPI2, such as the positive terminal for the MIPI interface clock signal MIPI_CLKP, the negative terminal for the MIPI interface clock signal MIPI_CLKN, the positive terminal for MIPI interface data channel 0 MIPI_D0P, and the positive terminal for MIPI interface data channel 0 MIPI_D0N. Each pin leads to a set of MIPI data lines associated with data lines MIPI1 and MIPI2.

[0167] For example, a set of MIPI interface clock signal positive terminal MIPI_CLKP, MIPI interface clock signal negative terminal MIPI_CLKN, MIPI interface data channel 0 positive terminal MIPI_D0P, and MIPI interface data channel 0 positive terminal MIPI_D0N can lead out a set of MIPI data lines for data line MIPI1, and another set of MIPI interface clock signal positive terminal MIPI_CLKP, MIPI interface clock signal negative terminal MIPI_CLKN, MIPI interface data channel 0 positive terminal MIPI_D0P, and MIPI interface data channel 0 positive terminal MIPI_D0N can lead out a set of MIPI data lines for data line MIPI2.

[0168] Figure 8B shows a schematic diagram of the stacking of a display device according to another embodiment of the present disclosure.

[0169] As shown in Figure 8B, the FOP board is bonded to the MFPC, and data lines MIPI1 and MIPI2 cross the FOP board and the MFPC and are connected to the BTB.

[0170] The MFPC includes a first region S1 and a second region S2. The shape of the first region S1 can be consistent with the shape of the display device. The second region S2 can be an extension of the first region S1, and the second region S2 can be bent to overlap with the first region S1 to reduce the projected area of ​​the MFPC.

[0171] Figure 8C shows a schematic diagram of the stacked structure of a display substrate according to another embodiment of the present disclosure.

[0172] As shown in Figure 8C, MPFC includes routing layer Layer1, routing layer Layer2, and routing layer Layer3.

[0173] Data lines MIP1, MIPI2, and BTB can be located on Layer 2. The area of ​​the MFPC bonded to the FOP is also located on Layer 2. Layer 1 can house capacitors and flash memory, while Layer 3 can house power lines, etc.

[0174] Figure 9 shows a schematic diagram of the structure of a display device according to another embodiment of the present disclosure.

[0175] As shown in Figure 9, the display device 900 includes a first control circuit 910, a second control circuit 920, a drive circuit 930, a display panel 940, a circuit board 960, a connector 970, data lines MIPI1 and MIPI2, a select signal line MIPI_SEL, and a pull-down resistor R.

[0176] In this embodiment, the first control circuit 910, the second control circuit 920, the drive circuit 930, and the display panel 940 can be referenced to the first control circuit 110, the second control circuit 120, the drive circuit 130, and the display panel 140 described above. The circuit board 960, the connector 970, the selection signal line MIPI_SEL, and the pull-down resistor R can be referenced to the circuit board 760, connector 770, selection signal line MIPI_SEL, and pull-down resistor R shown in FIG. 7. For simplicity, similar parts will not be described again.

[0177] In this embodiment, the first control circuit 910 is electrically connected to the drive circuit 930 via data line MIPI2, and the second control circuit 920 is electrically connected to the drive circuit 930 via data line MIPI1. Data line MIPI2 can be the first data line LD1 described above, and data line MIPI1 can be the second data line LD2 described above.

[0178] In this embodiment, the first control circuit 910 is electrically connected to the drive circuit 930 via data line MIPI2, which is the second data line LD2 described above. When the selection signal level is high (the first level is high at this time), the first control circuit 910 sends a first data signal to the drive circuit 930 via data line MIPI1.

[0179] In this embodiment of the disclosure, the target power supply voltage of the target power supply V is 1.8V. When the display panel 940 is powered on, the level of the selection pin can be set to 1.8V, and the level of the selection signal is 1.8V (high level). In response to the high level of the selection signal, the first control circuit 910 is communicatively connected to the drive circuit 930 via the data line MIPI1.

[0180] Figure 10A shows a timing diagram of signals according to another embodiment of the present disclosure, and Figure 10B shows a timing diagram of signals according to another embodiment of the present disclosure. Figure 10A shows the signal timing of the display panel 940 switching from a first display mode 1 to a second display mode 2, and Figure 10B shows the signal timing of the display panel 940 switching from the second display mode 2 to the first display mode 1. The first display mode 1 is NBM mode, and the second display mode 2 is AOD mode.

[0181] In this embodiment of the disclosure, the process of switching the display panel 940 shown in FIG10A from the first display mode to the second display mode can be referred to the preceding description regarding FIG3B. The process of switching the display panel 940 shown in FIG10B from the second display mode to the first display mode can be referred to the preceding description regarding FIG4B. For the sake of brevity, similar parts will not be described again.

[0182] It should be noted that in the first display mode, the selection signal se1 is high, and the data line MIPI2 is the transmission line, through which the first control circuit 910 and the drive circuit 930 are communicatively connected. In the second display mode, the selection signal sel is low, and the data line MIPI1 is the transmission line, through which the second control circuit 920 and the drive circuit 930 are communicatively connected.

[0183] In this embodiment, the selection signal sel indicates whether data lines MIPI1 and MIPI2 transmit data signals. For example, a low level of the selection signal sel indicates that data line MIPI1 transmits data signals, and a high level of the selection signal sel indicates that data line MIPI2 transmits data signals. Therefore, when the first control circuit is electrically connected to data line MIPI1 and the second control circuit is electrically connected to data line MIPI2, the selection signal sel is low in the first display mode and high in the second display mode. When the first control circuit is electrically connected to data line MIPI2 and the second control circuit is electrically connected to data line MIPI1, the selection signal sel is high in the first display mode and low in the second display mode.

[0184] Figure 11 shows a schematic flowchart of a display method according to an embodiment of the present disclosure.

[0185] As shown in Figure 11, the display method includes steps S1110 and S1120.

[0186] In the embodiments of this disclosure, the display method can be applied to the display devices 100, 300, 400, 500, 600, 700 and 900 described above.

[0187] In operation S1110, in response to the selection signal being at the first level, the first control circuit is controlled to send a first data signal to the display panel via the first data line to drive the display panel to display in the first display mode.

[0188] In operation S1120, in response to the selection signal being at the second level, the second control circuit is controlled to send a second data signal to the display panel via the second data line to drive the display panel to display in the second display mode.

[0189] In the embodiments disclosed herein, steps S1110 and S1120 are similar to the operations performed by the display devices 100, 300, 400, 500, 600, 700 and 900 described above, and will not be repeated here.

[0190] In this embodiment of the disclosure, the display method further includes: in response to a first switching instruction, controlling the first data line to switch from a first transmission mode to a second transmission mode, and controlling the selection signal to switch from a first level to a second level; and in response to the selection signal being at the second level, controlling the second data line to switch from the second transmission mode to the first transmission mode.

[0191] In this embodiment of the disclosure, the display method further includes: in response to a first switching instruction, controlling the first data line to switch from a first transmission mode to a second transmission mode; after a first duration, controlling the first level of the selection signal to switch to a second level; and in response to the selection signal being at the second level, after a second duration, controlling the second data line to switch from the second transmission mode to the first transmission mode.

[0192] In this embodiment of the disclosure, the display method further includes: in response to a second switching instruction, controlling the second data line to switch from a first transmission mode to a second transmission mode, and controlling the selection signal to switch from a second level to a first level; and in response to the selection signal being at the first level, controlling the first data line to switch from the second transmission mode to the first transmission mode.

[0193] In this embodiment of the disclosure, the display method further includes: in response to a second switching instruction, controlling the second data line to switch from a first transmission mode to a second transmission mode; after a first duration, controlling the second level of the selection signal to switch to a first level; and in response to the selection signal being at the first level, controlling the second data line to switch from the second transmission mode to the first transmission mode after a second duration.

[0194] In this embodiment of the disclosure, the display method further includes: after the display panel is powered on, controlling the selection signal to a first level; and in response to the first level of the selection signal, driving the display panel to display in a first display mode through a first data line and a first control circuit.

[0195] In this embodiment of the disclosure, the display method further includes: a first data line transmitting a first data signal at a first rate, and a second data line transmitting a second data signal at a second rate, wherein the first rate is greater than the second rate.

[0196] The block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram or flowchart, and combinations of blocks in the block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0197] Those skilled in the art will understand that the features described in the various embodiments and / or claims of this disclosure can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in this disclosure. In particular, the features described in the various embodiments and / or claims of this disclosure can be combined and / or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0198] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. The scope of this disclosure is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this disclosure, and all such substitutions and modifications should fall within the scope of this disclosure.

Claims

1. A display device comprising: a display panel; a driving circuit; a first control circuit electrically connected with the driving circuit via a first data line, configured to send a first data signal to the driving circuit via the first data line in response to a selection signal from the driving circuit being at a first level, and make the driving circuit drive the display panel to display in a first display mode; a second control circuit electrically connected with the driving circuit via a second data line, configured to send a second data signal to the driving circuit via the second data line in response to the selection signal being at a second level, and make the driving circuit drive the display panel to display in a second display mode; wherein a display power of the display panel in the first display mode is greater than a display power of the display panel in the second display mode.

2. The display device of claim 1, wherein: the first control circuit is further configured to send a first switching instruction to the second control circuit, the first switching instruction indicating switching from the first display mode to the second display mode, and control the first data line to switch from a first transmission mode to a second transmission mode, the first transmission mode having a greater transmission power than the second transmission mode; and the second control circuit is further configured to switch the selection signal from the first level to the second level in response to the first switching instruction, and control the second data line to switch from the second transmission mode to the first transmission mode.

3. The display device of claim 2, wherein, the second control circuit is further configured to: switch the selection signal from the first level to the second level after a first time duration elapses in response to the first switching instruction; and control the second data line to switch from the second transmission mode to the first transmission mode after a second time duration elapses while the selection signal is at the second level.

4. The display device of claim 2, wherein: the first control circuit is further configured to stop sending the first data signal to the driving circuit in response to the first data line switching from the first transmission mode to the second transmission mode; the second control circuit is further configured to send the second data signal to the driving circuit via the second data line in response to the second data line switching from the second transmission mode to the first transmission mode.

5. The display device of claim 2, wherein: the first control circuit is further configured to send the first switching instruction to the driving circuit via the first data line; and the driving circuit is further configured to switch a first unit from an active state to a dormant state and switch a second unit from a dormant state to an active state in response to the first switching instruction, wherein the first unit of the driving circuit is used to process the first data signal, and the second unit of the driving circuit is used to process the second data signal.

6. The display device of claim 1, wherein: ​ ​ The second control circuit is further configured to send a second switching instruction to the first control circuit, the second switching instruction instructing switching from the second display mode to the first display mode, and control the second data line to switch from a first transmission mode to a second transmission mode, the first transmission mode having a transmission power greater than that of the second transmission mode. And The first control circuit is further configured to, in response to the second switching instruction, switch the selection signal from the second level to the first level, and control the first data line to switch from the second transmission mode to the first transmission mode.

7. The display device of claim 6, wherein, The first control circuit is further configured to: in response to the second switching instruction, switch the selection signal from the second level to the first level after a first time duration elapses; and in response to the selection signal being at the first level and a second time duration elapsing, control the first data line to switch from the second transmission mode to the first transmission mode.

8. The display device of claim 6, wherein The second control circuit is further configured to, in response to the second data line switching from the first transmission mode to the second transmission mode, stop sending the second data signal to the driving circuit; The first control circuit is further configured to, in response to the first data line switching from the second transmission mode to the first transmission mode, send the first data signal to the driving circuit via the first data line.

9. The display device of claim 6, wherein The second control circuit is further configured to send the second switching instruction to the driving circuit via the second data line; and The driving circuit is further configured to, in response to the second switching instruction, control a first unit of the driving circuit to switch from a sleep state to an active state, and control a second unit of the driving circuit to switch from the active state to the sleep state, wherein the first unit of the driving circuit is configured to process the first data signal, and the second unit of the driving circuit is configured to process the second data signal. The selection signal is transmitted from the driving circuit to the first control circuit and the second control circuit via a selection signal line, respectively.

10. The display device according to claim 1, wherein Further comprising:

11. The display device according to claim 1, wherein a register configured to store the selection signal written by the first control circuit, wherein the selection signal is transmitted from the driving circuit to the first control circuit via a selection signal line, and the second control circuit reads the selection signal from the register. The driving circuit comprises:

12. The display device according to claim 8 or 9, wherein a selection pin electrically connected to a first end of the selection signal line and a first end of a pull-down resistor, a second end of the pull-down resistor being electrically connected to a target power supply, a target power voltage of the target power supply being consistent with the first level.

13. The display device of claim 1, wherein The first data line transmits the first data signal at a first rate, and the second data line transmits the second data signal at a second rate, wherein the first rate is greater than the second rate.

14. The display device of claim 1, wherein ​ The first control circuit is further configured to control the selection signal to be the first level when the display panel is powered on, and the first control circuit is in communication with the driving circuit via the first data line.

15. A display method applied to the display device according to any one of claims 1 to 14, the method comprising: in response to the selection signal being the first level, controlling the first control circuit to send a first data signal to the display panel via the first data line, so as to drive the display panel to display in a first display mode; and in response to the selection signal being the second level, controlling the second control circuit to send a second data signal to the display panel via the second data line, so as to drive the display panel to display in a second display mode.

16. The display method according to claim 15, further comprising: in response to the first switching instruction, controlling the first data line to switch from the first transmission mode to the second transmission mode, and controlling the selection signal to switch from the first level to the second level; and in response to the selection signal being the second level, controlling the second data line to switch from the second transmission mode to the first transmission mode.

17. The display method according to claim 15, further comprising: in response to the first switching instruction, controlling the first data line to switch from the first transmission mode to the second transmission mode; after a first time duration, controlling the selection signal to switch from the first level to the second level; and in response to the selection signal being the second level, after a second time duration, controlling the second data line to switch from the second transmission mode to the first transmission mode.

18. The display method according to claim 15, further comprising: in response to the second switching instruction, controlling the second data line to switch from the first transmission mode to the second transmission mode, and controlling the selection signal to switch from the second level to the first level; and in response to the selection signal being the first level, controlling the first data line to switch from the second transmission mode to the first transmission mode.

19. The display method according to claim 15, further comprising: in response to the second switching instruction, controlling the second data line to switch from the first transmission mode to the second transmission mode; after a first time duration, controlling the selection signal to switch from the second level to the first level; and in response to the selection signal being the first level, after a second time duration, controlling the second data line to switch from the second transmission mode to the first transmission mode.

20. The display method according to claim 15, further comprising: after the display panel is powered on, controlling the selection signal to be the first level; and in response to the selection signal being the first level, driving the display panel to display in the first display mode via the first data line and the first control circuit.

21. The display method according to claim 15, further comprising: ​ ​ The first data line transmits the first data signal at a first rate and the second data line transmits the second data signal at a second rate, wherein the first rate is greater than the second rate.

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