System and method for performing uncertainty analysis
The use of Self-Organizing Maps for uncertainty analysis addresses scalability and accessibility issues in UQ, providing non-experts with visual and textual tools to assess and communicate design uncertainties, enhancing decision-making and reducing risks.
Patent Information
- Application Number
- PCT/EP2025/071900
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-31
- Filing Date
- 2025-07-30
- Publication Date
- 2026-02-05
AI Technical Summary
Existing uncertainty quantification (UQ) techniques face challenges in scalability and accessibility for higher dimension inputs, and there is a gap in visualization tools that accurately depict complex multidimensional feasible design spaces while incorporating uncertainties around constraint boundaries.
A system and method utilizing Self-Organizing Maps (SOMs) for uncertainty analysis, including interpretable SOMs (iSOMs) to visualize uncertainties in design spaces, with color-coded component planes and natural language generation for non-expert communication, enabling risk assessment and feasible design space identification.
Enables non-experts to effectively quantify and visualize uncertainties in product design, improving decision-making by making UQ more accessible and transparent, reducing risks and costs associated with uncertainty in design choices.
Smart Images

Figure EP2025071900_05022026_PF_FP_ABST
Abstract
Description
[0001] Description
[0002] SYSTEM AND METHOD FOR PERFORMING UNCERTAINTY ANALYSIS
[0003] Technical field
[0004] The present disclosure relates to the field of design optimization, and more particularly relates to a system and method for performing uncertainty analysis in relation to a product design.
[0005] Background
[0006] Uncertainty Quantification (UQ) is a process that quantifies the uncertainty in input parameters, models, and simulations, providing a spectrum of potential outcomes or predictions, each with its associated probabilities or confidence intervals. This enables decision-makers to make informed decisions, taking into account inherent uncertainties, and manage risks more effectively. Despite its value and wide-ranging applications in various fields, UQ's adoption is not consistent across all domains. This is due to the complexity and mathematical intensity of UQ techniques, which can be challenging to implement for those lacking expertise in statistics or mathematical modelling. The communication of uncertainty analysis results and their implications to nonexperts can also be challenging. For uncertainty analysis to influence decision-making, effective communication to various stakeholders is crucial.
[0007] In this context, visualization becomes vital in conveying uncertainty in an understandable way. Current research in the field of visualization, particularly regarding uncertainty quantification and constraint interaction in optimization problems, reveals a significant gap in accessible tools designed for visualizing the design space. This gap underscores the urgent need for advancements in visualization techniques that can accurately depict complex, multidimensional feasible design spaces while incorporating and visualizing uncertainties associated with various parameters and around constraint boundaries. Existing visualization techniques face challenges in representing global uncertainty patterns across entire datasets. Further, existing UQ techniques used for uncertainty visualization face scalability issues for higher dimension inputs.
[0008] In light of the above, there exists a need for an improved system and method for performing uncertainty analysis in relation to product design.
[0009] Summary
[0010] Variously disclosed embodiments comprise methods and computer systems that may be used to perform uncertainty analysis in relation to product design. In an embodiment, A computer-implemented method of performing uncertainty analysis in relation to a product design is disclosed. The method includes receiving, by a processor, an input indicative of one or more design variables associated with an objective function from an input device. In an embodiment, the input further comprises one or more constraints associated with the objective function.
[0011] The method further includes sampling an unconstrained design space corresponding to the one or more design variables to generate a set of primary samples. In an embodiment, sampling the unconstrained design space includes generating a design of experiments based on the one or more design variables using a sampling technique. The unconstrained design space is sampled using a sampling technique from a set of sampling techniques comprising at least one of Latin Hypercube Sampling, uniform sampling, random sampling, stratified sampling and adaptive sampling. In a further embodiment, the method further includes selecting the sampling technique from a set of sampling techniques based on a nature of the unconstrained design space.
[0012] The method further includes initializing an interpretable Self-Organizing Map (iSOM) based on the generated set of primary samples. In an embodiment, initializing the interpretable SelfOrganizing Map based on the generated set of primary samples includes applying a dimensionality reducing technique to the plurality of primary samples to generate an input space in a two-coordinate system. Further, weights of the interpretable Self-Organizing Map are initialized based on the input space in the two -co ord in ate system.
[0013] The method further includes generating a plurality of secondary samples for each of the primary samples, from a predefined random variable distribution having the primary sample as mean and computing an objective function value corresponding to each of the secondary samples. In an embodiment, the objective function value corresponding to the secondary sample is computed by determining a metamodel relating the one or more design variables to the objective function, based on the design of experiments; and using the metamodel to compute the value of the objective function corresponding to each of the secondary samples
[0014] The method further includes duplicating the initialized interpretable Self-Organizing Map and training the duplicated interpretable Self-Organizing Maps separately based on each of the secondary samples and the objective function value corresponding to the secondary sample, to generate a plurality of trained interpretable Self-Organizing Maps. The method further includes training a final interpretable Self-Organizing Map based on variations in weight vectors associated with the plurality of trained duplicated interpretable Self-Organizing Maps. The method further includes generating a component plane indicative of a color-coded visualization of uncertainties in each of the design variables and the objective function based on the final interpretable Self-Organizing Map, on a graphical user interface. In an embodiment, generating the component plane indicative of the uncertainties in the design variable further includes applying the one or more constraints to the component plane of each of the design variables and the objective function to identify a feasible design space from the unconstrained design space. Further, the graphical user interface is updated to display a colour-coded visualization of the feasible design space.
[0015] In another embodiment of the present invention, the method further includes providing the component planes of the one or more design variables and the objective function, as input to a natural language generation model, wherein the natural language generation model is trained to generate textual inferences based on the component planes. Further, the textual inferences are outputted on the graphical user interface.
[0016] In yet another embodiment of the present invention, the method further includes computing a risk metric associated with a product design based on the component planes of the one or more design variables and the objective function, wherein the product design corresponds to a design point in the unconstrained design space.
[0017] According to a second aspect of the invention, a computer system may be arranged and configured to execute the steps of the computer-implemented method according to the first aspect of the invention.
[0018] According to a third aspect of the invention, a computer program product may comprise computer program code which, when executed by the computer system according to the second aspect of the invention, causes the computer system to carry out the method according to the first aspect of the invention.
[0019] According to a fourth aspect of the invention, a computer-readable medium may comprise the computer program product according to the third aspect of the invention. By way of example, the described computer-readable medium may be non-transitory and may further be a software component on a storage device.
[0020] The foregoing has outlined rather broadly the technical features of the present disclosure so that those skilled in the art may better understand the detailed description that follows. Additional features and advantages of the disclosure will be described hereinafter that form the subject of the claims. Those skilled in the art will appreciate that they may readily use the conception and the specific embodiments dis-closed as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. Those skilled in the art will also realize that such equivalent constructions do not depart from the spirit and scope of the disclosure in its broadest form.
[0021] Also, before undertaking the detailed description below, various definitions for certain words and phrases are provided throughout this patent document and those of ordinary skill in the art will understand that such definitions apply in many, if not most, instances to prior as well as future uses of such defined words and phrases. While some terms may comprise a wide variety of embodiments, the appended claims may expressly limit these terms to specific embodiments.
[0022] Brief description of figures
[0023] FIGS 1 A-1 B illustrate structure of Self-Organizing Maps;
[0024] FIG 2 illustrates a functional block diagram of an example computer system or data processing system for performing of uncertainty analysis, in accordance with an embodiment of the present invention;
[0025] FIG 3 shows a graphical representation of a mathematical function;
[0026] FIGS 4A-D shows component plane plots highlighting uncertainty in the mathematical function;
[0027] FIG 5 shows a flowchart of a method for performing uncertainty analysis in relation to a product design, in accordance with an embodiment of the present invention; and
[0028] FIG 6 illustrates a block diagram of a data processing system, in accordance with an embodiment of the present invention.
[0029] Detailed description
[0030] Various technologies that pertain to systems and methods for performing uncertainty analysis in relation to a product design will now be described with reference to the drawings, where like reference numerals represent like elements throughout. The drawings discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged apparatus. It is to be understood that functionality described as being carried out by certain system elements may be performed by multiple elements. Similarly, for instance, an element may be configured to perform functionality described as being carried out by multiple elements. The numerous innovative teachings of the present patent document will be described with reference to exemplary non-limiting embodiments.
[0031] In the present document, an approach is suggested to performing uncertainty analysis in relation to a product design, within a simulation environment. The term ‘simulation environment’ as used herein refers to a programming environment of a computer system that enables execution of system simulations based on requirements of a user. The simulation environment facilitates running of model-based experiments based on discrete event simulation, dynamic simulation and process simulations. The simulations may be associated with a product, process, a plant or an event.
[0032] Non-limiting examples of products include vehicles, Computerized Numerical Control machines, electromechanical systems (such as motors, generators etc.), cars, trains, gas turbines, wind turbines, electronic devices, electrical appliances, embedded systems, aerospace systems and components, etc. Non-limiting examples of processes include batch manufacturing processes, continuous manufacturing processes, chemical reactions etc. Non-limiting examples of plants include chemical plants, manufacturing plants, food processing plants, and petrochemical refineries.
[0033] Uncertainty analysis typically requires expertise in statistics and / or probability theory on the part of a user. Novices may typically require extensive trainings on statistics and / or probability theory to interpret uncertainties in a design space. It may be appreciated that novices or users with low experience in performing uncertainty analysis may benefit from a computer system that enables them to visualize uncertainties in a design space associated with a product design and / or provides natural language explanations related to the uncertainty analysis of the design space.
[0034] To enable uncertainty quantification in a design space associated with a product design, the present invention utilizes Self Organizing Maps (SOMs) that provides a visual representation of the uncertainties in the design space and a feasibility of the design space. Referring to FIG 1 A, a SOM 102 is a type of Artificial Neural Network based on an unsupervised learning approach that provides a mapping from an n-dimensional input 104 to a low-dimensional, generally two- dimensional, space 106. Such mapping preserves the topology of the data so that similar data points are mapped to nearby locations on the SOM 102, and conserves relative distances between input data points in the n-dimensional input and in the low-dimensional space. The SOM 102 comprises nodes (neurons) associated with a weight vector wj whose dimension is the same as the input data vectors. Each of the nodes is connected to its adjacent nodes in the SOM 102 by a neighborhood relation which is a decreasing function of time. The connected nodes thus define a topology or structure of the SOM 102. The number of nodes in the SOM 102 is usually different from the length of the input vector. The nodes of the SOM 102 are usually arranged in a 2D space using a hexagonal or rectangular topology as shown in FIG 1A. If there are n design variables namely x = [x1 , x2, . . . xn] and a response y, each input vector to SOM may be denoted as vi = [x1 i, x2i, . . ., xni, yi] and each SOM node may have a weight vector wj = [m1j, m2j, . . . , mnj, myj], wherein the first n weights m1j, m2j, . . . , mnj correspond to the n design variables and the last weight myj corresponds to the response y. It may be understood that a dimension of the weight vector wj corresponding to each node in the SOM 102 is (n + 1 ) which is the same as the dimension of the input vector vi. The weights wj may be initialized by random or linear initialization. Random initialization refers to assigning random values to weight vectors whereas linear initialization takes advantage of principal component analysis (PCA) of the input 104 to generate the two-dimensional input 106. Upon performing Principal Component Analysis (PCA), eigenvectors and their corresponding eigenvalues are obtained. By selecting the two largest eigenvalues and their associated eigenvectors, the dimensionality is effectively reduced to two. This results in a 2-dimensional space from which initialization weight vectors can be chosen. This deterministic initialization method, as opposed to random initialization, provides greater control over the Self-Organizing Map (SOM) computation. The weights are initialized to lie in the same input space that is spanned by two eigen-vectors corresponding to the largest eigenvalues of the input data. FIG 1 B shows weights of the SOM 102 initialized based on a specific input.
[0035] Training of the SOM is an iterative process which consists of drawing a sample (data point) from the input data set to find a winning node by means of a similarity measure and updating the weights of the winning node and neighboring nodes of the winning node. This process is repeated for all the samples. Upon training, the SOM follows the shape of the input space. In general, a SOM uses a unified distance matrix (U-matrix) to store an average distance of each node to its neighbors. More particularly, training a SOM algorithm iteratively consists of choosing a winner node called a Best Matching Unit (BMU) that has the least distance from the selected data point in the n-dimensional input space as shown in FIG 1 B. The BMU, usually denoted as wci, is a weight vector that best matches a given input vector vi chosen at random. It is defined formally in equation (1 ) as the node for which c = argmiiij
[0036] Upon identifying the BMU, the weight vector of j-th node and the corresponding neighboring nodes are modified based on following update rule in equation (2): where t denotes iteration;
[0037] (ci, j, t) is a non-increasing neighborhood function around the winner node wci for the j- th node at iteration step t for the i-th input vector; and
[0038] L(t) is learning rate which is a decreasing function of iteration.
[0039] During the update procedure, the BMU is updated closer to the sample vector vi in the input space. The topological neighbors of the best-matching unit are also similarly updated. This update procedure stretches the BMU and its topological neighbors (nodes) towards the sample vector as shown in FIG 1 C. This concludes iteration t = 1 . The above steps are repeated for each sample i e [1 , N], where N is the total number of data points in the dataset.
[0040] The BMU selection and updating process is repeated until a prescribed number of iterations or error convergence metrics are reached. The output of the iterative algorithm is a trained conventional SOM (SOM) whose weights are used to construct a U-matrix and component plane plots. The U-matrix is a plot that captures the distances between the nodes in every dimension. It provides a local distance structure of a topology preserving projection of a high-dimensional data set, which is sufficient to detect cluster boundaries. U-matrix is composed of the distances from the nodes to its nearest neighbors which can be visualized in various ways, but most often a color map is used to visualize the distance values. Low values denote that the nodes are closer to each other, while high values convey cluster borders where the values are rapidly changing. A component plane plot (or simply component plane) is a two-dimensional grid that shows values of a particular dimension (or feature) of the data across the nodes of the SOM. Each feature of the input data has its own component plane. In the component plane, each node has the same position regardless of which feature is being visualized, making it easy to compare different features. For example, if the SOM is trained to obtain the weights [mx, my, mf] on the data with columns [x, y, f(x, y)], the x component plane represents values of mx; y component plane represents values of my and so on. Component planes with similar appearances indicate the correlation of their respective variables. The tendency of SOM to fold and self-intersect affects decision space visualization and interpretation. Interpretable SOM (iSOM) prevents folds and self-intersections while preserving the topography of the approximated function, making it inherently interpretable. In iSOM, BMUs are chosen solely based on data from the input space, as opposed to both input and output values in the SOM. For finding BMUs in iSOM, Equation (1 ) is used, where vi contains the design variables [x1 i, x2i, . . . , xni] and wj = [m1j, m2j, . . . , mnj] for j-th node, where n is the number of design variables. It’s worth noting that when calculating BMU (node ci), iSOM ignores response yi and its weight myj, as shown in FIG 1 B. Then, using an update law as shown in equations (3) and (4), weights of the respective node and those in its neighborhood are modified.
[0041] In iSOM, the update process involves only the response values y and not the input variables. This modification in iSOM helps prevent folds and intersections, as shown in FIG 1 D. Furthermore, the component plane plots are also in an ordered manner, making comparison and comprehension of component planes easier.
[0042] FIG 2 illustrates a functional block diagram of an example computer system or data processing system 200 for performing uncertainty analysis, in accordance with an embodiment of the present invention.
[0043] The computer system 200 may include a simulation platform 202 including at least one processor 204 that is configured to execute at least one uncertainty analysis module 206 from a memory 208 accessed by the processor 204. Herein, the simulation platform 202 may include functionalities of performing uncertainty analysis by, for example, receiving an input indicative of one or more design variables associated with an objective function from an input device, sampling an unconstrained design space corresponding to the one or more design variables to generate a set of primary samples, initializing an interpretable Self-Organizing Map based on the generated set of primary samples, generating a plurality of secondary samples for each of the primary samples, from a predefined random variable distribution having the primary sample as mean and computing an objective function value corresponding to each of the secondary samples, duplicating the initialized iSOM and training the duplicated iSOMs separately based on each of the secondary samples and the objective function value corresponding to the secondary sample, to generate a plurality of trained iSOMs, training a final iSOM based on variations in weight vectors associated with the plurality of trained duplicated iSOMs, and generating a component plane indicative of a color-coded visualization of uncertainties in each of the design variables and the objective function based on the final iSOM, on a user interface. The uncertainty analysis module 206 may be configured (i.e., programmed) to cause the processor 204 to carry out various acts and functions described herein. For example, the described uncertainty analysis module 206 may include and / or correspond to one or more components of the simulation platform 202 that is configured to perform uncertainty quantification.
[0044] By way of example, the simulation platform 202 may be cloud-based, internet-based and / or be operated by a provider of simulation tools. The user may be located close to the simulation platform 202 or remote to the simulation platform 202, e.g., using a workstation for connecting to the simulation platform 202, e.g., via the internet, wherein the workstation may include an input device 212 and a display device 214. In some examples, the simulation platform 202 may be installed and run on a user’s device, such as a computer, laptop, pad, on-premises computing facility, or the like.
[0045] Examples of product systems that may be adapted to include the features described herein may include product systems in-stalled with a simulation software such as Simcenter HEEDS from Siemens. However, it should be appreciated that the systems and methods described herein may also be used in other product systems that support simulations.
[0046] To enable uncertainty quantification in relation to a product space, the described product system or computer system 200 may include the at least one input device 212 and the at least one display device 214 (such as a display screen).
[0047] The described processor 204 may be configured to generate a graphical user interface (GUI) 216 through the display device 214. Such a graphical user interface 216 may include GUI elements such as buttons, links, search boxes, lists, text boxes, images, scroll bars usable by the user to provide inputs through the input device 212.
[0048] By way of example, the graphical user interface 216 may include an output user interface (Ul) 218 provided to the user for viewing one or more outputs indicative of the uncertainty in the design space. In the present embodiment, the output Ul 218 further includes an uncertainty visualization Ul 220 that enables the user to view component plane plots and natural language text based on the component plane plots. The computer system 200 further comprises a data store 222. The data store 222 stores a database 224 for storing data and / or models relevant for performing uncertainty analysis in design spaces. For example, the database may store sampled data points, metamodels, weight vectors etc.
[0049] In an embodiment, the uncertainty analysis module 206 and / or the processor 204 is configured to receive an input indicative of one or more design variables associated with the objective function from the input device 212. In an embodiment, the input further comprises one or more constraints associated with the objective function. For example, the objective function y is a standard robust optimization problem used to test the efficacy of optimization algorithms, based on two design variables x1 , x2 and a linear constraint g, as shown in equations (5) and (6). FIG 3 shows a graphical representation of the objective function y. g(x) = x2— 1.14%! + 0.3
[0050] (6)
[0051] The uncertainty analysis module 206 and / or the processor 204 is further configured to sample an unconstrained design space corresponding to the one or more design variables to generate a plurality of primary samples. Each of the primary samples represent a coordinate in the unconstrained design space formed by the one or more design variables. The plurality of primary samples form a subset of the design space. In an implementation, sampling the unconstrained design space comprises generating a design of experiments based on the one or more design variables. In an embodiment, the primary samples are generated using Latin Hypercube sampling (LHS). In another embodiment, the primary samples are generated using uniform sampling. Nonlimiting examples of other sampling techniques include random sampling, stratified sampling and adaptive sampling. In an embodiment, the sampling technique is selected from a set of sampling techniques based on a nature of the unconstrained design space or the objective function. In an embodiment, the sampling technique is predetermined for a specific nature of the objective function. For example, a user may predefine a specific sampling technique for a specific types of design problems.
[0052] The uncertainty analysis module 206 and / or the processor 204 is further configured to initialize an interpretable Self-Organizing Map based on the generated set of primary samples. The iSOM is initialized based on the primary samples as explained earlier with reference to FIGS 1 A-D. In an embodiment, the primary samples are preprocessed using a dimensionality reducing technique to reduce a dimensionality of the primary samples to a two-coordinate system. This is because iSOMs are two-dimensional in nature and therefore it is essential to transform the primary samples (input space) to a two -co ord in ate system before updating weights of the iSOM. In a preferred embodiment, the dimensionality reducing technique is Principal Component Analysis. The weights of the nodes in the initialized iSOM are used to generate the component planes for x1 , x2 and y respectively. FIG 4A shows component planes of x1 , x2 and y generated based on the initialized iSOM. In the component plane for x1 , x2, y, region 3 demonstrates that greater values of x1 and x2 correspond to higher values of y, whereas region 1 shows that lower values of x1 and x2 correspond to lower values of y. Furthermore, regions 1 and 3 are diagonally opposite one other, while regions 2 and 4 exhibit similar variation in y for changes in x1 and x2.
[0053] The uncertainty analysis module 206 and / or the processor 204 is further configured to generate a plurality of secondary samples, for each of the primary samples, from a predefined random variable distribution having the primary sample as mean and computing a value of the objective function corresponding to each of the secondary samples. In an implementation, the secondary samples may be generated based on a type of random variable distribution and standard deviation predefined by the user. For example, the standard deviation may be defined as 2 to 5% and the type of random variable distribution may be a normal distribution. The secondary samples corresponding to a value of say x1 = 6, x2 =0 is obtained by keeping the value x1 = 6, x2 =0 as the mean value, and computing the samples based on 2 to 5% deviation from the mean value. For example, 20 samples are generated around each of the primary samples based on the random variable distribution, with the primary sample kept as mean. Further, a corresponding value of the objective function y is computed for each of the secondary samples, using a metamodel. In an embodiment, the metamodel is predefined by a user. In an embodiment, computing a value of the objective function corresponding to each of the secondary samples includes determining a metamodel relating the one or more design variables to the objective function, based on the design of experiments. The metamodel is further used to compute the value of the objective function corresponding to each of the secondary samples.
[0054] The uncertainty analysis module 206 and / or the processor 204 is further configured to duplicate the initialized iSOM and train the duplicated iSOMs separately based on each of the secondary samples and the objective function value corresponding to the secondary sample, to generate a plurality of trained iSOMs. For example, if there are 20 samples, the initialized iSOM is trained to generate an iSOM trained based on each of the 20 samples. The training of iSOMs is explained w.r.t FIGS 1 A-1 D. In an embodiment, each of the iSOMs is trained based on a Euclidean distance metric corresponding to the secondary samples to identify patterns and variations in the design space.
[0055] The uncertainty analysis module 206 and / or the processor 204 is further configured to train a final iSOM based on variations in weight vectors associated with the plurality of trained duplicated iSOMs. The final iSOM is trained as explained with reference to FIGS 1 A-D earlier.
[0056] The uncertainty analysis module 206 and / or the processor 204 is further configured to generate, on the graphical user interface 216, a component plane indicative of a color-coded visualization of uncertainties in each of the design variables and the objective function, based on the final iSOM. In the present example, FIG 4B shows the component planes (also referred to as uncertainty (UQ)-matrices) for uncertainties in each of the design variables x1 , x2 and the objective function y. The color-bar associated with the UQ matrices represents a degree of uncertainty associated with the component, with the darkest shade indicating the lowest uncertainty and the lightest shade indicating the highest uncertainty. The UQ-matrix of y shows that the uncertainty is low at the center of all four regions 1 , 2, 3 and 4, increases as one moves radially outward, and is highest at the intersection of the regions. Advantageously, the UQ-matrix assists a novice user in understanding regions of high uncertainty through visualization.
[0057] In an embodiment, the uncertainty analysis module 206 and / or the processor 204 is further configured to apply the one or more constraints to the generated component planes to identify a feasible design space corresponding to the design variables. In particular, the feasible design space is shown by masking parts of the component planes based on the constraints. Further, nodes that lie near a constrain boundary between the feasible design space and the masked parts of each component plane are highlighted to indicate a risk metric associated with a data point (optima) corresponding to the respective node. In another embodiment, the uncertainty analysis module 206 and / or the processor 204 is further configured to compute a risk metric with a product design based on the component planes of the one or more design variables and the objective function. In an implementation, the risk metric is computed by analyzing a color bar measure associated with the design point in the component planes. The product design corresponds to a design point in the unconstrained design space.
[0058] FIG 4C show the component planes x1 , x2, and y with the infeasible design space masked using greyed out hexagons. The bordering hexagons of darker shade demarcating the feasible and infeasible design spaces represent design points that have a certain degree of risk of constraint violation, with a bigger size of the hexagon representing a greater degree of risk. Similarly, the component planes of the uncertainties in x1 , x2 and y2 with the infeasible design space masked using greyed out hexagons are shown in FIG 4D. The size of the bordering hexagons in region-a is larger than in region-b because region-a is at the intersection of both regions and uncertainty in y is considerable in region-a, as shown by the UQ-matrix (y) in fig.6. If the user identifies an optimum in region-a, there would be higher fluctuations in the y values and a higher risk of constraint violation because it is in a region of high uncertainty. Advantageously, the user can easily perform a risk analysis for the optima by simply observing the dark hexagons around the optima and the size of such hexagons. If the size is large, it indicates a high risk of constraint violation associated with the optima. Therefore, the user must explore another optimum that is in a lower uncertainty zone.
[0059] In an embodiment, the uncertainty analysis module 206 and / or the processor 204 is further configured to provide the component planes of the one or more design variables and the objective function, as input to a natural language generation (NLG) model. The natural language generation model is a software process that uses artificial intelligence to create written or spoken language from structured or unstructured data. In particular, NLG models use machine learning and deep learning to convert numbers into human-readable text or speech. In the present embodiment, the natural language generation model is trained to generate textual inferences based on images of the component planes. Further, the textual inferences are outputted on the graphical user interface 216. In an embodiment, the user interface 216 may be dynamically configured based on the expertise level of the user. In an implementation, the report may be generated in the form of graphical representations in case of expert users, and in the form of natural language text for novices.
[0060] Further, a computer-readable medium 260 which may comprise a computer program product 262 is shown in FIG 2, wherein the computer program product 262 may be encoded with executable instructions, that when executed, cause the computer system 200 or and / or the simulation platform 202 to carry out the described method.
[0061] FIG 5 shows a flowchart of a method 500 for performing uncertainty analysis in relation to a product design, in accordance with an embodiment of the present invention. The method may start at 502 and the methodology may comprise several method steps carried out through operation of at least one processor similar to the processor 204.
[0062] The methodology begins at 502. At step 504, an input indicative of one or more design variables associated with an objective function is received from an input device.
[0063] At step 506, an unconstrained design space corresponding to the one or more design variables is sampled to generate a set of primary samples.
[0064] At step 508, an iSOM is initialized based on the generated set of primary samples.
[0065] At step 510, a plurality of secondary samples is generated, for each of the primary samples, from a predefined random variable distribution having the primary sample as mean and computing an objective function value corresponding to each of the secondary samples.
[0066] At step 512, the initialized iSOM is duplicated and the duplicated iSOMs are trained separately based on each of the secondary samples and the objective function value corresponding to the secondary sample, to generate a plurality of trained iSOMs.
[0067] At step 514, a final iSOM is trained based on variations in weight vectors associated with the plurality of trained duplicated iSOMs.
[0068] At step 516, a component plane indicative of a color-coded visualization of uncertainties in each of the design variables and the objective function is generated based on the final iSOM, on a graphical user interface.
[0069] At 518, the methodology may end.
[0070] It should further be appreciated that the methodology 500 may comprise other acts and features discussed previously with respect to the computer-implemented method of performing uncertainty analysis.
[0071] In some examples, the methodology may further comprise the act of providing the component planes of the one or more design variables and the objective function, as input to a natural language generation model, wherein the natural language generation model is trained to generate textual inferences based on the component planes and outputting the textual inferences on the graphical user interface.
[0072] In some other examples, the methodology may further comprise the act of computing a risk metric associated with a product design based on the component planes of the one or more design variables and the objective function, wherein the product design corresponds to a design point in the unconstrained design space. As discussed previously, acts associated with these methodologies (other than any described manual acts such as an act of manually making a selection through the input device 212) may be carried out by one or more processors. Such processor(s) may be included in one or more data processing systems, for example, that execute software components operative to cause these acts to be carried out by the one or more processors. In an example embodiment, such software components may comprise computer-executable instructions corresponding to a routine, a subroutine, programs, applications, modules, libraries, a thread of execution, and / or the like. Further, it should be appreciated that software components may be written in and / or produced by software environments / languages / frameworks such as Java, JavaScript, Python, C, C#, C++ or any other software tool capable of producing components and graphical user inter-faces configured to carry out the acts and features described herein.
[0073] The suggested approach offers several advantages over other approaches. For example, the suggested approach enables users with low experience or knowledge in statistics or probability theory to perform uncertainty quantification.
[0074] The present invention utilizes SOM to analyze and visualize the uncertainty in a feasible design space and uncertainties around constraint boundaries, which may be used to quantify the risk associated with a selected optimal design point. The present invention helps decision-makers better understand the implications of uncertainty in their data and models through visualization. This aids with more robust and confident decision-making, as decision-makers can assess risks and uncertainties more effectively.
[0075] The present invention makes complex UQ techniques more accessible to a wider audience, including non-experts. This democratization enables individuals without specialized statistical or mathematical knowledge to understand and work on uncertainty problems. Further, the present invention is a novel approach for uncertainty analysis and visualization using SOM around active constraint boundaries in higher dimension. Understanding uncertainty around constraint boundaries allows for the design of robust and resilient systems, which can continue to operate effectively even in the presence of unforeseen variations or disruptions. Compared to existing approaches, this provides better insights to a user about the feasibility and infeasibility in the design space after imposing the constraints. By making UQ more accessible, organizations can avoid costly mistakes resulting from inadequate understanding of uncertainty, thereby leading to savings in terms of both time and money. Advantageously, SOMs provide a graphical representation of uncertainty that can be easily communicated to stakeholders and non-technical audiences. This can bridge the gap between experts and decision-makers. Furthermore, visualization of UQ improves transparency by showing how uncertainty is propagated through models. This transparency can improve confidence in the results and models produced.
[0076] FIG 6 illustrates a block diagram of a data processing system 1000 (also referred to as a computer system) in which an embodiment can be implemented, for example, as a part of a product system, and / or other system operatively configured by software or otherwise to perform the processes as described herein. The data processing system 1000 may include, for example, the simulation platform 202 and / or the computer system or data processing system 200 mentioned above. The data processing system 1000 depicted includes at least one processor 1002 (e.g., a CPU) that may be connected to one or more bridges / controllers / buses 1004 (e.g., a north bridge, a south bridge). One of the buses 1004, for example, may include one or more I / O buses such as a PCI Express bus. Also connected to various buses in the depicted example may include a main memory 1006 (RAM) and a graphics controller 1008. The graphics controller 1008 may be connected to one or more display devices 1010. It should also be noted that in some embodiments one or more controllers (e.g., graphics, south bridge) may be integrated with the CPU (on the same chip or die). Examples of CPU architectures include IA-32, x86-64, and ARM processor architectures.
[0077] Other peripherals connected to one or more buses may include communication controllers 1012 (Ethernet controllers, Wi-Fi controllers, cellular controllers) operative to connect to a local area network (LAN), Wide Area Network (WAN), a cellular network, and / or other wired or wireless networks 1014 or communication equipment. Further components connected to various buses may include one or more I / O controllers 1016 such as USB controllers, Blue-tooth controllers, and / or dedicated audio controllers (connected to speakers and / or microphones). It should also be appreciated that various peripherals may be connected to the I / O controller(s) (via various ports and connections) including input devices 1018 (e.g., keyboard, mouse, pointer, touch screen, touch pad, drawing tablet, trackball, buttons, keypad, game controller, gamepad, camera, microphone, scanners, motion sensing devices that capture motion gestures), output devices 1020 (e.g., printers, speakers) or any other type of device that is operative to provide inputs to or receive outputs from the data processing system. Also, it should be appreciated that many devices referred to as input devices or output de-vices may both provide inputs and receive outputs of communications with the data processing system. For example, the processor 1002 may be integrated into a housing (such as a tablet) that includes a touch screen that serves as both an input device and a display device. Further, it should be appreciated that some input devices (such as a laptop) may include a plurality of different types of input devices (e.g., touch screen, touch pad, keyboard). Also, it should be appreciated that other peripheral hardware 1022 connected to the I / O controllers 1016 may include any type of device, machine, or com-ponent that is configured to communicate with a data processing system.
[0078] Additional components connected to various buses may include one or more storage controllers 1024 (e.g., SATA). A storage controller may be connected to a storage device 1026 such as one or more storage drives and / or any associated removable media, which can be any suitable non- transitory machine usable or machine-readable storage medium. Examples include non-volatile devices, volatile devices, read only devices, writable devices, ROMs, EPROMs, magnetic tape storage, floppy disk drives, hard disk drives, solid-state drives (SSDs), flash memory, optical disk drives (CDs, DVDs, Blu-ray), and other known optical, electrical, or magnetic storage devices drives and / or computer media. Also, in some examples, a storage de-vice such as an SSD may be connected directly to an I / O bus 1004 such as a PCI Express bus.
[0079] A data processing system in accordance with an embodiment of the present disclosure may include an operating system 1028, software / firmware 1030, and data stores 1032 (that may be stored on a storage device 1026 and / or the memory 1006). Such an operating system may employ a command line interface (CLI) shell and / or a graphical user interface (GUI) shell. The graphical user interface shell permits multiple display windows to be presented in the graphical user interface simultaneously, with each display window providing an interface to a different application or to a different instance of the same application. A cursor or pointer in the graphical user inter-face may be manipulated by a user through a pointing device such as a mouse or touch screen. The position of the cursor / po inter may be changed and / or an event, such as clicking a mouse button or touching a touch screen, may be generated to actuate a desired response. Examples of operating systems that may be used in a data processing system may include Microsoft Windows, Linux, UNIX, iOS, and Android operating systems. Al-so, examples of data stores include data files, data tables, relational database (e.g., Oracle, Microsoft SQL Server), database servers, or any other structure and / or device that is capable of storing data, which is retrievable by a processor.
[0080] The communication controllers 1012 may be connected to the network 1014 (not a part of data processing system 1000), which can be any public or private data processing system network or combination of networks, as known to those of skill in the art, including the Internet. Data processing system 1000 can communicate over the network 1014 with one or more other data processing systems such as a server 1034 (also not part of the data processing system 1000). However, an alternative data processing system may correspond to a plurality of data processing systems implemented as part of a distributed system in which processors associated with several data processing systems may be in communication by way of one or more network connections and may collectively perform tasks described as being performed by a single data processing system. Thus, it is to be understood that when referring to a data processing system, such a system may be implemented across several data processing systems organized in a distributed system in communication with each other via a network.
[0081] Further, the term “controller” means any device, system or part thereof that controls at least one operation, whether such a device is implemented in hardware, firmware, software or some combination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely.
[0082] In addition, it should be appreciated that data processing systems may be implemented as virtual machines in a virtual machine architecture or cloud environment. For example, the processor 1002 and associated components may correspond to a virtual machine executing in a virtual machine environment of one or more servers. Examples of virtual machine architectures include VMware ESCi, Microsoft Hyper-V, Xen, and KVM.
[0083] Those of ordinary skill in the art will appreciate that the hardware depicted for the data processing system may vary for particular implementations. For example, the data processing system 1000 in this example may correspond to a computer, workstation, server, PC, notebook computer, tablet, mobile phone, and / or any other type of apparatus / system that is operative to process data and carry out functionality and features described herein associated with the operation of a data processing system, computer, processor, and / or a controller dis-cussed herein. The depicted example is provided for the purpose of explanation only and is not meant to imply architectural limitations with respect to the present disclosure.
[0084] Also, it should be noted that the processor described herein may be located in a server that is remote from the display and input devices described herein. In such an example, the de-scribed display device and input device may be included in a client device that communicates with the server (and / or a virtual machine executing on the server) through a wired or wire-less network (which may include the Internet). In some embodiments, such a client device, for example, may execute a remote desktop application or may correspond to a portal device that carries out a remote desktop protocol with the server to send inputs from an input device to the server and receive visual information from the server to display through a display de-vice. Examples of such remote desktop protocols include Teradici's PColP, Microsoft's RDP, and the RFB protocol. In such examples, the processor described herein may correspond to a virtual processor of a virtual machine executing in a physical processor of the server.
[0085] As used herein, the terms “component” and “system” are intend-ed to encompass hardware, software, or a combination of hard-ware and software. Thus, for example, a system or component may be a process, a process executing on a processor, or a processor. Additionally, a component or system may be localized on a single device or distributed across several devices.
[0086] Also, as used herein, the term ‘processor’ corresponds to any electronic device that is configured via hardware circuits, software, and / or firmware to process data. For example, processors described herein may correspond to one or more (or a combination) microprocessors, CPU, FPGA, ASIC, or any other integrated circuit (IC) or other type of circuit that is capable of processing data in a data processing system, which may have the form of a controller board, computer, server, mobile phone, and / or any other type of electronic device.
[0087] Those skilled in the art will recognize that, for simplicity and clarity, the full structure and operation of all data processing systems suitable for use with the present disclosure is not being depicted or described herein. Instead, only so much of a data processing system as is unique to the present disclosure or necessary for an understanding of the present disclosure is depicted and described. The remainder of the construction and operation of data processing system 1000 may conform to any of the various current implementations and practices known in the art.
[0088] Also, it should be understood that the words or phrases used herein should be construed broadly, unless expressly limited in some examples. For example, the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation. The singular forms “a”, “an” and “the” are intend-ed to include the plural forms as well, unless the context clearly indicates otherwise. Further, the term “and / or” as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. The term “or” is inclusive, meaning and / or, unless the context clearly indicates otherwise. The phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxta-pose, be proximate to, be bound to or with, have, have a property of, or the like.
[0089] Also, although the terms “first”, “second”, “third” and so forth may be used herein to describe various elements, functions, or acts, these elements, functions, or acts should not be limited by these terms. Rather these numeral adjectives are used to distinguish different elements, functions or acts from each other. For example, a first element, function, or act could be termed a second element, function, or act, and, similarly, a second element, function, or act could be termed a first element, function, or act, without departing from the scope of the present disclosure.
[0090] In addition, phrases such as “processor is configured to” carry out one or more functions or processes, may mean the processor is operatively configured to or operably configured to carry out the functions or processes via software, firmware, and / or wired circuits. For example, a processor that is con-figured to carry out a function / process may correspond to a processor that is executing the software / firmware, which is programmed to cause the processor to carry out the function / process and / or may correspond to a processor that has the software / firmware in a memory or storage device that is available to be executed by the processor to carry out the function / process. It should also be noted that a processor that is “configured to” carry out one or more functions or processes, may also correspond to a processor circuit particularly fabricated or “wired” to carry out the functions or processes (e.g., an ASIC or FPGA design). Further the phrase “at least one” before an element (e.g., a processor) that is configured to carry out more than one function may correspond to one or more elements (e.g., processors) that each carry out the functions and may also correspond to two or more of the elements (e.g., processors) that respectively carry out different ones of the one or more different functions.
[0091] Although an exemplary embodiment of the present disclosure has been described in detail, those skilled in the art will under-stand that various changes, substitutions, variations, and improvements disclosed herein may be made without departing from the spirit and scope of the disclosure in its broadest form.
[0092] None of the description in the present patent document should be read as implying that any particular element, step, act, or function is an essential element, which must be included in the claim scope: the scope of patented subject matter is defined only by the allowed claims. List of Reference
[0093] 200 computer system
[0094] 202 simulation platform
[0095] 204 processor
[0096] 206 uncertainty analysis module
[0097] 208 memory
[0098] 212 input device
[0099] 214 display device
[0100] 216 Graphical User Interface (GUI)
[0101] 218 output user interface (Ul)
[0102] 220 uncertainty visualization Ul
[0103] 222 data store
[0104] 224 database
[0105] 260 computer-readable medium
[0106] 262 computer program product 1000 data processing system 1002 processor
[0107] 1004 bridges / controllers / buses
[0108] 1006 memory
[0109] 1008 graphics controller
[0110] 1010 display devices
[0111] 1012 communication controllers
[0112] 1014 networks
[0113] 1016 I / O controllers
[0114] 1018 input devices
[0115] 1020 output devices
[0116] 1022 peripheral hardware
[0117] 1024 storage controllers
[0118] 1026 storage device
[0119] 1028 operating system
[0120] 1030 software / firmware
[0121] 1032 data stores
[0122] 1034 server
Claims
Patent claims1 . A computer-implemented method of performing uncertainty analysis in relation to a product design, the method comprising:• receiving, by a processor (204), an input indicative of one or more design variables associated with an objective function from an input device (212);• sampling an unconstrained design space corresponding to the one or more design variables to generate a set of primary samples;• initializing an interpretable Self-Organizing Map based on the generated set of primary samples;• generating a plurality of secondary samples for each of the primary samples, from a predefined random variable distribution having the primary sample as mean and computing an objective function value corresponding to each of the secondary samples;• duplicating the initialized interpretable Self-Organizing Map and training the duplicated interpretable Self-Organizing Maps separately based on each of the secondary samples and the objective function value corresponding to the secondary sample, to generate a plurality of trained interpretable Self-Organizing Maps;• training a final interpretable Self-Organizing Map based on variations in weight vectors associated with the plurality of trained duplicated interpretable Self-Organizing Maps; and• generating a component plane indicative of a color-coded visualization of uncertainties in each of the design variables and the objective function based on the final interpretable Self-Organizing Map, on a graphical user interface (216).
2. The method according to claim 1 , wherein the input further comprises one or more constraints associated with the objective function.
3. The method according to any of the preceding claims, wherein sampling the unconstrained design space corresponding to the one or more design variables to generate a set of primary samples comprises: generating a design of experiments based on the one or more design variables using a sampling technique.
4. The method according to claims 1 and 3, wherein the unconstrained design space is sampled using a sampling technique from a set of sampling techniques comprising at least one of Latin Hypercube Sampling, uniform sampling, random sampling, stratified sampling and adaptive sampling.
5. The method according to claims 1 and 4, further comprising:• selecting the sampling technique from a set of sampling techniques based on a nature of the unconstrained design space.
6. The method according to any of the preceding claims, wherein initializing the interpretable Self-Organizing Map based on the generated set of primary samples comprises:• applying a dimensionality reducing technique to the plurality of primary samples to generate an input space in a two -co ord in ate system; and• initializing weights of the interpretable Self-Organizing Map based on the input space in the two-coordinate system.
7. The method according to any of the preceding claims, wherein the objective function value corresponding to the secondary sample is computed by:• determining a metamodel relating the one or more design variables to the objective function, based on the design of experiments; and• using the metamodel to compute the value of the objective function corresponding to each of the secondary samples.
8. The method according to claims 1 and 2, wherein generating the component plane indicative of the uncertainties in the design variable further comprises:• applying the one or more constraints to the component plane of each of the design variables and the objective function to identify a feasible design space from the unconstrained design space;• updating the graphical user interface (216) to display a colour-coded visualization of the feasible design space.
9. The method according to any of the preceding claims, further comprising: providing the component planes of the one or more design variables and the objective function, as input to a natural language generation model, wherein the natural language generation model is trained to generate textual inferences based on the component planes; and outputting the textual inferences on the graphical user interface (216).
10. The method according to any of the preceding claims, further comprising:computing a risk metric associated with a product design based on the component planes of the one or more design variables and the objective function, wherein the product design corresponds to a design point in the unconstrained design space.1 1 . A computer system (200) arranged and configured to execute the steps of the computer- implemented method according to any one of the preceding claims 1 to 10.
12. A computer program product (262), comprising computer program code which, when executed by a computer system (200), cause the computer system (200) to carry out the method of one of the claims 1 to 10.
13. A computer-readable medium (260) comprising a computer program product (262) comprising computer program code which, when executed by a computer system (200), cause the computer system (200) to carry out the method of one of the claims 1 to 10.