Power conversion device

Abstract

A power conversion device (10) comprises two switching elements (31a, 31b) that are connected in parallel, first capacitors (33a, 33b) that are connected in parallel to respective parasitic capacitances (Cgsa, Cgsb), first switches (34a, 34b) that are connected in series to the first capacitors (33a, 33b), respectively, current sensors (38a, 38b) that detect respective drain currents (Ida, Idb), and a control unit that performs various types of control. On the basis of detection results from the current sensors (38a, 38b), the control unit closes the first switch (34) that is provided at the switching element (31) of the switching elements (31a, 31b) at which the rate of change in the drain current (Id) is higher while keeping the first switch (34) that is provided at the switching element (31) at which the rate of change in the drain current (Id) is lower open.

Description

Power Conversion Device

[0001] The present invention relates to a power conversion device.

[0002] Conventionally, there is known a technique for accelerating the convergence of current imbalances caused by variations in the main circuit section and the gate drive circuit without using semiconductor elements with current sense emitters or shunt resistors (see, for example, Patent Document 1).

[0003] JP 2023-72764 A

[0004] The technology disclosed in Patent Document 1 connects two switching elements in parallel and converges a current imbalance between the two switching elements. Specifically, the technology disclosed in Patent Document 1 uses an amplifier to amplify the gate voltage applied to the switching element through which a smaller current flows. However, the technology disclosed in Patent Document 1 may not be able to suppress increases in cost and packaging area due to the increase in the number of components in the power conversion device caused by the addition of an amplifier and its peripheral circuits. Furthermore, a commonly known technology for converging a current imbalance detects the slope of the current flowing through each switching element and adjusts the output of a driver circuit according to the slope. However, even if a current imbalance results, it is difficult to appropriately adjust the output of the driver circuit if the slopes temporarily match.

[0005] A power conversion device that solves the above problem includes two switching elements connected in parallel to each other, a plurality of first capacitors provided in each of the switching elements and connected in parallel to parasitic capacitance between the gate and source or between the base and emitter, a plurality of first switches connected in series to each of the plurality of first capacitors, a current sensor that detects the drain current or collector current of each of the switching elements, and a control unit that controls the first switches, and based on the detection result of the current sensor, the control unit opens the first switch provided in the switching element whose drain current or collector current changes at a small rate, and closes the first switch provided in the switching element whose drain current or collector current changes at a large rate.

[0006] According to this configuration, the first switch is controlled by the control unit, and thus the current imbalance occurring between the two switching elements can be reduced more easily than when the first switch is not controlled.

[0007] The power conversion device further includes a plurality of resistors connected in parallel between the gate terminal or base terminal of the switching element and a driver circuit that applies a gate voltage or base voltage to the gate terminal or the base terminal, and one or more second switches connected in series to at least some of the plurality of resistors, and based on the detection result of the current sensor, the control unit closes the second switches provided to switching elements of the plurality of switching elements whose drain current or collector current has a small rate of change, and opens the second switches provided to switching elements whose drain current or collector current has a large rate of change.

[0008] According to this configuration, the second switch is controlled by the control unit, and thus the current imbalance occurring between the two switching elements can be reduced more effectively than when the second switch is not controlled.

[0009] The power conversion device further includes a second capacitor connected in series to at least some of the second switches among the plurality of second switches. With this configuration, the second capacitor can electrically disconnect the resistor and the second switch without switching the second switch connected in series with the second capacitor.

[0010] In the power conversion device, the second capacitor also functions as the first capacitor. With this configuration, the current imbalance occurring between the two switching elements can be reduced with a smaller number of components.

[0011] According to the present invention, the current imbalance occurring between two switching elements can be reduced with a simple configuration.

[0012] FIG. 1 is a diagram used to explain a power conversion device. FIG. 2 is a diagram showing an example of the configuration of a switching circuit. FIG. 3 is a diagram used to explain current imbalance. FIG. 4 is a diagram used to explain the operation of the switching circuit. FIG. 5 is a diagram used to explain current imbalance. FIG. 6 is a diagram used to explain current imbalance. FIG. 7 is a diagram used to explain the operation of the switching circuit. FIG. 8 is a diagram used to explain current imbalance. FIG. 9 is a diagram showing an example of the configuration of a switching circuit of Modification 1. FIG. 10 is a diagram showing an example of the configuration of a switching circuit of Modification 2.

[0013] The present invention relates to a power conversion device, a power converter, and a power supply device.

[0014] More specifically, the electric motor 11 is a traction motor for rotating the wheels of the vehicle 200. The electric motor 11 is a three-phase motor including three coils U, V, and W. The electric motor 11 rotates when the three coils U, V, and W are energized in a predetermined pattern. The connection of the coils U, V, and W is not limited to a Y connection and may be any other connection, such as a delta connection.

[0015] 1, a vehicle 200 has a battery BA. The power conversion device 10 of this embodiment is an inverter device that converts DC power from the battery BA into AC power that can drive an electric motor 11. In other words, the power conversion device 10 can also be considered a drive device that drives the electric motor 11 using the battery BA.

[0016] The power conversion device 10 includes, for example, an inverter 20 and a control unit 100. The inverter 20 includes, for example, switching circuits 30, the number of which corresponds to the number of coil phases of the electric motor 11. In this example, the inverter 20 includes six switching circuits 30: switching circuits 30u-1, 30u-2, 30v-1, 30v-2, 30w-1, and 30u-2. In the inverter 20, the switching circuits 30 provided in the upper arms will be described with a hyphen "1" added after the reference numeral. In addition, in the inverter 20, the switching circuits 30 provided in the lower arms will be described with a hyphen "2" added after the reference numeral. In addition, in the following, the switching circuits 30 associated with the U phase will be described with a suffix "u" added after the reference numeral, the switching circuits 30 associated with the V phase will be described with a suffix "v" added after the reference numeral, and the switching circuits 30 associated with the W phase will be described with a suffix "w" added after the reference numeral. When there is no need to distinguish between the upper arm switching circuit 30 and the lower arm switching circuit 30, the hyphen and the rest of the reference numerals are omitted. When there is no need to distinguish between the U-phase, V-phase, and W-phase switching circuits 30, the suffixes "u," "v," and "w" are omitted.

[0017] The switching circuits 30-1 and 30-2 are connected in series. The series-connected body of the switching circuits 30-1 and 30-2 and the battery BA are connected in parallel. In other words, the switching circuits 30-1 and 30-2 are connected in series between the positive and negative terminals of the battery BA.

[0018] One end of a coil U is connected to the connection point between the switching circuits 30u-1 and 30u-2. One end of a coil V is connected to the connection point between the switching circuits 30v-1 and 30v-2. One end of a coil W is connected to the connection point between the switching circuits 30w-1 and 30w-2. The other end of the coil U, the other end of the coil V, and the other end of the coil W are connected to each other.

[0019] The control unit 100 is realized by, for example, a hardware processor such as a CPU (Central Processing Unit) executing a program (software). Furthermore, some or all of these components may be realized by hardware (including circuitry) such as an LSI (Large Scale Integration), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a GPU (Graphics Processing Unit), or may be realized by a combination of software and hardware. The program may be stored in advance in a storage device (not shown) that includes a non-transitory storage medium such as an HDD (Hard Disk Drive) or flash memory.

[0020] The storage device may be realized by any of the above, or by an EEPROM (Electrically Erasable Programmable Read Only Memory), a ROM (Read Only Memory), a RAM (Random Access Memory), or the like.

[0021] The control unit 100 executes various controls on the inverter 20. Specifically, the control unit 100 outputs a gate signal to a driver circuit included in the switching circuit 30. The switching circuit 30 operates based on the gate signal output from the control unit 100 to drive the electric motor 11.

[0022] 2, the switching circuit 30 includes two switching elements 31a and 31b connected in parallel, various components corresponding to the switching elements 31a and 31b and peripheral to the switching elements 31a and 31b, and a driver circuit 40. In the following description, the reference numerals of the various components related to the switching element 31a will be suffixed with "a," and the reference numerals of the various components related to the switching element 31b will be suffixed with "b." Furthermore, when there is no need to distinguish between the various components related to the switching element 31a and the various components related to the switching element 31b, the suffixes "a" and "b" will be omitted.

[0023] The switching circuit 30 includes, for example, various components corresponding to the switching elements 31a and 31b, such as diodes 32a and 32b, first capacitors 33a and 33b, first switches 34a and 34b, first resistors 35a and 35b, second resistors 36a and 36b, second switches 37a and 37b, and current sensors 38a and 38b. The peripheral circuits of the switching elements 31a and 31b have similar configurations. Details of the peripheral circuits of the switching elements 31a will be described below. For details of the peripheral circuits of the switching elements 31b, in the following description, the suffix "a" should be replaced with "b."

[0024] The switching element 31a and the diode 32a are connected in parallel to each other. Specifically, the switching element 31a and the diode 32a are integrated and implemented by a metal-oxide-semiconductor field-effect transistor (MOSFET). That is, the diode 32a is implemented by the body diode of the switching element 31a. The cathode of the diode 32a is connected to the drain terminal of the switching element 31a, and the anode of the diode 32a is connected to the source terminal of the switching element 31a.

[0025] The first capacitor 33a and the first switch 34a are connected in series. One end of the first capacitor 33a is connected to the gate terminal of the switching element 31a. The other end of the first capacitor 33a is connected to one end of the first switch 34a. The other end of the first switch 34a is connected to the source terminal of the switching element 31a. The first switch 34a is realized by, for example, a MOSFET. Therefore, a body diode is formed between the drain terminal and the source terminal of the first switch 34a. In other words, the cathode of the body diode is connected to one end of the first switch 34a, and the anode of the body diode is connected to the other end of the first switch 34a.

[0026] Between the gate terminal and source terminal of the switching element 31a, i.e., between the gate and source, there exists a parasitic capacitance Cgsa due to the capacitance of the gate oxide film. Due to the above-described connection, the series connection of the first capacitor 33a and the first switch 34a is connected in parallel with the parasitic capacitance Cgsa between the gate terminal and source terminal of the switching element 31a. For the sake of convenience, it is assumed below that the first capacitor 33a has the same capacitance as the parasitic capacitance Cgsa.

[0027] The first resistor 35a is provided between the gate terminal of the switching element 31a and the driver circuit 40. Specifically, one end of the first resistor 35a is connected to the driver circuit 40, and the other end of the first resistor 35a is connected to the gate terminal of the switching element 31a.

[0028] The second resistor 36a and the second switch 37a are connected in series. The series connection of the second switch 37a and the second resistor 36a and the first resistor 35a are connected in parallel. Specifically, one end of the first resistor 35a is connected to one end of the second switch 37a. The other end of the second switch 37a is connected to one end of the second resistor 36a. The other end of the second resistor 36a is connected to the gate terminal of the switching element 31a. The second switch 37a is implemented, for example, by a MOSFET. Therefore, a body diode is formed between the drain terminal and the source terminal of the second switch 37a. That is, the cathode of the body diode is connected to one end of the second switch 37a, and the anode of the body diode is connected to the other end of the second switch 37a. Hereinafter, for convenience of explanation, it is assumed that the first resistor 35a and the second resistor 36a have the same resistance value.

[0029] The driver circuit 40 receives a gate signal output from the control unit 100. The driver circuit 40 drives the input gate signal to a potential capable of driving the switching elements 31a and 31b. The driver circuit 40 applies the driven gate signal as a gate voltage to the gate terminal of the switching element 31a via the first resistor 35a. The driver circuit 40 also applies the driven gate signal as a gate voltage to the gate terminal of the switching element 31b via the first resistor 35b. One end of the first resistor 35a is connected to one end of the first resistor 35b. The source terminals of the switching elements 31a and 31b are connected to the driver circuit 40, through which the driven gate signal output from the driver circuit 40 flows back. The drain terminal of the switching element 31a is connected to the drain terminal of the switching element 31b.

[0030] The gate signal driven by the driver circuit 40 is supplied to the gate terminal of the switching element 31a via the first resistor 35a. The gate signal driven by the driver circuit 40 is supplied to the gate terminal of the switching element 31b via the first resistor 35b. That is, the driver circuit 40 supplies the same gate signal to the switching elements 31a and 31b. As a result, the open / closed states of the switching elements 31a and 31b are controlled by the same gate signal supplied from the driver circuit 40. In the following description, the current flowing from the drain terminal to the source terminal of the switching element 31a when the switching element 31a is controlled to the closed state will be referred to as drain current Ida. The current flowing from the drain terminal to the source terminal of the switching element 31b when the switching element 31b is controlled to the closed state will be referred to as drain current Idb.

[0031] The current sensor 38a detects the drain current Ida and outputs the detection result to the control unit 100. The current sensor 38b detects the drain current Idb and outputs the detection result to the control unit 100. The current sensors 38a and 38b detect the drain currents Ida and Idb, for example, on the source terminal side of the connection point between the source terminals of the switching elements 31a and 31b and the other ends of the first switches 34a and 34b. The current sensors 38a and 38b are realized, for example, by a feed-through type sensor.

[0032] When the switching circuit 30 is the switching circuit 30-1, the drain terminals of the switching elements 31a and 31b are connected to the positive terminal of the battery BA. When the switching circuit 30 is the switching circuit 30-2, the drain terminals of the switching elements 31a and 31b are connected to the connection point with the switching circuit 30-1.

[0033] When the switching circuit 30 is the switching circuit 30-1, the source terminals of the switching elements 31a and 31b are connected to the connection point with the switching circuit 30-2. When the switching circuit 30 is the switching circuit 30-2, the source terminals of the switching elements 31a and 31b are connected to the negative terminal of the battery BA.

[0034] The control unit 100 controls the open / close states of the first switches 34a, 34b and the second switches 37a, 37b. In a normal state in which the control unit 100 is not controlling the switching of the switching elements 31a, 31b, the control unit 100 controls the first switches 34a, 34b and the second switches 37a, 37b to an open state. Specifically, the normal state is a state in which no drain currents Ida, Idb flow through the switching elements 31a, 31b.

[0035] [Active Gate Control] The active gate control of the control unit 100 will be described below with reference to FIG. 3 . As described above, the control unit 100 outputs the same gate signal to the switching elements 31 a and 31 b. The driver circuit 40 drives the gate signal output by the control unit 100 and outputs it to the gate terminals of the switching elements 31 a and 31 b. When the power conversion device 10 ideally operates, the switching elements 31 a and 31 b are driven by the same gate signal, resulting in the same degree of change in the drain currents Ida and Idb. However, due to the influence of parasitic capacitance of the switching circuit 30 (or the entire circuit of the power conversion device 10) and individual differences between the switching elements 31 a and 31 b, the degree of change in the drain currents Ida and Idb may differ even when the switching elements 31 a and 31 b are driven by the same gate signal.

[0036] 3 shows a waveform W11 indicating the change over time in the drain current Ida when the switching element 31a is turned on without any control to eliminate the current imbalance, and a waveform W12 indicating the change over time in the drain current Idb when the switching element 31b is turned on. In the example shown in FIG. 3 , as shown by the waveforms W11 and W12, after the switching elements 31a and 31b are turned on at time t1, the drain current Idb begins to rise at time t3b. The drain current Ida also begins to rise at time t3a. Until the drain currents Ida and Idb stabilize, the drain current Idb flows more than the drain current Ida. In other words, the switching element 31b has a faster switching speed than the switching element 31a and is closed first. This causes a current imbalance between the drain currents Ida and Idb. The control unit 100 controls the open / close states of the first switches 34 a and 34 b and the second switches 37 a and 37 b so as to balance the drain current Ida and the drain current Idb in a certain switching circuit 30 .

[0037] The control unit 100 acquires detection results of the drain currents Ida and Idb of the switching elements 31a and 31b when they are turned on from the current sensors 38a and 38b. Based on the detection results, the control unit 100 identifies one of the switching elements 31a and 31b with a fast switching speed (a fast rate of change in the drain current Id) (or a slow switching speed (a slow rate of change in the drain current Id)). The control unit 100 controls the first switch 34 corresponding to the switching element with the fast switching speed among the switching elements 31a and 31b to a closed state, while controlling the second switch 37 corresponding to that switching element to an open state. Furthermore, the control unit 100 controls the first switch 34 corresponding to the switching element with the slow switching speed among the switching elements 31a and 31b to an open state, while controlling the second switch 37 corresponding to that switching element to a closed state.

[0038] When the switching speed of switching element 31b is faster than that of switching element 31a as shown in Fig. 3, control is performed as shown in Fig. 4. The control unit 100 controls the first switch 34a corresponding to switching element 31a to an open state while controlling the second switch 37a to a closed state. The control unit 100 also controls the first switch 34b corresponding to switching element 31b to a closed state while controlling the second switch 37b to an open state.

[0039] As a result, the gate signal output by the driver circuit 40 flows through a path RT1 that passes through the first resistor 35a and the parasitic capacitance Cgsa, and a path RT2 that branches from one end of the first resistor 35a, passes through the second switch 37a and the second resistor 36a, and then joins the other end of the first resistor 35a, before returning to the driver circuit 40. In addition, the gate signal output by the driver circuit 40 flows through a path RT3 that passes through the first resistor 35b and the parasitic capacitance Cgsb, and a path RT4 that branches from the other end of the first resistor 35b, passes through the first capacitor 33b and the first switch 34b, and then joins the source terminal of the switching element 31b, before returning to the driver circuit 40.

[0040] Here, a typical switching circuit does not include the first capacitors 33a and 33b, the first switches 34a and 34b, the second resistors 36a and 36b, and the second switches 37a and 37b. Therefore, the gate-source voltage Vgs in this case is expressed by equation (1). In equation (1), Vgs represents the gate-source voltage Vgs of the switching element 31, and Vdr represents the drive voltage, i.e., the gate voltage applied by the driver circuit 40 to the gate terminal of the switching element 31. R represents the resistance value of the first resistor 35. C represents the capacitance of the parasitic capacitance Cgs. t represents the time elapsed since the switching element 31 was turned on.

[0041]

[0042] On the other hand, in the switching circuit 30 of this embodiment, due to the above-described connection, the gate signal of the switching element 31a is provided through a combined resistance of the first resistor 35a and the second resistor 36a between the driver circuit 40 and the gate terminal of the switching element 31a. Thus, when turned on, the gate-source voltage Vgs of one of the switching elements 31a, 31b, which controls the first switch 34 to an open state and the second switch 37 to a closed state, is expressed by the following equation (2). In equation (2), Vgs represents the gate-source voltage Vgs of the switching element 31, and Vdr represents the drive voltage, i.e., the gate voltage applied by the driver circuit 40 to the gate terminal of the switching element 31. R represents the resistance values ​​of the first resistor 35 and the second resistor 36 (which are the same as described above). C represents the capacitance of the first capacitor 33 and the parasitic capacitance Cgs (which are the same as described above). t indicates the time that has elapsed since the switching element 31 was turned on.

[0043]

[0044] Furthermore, in the switching circuit 30 of this embodiment, due to the above-described connection, the gate signal of the switching element 31b is a circuit in which the first capacitor 33b is connected in parallel to the parasitic capacitance Cgsb. Thus, when turned on, the gate-source voltage Vgs of one of the switching elements 31a, 31b, which controls the first switch 34 to a closed state and the second switch 37 to an open state, is expressed by the following equation (3). In equation (3), Vgs represents the gate-source voltage Vgs of the switching element 31, and Vdr represents the drive voltage, i.e., the gate voltage applied by the driver circuit 40 to the gate terminal of the switching element 31. R represents the resistance values ​​of the first resistor 35 and the second resistor 36 (which are the same as described above). C represents the capacitance of the first capacitor 33 and the parasitic capacitance Cgs (which are the same as described above). t represents the time elapsed since the switching element 31 was turned on.

[0045]

[0046] Comparing equation (1) with equation (2), the gate-source voltage Vgs when the second switch 37 is controlled is higher at the same time than when the second switch 37 is not controlled. Comparing equation (1) with equation (3), the gate-source voltage Vgs when the first switch 34 is controlled is lower at the same time than when the first switch 34 is not controlled. Comparing equation (2) with equation (3), the gate-source voltage Vgs in equation (2) has four times the variable of the exponential function of the gate-source voltage Vgs in equation (3).

[0047] 5 shows waveforms illustrating the changes over time in the gate-source voltage Vgsa and the gate-source voltage Vgsb before and after the control unit 100 controls the first switch 34 and the second switch 37. Specifically, waveform W21 is a waveform illustrating the changes over time in the gate-source voltage Vgsa when the control unit 100 does not control the first switch 34a and the second switch 37a. On the other hand, waveform W22 is a waveform illustrating the changes over time in the gate-source voltage Vgsa when the control unit 100 controls the first switch 34a and the second switch 37a. Furthermore, waveform W31 is a waveform illustrating the changes over time in the gate-source voltage Vgsb when the control unit 100 does not control the first switch 34b and the second switch 37b. On the other hand, a waveform W32 is a waveform that shows the change over time of the gate-source voltage Vgsb when the first switch 34b and the second switch 37b are controlled by the control unit 100.

[0048] 5, time t1 is the time when the switching elements 31a and 31b are turned on. Time t2 is the time when the drain currents Ida and Idb rise. The drain current Ida rises when the gate-source voltage Vgsa increases due to the turn-on, and when the gate-source voltage Vgsa reaches the voltage threshold Vtha. The drain current Idb rises when the gate-source voltage Vgsb increases due to the turn-on, and when the gate-source voltage Vgsb reaches the voltage threshold Vthb.

[0049] When the switching elements 31a and 31b are turned on, a voltage smaller than the voltage threshold Vtha of the switching element 31a and the voltage threshold Vthb of the switching element 31b is applied between the gate and source of the switching elements 31a and 31b, respectively. As shown in waveforms W22 and W32, after a predetermined time (t2 in this embodiment) has elapsed since the switching elements 31a and 31b were turned on, the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha, and after a predetermined time (t2 in this embodiment) has elapsed since the switching elements 31a and 31b were turned on, the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold Vthb. When the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha, the drain current Ida of the switching element 31a rises as shown in FIG. 3 , and when the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold Vthb, the drain current Idb of the switching element 31b rises as shown in FIG. 3 .

[0050] In this embodiment, the time when the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha and the time when the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold Vthb are both equal, t2, but they may be different. For example, if the voltage threshold Vtha of the switching element 31a is greater than the voltage threshold Vthb of the switching element 31b, the time when the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha may be longer than the time when the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold Vthb.

[0051] As shown by waveforms W21 and W22, the control of the first switch 34a and the second switch 37a by the control unit 100 increases the rate at which the gate-source voltage Vgsa rises compared to when the control unit 100 does not control the first switch 34a and the second switch 37a. Furthermore, as shown by waveforms W31 and W32, the control of the first switch 34b and the second switch 37b by the control unit 100 decreases the rate at which the gate-source voltage Vgsb rises compared to when the control unit 100 does not control the first switch 34b and the second switch 37b. This causes the rates of change (slope) of the drain currents Ida and Idb to approach each other. Therefore, the control unit 100 can eliminate the current imbalance in the switching elements 31a and 31b when the switching elements 31a and 31b are turned on.

[0052] Furthermore, by controlling the first switch 34a and the second switch 37a by the control unit 100, the difference between the time when the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold value Vtha and the time when the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold value Vthb can be made smaller than when the first switch 34a and the second switch 37a are not controlled. In waveforms W21 and W31, when time t3a at which the gate-source voltage Vgsa of switching element 31a becomes equal to the voltage threshold Vtha is compared with time t3b at which the gate-source voltage Vgsb of switching element 31b becomes equal to the voltage threshold Vthb, time t3a is longer than time t3b, but in waveforms W22 and W32, time t2 at which the gate-source voltage Vgsa of switching element 31a becomes equal to the voltage threshold Vtha is shorter than time t3a, and time t2 at which the gate-source voltage Vgsb of switching element 31b becomes equal to the voltage threshold Vthb is longer than time t3b. In this embodiment, t2 of switching element 31a is equal to t2 of switching element 31b. The smaller the difference between the time when the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha and the time when the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold Vthb, the more the phenomenon of oscillation of the waveforms of the gate-source voltages Vgsa and Vgsb, i.e., the greater the fluctuation of the waveforms, can be reduced.

[0053] 6 shows a waveform W41 representing the change over time in the drain current Ida when the switching element 31a is turned off without any control to eliminate the current imbalance, and a waveform W42 representing the change over time in the drain current Idb when the switching element 31b is turned off. In the example shown in FIG. 6, as shown by the waveforms W41 and W42, after the switching elements 31a and 31b are turned off at time t4, the drain current Idb takes a shorter time than the drain current Ida until the drain current Id stops flowing. In other words, the switching speed of the switching element 31b is faster than that of the switching element 31a, and the switching element 31b is opened first. This causes a current imbalance between the drain current Ida and the drain current Idb.

[0054] The drain current Ida decreases as the gate-source voltage Vgsa decreases upon turn-off, and stops flowing when the gate-source voltage Vgsa reaches the voltage threshold Vtha. The drain current Idb decreases as the gate-source voltage Vgsb decreases upon turn-off, and stops flowing when the gate-source voltage Vgsb reaches the voltage threshold Vthb.

[0055] As shown by waveforms W41 and W42, after a predetermined time (t6a in this embodiment) has elapsed since turning off, the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold value Vtha, and after a predetermined time (t6b in this embodiment) has elapsed since turning off, the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold value Vthb.

[0056] 7 shows a state in which the control unit 100 turns off the switching elements 31a and 31b after the control shown in FIG. 4 is performed at turn-on. Therefore, the first switch 34a is controlled to the open state, the second switch 37a is controlled to the closed state, the first switch 34b is controlled to the closed state, and the second switch 37b is controlled to the open state.

[0057] As a result, until the charge stored in the parasitic capacitance Cgsa at the time of turn-on is completely discharged, the charge stored in the parasitic capacitance Cgsa flows from the gate terminal of the switching element 31a through a path RT5 that passes through the first resistor 35a and the driver circuit 40, and through a path RT6 that branches off from the other end of the first resistor 35a of the path RT5, passes through the second resistor 36a and the second switch 37a, and then joins one end of the first resistor 35a, and the current flows back to the gate terminal of the switching element 31a. Furthermore, until the charge stored in the parasitic capacitance Cgsb and the first capacitor 33b at the time of turn-on is completely discharged, the charge stored in the parasitic capacitance Cgsb and the first capacitor 33b flows from the gate terminal of the switching element 31b through a path RT7 that passes through the first resistor 35b and the driver circuit 40, and through a path RT8 that branches off from the other end of the first resistor 35b on the path RT7, passes through the second resistor 36b and the body diode of the second switch 37b, and joins one end of the first resistor 35b, and the current flows back to the gate terminal of the switching element 31b.

[0058] As described above, a typical switching circuit does not include the first capacitors 33a and 33b, the first switches 34a and 34b, the second resistors 36a and 36b, and the second switches 37a and 37b. Therefore, the gate-source voltage Vgs in this case is expressed by equation (4). In equation (4), Vgs represents the gate-source voltage Vgs of the switching element 31, and Vdr represents the drive voltage, i.e., the gate voltage applied by the driver circuit 40 to the gate terminal of the switching element 31. R represents the resistance value of the first resistor 35. C represents the capacitance of the parasitic capacitance Cgs. t represents the time elapsed since the switching element 31 was turned off.

[0059]

[0060] In this case, the gate-source voltage Vgs of one of the switching elements 31a, 31b, in which the first switch 34 is controlled to the open state and the second switch 37 is controlled to the closed state, when the switching element is turned off, is expressed by the following equation (5). In equation (5), Vgs represents the gate-source voltage Vgs of the switching element 31, and Vdr represents the drive voltage, i.e., the gate voltage applied by the driver circuit 40 to the gate terminal of the switching element 31. R represents the resistance values ​​of the first resistor 35 and the second resistor 36 (which are the same resistance values ​​as described above). C represents the capacitance of the first capacitor 33 and the parasitic capacitance Cgs (which are the same capacitance as described above). t represents the time elapsed since the switching element 31 was turned off.

[0061]

[0062] In this case, the gate-source voltage Vgs of one of the switching elements 31a, 31b, in which the first switch 34 is controlled to a closed state and the second switch 37 is controlled to an open state, when the switching element is turned off, is expressed by the following equation (6). In equation (6), Vgs represents the gate-source voltage Vgs of the switching element 31, and Vdr represents the drive voltage, i.e., the gate voltage applied by the driver circuit 40 to the gate terminal of the switching element 31. R represents the resistance values ​​of the first resistor 35 and the second resistor 36 (which are the same resistance values ​​as described above). C represents the capacitance of the first capacitor 33 and the parasitic capacitance Cgs (which are the same capacitance as described above). t represents the time elapsed since the switching element 31 was turned off.

[0063]

[0064] Comparing equation (4) with equation (5), the gate-source voltage Vgs when the second switch 37 is controlled is lower at the same time than when the second switch 37 is not controlled. Furthermore, comparing equation (4) with equation (6), the gate-source voltage Vgs when the first switch 34 is controlled is the same at the same time as when it is not controlled. Furthermore, comparing equation (5) with equation (6), the gate-source voltage Vgs in equation (5) has twice the variable of the exponential function as the gate-source voltage Vgs in equation (6).

[0065] 8 shows waveforms illustrating the changes over time in the gate-source voltage Vgsa and the gate-source voltage Vgsb before and after the control unit 100 controls the first switch 34 and the second switch 37. Specifically, waveform W51 is a waveform illustrating the changes over time in the gate-source voltage Vgsa when the control unit 100 does not control the first switch 34a and the second switch 37a. On the other hand, waveform W52 is a waveform illustrating the changes over time in the gate-source voltage Vgsa when the control unit 100 controls the first switch 34a and the second switch 37a. Furthermore, waveform W61 is a waveform illustrating the changes over time in the gate-source voltage Vgsb when the control unit 100 does not control the first switch 34b and the second switch 37b. On the other hand, a waveform W62 is a waveform that shows the change over time of the gate-source voltage Vgsb when the first switch 34b and the second switch 37b are controlled by the control unit 100.

[0066] Furthermore, by controlling the first switch 34a and the second switch 37a by the control unit 100, it is possible to reduce the difference between the time when the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha and the time when the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold Vthb, compared to when the first switch 34a and the second switch 37a are not controlled. In the waveforms W51 and W61, when comparing the time t6a when the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha and the time t6b when the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold Vthb, the time t6a is longer than the time t6b, but in the waveforms W52 and W62, the difference between the time when the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha and the time t6b is smaller. The smaller the difference between the time when the gate-source voltage Vgsa of the switching element 31a becomes equal to the voltage threshold Vtha and the time when the gate-source voltage Vgsb of the switching element 31b becomes equal to the voltage threshold Vthb, the more the phenomenon of oscillation of the waveforms of the gate-source voltages Vgsa and Vgsb, i.e., the greater the fluctuation of the waveforms, can be reduced.

[0067] As shown by waveforms W51 and W52, the rate at which the gate-source voltage Vgsa decreases is faster when the first switch 34a and the second switch 37a are controlled by the control unit 100 than when they are not controlled. Also, as shown by waveforms W61 and W62, the rate at which the gate-source voltage Vgsb decreases is the same when the first switch 34b and the second switch 37b are controlled by the control unit 100 as when they are not controlled. This allows the control unit 100 to eliminate current imbalance in the switching elements 31a and 31b when they are turned off.

[0068] Although the above description has been given of a case where the switching speed of the switching element 31b is faster than that of the switching element 31a, this is not limiting. When the switching speed of the switching element 31a is faster than that of the switching element 31b, the control unit 100 may execute the above-described control in reverse. Specifically, the control unit 100 controls the first switch 34a to the closed state while controlling the second switch 37a to the open state. Furthermore, the control unit 100 controls the first switch 34b to the open state while controlling the second switch 37b to the closed state. In this case, the action occurring in the switching circuit 30 is the same as when the "a" and "b" at the end of the reference numerals in the above description are replaced with each other, and therefore a description thereof will be omitted.

[0069] Effects of the Embodiment The above embodiment can achieve the following effects. (1) The multiple switching circuits 30 included in the power conversion device 10 each include two switching elements 31 a, 31 b connected in parallel to each other, multiple first capacitors 33 a, 33 b connected in parallel to each of the parasitic capacitances Cgsa, Cgsb of the switching elements 31 a, 31 b, multiple first switches 34 a, 34 b connected in series to each of the multiple parasitic capacitances Cgsa, Cgsb, and multiple current sensors 38 a, 38 b that detect the drain currents Ida, Idb of the switching elements 31 a, 31 b. Based on the detection results of the current sensors 38 a, 38 b, the control unit 100 opens the first switch 34 provided for the switching element 31 whose drain current Id changes at a slower rate, and closes the first switch 34 provided for the switching element 31 whose drain current Id changes at a faster rate. This changes the gate-source capacitance. Therefore, with this configuration, it is possible to adjust the change in the gate-source voltage Vgs. As a result, it is possible to shorten the time it takes for the voltage threshold Vth to be reached and to shorten the rate of change in the drain current Id, thereby converging the current imbalance occurring between the two switching elements 31a and 31b.

[0070] Specifically, when the switching element 31b, which has a large rate of change in the drain current Id, is turned on, the rate of change in the gate-source voltage Vgsb is smaller, and the rate of change in the drain current Idb is smaller, compared to when the first switch 34b is not controlled. Also, when the switching element 31b is turned off, the effect of increasing the gate-source capacitance is canceled out by the formation of a parallel current path between the first resistor 35b and the second resistor 36b, and while the rate of change in the gate-source voltage Vgsb remains the same as when the first switch 34b is not controlled, the rate of change in the drain current Ida flowing through the switching element 31a, which has a small rate of change in the drain current Id, becomes larger, and the rate of change in the drain current Idb becomes smaller.

[0071] When the switching element 31a with a small rate of change in the drain current Id is turned on, the rate of change in the gate-source voltage Vgsa is larger and the rate of change in the drain current Ida is larger than when the first switch 34a is not controlled. Also, when the switching element 31a is turned off, the rate of change in the gate-source voltage Vgsa is larger and the rate of change in the drain current Ida is larger than when the first switch 34a is not controlled.

[0072] (2) The switching circuit 30 further includes a first resistor 35 and a second resistor 36 connected in parallel between the gate terminal of the switching element 31 and the driver circuit 40, and a second switch 37 connected in series to the second resistor 36. Based on the detection results of the current sensor 38, the control unit 100 closes the second switch 37 provided for the switching element 31 whose drain current Id changes at a slower rate, and opens the second switch 37 provided for the switching element 31 whose drain current Id changes at a faster rate, among the switching elements 31a and 31b. This adjusts the change in the gate-source voltage Vgs by changing the gate resistance in addition to changing the gate-source capacitance. Therefore, with this configuration, the current imbalance occurring between the two switching elements 31 can be further reduced.

[0073] Specifically, when the switching element 31b, which has a large rate of change in the drain current Id, is turned on, the rate of change in the gate-source voltage Vgsb is smaller, and the rate of change in the drain current Idb is smaller, compared to when the second switch 37b is not controlled. Also, when the switching element 31b is turned off, the rate of change in the gate-source voltage Vgsb is the same as when the second switch 37b is not controlled, but the rate of change in the drain current Ida flowing through the switching element 31a, which has a small rate of change in the drain current Id, is increased, and the rate of change in the drain current Idb is smaller relative to the drain current Ida.

[0074] Furthermore, when the switching element 31a with a small rate of change in the drain current Id is turned on, the rate of change in the gate-source voltage Vgs is greater and the rate of change in the drain current Ida is greater than when the second switch 37a is not controlled. Furthermore, when the switching element 31a is turned off, the rate of change in the gate-source voltage Vgsa is greater and the rate of change in the drain current Ida is greater than when the second switch 37a is not controlled.

[0075] The above-described embodiments may be modified as follows. The above-described embodiments and the following alternative examples may be combined with each other to the extent that no technical contradiction occurs. [Modification 1] In the above description, the case where the series connection of the first resistor 35, the second switch 37, and the second resistor 36 is connected in parallel with each other has been described, but this is not limited to this. In Modification 1, a case where the series connection of the first resistor 35, the second switch 37, the second resistor 36, and the second capacitor 39 is connected in parallel with each other will be described. Note that a description of the same configuration as in the above-described embodiment will be omitted.

[0076] As shown in FIG. 9 , the switching circuit 50 of the first modification includes second capacitors 39 a and 39 b in addition to the components of the switching circuit 30 described above. In the switching circuit 50, the second resistor 36, the second switch 37, and the second capacitor 39 are connected in series. The series connection of the second resistor 36, the second switch 37, and the second capacitor 39 is connected in parallel with the first resistor 35. Specifically, one end of the first resistor 35 is connected to one end of the second switch 37. The other end of the second switch 37 is connected to one end of the second resistor 36. The other end of the second resistor 36 is connected to one end of the second capacitor 39. The other end of the second capacitor 39 is connected to the other end of the first resistor 35.

[0077] In Modification 1, similar to the above-described embodiment, a case will be described in which the switching speed of switching element 31b is faster than that of switching element 31a. Therefore, as described above, the control unit 100 controls the second switch 37a corresponding to switching element 31a to a closed state while controlling the first switch 34a to an open state. In addition, the control unit 100 controls the first switch 34b corresponding to switching element 31b to a closed state while controlling the second switch 37b to an open state.

[0078] 9, the gate signal output from the driver circuit 40 flows through a path RT2' instead of the path RT2 when the driver circuit 40 is turned on. The path RT2' is a path in which the gate signal branches off from one end of the first resistor 35a, passes through the second switch 37a, the second resistor 36a, and the second capacitor 39a, and then joins the other end of the first resistor 35a.

[0079] The gate signal flows through the path RT2', charging the second capacitor 39a. When the second capacitor 39a is sufficiently charged, the gate signal stops flowing through the path RT2'. In other words, the series connection of the second switch 37, the second resistor 36, and the second capacitor 39 is no longer connected in parallel with the first resistor 35.

[0080] During turn-off, a current flows through a path RT6' (not shown) that branches from the other end of the first resistor 35a, passes through the second capacitor 39a, the second resistor 36a, and the second switch 37a, and then joins one end of the first resistor 35a. At this time, the charge stored in the second capacitor 39a is discharged. Therefore, when the gate signal flows through the path RT2' at the next turn-on, the second capacitor 39a can be charged.

[0081] [Effects of Modification 1] According to this configuration, after controlling the second switch 37 to the closed state, the power conversion device 10 can electrically disconnect the series connection of the second switch 37, the second resistor 36, and the second capacitor 39 from the first resistor 35 without opening the second switch 37. In other words, the power conversion device 10 can reduce the effort required for the control unit 100 to reopen the second switch 37, which was closed at turn-on in order to adjust the current imbalance. Furthermore, the power conversion device 10 can increase the time tolerance for adjusting the current imbalance (i.e., slow down the rate at which the gate-source voltage Vgs decreases) as the charge stored in the second capacitor 39 is discharged at turn-off.

[0082] [Modification 2] In Modification 1, a case has been described in which the switching circuit 50 includes both the first capacitor 33 and the second capacitor 39. In Modification 2, a configuration will be described in which the second capacitor 39 also functions as the first capacitor 33. Note that a description of the same configuration as in the above-described embodiment and modifications will be omitted.

[0083] 10 , in the switching circuit 60, the first capacitor 33 is realized by the second capacitor 39. In other words, the switching circuit 60 does not include the first capacitor 33 among the components included in the switching circuit 50. In the switching circuit 60, one end of the first switch 34 is connected to the connection point between the second resistor 36 and the second capacitor 39.

[0084] In Modification 2, similar to the above-described embodiment, a case will be described in which the switching speed of switching element 31b is faster than that of switching element 31a. Therefore, as described above, the control unit 100 controls the second switch 37a corresponding to switching element 31a to a closed state while controlling the first switch 34a to an open state. In addition, the control unit 100 controls the first switch 34b corresponding to switching element 31b to a closed state while controlling the second switch 37b to an open state.

[0085] As a result, when the driver circuit 40 is turned on, the gate signal flows through a path RT4' (not shown) instead of the path RT4. The path RT4' is a path along which the gate signal branches from the other end of the first resistor 35b, passes through the second capacitor 39b and the first switch 34b, and then merges with the source terminal of the switching element 31b. In this case, the second capacitor 39b functions in the same way as the first capacitor 33b in the switching circuit 30 or 50.

[0086] During turn-off, a current flows through a path RT8' (not shown) that merges with the other end of the first resistor 35b via the first switch 34b and the second capacitor 39b, and then merges with one end of the first resistor 35b via the first switch 34b, the second resistor 36b, and the body diode of the second switch 37b, and then flows back to the gate terminal of the switching element 31b. At this time, the charge stored in the second capacitor 39b is discharged. Therefore, when a gate signal flows through the path RT4' at the next turn-on, the second capacitor 39b can be charged.

[0087] [Effects of Modification 2] According to this configuration, the power conversion device 10 can converge the current imbalance that occurs between the two switching elements 31 a, 31 b using the switching circuit 60, which has a simple configuration and fewer components than the switching circuit 50.

[0088] In the above description, the gate signal output by the driver circuit 40 has a potential ranging from 0 to the positive side, but this is not limiting. The gate signal output by the driver circuit 40 may have a potential ranging from the negative side to the positive side.

[0089] The first switch 34 may be realized by two switches. The two switches include one switch whose body diode has the same orientation as the first switch 34, and the other switch whose body diode has the opposite orientation to the first switch 34. The first switch 34 is realized by a series-connected body of two switches connected in series to each other. In this case, the control unit 100 controls the first switch 34 so that the open / closed states of the two switches match. This prevents current from unintentionally flowing toward the other end of the first resistor 35 via the body diode of the first switch 34 in the switching circuit 30, 50, 60 when the first switch 34 is controlled to the closed state.

[0090] The second switch 37 may be realized by two switches. The two switches include one switch whose body diode has the same orientation as the second switch 37, and the other switch whose body diode has the opposite orientation to the second switch 37. The second switch 37 is realized by a series-connected body of two switches connected in series to each other. In this case, the control unit 100 controls the second switch 37 so that the open / closed states of the two switches match. This prevents unintended current from flowing toward the other end of the first resistor 35 via the body diode of the second switch 37 in the switching circuit 30, 50, 60 when the second switch 37 is controlled to the closed state.

[0091] The control unit 100 may control the open / close states of the first switch 34 and the second switch 37 in accordance with the timing of turning on the gate signal, or may control the open / close states after that timing. Specifically, the control unit 100 may control the open / close states of the first switch 34 and the second switch 37 depending on the degree of current imbalance. More specifically, the control unit 100 controls the open / close states of the first switch 34 and the second switch 37 later than the timing of turning on the gate signal as the degree of current imbalance decreases. With this configuration, the power conversion device 10 can more accurately converge the current imbalance between the two switching elements 31 a, 31 b.

[0092] Alternatively, when the gate signal is turned off, the control unit 100 may maintain the open / closed states of the first switch 34 and the second switch 37 until the drain currents Ida and Idb stop flowing through the switching elements 31a and 31b, or may control both switches to the open state before that timing. Specifically, the control unit 100 may control the first switch 34 and the second switch 37, which are controlled to the closed state, to the open state according to the degree of current imbalance. More specifically, the control unit 100 controls the open / closed states of the first switch 34 and the second switch 37 before the drain currents Ida and Idb stop flowing as the degree of current imbalance decreases. With this configuration, the power conversion device 10 can more accurately converge the current imbalance between the two switching elements 31a and 31b.

[0093] Although the above description has been given of the case where the switching circuits 30, 50, and 60 each include one second resistor 36, this is not limiting. The switching circuits 30, 50, and 60 may each include a plurality of second switches 37 connected in parallel with the first resistor 35, and a plurality of series-connected second resistors 36. In this case, the resistance values ​​of the plurality of second resistors 36 may be different from the resistance values ​​of the first resistor 35 and the other second resistors 36. The control unit 100 selects a second switch 37 to be controlled to a closed state from among the plurality of second switches 37 according to the degree of current imbalance. Specifically, the control unit 100 controls the second switch 37 corresponding to the second resistor 36 to a closed state so that the combined resistance value of the second resistor 36 and the first resistor 35 becomes a value that more closely matches the convergence of the current imbalance. With this configuration, the power conversion device 10 can more accurately converge the current imbalance between the two switching elements 31a and 31b. The second resistor 36 may also be realized by a combined resistor of a plurality of resistors.

[0094] Although the above description has been given of the case where the switching circuits 30, 50, and 60 each include one first capacitor 33, this is not limiting. The switching circuits 30, 50, and 60 may each include a plurality of series-connected first capacitors 33 and first switches 34, each connected in parallel with the parasitic capacitance Cgs. In this case, the capacitances of the plurality of first capacitors 33 may be different from the parasitic capacitance Cgs and the other first capacitors 33. The control unit 100 selects a first switch 34 to be controlled to a closed state from among the plurality of first switches 34 according to the degree of current imbalance. Specifically, the control unit 100 controls the first switch 34 corresponding to the first capacitor 33 to a closed state so that the combined capacitance of the parasitic capacitance Cgs and the first capacitor 33 becomes a value more consistent with the convergence of the current imbalance. With this configuration, the power conversion device 10 can more accurately converge the current imbalance between the two switching elements 31a and 31b. The first capacitor 33 may also be realized by a combined capacitance of a plurality of capacitors.

[0095] Although the example in which two switching elements 31a and 31b are connected in parallel has been described, three or more may be connected in parallel. The switching element 31 may be a bipolar transistor or the like having an emitter terminal, a base terminal, and a collector terminal. In this case, the gate, drain, and source in the embodiment may be read as the base, collector, and emitter, respectively.

[0096] The current sensor 38 may be realized by a shunt resistance type sensor using a resistor or a Rogowski coil type sensor instead of (or in addition to) the through-type sensor.

[0097] REFERENCE SIGNS LIST 10 Power conversion device 11 Electric motor 20 Inverter 30, 30-1, 30-2, 30u-1, 30u-2, 30v-1, 30v-2, 30w-1, 30w-2, 50, 60 Switching circuit 31, 31a, 31b Switching element 32a, 32b Diode 33, 33a, 33b First capacitor 34, 34a, 34b First switch 35, 35a, 35b First resistor 36, 36a, 36b Second resistor 37, 37a, 37b Second switch 38, 38a, 38b Current sensor 39, 39a, 39b Second capacitor 40 Driver circuit 100 Control unit 200 Vehicle BA Battery Cgs, Cgsa, Cgsb Parasitic capacitance Id, Ida, Idb: Drain current Vgs, Vgsa, Vgsb: Gate-source voltage

Claims

1. A power conversion device comprising: two switching elements connected in parallel with each other; a plurality of first capacitors provided in each of the switching elements and connected in parallel to parasitic capacitance between the gate and source or between the base and emitter; a plurality of first switches connected in series to each of the plurality of first capacitors; a current sensor that detects the drain current or collector current of each of the switching elements; and a control unit that controls the first switches, wherein, based on the detection result of the current sensor, the control unit opens the first switch provided in the switching element whose drain current or collector current changes at a slower rate, and closes the first switch provided in the switching element whose drain current or collector current changes at a faster rate.

2. The power conversion device according to claim 1, further comprising: a plurality of resistors connected in parallel to one another between a gate terminal or a base terminal of the switching element and a driver circuit that applies a gate voltage or a base voltage to the gate terminal or the base terminal; and one or more second switches connected in series to at least some of the plurality of resistors, wherein the control unit, based on the detection result of the current sensor, closes the second switches provided for switching elements of the plurality of switching elements whose drain current or collector current has a small rate of change, and opens the second switches provided for switching elements whose drain current or collector current has a large rate of change.

3. The power conversion device according to claim 2, further comprising a second capacitor connected in series to at least some of the second switches among the plurality of second switches.

4. The power conversion device according to claim 3, wherein the second capacitor also functions as the first capacitor.

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