Semiconductor device, light detection device, and electronic apparatus

Abstract

A semiconductor device according to one embodiment of the present disclosure comprises a semiconductor substrate that has opposite first and second surfaces, a first transistor that is provided to the first surface of the semiconductor substrate, and a second transistor that is provided to the first surface of the semiconductor substrate and has a gate electrode that includes a vertical part that extends in a first direction that is the thickness direction of the semiconductor substrate such that one end in the extension direction is embedded in the semiconductor substrate and the other end is at a different position from an upper surface of a gate electrode of the first transistor with respect to the first direction.

Description

Semiconductor device, photodetector and electronic device

[0001] The present disclosure relates to, for example, a semiconductor device, a photodetector, and an electronic device.

[0002] For example, Patent Document 1 discloses a solid-state imaging device having a vertical readout gate electrode and a planar gate electrode of another transistor on the surface of a substrate.

[0003] JP 2010-114324 A

[0004] Incidentally, in a semiconductor device having a plurality of transistors, there is a demand for improved flexibility in the layout of the transistors.

[0005] It is desirable to provide a photodetector device and electronic equipment that allows greater freedom in transistor layout.

[0006] A semiconductor device according to one embodiment of the present disclosure includes a semiconductor substrate having opposing first and second surfaces, a first transistor provided on the first surface of the semiconductor substrate, and a second transistor provided on the first surface of the semiconductor substrate, extending in a first direction, the thickness direction of the semiconductor substrate being the first direction, with one end of the second transistor in the extending direction embedded in the semiconductor substrate and the other end having a gate electrode including a vertical portion formed at a position different in the first direction from an upper surface of the gate electrode of the first transistor.

[0007] An optical detection device according to one embodiment of the present disclosure includes a semiconductor substrate having opposing first and second surfaces and having a photoelectric conversion portion embedded in each pixel, a first transistor provided on the first surface of the semiconductor substrate, and a second transistor provided on the first surface of the semiconductor substrate, extending in a first direction, the thickness direction of the semiconductor substrate being the first direction, with one end of the second transistor in the extending direction embedded in the semiconductor substrate and the other end having a gate electrode including a vertical portion formed at a position different from the top surface of the gate electrode of the first transistor in the first direction.

[0008] An electronic device according to an embodiment of the present disclosure includes the photodetector according to the embodiment of the present disclosure.

[0009] In a semiconductor device according to an embodiment of the present disclosure, a photodetector according to an embodiment, and an electronic device according to an embodiment, a first transistor and a second transistor are provided on a first surface of a semiconductor substrate. Of the first transistor and the second transistor, the second transistor has a gate electrode including a vertical portion extending in the first direction, with one end of the vertical portion embedded in the semiconductor substrate, where the first direction is the thickness direction of the semiconductor substrate. The other end of the vertical portion of the gate electrode of the second transistor is formed at a position different from the top surface of the gate electrode of the first transistor in the first direction. This alleviates layout constraints between the first transistor and the second transistor.

[0010] FIG. 1 is a schematic diagram illustrating an example of a cross-sectional configuration of a photodetector according to an embodiment of the present disclosure. FIG. 2 is a block diagram illustrating an overall configuration of the photodetector shown in FIG. 1. FIG. 3 is an equivalent circuit diagram of a unit pixel shown in FIG. 1. FIG. 4 is a schematic diagram illustrating an example of a planar configuration corresponding to Sec1 of the photodetector shown in FIG. 1. A cross-sectional view is a schematic diagram for explaining an example of a manufacturing method of the photodetector shown in FIG. 1. FIG. 5B is a cross-sectional view illustrating a step subsequent to FIG. 5A. FIG. 5C is a cross-sectional view illustrating a step subsequent to FIG. 5B. FIG. 5D is a cross-sectional view illustrating a step subsequent to FIG. 5C. FIG. 5E is a cross-sectional view illustrating a step subsequent to FIG. 5D. FIG. 5F is a cross-sectional view illustrating a step subsequent to FIG. 5E. FIG. 5G is a cross-sectional view illustrating a step subsequent to FIG. 5F. FIG. 5H is a cross-sectional view illustrating a step subsequent to FIG. 5G. FIG. 5I is a cross-sectional view illustrating a step subsequent to FIG. 5H. FIG. 6 is a schematic diagram illustrating an example of a cross-sectional configuration of a main part of a solid-state imaging device as a comparative example. FIG. 7 is a schematic diagram illustrating an example of a planar configuration corresponding to Sec2 of the solid-state imaging device shown in FIG. 6 . FIG. 8 is a schematic diagram illustrating an example of a planar configuration of a photodetector according to Modification 1 of the present disclosure. FIG. 9 is a schematic diagram illustrating an example of a planar configuration of a photodetector as a comparative example. FIG. 10 is a schematic diagram illustrating an example of a planar configuration of a photodetector according to Modification 2 of the present disclosure. FIG. 11 is a schematic diagram illustrating another example of a planar configuration of a photodetector according to Modification 2 of the present disclosure. FIG. 12 is a schematic diagram illustrating an example of a planar configuration of a photodetector according to Modification 3 of the present disclosure. FIG. 13 is a schematic diagram illustrating another example of a planar configuration of a photodetector according to Modification 3 of the present disclosure. FIG. 14 is a schematic diagram illustrating an example of a planar configuration of a photodetector according to Modification 4 of the present disclosure. FIG. 15 is a schematic diagram illustrating another example of a planar configuration of a photodetector according to Modification 4 of the present disclosure. FIG. 16 is a diagram illustrating an example of a schematic configuration of a photodetector according to Modification 5 of the present disclosure. FIG. 17 is a block diagram illustrating an example of a configuration of an electronic device including the photodetector shown in FIG. 2 etc. Fig. 18A is a schematic diagram showing an example of the overall configuration of a light detection system using the light detection device shown in Fig. 2 etc. Fig. 18B is a diagram showing an example of the circuit configuration of the light detection system shown in Fig. 18A Fig. 19 is a block diagram showing an example of the schematic configuration of a vehicle control system Fig. 20 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit.Fig. 21 is a diagram showing an example of a schematic configuration of an endoscopic surgery system, and Fig. 22 is a block diagram showing an example of a functional configuration of a camera head and a CCU.

[0011] Hereinafter, an embodiment of the present disclosure will be described in detail with reference to the drawings. The following description is a specific example of the present disclosure, and the present disclosure is not limited to the following aspects. Furthermore, the present disclosure is not limited to the arrangement, dimensions, dimensional ratios, etc. of the components shown in the drawings. The order of description is as follows: 1. Embodiment (Example of a semiconductor device in which, of two transistors, the upper end of the gate electrode of one transistor including a vertical gate electrode is provided at a different height from the upper surface of the gate electrode of the other transistor) 2. Modifications 2-1. Modification 1 (Another Example of the Configuration of a Photodetector) 2-2. Modification 2 (Another Example of the Configuration of a Photodetector) 2-3. Modification 3 (Another Example of the Configuration of a Photodetector) 2-4. Modification 4 (Another Example of the Configuration of a Photodetector) 2-5. Modification 5 (Another Example of the Configuration of a Photodetector) 3. Application Examples 4. Application Examples

[0012] 1 is a schematic diagram illustrating an example of a cross-sectional configuration of a photodetector 1 as an example of a semiconductor device according to an embodiment of the present disclosure. The photodetector 1 is, for example, a complementary metal oxide semiconductor (CMOS) image sensor used in electronic devices such as digital still cameras and video cameras, and has a pixel section (pixel array section 100A) in which a plurality of pixels (unit pixels P) are two-dimensionally arranged in a matrix as an imaging area. The photodetector 1 is, for example, a so-called back-illuminated photodetector in this CMOS image sensor or the like.

[0013] The photodetector 1 has a semiconductor substrate 10 having a front surface 10S1 and a back surface 10S2 facing each other. A pixel transistor 220 and a transfer transistor TR are provided on the front surface 10S1 of the semiconductor substrate 10. The transfer transistor TR is a so-called vertical transistor and has a gate electrode 231 that extends in the thickness direction of the semiconductor substrate 10 (here, the Z-axis direction) and includes a vertical portion 231A with one end in the extension direction (Z-axis direction) embedded in the semiconductor substrate 10. In the photodetector of this embodiment, the other end (surface 231S) of this vertical portion 231A is formed at a different height in the Z-axis direction from the upper surface 221S of the gate electrode 221 of the pixel transistor 220.

[0014] Here, the photodetector 1 corresponds to a specific example of a "semiconductor device" according to an embodiment of the present disclosure. The semiconductor substrate 10 corresponds to a specific example of a "semiconductor substrate" according to an embodiment of the present disclosure. The pixel transistor 220 corresponds to a specific example of a "first transistor" according to an embodiment of the present disclosure. The transfer transistor TR corresponds to a specific example of a "second transistor" according to an embodiment of the present disclosure, and the vertical portion 231A corresponds to a specific example of a "vertical portion" according to an embodiment of the present disclosure.

[0015] 2 shows an example of the overall configuration of the photodetector 1. As described above, the photodetector 1 is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and has a pixel array section 100A as an imaging area in which a plurality of unit pixels P are two-dimensionally arranged in a matrix.

[0016] The photodetector 1 captures incident light (image light) from a subject via an optical lens system (not shown), converts the amount of incident light imaged on an imaging surface into an electrical signal on a pixel-by-pixel basis, and outputs the electrical signal as a pixel signal. The photodetector 1 has a pixel array section 100A as an imaging area on a semiconductor substrate 10, and also has, in a peripheral region of the pixel array section 100A, for example, a vertical drive circuit 101, a column signal processing circuit 102, a horizontal drive circuit 103, an output circuit 104, a control circuit 105, and input / output terminals 106.

[0017] In the unit pixel P, for example, a pixel drive line Lread (specifically, a row selection line and a reset control line) is wired for each pixel row, and a vertical signal line Lsig is wired for each pixel column. The pixel drive line Lread transmits a drive signal for reading out a signal from the pixel. One end of the pixel drive line Lread is connected to an output terminal of the vertical drive circuit 101 corresponding to each row.

[0018] The vertical drive circuit 101 is a pixel drive unit that includes a shift register, an address decoder, etc., and drives each unit pixel P of the pixel array unit 100A, for example, row by row. Signals output from each unit pixel P of a pixel row selected and scanned by the vertical drive circuit 101 are supplied to a column signal processing circuit 102 through each vertical signal line Lsig. The column signal processing circuit 102 is configured with an amplifier, a horizontal selection switch, etc., provided for each vertical signal line Lsig.

[0019] The horizontal drive circuit 103 is configured with a shift register, an address decoder, etc., and scans and sequentially drives each horizontal selection switch of the column signal processing circuit 102. By selective scanning by this horizontal drive circuit 103, signals of each pixel transmitted through each vertical signal line Lsig are output in sequence to horizontal signal lines 107 and transmitted to the outside of the semiconductor substrate 10 via the horizontal signal lines 107.

[0020] The output circuit 104 processes and outputs signals sequentially supplied from each of the column signal processing circuits 102 via a horizontal signal line 107. The output circuit 104 may perform only buffering, or may perform black level adjustment, column variation correction, various digital signal processing, and the like, for example.

[0021] The circuit portion consisting of the vertical drive circuit 101, column signal processing circuit 102, horizontal drive circuit 103, horizontal signal line 107, and output circuit 104 may be formed directly on the semiconductor substrate 10, or may be disposed on an external control IC. Furthermore, these circuit portions may be formed on another substrate connected by a cable or the like.

[0022] The control circuit 105 receives a clock and data instructing an operation mode from outside the semiconductor substrate 10, and outputs data such as internal information of the photodetector 1. The control circuit 105 further has a timing generator that generates various timing signals, and controls the driving of peripheral circuits such as the vertical drive circuit 101, the column signal processing circuit 102, and the horizontal drive circuit 103 based on the various timing signals generated by the timing generator.

[0023] The input / output terminal 106 is used to exchange signals with the outside.

[0024] [Circuit configuration of unit pixel]

[0025] 3 shows an example of a unit pixel P and a readout circuit 200. Below, a case will be described in which four unit pixels P share one readout circuit 200, as shown in FIG. 3. Here, "shared" means that the outputs of the four unit pixels P are input to a common readout circuit 200.

[0026] Each unit pixel P has common components. In Fig. 3, in order to distinguish the components of each unit pixel P from one another, an identification number (1, 2, 3, 4) is added to the end of the reference numeral of each unit pixel P. Hereinafter, when it is necessary to distinguish the components of each unit pixel P from one another, an identification number is added to the end of the reference numeral of each unit pixel P. However, when it is not necessary to distinguish the components of each unit pixel P from one another, the identification number added to the end of the reference numeral of each unit pixel P is omitted.

[0027] Each unit pixel P includes, for example, a photodiode PD (photoelectric conversion unit 11), a transfer transistor TR electrically connected to the photoelectric conversion unit 11, and a floating diffusion FD that temporarily holds the charge output from the photoelectric conversion unit 11 via the transfer transistor TR. The photoelectric conversion unit 11 corresponds to a specific example of a "photoelectric conversion unit" according to an embodiment of the present disclosure. The floating diffusion FD corresponds to a specific example of a "charge holding unit" according to an embodiment of the present disclosure. The photoelectric conversion unit 11 performs photoelectric conversion to generate charge according to the amount of received light. The cathode of the photoelectric conversion unit 11 is electrically connected to the source of the transfer transistor TR, and the anode of the photoelectric conversion unit 11 is electrically connected to a reference potential line (e.g., ground). The drain of the transfer transistor TR is electrically connected to the floating diffusion FD, and the gate of the transfer transistor TR is electrically connected to a pixel drive line 42 (see FIG. 16 ). The transfer transistor TR is, for example, a CMOS (Complementary Metal Oxide Semiconductor) transistor.

[0028] The floating diffusions FD of the unit pixels P that share one readout circuit 200 are electrically connected to each other and to the input terminal of the common readout circuit 200. The readout circuit 200 includes, for example, a reset transistor RST, a selection transistor SEL, and an amplification transistor AMP. Note that the selection transistor SEL may be omitted if necessary. The source of the reset transistor RST (the input terminal of the readout circuit 200) is electrically connected to the floating diffusion FD, and the drain of the reset transistor RST is electrically connected to the power supply line VDD and the drain of the amplification transistor AMP. The gate of the reset transistor RST is electrically connected to a pixel drive line 42. The source of the amplification transistor AMP is electrically connected to the drain of the selection transistor SEL, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST. The source of the selection transistor SEL (the output terminal of the readout circuit 200) is electrically connected to a vertical signal line 43 (see FIG. 16 ), and the gate of the selection transistor SEL is electrically connected to the pixel drive line 42.

[0029] When the transfer transistor TR is turned on, it transfers the charge of the photoelectric conversion unit 11 to the floating diffusion FD. The gate (gate electrode 231) of the transfer transistor TR extends from the surface 10S1 of the semiconductor substrate 10 through the p-well layer 111 to a depth reaching the n-type semiconductor region 112, as shown in FIG. 1 . The reset transistor RST resets the potential of the floating diffusion FD to a predetermined potential. When the reset transistor RST is turned on, it resets the potential of the floating diffusion FD to the potential of the power supply line VDD. The selection transistor SEL controls the output timing of the pixel signal from the readout circuit 200. The amplification transistor AMP generates a pixel signal with a voltage corresponding to the level of the charge held in the floating diffusion FD. The amplification transistor AMP constitutes a source-follower amplifier and outputs a pixel signal with a voltage corresponding to the level of the charge generated in the photoelectric conversion unit 11. When the select transistor SEL is turned on, the amplifier transistor AMP amplifies the potential of the floating diffusion FD and outputs a voltage corresponding to the amplified potential to the column signal processing circuit 512 (see FIG. 16 ) via the vertical signal line 43. The reset transistor RST, the amplifier transistor AMP, and the select transistor SEL are, for example, CMOS transistors.

[0030] The selection transistor SEL may be provided between the power supply line VDD and the amplification transistor AMP. In this case, the drain of the reset transistor RST is electrically connected to the power supply line VDD and the drain of the selection transistor SEL. The source of the selection transistor SEL is electrically connected to the drain of the amplification transistor AMP, and the gate of the selection transistor SEL is electrically connected to the pixel drive line 42. The source of the amplification transistor AMP (the output terminal of the readout circuit 200) is electrically connected to the vertical signal line 43, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST. Furthermore, an FD conversion gain switching transistor FDG may be provided between the source of the reset transistor RST and the gate of the amplification transistor AMP.

[0031] The FD conversion gain switching transistor FDG is used to switch the conversion efficiency. Generally, pixel signals are small when shooting in dark locations. Based on Q = CV, when performing charge-voltage conversion, if the capacitance (FD capacitance C) of the floating diffusion FD is large, the V when converted to a voltage by the amplifier transistor AMP will be small. On the other hand, in bright locations, pixel signals are large, so if the FD capacitance C is not large, the floating diffusion FD cannot fully absorb the charge from the photoelectric conversion unit 11. Furthermore, the FD capacitance C must be large so that the V when converted to a voltage by the amplifier transistor AMP does not become too large (in other words, so that it becomes small). Taking these factors into consideration, when the FD conversion gain switching transistor FDG is turned on, the gate capacitance of the FD conversion gain switching transistor FDG increases, increasing the overall FD capacitance C. On the other hand, when the FD conversion gain switching transistor FDG is turned off, the overall FD capacitance C decreases. In this way, by switching the FD conversion gain switching transistor FDG on and off, the FD capacitance C can be varied, thereby switching the conversion efficiency.

[0032] [Configuration of Unit Pixel] As described above, the photodetector 1 is, for example, a back-illuminated photodetector, and has, as an imaging area, a pixel array section 100A in which a plurality of unit pixels P are two-dimensionally arranged in a matrix. As shown in Fig. 1 , each unit pixel P has a stacked configuration including a semiconductor substrate 10 having a front surface 10S1 and a back surface 10S2 facing each other, a multilayer wiring layer 20 provided on the front surface 10S1 side of the semiconductor substrate 10, and an optical member 30 provided on the back surface 10S2 side of the semiconductor substrate 10, which is the light incident side S1.

[0033] 1 indicate that p-type or n-type impurities are contained. A "+ (plus)" attached to "p" or "n" indicates that the concentration of p-type or n-type impurities is high.

[0034] The semiconductor substrate 10 is made of, for example, a silicon substrate. The semiconductor substrate 10 has, for example, a p-well layer 111 in and near a part of the surface 10S1, and an n-type semiconductor region 112 in other regions (for example, regions deeper than the p-well layer 111). A p-n junction photodiode PD constituted by the p-well layer 111 and the n-type semiconductor region 112 is embedded in the semiconductor substrate 10 as the photoelectric conversion unit 11.

[0035] As will be described in detail later, a floating diffusion (FD) 12, a transfer transistor TR, and a plurality of pixel transistors 220 are provided on the surface 10S1 of the semiconductor substrate 10. The FD 12 is formed of, for example, an n-type semiconductor region.

[0036] The semiconductor substrate 10 is provided with an isolation portion 13 that isolates a plurality of unit pixels P, which are two-dimensionally arranged in a matrix. The isolation portion 13 is formed to extend in the thickness direction (Z-axis direction) of the semiconductor substrate 10. The isolation portion 13 is provided to separate adjacent unit pixels P from each other and has, for example, a lattice-like planar shape. The isolation portion 13 electrically and optically isolates adjacent unit pixels P from each other. The isolation portion 13 includes, for example, a light-shielding film and an insulating film. The light-shielding film may be made of, for example, a metal material such as tungsten (W). A predetermined potential may be applied to the light-shielding film. The insulating film is provided between the light-shielding film and the p-well layer 111 and n-type semiconductor region 112. The insulating film is made of, for example, silicon oxide (SiO). The isolation portion 13 has, for example, a deep trench isolation (DTI) structure provided from the back surface 10S2 side of the semiconductor substrate 10. However, the isolation portion 13 may have a full trench isolation (FTI) structure that penetrates the semiconductor substrate 10 .

[0037] Semiconductor substrate 10 is provided with, for example, a first pinning region 113 and a second pinning region 114. First pinning region 113 is provided near back surface 10S2 of semiconductor substrate 10, and is disposed between n-type semiconductor region 112 and a fixed charge film 14, which will be described later. Second pinning region 114 is provided on a side surface of isolation portion 13, specifically, between isolation portion 13 and p-well layer 111 or n-type semiconductor region 112. First pinning region 113 and second pinning region 114 are formed of, for example, p-type semiconductor regions.

[0038] A fixed charge film 14 having, for example, a negative fixed charge is provided between the semiconductor substrate 10 and the isolation portion 13 and on the back surface 10S2 of the semiconductor substrate 10. A first pinning region 113 and a second pinning region 114 of the hole accumulation layer are formed at the interface between the semiconductor substrate 10 and the isolation portion 13 and on the back surface 10S2 of the semiconductor substrate 10 by an electric field induced by the fixed charge film 14. This suppresses the generation of dark current due to interface states between the semiconductor substrate 10 and the isolation portion 13 and on the back surface 10S2 of the semiconductor substrate 10. The fixed charge film 14 is formed of, for example, an insulating film having a negative fixed charge. Examples of materials for the insulating film having a negative fixed charge include hafnium oxide (HfO), zirconium oxide (ZrO), aluminum oxide (AlO), titanium oxide (TiO), and tantalum oxide (TaO).

[0039] The multilayer wiring layer 20 has a configuration in which, for example, gate wiring layers 22 and 23 and wiring layers 24 and 25 are stacked with an interlayer insulating layer 21 interposed therebetween. In addition to the readout circuit 200 described above, the multilayer wiring layer 20 is formed with, for example, a vertical drive circuit 101, a column signal processing circuit 102, a horizontal drive circuit 103, an output circuit 104, a control circuit 105, an input / output terminal 106, and the like.

[0040] The interlayer insulating layer 21 is formed of, for example, a single layer film made of one of silicon oxide (SiO), tetraethoxysilane (TEOS), silicon nitride (SiN), silicon oxynitride (SiON), etc., or a laminated film made of two or more of these materials.

[0041] The gate wiring layers 22, 23 and the wiring layers 24, 25 are formed using, for example, aluminum (Al), copper (Cu), tungsten (W), etc. Alternatively, the gate wiring layers 22, 23 may be formed using polysilicon (Poly-Si) or amorphous silicon doped with impurities.

[0042] On the rear surface 10S2 side of the semiconductor substrate 10, an optical member 30 including, for example, a protective layer 31, a color filter layer 32, a light receiving lens 33, and the like is provided.

[0043] The protective layer 31 protects the surface (rear surface 10S2) on the light incident side S1 of the semiconductor substrate 10 and also flattens the surface. The protective layer 31 is formed using, for example, silicon oxide (SiO) or silicon nitride (SiN).

[0044] Although not shown, a light-shielding film may be provided within the protective layer 31 to prevent light obliquely incident on the color filter layer 32 from leaking into adjacent unit pixels P that detect light of different wavelengths. The light-shielding film is provided, for example, above the separation section 13 and, like the separation section 13, is provided in a grid pattern in plan view. For example, a metal material such as tungsten (W) is used for the light-shielding film. Alternatively, a metal compound such as TiN is used for the light-shielding film. The light-shielding film may be formed, for example, as a single-layer film or a laminated film.

[0045] The color filter layer 32 selectively transmits light of a predetermined wavelength. The color filter layer 32 has, for example, a red filter 32R that selectively transmits red light (R), a green filter 32G that selectively transmits green light (G), and a blue filter 32B that selectively transmits blue light (B). Alternatively, the color filter layer 32 may have filters that selectively transmit cyan, magenta, and yellow, respectively.

[0046] Each color filter 32R, 32G, and 32B is provided for each unit pixel P, for example. Specifically, in four unit pixels P arranged in a 2-row by 2-column configuration, for example, two green filters 32G are arranged diagonally, and one red filter 32R and one blue filter 32B are arranged on each orthogonal diagonal. The unit pixels (red pixel Pr, green pixel Pg, and blue pixel Pb) provided with each color filter detect the corresponding color light. That is, in the pixel array section 100A, the unit pixels (red pixel Pr, green pixel Pg, and blue pixel Pb) that detect red light (R), green light (G), and blue light (B), respectively, are arranged in a Bayer pattern.

[0047] The color filter layer 32 can be formed using, for example, a pigment or a dye. The thickness of the color filter layer 32 may be different for each color, taking into consideration the color reproducibility and sensor sensitivity of the spectral distribution. In black and white pixels, a layer made of a transparent material can be considered as the color filter layer 32. In infrared pixels, a layer made of a material that selectively transmits infrared light can be considered as the color filter layer 32.

[0048] The light-receiving lens 33 is provided, for example, to cover the entire surface of the pixel array unit 100A and has multiple microlenses on its surface. The microlenses focus light incident from above toward the back surface 10S2 of the semiconductor substrate 10, which serves as the light-receiving surface, and are provided for each unit pixel P, as shown in FIG. 1 . The light-receiving lens 33 is formed, for example, using a high-refractive-index material, specifically, an inorganic material such as silicon nitride (SiN). Alternatively, the light-receiving lens 33 may be formed using an organic material with a high refractive index, such as an episulfide resin, a titanium compound, or a resin thereof. The shape of the on-chip lens 25L is not particularly limited, and various lens shapes, such as a hemispherical shape or a semi-cylindrical shape, can be used.

[0049] [Configuration of Transfer Transistor and Pixel Transistor] Figure 4 is a schematic diagram showing an example of the planar configuration of the surface 10S1 of the semiconductor substrate 10 corresponding to Sec1 shown in Figure 1. Note that Figure 1 shows a cross section corresponding to line II' shown in Figure 4. As described above, in the pixel array section 100A, a plurality of unit pixels P are two-dimensionally arranged in a matrix. More specifically, a pixel sharing unit U including a plurality of pixels (here, four unit pixels P arranged in 2 rows and 2 columns) serves as a repeating unit, and these are repeatedly arranged in an array consisting of row and column directions.

[0050] In the photodetector 1, one FD 12 is disposed in the center of the pixel sharing unit U. Specifically, one FD 12 is provided near the intersection of four unit pixels P1, P2, P3, and P4 arranged in two rows and two columns that constitute the pixel unit. The FD 12 is electrically connected to each of these unit pixels P1, P2, P3, and P4. A transfer transistor Tr is provided in each of the unit pixels P1, P2, P3, and P4 that constitute the pixel sharing unit U. The pixel transistor 220 is a collective term for a plurality of transistors that constitute the readout circuit 200, and corresponds to, for example, the reset transistor RST, the selection transistor SEL, the amplification transistor AMP, and the FD conversion gain switching transistor FDG. The readout circuit 200 is provided for each pixel sharing unit U, and the plurality of pixel transistors 220 (reset transistor RST, selection transistor SEL, amplification transistor AMP, and FD conversion gain switching transistor FDG) that constitute the readout circuit 200 are arranged side by side in the Y-axis direction, two by two, between each of the pixel sharing units U that are adjacent to each other in the X-axis direction, as shown in FIG.

[0051] As described above, the transfer transistor TR is a so-called vertical transistor and has a gate electrode 231 including a vertical portion 231A extending in the Z-axis direction and a horizontal portion 231B perpendicular to the vertical portion 231A. A portion of the vertical portion 231A is embedded in the semiconductor substrate 10. By configuring the transfer transistor TR as such a vertical transistor, transfer failures of pixel signals are less likely to occur, and the readout efficiency of pixel signals can be improved. The pixel transistor 220 is a so-called planar transistor and has a gate electrode 221 provided on the surface 10S1 of the semiconductor substrate 10. Note that a gate insulating film (not shown) is provided on the surface 10S1 of the semiconductor substrate 10. Sidewalls 222 are provided on the sides of the gate electrode 221. The sidewalls 222 are made of, for example, silicon nitride (SiN).

[0052] In this embodiment, the gate electrode 231 of the transfer transistor TR is formed at a different position in the Z-axis direction from the gate electrode 221 of the pixel transistor 220. Specifically, a vertical portion 231A extending in the Z-axis direction of the gate electrode 231 of the transfer transistor TR has one end embedded in the semiconductor substrate 10, and the other end (surface 231S) thereof opposite the other end is formed at a different height in the Z-axis direction from the upper surface 221S of the gate electrode 221 of the pixel transistor 220. More specifically, the gate electrode 221 of the pixel transistor 220 is covered with the interlayer insulating layer 21, and a horizontal portion 231B orthogonal to the vertical portion 231A of the gate electrode 231 of the transfer transistor TR is provided on the interlayer insulating layer 21 that covers the gate electrode 221.

[0053] In other words, in this embodiment, the gate electrode 231 of the transfer transistor TR is formed in a different process from the gate electrode 221 of the pixel transistor 220. Specifically, the gate electrode 231 of the transfer transistor TR is formed in a process in which the gate electrode 221 of the pixel transistor 220 is formed, the interlayer insulating layer 21 covering the gate electrode 221 is formed, and then the vertical portion 231A of the gate electrode 231 is formed in a process in which a contact (e.g., via V1) for the gate electrode 221 etc. is formed. This improves the degree of freedom in the layout design of the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor 220.

[0054] [Method of Manufacturing Photodetector] FIGS. 5A to 5I show an example of a method of manufacturing the transfer transistor TR of the photodetector 1 shown in FIG.

[0055] 5A, an n-type semiconductor region that constitutes the FD 12, as well as the gate electrode 221 and sidewall 222 of the pixel transistor 220, are formed on the surface 10S1 of the semiconductor substrate 10. Next, as shown in FIG. 5A, an interlayer insulating layer 21 that covers the gate electrode 221 is formed by, for example, chemical vapor deposition (CVD), and then the surface of the interlayer insulating layer 21 is planarized by chemical mechanical polishing (CMP).

[0056] 5B, a trench H is formed by photolithography and etching, reaching into the semiconductor substrate 10. Next, as shown in FIG. 5C, an oxide film 115 is formed on the side surface of the trench H formed in the semiconductor substrate 10 by in-situ steam generation (ISSG) oxidation.

[0057] 5D, for example, by solid-phase diffusion or plasma doping, p-type impurities (e.g., boron (B)) are diffused into the semiconductor substrate 10 from the side and bottom surfaces of the trenches H to form p-type layers 15. Next, as shown in Fig. 5E, after the oxide film 115 is removed by, for example, wet etching, a gate oxide film 16 is formed on the side and bottom surfaces of the trenches H by, for example, ISSG oxidation, and the impurities in the p-type layers 15 are activated.

[0058] Next, as shown in FIG. 5F , for example, an amorphous silicon film doped with an n-type impurity (e.g., phosphorus (P)) or a p-type impurity (e.g., boron (B)) is buried in the trench H using, for example, CVD, to form a vertical portion 231A and a horizontal portion 231B. Next, as shown in FIG. 5G , the horizontal portion 231B formed on the interlayer insulating layer 21 is processed by photolithography and etching to form the gate electrode 231. Thereafter, as shown in FIG. 5H , an interlayer insulating layer 21 is further formed on the horizontal portion 231B of the gate electrode 231, and then vias V1 and V2 are formed that reach the gate electrode 221 and the gate electrode 231, respectively, as shown in FIG. 5I . This completes the transfer transistor TR, which has the horizontal portion 231B of the gate electrode 231 at a position different from the gate electrode 221 of the pixel transistor 220 in the Z-axis direction.

[0059] [Functions and Effects] In the photodetector 1 of this embodiment, of the pixel transistor 220 and transfer transistor TR provided on the surface 10S1 of the semiconductor substrate 10, the vertical portion 231A of the transfer transistor TR, which is a so-called vertical transistor, has one end embedded in the semiconductor substrate 10 and the other end (surface 231S) thereof opposite to the other end (surface 231S) is formed at a different height in the Z-axis direction from the upper surface 221S of the gate electrode 221 of the pixel transistor 220. This alleviates layout constraints between the pixel transistor 220 and the transfer transistor TR. This is described below.

[0060] Fig. 6 is a schematic diagram showing an example of a cross-sectional configuration of a main part of a solid-state imaging device (solid-state imaging device 300) having a vertical readout gate electrode 331 and a planar gate electrode 221 of another transistor on the surface of a substrate as described above. Fig. 7 is a schematic diagram showing an example of a planar configuration corresponding to Sec2 of the solid-state imaging device 300 shown in Fig. 6. In the solid-state imaging device 300, the area of ​​the horizontal portion 331B of the vertical readout gate electrode needs to be increased in consideration of variations in the formation of the contact (via V4) that connects the vertical readout gate electrode 331 and the metal wiring layer.

[0061] Furthermore, in the solid-state imaging device 300, constraints on the layout and design rules that take into account the electric field between the transfer transistor having the vertical readout gate electrode 331 and the n-type semiconductor region that constitutes FD12, and the electric field between the transfer transistor having the vertical readout gate electrode 331 and other transistors (e.g., reset transistor RST), are factors that hinder pixel miniaturization.

[0062] In contrast to this, in this embodiment, as described above, of the pixel transistor 220 and the transfer transistor TR provided on the surface 10S1 of the semiconductor substrate 10, the other end (surface 231S) opposite to the one end embedded in the semiconductor substrate 10 of the vertical portion 231A of the transfer transistor TR, which is a so-called vertical transistor, is formed at a different height in the Z-axis direction from the upper surface 221S of the gate electrode 221 of the pixel transistor 220.

[0063] In other words, the vertical portion 231A of the transfer transistor TR is formed in the process of forming a contact (e.g., via V1) to the gate electrode 221, etc., after forming the gate electrode 221 of the pixel transistor 220 and further forming the interlayer insulating layer 21 that covers the gate electrode 221.

[0064] As a result, the distance W1 between the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor arranged nearby is increased compared to the distance W3 between the vertical readout gate electrode 331 and the planar gate electrode 221 of the other transistor in the solid-state imaging device 300 shown in Figures 6 and 7. This alleviates layout restrictions between the pixel transistor 220 and the transfer transistor TR.

[0065] Furthermore, the distance W2 between the gate electrode 231 of the transfer transistor TR and the FD12 formed nearby is greater than the distance W4 between the vertical readout gate electrode 331 and the FD12 in the solid-state imaging device 300 shown in Figures 6 and 7. This alleviates layout restrictions between the FD12 and the transfer transistor TR.

[0066] As a result, in the photodetector device 1 of this embodiment, it is possible to improve the degree of freedom in the layout design of the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor 220, and it is possible to achieve, for example, miniaturization of pixels.

[0067] Furthermore, in the photodetector 1 of this embodiment, compared to the solid-state imaging device 300 having a general configuration, the distance W1 between the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor arranged nearby, and the distance W2 between the gate electrode 231 of the transfer transistor TR and the FD 12 formed nearby, are increased, and therefore the formation area of ​​the pixel transistor can be increased accordingly, thereby making it possible to reduce noise.

[0068] Next, modified examples 1 to 5 and application examples of the present disclosure will be described. In the following, the same components as those in the above embodiment will be given the same reference numerals, and the description thereof will be omitted as appropriate.

[0069] 8 is a schematic diagram illustrating another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector (photodetector 1A) according to Modification 1 of the present disclosure. Fig. 9 is a schematic diagram illustrating an example of the planar configuration of the surface 10S1 of the semiconductor substrate 10 in a solid-state imaging device 300A having a general configuration, which corresponds to the photodetector 1A shown in Fig. 8.

[0070] In the above embodiment, an example has been shown in which four unit pixels P1, P2, P3, and P4 arranged in two rows and two columns share one readout circuit 200, but this is not limiting. A photodetector 1A of this modified example has a configuration in which, for example, two unit pixels P1 and P2 arranged in two rows and one column share one readout circuit 200. Except for this point, the photodetector 1A has substantially the same configuration as the photodetector 1 of the above embodiment.

[0071] In the photodetector 1A, the unit pixel P has a rectangular shape with its long side in the Y-axis direction. Furthermore, in the photodetector 1A, the isolation portion 13 has an FTI structure that penetrates the semiconductor substrate 10, and is partially separated between the unit pixels P1 and P2 that are adjacent in the X-axis direction and share the readout circuit 200. In the photodetector 1A, the FDs 12 are formed at opposing corners of the unit pixels P1 and P2 that are adjacent in the X-axis direction and share the readout circuit 200.

[0072] Even with this configuration, in the photodetector device 1A of this modification, as in the above-described embodiment, the distance W1 between the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor disposed nearby is greater than the distance W3 between the vertical readout gate electrode 331 and the planar gate electrode 221 of another transistor in the solid-state imaging device 300A shown in FIG. 9 . This alleviates layout constraints between the pixel transistor 220 and the transfer transistor TR. Furthermore, the distance W2 between the gate electrode 231 of the transfer transistor TR and the FD12 formed nearby is greater than the distance W4 between the vertical readout gate electrode 331 and the FD12 in the solid-state imaging device 300A shown in FIG. 9 . This alleviates layout constraints between the FD12 and the transfer transistor TR. That is, the photodetector device 1A of this modification can achieve the same effects as the above-described embodiment.

[0073] (2-2. Modification 2) Fig. 10 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector according to Modification 2 of the present disclosure (photodetector 1B). Fig. 11 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector according to Modification 2 of the present disclosure (photodetector 1C).

[0074] In the above-described embodiment and modified example 1, the gate electrode 231 of the transfer transistor TR is formed of one vertical portion 231A and a horizontal portion 231B perpendicular to the vertical portion 231A, but this is not limited to this. Photodetecting devices 1B and 1C of the present modified example each include a transfer transistor TR having a gate electrode 231 formed of two vertical portions 231A and a horizontal portion 231B perpendicular to the two vertical portions 231A. Except for this point, the photodetecting device 1B has substantially the same configuration as the photodetecting device 1 of the above-described embodiment and the photodetecting device 1A of modified example 1.

[0075] In this way, in the photodetector devices 1B and 1C of the present modified example, the gate electrode 231 of the transfer transistor TR is provided with a plurality of vertical portions 231A, which not only achieves the effect of the above-described embodiment but also makes it possible to transfer the charges of the photoelectric conversion unit 11 to the FD 12 more efficiently.

[0076] (2-3. Modification 3) Fig. 12 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector according to Modification 3 of the present disclosure (photodetector 1D). Fig. 13 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector according to Modification 3 of the present disclosure (photodetector 1E).

[0077] In the above-described embodiment and modified example 1, an example was shown in which the vertical portion 231A of the gate electrode 231 of the transfer transistor TR has a circular planar shape, but this is not limited to this. In the photodetector 1C of this modified example, the vertical portion 231A of the gate electrode 231 of the transfer transistor TR has an elliptical shape and is disposed so that its major axis faces the FD 12. Except for this point, the photodetectors 1D and 1E have substantially the same configuration as the photodetector 1 of the above-described embodiment and the photodetector 1A of modified example 1.

[0078] Even with this configuration, the photodetector devices 1D and 1E of this modification can achieve the same effects as those of the above-described embodiment.

[0079] (2-4. Modification 4) Fig. 14 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector according to Modification 4 of the present disclosure (photodetector 1F). Fig. 15 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector according to Modification 3 of the present disclosure (photodetector 1G).

[0080] In the above-described third modification, the vertical portion 231A of the gate electrode 231 of the transfer transistor TR has an elliptical shape and is disposed so that its major axis faces the FD 12, but the present invention is not limited to this. In a photodetector 1C of this modification, the vertical portion 231A of the gate electrode 231 of the transfer transistor TR has an elliptical shape and is disposed so that its minor axis faces the FD 12. Except for this point, the photodetectors 1F and 1G have substantially the same configuration as the photodetectors 1D and 1E of the third modification.

[0081] Even with this configuration, the photodetectors 1F and 1G of this modification can achieve the same effects as those of the above-described embodiment.

[0082] (2-5. Modification 5)

[0083] 16 illustrates an example of a schematic configuration of a photodetector 2 according to Modification 5 of the present disclosure. In the above embodiment, an example has been shown in which a plurality of sensor pixels (unit pixels P) that perform photoelectric conversion and a readout circuit 200 that outputs pixel signals based on charges output from the sensor pixels 12 are provided on a single substrate (semiconductor substrate 10), but the present disclosure is not limited to this.

[0084] The photodetector 2 of this modified example includes three substrates (a first substrate 100, a second substrate 400, and a third substrate 500). The photodetector 2 has a three-dimensional structure formed by bonding together the three substrates (the first substrate 100, the second substrate 400, and the third substrate 500). The first substrate 100, the second substrate 400, and the third substrate 500 are stacked in this order.

[0085] The first substrate 100 has, on its semiconductor substrate 10, a plurality of sensor pixels (unit pixels P) that perform photoelectric conversion. The plurality of unit pixels P are arranged in a matrix within a pixel array section 100A of the first substrate 100. The second substrate 400 has, on its semiconductor substrate 41, a readout circuit 200 for every four unit pixels P. The readout circuit 200 outputs pixel signals based on the electric charges output from the unit pixels P. The second substrate 400 has a plurality of pixel drive lines 42 extending in the row direction and a plurality of vertical signal lines 43 extending in the column direction. The third substrate 500 has, on its semiconductor substrate 51, a logic circuit 52 that processes pixel signals. The logic circuit 52 has, for example, a vertical drive circuit 511, a column signal processing circuit 512, a horizontal drive circuit 513, and a system control circuit 514. The logic circuit 52 (specifically, the horizontal drive circuit 513) outputs an output voltage Vout for each unit pixel P to the outside. In the logic circuit 52, for example, CoSi ２ Alternatively, a low resistance region made of silicide such as NiSi or NiAl may be formed using a salicide (Self Aligned Silicide) process.

[0086] The vertical drive circuit 511, for example, sequentially selects a plurality of unit pixels P row by row. The column signal processing circuit 512, for example, performs correlated double sampling (CDS) processing on pixel signals output from each unit pixel P in the row selected by the vertical drive circuit 511. The column signal processing circuit 512 extracts signal levels of the pixel signals by performing CDS processing, for example, and stores pixel data corresponding to the amount of light received by each unit pixel P. The horizontal drive circuit 513, for example, sequentially outputs the pixel data stored in the column signal processing circuit 512 to the outside. The system control circuit 514, for example, controls the driving of each block (the vertical drive circuit 511, the column signal processing circuit 512, and the horizontal drive circuit 513) in the logic circuit 52.

[0087] The present technology can also be applied to a photodetector 2 having a three-dimensional structure formed by bonding together the above-described three substrates (first substrate 100, second substrate 400, and third substrate 500). The photodetector 2 to which the present technology is applied can obtain the same effects as those of the above-described embodiment.

[0088] 3. Application Examples Application Example 1 The above-described light detection device 1 and the like can be applied to any type of electronic device with an imaging function, for example, a camera system such as a digital still camera or a video camera, a mobile phone with an imaging function, etc. Fig. 17 shows a schematic configuration of an electronic device 1000.

[0089] The electronic device 1000 includes, for example, a lens group 1001, a photodetector 1, a DSP (Digital Signal Processor) circuit 1002, a frame memory 1003, a display unit 1004, a memory unit 1005, an operation unit 1006, and a power supply unit 1007, which are interconnected via a bus line 1008.

[0090] The lens group 1001 takes in incident light (image light) from a subject and forms an image on the imaging surface of the photodetector 1. The photodetector 1 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies the signal as a pixel signal to the DSP circuit 1002.

[0091] The DSP circuit 1002 is a signal processing circuit that processes signals supplied from the photodetector 1. The DSP circuit 1002 outputs image data obtained by processing the signals from the photodetector 1. The frame memory 1003 temporarily stores the image data processed by the DSP circuit 1002 on a frame-by-frame basis.

[0092] The display unit 1004 is composed of a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and the memory unit 1005 records image data of moving or still images captured by the photodetector 1 on a recording medium such as a semiconductor memory or a hard disk.

[0093] In response to a user's operation, the operation unit 1006 outputs operation signals for various functions of the electronic device 1000. The power supply unit 1007 supplies various types of power to the DSP circuit 1002, frame memory 1003, display unit 1004, storage unit 1005, and operation unit 1006 as needed.

[0094] (Application Example 2) Fig. 18A schematically illustrates an example of the overall configuration of a light detection system 2000 including a light detection device (e.g., light detection device 1). Fig. 18B illustrates an example of the circuit configuration of the light detection system 2000. The light detection system 2000 includes a light emitting device 2001 serving as a light source unit that emits infrared light (light L2), and a light detection device 2002 serving as a light receiving unit. The light detection device 2002 may be, for example, the light detection device 1 described above. The light detection system 2000 may further include a system control unit 2003, a light source driving unit 2004, a sensor control unit 2005, a light source side optical system 2006, and a camera side optical system 2007.

[0095] The photodetector 2002 can detect light L1 and light L2. Light L1 is external ambient light reflected by a subject (object to be measured) 2100 ( FIG. 18A ). Light L2 is light emitted by the light-emitting device 2001 and then reflected by the subject 2100. Light L1 is, for example, visible light, and light L2 is, for example, infrared light. Light L1 can be detected by a photoelectric conversion unit in the photodetector 2002, and light L2 can be detected by a photoelectric conversion region in the photodetector 2002. Image information of the subject 2100 can be obtained from light L1, and distance information between the subject 2100 and the photodetector system 2000 can be obtained from light L2. The photodetector system 2000 can be mounted, for example, on an electronic device such as a smartphone or a mobile object such as a car. The light-emitting device 2001 can be configured, for example, by a semiconductor laser, a surface-emitting semiconductor laser, or a vertical-cavity surface-emitting laser (VCSEL). The method of detecting the light L2 emitted from the light-emitting device 2001 by the photodetector 2002 can be, for example, an iTOF method, but is not limited to this. In the iTOF method, the photoelectric conversion unit can measure the distance to the subject 2100, for example, by using the time-of-flight (TOF) of light. The method of detecting the light L2 emitted from the light-emitting device 2001 by the photodetector 2002 can also be, for example, a structured light method or a stereo vision method. For example, in the structured light method, a predetermined pattern of light is projected onto the subject 2100, and the distance between the photodetector system 2000 and the subject 2100 can be measured by analyzing the distortion of the pattern. In addition, in the stereo vision method, for example, two or more cameras are used to acquire two or more images of the subject 2100 viewed from two or more different viewpoints, thereby measuring the distance between the photodetector system 2000 and the subject. The light emitting device 2001 and the light detecting device 2002 can be controlled synchronously by a system control unit 2003 .

[0096] 4. Application Examples (Application Examples to Mobile Bodies) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0097] FIG. 19 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0098] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 19, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0099] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0100] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0101] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0102] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0103] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0104] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0105] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0106] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0107] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 19, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0108] FIG. 20 is a diagram showing an example of the installation position of the imaging unit 12031.

[0109] In FIG. 20 , a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as an imaging unit 12031.

[0110] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by the imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0111] 20 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0112] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0113] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0114] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0115] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0116] The foregoing has described an example of a mobile object control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the imaging unit 12031 of the above-described configuration. Specifically, the light detection device 1 can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, it is possible to obtain a high-resolution captured image with little noise, thereby enabling high-precision control using the captured image in the mobile object control system.

[0117] (Application Example to Endoscopic Surgery System) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0118] FIG. 21 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0119] 21 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11153 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0120] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0121] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0122] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected by the optical system onto the image sensor. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0123] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0124] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0125] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing the surgical site, etc.

[0126] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0127] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0128] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0129] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0130] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light in a narrower band than the light irradiated during normal observation (i.e., white light) to capture high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, in what is known as narrow band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or may involve locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissues with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0131] FIG. 22 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0132] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0133] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0134] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be a single (so-called single-chip type) or multiple (so-called multi-chip type). When the imaging unit 11402 is composed of a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is composed of a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0135] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0136] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0137] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0138] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0139] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0140] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0141] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0142] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0143] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102 .

[0144] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0145] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0146] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.

[0147] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0148] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. Of the configurations described above, the technology according to the present disclosure can be suitably applied to the imaging unit 11402 provided in the camera head 11102 of the endoscope 11100. By applying the technology according to the present disclosure to the imaging unit 11402, it is possible to reduce the size or increase the resolution of the imaging unit 11402, thereby providing a compact or high-resolution endoscope 11100.

[0149] Although the present disclosure has been described above by way of the embodiment, modifications 1 to 5, and application examples, the present technology is not limited to the above-described embodiment, etc., and various modifications are possible. For example, the components constituting the photodetector (photodetector 1) of the above-described embodiment, etc. may be omitted as appropriate, or other components may be provided.

[0150] The effects described in this specification are merely examples and are not limited to those described, and other effects may also be obtained.

[0151] The present disclosure may also be configured as follows. According to the present technology configured as follows, it is possible to increase the degree of freedom in transistor layout. (1) A semiconductor device comprising: a semiconductor substrate having a first surface and a second surface opposing each other; a first transistor provided on the first surface of the semiconductor substrate; and a second transistor provided on the first surface of the semiconductor substrate, the second transistor extending in a thickness direction of the semiconductor substrate as a first direction, the second transistor having a gate electrode including a vertical portion formed in the first direction, one end of the extending direction being embedded in the semiconductor substrate, and the other end being located at a position different from an upper surface of the gate electrode of the first transistor in the first direction. (2) The semiconductor device according to (1), wherein the second transistor further includes a horizontal portion orthogonal to the vertical portion. (3) The semiconductor device according to (2), further comprising an insulating layer provided on the first surface side of the semiconductor substrate so as to cover the gate electrode of the first transistor, the horizontal portion of the second transistor being provided on the insulating layer. (4) The semiconductor device according to any one of (1) to (3), wherein the vertical portion of the second transistor is one or more. (5) The semiconductor device according to any one of (1) to (4), wherein the vertical portion of the first transistor has a circular or elliptical planar shape. (6) A photodetector comprising: a semiconductor substrate having opposing first and second surfaces and having a photoelectric conversion portion embedded in each pixel; a first transistor provided on the first surface of the semiconductor substrate; and a second transistor provided on the first surface of the semiconductor substrate, the second transistor having a gate electrode including a vertical portion extending in a thickness direction of the semiconductor substrate as a first direction, one end of the gate electrode in the extending direction being embedded in the semiconductor substrate, and the other end of the gate electrode of the first transistor being located at a position different from that of an upper surface of the gate electrode of the first transistor in the first direction. (7) The photodetector according to (6), wherein the second transistor further includes a horizontal portion orthogonal to the vertical portion.(8) The photodetector according to (6) or (7), further comprising an insulating layer provided on the first surface side of the semiconductor substrate so as to cover the gate electrode of the first transistor, and the horizontal portion of the second transistor being provided on the insulating layer. (9) The photodetector according to any one of (6) to (8), wherein the vertical portion of the second transistor is one or more. (10) The photodetector according to any one of (6) to (9), wherein the vertical portion of the second transistor has a circular or elliptical planar shape. (11) The photodetector according to any one of (6) to (10), further comprising a charge retention portion provided on the first surface of the semiconductor substrate and temporarily retaining charge generated in the photoelectric conversion portion, and wherein pixel sharing units, in which one charge retention portion is shared by a plurality of the pixels, are arranged in a two-dimensional array on the semiconductor substrate as repeating units. (12) The photodetector according to any one of (6) to (11), wherein one or more of the first transistors are provided for each pixel sharing unit, and one of the second transistors is provided for each pixel. (13) The photodetector according to (12), wherein the second transistors are arranged near the charge retention portion. (14) The photodetector according to (13), wherein the vertical portions of the second transistors each have an elliptical planar shape and are arranged so that their major axes face the charge retention portion. (15) The photodetector according to (13) or (14), wherein the vertical portions of the second transistors each have an elliptical planar shape and are arranged so that their minor axes face the charge retention portion.(16) An electronic device comprising a photodetector, the photodetector comprising: a semiconductor substrate having a first surface and a second surface opposite to each other and having a photoelectric conversion portion embedded in each pixel; a first transistor provided on the first surface of the semiconductor substrate; and a second transistor provided on the first surface of the semiconductor substrate, extending in a thickness direction of the semiconductor substrate as a first direction, one end of the second transistor in the extending direction being embedded in the semiconductor substrate, and the other end of the second transistor having a gate electrode including a vertical portion formed at a position different from an upper surface of the gate electrode of the first transistor in the first direction.

[0152] This application claims priority based on Japanese Patent Application No. 2024-137057, filed on August 16, 2024, in the Japan Patent Office, the entire contents of which are incorporated herein by reference.

[0153] Those skilled in the art will recognize that various modifications, combinations, subcombinations, and variations may occur depending on design requirements and other factors, and are intended to be within the scope of the appended claims and their equivalents.

Claims

1. A semiconductor device comprising: a semiconductor substrate having opposing first and second surfaces; a first transistor provided on the first surface of the semiconductor substrate; and a second transistor provided on the first surface of the semiconductor substrate, the second transistor extending in a first direction, the thickness direction of the semiconductor substrate being defined as a first direction, with one end of the second transistor in the extending direction embedded in the semiconductor substrate and the other end including a vertical portion formed at a position different from an upper surface of the gate electrode of the first transistor in the first direction.

2. The semiconductor device according to claim 1, wherein said second transistor further includes a horizontal portion perpendicular to said vertical portion.

3. The semiconductor device according to claim 2, further comprising an insulating layer provided on the first surface side of the semiconductor substrate so as to cover the gate electrode of the first transistor, and the horizontal portion of the second transistor being provided on the insulating layer.

4. The semiconductor device according to claim 1, wherein the vertical portion of the second transistor is one or more.

5. The semiconductor device according to claim 1, wherein the vertical portion of the first transistor has a circular or elliptical planar shape.

6. A photodetector comprising: a semiconductor substrate having opposing first and second surfaces, and in which a photoelectric conversion portion is embedded for each of the pixels; a first transistor provided on the first surface of the semiconductor substrate; and a second transistor provided on the first surface of the semiconductor substrate, extending in a first direction that is the thickness direction of the semiconductor substrate, with one end in the extending direction embedded in the semiconductor substrate and the other end having a gate electrode including a vertical portion formed at a position different from an upper surface of the gate electrode of the first transistor in the first direction.

7. The photodetector device of claim 6, wherein said second transistor further includes a horizontal portion orthogonal to said vertical portion.

8. The photodetector device according to claim 6, further comprising an insulating layer provided on the first surface side of the semiconductor substrate so as to cover the gate electrode of the first transistor, and the horizontal portion of the second transistor being provided on the insulating layer.

9. The photodetector device of claim 6, wherein the vertical portion of the second transistor is one or more.

10. The photodetector device of claim 6, wherein the vertical portion of the second transistor has a circular or elliptical planar shape.

11. The photodetector according to claim 6, further comprising a charge retention section provided on the first surface of the semiconductor substrate for temporarily retaining the charge generated in the photoelectric conversion section, and pixel sharing units, in which one charge retention section is shared by a plurality of the pixels, are arranged in a two-dimensional array on the semiconductor substrate as repeating units.

12. The photodetector device according to claim 6, wherein one or more of the first transistors are provided for each of the pixel sharing units, and one of the second transistors is provided for each of the pixels.

13. The photodetector device according to claim 12, wherein a plurality of said second transistors are arranged in the vicinity of said charge storage portion.

14. The photodetector device according to claim 13, wherein the vertical portions of the plurality of second transistors each have an elliptical planar shape and are arranged so that their major axes face the charge storage portion.

15. The photodetector device according to claim 13, wherein the vertical portions of the plurality of second transistors each have an elliptical planar shape and are arranged so that their minor axes face the charge storage portion.

16. An electronic device comprising a photodetector, the photodetector comprising: a semiconductor substrate having opposing first and second surfaces and having a photoelectric conversion unit embedded in each of the pixels; a first transistor provided on the first surface of the semiconductor substrate; and a second transistor provided on the first surface of the semiconductor substrate, extending in a first direction that is the thickness direction of the semiconductor substrate, with one end in the extending direction embedded in the semiconductor substrate and the other end having a gate electrode including a vertical portion formed at a position different from an upper surface of the gate electrode of the first transistor in the first direction.

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