Composite substrate for semiconductor device growth, and manufacturing method therefor

By inserting a low-doping insertion layer between high-doping GaN layers, the crystallinity and resistance of GaN layers are improved, addressing defects and current backflow issues in semiconductor devices.

WO2026038606A1PCT designated stage Publication Date: 2026-02-19WAVELORD CO LTD
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Patent Information

Application Number
PCT/KR2024/014859
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-08-16
Filing Date
2024-09-30
Publication Date
2026-02-19

AI Technical Summary

Technical Problem

Conventional GaN layers in semiconductor devices suffer from reduced crystallinity and high resistance issues, leading to breakdowns in power semiconductor devices and decreased luminous efficiency in light-emitting elements due to doping-related defects and current backflow.

Method used

Inserting a low-doping concentration insertion layer between high-doping concentration GaN layers to enhance crystallinity while maintaining high resistance characteristics.

Benefits of technology

Improves crystallinity and prevents current backflow, reducing defects and enhancing breakdown voltage in power semiconductors and external quantum efficiency in light-emitting devices.

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Abstract

The present invention relates to a composite substrate for semiconductor device growth, and a manufacturing method therefor, the composite substrate having at least one insertion layer with a relatively low doping concentration inserted between high-resistance GaN layers with a high doping concentration, thereby enabling crystallinity to be increased while maintaining the high-resistance characteristic of the GaN layers.
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Description

Composite substrate for semiconductor device growth and manufacturing method thereof

[0001] The present invention relates to a composite substrate for semiconductor device growth and a method for manufacturing the same, and more particularly, to a composite substrate for semiconductor device growth and a method for manufacturing the same, wherein at least one insertion layer having a relatively low doping concentration is inserted between high-resistance GaN layers having a high doping concentration, thereby increasing crystallinity of the GaN layer while maintaining high-resistance characteristics.

[0002] Figure 1 illustrates a power semiconductor element or light-emitting element formed on a composite substrate of a prior art.

[0003] As illustrated in (a) of Fig. 1, when manufacturing a GaN HEMT used as a power semiconductor device, a conventional composite substrate (10) includes a growth substrate (11), a buffer layer (12), and a GaN layer (13). A GaN channel layer (14a) and an AlGaN barrier layer (15a), etc. are sequentially laminated on the composite substrate (10), and then a source electrode, a drain electrode, a gate electrode, etc. are formed. At this time, in order to act as a barrier to prevent a buffer leakage phenomenon in which charges leak below the channel layer (14a), the GaN layer (13) disposed between the buffer layer (12) and the channel layer (14a) is doped with a high concentration of carbon or iron (Fe).

[0004] However, there is a problem that pits are created in the GaN layer (13) and crystallinity is reduced due to low growth temperature for doping, pressure, composition ratio of group 3 and group 5 materials, doping materials, etc., and this reduction in crystallinity causes breakdown at high voltage.

[0005] On the other hand, when manufacturing an LED, which is a light-emitting element, as shown in (b) of Fig. 1, a conventional composite substrate (10) includes a growth substrate (11), a buffer layer (12), and a GaN layer (13), and an n-type semiconductor layer (14b), an active layer (15b), and a p-type semiconductor layer (16b), etc. are sequentially laminated on the composite substrate (10), and then an n / p ohmic contact electrode is formed. At this time, in order to secure high-quality crystallinity and thereby increase light-emitting efficiency, various methods, such as an HT-GaN layer or PSS (Patterned Sapphire Substrates), are applied.

[0006] However, in this case, the driving current increases due to the low resistance characteristics of the GaN layer (13), or the current density increases as the chip size decreases for microLED production, causing current backflow. Due to this current backflow, electrons are trapped in the buffer layer (12) which has relatively many defects, causing a problem in that the luminous efficiency or external quantum efficiency (EQE) is lowered.

[0007] The purpose of the present invention is to solve the above-described conventional problems, and to provide a composite substrate for semiconductor device growth and a method for manufacturing the same, in which at least one insertion layer having a relatively low doping concentration is inserted between high-resistance GaN layers having a high doping concentration, thereby increasing crystallinity of the GaN layer while maintaining high resistance characteristics.

[0008] The above object is achieved by a composite substrate for semiconductor device growth, according to the present invention, comprising: a growth substrate; a buffer layer formed on the growth substrate; a GaN layer formed on the buffer layer; and an insertion layer inserted into the GaN layer, wherein the GaN layer is doped at a predetermined concentration so as to increase resistance, and the insertion layer is doped at a lower concentration than the GaN layer so as to increase crystallinity of the GaN layer.

[0009] Additionally, the GaN layer may be doped with carbon or iron (Fe).

[0010] Additionally, the above insertion layer may be doped with carbon.

[0011] In addition, the GaN layer is 5E10 18 atoms / cm 3 With the above doping concentration, the insertion layer is 5E10 17 atoms / cm 3 It can have the following doping concentrations:

[0012] In addition, the present invention may further include a device layer grown on the GaN layer.

[0013] The above object is achieved by a method for manufacturing a composite substrate for semiconductor device growth, comprising the steps of: preparing a growth substrate; forming a buffer layer on the growth substrate; and forming a GaN layer on the buffer layer, wherein in the step of forming the GaN layer, an insertion layer is inserted to form the GaN layer, the GaN layer is doped at a preset concentration so as to increase resistance, and the insertion layer is doped at a lower concentration than the GaN layer so as to increase crystallinity of the GaN layer.

[0014] According to the present invention, by inserting at least one insertion layer having a relatively low doping concentration between high-resistance GaN layers having a high doping concentration, there is an effect of increasing crystallinity while maintaining the high-resistance characteristics of the GaN layer.

[0015] In addition, according to the present invention, when applied to the manufacture of power semiconductor devices, there is an effect that quality deterioration issues such as breakdown voltage reduction caused by a large number of crystal defects can be significantly improved.

[0016] In addition, according to the present invention, when applied to the manufacture of a light-emitting device, the current backflow phenomenon can be prevented by the high-resistance GaN layer, and thus, there is an effect that the issue of electrons being trapped in a buffer layer having a relatively large number of defects and thus lowering the external quantum efficiency (EQE) can be significantly improved.

[0017] Meanwhile, the effects of the present invention are not limited to the effects mentioned above, and various effects may be included within a range obvious to those skilled in the art from the contents described below.

[0018] Figure 1 illustrates a power semiconductor element or a light-emitting element formed on a composite substrate of the prior art.

[0019] FIG. 2 illustrates a composite substrate for semiconductor device growth according to one embodiment of the present invention.

[0020] FIG. 3 illustrates a power semiconductor element or a light-emitting element formed on a composite substrate for semiconductor element growth according to one embodiment of the present invention.

[0021] FIG. 4 illustrates the carbon concentration according to the depth of the GaN layer into which the insertion layer of the composite substrate for semiconductor device growth is inserted according to one embodiment of the present invention.

[0022] Figure 5 is a flowchart of a method for manufacturing a composite substrate for semiconductor device growth according to one embodiment of the present invention.

[0023] FIG. 6 illustrates a process of manufacturing a composite substrate according to a method for manufacturing a composite substrate for semiconductor device growth according to one embodiment of the present invention.

[0024] Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. When designating components in each drawing, it should be noted that, where possible, identical components are given the same reference numerals, even if they appear in different drawings.

[0025] In addition, when describing an embodiment of the present invention, if a detailed description of a related known configuration or function is judged to hinder understanding of the embodiment of the present invention, the detailed description is omitted.

[0026] Additionally, when describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only intended to distinguish the components from other components, and the nature, order, or sequence of the components are not limited by the terms.

[0027]

[0028] From now on, with reference to the attached drawings, a composite substrate (100) for semiconductor device growth according to one embodiment of the present invention will be described in detail.

[0029] FIG. 2 illustrates a composite substrate (100) for semiconductor device growth according to one embodiment of the present invention, FIG. 3 illustrates a power semiconductor device and a light-emitting device formed on a composite substrate (100) for semiconductor device growth according to one embodiment of the present invention, and FIG. 4 illustrates the carbon concentration according to the depth of a GaN layer (130) into which an insertion layer (131) of a composite substrate (100) for semiconductor device growth according to one embodiment of the present invention is inserted.

[0030] As illustrated in FIGS. 2 and 3, a composite substrate (100) for semiconductor device growth according to one embodiment of the present invention includes a growth substrate (110), a buffer layer (120), a GaN layer (130), an insertion layer (131), and a device layer (140).

[0031] The growth substrate (110) is a substrate on which a buffer layer (120) is grown, and may be formed of a material such as sapphire (α-phase Al2O3), ScMgAlO4, Si, 4H-SiC, and / or 6H-SiC. At this time, it is also preferable that the growth substrate (110) have a protrusion shape that is patterned regularly or irregularly in various dimensions (size and shape) in microscale or nanoscale in order to minimize the formation of crystal defects inside the buffer layer (120) grown on top.

[0032] The buffer layer (120) serves as a buffer to improve the quality of the GaN layer (130) during the growth of the upper GaN layer (130), and is formed on the growth substrate (110). This buffer layer (120) is made of Al x Ga 1-x It can be composed of N and can be formed as a single layer and / or multiple layers.

[0033] The GaN layer (130) is a layer that is artificially doped (injected) with carbon or iron (Fe) to increase resistance, and is formed on the buffer layer (120).

[0034] This GaN layer (130) is 5E10 based on SIMS (secondary ion mass spectroscopy) data. 18 atoms / cm 3 It can be doped with a doping concentration of above, preferably 5E10 18 atoms / cm 3 1E10 inland 20 atoms / cm 3It can be doped with a doping concentration of . In addition, the GaN layer (130) can have a thickness of 1.2 μm or less, and preferably can have a thickness of 0.3 μm to 1.2 μm.

[0035] The insertion layer (131) is formed of GaN, but is doped at a lower concentration than the GaN layer (130) so that the crystallinity of the GaN layer (130) can be increased, and is a layer inserted into the GaN layer (130). At least one insertion layer (131) can be inserted into the GaN layer (130), and preferably, at least two insertion layers (131) can be inserted into the GaN layer (130) at a predetermined depth from the upper surface of the GaN layer (130) and spaced apart from each other.

[0036] Meanwhile, when a plurality of insertion layers (131) are each inserted at a preset depth from the upper surface of the GaN layer (130), the plurality of insertion layers (131) can be inserted relatively closer to the upper surface than the lower surface of the GaN layer (130) so that the crystallinity of the element layer (140) described later can be further improved.

[0037] At this time, the doping material of the insertion layer (131) can be prepared as carbon, and the insertion layer (131) can be 5E10 based on secondary ion mass spectroscopy (SIMS) data at a high temperature (HT) of 1000°C to 1150°C so that the crystallinity of the GaN layer (130) grown on each upper portion can be increased. 17 atoms / cm 3 It can be doped with the following doping concentration, preferably 5E10 16 atoms / cm 3 Inland 5E10 17 atoms / cm 3 It can be doped with a doping concentration of . In addition, the insertion layer (131) can have a thickness of 100 nm or less, and preferably can have a thickness of 50 nm to 80 nm.

[0038] As illustrated in Fig. 3, according to these insertion layers (131), when the GaN layer (130) is grown, a significant portion of the threading dislocations (T) (threading dislocations, TD) formed by each insertion layer (131) extending upward from the surface of the buffer layer (120) can be blocked.

[0039] Furthermore, FIG. 4 shows that the carbon concentration is rapidly reduced at each portion where the insertion layer (131) is inserted. In the present invention, the carbon concentration of the GaN layer (130) and the insertion layer (131) can have a difference of 10 times or more, preferably 100 times or more, and by inserting a high-quality insertion layer (131) with a low carbon doping concentration between the carbon or iron-doped GaN layer (130), the GaN layer (130) can maintain high-resistance characteristics while increasing crystallinity.

[0040] The device layer (140) is grown on a GaN layer (130) into which at least one insertion layer (131) is inserted, and this device layer (140) has a corresponding laminated structure depending on the structure of the power semiconductor device or light-emitting device to be manufactured.

[0041] When the device layer (140) is formed as a power semiconductor device structure, for example, as shown in (a) of FIG. 3, a GaN channel layer (141a) and an AlGaN barrier layer (142a) may be sequentially laminated and formed as a GaN HEMT structure, and other elements such as a GaN drift layer, a capping passivation layer or a pGaN layer, electrodes (source electrode (S), drain electrode (D), and gate electrode (G)) may be included, but are not limited thereto, and various power semiconductor device structures may be included.

[0042] At this time, according to the GaN layer (130) into which the insertion layer (131) of the present invention is inserted, quality degradation issues such as breakdown voltage degradation caused by a large number of crystal defects in the power semiconductor device structure can be significantly improved.

[0043] In addition, when the element layer (140) is formed as a light-emitting element structure, for example, as shown in (b) of FIG. 3, an n-type semiconductor layer (141b) that provides electrons, an active layer (142b) that generates light when electrons and holes meet, and a p-type semiconductor layer (143b) that provides holes may be sequentially laminated and formed as a GaN LED structure, and other elements such as a p-ohmic contact electrode, an n-ohmic contact electrode, and a DBR layer (distributed bragg reflectors) may be included, but are not limited thereto, and various light-emitting element structures may be included.

[0044] At this time, according to the GaN layer (130) into which the insertion layer (131) of the present invention is inserted, the current backflow phenomenon can be prevented by the high-resistance GaN layer (130), and as a result, the issue of electrons being trapped in the buffer layer (120) having relatively many defects and the external quantum efficiency (EQE) being lowered can be significantly improved.

[0045]

[0046] From now on, with reference to the attached drawings, a method (S100) for manufacturing a composite substrate for semiconductor device growth according to one embodiment of the present invention will be described in detail.

[0047] FIG. 5 is a flowchart of a method (S100) for manufacturing a composite substrate for semiconductor device growth according to an embodiment of the present invention, and FIG. 6 illustrates a process for manufacturing a composite substrate according to a method (S100) for manufacturing a composite substrate for semiconductor device growth according to an embodiment of the present invention.

[0048] As illustrated in FIGS. 5 and 6, a method (S100) for manufacturing a composite substrate for semiconductor device growth according to one embodiment of the present invention includes a step of preparing a growth substrate (110) (step S110), a step of forming a buffer layer (120) on the growth substrate (110) (step S120), a step of forming a GaN layer (130) on the buffer layer (120) (step S130), and a step of growing a device layer (140) on the GaN layer (130).

[0049] Step S110 is the step of preparing the growth substrate (110).

[0050] The growth substrate (110) is a substrate on which a buffer layer (120) is grown, and may be formed of a material such as sapphire (α-phase Al2O3), ScMgAlO4, Si, 4H-SiC, and / or 6H-SiC. At this time, it is also preferable that the growth substrate (110) have a protrusion shape that is patterned regularly or irregularly in various dimensions (size and shape) in microscale or nanoscale in order to minimize the formation of crystal defects inside the buffer layer (120) grown on top.

[0051] Step S120 is a step of forming a buffer layer (120) on a growth substrate (110).

[0052] The buffer layer (120) acts as a buffer to improve the quality of the GaN layer (130) during the growth of the upper GaN layer (130), and this buffer layer (120) is made of Al x Ga 1-x It can be composed of N and can be formed as a single layer and / or multiple layers.

[0053] Step S130 is a step of forming a GaN layer (130) on a buffer layer (120).

[0054] The GaN layer (130) is a layer that is artificially doped (injected) with carbon or iron (Fe) to increase resistance, and this GaN layer (130) has a resistance of 5E10 based on SIMS (secondary ion mass spectroscopy) data. 18 atoms / cm 3 It can be doped with a doping concentration of above, preferably 5E10 18 atoms / cm 3 1E10 inland 20 atoms / cm 3 It can be doped with a doping concentration of . In addition, the GaN layer (130) can have a thickness of 1.2 μm or less, and preferably can have a thickness of 0.3 μm to 1.2 μm.

[0055] At this time, in step S130, when forming a GaN layer (130), at least one insertion layer (131) can be inserted.

[0056] The insertion layer (131) is formed of GaN, but is doped at a lower concentration than the GaN layer (130) so that the crystallinity of the GaN layer (130) can be increased, and is a layer inserted into the GaN layer (130). At least one insertion layer (131) can be inserted into the GaN layer (130), and preferably, at least two insertion layers (131) can be inserted into the GaN layer (130) at a predetermined depth from the upper surface of the GaN layer (130) and spaced apart from each other. For example, the lower part of the GaN layer (130) may be formed first, and then a first insertion layer may be formed, and then a part of the GaN layer (130) may be formed on the first insertion layer, and then a second insertion layer may be formed thereon, and then the upper part of the GaN layer (130) may be formed on the second insertion layer.

[0057] Meanwhile, when a plurality of insertion layers (131) are each inserted at a preset depth from the upper surface of the GaN layer (130), the plurality of insertion layers (131) can be inserted relatively closer to the upper surface than the lower surface of the GaN layer (130) so that the crystallinity of the element layer (140) described later can be further improved.

[0058] In addition, the doping material of the insertion layer (131) can be prepared as carbon, and the insertion layer (131) can have a crystallinity of 5E10 based on secondary ion mass spectroscopy (SIMS) data at a high temperature (HT) of 1000°C to 1150°C so that the crystallinity of the GaN layer (130) grown on each upper portion can be increased. 17 atoms / cm 3 It can be doped with the following doping concentration, preferably 5E10 16 atoms / cm 3 Inland 5E10 17 atoms / cm 3 It can be doped with a doping concentration of . In addition, the insertion layer (131) can have a thickness of 100 nm or less, and preferably can have a thickness of 50 nm to 80 nm.

[0059] As illustrated in Fig. 3, according to these insertion layers (131), when the GaN layer (130) is grown, a significant portion of the threading dislocations (T) (threading dislocations, TD) formed by each insertion layer (131) extending upward from the surface of the buffer layer (120) can be blocked.

[0060] Furthermore, FIG. 4 shows that the carbon concentration is rapidly reduced at each portion where the insertion layer (131) is inserted. In the present invention, the carbon concentration of the GaN layer (130) and the insertion layer (131) have a difference of 100 times or more, and by inserting a high-quality insertion layer (131) with a low carbon doping concentration between the carbon or iron-doped GaN layer (130), the GaN layer (130) can maintain high-resistance characteristics while increasing crystallinity.

[0061] Step S140 is a step of growing a device layer (140) on a GaN layer (130).

[0062] The device layer (140) is grown on a GaN layer (130) into which at least one insertion layer (131) is inserted, and this device layer (140) has a corresponding laminated structure depending on the structure of the power semiconductor device or light-emitting device to be manufactured.

[0063] As illustrated in FIG. 6, when the device layer (140) is formed as a power semiconductor device structure, for example, a GaN channel layer (141a) and an AlGaN barrier layer (142a) may be sequentially laminated and formed as a GaN HEMT structure, and other elements such as a GaN drift layer, a capping passivation layer or a pGaN layer, electrodes (source electrode (S), drain electrode (D), and gate electrode (G)), etc. may be included, but are not limited thereto, and various power semiconductor device structures may be included.

[0064] At this time, according to the GaN layer (130) into which the insertion layer (131) of the present invention is inserted, quality degradation issues such as breakdown voltage degradation caused by a large number of crystal defects in the power semiconductor device structure can be significantly improved.

[0065] In addition, when the device layer (140) is formed as a light-emitting device structure as illustrated in FIG. 6, for example, as a GaN LED structure, an n-type semiconductor layer (141b) that provides electrons, an active layer (142b) that generates light when electrons and holes meet, and a p-type semiconductor layer (143b) that provides holes may be sequentially laminated and formed, and other components such as a p-ohmic contact electrode, an n-ohmic contact electrode, and a DBR layer (distributed bragg reflectors) may be included, but are not limited thereto, and various light-emitting device structures may be included.

[0066] At this time, according to the GaN layer (130) into which the insertion layer (131) of the present invention is inserted, the current backflow phenomenon can be prevented by the high-resistance GaN layer (130), and as a result, the issue of electrons being trapped in the buffer layer (120) having relatively many defects and the external quantum efficiency (EQE) being lowered can be significantly improved.

[0067] Meanwhile, an LED light-emitting device was manufactured using a composite substrate without an insertion layer and a composite substrate with an insertion layer (131) of the present invention applied thereto. Specifically, after growing the same buffer layer (120) using the same sapphire growth substrate (110), a GaN layer (130) was formed on the buffer layer (120), and then an n-type semiconductor layer (141b), an active layer (142b), and a p-type semiconductor layer (143b) were sequentially epitaxially grown on the GaN layer (130), and after mesa etching, a p-ohmic contact electrode and an n-ohmic contact electrode were formed to implement an LED light-emitting device structure, and the internal quantum efficiency (IQE) and the external quantum efficiency (EQE) were measured, respectively. At this time, for comparison, the GaN layer (130) of the composite substrate without an insertion layer (131) had a thickness of 1.2 μm and an EQE of 1E10 19 atoms / cm 3 The GaN layer (130) of the composite substrate to which the insertion layer (131) of the present invention is applied has a thickness of 1.1 ㎛ and a doping concentration of 1E10 19 atoms / cm 3 It was formed to have a doping concentration of , and the insertion layer (131) was provided in two pieces and inserted at a depth of 0.25 ㎛ and 0.4 ㎛ from the upper surface of the GaN layer (130), respectively, and had a thickness of 50 nm and 1E10, respectively. 19 atoms / cm 3 It was formed to have a doping concentration of . As a result of the measurement, when an LED light-emitting device was manufactured using a composite substrate with an insertion layer, it was confirmed that the internal quantum efficiency (IQE) and external quantum efficiency (EQE) were improved by approximately 3% and 6%, respectively, compared to a composite substrate without an insertion layer.

[0068]

[0069] Although all components constituting the embodiments of the present invention have been described as being combined or operating in combination as one, the present invention is not necessarily limited to such embodiments. That is, within the scope of the present invention, all of the components may be selectively combined and operated in one or more combinations.

[0070] Furthermore, terms such as "include," "comprise," or "have" described above, unless specifically stated otherwise, imply that the corresponding component may be present, and therefore should be interpreted to include other components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as commonly understood by a person of ordinary skill in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as terms defined in dictionaries, should be interpreted to be consistent with the contextual meaning of the relevant technology, and shall not be interpreted in an ideal or overly formal sense, unless explicitly defined in the present invention.

[0071] The above description is merely an example of the technical idea of ​​the present invention, and those skilled in the art will appreciate that various modifications and variations can be made without departing from the essential characteristics of the present invention.

[0072] Accordingly, the embodiments disclosed in the present invention are intended to illustrate, rather than limit, the technical concept of the present invention, and the scope of the technical concept of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical concepts within the scope equivalent thereto should be construed as being included within the scope of the present invention.

Claims

1. Growth plate; A buffer layer formed on the growth substrate; A GaN layer formed on the buffer layer; and Including an insertion layer inserted into the above GaN layer, The above GaN layer, Doped at a preset concentration so that the resistance can be increased, The above insert layer is, A composite substrate for semiconductor device growth, characterized in that the GaN layer is doped at a lower concentration than the GaN layer so that the crystallinity of the GaN layer can be increased.

2. In claim 1, The above GaN layer, A composite substrate for semiconductor device growth, characterized by being doped with carbon or iron (Fe).

3. In claim 2, The above insert layer is, A composite substrate for semiconductor device growth, characterized by being doped with carbon.

4. In claim 3, The above GaN layer, 5E10 18 atoms / cm 3 With the above doping concentration, The above insert layer is, 5E10 17 atoms / cm 3 A composite substrate for semiconductor device growth, characterized by having the following doping concentration.

5. In claim 1, A composite substrate for semiconductor device growth, further comprising a device layer grown on the GaN layer.

6. Step for preparing the growth substrate; A step of forming a buffer layer on the growth substrate; and Comprising a step of forming a GaN layer on the buffer layer, In the step of forming the above GaN layer, Inserting an insertion layer and forming the GaN layer, The above GaN layer, Doped at a preset concentration so that the resistance can be increased, The above insert layer is, A method for manufacturing a composite substrate for semiconductor device growth, characterized in that the GaN layer is doped at a lower concentration than the GaN layer so that the crystallinity of the GaN layer can be increased.

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