Method and apparatus on interleaved DFT phase rotated permutation based fdma

Abstract

The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). An electronic device includes a processor. The processor is configured to convert a modulation symbol sequence of length MK into interleaved discrete Fourier transform phase rotated permutation based frequency division multiple access (DFT-p-FDMA) symbols. The electronic device also includes a transceiver operatively coupled to the processor. The transceiver is configured to transmit the interleaved DFT-p-FDMA symbols.

Description

METHOD AND APPARATUS ON INTERLEAVED DFT PHASE ROTATED PERMUTATION BASED FDMA

[0001] This disclosure relates generally to wireless networks. More specifically, this disclosure relates to interleaved discrete Fourier transform (DFT) phase rotated permutation based frequency division multiple access (FDMA).

[0002] Considering the development of wireless communication from generation to generation, the technologies have been developed mainly for services targeting humans, such as voice calls, multimedia services, and data services. Following the commercialization of 5G (5th generation) communication systems, it is expected that the number of connected devices will exponentially grow. Increasingly, these will be connected to communication networks. Examples of connected things may include vehicles, robots, drones, home appliances, displays, smart sensors connected to various infrastructures, construction machines, and factory equipment. Mobile devices are expected to evolve in various form-factors, such as augmented reality glasses, virtual reality headsets, and hologram devices. In order to provide various services by connecting hundreds of billions of devices and things in the 6G (6th generation) era, there have been ongoing efforts to develop improved 6G communication systems. For these reasons, 6G communication systems are referred to as beyond-5G systems.

[0003] 6G communication systems, which are expected to be commercialized around 2030, will have a peak data rate of tera (1,000 giga)-level bit per second (bps) and a radio latency less than 100μsec, and thus will be 50 times as fast as 5G communication systems and have the 1 / 10 radio latency thereof.

[0004] In order to accomplish such a high data rate and an ultra-low latency, it has been considered to implement 6G communication systems in a terahertz (THz) band (for example, 95 gigahertz (GHz) to 3THz bands). It is expected that, due to severer path loss and atmospheric absorption in the terahertz bands than those in mmWave bands introduced in 5G, technologies capable of securing the signal transmission distance (that is, coverage) will become more crucial. It is necessary to develop, as major technologies for securing the coverage, Radio Frequency (RF) elements, antennas, novel waveforms having a better coverage than Orthogonal Frequency Division Multiplexing (OFDM), beamforming and massive Multiple-input Multiple-Output (MIMO), Full Dimensional MIMO (FD-MIMO), array antennas, and multiantenna transmission technologies such as large-scale antennas. In addition, there has been ongoing discussion on new technologies for improving the coverage of terahertz-band signals, such as metamaterial-based lenses and antennas, Orbital Angular Momentum (OAM), and Reconfigurable Intelligent Surface (RIS).

[0005] Moreover, in order to improve the spectral efficiency and the overall network performances, the following technologies have been developed for 6G communication systems: a full-duplex technology for enabling an uplink transmission and a downlink transmission to simultaneously use the same frequency resource at the same time; a network technology for utilizing satellites, High-Altitude Platform Stations (HAPS), and the like in an integrated manner; an improved network structure for supporting mobile base stations and the like and enabling network operation optimization and automation and the like; a dynamic spectrum sharing technology via collision avoidance based on a prediction of spectrum usage; an use of Artificial Intelligence (AI) in wireless communication for improvement of overall network operation by utilizing AI from a designing phase for developing 6G and internalizing end-to-end AI support functions; and a next-generation distributed computing technology for overcoming the limit of UE computing ability through reachable super-high-performance communication and computing resources (such as Mobile Edge Computing (MEC), clouds, and the like) over the network. In addition, through designing new protocols to be used in 6G communication systems, developing mechanisms for implementing a hardware-based security environment and safe use of data, and developing technologies for maintaining privacy, attempts to strengthen the connectivity between devices, optimize the network, promote softwarization of network entities, and increase the openness of wireless communications are continuing.

[0006] It is expected that research and development of 6G communication systems in hyper-connectivity, including person to machine (P2M) as well as machine to machine (M2M), will allow the next hyper-connected experience. Particularly, it is expected that services such as truly immersive eXtended Reality (XR), high-fidelity mobile hologram, and digital replica could be provided through 6G communication systems. In addition, services such as remote surgery for security and reliability enhancement, industrial automation, and emergency response will be provided through the 6G communication system such that the technologies could be applied in various fields such as industry, medical care, automobiles, and home appliances.

[0007] The present disclosure relates to method and apparatus for on interleaved dft phase rotated permutation based fdma in a wireless communication system.

[0008] According to an aspect of an exemplary embodiment, there is provided a communication method in a wireless communication system.

[0009] Aspects of the present disclosure provide efficient communication methods in a wireless communication system.

[0010] For a more complete understanding of this disclosure and its advantages, reference is now made to the following description, taken in conjunction with the accompanying drawings, in which:

[0011] FIG. 1 illustrates an example wireless network according to embodiments of the present disclosure;

[0012] FIGS. 2A and 2B illustrate example wireless transmit and receive paths according to embodiments of the present disclosure;

[0013] FIG. 3A illustrates an example UE according to embodiments of the present disclosure;

[0014] FIG. 3B illustrates an example gNB according to embodiments of the present disclosure;

[0015] FIG. 4 illustrates an example transmitter according to embodiments of the present disclosure;

[0016] FIG. 5 illustrates another example transmitter according to embodiments of the present disclosure;

[0017] FIG. 6 illustrates an example procedure for operation of a transmitter according to embodiments of the present disclosure;

[0018] FIG. 7 illustrates an example of interleaving according to embodiments of the present disclosure;

[0019] FIG. 8 illustrates an example of row allocation according to embodiments of the present disclosure;

[0020] FIG. 9 illustrates an example interleaving operation according to embodiments of the present disclosure;

[0021] FIG. 10 illustrates another example of interleaving according to embodiments of the present disclosure;

[0022] FIG. 11 illustrates another example interleaving operation according to embodiments of the present disclosure;

[0023] FIG. 12 illustrates an example procedure for downlink signaling according to embodiments of the present disclosure;

[0024] FIG. 13 illustrates an example procedure for uplink signaling according to embodiments of the present disclosure; and

[0025] FIG. 14 illustrates an example method for interleaved DFT phase rotated permutation based FDMA according to embodiments of the present disclosure.

[0026] FIG. 15 illustrates a block diagram of a user equipment, according to embodiments of the present disclosure.

[0027] FIG. 16 illustrates a block diagram of a base station, according to embodiments of the present disclosure.

[0028] FIG. 17 illustrates a block diagram of a network entity, according to embodiments of the present disclosure.

[0029] This disclosure provides apparatuses and methods for interleaved DFT phase rotated permutation based FDMA.

[0030] In one embodiment, an electronic device is provided. The electronic device includes a processor. The processor is configured to convert a modulation symbol sequence of lengthMKinto interleaved discrete Fourier transform phase rotated permutation based frequency division multiple access (DFT-p-FDMA) symbols. The electronic device also includes a transceiver operatively coupled to the processor. The transceiver is configured to transmit the interleaved DFT-p-FDMA symbols.

[0031] In another embodiment, a method of operating an electronic device is provided. The method includes converting a modulation symbol sequence of lengthMKinto interleaved DFT-p-FDMA symbols. The method also includes transmitting the interleaved DFT-p-FDMA symbols.

[0032] In yet another embodiment, a non-transitory computer readable medium embodying a computer program is provided. The computer program includes program code, that when executed by a processor of a device, causes the device to convert a modulation symbol sequence of lengthMKinto interleaved DFT-p-FDMA symbols, and transmit the interleaved DFT-p-FDMA symbols.

[0033] Hereinafter, embodiments of the disclosure will be described in detail with reference to the accompanying drawings.

[0034] In describing the embodiments, descriptions related to technical contents well-known in the art and not associated directly with the disclosure will be omitted. Such an omission of unnecessary descriptions is intended to prevent obscuring of the main idea of the disclosure and more clearly transfer the main idea.

[0035] For the same reason, in the accompanying drawings, some elements may be exaggerated, omitted, or schematically illustrated. Further, the size of each element does not completely reflect the actual size. In the drawings, identical or corresponding elements are provided with identical reference numerals or different reference numerals.

[0036] The advantages and features of the disclosure and ways to achieve them will be apparent by making reference to embodiments as described below in detail in conjunction with the accompanying drawings. However, the disclosure is not limited to the embodiments set forth below, but may be implemented in various different forms. The following embodiments are provided only to completely disclose the disclosure and inform those skilled in the art of the scope of the disclosure, and the disclosure is defined only by the scope of the appended claims. Throughout the specification, the same or like reference numerals designate the same or like elements. Furthermore, in describing the disclosure, a detailed description of known functions or constitution incorporated herein will be omitted in the case that it is determined that the description may make the subject matter of the disclosure unnecessarily unclear. The terms which will be described below are terms defined in consideration of the functions in the disclosure, and may be different according to users, intentions of the operators, or customs. Therefore, the definitions of the terms should be made based on the contents throughout the specification.

[0037] Herein, it will be understood that each block of the flowchart illustrations, and combinations of blocks in the flowchart illustrations, may be performed based on computer program instructions. These computer program instructions may be loaded collectively onto at least one processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which perform through any one of, or in any combination of, the at least one processor of the computer or other programmable data processing apparatus, create means for performing the functions specified in the flowchart block(s). These computer program instructions may also be stored in a non-transitory computer usable or computer-readable memory that may direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer usable or computer-readable memory produce an article of manufacture including instruction means that perform the function specified in the flowchart block(s). The computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable data processing apparatus to produce a computer executed process such that the instructions that perform on the computer or other programmable data processing apparatus provide steps for executing the functions specified in the flowchart block(s).

[0038] Further, each block may represent a module, segment, or portion of code, which includes one or more executable instructions for executing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the blocks may occur out of the order. For example, two blocks(or functions) shown in succession may in fact be performed substantially concurrently or the blocks may sometimes be performed in the reverse order, depending upon the functionality involved.

[0039] As used in embodiments of the disclosure, a “~unit” may refer to a software element or a hardware element, such as a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC), which performs a predetermined function. However, the term including the word “~unit” does not always have a meaning limited to software or hardware. The “~unit” may be constructed either to be stored in an addressable storage medium or to execute one or more processors. Therefore, the “~unit” includes, for example, software elements, object-oriented software elements, components such as class elements and task elements, processes, functions, properties, procedures, sub-routines, segments of a program code, drivers, firmware, micro-codes, circuits, data, database, data structures, tables, arrays, and parameters. The components and functions provided by the “~unit” may be either combined into a smaller number of components and a “~unit,” or divided into additional components and a “~unit.” Moreover, the components and “~units” may be implemented to reproduce one or more central processing units (CPUs) within a device or a security multimedia card. Further, in the embodiments, the “~unit” may include one or more processors.

[0040] It should be appreciated that the blocks in each flowchart and combinations of the flowcharts may be performed by one or more computer programs which include instructions. The entirety of the one or more computer programs may be stored in a single memory device or the one or more computer programs may be divided with different portions stored in different multiple memory devices.

[0041] Any of the functions or operations described herein can be processed by one processor or a combination of processors. The one processor or the combination of processors is circuitry performing processing and includes circuitry like an application processor (AP, e.g. a CPU), a communication processor (CP, e.g., a modem), a graphics processing unit (GPU), a neural processing unit (NPU) (e.g., an artificial intelligence (AI) chip), a Wi-Fi chip, a Bluetooth® chip, a global positioning system (GPS) chip, a near field communication (NFC) chip, connectivity chips, a sensor controller, a touch controller, a finger-print sensor controller, a display driver integrated circuit (IC), an audio CODEC chip, a universal serial bus (USB) controller, a camera controller, an image processing IC, a microprocessor unit (MPU), a system on chip (SoC), an IC, or the like.

[0042] It will be appreciated that various embodiments of the disclosure according to the claims and description in the specification can be realized in the form of hardware, software or a combination of hardware and software.

[0043] Any such software may be stored in non-transitory computer readable storage media. The non-transitory computer readable storage media store one or more computer programs (software modules), the one or more computer programs include computer-executable instructions that, when executed by one or more processors of an electronic device individually or collectively, cause the electronic device to perform a method of the disclosure.

[0044] Any such software may be stored in the form of volatile or non-volatile storage such as, for example, a storage device like read only memory (ROM), whether erasable or rewritable or not, or in the form of memory such as, for example, random access memory (RAM), memory chips, device or integrated circuits or on an optically or magnetically readable medium such as, for example, a compact disk (CD), digital versatile disc (DVD), magnetic disk or magnetic tape or the like. It will be appreciated that the storage devices and storage media are various embodiments of non-transitory machine-readable storage that are suitable for storing a computer program or computer programs comprising instructions that, when executed, implement various embodiments of the disclosure. Accordingly, various embodiments of the present disclosure may provide a program comprising code for implementing apparatus or a method as claimed in any one of the claims of this specification and a non-transitory machine-readable storage storing such a program.

[0045] Hereinafter, the determination of priority between A and B in the present disclosure may refer to various actions such as selecting the one having a higher priority based on a predefined priority rule and performing an operation corresponding thereto, or omitting or dropping an operation corresponding to the one having a lower priority.

[0046] Hereinafter, "A or B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0047] In addition, "at least one of A, B, and C" as described in the present disclosure may be understood to include A, or B, or C, or any combination of A, B, and C.

[0048] In addition, "at least one of A, B, or C" as described in the present disclosure may be understood to include A, or B, or C, or any combination of A, B, and C.

[0049] Furthermore, "A / B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0050] Furthermore, "A, B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0051] Furthermore, "A and B" as described in the present disclosure may be understood as "A and / or B," which may include A, or B, or both A and B.

[0052] Furthermore, “if condition A and condition B are satisfied,” as described in the present disclosure, may not be limited to a case where both condition A and condition B are satisfied, but may be understood to include a case where either condition A or condition B is individually satisfied, both condition A and condition B are satisfied, or one or more additional conditions are satisfied in combination.

[0053] Furthermore, throughout this disclosure, ordinal terms such as "first," "second," "third," etc., (and similar qualifiers) are used merely to distinguish between different instances, occurrences, configurations, messages, stages, or aspects of elements, operations, or information as described herein. Unless the context clearly dictates otherwise, the use of such ordinal terms does not itself require that the elements, operations, or information distinguished by these terms be structurally different, numerically distinct, or substantively dissimilar. For example, a "first signal" and a "second signal" may refer to instances of the same signal transmitted at different times or containing the same core information despite minor variations, or they may refer to signals with different content or characteristics, depending on the specific context. Similarly, a "first value" and a "second value" may represent the same magnitude but measured or applied in different circumstances, or they may represent different magnitudes. The interpretation should be guided by the specific technical context, function, and relationship described in the relevant portion of the specification and claims.

[0054] Furthermore, the terms “first ~”, “second ~”, etc., as described in the present disclosure with respect to various elements (e.g., information, objects, operation, sequences, or the like), should not limit those elements. These terms may only be intended to distinguish one element from another, and may not be intended to indicate a specific order. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element.

[0055] Furthermore, even if “first ~” and “second ~” are described in the present disclosure, it may be understood that element(s) referred to by “first ~” and “second ~” may be the same or different. For example, in case of element(s) being information, first information and second information may both be same information and, in some cases, are separate and different information.

[0056] In addition, the terms “if ~” and “in case that ~” as used in the disclosure or claims may be interpreted to include the meanings of “when (or upon) ~,” “in response to ~,” “based on ~,” or “according to ~,” and may be used interchangeably with these expressions. In addition, expressions other than those exemplified herein may also be used, as long as they have substantially the same meaning and do not impair the technical features of the present disclosure.

[0057] For example, the physical layer signaling may be referred to as Layer 1 (L1) signaling and may include downlink control information (DCI). In addition, the higher layer signaling may include a medium access control (MAC) control message, a radio resource control (RRC) signaling message, a non-access stratum (NAS) signaling message, or an application layer message. The RRC signaling message may be referred to as L3 (layer 3) signaling. It should be noted, however, that the higher layer signaling is not limited to the aforementioned examples.

[0058] In addition, the term "not perform" as used in the present disclosure or claims may, in context, be understood to mean that the corresponding step is omitted or skipped. Such a term may be replaced with other terms having the same or substantially equivalent meaning.

[0059] In addition, "transmitting a message including A and B" as described in the present disclosure, may be understood as encompassing both (i) transmitting A and B in a single message, and (ii) transmitting A and B separately via multiple messages (e.g., transmitting a first message including A and a second message including B). This interpretation may also apply to messages that include two or more items (e.g., A, B, C), transmitted either together or separately.

[0060] In addition, "transmitting a message including A and transmitting a message including B" may also be interpreted as transmitting a message including A and B in a single message.

[0061] In the specific embodiments of the present disclosure described below, terms or components included in the disclosure may be expressed in singular or plural form depending on the specific embodiments presented. However, such singular or plural expressions are selected appropriately for convenience of description, and the present disclosure is not limited to a singular or plural number of components. A component expressed in the plural form may be implemented as a single component, and a component expressed in the singular form may be implemented as multiple components.

[0062] The drawings or flowcharts described below illustrate exemplary methods that may be implemented according to the principles of the present disclosure, and various modifications may be made to the methods illustrated in the flowcharts of the present disclosure. For example, although illustrated as a series of steps, various steps in each drawing or flowchart may overlap, occur in parallel, occur in a different order, or be repeated. In other examples, any step may be omitted or replaced with another step.

[0063] The methods and apparatuses proposed in the embodiments of the present disclosure are not limited to each embodiment individually, but may also be applied in combination of all or some of the embodiments proposed in the disclosure. Therefore, the embodiments of the present disclosure may be modified and applied without significantly departing from the scope of the present disclosure, as would be understood by those skilled in the art.

[0064] In this case, even if certain wordings are described differently across embodiments, they may be used interchangeably or in substitution or in combination if their underlying concepts are equivalent. For example, for the same or equivalent concept, even if one embodiment uses the expression "A" and another embodiment uses the expression "B", such expressions may be understood interchangeably, in substitution, or in combination.

[0065] The terms used in the following description to refer to access nodes, network entities, messages, interfaces between network entities, various types of identification information, and the like, are provided merely for the convenience of explanation by way of example. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may also be used. Such terms may also be interchangeable with terms defined in any 3rd generation partnership project　(3GPP) technical specifications (TS) where appropriate.

[0066] Hereinafter, a base station is an entity that allocates resources to terminals, and may be at least one of a gNode B, an eNode B, a Node B, a base station (BS), a wireless access unit, a BS controller, or a node on a network.

[0067] Furthermore, the base station of the present disclosure may include a split architecture comprising a central unit (CU) and a distributed unit (DU). In this structure, the CU is configured to process the higher layers of the control and user planes, while the DU is configured to process lower-layer radio resource functions. The embodiments of the present disclosure may be equally applicable to 5G base station architectures in which such CU and DU functional splits are implemented.

[0068] A terminal may include a UE, a mobile station (MS), a cellular phone, a smartphone, a computer, or a multimedia system capable of performing communication functions.

[0069] In the disclosure, a downlink (DL) refers to a radio link through which a BS transmits a signal to a UE, and an uplink (UL) refers to a radio link through which a UE transmits a signal to a BS.

[0070] Furthermore, hereinafter, 5th generation (5G) mobile communication technologies (e.g., 5G new radio (NR)), 6th generation (6G) mobile communication technologies may be described by way of example, but the embodiments of the present disclosure may also be applied to other communication systems having similar technical backgrounds or channel types. For example, newly evolved mobile communication systems developed after 5G and 6G may be included. Furthermore, based on determinations by those skilled in the art, the embodiments of the present disclosure may also be applied to other communication systems (e.g., Wi-Fi systems) through some modifications without significantly departing from the scope of the present disclosure

[0071] In the following description, the terms physical channel and signal may be used interchangeably with data or control signal. For example, the term physical downlink shared channel (PDSCH) refers to a physical channel through which data is transmitted, but the term PDSCH may also be used to refer to the data itself. That is, in the present disclosure, the expression "transmit a physical channel" may be interpreted as being equivalent to the expression "transmit data or a signal via a physical channel."

[0072] Hereinafter, in the context of the present disclosure, higher layer signaling may refer to signaling corresponding to at least one or any combination of the following: master information block (MIB), system information block (SIB) or SIB M (M = 1, 2, ...), radio resource control (RRC), or medium access control (MAC) control element (CE), or a non-access stratum (NAS) signaling message, or an application layer message. The RRC signaling message may be referred to as L3 (layer 3) signaling.

[0073] In addition, L1 signaling may refer to signaling corresponding to at least one or any combination of signaling techniques using the at least one or any combination of the following physical layer channels or signaling: physical downlink control channel (PDCCH), downlink control information (DCI), user equipment (UE)-specific DCI, group-common DCI, common DCI, scheduling DCI (e.g., DCI used for scheduling downlink or uplink data), non-scheduling DCI (e.g., DCI not used for scheduling downlink or uplink data) physical uplink control channel (PUCCH), or uplink control information (UCI). The L1 signaling message may be referred to as a physical layer signaling.

[0074] Hereinafter, the expression that information is configured by the BS, as used in the present disclosure or claims, may, in context, be understood to mean that the terminal receives the corresponding information from the BS via a physical layer signaling or a higher layer signaling. Such an expression may be replaced with other terms having the same or substantially equivalent meaning.

[0075] Hereinafter, the operational principle of the present disclosure will be described in detail with reference to the accompanying drawings.

[0076] This application claims priority under 35 U.S.C. § 119(e) to U.S. Provisional Patent Application No. 63 / 683,960 filed on August 16, 2024. The above-identified provisional patent application is hereby incorporated by reference in its entirety.

[0077] Other technical features may be readily apparent to one skilled in the art from the following figures, descriptions, and claims.

[0078] It may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The term “couple” and its derivatives refer to any direct or indirect communication between two or more elements, whether or not those elements are in physical contact with one another. The terms “transmit,” “receive,” and “communicate,” as well as derivatives thereof, encompass both direct and indirect communication. The terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation. The term “or” is inclusive, meaning and / or. The phrase “associated with,” as well as derivatives thereof, means to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, have a relationship to or with, or the like. The term “controller” means any device, system or part thereof that controls at least one operation. Such a controller may be implemented in hardware or a combination of hardware and software and / or firmware. The functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. The phrase “at least one of,” when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one item in the list may be needed. For example, “at least one of: A, B, and C” includes any of the following combinations: A, B, C, A and B, A and C, B and C, and A and B and C.

[0079] Moreover, various functions described below can be implemented or supported by one or more computer programs, each of which is formed from computer readable program code and embodied in a computer readable medium. The terms “application” and “program” refer to one or more computer programs, software components, sets of instructions, procedures, functions, objects, classes, instances, related data, or a portion thereof adapted for implementation in a suitable computer readable program code. The phrase “computer readable program code” includes any type of computer code, including source code, object code, and executable code. The phrase “computer readable medium” includes any type of medium capable of being accessed by a computer, such as read only memory (ROM), random access memory (RAM), a hard disk drive, a compact disc (CD), a digital video disc (DVD), or any other type of memory. A “non-transitory” computer readable medium excludes wired, wireless, optical, or other communication links that transport transitory electrical or other signals. A non-transitory computer readable medium includes media where data can be permanently stored and media where data can be stored and later overwritten, such as a rewritable optical disc or an erasable memory device.

[0080] Definitions for other certain words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many if not most instances, such definitions apply to prior as well as future uses of such defined words and phrases.

[0081] FIGS. 1 through 17, discussed below, and the various embodiments used to describe the principles of this disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure. Those skilled in the art will understand that the principles of this disclosure may be implemented in any suitably arranged wireless communication system.

[0082] To meet the demand for wireless data traffic having increased since deployment of 4G communication systems and to enable various vertical applications, 5G / NR communication systems have been developed and are currently being deployed. The 5G / NR communication system is considered to be implemented in higher frequency (mmWave) bands, e.g., 28 GHz or 60GHz bands, so as to accomplish higher data rates or in lower frequency bands, such as 6 GHz, to enable robust coverage and mobility support. To decrease propagation loss of the radio waves and increase the transmission distance, the beamforming, massive multiple-input multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, an analog beam forming, large scale antenna techniques are discussed in 5G / NR communication systems.

[0083] In addition, in 5G / NR communication systems, development for system network improvement is under way based on advanced small cells, cloud radio access networks (RANs), ultra-dense networks, device-to-device (D2D) communication, wireless backhaul, moving network, cooperative communication, coordinated multi-points (CoMP), reception-end interference cancelation and the like.

[0084] The discussion of 5G systems and frequency bands associated therewith is for reference as certain embodiments of the present disclosure may be implemented in 5G systems.　 However, the present disclosure is not limited to 5G systems or the frequency bands associated therewith, and embodiments of the present disclosure may be utilized in connection with any frequency band. For example, aspects of the present disclosure may also be applied to deployment of 5G communication systems, 6G or even later releases which may use terahertz (THz) bands.

[0085] The demand of wireless data traffic is rapidly increasing due to the growing popularity among consumers and businesses of smart phones and other mobile data devices, such as tablets, “note pad” computers, net books, eBook readers, and machine type of devices. In order to meet the high growth in mobile data traffic and support new applications and deployments, improvements in radio interface efficiency and coverage is of paramount importance.

[0086] To meet the demand for wireless data traffic having increased since deployment of 4G communication systems, and to enable various vertical applications, 5G communication systems have been developed and are currently being deployed. The enablers for the 5G / NR mobile communications include massive antenna technologies, from legacy cellular frequency bands up to high frequencies, to provide beamforming gain and support increased capacity, new waveform (e.g., a new radio access technology [RAT]) to flexibly accommodate various services / applications with different requirements, new multiple access schemes to support massive connections, and so on.

[0087] FIGS. 1-3B below describe various embodiments implemented in wireless communications systems and with the use of orthogonal frequency division multiplexing (OFDM) or orthogonal frequency division multiple access (OFDMA) communication techniques. The descriptions of FIGS. 1-3B are not meant to imply physical or architectural limitations to the manner in which different embodiments may be implemented. Different embodiments of the present disclosure may be implemented in any suitably arranged communications system.

[0088] FIG. 1 illustrates an example wireless network 100 according to embodiments of the present disclosure. The embodiment of the wireless network shown in FIG. 1 is for illustration only. Other embodiments of the wireless network 100 could be used without departing from the scope of this disclosure.

[0089] As shown in FIG. 1, the wireless network includes a gNB 101 (e.g., base station, BS), a gNB 102, and a gNB 103. The gNB 101 communicates with the gNB 102 and the gNB 103. The gNB 101 also communicates with at least one network 130, such as the Internet, a proprietary Internet Protocol (IP) network, or other data network.

[0090] The gNB 102 provides wireless broadband access to the network 130 for a first plurality of user equipments (UEs) within a coverage area 120 of the gNB 102. The first plurality of UEs includes a UE 111, which may be located in a small business; a UE 112, which may be located in an enterprise; a UE 113, which may be a WiFi hotspot; a UE 114, which may be located in a first residence; a UE 115, which may be located in a second residence; and a UE 116, which may be a mobile device, such as a cell phone, a wireless laptop, a wireless PDA, or the like. The gNB 103 provides wireless broadband access to the network 130 for a second plurality of UEs within a coverage area 125 of the gNB 103. The second plurality of UEs includes the UE 115 and the UE 116. In some embodiments, one or more of the gNBs 101-103 may communicate with each other and with the UEs 111-116 using 5G / NR, long term evolution (LTE), long term evolution-advanced (LTE-A), WiMAX, WiFi, or other wireless communication techniques.

[0091] Depending on the network type, the term “base station” or “BS” can refer to any component (or collection of components) configured to provide wireless access to a network, such as transmit point (TP), transmit-receive point (TRP), an enhanced base station (eNodeB or eNB), a 5G / NR base station (gNB), a macrocell, a femtocell, a WiFi access point (AP), or other wirelessly enabled devices. Base stations may provide wireless access in accordance with one or more wireless communication protocols, e.g., 5G / NR 3rdgeneration partnership project (3GPP) NR, long term evolution (LTE), LTE advanced (LTE-A), high speed packet access (HSPA), Wi-Fi 802.11a / b / g / n / ac, etc. For the sake of convenience, the terms “BS” and “TRP” are used interchangeably in this patent document to refer to network infrastructure components that provide wireless access to remote terminals. Also, depending on the network type, the term “user equipment” or “UE” can refer to any component such as “mobile station,” “subscriber station,” “remote terminal,” “wireless terminal,” “receive point,” or “user device.” For the sake of convenience, the terms “user equipment” and “UE” are used in this patent document to refer to remote wireless equipment that wirelessly accesses a BS, whether the UE is a mobile device (such as a mobile telephone or smartphone) or is normally considered a stationary device (such as a desktop computer or vending machine).

[0092] Dotted lines show the approximate extents of the coverage areas 120 and 125, which are shown as approximately circular for the purposes of illustration and explanation only. It should be clearly understood that the coverage areas associated with gNBs, such as the coverage areas 120 and 125, may have other shapes, including irregular shapes, depending upon the configuration of the gNBs and variations in the radio environment associated with natural and man-made obstructions.

[0093] As described in more detail below, one or more of the UEs 111-116 include circuitry, programing, or a combination thereof, for interleaved DFT phase rotated permutation based FDMA. In certain embodiments, one or more of the gNBs 101-103 includes circuitry, programing, or a combination thereof, to support interleaved DFT phase rotated permutation based FDMA in a wireless communication system.

[0094] Although FIG. 1 illustrates one example of a wireless network, various changes may be made to FIG. 1. For example, the wireless network could include any number of gNBs and any number of UEs in any suitable arrangement. Also, the gNB 101 could communicate directly with any number of UEs and provide those UEs with wireless broadband access to the network 130. Similarly, each gNB 102-103 could communicate directly with the network 130 and provide UEs with direct wireless broadband access to the network 130. Further, the gNBs 101, 102, and / or 103 could provide access to other or additional external networks, such as external telephone networks or other types of data networks.

[0095] FIGS. 2A and 2B illustrate example wireless transmit and receive paths according to embodiments of the present disclosure. In the following description, a transmit path 200 may be described as being implemented in a gNB (such as gNB 102), while a receive path 250 may be described as being implemented in a UE (such as UE 116). However, it will be understood that the receive path 250 can be implemented in a gNB and that the transmit path 200 can be implemented in a UE. In some embodiments, the transmit path 200 and / or the receive path 250 is configured to implement and / or support interleaved DFT phase rotated permutation based FDMA as described in embodiments of the present disclosure.

[0096] The transmit path 200 includes a channel coding and modulation block 205, a serial-to-parallel (S-to-P) block 210, a size N Inverse Fast Fourier Transform (IFFT) block 215, a parallel-to-serial (P-to-S) block 220, an add cyclic prefix block 225, and an up-converter (UC) 230. The receive path 250 includes a down-converter (DC) 255, a remove cyclic prefix block 260, a serial-to-parallel (S-to-P) block 265, a size N Fast Fourier Transform (FFT) block 270, a parallel-to-serial (P-to-S) block 275, and a channel decoding and demodulation block 280.

[0097] In the transmit path 200, the channel coding and modulation block 205 receives a set of information bits, applies coding (such as a low-density parity check (LDPC) coding), and modulates the input bits (such as with Quadrature Phase Shift Keying (QPSK) or Quadrature Amplitude Modulation (QAM)) to generate a sequence of frequency-domain modulation symbols. The serial-to-parallel block 210 converts (such as de-multiplexes) the serial modulated symbols to parallel data in order to generate N parallel symbol streams, where N is the IFFT / FFT size used in the gNB 102 and the UE 116. The size N IFFT block 215 performs an IFFT operation on the N parallel symbol streams to generate time-domain output signals. The parallel-to-serial block 220 converts (such as multiplexes) the parallel time-domain output symbols from the size N IFFT block 215 in order to generate a serial time-domain signal. The add cyclic prefix block 225 inserts a cyclic prefix to the time-domain signal. The up-converter 230 modulates (such as up-converts) the output of the add cyclic prefix block 225 to an RF frequency for transmission via a wireless channel. The signal may also be filtered at baseband before conversion to the RF frequency.

[0098] A transmitted RF signal from the gNB 102 arrives at the UE 116 after passing through the wireless channel, and reverse operations to those at the gNB 102 are performed at the UE 116. The down-converter 255 down-converts the received signal to a baseband frequency, and the remove cyclic prefix block 260 removes the cyclic prefix to generate a serial time-domain baseband signal. The serial-to-parallel block 265 converts the time-domain baseband signal to parallel time domain signals. The size N FFT block 270 performs an FFT algorithm to generate N parallel frequency-domain signals. The parallel-to-serial block 275 converts the parallel frequency-domain signals to a sequence of modulated data symbols. The channel decoding and demodulation block 280 demodulates and decodes the modulated symbols to recover the original input data stream.

[0099] Each of the gNBs 101-103 may implement a transmit path 200 that is analogous to transmitting in the downlink to UEs 111-116 and may implement a receive path 250 that is analogous to receiving in the uplink from UEs 111-116. Similarly, each of UEs 111-116 may implement a transmit path 200 for transmitting in the uplink to gNBs 101-103 and may implement a receive path 250 for receiving in the downlink from gNBs 101-103.

[0100] Each of the components in FIGS. 2A and 2B can be implemented using only hardware or using a combination of hardware and software / firmware. As a particular example, at least some of the components in FIGS. 2A and 2B may be implemented in software, while other components may be implemented by configurable hardware or a mixture of software and configurable hardware. For instance, the FFT block 270 and the IFFT block 215 may be implemented as configurable software algorithms, where the value of size N may be modified according to the implementation.

[0101] Furthermore, although described as using FFT and IFFT, this is by way of illustration only and should not be construed to limit the scope of this disclosure. Other types of transforms, such as Discrete Fourier Transform (DFT) and Inverse Discrete Fourier Transform (IDFT) functions, can be used. It will be appreciated that the value of the variable N may be any integer number (such as 1, 2, 3, 4, or the like) for DFT and IDFT functions, while the value of the variable N may be any integer number that is a power of two (such as 1, 2, 4, 8, 16, or the like) for FFT and IFFT functions.

[0102] Although FIGS. 2A and 2B illustrate examples of wireless transmit and receive paths, various changes may be made to FIGS. 2A and 2B. For example, various components in FIGS. 2A and 2B can be combined, further subdivided, or omitted and additional components can be added according to particular needs. Also, FIGS. 2A and 2B are meant to illustrate examples of the types of transmit and receive paths that can be used in a wireless network. Any other suitable architectures can be used to support wireless communications in a wireless network.

[0103] FIG. 3A illustrates an example UE 116 according to embodiments of the present disclosure. The embodiment of the UE 116 illustrated in FIG. 3A is for illustration only, and the UEs 111-115 of FIG. 1 could have the same or similar configuration. However, UEs come in a wide variety of configurations, and FIG. 3A does not limit the scope of this disclosure to any particular implementation of a UE.

[0104] As shown in FIG. 3A, the UE 116 includes antenna(s) 305, a transceiver(s) 310, and a microphone 320. The UE 116 also includes a speaker 330, a processor 340, an input / output (I / O) interface (IF) 345, an input 350, a display 355, and a memory 360. The memory 360 includes an operating system (OS) 361 and one or more applications 362.

[0105] The transceiver(s) 310 receives from the antenna 305, an incoming RF signal transmitted by a gNB of the network 100. The transceiver(s) 310 down-converts the incoming RF signal to generate an intermediate frequency (IF) or baseband signal. The IF or baseband signal is processed by RX processing circuitry in the transceiver(s) 310 and / or processor 340, which generates a processed baseband signal by filtering, decoding, and / or digitizing the baseband or IF signal. The RX processing circuitry sends the processed baseband signal to the speaker 330 (such as for voice data) or is processed by the processor 340 (such as for web browsing data).

[0106] TX processing circuitry in the transceiver(s) 310 and / or processor 340 receives analog or digital voice data from the microphone 320 or other outgoing baseband data (such as web data, e-mail, or interactive video game data) from the processor 340. The TX processing circuitry encodes, multiplexes, and / or digitizes the outgoing baseband data to generate a processed baseband or IF signal. The transceiver(s) 310 up-converts the baseband or IF signal to an RF signal that is transmitted via the antenna(s) 305.

[0107] The processor 340 can include one or more processors or other processing devices and execute the OS 361 stored in the memory 360 in order to control the overall operation of the UE 116. For example, the processor 340 could control the reception of DL channel signals and the transmission of UL channel signals by the transceiver(s) 310 in accordance with well-known principles. In some embodiments, the processor 340 includes at least one microprocessor or microcontroller.

[0108] The processor 340 is also capable of executing other processes and programs resident in the memory 360, for example, processes for interleaved DFT phase rotated permutation based FDMA as discussed in greater detail below. The processor 340 can move data into or out of the memory 360 as required by an executing process. In some embodiments, the processor 340 is configured to execute the applications 362 based on the OS 361 or in response to signals received from gNBs or an operator. The processor 340 is also coupled to the I / O interface 345, which provides the UE 116 with the ability to connect to other devices, such as laptop computers and handheld computers. The I / O interface 345 is the communication path between these accessories and the processor 340.

[0109] The processor 340 is also coupled to the input 350, which includes for example, a touchscreen, keypad, etc., and the display 355. The operator of the UE 116 can use the input 350 to enter data into the UE 116. The display 355 may be a liquid crystal display, light emitting diode display, or other display capable of rendering text and / or at least limited graphics, such as from web sites.

[0110] The memory 360 is coupled to the processor 340. Part of the memory 360 could include a random-access memory (RAM), and another part of the memory 360 could include a Flash memory or other read-only memory (ROM).

[0111] Although FIG. 3A illustrates one example of UE 116, various changes may be made to FIG. 3A. For example, various components in FIG. 3A could be combined, further subdivided, or omitted and additional components could be added according to particular needs. As a particular example, the processor 340 could be divided into multiple processors, such as one or more central processing units (CPUs) and one or more graphics processing units (GPUs). In another example, the transceiver(s) 310 may include any number of transceivers and signal processing chains and may be connected to any number of antennas. Also, while FIG. 3A illustrates the UE 116 configured as a mobile telephone or smartphone, UEs could be configured to operate as other types of mobile or stationary devices.

[0112] FIG. 3B illustrates an example gNB 102 according to embodiments of the present disclosure. The embodiment of the gNB 102 illustrated in FIG. 3B is for illustration only, and the gNBs 101 and 103 of FIG. 1 could have the same or similar configuration. However, gNBs come in a wide variety of configurations, and FIG. 3B does not limit the scope of this disclosure to any particular implementation of a gNB.

[0113] As shown in FIG. 3B, the gNB 102 includes multiple antennas 370a-370n, multiple transceivers 372a-372n, a controller / processor 378, a memory 380, and a backhaul or network interface 382.

[0114] The transceivers 372a-372n receive, from the antennas 370a-370n, incoming RF signals, such as signals transmitted by UEs in the network 100. The transceivers 372a-372n down-convert the incoming RF signals to generate IF or baseband signals. The IF or baseband signals are processed by receive (RX) processing circuitry in the transceivers 372a-372n and / or controller / processor 378, which generates processed baseband signals by filtering, decoding, and / or digitizing the baseband or IF signals. The controller / processor 378 may further process the baseband signals.

[0115] Transmit (TX) processing circuitry in the transceivers 372a-372n and / or controller / processor 378 receives analog or digital data (such as voice data, web data, e-mail, or interactive video game data) from the controller / processor 378. The TX processing circuitry encodes, multiplexes, and / or digitizes the outgoing baseband data to generate processed baseband or IF signals. The transceivers 372a-372n up-converts the baseband or IF signals to RF signals that are transmitted via the antennas 370a-370n.

[0116] The controller / processor 378 can include one or more processors or other processing devices that control the overall operation of the gNB 102. For example, the controller / processor 378 could control the reception of uplink (UL) channel signals and the transmission of downlink (DL) channel signals by the transceivers 372a-372n in accordance with well-known principles. The controller / processor 378 could support additional functions as well, such as more advanced wireless communication functions. For instance, the controller / processor 378 could support beam forming or directional routing operations in which outgoing / incoming signals from / to multiple antennas 370a-370n are weighted differently to effectively steer the outgoing signals in a desired direction. Any of a wide variety of other functions could be supported in the gNB 102 by the controller / processor 378.

[0117] The controller / processor 378 is also capable of executing programs and other processes resident in the memory 380, such as an OS and, for example, processes to support interleaved DFT phase rotated permutation based FDMA as discussed in greater detail below. The controller / processor 378 can move data into or out of the memory 380 as required by an executing process.

[0118] The controller / processor 378 is also coupled to the backhaul or network interface 382. The backhaul or network interface 382 allows the gNB 102 to communicate with other devices or systems over a backhaul connection or over a network. The interface 382 could support communications over any suitable wired or wireless connection(s). For example, when the gNB 102 is implemented as part of a cellular communication system (such as one supporting 5G / NR, LTE, or LTE-A), the interface 382 could allow the gNB 102 to communicate with other gNBs over a wired or wireless backhaul connection. When the gNB 102 is implemented as an access point, the interface 382 could allow the gNB 102 to communicate over a wired or wireless local area network or over a wired or wireless connection to a larger network (such as the Internet). The interface 382 includes any suitable structure supporting communications over a wired or wireless connection, such as an Ethernet or transceiver.

[0119] The memory 380 is coupled to the controller / processor 378. Part of the memory 380 could include a RAM, and another part of the memory 380 could include a Flash memory or other ROM.

[0120] Although FIG. 3B illustrates one example of gNB 102, various changes may be made to FIG. 3B. For example, the gNB 102 could include any number of each component shown in FIG. 3B. Also, various components in FIG. 3B could be combined, further subdivided, or omitted and additional components could be added according to particular needs.

[0121] In high mobility scenarios, the fading channel observes Doppler frequency. The Doppler frequency together with multipath fading channels create a doubly selective channel (fading is selective in both time and frequency). A discrete Fourier transform-phase rotated permutation-frequency division multiple access (DFT-p-FDMA) (which may also be referred to as DFT-p-OFDM) waveform, which spreads symbols over a time-frequency 2D grid, is able to deal with such fading channels by exploiting the delay-Doppler diversity. Utilizing a transmitter such as the transmitter shown if FIG. 4, a DFT-p-FDMA waveform can be generated which can perform well in doubly selective channels. The DFT-p-FDMA waveform is based on an OFDM implementation with additional pre-processing that includes DFT and phase rotated permutation, and is based on the principle of discrete affine Fourier transform.

[0122] FIG. 4 illustrates an example transmitter 400 according to embodiments of the present disclosure. The embodiment of a transmitter of FIG. 4 is for illustration only. Different embodiments of a transmitter could be used without departing from the scope of this disclosure.

[0123] In the example of FIG. 4, it should be understood that in some embodiments, transmitter 400 may be combined with or replace one or more components of transmit path 200 of FIG. 2A in a UE or a gNB. In some embodiments, one or more components of transmitter 400 may be implemented in a processor.

[0124] Transmitter 400 includes a discrete Fourier transform (DFT) block 405, a phase rotated permutation block 410, a subcarrier mapping block 415, an inverse discrete Fourier transform (IDFT) block 420, and an add cyclic prefix (CP) block 425.

[0125] In transmitter 400, the DFT block 405 receives as input an length symbol vector which is formed using complex symbols. In general, the symbols can be real or imaginary. In some embodiments, the symbols can be generated from binary phase shift keying (BPSK), π / 2 BPSK, QPSK or QAM modulation. The DFT block 405 transforms the input into the frequency domain using a DFT operation. The DFT operation may be performed using anMsized FFT, generating a frequency domainMlength sequence.

[0126] The phase rotated permutation block 410, phase rotates and permutes the output of block 405. The phase rotation has unit magnitude. The phase rotation and permutation operation can be performed via multiplying by an phase rotated permutation matrix The matrix is unitary such that where is the identity matrix. The matrix is chosen to satisfy the 2D spreading of the modulation's symbols in time and frequency. These properties allow DFT-p-FDMA to capture the delay-Doppler diversity and results in same effective SINR across modulation symbols at the receiver in doubly selective channels, whereas in CP-OFDM, the modulation symbols undergo different SINR, therefore some modulation symbols are significantly lower SINR over the others.

[0127] In some embodiments, the row ( ) and column ( ) of the phase rotated permutation matrix may be given by

[0128]

[0129] In these embodiments, the parameter is chosen such that is a unitary phase rotated permutation matrix such that in each row and each column, there is only one non-zero element in and this non-zero element is a unit norm complex exponential. The parameter defines different realizations of . In the matrix form, is given by

[0130]

[0131] where the denotes the discrete Fourier transform matrix and is the inverse discrete Fourier transform matrix. Further is the Hermitian of and is diagonal matrix such that the diagonal element is given by where

[0132] The parameter may satisfy the following conditions such that is a phase rotated unitary permutation matrix:

[0133] - The parameter is an integer

[0134] - The parameter is a coprime with

[0135] Once the parameter is found, the phase rotated permutation matrix can be obtained.

[0136] In some embodiments, the set of parameters may be found using a non-zero condition. For example, if is a phase rotated permutation matrix, can have only one non-zero value in each row and each column.

[0137] For any givenrow the for only one value of Thus, in order to find the any row can be chosen and for simplicity, can be chosen. This approach is detailed as follows:

[0138] Find the integer such that is non-zero for only one value of where

[0139]

[0140] In some embodiments, is designed to be a unitary matrix. In these embodiments, satisfies this property when:

[0141]

[0142] If has only one non-zero element in each row, then the absolute value of that element should be equal to 1. However, if it has more than one non-zero elements, then the absolute value of those elements should be less than 1 in order to satisfy the above condition.

[0143] Based on the above arguments, the following two methods can be used to find parameter

[0144] - The parameter can be found such that for any

[0145]

[0146] - Alternatively, the parameter can be found using

[0147]

[0148] The search space of can be reduced by enforcing the following condition:

[0149] The parameter and is a coprime with

[0150] In some embodiments, the desired values of are presented for a set of subcarriers For example, where a resource block (RB) be defined as 12 subcarriers,

[0151] For these embodiments to function, parameters are configured at both the transmitter and the receiver. Some of these parameters may be specified and some of these parameters may signaled between the transmitter and the receiver. The expression of phase rotated permutation matrix may be specified for a given and In some embodiments, the parameter values may be specified at the transmitter and the receiver for different values of Alternatively, in some embodiments, only a fixed set of parameters may be specified, (e.g., only two or four values may be specified for a given ). If there are only two choices, then one bit can be used to distinguish two values. As an example, bit 0 may be used to identify the first value of and bit 1 may be used for a second value of for a given In this example, the bit mapping operation may be denoted by

[0152] Once bit mapping and a table of parameter are specified, the bit sequence can be shared between the transmitter and the receiver through signaling. Then the transmitter and the receiver can obtain the corresponding value for a respective A new field may be created for the bit sequence and in the case of 3GPP specifications, this field can be contained in downlink control information (DCI) / uplink control information (UCI) or other signaling methods such as radio resource control (RRC), or a MAC-CE (Control Element). Then both the transmitter and receiver can use the parameter to obtain the phase rotated permutation and de-permutation matrices.

[0153] Subcarrier mapping block 415 maps the output from block 410 to subcarriers. The subcarrier mapping operation can be performed using a matrix operation, where the input is multiplied by the subcarrier mapping matrix where is a matrix. For each column of matrix there is only one nonzero element, which is equal to one, and located at such that for This way, the element of input is mapped to a unique subcarrier. In some embodiments, the mapping is circularly contiguous such that the mapped subcarrier indexes are to where and denotes the modulo operation such that

[0154] DFT block 420 performs an inverse discrete Fourier transform on the output of block 415. The IDFT operation may be performed using an sized inverse FFT (IFFT) operation..

[0155] Add CP block 425 adds a cyclic prefix to theNlength signal output of block 420.

[0156] Although FIG. 4 illustrates an example transmitter 400, various changes may be made to FIG. 4. For example, while illustrated with discrete components, the various components of transmitter 400 could be combined into a single component, etc. according to particular needs. Furthermore, while described as being implemented in a transmitter, the operations of the various components of FIG. 4 may be performed by another device, such as a processor. For example, one or more of the operations performed by the components of FIG. 4 could be performed by processor 340 of FIG. 3A, or processor 378 of FIG. 3B.

[0157] In practical implementations, channel coding is used for error protection and channel coded bits are spread across multiple waveform symbols (e.g., CP-OFDM or DFT-p-FDMA symbols) through interleaving. This fact allows these waveforms to capture time diversity across multiple symbols. In such situations, modulation symbols of one DFT-p-FDMA symbol have the same SINR. However, across multiple DFT-p-FDMA symbols, the symbols have different block wise SINR. As such some DFT-p-FDMA symbols have lower SINR in comparison to other DFT-p-FDMA symbols. Due to this fact, DFT-p-FDMA is not able to exploit the time diversity across multiple symbols and this impacts performance.

[0158] Various embodiments of the present disclosure provide for interleaved DFT-p-FDMA to exploit the time diversity across multiple symbols. As described herein, interleaved DFT-p-FDMA can achieve similar SINR across multiple DFT-p-FDMA symbols, and provide improved link level performance for medium to high mobility scenarios. In some embodiments, such as the transmitter of FIG. 5, a number of interleaved DFT-p-FDMA symbols are generated from a number of modulation symbols

[0159] FIG. 5 illustrates another example transmitter 500 according to embodiments of the present disclosure. The embodiment of a transmitter of FIG. 5 is for illustration only. Different embodiments of a transmitter could be used without departing from the scope of this disclosure.

[0160] In the example of FIG. 5, it should be understood that in some embodiments, transmitter 500 may be combined with or replace one or more components of transmit path 200 of FIG. 2A in a UE or a gNB. In some embodiments, one or more components of transmitter 500 may be implemented in a processor.

[0161] Transmitter 500 includes a serial to parallel (block) converter 505,Kdiscrete Fourier transform (DFT) blocks 510,Kphase rotated permutation blocks 515, an interleaving block 520,Ksubcarrier mapping blocks 525,Kinverse discrete Fourier transform (IDFT) blocks 530, andKadd cyclic prefix (CP) blocks 535.

[0162] In transmitter 500, the serial to parallel (block) converter 505 receives as input an length modulation symbol sequence The modulation symbols, can be generated from BPSK, BPSK, QPSK or any other QAM modulation. Additionally, the modulation symbols can be generated from any other constellations, and they are complex in general. However, the modulation symbols can be either real or imaginary.

[0163] Serial to parallel (block) converter 505 converts the length modulation symbol sequence into streams of length modulation symbol sequences, similar as described regarding operation 610 of FIG. 6 . These sequences are denoted by Each of the DFT blocks 510 transforms one of the sequences into the frequency domain using a DFT operation, similar as described regarding operation 620 of FIG. 6. Each of the phase rotated permutation blocks 615 phase rotates and permutes the output of one of the blocks 605, which creates streams of the intermediate symbols denoted by where each stream is of length similar as described regarding operation 630 of FIG. 6. Interleaving block 520 interleaves the elements of to obtain streams of sequences such that is of length similar as described regarding operation 640 of FIG. 6. Each of the subcarrier mapping blocks 525 maps one of the interleaved sequences to subcarriers, similar as described regarding operation 650 of FIG. 6. Each of the IDFT blocks 530 performs an inverse discrete Fourier transform on the output of one of blocks 525, similar as described regarding operation 660 of FIG. 6. Each of the add CP blocks 535 adds a cyclic prefix to the output of one of the blocks 530, similar as described regarding operation 670 of FIG. 6.

[0164] Although FIG. 5 illustrates an example transmitter 500, various changes may be made to FIG. 5. For example, while illustrated with discrete components, the various components of transmitter 500 could be combined into a single component, etc. according to particular needs. Furthermore, while described as being implemented in a transmitter, the operations of the various components of FIG. 5 may be performed by another device, such as a processor. For example, one or more of the operations performed by the components of FIG. 5could be performed by processor 340 of FIG. 3A, or processor 378 of FIG. 3B.

[0165] FIG. 6 illustrates an example procedure 600 for operation of a transmitter according to embodiments of the present disclosure. An embodiment of the procedure illustrated in FIG. 6 is for illustration only. One or more of the components illustrated in FIG. 6 may be implemented in specialized circuitry configured to perform the noted functions or one or more of the components may be implemented by one or more processors executing instructions to perform the noted functions. Other embodiments of a procedure for operation of a transmitter could be used without departing from the scope of this disclosure.

[0166] In the example of FIG. 6, procedure 600 for operation of a transmitter (such as transmitter 500 of FIG. 5) begins at operation 610. At operation 610, the input (e.g., an length modulation symbol sequence ) is converted (e.g., by block 505 of transmitter 500) into streams of length of modulation symbol sequences. These sequences are denoted by as shown in FIG. 5.

[0167] At operation 620, each length stream is transformed (e.g., by one of the blocks 510 of transmitter 500) using an sized DFT. Each of the transformations may be performed in parallel.

[0168] At operation 630, sequences are phase rotated and permuted (e.g., by one of the blocks 515 of transmitter 500). Each of the phase rotations and permutations may be performed in parallel. Each phase rotation may have unit magnitude. The phase rotation and permutation operation for each sequence can be performed via multiplying by phase rotated permutation matrix The matrix is unitary such that where is the identity matrix. The output of operation 630 creates streams of the intermediate symbols denoted by as shown in FIG. 5, where each stream is of length In some embodiments, operation 630 may performed based on one or more parameters as described herein.

[0169] At operation 640, the elements of may be interleaved (e.g., by block 520 of transmitter 500) to obtain streams of sequences such that is of length In some embodiments, the interleaving function is defined as follows for the element of

[0170]

[0171] where (k,m) and defines the interleaving function.

[0172] At operation 650, each interleaved sequence is mapped (e.g., by one of the blocks 525 of transmitter 500) to subcarriers. The mapping of the interleaved sequences may be performed in parallel. In some embodiments, the mapping may be circularly contiguous.

[0173] At the operation 660, an sized inverse discrete Fourier transform is performed (e.g., by one of the blocks 530 of transmitter 500) for all streams to obtain interleaved DFT-p-FDMA symbols. Each of the IDFT operations may be performed in parallel.

[0174] At the operation 670, a cyclic prefix may be added (e.g., by one of the blocks 535 of transmitter 500) to each of the interleaved DFT-p-FDMA symbols.

[0175] Although FIG. 5 illustrates one example procedure 500 for operation of a transmitter, various changes may be made to FIG. 5. For example, while shown as a series of operations, various operations in FIG. 5 could overlap, occur in parallel, occur in a different order, occur any number of times, be omitted, or replaced by other operations.

[0176] In some embodiments, a different interleaving function may be used to generate interleaved DFT-p-FDMA symbols than the interleaving function described regarding operation 640 of FIG. 6. For example, in some embodiments, an interleaving function may interleave the elements of to find the as follows:

[0177] Let the length sequence be defined as

[0178]

[0179] Such that the where and denotes the modulo and where denotes the floor operation that gives the largest integer smaller than the argument value. The resultant and is given by

[0180]

[0181] The direct relationship, is

[0182]

[0183] As such and the interleaving functions (k,m) and are defined by

[0184]

[0185]

[0186] An example of interleaving according to this interleaving function is shown in FIG. 7 for and

[0187] FIG. 7 illustrates an example of interleaving 700 according to embodiments of the present disclosure. The embodiment of interleaving of FIG. 7 is for illustration only. Different embodiments of interleaving could be used without departing from the scope of this disclosure.

[0188] In the example of FIG. 7, the and elements of are shown in columns and rows respectively for and Different shading is used to denote the vectors.

[0189] Although FIG.7 illustrates one example of interleaving 700, various changes may be made to FIG. 7. For instance, the example of FIG. 7 can be generalized into any and

[0190] This interleaving procedure can be considered as placing the elements as consecutive row vectors and obtaining the elements through the columns. This can be explained as follows. Let the row be allocated to elements of as shown in FIG. 8.

[0191] FIG. 8 illustrates an example of row allocation 800 according to embodiments of the present disclosure. The embodiment of row allocation of FIG. 8 is for illustration only. Different embodiments of row allocation could be used without departing from the scope of this disclosure. Although FIG. 8 illustrates one example of row allocation 800, various changes may be made to FIG. 8. For instance, the example of FIG. 8 can be generalized into any and

[0192] Now the elements of are read through the columns as shown in FIG. 9.

[0193] FIG. 9 illustrates an example interleaving operation 900 according to embodiments of the present disclosure. The embodiment of an interleaving operation of FIG. 9 is for illustration only. Different embodiments of an interleaving operation could be used without departing from the scope of this disclosure.

[0194] In the example of FIG. 9, the interleaving operation is for and Different shading is used to denote the vectors.

[0195] Although FIG. 9 illustrates one example interleaving operation 900, various changes may be made to FIG. 9. For instance, the example of FIG. 9 can be generalized into any and

[0196] In some embodiments, an interleaving function may interleave the elements of to find the as follows:

[0197] Let the element of the length sequence be defined as where and

[0198] The resultant and is given by

[0199]

[0200] The direct relationship, is

[0201]

[0202] As such and the interleaving functions (k, m) and are defined as

[0203]

[0204]

[0205] An example of interleaving according to this interleaving function is shown in FIG. 10 for and

[0206] FIG. 10 illustrates another example of interleaving 1000 according to embodiments of the present disclosure. The embodiment of interleaving of FIG. 10 is for illustration only. Different embodiments of interleaving could be used without departing from the scope of this disclosure.

[0207] In the example of FIG. 10, the and elements of are shown in columns and rows respectively for and Different shading is used to denote the vectors.

[0208] Although FIG.10 illustrates one example of interleaving 1000, various changes may be made to FIG. 10. For instance, the example of FIG. 10 can be generalized into any and

[0209] This interleaving procedure can be considered as placing the as consecutive row vectors, and obtaining the diagonally as shown in FIG. 11. Note that the row is allocated to elements of

[0210] FIG. 11 illustrates another example interleaving operation 1100 according to embodiments of the present disclosure. The embodiment of an interleaving operation of FIG. 11 is for illustration only. Different embodiments of an interleaving operation could be used without departing from the scope of this disclosure.

[0211] In the example of FIG. 11, the interleaving operation is for and Different shading is used to denote the vectors.

[0212] Although FIG. 11 illustrates one example interleaving operation 1100, various changes may be made to FIG. 11. For instance, the example of FIG. 11 can be generalized into any and

[0213] In some embodiments, certain parameters and procedures may be specified at the transmitter and the receiver for interleaved DFT-p-FDMA to operate. These may include:

[0214] - Procedure to interpolate.

[0215] - Interpolating functions.

[0216] - Number of symbols to be interpolated.

[0217] In some embodiments, additional signaling parameters may be used for both non-interleaved and interleaved DFT-p-FDMA to operate. This can be executed using one bit where one value of (either 0 or 1) indicates non-interleaved DFT-p-FDMA and the other value indicates interleaved DFT-p-FDMA. For an example this assignment is shown in Table 1.

[0218]

[0219] If more than one interpolation function is specified, then additional signaling maybe used to choose one interpolation function over the other. This can be performed using a bit sequence where bit patterns are assigned to distinct interpolating functions. An example is shown in Table 2.

[0220]

[0221] Note that while Table 2 includes four functions assigned by two bits for bit sequence bit sequence may include fewer or additional bits as needed to support any number of interpolating functions.

[0222] In some embodiments where the number of symbols is not specified for interleaving, then this parameter can be signaled for interleaved DFT-p-FDMA to operate.

[0223] In some embodiments, a new field may be created for the bit sequence and In the case of 3GPP specifications, this field can be contained in downlink control information (DCI) / uplink control information (UCI) or other signaling methods such as radio resource control (RRC), or a MAC-CE (Control Element). In some embodiments, the signaling may be as shown in FIG. 12 and / or FIG. 13.

[0224] FIG. 12 illustrates an example procedure 1200 for downlink signaling according to embodiments of the present disclosure. An embodiment of the procedure illustrated in FIG. 12 is for illustration only. One or more of the components illustrated in FIG. 12 may be implemented in specialized circuitry configured to perform the noted functions or one or more of the components may be implemented by one or more processors executing instructions to perform the noted functions. Other embodiments for downlink signaling could be used without departing from the scope of this disclosure.

[0225] In the example of FIG. 12, a gNB (such as BS 102 of FIG. 1) is operating as a transmitter in the downlink, and a UE (such as UE 116 of FIG. 1) is operating as a receiver.

[0226] Procedure 1200 begins at operation 1202. At operation 1202, the gNB determines the parameters related to the waveform. These may include the allocated bandwidth, MCS, and parameters related to DFT-p-FDMA (e.g., ).

[0227] At operation 1204, the gNB chooses the parameters related to interleaving, which are and Further, if is not specified, then is also selected.

[0228] Then at operation 1206, the gNB signals the parameters selected at operations 1202 and 1204 to the UE.

[0229] At operation 1208, the gNB generates the signal based on the specified procedures and parameters selected at operations 1202 and 1204.

[0230] At operation 1210, the gNB transmits the signal to the UE.

[0231] At operation 1212, the UE uses the specified parameters and procedures together with the parameters received at operation 1206 to demodulate the signal.

[0232] Although FIG. 12 illustrates one example procedure 1200 for downlink signaling, various changes may be made to FIG. 12. For example, while shown as a series of operations, various operations in FIG. 12 could overlap, occur in parallel, occur in a different order, occur any number of times, be omitted, or replaced by other operations.

[0233] FIG. 13 illustrates an example procedure 1300 for uplink signaling according to embodiments of the present disclosure. An embodiment of the procedure illustrated in FIG. 13 is for illustration only. One or more of the components illustrated in FIG. 13 may be implemented in specialized circuitry configured to perform the noted functions or one or more of the components may be implemented by one or more processors executing instructions to perform the noted functions. Other embodiments of a procedure for uplink signaling could be used without departing from the scope of this disclosure.

[0234] In the example of FIG. 13, a gNB (such as BS 102 of FIG. 1) is operating as a receiver in the uplink, and a UE (such as UE 116 of FIG. 1) is operating as a transmitter.

[0235] Procedure 1300 begins at operation 1302. At operation 1302, the gNB determines the parameters related to the waveform. These may include the allocated bandwidth, MCS, and parameters related to DFT-p-FDMA (e.g., ).

[0236] At operation 1304, the gNB chooses the parameters related to interleaving, which are and Further, if is not specified, then is also selected.

[0237] At operation 1306, the gNB signals the parameters selected at operations 1302 and 1304 to the UE.

[0238] At operation 1308, the UE generates the signal based on the specified procedures / parameters and the parameters received at operation 1306.

[0239] At operation 1310, the UE transmits the signal to the gNB.

[0240] At operation 1312, the gNB uses the specified parameters and procedures together with the parameters selected at operations 1302 and 1304 to demodulate the signal.

[0241] Although FIG. 13 illustrates one example procedure 1300 for uplink signaling, various changes may be made to FIG. 13. For example, while shown as a series of operations, various operations in FIG. 13 could overlap, occur in parallel, occur in a different order, occur any number of times, be omitted, or replaced by other operations.

[0242] FIG. 14 illustrates an example method for interleaved DFT phase rotated permutation based FDMA 1400 according to embodiments of the present disclosure. An embodiment of the method illustrated in FIG. 14 is for illustration only. One or more of the components illustrated in FIG. 14 may be implemented in specialized circuitry configured to perform the noted functions or one or more of the components may be implemented by one or more processors executing instructions to perform the noted functions. Other embodiments of a method for interleaved DFT phase rotated permutation based FDMA could be used without departing from the scope of this disclosure.

[0243] In the example of FIG. 14, method 1400 begins at operation 1410. At operation 1410, an electronic device (such as UE 116 or BS 102 of FIG. 1) converts a modulation symbol sequence of lengthMKinto interleaved DFT-p-FDMA symbols. For example, the electronic device may convert the modulation symbol sequence utilizing a transmitter such as transmitter 500 FIG. 5 according to procedure 600 of FIG. 6.

[0244] In some embodiments, to convert the modulation symbol sequence into interleaved DFT-p-FDMA symbols, the electronic device may: convert the modulation symbol sequence intoKparallel streams of modulation symbols; transform each of the parallel streams with a block-wise DFT; phase rotate and permute each of the transformed parallel streams of modulation symbols; interleave the phase rotated and permuted parallel streams of modulation symbols, to generate interleaved sequences; map each of the interleaved sequences to subcarriers; transform each of the mapped sequences with an IFFT, to generate the interleaved DFT-p-FDMA symbols; and add a cyclic prefix (CP) to the interleaved DFT-p-FDMA symbols.

[0245] In some embodiments, to interleave the phase rotated and permuted parallel streams, the electronic device may define an interleaving function, wherein anMthelement of aKthinterleaved sequence is determined by a modulo operation on an original sequence and a floor operation to distribute the elements across the interleaved sequences.

[0246] In some embodiments, the electronic device may be a UE, and the UE may receive, from a BS, parameters indicating whether interleaving is applied to transmitted symbols. In response to the parameters indicating that interleaving is applied to transmitted symbols, the UE may convert the modulation symbol sequence into the interleaved DFT-p-FDMA symbols. In some embodiments, the parameters may further indicate an interleaving function and a number of symbols to be interleaved, and the UE may convert the modulation symbol sequence into the interleaved DFT-p-FDMA symbols based on the interleaving function and the number of symbols to be interleaved.

[0247] At operation 1420, the electronic device transmits the interleaved DFT-p-FDMA symbols.

[0248] In some embodiments, the electronic device may be a UE, and the UE may receive, from a BS, parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in a downlink transmission. The UE may also receive, from the BS, the downlink transmission, and demodulate the downlink transmission based on the parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in downlink transmission. In some embodiments, the parameters may further indicate an interleaving function and a number of symbols to be interleaved, and the UE may demodulate the downlink transmission based on the interleaving function and the number of symbols to be interleaved.

[0249] Although FIG. 14 illustrates one example method for interleaved DFT phase rotated permutation based FDMA 1400, various changes may be made to FIG. 14. For example, while shown as a series of operations, various operations in FIG. 14 could overlap, occur in parallel, occur in a different order, occur any number of times, be omitted, or replaced by other operations.

[0250] FIG. 15 is a block diagram of a terminal or user equipment (UE) 1500 according to an embodiment of the disclosure. Furthermore , the UE of FIG. 15 may correspond to UE (or terminal) of FIG. 3A.

[0251] The terminal is an electronic device capable of wireless communication, may include a User Equipment (UE), a portable phone, a smartphone, a tablet, an Internet of things (IoT) device, etc., having various form factors, and may perform wireless communication with a base station (BS) through a wireless channel.

[0252] Referring to FIG. 15, the UE 1500 may include at least one transceiver (hereinafter, referred to as simply “transceiver”) 1501, at least one processor (hereinafter, referred to as simply “processor”) 1502, and at least one memory (hereinafter, referred to as simply “memory”) 1503. According to at least one or a combination of methods corresponding to the embodiments described in the present disclosure, the transceiver 1501, the processor 1502, and the memory 1503 of the UE 1500 may operate. However, components of the UE 1500 are not limited to the exemplary components illustrated in FIG. 15. In another embodiment, the UE 1500 may further include additional components in addition to the above-mentioned components, or some components may be omitted. Further, in some embodiments, any combination of the transceiver 1501, the processor 1502, or the memory 1503 may be integrated in the form of one component.

[0253] The transceiver 1501 may be a communication circuit or communication circuitry that enables the UE 1500 to perform wireless communication with a node or an entity of a network. For example, the transceiver 1501 may enable the UE 1500 to transmit or receive a signal to or from a BS through cellular communication, or to transmit or receive a signal to or from another UE through cellular communication. For example, the transceiver 1501 may support at least one of various cellular communication technologies including 3rd generation (3G), 4thgeneration (4G), long term evolution (LTE), 5th generation (5G) NR, 6thgeneration (6G), and various cellular wireless communication technologies supported by the transceiver (1501) may include all subsequent generations of evolved wireless communications.

[0254] According to an embodiment, the UE 1500 may include a plurality of transceivers. For example, in the case of supporting evolved-universal terrestrial radio access-new radio (E-UTRA-NR) sual connectivity (EN-DC), the UE 1500 may include a first transceiver supporting the 4G LTE wireless communication and a second transceiver supporting the 5G NR wireless communication. According to another embodiment, in the case of supporting NR-dual connectivity (NR-DC), the UE 1500 may include a plurality of transceivers supporting the 5G NR wireless communication. According to still another embodiment, in the case of supporting near field wireless communication, the UE 1500 may separately include a transceiver supporting at least one standard in the group of wireless communication protocol standards as defined in the protocol standards for Bluetooth®, wireless local area network (WLAN) network (including institute of electrical and electronics engineers (IEEE) 802.11-2016 standard or its amendments, e.g., 802.11ah, 802.11ad, 802.11ay, 802.11ax, 802.11az, 802.11ba, and 802.11be, without being limited thereto).

[0255] According to an embodiment, the transceiver 1501 may include various circuit structures used to transmit or receive signals to or from a BS through a wireless channel. The signals may include control information and data. For example, the transceiver 1501 may include a radio frequency (RF) transmitter for up-converting and amplifying the frequency of a transmitted signal and an RF receiver for low-noise-amplifying a received signal and down-converting the frequency thereof. The transceiver 1501 may output a signal received through a wireless channel to the processor 1502 and may transmit, through a wireless channel, a signal output from the processor 1502.

[0256] The processor 1502 may control general operations of the UE 1500 according to embodiments of the disclosure. The processor 1502 may be implemented by one or more integrated circuit (or circuitry) (IC) chips and may execute various data processings. The processor 1502 may include at least one electric circuit, and may execute instructions (or a program, codes, data, etc.) stored in the memory 1503, individually, collectively or in any combination thereof. Further, the processor 1502 may include a single-core processor or multi-core processor, and may include a processor assembly including a plurality of processing circuits (circuitry) according to a specific implementation scheme.

[0257] The processor 1502 may be electrically, operatively, or communicatively coupled to the transceiver 1501 to control the transceiver 1501.

[0258] The processor 1502 may include at least one processor (or processing circuitry), and the at least one processor may perform the following operations individually, collectively or in any combination thereof. For example, the processor 1502 may include a communication processor (CP) configured to control communication operations and an application processor (AP) configured to control execution of an upper layer (for example, an application layer) . In a specific embodiment, at least a part of the processor 1502 may be included in one chip and the other part of the processor 1502 may be included in another chip. Otherwise, at least one processor may be included in another component, for example, the transceiver 1501 or the memory 1503.

[0259] The processor 1502 may perform or control or cause an operation of the UE 1500 for executing at least one or a combination of methods according to embodiments of the disclosure. For example, the processor 1502 may control operations of the UE 1500 for processing a downlink signal received from a BS or generating and transmitting an uplink signal to a BS. To this end, the processor 1502 may execute a computer program, codes, or instructions stored in the memory 1503, so as to control other components of the UE 1500 to enable execution of various operations.

[0260] The memory 1503 corresponds to a hardware storage device capable of temporarily or permanently storing information and may include one or more storage media. For example, the memory 1503 may include a memory assembly including one or more storage media. For example, the one or more storage media may include permanent memory, such as a hard drive, flash memory, or read-only memory (ROM), semipermanent memory, such as random access memory (RAM), cache memory, or a combination thereof.

[0261] The memory 1503 may be electrically, operatively, or communicatively coupled to the processor 1502 and may be accessed by the processor 1502.

[0262] The memory 1503 may store a computer program, codes, or instructions executable by the processor 1502. According to an embodiment, a computer program, codes, or instructions executable by the processor 1502 may be either stored in a single memory device or separated and distributedly stored in two or more memory devices. By executing the instructions stored in the memory 1503, the processor 1502 may perform various functions according to an embodiment of the disclosure.

[0263] According to an embodiment of the disclosure, operations of the UE 1500 may be caused to be performed based on execution of instructions (or a computer program or codes) stored in the memory 1503 by at least one processor (or processing circuitry) configured to execute the same individually, collectively, or in any combination thereof, based on processing circuitry that is not configured to execute instructions, and / or based on components of processing circuitry that is not configured to execute instructions.

[0264] FIG. 16 is a block diagram of a base station (BS) 1600 according to an embodiment of the disclosure. Furthermore, the base station of FIG. 16 may correspond to the base station of FIG. 3B.

[0265] The BS 1600 may perform wireless communication with at least one user equipment (UE) located within the area of the BS 1600 through a wireless channel.

[0266] Referring to FIG. 16, the BS 1600 may include at least one transceiver (hereinafter, referred to as simply “transceiver”) 1601, at least one processor (hereinafter, referred to as simply “processor”) 1602, and at least one memory (hereinafter, referred to as simply “memory”) 1603. According to at least one or a combination of methods corresponding to the embodiments described in the present disclosure, the transceiver 1601, the processor 1602, and the memory 1603 of the BS 1600 may operate. However, components of the BS 1600 are not limited to the exemplary components illustrated in FIG. 16. In another embodiment, the BS 1600 may further include additional components in addition to the above-mentioned components, or some components may be omitted. Further, in some embodiments, any combination of the transceiver 1601, the processor 1602, or the memory 1603 may be integrated in the form of one component.

[0267] The transceiver 1601 may be a communication circuit or communication circuitry that enables the BS 1600 to perform wireless communication with a node or an entity of a network. For example, the transceiver 1601 may enable the BS 1600 to transmit or receive a signal to or from the UE 1500 through cellular communication, or to transmit or receive a signal to or from another network entity through wireless communication. For example, the transceiver 1601 may support various cellular communication technologies including 3rd generation (3G), 4thgeneration (4G), long term evolution (LTE), 5th generation (5G) NR, 6thgeneration (6G), and various cellular wireless communication technologies supported by the transceiver (1601) may include all subsequent generations of evolved wireless communications. According to an embodiment, the transceiver 1601 may include various circuit structures used to transmit or receive signals to or from a UE through a wireless channel. The signals may include control information and data. For example, the transceiver 1601 may include a radio frequency (RF) transmitter for up-converting and amplifying the frequency of a transmitted signal and an RF receiver for low-noise-amplifying a received signal and down-converting the frequency thereof. The transceiver 1601 may output a signal received through a wireless channel to the processor 1602 and may transmit, through a wireless channel, a signal output from the processor 1602.

[0268] Meanwhile, according to an embodiment of the present disclosure, the BS 1600 may perform communication with a node or an entity of a network through wired or wireless communication. For example, the BS 1600 may perform wired or wireless communication with an adjacent BS, or a node or an entity of a core network through a backhaul network. Although not illustrated in FIG. 16, when the BS 1600 performs wired communication, the BS 1600 may further include a separate network interface for wired communication in addition to the transceiver 1601. The network interface may be referred to as network interface circuitry or communication interface circuitry.

[0269] The processor 1602 may control general operations of the BS 1600 according to embodiments of the disclosure. The processor 1602 may be implemented by one or more integrated circuit (or circuitry) (IC) chips and may execute various data processings. The processor 1602 may include at least one electric circuit, and may execute instructions (or a program, codes, data, etc.) stored in the memory 1603, individually, collectively or in any combination thereof. Further, the processor 1602 may include a single-core processor or multi-core processor, and may include a processor assembly including a plurality of processing circuits (circuitry) according to a specific implementation scheme.

[0270] The processor 1602 may be electrically, operatively, or communicatively coupled to the transceiver 1601 to control the transceiver 1601.

[0271] The processor 1602 may include at least one processor (or processing circuitry), and the at least one processor may perform the following operations individually, collectively or in any combination thereof. In a specific embodiment, at least a part of the processor 1602 may be included in one chip and the other part of the processor 1602 may be included in another chip. Otherwise, at least one processor may be included in another component, for example, the transceiver 1601 or the memory 1603.

[0272] The processor 1602 may perform or control or cause an operation of the BS 1600 for executing at least one or a combination of methods according to embodiments of the disclosure. For example, the processor 1602 may control operations of the BS 1600 for generating and transmitting a downlink signal to a UE or processing an uplink signal received from a UE. Otherwise, the BS 1600 may transmit or receive a signal to or from a neighboring BS, transfer a signal received from a UE to an upper node of the network, or transmit a signal transferred from an upper node of the network to a UE. To this end, the processor 1602 may execute a computer program, codes, or instructions stored in the memory 1603, so as to control other components of the BS 1600 to enable execution of various operations.

[0273] The memory 1603 corresponds to a hardware storage device capable of temporarily or permanently storing information and may include one or more storage media. For example, the memory 1603 may include a memory assembly including one or more storage media. For example, the one or more storage media may include permanent memory, such as a hard drive, flash memory, or read-only memory (ROM), semipermanent memory, such as random access memory (RAM), cache memory, or a combination thereof.

[0274] The memory 1603 may be electrically, operatively, or communicatively coupled to the processor 1602 and may be accessed by the processor 1602.

[0275] The memory 1603 may store a computer program, codes, or instructions executable by the processor 1602. According to an embodiment, a computer program, codes, or instructions executable by the processor 1602 may be either stored in a single memory device or separated and distributedly stored in two or more memory devices. By executing the instructions stored in the memory 1603, the processor 1602 may perform various functions according to an embodiment of the disclosure.

[0276] According to an embodiment of the disclosure, operations of the BS 1600 may be caused to be performed based on execution of instructions (or a computer program or codes) stored in the memory 1603 by at least one processor (or processing circuitry) configured to execute the same individually, collectively, or in any combination thereof, based on processing circuitry that is not configured to execute instructions, and / or based on components of processing circuitry that is not configured to execute instructions.

[0277] The UE or the base station may perform various communication procedures related to the control plane or the user plane by cooperating with one or more network entities based on wireless communication. For example, the UE may communicate with network entity such as an Access and Mobility Management Function (AMF) or a Session Management Function (SMF) via the base station, or the base station may perform at least one communication procedure by directly transmitting and receiving signals to / from, or relaying signals between, the network entities.

[0278] The structure of the above-described network entity will be described in more detail with reference to the drawings.

[0279] FIG. 17 is a block diagram of a network entity 1700 according to an embodiment of the disclosure.

[0280] The network entity 1700 may include an entity (apparatus, device, or server, etc.) that performs one or more network functions (NFs) or a part of a network function constituting a core network (e.g., a 5th generation (5G) core (5GC)) in a communication system. In this case, multiple NFs may be implemented within a single network entity, or a single NF may be distributed and implemented across a plurality of network entities. In addition, when an NF is implemented within the network entity, the NF may be implemented in the form of software, and in such a case, a program for operating the NF may be stored in memory of the network entity 1700.

[0281] A single NF may be implemented by one or more instances, which may be deployed on the same network entity or distributed across multiple network entities to operate. The instance may be a software unit that logically executes a specific network function, and may be implemented in a form that is decoupled from physical hardware resources. Further, one or more NFs may be implemented in the form of one network slice to operate to satisfy specifications required by a particular service.

[0282] The NF may include at least one of an access and mobility management function (AMF), a session management function (SMF), a local session management function (L-SMF), a user plane function (UPF), a local user plane function (L-UPF), a policy control function (PCF), a unified data management (UDM), a unified data repository (UDR), a network exposure function (NEF), a network repository function (NRF), an application function (AF), a network slice selection function (NSSF), a network data analytics function (NWDAF), a network slice admission control function (NSACF), an authentication server function (AUSF), or a data network (DN).

[0283] Referring to FIG. 17, the network entity 1700 may include at least one network interface 1701, at least one processor 1702 (hereinafter, “processor”), and at least one memory 1703 (hereinafter, “memory”). As described above, a NF may be implemented in the form of a physical device such as the network entity 1700, or may be virtualized and executed in the form of an instance. When implemented as an instance, the NF need not necessarily include physical components as illustrated in FIG. 17. In such a case, the instance may be logically represented as comprising one or more logical functional elements.

[0284] According to at least one or a combination of methods corresponding to the embodiments described in the present disclosure, the network interface 1701, the processor 1702, and the memory 1703 of the network entity 1700 may operate. However, components of the network entity 1700 are not limited to the exemplary components illustrated in FIG. 17. In another embodiment, the network entity 1700 may further include additional components in addition to the above-mentioned components, or some components may be omitted. Further, in an embodiment, the network interface 1701, the processor 1702, or the memory 1703 may be integrated in the form of one component.

[0285] The network interface 1701 is a collective term for a transmitter part of the network entity 1700 and a receiver part of the network entity 1700, and may be a communication circuit for transmitting or receiving a signal to or from a user equipment (UE), a base station (BS), or another network entity. Here, the communication circuit may include both a communication circuit for wireless communication and a communication circuit for a wired communication. For example, the network interface 1701 may include a circuit, logic, hardware, etc., configured to exchange a control plane message or a user plane message with a UE, a BS, or other core network entities through wireless communication or wired communication. The network interface 1701 may operate using various protocols (e.g., non-access stratum (NAS) protocol). The network interface 1701 may also be referred to, for convenience of description or depending on implementation, as communication circuitry, network interface circuitry, or a communication interface circuitry.

[0286] The processor 1702 may control general operations of the network entity 1700 according to embodiments of the disclosure. The processor 1702 may be implemented by one or more integrated circuit (or circuitry) (IC) chips and may execute various data processings. The processor 1702 may include at least one electric circuit, and may execute instructions (or a program, codes, data, etc.) stored in the memory 1703, individually, collectively or in any combination thereof. Further, the processor 1702 may include a single-core processor or multi-core processor, and may include a processor assembly including a plurality of processing circuits (circuitry) according to a specific implementation scheme. Further, it should be noted that, according to another embodiment, in a case where NF is implemented in the form of an instance, the network function may be not necessarily configured by physical hardware.

[0287] According to an embodiment, the processor 1702 may be electrically, operatively, or communicatively coupled to the network interface 1701 to control the network interface 1701.

[0288] The processor 1702 may include at least one processor (or processing circuitry), and the at least one processor may perform the following operations individually, collectively or in any combination thereof. In a specific embodiment, at least a part of the processor 1702 may be included in one chip and the other part of the processor 1702 may be included in another chip. Otherwise, at least one processor may be included in another component, for example, the network interface 1701 or the memory 1703.

[0289] The processor 1702 may perform or control or cause an operation of the network entity 1700 for executing at least one or a combination of methods according to embodiments of the disclosure. For example, the processor 1702 may control operations of the network entity 1700 for exchanging a control plane message or a user plane message with a UE, a BS, or other core network entities through wireless or wired communication, using various protocols (e.g., NAS protocol). To this end, the processor 1702 may execute a computer program, codes, or instructions stored in the memory 1703, so as to control other components of the network entity 1700 to enable execution of various operations.

[0290] The memory 1703 corresponds to a hardware storage device capable of temporarily or permanently storing information and may include one or more storage media. For example, the memory 1703 may include a memory assembly including one or more storage media. For example, the one or more storage media may include permanent memory, such as a hard drive, flash memory, or read-only memory (ROM), semipermanent memory, such as random access memory (RAM), cache memory, or a combination thereof.

[0291] The memory 1703 may be electrically, operatively, or communicatively coupled to the processor 1702 and may be accessed by the processor 1702.

[0292] The memory 1703 may store a computer program, codes, or instructions executable by the processor 1702. According to an embodiment, a computer program, codes, or instructions executable by the processor 1702 may be either stored in a single memory device or separated and distributedly stored in two or more memory devices. By executing the instructions stored in the memory 1703, the processor 1702 may perform various functions according to an embodiment of the disclosure.

[0293] According to an embodiment of the disclosure, operations of the network entity 1700 may be caused to be performed based on execution of instructions (or a computer program or codes) stored in the memory 1703 by at least one processor (or processing circuitry) configured to execute the same individually, collectively, or in any combination thereof, based on processing circuitry that is not configured to execute instructions, and / or based on components of processing circuitry that is not configured to execute instructions.

[0294] In one embodiment, an electronic device is provided, which comprises: at least one transceiver; at least one processor communicatively coupled to the at least one transceiver; and at least one memory, communicatively coupled to the at least one processor, storing instructions executable by the at least one processor individually or in any combination to cause the electronic device to convert a modulation symbol sequence of lengthMKinto interleaved discrete Fourier transform phase rotated permutation based frequency division multiple access (DFT-p-FDMA) symbols; and transmit the interleaved DFT-p-FDMA symbols.

[0295] In another embodiment, the electronic device is provided, wherein to convert the modulation symbol sequence into interleaved DFT-p-FDMA symbols, the instructions further casue the electronic device to: convert the modulation symbol sequence intoKparallel streams of modulation symbols; transform each of the parallel streams with a block-wise discrete Fourier transform (DFT); phase rotate and permute each of the transformed parallel streams of modulation symbols; interleave the phase rotated and permuted parallel streams of modulation symbols, to generate interleaved sequences; map each of the interleaved sequences to subcarriers; transform each of the mapped sequences with an inverse fast Fourier transform (IFFT), to generate the interleaved DFT-p-FDMA symbols; and add a cyclic prefix (CP) to the interleaved DFT-p-FDMA symbols.

[0296] In another embodiment, the electronic device is provided, wherein to interleave the phase rotated and permuted parallel streams, the instructions further casue the electronic device to define an interleaving function, wherein anMthelement of aKthinterleaved sequence is determined by a modulo operation on an original sequence and a floor operation to distribute elements across the interleaved sequences.

[0297] In another embodiment, the electronic device is provided, wherein: the electronic device is a user equipment; the instructions further casue the electronic device to: receive, from a base station (BS), parameters indicating whether interleaving is applied to transmitted symbols; and in response to the parameters indicating that interleaving is applied to transmitted symbols, convert the modulation symbol sequence into the interleaved DFT-p-FDMA symbols.

[0298] In another embodiment, the electronic device is provided, wherein: the parameters further indicate an interleaving function and a number of symbols to be interleaved; and the instructions further casue the electronic device to convert the modulation symbol sequence into the interleaved DFT-p-FDMA symbols based on the interleaving function and the number of symbols to be interleaved.

[0299] In another embodiment, the electronic device is provided, wherein: the electronic device is a user equipment; the instructions further casue the electronic device to: receive, from a base station (BS), parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in a downlink transmission; receive, from the BS, the downlink transmission; and demodulate the downlink transmission based on the parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in downlink transmission.

[0300] In another embodiment, the electronic device is provided, wherein: the parameters further indicate an interleaving function and a number of symbols to be interleaved; and the instructions further casue the electronic device to demodulate the downlink transmission based on the interleaving function and the number of symbols to be interleaved.

[0301] In one embodiment, a method of operating an electronic device is provided, the method comprises: converting a modulation symbol sequence of lengthMKinto interleaved discrete Fourier transform phase rotated permutation based frequency division multiple access (DFT-p-FDMA) symbols; and transmitting the interleaved DFT-p-FDMA symbols.

[0302] In another embodiment, the method is provided, wherein to convert the modulation symbol sequence into interleaved DFT-p-FDMA symbols, the method further comprises: converting the modulation symbol sequence intoKparallel streams of modulation symbols; transforming each of the parallel streams with a block-wise discrete Fourier transform (DFT); phase rotating and permuting each of the transformed parallel streams of modulation symbols; interleaving the phase rotated and permuted parallel streams of modulation symbols, to generate interleaved sequences; mapping each of the interleaved sequences to subcarriers; transforming each of the mapped sequences with an inverse fast Fourier transform (IFFT), to generate the interleaved DFT-p-FDMA symbols; and adding a cyclic prefix (CP) to the interleaved DFT-p-FDMA symbols.

[0303] In another embodiment, the method is provided, wherein to interleave the phase rotated and permuted parallel streams, the method further comprises defining an interleaving function, wherein anMthelement of aKthinterleaved sequence is determined by a modulo operation on an original sequence and a floor operation to distribute elements across the interleaved sequences.

[0304] In another embodiment, the method is provided, wherein: the electronic device is a user equipment; and the method further comprises: receiving, from a base station (BS), parameters indicating whether interleaving is applied to transmitted symbols; and in response to the parameters indicating that interleaving is applied to transmitted symbols, converting the modulation symbol sequence into the interleaved DFT-p-FDMA symbols.

[0305] In another embodiment, the method is provided, wherein: the parameters further indicate an interleaving function and a number of symbols to be interleaved; and the method further comprises converting the modulation symbol sequence into the interleaved DFT-p-FDMA symbols based on the interleaving function and the number of symbols to be interleaved.

[0306] In another embodiment, the method is provided, wherein: the electronic device is a user equipment; and the method further comprises: receiving, from a base station (BS), parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in a downlink transmission; receiving, from the BS, the downlink transmission; and demodulating the downlink transmission based on the parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in downlink transmission.

[0307] In another embodiment, the method is provided, wherein: the parameters further indicate an interleaving function and a number of symbols to be interleaved; and the method further comprises demodulating the downlink transmission based on the interleaving function and the number of symbols to be interleaved.

[0308] In one embodiment, one or more non-transitory computer-readable storage media storing computer-executable instructions that, when executed by at least one processor of a device individually or collectively, cause the device to perform operations are provided, the operations comprise: converting a modulation symbol sequence of lengthMKinto interleaved discrete Fourier transform phase rotated permutation based frequency division multiple access (DFT-p-FDMA) symbols; and transmitting the interleaved DFT-p-FDMA symbols.

[0309] In another embodiment, the non-transitory computer-readable storage media are provided, wherein to convert the modulation symbol sequence into interleaved DFT-p-FDMA symbols, the operations further comprises: converting the modulation symbol sequence intoKparallel streams of modulation symbols; transforming each of the parallel streams with a block-wise discrete Fourier transform (DFT); phase rotating and permute each of the transformed parallel streams of modulation symbols; interleaving the phase rotated and permuted parallel streams of modulation symbols, to generate interleaved sequences; mapping each of the interleaved sequences to subcarriers; transforming each of the mapped sequences with an inverse fast Fourier transform (IFFT), to generate the interleaved DFT-p-FDMA symbols; and adding a cyclic prefix (CP) to the interleaved DFT-p-FDMA symbols.

[0310] In another embodiment, the non-transitory computer-readable storage media are provided, wherein to interleave the phase rotated and permuted parallel streams, the operaion further comprises defining an interleaving function, wherein anMthelement of aKthinterleaved sequence is determined by a modulo operation on an original sequence and a floor operation to distribute elements across the interleaved sequences.

[0311] In another embodiment, the non-transitory computer-readable storage media are provided, wherein: the device is a user equipment; and the operations further comprises: receiving, from a base station (BS), parameters indicating whether interleaving is applied to transmitted symbols; and in response to the parameters indicating that interleaving is applied to transmitted symbols, converting the modulation symbol sequence into the interleaved DFT-p-FDMA symbols.

[0312] In another embodiment, the non-transitory computer-readable storage media are provided, wherein: the parameters further indicate an interleaving function and a number of symbols to be interleaved; and the operations further comprises converting the modulation symbol sequence into the interleaved DFT-p-FDMA symbols based on the interleaving function and the number of symbols to be interleaved.

[0313] In another embodiment, the non-transitory computer-readable storage media are provided, wherein: the device is a user equipment; and the operations further comprises: receiving, from a base station (BS), parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in a downlink transmission, an interleaving function, and a number of symbols to be interleaved; receiving, from the BS, the downlink transmission; and demodulating the downlink transmission based on the parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in downlink transmission, the interleaving function, and the number of symbols to be interleaved.

[0314] Any of the above variation embodiments can be utilized independently or in combination with at least one other variation embodiment. The above flowcharts illustrate example methods that can be implemented in accordance with the principles of the present disclosure and various changes could be made to the methods illustrated in the flowcharts herein. For example, while shown as a series of operations, various operations in each figure could overlap, occur in parallel, occur in a different order, or occur multiple times. In another example, operations may be omitted or replaced by other operations.

[0315] Meanwhile, although specific embodiments of the present disclosure have been described in detail, various modifications may be made without departing from the scope of the present disclosure. Therefore, the scope of the present disclosure should not be limited to the described embodiments, but should be defined by the claims and equivalents thereof.

Claims

1.An electronic device comprising:at least one transceiver;at least one processor communicatively coupled to the at least one transceiver; andat least one memory, communicatively coupled to the at least one processor, storing instructions executable by the at least one processor individually or in any combination to cause the electronic device toconvert a modulation symbol sequence of lengthMKinto interleaved discrete Fourier transform phase rotated permutation based frequency division multiple access (DFT-p-FDMA) symbols; andtransmit the interleaved DFT-p-FDMA symbols.2.The electronic device of claim 1, wherein to convert the modulation symbol sequence into interleaved DFT-p-FDMA symbols, the instructions further casue the electronic device to:convert the modulation symbol sequence intoKparallel streams of modulation symbols;transform each of the parallel streams with a block-wise discrete Fourier transform (DFT);phase rotate and permute each of the transformed parallel streams of modulation symbols;interleave the phase rotated and permuted parallel streams of modulation symbols, to generate interleaved sequences;map each of the interleaved sequences to subcarriers;transform each of the mapped sequences with an inverse fast Fourier transform (IFFT), to generate the interleaved DFT-p-FDMA symbols; andadd a cyclic prefix (CP) to the interleaved DFT-p-FDMA symbols.3.The electronic device of claim 2, wherein to interleave the phase rotated and permuted parallel streams, the instructions further casue the electronic device to define an interleaving function, wherein anMthelement of aKthinterleaved sequence is determined by a modulo operation on an original sequence and a floor operation to distribute elements across the interleaved sequences.4.The electronic device of claim 1, wherein:the electronic device is a user equipment;the instructions further casue the electronic device to:receive, from a base station (BS), parameters indicating whether interleaving is applied to transmitted symbols; andin response to the parameters indicating that interleaving is applied to transmitted symbols, convert the modulation symbol sequence into the interleaved DFT-p-FDMA symbols.5.The electronic device of claim 4, wherein:the parameters further indicate an interleaving function and a number of symbols to be interleaved; andthe instructions further casue the electronic device to convert the modulation symbol sequence into the interleaved DFT-p-FDMA symbols based on the interleaving function and the number of symbols to be interleaved.6.The electronic device of claim 1, wherein:the electronic device is a user equipment;the instructions further casue the electronic device to:receive, from a base station (BS), parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in a downlink transmission;receive, from the BS, the downlink transmission; anddemodulate the downlink transmission based on the parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in downlink transmission.7.The electronic device of claim 6, wherein:the parameters further indicate an interleaving function and a number of symbols to be interleaved; andthe instructions further casue the electronic device to demodulate the downlink transmission based on the interleaving function and the number of symbols to be interleaved.8.A method of operating an electronic device, the method comprising:converting a modulation symbol sequence of lengthMKinto interleaved discrete Fourier transform phase rotated permutation based frequency division multiple access (DFT-p-FDMA) symbols; andtransmitting the interleaved DFT-p-FDMA symbols.9.The method of claim 8, wherein to convert the modulation symbol sequence into interleaved DFT-p-FDMA symbols, the method further comprises:converting the modulation symbol sequence intoKparallel streams of modulation symbols;transforming each of the parallel streams with a block-wise discrete Fourier transform (DFT);phase rotating and permuting each of the transformed parallel streams of modulation symbols;interleaving the phase rotated and permuted parallel streams of modulation symbols, to generate interleaved sequences;mapping each of the interleaved sequences to subcarriers;transforming each of the mapped sequences with an inverse fast Fourier transform (IFFT), to generate the interleaved DFT-p-FDMA symbols; andadding a cyclic prefix (CP) to the interleaved DFT-p-FDMA symbols.10.The method of claim 9, wherein to interleave the phase rotated and permuted parallel streams, the method further comprises defining an interleaving function, wherein anMthelement of aKthinterleaved sequence is determined by a modulo operation on an original sequence and a floor operation to distribute elements across the interleaved sequences.11.The method of claim 8, wherein:the electronic device is a user equipment; andthe method further comprises:receiving, from a base station (BS), parameters indicating whether interleaving is applied to transmitted symbols; andin response to the parameters indicating that interleaving is applied to transmitted symbols, converting the modulation symbol sequence into the interleaved DFT-p-FDMA symbols.12.The method of claim 11, wherein:the parameters further indicate an interleaving function and a number of symbols to be interleaved; andthe method further comprises converting the modulation symbol sequence into the interleaved DFT-p-FDMA symbols based on the interleaving function and the number of symbols to be interleaved.13.The method of claim 8, wherein:the electronic device is a user equipment; andthe method further comprises:receiving, from a base station (BS), parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in a downlink transmission;receiving, from the BS, the downlink transmission; anddemodulating the downlink transmission based on the parameters indicating whether interleaving is applied to DFT-p-FDMA symbols in downlink transmission.14.The method of claim 13, wherein:the parameters further indicate an interleaving function and a number of symbols to be interleaved; andthe method further comprises demodulating the downlink transmission based on the interleaving function and the number of symbols to be interleaved.15.One or more non-transitory computer-readable storage media storing computer-executable instructions that, when executed by at least one processor of a device individually or collectively, cause the device to perform operations, the operations comprising:converting a modulation symbol sequence of lengthMKinto interleaved discrete Fourier transform phase rotated permutation based frequency division multiple access (DFT-p-FDMA) symbols; andtransmitting the interleaved DFT-p-FDMA symbols.

Images