Peak current sampling circuit, switching power supply controller and switching power supply

Abstract

Disclosed in the present invention are a peak current sampling circuit, a switching power supply controller and a switching power supply. The switching power supply uses a power switch transistor to control transfer of electric energy from an input end to an output end, so as to generate an output voltage on the basis of an input voltage. The peak current sampling circuit comprises: a voltage sampling module, an input end of the voltage sampling module being connected to a drain electrode of the power switch transistor, and the voltage sampling module being used for sampling a drain-source voltage difference of the power switch transistor synchronously with turn-on and turn-off actions of the power switch transistor, so as to obtain a first sampled signal having a positive temperature coefficient; and a temperature compensation module, which is used for performing temperature compensation on the first sampled signal, so as to obtain a second sampled signal having a zero temperature coefficient, the second sampled signal carrying peak current information of the switching power supply. The present application can achieve peak current sampling without providing a sampling resistor in a switching power supply, thus reducing power consumption and costs of the circuit and further ensuring that the sampling accuracy of the circuit is not affected.

Description

Peak current sampling circuit, switching power supply controller and switching power supply

[0001] The present application claims priority to the Chinese Patent Application No. 202411154328.9, filed on August 21, 2024, entitled "Peak current sampling circuit, switching power supply controller and switching power supply", and incorporates by reference the entire specification, claims, drawings and abstract of the aforementioned Chinese Patent Application. TECHNICAL FIELD

[0002] The present application relates to the technical field of electronics, and more particularly, to a peak current sampling circuit, a switching power supply controller and a switching power supply. BACKGROUND

[0003] With the demand for power electronic products and the development of semiconductor technology, power management chips are more widely used in portable computers, mobile phones, personal digital assistants and other portable or non-portable electronic devices. Switching power supply converters control the transmission of electrical energy from the input to the output by using power switching tubes, so as to provide a constant output voltage and / or output current at the output.

[0004] In order to achieve efficient and stable output, it is usually necessary to monitor and adjust the working state of the converter. Peak current control is a common control method, which adjusts the output voltage by monitoring the peak current of the power switching tube. However, as shown in FIG. 1, the conventional peak current sampling method usually needs to connect a sampling resistor Rcs in series with the source terminal of the power switching tube in order to measure the current. Although this method is simple, it has some disadvantages. First, the sampling resistor will introduce additional power loss, reducing the overall efficiency of the system. Second, the presence of the sampling resistor will increase the complexity of the circuit, especially in high-power applications, the power level requirement of the sampling resistor is higher, and the volume and cost also increase. In addition, the sampling resistor can also introduce noise and interference, affecting the accuracy of current sampling. SUMMARY

[0005] Therefore, the purpose of the present application is to provide a peak current sampling circuit, a switching power supply controller and a switching power supply, which can save the sampling resistor while improving the sampling accuracy of the circuit, improve the circuit efficiency and reduce the cost.

[0006] According to an aspect of the present application, a peak current sampling circuit is provided, comprising: a voltage sampling module, an input end of the voltage sampling module being coupled with a first end of a power switch tube, a second end of the power switch tube being coupled with a first reference ground, the voltage sampling module sampling a voltage difference between the first end and the second end of the power switch tube during a conduction period of the power switch tube to obtain a first sampling signal; and a temperature compensation module, configured to perform temperature compensation on the first sampling signal to obtain a second sampling signal with zero temperature coefficient.

[0007] Optionally, the second sampling signal represents peak current information of the switching power supply.

[0008] Optionally, the first sampling signal has a positive temperature coefficient.

[0009] Optionally, the voltage sampling module comprises: a first transistor and a second transistor connected in series between an input end of an input voltage and an output end of the first sampling signal, wherein the first transistor is in a constant-on state; a third transistor connected between the output end of the first sampling signal and a first reference ground; and a logic unit configured to control conduction and turn-off of the second transistor and the third transistor according to a switch control signal and / or a switch driving signal, wherein the second transistor and the third transistor are alternately turned on, and the second transistor is configured to be turned on when the power switch tube is turned on, and the third transistor is configured to be turned on when the power switch tube is turned off.

[0010] Optionally, when the logic unit controls conduction and turn-off of the second transistor and the third transistor according to the switch control signal and the switch driving signal, the logic unit controls a conduction time of the second transistor and a turn-off time of the third transistor according to the switch driving signal, and the voltage sampling module starts sampling the voltage difference between the first end and the second end of the power switch tube; the logic unit controls a turn-off time of the second transistor and a conduction time of the third transistor according to the switch control signal, and the voltage sampling module ends sampling the voltage difference between the first end and the second end of the power switch tube.

[0011] Optionally, the logic unit comprises: a buffer, an input end of the buffer being configured to receive the switch driving signal; a NAND gate, a first input end of the NAND gate being connected with an output end of the buffer, a second input end of the NAND gate being configured to receive the switch control signal, and an output end of the NAND gate being connected with a control end of the third transistor; and an inverter, an input end of the inverter being connected with an output end of the NAND gate, and an output end of the inverter being connected with a control end of the second transistor.

[0012] Optionally, the temperature compensation module comprises: a voltage-to-current conversion unit, configured to convert the first sampling signal in voltage form into a first current signal; a current mirror unit, the current mirror unit comprising a first current terminal and a second current terminal, the first current terminal being connected to the first node with the voltage-to-current conversion unit, the current mirror unit being configured to mirror the first current signal into a second current signal; and a first resistor, the first resistor being connected to the second node with the second current terminal of the current mirror unit, the first resistor being configured to convert the second current signal into the second sampling signal in voltage form.

[0013] Optionally, further comprising: a dynamic acceleration module, connected to the first node and the second node, the dynamic acceleration module being configured to keep transistors in the current mirror unit in a constant-on state to improve the conversion speed of the temperature compensation module.

[0014] Optionally, the voltage-to-current conversion unit comprises: a first current source and a fourth transistor connected in series between a power supply voltage and a first reference ground, a control terminal of the fourth transistor being connected to the first sampling signal; and a fifth transistor and a sixth transistor connected in series between the first node and the first reference ground, a control terminal of the fifth transistor being connected to a third node between the first current source and the fourth transistor, a control terminal of the sixth transistor being connected to the power supply voltage.

[0015] Optionally, the current mirror unit comprises: a seventh transistor and an eighth transistor, first ends of the seventh transistor and the eighth transistor being connected to a power supply voltage, control terminals of the seventh transistor and the eighth transistor being connected to a second end of the seventh transistor, the second end of the seventh transistor being connected to the first node as the first current terminal, a second end of the eighth transistor being connected to the second node as the second current terminal.

[0016] Optionally, the dynamic acceleration module comprises: a second current source connected between the first node and a first reference ground; and a third current source connected between the second node and the first reference ground, wherein a current ratio between the second current source and the third current source is equal to a mirroring ratio of the current mirror unit.

[0017] Optionally, the first transistor is a depletion-mode NMOS transistor, a control terminal of the first transistor being connected to the first reference ground.

[0018] Optionally, the first transistor is a high-voltage junction field effect transistor.

[0019] Optionally, the second transistor is an enhancement-mode NMOS transistor, and the third transistor is an enhancement-mode NMOS transistor.

[0020] According to another aspect of the present application, there is provided a switching power supply controller for controlling a power conversion circuit for converting an input voltage to an output voltage, wherein the switching power supply controller comprises: a switching control circuit for generating a switching control signal for controlling switching action of a power switch; a driving circuit connected to a gate of the power switch for generating a switching driving signal for driving the power switch to turn on or turn off according to the switching control signal; and a peak current sampling circuit comprising: a voltage sampling module having an input coupled to a drain of the power switch and a source coupled to a first reference ground, the voltage sampling module sampling a voltage difference between the drain and the source of the power switch during a turn-on period of the power switch to obtain a first sampling signal; and a temperature compensation module for temperature compensating the first sampling signal to obtain a second sampling signal with zero temperature coefficient.

[0021] Optionally, the second sampling signal represents peak current information of the switching power supply.

[0022] Optionally, the first sampling signal has a positive temperature coefficient.

[0023] Optionally, the voltage sampling module comprises: a first transistor and a second transistor connected in series between an input of the voltage sampling module and an output of the first sampling signal, wherein the first transistor is always on; a third transistor connected between the output of the first sampling signal and a first reference ground; and a logic unit for controlling the second transistor and the third transistor to turn on and turn off according to the switching control signal and / or the switching driving signal, wherein the second transistor and the third transistor are turned on alternately, and the second transistor is turned on when the power switch is turned on, and the third transistor is turned on when the power switch is turned off.

[0024] Optionally, when the logic unit controls the second transistor and the third transistor to turn on and turn off according to the switching control signal and the switching driving signal, the logic unit controls a turn-on time of the second transistor and a turn-off time of the third transistor according to the switching driving signal, and the voltage sampling module starts sampling the voltage difference between the first end and the second end of the power switch; and the logic unit controls a turn-off time of the second transistor and a turn-on time of the third transistor according to the switching control signal, and the voltage sampling module ends sampling the voltage difference between the first end and the second end of the power switch.

[0025] Optionally, the logic unit comprises: a buffer, an input terminal of the buffer being configured to receive the switch driving signal; a NAND gate, a first input terminal of the NAND gate being connected to an output terminal of the buffer, a second input terminal of the NAND gate being configured to receive the switch control signal, and an output terminal of the NAND gate being connected to a control terminal of the third transistor; and an inverter, an input terminal of the inverter being connected to the output terminal of the NAND gate, and an output terminal of the inverter being connected to a control terminal of the second transistor.

[0026] Optionally, the temperature compensation module comprises: a voltage-to-current conversion unit, configured to convert the first sampling signal in voltage form into a first current signal; a current mirror unit, the current mirror unit comprising a first current terminal and a second current terminal, the first current terminal being connected to the voltage-to-current conversion unit at a first node, and the current mirror unit being configured to mirror the first current signal into a second current signal; and a first resistor, the first resistor being connected to the second current terminal of the current mirror unit at a second node, and the first resistor being configured to convert the second current signal into the second sampling signal in voltage form.

[0027] Optionally, the peak current sampling circuit further comprises: a dynamic acceleration module, connected to the first node and the second node, and configured to keep transistors in the current mirror unit in a constant-on state to improve the conversion speed of the temperature compensation module.

[0028] Optionally, the voltage-to-current conversion unit comprises: a first current source and a fourth transistor connected in series between a power supply voltage and a first reference ground, a control terminal of the fourth transistor being connected to the first sampling signal; and a fifth transistor and a sixth transistor connected in series between the first node and the first reference ground, a control terminal of the fifth transistor being connected to a third node between the first current source and the fourth transistor, and a control terminal of the sixth transistor being connected to the power supply voltage.

[0029] Optionally, the current mirror unit comprises: a seventh transistor and an eighth transistor, first ends of the seventh transistor and the eighth transistor being connected to a power supply voltage, control terminals of the seventh transistor and the eighth transistor being connected to a second end of the seventh transistor, the second end of the seventh transistor being connected to the first node as the first current terminal, and a second end of the eighth transistor being connected to the second node as the second current terminal.

[0030] Optionally, the dynamic acceleration module comprises: a second current source connected between the first node and a first reference ground; and a third current source connected between the second node and the first reference ground, wherein a current ratio between the second current source and the third current source is equal to a mirror ratio of the current mirror unit.

[0031] Optionally, the first transistor is a depletion-mode NMOS transistor, and a control terminal of the first transistor is connected to the first reference ground.

[0032] Optionally, the first transistor is a high-voltage junction field effect transistor.

[0033] Optionally, the second transistor is an enhancement-mode NMOS transistor, and the third transistor is an enhancement-mode NMOS transistor.

[0034] Optionally, the switching power supply further comprises a power supply circuit configured to provide a power supply voltage to the switching control circuit according to the input voltage.

[0035] Optionally, the power conversion circuit comprises a floating ground Buck-Boost topology, a floating ground Buck topology, a Boost topology, and a flyback topology.

[0036] According to another aspect of the present application, a switching power supply is provided, comprising: a power conversion circuit controlled by a power switch tube to transmit electric energy from an input end of the power conversion circuit to an output end of the power conversion circuit, so as to generate an output voltage according to an input voltage; and the switching power supply controller as described above.

[0037] In summary, the peak current sampling circuit for the switching power supply directly samples the drain-source voltage difference of the power switch tube to obtain the peak current information of the switching power supply, compared with the prior art, without the need to set a sampling resistor in the switching power supply to achieve peak current control, which not only can reduce the power consumption and heat generation of the circuit, improve the overall efficiency of the power supply, reduce the circuit cost and improve the thermal management of the circuit, but also can avoid the influence of the precision and temperature coefficient of the sampling resistor on the accuracy of current measurement, and improve the sampling precision of the circuit.

[0038] In addition, since the on-resistance of the power switch tube in the switching power supply changes greatly with temperature, which in turn causes the sampling deviation to become larger, the peak current sampling circuit of the present application compensates the output of the voltage sampling module by using a temperature compensation module, thereby solving the problem that the change of temperature in the prior art causes the on-resistance deviation of the power switch tube to increase, thereby causing a large deviation in sampling accuracy, and in turn reducing the circuit cost while ensuring the sampling accuracy of the circuit is not affected.

[0039] In addition, the peak current sampling circuit of the present application also uses a dynamic acceleration module to provide a bias current to a transistor in the temperature compensation module, so as to improve the conversion speed of the temperature compensation module, thereby avoiding the situation that the output signal of the temperature compensation module is not synchronized with the input signal. BRIEF DESCRIPTION OF DRAWINGS

[0040] The above and other objects, features and advantages of the present application will become more clearly understood from the following description of the embodiments of the present application taken with reference to the accompanying drawings.

[0041] FIG. 1 shows a structural schematic diagram of a switching power supply of the prior art.

[0042] FIG. 2 shows a structural schematic diagram of a switching power supply of a flyback topology without an auxiliary winding according to a first embodiment of the present application.

[0043] FIG. 3 shows a structural schematic diagram of a switching power supply controller according to an embodiment of the present application.

[0044] FIG. 4 shows a structural schematic diagram of a peak current sampling circuit according to an embodiment of the present application.

[0045] FIG. 5 shows a circuit schematic diagram of a voltage sampling module in FIG. 4.

[0046] FIG. 6 shows a working timing diagram of the voltage sampling module in FIG. 5.

[0047] FIG. 7 shows a circuit schematic diagram of a temperature compensation module and a dynamic acceleration module in FIG. 4.

[0048] FIG. 8 shows a structural schematic diagram of a switching power supply of a flyback topology with an auxiliary winding according to a second embodiment of the present application.

[0049] FIG. 9 shows a structural schematic diagram of a switching power supply of a buck topology according to a third embodiment of the present application. DETAILED DESCRIPTION

[0050] Various embodiments of the present application will be described in detail below with reference to the drawings. In the various drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, each portion in the drawings is not drawn to scale.

[0051] Many specific details of the present application are described below in order to provide a thorough understanding of the present application. However, as will be readily understood by one skilled in the art, the present application can be practiced without these specific details.

[0052] It should be understood that in the following description, "circuitry" refers to an electrical circuit comprising at least one element or sub-circuitry constructed by electrical or electromagnetic connections. When an element or circuit is said to be "connected to" another element or said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be intermediate elements, and the connection between elements can be physical, logical, or a combination thereof. In contrast, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element.

[0053] In this application, a transistor can include one selected from a bipolar transistor or a field effect transistor, a first end and a second end of the transistor are a high potential end and a low potential end on a current path, respectively, and a control end is used to receive a control signal to control the on and off of the transistor. A MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) includes a first end, a second end, and a control end, and in the on state of the MOSFET, current flows from the first end to the second end. The first end, the second end, and the control end of the PMOS tube are the source, the drain, and the gate, respectively, and the first end, the second end, and the control end of the NMOS tube are the drain, the source, and the gate, respectively.

[0054] The present application can be presented in various forms, some examples of which will be described below.

[0055] FIG. 2 shows a structure diagram of a switch power supply of an auxiliary winding-free flyback topology according to a first embodiment of the present application. As shown in FIG. 2, the switch power supply 200 includes a power conversion circuit 210, a switch power supply controller 220, and a feedback circuit 230. The power conversion circuit 210 is used to provide an output current Iout to a load Ro according to an input voltage Vin, and the switch power supply controller 220 is used to control the working state of the power conversion circuit 210.

[0056] For example, the first embodiment of the present application provides a switch power supply of an auxiliary winding-free flyback topology, and the power conversion circuit 210 includes a power switch tube Q1, a transformer T1 (including a primary winding L1 and a secondary winding L2), a freewheeling diode D1, and an output capacitor Co.

[0057] The drain of the power switch Q1 (e.g. transistor, field effect transistor, thyristor, etc.) is connected to the input voltage Vin, the source is connected to the reference ground VS (e.g. floating ground), and the gate is connected to the driving pin of the switching power controller 220 to receive the switching driving signal DRV, which is used to control the power transmission from the input to the output. The first end of the primary winding L1 is connected to the reference ground VS, and the second end is connected to the reference ground GND1. The anode of the diode D1 is connected to the first end of the secondary winding L2, and the cathode is connected to the output capacitor Co and the first end of the load Ro. The second end of the output capacitor Co is connected to the second end of the secondary winding L2 and the reference ground GND2.

[0058] The feedback circuit 230 is connected between the reference ground VS and the reference ground GND1, and is used to divide the output voltage Vout to obtain the feedback signal FB. In an example, the feedback circuit 230 includes resistors R1 and R2 connected in series between the reference ground VS and the reference ground GND1, and the middle node of the resistors R1 and R2 is used to provide the feedback signal FB.

[0059] The switching power controller 220 is connected to the gate of the power switch Q1, and is used to generate the switching driving signal DRV applied to the power switch Q1 according to the feedback signal FB of the output voltage Vout, so as to control the conduction and turn-off of the power switch Q1.

[0060] FIG. 3 shows a structural schematic diagram of a switching power controller according to an embodiment of the present application. As shown in FIG. 3, the switching power controller 220 includes a peak current sampling circuit 201, a switching control circuit 202, a power supply circuit 203, and a driving circuit 204.

[0061] The peak current sampling circuit 201 is connected to the drain of the power switch Q1, and is used to obtain a sampling signal CS representing the peak current information of the power conversion circuit 210 according to the drain-source voltage difference of the power switch Q1. Specifically, the peak current sampling circuit 201 samples the drain-source voltage difference of the power switch Q1 synchronously according to the conduction and turn-off actions of the power switch Q1, so as to obtain the sampling signal CS.

[0062] The switch control circuit 202 is used to generate a switch control signal PWM for controlling the switch action of the power switch Q1 according to the feedback signal FB and the sampling signal CS, so as to stabilize the output voltage Vout at a set value. In an exemplary embodiment, for a switch power supply controller in a constant off-time control (COT) mode, the switch control circuit 202 controls the turn-on time of the power switch Q1 according to a set clock signal, and controls the turn-off time of the power switch Q1 according to the feedback signal FB and the sampling signal CS.

[0063] The power supply circuit 203 is connected with the input voltage Vin, and is used to provide a normal working power supply voltage Vcc to the switch control circuit 202 according to the input voltage Vin. In addition, the switch power supply controller 220 further comprises an input capacitor Cin connected between the power supply end of the switch control circuit 202 and a reference ground VS.

[0064] The input end of the drive circuit 204 is connected with the output of the switch control circuit 202, and the output of the drive circuit 204 is connected with the gate of the power switch Q1. The drive circuit 204 is used to generate a switch drive signal DRV applied to the gate of the power switch Q1 according to the output signal PWM of the switch control circuit 202, so as to control the turn-on and turn-off of the power switch Q1.

[0065] FIG. 4 shows a structural schematic diagram of a peak current sampling circuit according to an embodiment of the present application. As shown in FIG. 4, the peak current sampling circuit 300 comprises a voltage sampling module 310 and a temperature compensation module 320.

[0066] The input end of the voltage sampling module 310 is connected with the drain of the power switch Q1, and is used to sample the drain-source voltage difference of the power switch Q1 synchronously according to the switch action of the power switch Q1, so as to obtain a first sampling signal CS1 with a positive temperature coefficient.

[0067] The temperature compensation module 320 is used to perform temperature compensation on the first sampling signal CS1 output by the voltage sampling module 310, so as to obtain a second sampling signal CS2 with a zero temperature coefficient, wherein the second sampling signal CS2 carries the peak current information of the switch power supply.

[0068] Therefore, the peak current sampling circuit 300 of the present application solves the problem that the turn-on resistance deviation of the power switch is increased due to the change of temperature in the prior art, and thus the sampling precision is greatly deviated, by using the temperature compensation module 320 to perform temperature compensation on the output of the voltage sampling module 310.

[0069] In an optional embodiment, the peak current sampling circuit 300 further comprises a dynamic acceleration module 330. The dynamic acceleration module 330 accelerates the conversion speed of the temperature compensation module 320 by providing a bias current to the transistor in the temperature compensation module 320, thereby avoiding the situation that the output signal of the temperature compensation module 320 is out of synchronization with the input signal.

[0070] FIG. 5 shows a circuit schematic diagram of the voltage sampling module in FIG. 4, and FIG. 6 shows a working timing diagram of the voltage sampling module in FIG. 5. As shown in FIG. 5, the voltage sampling module 310 comprises a transistor Q2, a transistor Q3, a transistor Q4, and a logic unit 311. The transistor Q2 and the transistor Q3 are connected in series between an input end of an input voltage Vin and an output end of a first sampling signal CS1, a first end of the transistor Q4 is connected with the output end of the first sampling signal CS1, a second end of the transistor Q4 is connected with a floating ground VS, and the logic unit 311 is configured to control the conduction or non-conduction of the transistor Q3 and the transistor Q4 according to a switch control signal PWM and / or a switch driving signal DRV.

[0071] The transistor Q2 is a high-voltage MOS tube in a "always-on state" and can be equivalent to a protection resistor, the transistor Q3 is a medium-voltage MOS tube, and the transistor Q4 is a low-voltage MOS tube. It should be noted that in the present embodiment, the MOS tubes are divided into high-voltage MOS tubes, medium-voltage MOS tubes, and low-voltage MOS tubes based on the rated value of the maximum drain-source voltage (Vds) of the MOS tubes. In an exemplary embodiment, the working voltage range of the low-voltage MOS tube is generally between 0V and 5V, the working voltage range of the medium-voltage MOS tube is between 0V and 30V, and the working voltage range of the high-voltage MOS tube is above 200V.

[0072] Further, the transistor Q2 in the present embodiment is a depletion-mode NMOS tube, for example, a JEFT tube (Junction Field-Effect Transistor), the transistor Q3 is an enhancement-mode NMOS tube, and the transistor Q4 is an enhancement-mode NMOS tube. The drain of the transistor Q2 is connected with the input voltage Vin, the source of the transistor Q2 is connected with the drain of the transistor Q3, the gate of the transistor Q2 is connected with the floating ground VS, the source of the transistor Q3 is connected with the output end of the first sampling signal CS1, the drain of the transistor Q4 is connected with the output end of the first sampling signal CS1, the source of the transistor Q4 is connected with the floating ground VS, and the gates of the transistor Q3 and the transistor Q4 are connected with the logic unit 311.

[0073] It should be noted that, since the switch driving signal DRV is obtained by amplifying the switch control signal PWM, the waveforms of the two are similar, and thus the logic unit 311 of the embodiment can also control the turn-on and turn-off of the transistor Q3 and the transistor Q4 according to the switch control signal PWM or the switch driving signal DRV. In a first exemplary implementation, the logic unit 311 controls the turn-on and turn-off of the transistor Q3 and the transistor Q4 according to the switch control signal PWM; in a second exemplary implementation, the logic unit 311 controls the turn-on and turn-off of the transistor Q3 and the transistor Q4 according to the switch driving signal DRV; and in a third exemplary implementation, the logic unit 311 controls the turn-on and turn-off of the transistor Q3 and the transistor Q4 according to both the switch control signal PWM and the switch driving signal DRV. In addition, when the logic unit 311 controls the turn-on and turn-off of the transistor Q3 and the transistor Q4 according to both the switch control signal PWM and the switch driving signal DRV, the turn-on time of the transistor Q3 and the turn-off time of the transistor Q4 are controlled according to the switch driving signal DRV, and the turn-off time of the transistor Q3 and the turn-on time of the transistor Q4 are controlled according to the switch control signal PWM.

[0074] The circuit structure of the logic unit 311 of the embodiment will be described below with reference to the third exemplary implementation. Specifically, the logic unit 311 includes a buffer G1, a NAND gate G2, and an inverter G3. The input end of the buffer G1 is configured to receive the switch driving signal DRV, the first input end of the NAND gate G2 is connected to the output end of the buffer G1, the second input end of the NAND gate G2 is configured to receive the switch control signal PWM, the output end of the NAND gate G2 is connected to the gate of the transistor Q4 and the input end of the inverter G3, and the output end of the inverter G3 is connected to the gate of the transistor Q3. As can be seen, the gates of the transistor Q3 and the transistor Q4 of the embodiment are applied with control signals that are mutually inverted, and thus the transistor Q3 and the transistor Q4 are non-overlappingly turned on in actual operation.

[0075] It should be noted that, for the first or second exemplary implementation described above, the input end of the buffer G1 and the second input end of the NAND gate G2 only need to receive the switch control signal PWM or the switch driving signal DRV at the same time.

[0076] Referring to FIG. 6, wherein the switch control signal PWM is a logic signal for controlling the on and off of the power switch tube, the switch drive signal DRV is the output signal of the driving circuit, Vin is the input voltage of the switching power supply, and CS1 is the output of the voltage sampling module 310. When the power switch tube Q1 is off, the switch control signal PWM is low, and the switch drive signal DRV is also low, the output of the NAND gate G2 is high, the transistor Q4 is turned on, the output of the inverter G3 is low, and the transistor Q3 is turned off, thereby realizing the signal isolation between the input voltage Vin and the first sampling signal CS1, and the first sampling signal CS1 is pulled down to the ground through the transistor Q4. When the power switch tube Q1 is on, the switch control signal PWM and the switch drive signal DRV are both high, and after a delay of a period of time through the buffer G1, the output of the NAND gate G2 is low, the transistor Q4 is turned off, and the output of the inverter G3 is high, the transistor Q3 is turned on, and thus the first sampling signal CS1 is pulled up to the level equal to the input voltage Vin.

[0077] FIG. 7 shows a circuit schematic of the temperature compensation module and the dynamic acceleration module in FIG. 4. As shown in FIG. 7, the temperature compensation module 320 of the present embodiment includes a voltage-to-current conversion unit 321, a current mirror unit 322, and a resistor R3. The voltage-to-current conversion unit 321 is configured to convert the first sampling signal CS1 in the form of voltage into a first current signal Iq1. The current mirror unit 322 includes a first current terminal and a second current terminal, and the first current terminal is connected to the voltage-to-current conversion unit 321 at a node A1. The current mirror unit 322 is configured to proportionally mirror the first current signal Iq1 into a second current signal Iq2 at the second current terminal. One end of the resistor R3 is connected to the second current terminal of the current mirror unit 322 at a node A2, and the other end of the resistor R3 is connected to the floating ground VS, which is configured to convert the second current signal Iq2 into a second sampling signal CS2 in the form of voltage.

[0078] Specifically, the current-to-voltage conversion unit 321 includes a current source I1, transistors T1 and T2, and a transistor Q7. Among them, the transistor T1 is a PNP tube (PNP type bipolar junction transistor), the transistor T2 is an NPN tube (NPN type bipolar junction transistor), and the transistor Q7 is an NMOS tube. The first end of the current source I1 is connected with the power supply voltage VDD, the second end of the current source I1 is connected with the emitter of the transistor T1 and the base of the transistor T2, the base of the transistor T1 is connected with the first sampling signal CS1, and the collector of the transistor T1 is connected with the floating ground VS. The collector of the transistor T2 is connected with the node A1, the emitter of the transistor T2 is connected with the drain of the transistor Q7, the gate of the transistor Q7 is connected with the power supply voltage VDD, and the source of the transistor Q7 is connected with the floating ground VS. Among them, the transistors T1 and T2 constitute a voltage follower circuit, the current source I1 provides a fixed bias current for the transistor T1, the emitter voltage of the transistor T2 is approximately equal to the voltage value of the first sampling signal CS1, the emitter of the transistor T2 is connected with the drain of the transistor Q7 to convert the voltage signal into a current signal Iq1, and the gate of the transistor Q7 is connected with the power supply voltage VDD and works in the deep linear region, whose impedance presents a positive temperature coefficient.

[0079] The current mirror unit 322 includes transistors Q5 and Q6, which are, for example, PMOS tubes. The sources of the transistors Q5 and Q6 are connected with the power supply voltage VDD, the drain of the transistor Q5 is connected with the node A1 as the first current end of the current mirror unit 322, the drain of the transistor Q6 is connected with the node A2 as the second current end of the current mirror unit 322, and the gates of the transistors Q5 and Q6 are connected with the drain of the transistor Q5. Among them, the mirror circuit composed of the transistors Q5 and Q6 proportionally mirrors the first current signal Iq1 into the second current signal Iq2, and then the second current signal Iq2 is converted into the second sampling signal CS2 in the form of voltage through the resistor R3. Assuming that the mirror ratio of the transistors Q5 and Q6 is K, then , and then can be obtained. Among them, R Q7 is the on-resistance of the transistor Q7. Since the first sampling signal CS1 is a positive temperature coefficient, the on-resistance of the transistor Q7 is a positive temperature coefficient, and the resistors R3 and the mirror ratio K are zero temperature coefficients, it can be obtained that the second sampling signal CS2 has a zero temperature coefficient independent of temperature.

[0080] The dynamic acceleration module 330 includes constant current sources I2 and I3 connected with the nodes A1 and A2 respectively, the current source I2 is connected between the node A1 and the floating ground, and the current source I3 is connected between the node A2 and the floating ground. The current sources I2 and I3 are used to provide bias for the transistors Q5 and Q6 in the current mirror unit 322, so that the transistors Q5 and Q6 are in the always-on state, and when the input of the temperature compensation module 320 changes, the gate potential of the transistors Q5 and Q6 can change rapidly, avoiding the consumption of additional time from the cutoff state to the on state, so that the output of the temperature compensation module 320 can be quickly established. Further, the current ratio of the current sources I2 and I3 is equal to the mirror ratio of the current mirror unit 322, that is , so as not to affect the sampling accuracy of the circuit.

[0081] Fig. 8 shows a structure schematic diagram of a switching power supply with an auxiliary winding of a flyback topology according to the second embodiment of the present application. Referring to Fig. 8, in the switching power supply of the second embodiment shown in Fig. 8, the switching power supply controller 220 and the peak current sampling circuit 300 of the above-mentioned embodiments are applied to the switching power supply with an auxiliary winding of a flyback topology, and the switching power supply 400 includes a power conversion circuit 410, a switching power supply controller 420 and a feedback circuit 430. Similarly, the power conversion circuit 410 is used to provide an output current Iout to a load Ro according to an input voltage Vin, and the switching power supply controller 420 is used to control the working state of the power conversion circuit 410.

[0082] The switching power supply 400 is basically the same as the switching power supply 200 of the first embodiment, and the difference is that in the switching power supply 400, the transformer T1 is located at the high side, the switching power supply controller 420 and the power switch Q1 are located at the low side, and the first end of the primary winding L1 is connected with the input voltage Vin, the second end of the primary winding L1 is connected with the DRAIN end of the switching power supply controller 420 and the drain of the power switch Q1, and the source of the power switch Q1 is connected with the reference ground VS. In addition, the transformer T1 of the present embodiment further includes an auxiliary winding L3, the first end of the auxiliary winding L3 is connected with the power supply end Vcc of the switching power supply controller 420 through the diode D2, and the second end of the auxiliary winding L3 is connected with the reference ground GND1, and the feedback circuit 430 is used to divide the voltage of the auxiliary winding L3 to obtain the feedback signal FB. In addition, the switching power supply controller 420 of the present embodiment is basically the same as the switching power supply controller 220 of the first embodiment, and will not be described here.

[0083] FIG. 9 shows a structure diagram of a switching power supply of a buck topology according to the third embodiment of the present application. Referring to FIG. 9, in the switching power supply of the second embodiment shown in FIG. 9, the switching power supply controller 220 and the peak current sampling circuit 300 of the above embodiments are applied to a switching power supply of a buck topology, and the switching power supply 500 includes a power conversion circuit 510, a switching power supply controller 520 and a feedback circuit 530. Similarly, the power conversion circuit 510 is configured to provide an output current Iout to a load Ro according to an input voltage Vin, and the switching power supply controller 520 is configured to control the working state of the power conversion circuit 510.

[0084] The switching power supply 500 is different from the switching power supply 200 of the first embodiment in that the power conversion circuit 510 includes a power switch Q1, an inductor L1, a freewheeling diode D1 and an output capacitor Co. The power switch Q1 (e.g. a transistor, a field effect transistor, a thyristor, etc.) has a drain connected to the input voltage Vin, a source connected to a reference ground VS (e.g. a floating ground), and a gate connected to a driving pin of the switching power supply controller 520 to receive a switching driving signal DRV, and is configured to control the power transmission from the input to the output according to the switching driving signal DRV. The inductor L1 has a first end connected to the reference ground VS, and a second end connected to the output capacitor Co and a first end of the load Ro. The diode D1 has a cathode connected to the reference ground VS and the first end of the inductor L1, and an anode connected to a second end of the load Ro and the output capacitor Co and the reference ground GND1. The feedback circuit 530 is connected between the two ends of the inductor L1, and is configured to divide the voltage of the inductor L1 to obtain the feedback signal FB. In addition, the switching power supply controller 520 of the present embodiment is basically the same as the switching power supply controller 220 of the first embodiment, and will not be described here.

[0085] It should be noted that although the above embodiments are described with respect to switching power supplies of buck topology and flyback topology, the present application is not limited thereto, and those skilled in the art can apply the peak current sampling circuit and the switching power supply controller of the present application to switching power supplies of floating Buck-Boost topology, floating Buck topology, Boost topology and flyback topology as needed.

[0086] In alternative embodiments, the peak current sampling circuit, the switching power supply controller and the switching power supply of the above embodiments can be applied to a power over Ethernet system to perform the functions of power conversion and regulation.

[0087] In summary, the peak current sampling circuit for the switching power supply directly samples the drain-source voltage difference of the power switch to obtain the peak current information of the switching power supply, compared with the prior art, without the need to set a sampling resistor in the switching power supply to achieve peak current control, which can not only reduce the power consumption of the circuit and reduce the heat generation, improve the overall efficiency of the power supply, reduce the circuit cost and improve the thermal management of the circuit, but also can avoid the influence of the precision and temperature coefficient of the sampling resistor on the accuracy of current measurement, and improve the sampling accuracy of the circuit.

[0088] In addition, since the temperature of the power switch in the switching power supply changes greatly, which in turn causes the on-resistance deviation of the power switch to increase, and the peak current sampling circuit of the present application compensates the output of the voltage sampling module by using a temperature compensation module, thereby solving the problem that the change of temperature in the prior art causes the on-resistance deviation of the power switch to increase, thereby causing a large deviation in sampling accuracy, and in turn reducing the circuit cost while ensuring the sampling accuracy of the circuit is not affected.

[0089] In addition, the peak current sampling circuit of the present application also uses a dynamic acceleration module to provide a bias current to the transistor in the temperature compensation module to improve the conversion speed of the temperature compensation module, thereby avoiding the situation that the output signal and the input signal of the temperature compensation module are out of sync.

[0090] It should be noted that in this paper, relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or device including the element.

[0091] According to the embodiments of the present application as described above, these embodiments do not exhaustively describe all the details, nor limit the application to only the specific embodiments described. Obviously, many modifications and variations can be made according to the above description. The present description selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can well utilize the present application and make modifications based on the present application. The present application is limited only by the claims and their full scope and equivalents.

Claims

1. A peak current sampling circuit, comprising: a voltage sampling module, an input terminal of the voltage sampling module being coupled with a first terminal of a power switch tube, a second terminal of the power switch tube being coupled with a first reference ground, the voltage sampling module sampling a voltage difference between the first terminal and the second terminal of the power switch tube during a conduction period of the power switch tube to obtain a first sampling signal; and a temperature compensation module, configured to perform temperature compensation on the first sampling signal to obtain a second sampling signal with zero temperature coefficient. The second sampling signal represents peak current information of the switching power supply.

2. The peak current sampling circuit of claim 1, wherein, The first sampling signal has a positive temperature coefficient.

3. The peak current sampling circuit of claim 1, wherein, The voltage sampling module comprises:

4. The peak current sampling circuit of claim 1, wherein, a first transistor and a second transistor connected in series between an input terminal of an input voltage and an output terminal of the first sampling signal, wherein the first transistor is in a constant-on state; a third transistor connected between the output terminal of the first sampling signal and a first reference ground; and a logic unit configured to control conduction and turn-off of the second transistor and the third transistor according to a switching control signal and / or a switching drive signal, wherein the second transistor and the third transistor are alternately turned on, and the second transistor is configured to be turned on when the power switch tube is turned on, and the third transistor is configured to be turned on when the power switch tube is turned off. When the logic unit controls the conduction and turn-off of the second transistor and the third transistor according to the switching control signal and the switching drive signal, 5. The peak current sampling circuit of claim 4, wherein, the logic unit controls a conduction time of the second transistor and a turn-off time of the third transistor according to the switching drive signal, and the voltage sampling module starts sampling the voltage difference between the first terminal and the second terminal of the power switch tube; the logic unit controls a turn-off time of the second transistor and a conduction time of the third transistor according to the switching control signal, and the voltage sampling module ends sampling the voltage difference between the first terminal and the second terminal of the power switch tube. The logic unit comprises:

6. The peak current sampling circuit of claim 5, wherein, a buffer, an input terminal of the buffer being configured to receive the switching drive signal; a NAND gate, a first input terminal of the NAND gate being connected with an output terminal of the buffer, a second input terminal of the NAND gate being configured to receive the switching control signal, and an output terminal of the NAND gate being connected with a control terminal of the third transistor; and an inverter, an input terminal of the inverter being connected with an output terminal of the NAND gate, and an output terminal of the inverter being connected with a control terminal of the second transistor. The temperature compensation module comprises:

7. The peak current sampling circuit of claim 1, wherein, a voltage-to-current conversion unit, configured to convert the first sampling signal in voltage form into a first current signal; a current mirror unit, the current mirror unit comprising a first current terminal and a second current terminal, the first current terminal being connected with the voltage-to-current conversion unit at a first node, and the current mirror unit being configured to mirror the first current signal into a second current signal; and a first resistor, the first resistor being connected with the second current terminal of the current mirror unit at a second node, and the first resistor being configured to convert the second current signal into the second sampling signal in voltage form. ​ 8. The peak current sampling circuit of claim 7, further comprising: a dynamic acceleration module connected to the first node and the second node, the dynamic acceleration module configured to keep transistors in the current mirror unit in a constant-on state to improve a conversion speed of the temperature compensation module.

9. The peak current sampling circuit of claim 7, wherein, The current-to-voltage conversion unit comprises: a first current source and a fourth transistor connected in series between a power supply voltage and a first reference ground, a control terminal of the fourth transistor connected to the first sampling signal; and a fifth transistor and a sixth transistor connected in series between the first node and the first reference ground, a control terminal of the fifth transistor connected to a third node between the first current source and the fourth transistor, a control terminal of the sixth transistor connected to the power supply voltage.

10. The peak current sampling circuit of claim 7, wherein, The current mirror unit comprises: a seventh transistor and an eighth transistor, first ends of the seventh transistor and the eighth transistor connected to a power supply voltage, control terminals of the seventh transistor and the eighth transistor connected to second ends of the seventh transistor, the second end of the seventh transistor connected to the first node as the first current end, the second end of the eighth transistor connected to the second node as the second current end.

11. The peak current sampling circuit of claim 8, wherein, The dynamic acceleration module comprises: a second current source connected between the first node and a first reference ground; and a third current source connected between the second node and the first reference ground, wherein a current ratio between the second current source and the third current source is equal to a mirror ratio of the current mirror unit.

12. The peak current sampling circuit of claim 4, wherein, The first transistor is a depletion-mode NMOS transistor, a control terminal of the first transistor connected to the first reference ground.

13. The peak current sampling circuit of claim 12, wherein, The first transistor is a high-voltage junction field-effect transistor.

14. The peak current sampling circuit of claim 4, wherein, The second transistor is an enhancement-mode NMOS transistor, and the third transistor is an enhancement-mode NMOS transistor.

15. A switching power supply controller for controlling a power conversion circuit for converting an input voltage to an output voltage, wherein, The switching power supply controller comprises: a switching control circuit configured to generate a switching control signal for controlling switching actions of a power switch tube; a driving circuit connected to a gate of the power switch tube, configured to generate a switching driving signal according to the switching control signal to drive the power switch tube to turn on or turn off; and a peak current sampling circuit comprising: a voltage sampling module, an input end of the voltage sampling module coupled to a drain of the power switch tube, a source of the power switch tube coupled to a first reference ground, the voltage sampling module configured to sample a drain-source voltage difference of the power switch tube during a conduction period of the power switch tube to obtain a first sampling signal; and a temperature compensation module configured to perform temperature compensation on the first sampling signal to obtain a second sampling signal with zero temperature coefficient.

16. The switching power supply controller of claim 15, wherein, The second sampling signal represents peak current information of the switching power supply.

17. The switching power supply controller of claim 15, wherein, The first sampling signal has a positive temperature coefficient.

18. The switching power supply controller of claim 15, wherein, The voltage sampling module comprises: a first transistor and a second transistor connected in series between an input end of an input voltage and an output end of the first sampling signal, wherein the first transistor is in a constant-on state; a third transistor connected between the output end of the first sampling signal and a first reference ground; and a logic unit, configured to control turning on and turning off of the second transistor and the third transistor according to a switch control signal and / or a switch driving signal, wherein the second transistor and the third transistor are turned on alternately, and the second transistor is configured to be turned on when the power switch tube is turned on, and the third transistor is configured to be turned on when the power switch tube is turned off.

19. The switching power supply controller of claim 18, wherein, when the logic unit controls turning on and turning off of the second transistor and the third transistor according to the switch control signal and the switch driving signal, the logic unit controls a turning-on time of the second transistor and a turning-off time of the third transistor according to the switch driving signal, and the voltage sampling module starts sampling a voltage difference between the first end and the second end of the power switch tube; the logic unit controls a turning-off time of the second transistor and a turning-on time of the third transistor according to the switch control signal, and the voltage sampling module stops sampling the voltage difference between the first end and the second end of the power switch tube.

20. The switching power supply controller of claim 19, wherein, the logic unit comprises: a buffer, an input end of the buffer being configured to receive the switch driving signal; a NAND gate, a first input end of the NAND gate being connected to an output end of the buffer, a second input end of the NAND gate being configured to receive the switch control signal, and an output end of the NAND gate being connected to a control end of the third transistor; and an inverter, an input end of the inverter being connected to the output end of the NAND gate, and an output end of the inverter being connected to a control end of the second transistor.

21. The switching power supply controller of claim 15, wherein, the temperature compensation module comprises: a voltage-to-current conversion unit, configured to convert the first sampling signal in a voltage form into a first current signal; a current mirror unit, the current mirror unit comprising a first current end and a second current end, the first current end being connected to a first node with the voltage-to-current conversion unit, and the current mirror unit being configured to mirror the first current signal into a second current signal; and a first resistor, the first resistor being connected to a second node with the second current end of the current mirror unit, and the first resistor being configured to convert the second current signal into the second sampling signal in a voltage form.

22. The switch power supply controller according to claim 21, the peak current sampling circuit further comprising: a dynamic acceleration module, connected to the first node and the second node, and configured to make a transistor in the current mirror unit in a constant-on state, so as to improve a conversion speed of the temperature compensation module.

23. The switching power supply controller of claim 21, wherein, the voltage-to-current conversion unit comprises: a first current source and a fourth transistor connected in series between a power supply voltage and a first reference ground, a control end of the fourth transistor being connected to the first sampling signal; and a fifth transistor and a sixth transistor connected in series between the first node and the first reference ground, a control end of the fifth transistor being connected to a third node between the first current source and the fourth transistor, and a control end of the sixth transistor being connected to the power supply voltage.

24. The switching power supply controller of claim 21, wherein, the current mirror unit comprises: a seventh transistor and an eighth transistor, a first end of the seventh transistor and the eighth transistor is connected with a power supply voltage, a control end of the seventh transistor and the eighth transistor is connected to a second end of the seventh transistor, the second end of the seventh transistor is connected with the first node as the first current end, the second end of the eighth transistor is connected with the second node as the second current end.

25. The switching power supply controller of claim 22, wherein, The dynamic acceleration module comprises: a second current source connected between the first node and a first reference ground; and a third current source connected between the second node and the first reference ground, wherein a current ratio between the second current source and the third current source is equal to a mirror ratio of the current mirror unit.

26. The switching power supply controller of claim 18, wherein, The first transistor is a depletion-mode NMOS transistor, and a control end of the first transistor is connected with the first reference ground.

27. The switching power supply controller of claim 26, wherein, The first transistor is a high-voltage junction field effect transistor.

28. The switching power supply controller of claim 18, wherein, The second transistor is an enhancement-mode NMOS transistor, and the third transistor is an enhancement-mode NMOS transistor.

29. The switching power supply controller of claim 15, further comprising: a power supply circuit configured to provide a power supply voltage to the switching control circuit based on the input voltage.

30. The switching power supply controller of claim 15, wherein, The power conversion circuit comprises a floating ground Buck-Boost topology, a floating ground Buck topology, a Boost topology, and a flyback topology.

31. A switching power supply, comprising: a power conversion circuit controlled by a power switch to control a transfer of electrical energy from an input of the power conversion circuit to an output of the power conversion circuit to generate an output voltage based on an input voltage; and the switching power supply controller of any one of claims 15 to 30. ​

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