Low-dropout voltage regulator, driving method, and electronic device

Abstract

The embodiment of the application discloses a low-dropout voltage stabilizing circuit, a driving method and electronic equipment, wherein the low-dropout voltage stabilizing circuit comprises: a first end of a buffer module is connected with an output end of an error amplification module; a second end of the buffer module is connected with a first end of an adjusting module, a third end of the buffer module is connected with a bias voltage, so as to provide a basic current for the operation of the adjusting module through the bias voltage; a second end of the adjusting module is connected with an external load; the error amplification module is used for generating a first output voltage based on a preset reference voltage and a feedback voltage provided by the adjusting module; the buffer module is used for determining a second output voltage based on the first output voltage; the adjusting module is used for generating the feedback voltage based on the current change of the external load; and the target current for outputting to the external load is determined based on the second output voltage.

Description

Technical Field

[0001] This application relates to, but is not limited to, the field of electronic design automation, and particularly to a low dropout voltage regulator circuit, a driving method, and an electronic device. Background Technology

[0002] In low-dropout (LDO) voltage regulator circuits of related technologies, a constant current source is used to provide voltage to the regulating transistor to adjust the transistor's output current. Thus, even when no current is supplied to the mobile device, the current consumption in the LDO circuit remains constant. This results in continuous current consumption even when the mobile device is not in use, shortening the device's operating time and making it unsuitable for mobile devices requiring low power consumption. Summary of the Invention

[0003] In view of this, embodiments of this application provide at least one low-dropout voltage regulator circuit, driving method, and electronic device.

[0004] In a first aspect, embodiments of this application provide a low-dropout voltage regulator circuit, the low-dropout voltage regulator circuit comprising: an error amplification module, a buffer module, and an adjustment module; a first terminal of the buffer module is connected to the output terminal of the error amplification module; a second terminal of the buffer module is connected to the first terminal of the adjustment module; a third terminal of the buffer module is connected to a bias voltage to provide the basic operating current of the adjustment module; and the second terminal of the adjustment module is connected to an external load.

[0005] The error amplification module is used to generate a first output voltage based on a preset reference voltage and the feedback voltage provided by the adjustment module;

[0006] The buffer module is used to determine the second output voltage based on the first output voltage;

[0007] The adjustment module is configured to generate the feedback voltage based on the current change of the external load; and to determine the target current for output to the external load based on the second output voltage.

[0008] Secondly, embodiments of this application provide a driving method for a low-dropout voltage regulator circuit, the method comprising:

[0009] The buffer module in the low dropout voltage regulator circuit provides the basic operating current to the adjustment module in the low dropout voltage regulator circuit based on the input bias voltage.

[0010] The adjustment module generates a feedback voltage based on the current change of the external load.

[0011] The error amplification module in the low dropout voltage regulator circuit generates a first output voltage based on a preset reference voltage and the feedback voltage.

[0012] The buffer module in the low-dropout voltage regulator circuit determines the second output voltage based on the first output voltage;

[0013] The adjustment module in the low-dropout voltage regulator circuit generates a target current for output to the external load based on the second output voltage.

[0014] Thirdly, embodiments of this application provide an electronic device, the electronic device comprising: an external load and the aforementioned low-dropout voltage regulator circuit; the external load is connected to the output terminal of the low-dropout voltage regulator circuit;

[0015] The external load is used to feed back current changes to the low-dropout voltage regulator circuit;

[0016] The low-dropout voltage regulator circuit is used to provide a target current to the external load that satisfies the current change based on the current change of the external load.

[0017] This application provides a computer program including computer-readable code. When the computer-readable code is run in a computer device, the processor in the computer device executes some or all of the steps in the above-described method.

[0018] This application provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, it implements some or all of the steps in the above method.

[0019] This application provides a low-dropout voltage regulator circuit. In this circuit, by connecting the first terminal of a buffer module to the output terminal of an error amplifier module, the voltage output by the error amplifier module can be provided to the buffer module. The second terminal of the buffer module is connected to the first terminal of an adjustment module; the second terminal of the adjustment module is connected to an external load. The adjustment module generates a feedback voltage based on the current change of the external load, thus enabling it to promptly sense the current change of the external load and provide timely feedback to the error amplifier module. This feedback voltage is fed back to the error amplifier module, causing it to generate a first output voltage based on a preset reference voltage and the feedback voltage. This first output voltage serves as the input to the buffer module, adjusting the output voltage of the entire buffer module and consequently its output current, allowing the buffer module's output current to change with the current required by the external load. Based on the first output voltage, the buffer module determines a second output voltage and provides it to the adjustment module, enabling the adjustment module to determine the target current for output to the external load based on the second output voltage. In this low-dropout voltage regulator circuit, a bias voltage is connected to the third terminal of the buffer module to provide the basic current for the adjustment module to operate. In this way, when the external load is in a low-power state, the current consumed in the low-dropout voltage regulator circuit is very small. Moreover, by sensing the current change of the external load through the adjustment module, the first output voltage of the error amplification module can change with the current change of the external load. Thus, the buffer module can adjust the target current of the adjustment module according to the current required by the external load, so that the target current meets and is suitable for the low-power external load.

[0020] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of this disclosure. Attached Figure Description

[0021] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with this application and, together with the specification, serve to explain the technical solutions of this application.

[0022] Figure 1 A schematic diagram of the composition structure of the low dropout voltage regulator circuit provided in the embodiments of this application;

[0023] Figure 2A This is a schematic diagram of another component structure of the low dropout voltage regulator circuit provided in the embodiments of this application;

[0024] Figure 2B This is another schematic diagram of the low dropout voltage regulator circuit provided in the embodiments of this application;

[0025] Figure 2C This is a schematic diagram of another component structure of the low dropout voltage regulator circuit provided in the embodiments of this application;

[0026] Figure 2D This is a schematic diagram of another component structure of the low dropout voltage regulator circuit provided in the embodiments of this application;

[0027] Figure 3A This is a schematic diagram of the composition and structure of an LDO circuit in related technologies;

[0028] Figure 3B This is a schematic diagram of another component structure of the LDO circuit in related technologies;

[0029] Figure 3C This is a simulation diagram of the current consumption of an LDO circuit in a related technology.

[0030] Figure 4 A schematic diagram of the composition structure of an LDO provided in an embodiment of this application;

[0031] Figure 5 This is a simulation diagram of the current consumption of an LDO provided in an embodiment of this application;

[0032] Figure 6 A schematic diagram illustrating the implementation process of a driving method for a low-dropout voltage regulator circuit provided in an embodiment of this application;

[0033] Figure 7 This is a schematic diagram of the composition structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application are further described in detail below with reference to the accompanying drawings and embodiments. The described embodiments should not be regarded as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0035] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0036] The terms “first / second / third” are used merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that “first / second / third” may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used herein is for descriptive purposes only and is not intended to limit the scope of this application.

[0038] Before providing a further detailed description of the embodiments of this application, the nouns and terms involved in the embodiments of this application will be explained, and the nouns and terms involved in the embodiments of this application shall be interpreted as follows.

[0039] 1) Low Drop-Out (LDO) linear regulators use transistors or field-effect transistors (FETs) operating in their linear region to subtract excess voltage from the applied input voltage, producing a regulated output voltage. The drop-out voltage refers to the minimum difference between the input and output voltage required for the regulator to maintain the output voltage within 100 millivolts (mV) of its rated value.

[0040] 2) A DC-DC converter is a voltage converter that transforms the input voltage and effectively outputs a fixed voltage. DC / DC converters are divided into three categories: boost DC / DC converters, buck DC / DC converters, and buck-boost DC / DC converters. These three types of control can be used depending on the requirements.

[0041] The low-dropout voltage regulator circuit provided in this application embodiment uses a bias voltage connected to the third terminal of the buffer module to provide the basic current for the adjustment module. Thus, when the external load is in a low-power state, the current consumed by the low-dropout voltage regulator circuit is very small. Furthermore, by sensing changes in the current of the external load through the adjustment module, the first output voltage of the error amplification module can change accordingly. This allows the buffer module to adjust the target current of the adjustment module according to the current demand of the external load, ensuring that the target current meets and is suitable for the low-power external load. The low-dropout voltage regulator circuit provided in this application embodiment can be used in the power supply of electronic devices, such as laptops, tablets, desktop computers, and mobile phones.

[0042] Figure 1 This is a schematic diagram of the composition structure of the low dropout voltage regulator circuit provided in the embodiments of this application, combined with... Figure 1The following description is provided: The low dropout voltage regulator circuit includes: an error amplification module 101, a buffer module 102, and an adjustment module 103; the first end of the buffer module 102 is connected to the output end of the error amplification module 101; the second end of the buffer module 102 is connected to the first end of the adjustment module 103; and the second end of the adjustment module 103 is connected to an external load 104.

[0043] The error amplification module 101 is used to generate a first output voltage based on a preset reference voltage and a feedback voltage 105 provided by the adjustment module 103.

[0044] Here, the error amplification module includes two input terminals. The first input terminal is used to connect the feedback voltage from the adjustment module, and the second input terminal is used to connect a preset reference voltage. The error amplification module amplifies the difference between the input feedback voltage and the preset reference voltage to obtain the first output voltage, which is then supplied to the buffer module through its output terminal. This error amplification module has the characteristic that its output voltage increases as the current of the external load increases. Thus, the first output voltage is the input voltage provided by the error amplification module to the buffer module, enabling the buffer module to adjust its own output voltage based on the first output voltage.

[0045] In some possible implementations, the preset reference voltage can be generated by an external reference circuit connected to a low-dropout regulator circuit, and the preset reference voltage is stable during the operation of this low-dropout regulator circuit. The error amplification module can be implemented using an error amplifier and a mirror circuit, in which the error amplifier circuit and the mirror circuit are connected by using the mirror circuit as the load of the error amplifier. For example... Figure 4 As shown, the error amplifier can be implemented using transistors MP3 and MP4, and the mirror circuit can be implemented using transistors MN1 and MN2. The port connecting the error amplifier and the mirror circuit is used as the output terminal of the error amplification module, which is connected to the first terminal of the buffer module. This allows the first output voltage from the error amplification module to be provided to the buffer module. Since the feedback voltage connected to the error amplification module is adjusted by sensing changes in the current of the external load, the first output voltage of the error amplification module can change with the current of the external load.

[0046] The buffer module 102 is used to determine the second output voltage based on the first output voltage.

[0047] Here, a bias voltage 106 is connected to the third terminal of the buffer module to provide the basic current for the adjustment module to operate. This basic current is the current required for the adjustment module to transition from the off state to the on state; that is, it is the minimum current required for the adjustment module to conduct. Thus, by connecting the bias voltage to the third terminal of the buffer module, the basic current required for the adjustment module to operate can be provided. Since this basic current only needs to support the basic operation of the adjustment module, it is a very small current. Therefore, when the external load is in a low-power state (e.g., when no external load is used), the buffer in the low-dropout regulator circuit consumes only a very small basic current, thereby saving power.

[0048] In some possible implementations, after the error amplification module provides the first output voltage to the buffer module, the buffer module can adjust the gate voltage of another mirror circuit using the first output voltage, thereby changing the mirror current of the output. This mirror current is then used to determine the second output voltage provided by the buffer module to the adjustment module. This other mirror circuit can be... Figure 4 The transistors MP5 and MP6 shown are implemented as follows. Since the first output voltage changes with the current of the external load, the second output voltage obtained in the buffer module through the first output voltage can change with the current of the external system. Therefore, the output current of the adjustment module can be adjusted through the second output voltage so that the output current of the adjustment module meets the requirements of the external load.

[0049] The adjustment module 103 is configured to generate the feedback voltage based on the current change of the external load; and to determine the target current for output to the external load based on the second output voltage.

[0050] Here, the external load can be an electronic device, chip, or circuit module connected to the low-dropout regulator circuit. Since the second terminal of the adjustment module is connected to the external load, the adjustment module can sense changes in the external load's current. This current change can characterize the change in the current required by the external load relative to the current required at the previous moment, or it can be the actual current value required by the external load, or a characterized value representing the current required by the external load. When the current required by the external load changes, the voltage at the output terminal of the adjustment module also changes, and consequently, the feedback voltage of the adjustment module changes accordingly. Thus, due to the change in the feedback voltage, the first output voltage of the error amplification module also changes, causing the second output voltage of the buffer module to change accordingly. Since this second output voltage is provided to the adjustment module, the target current determined by the adjustment module through this second output voltage also changes accordingly. In this way, by sensing the current change of the external load, the adjustment module can ensure that the target current ultimately provided to the external load meets the current change of the external load.

[0051] In some possible implementations, the adjustment module can be implemented using an adjustment transistor and a voltage divider resistor that senses current changes. The voltage divider resistor can generate a feedback voltage by sensing changes in the current of the external load and feed it back to the error amplification module. In the buffer module, the output current of the adjustment transistor is adjusted by a second output voltage, so that the output current of the adjustment transistor can change with the current changes of the external load, thereby ensuring that the final output target current matches the current required by the external load.

[0052] In the low-dropout voltage regulator circuit provided in this application embodiment, by connecting the first terminal of the buffer module to the output terminal of the error amplifier module, the voltage output by the error amplifier module can be provided to the buffer module. By adjusting the module based on the current change of the external load, a feedback voltage is generated. Thus, the adjustment module can promptly sense the current change of the external load and provide timely feedback to the error amplifier module. Using the first output voltage of the error amplifier module as the input of the buffer module, the output current of the entire buffer module is adjusted, so that the output current of the buffer module can change with the current required by the external load. Because the output current of the buffer module changes, the output voltage of the buffer module changes, thereby adjusting the output current of the adjustment module through the changing output voltage. In this low-dropout voltage regulator circuit, a bias voltage is connected to the third terminal of the buffer module to provide the basic current for the operation of the adjustment module. Thus, when the external load is in a low-power state, the current consumed in this low-dropout voltage regulator circuit is very small; and by sensing the current change of the external load through the adjustment module, the first output voltage of the error amplifier module can change with the current change of the external load, thereby the adjustment module can provide the target current required by the low-power external load, saving current consumption.

[0053] In some embodiments, the adjustment module 103 can be implemented through an adjustment submodule and a voltage divider submodule, such as... Figure 2A As shown,

[0054] The first end of the adjustment submodule 201 is connected to the second end of the buffer module 102, the second end of the adjustment submodule 201 is connected to the first end of the voltage divider submodule 202, and the third end of the adjustment submodule 201 is connected to the power supply voltage; the second end of the voltage divider submodule 202 is connected to the first end of the error amplification module 101, and the third end of the voltage divider submodule 202 is grounded.

[0055] Here, the first terminal of the adjustment submodule serves as the first terminal of the adjustment module, connecting to the second output voltage from the buffer module. The second terminal of the adjustment submodule serves as the second terminal of the adjustment module, connecting to an external load. Furthermore, the second terminal of the adjustment submodule is internally connected to the first terminal of the voltage divider submodule, enabling the voltage divider submodule to sense the voltage output from the adjustment submodule to the external load and promptly provide feedback to the error amplification module.

[0056] The adjustment submodule 201 is used to generate the target current based on the second output voltage and transmit it to the external load;

[0057] Here, after the buffer module provides the second output voltage to the adjustment submodule, the adjustment submodule uses this second output voltage as the gate voltage to change the output current of the adjustment submodule. This output current is the target current, and the target current is provided to the external load. The second terminal of the adjustment submodule 201 is connected to the first terminal of the voltage divider submodule and the circuit output terminal to connect to the external load. Thus, the target current is output to the external load through the second terminal of the adjustment submodule 201 to meet the current requirements of the external load.

[0058] In some possible implementations, the adjustment submodule can be implemented using a P-type transistor, with its gate serving as the first terminal of the adjustment submodule, thus making the second output voltage the gate voltage of the transistor. The drain of this transistor serves as the second terminal of the adjustment submodule, i.e., the output terminal, to output the target current to an external load. The source of this transistor serves as the third terminal of the adjustment submodule, connected to the power supply voltage.

[0059] The voltage divider submodule 202 is used to divide the voltage corresponding to the current change of the external load to obtain the feedback voltage, and then feed it back to the error amplification module.

[0060] Here, the voltage divider submodule can be implemented using voltage divider resistors. For example, resistors RF1 and RF2 can be connected in series as the voltage divider submodule. The first terminal of resistor RF1 is connected to the drain of the transistor serving as the adjustment submodule to sense changes in the current of the external load in a timely manner. The second terminal of resistor RF1 is connected to the first terminal of resistor RF2, and the voltage at this connection point is fed back to the error amplifier as feedback. The second terminal of resistor RF2 is grounded. Thus, when the external load requires an increased current, the voltage at the output terminal connected to the external load decreases, so the feedback voltage generated by resistors RF1 and RF2 decreases and is fed back to the error amplifier module. The first output voltage of the error amplifier module increases, and controls the second output voltage of the buffer module to decrease as the current of the external load increases, i.e., the gate voltage of the transistor serving as the adjustment submodule decreases. In some possible implementations, when the first output voltage of the error amplifier module increases, the output current of the buffer module increases as the current of the external load increases, thereby causing the second output voltage of the buffer module to decrease as the current of the external load increases. Figure 4 As shown, the first output voltage of the error amplification module is the output voltage of output node AO, and the output current of the buffer module is the output current of output node BO. That is, the voltage of node BO decreases as the current of the external load increases. In this way, the gate-source voltage difference of the transistor increases, thereby increasing the target current output by the transistor, and thus providing the large current required by the external load.

[0061] In this embodiment, the voltage divider submodule senses the voltage corresponding to the current change of the external load and acts as a voltage divider, feeding the resulting feedback voltage back to the error amplifier in a timely manner. This ensures that the second output voltage provided by the buffer module changes with the current change of the external load. By adjusting the target current output according to the second output voltage provided by the buffer module, the target current can be matched to the requirements of the external load.

[0062] In some embodiments, the buffer module 102 can be implemented using a first power supply submodule and a current adjustment submodule, such as... Figure 2B As shown, the first terminal of the first power supply submodule 211 is connected to the bias voltage, the second terminal of the first power supply submodule is connected to the power supply voltage, the third terminal of the first power supply submodule is connected to the second terminal of the current adjustment submodule 212 and the first terminal of the adjustment module 103, the first terminal of the current adjustment submodule 212 is connected to the output terminal of the error amplification module 101, the third terminal of the current adjustment submodule 212 is connected to the power supply voltage, and the fourth terminal of the current adjustment submodule 212 is grounded.

[0063] Here, the first terminal of the first power supply submodule serves as the third terminal of the buffer module, connecting to a bias voltage, thereby providing the basic operating current for the adjustment module through this bias voltage. For example... Figure 4 As shown, taking the adjustment module including transistor MP7 as an example, the first terminal of the first power supply submodule serves as the third terminal of the buffer module to connect to the bias voltage, thereby providing the basic operating current for MP7 through the bias voltage. The basic operating current of transistor MP7 is the minimum current required for transistor MP7 to conduct.

[0064] The third terminal of the first power supply submodule is connected to the second terminal of the current adjustment submodule. This connection node serves as the output node of the buffer module and is also connected to the first terminal of the adjustment module to output a second output voltage to the adjustment module. The first terminal of the current adjustment submodule serves as the first terminal of the buffer module, and is connected to the first output voltage provided by the output terminal of the error amplification module.

[0065] The first power supply submodule 211 is used to generate the basic current that can support the operation of the adjustment module based on the bias voltage.

[0066] Here, the bias voltage can be a preset fixed voltage or a voltage provided by an external reference circuit. This bias voltage is used as the input voltage of the first power supply submodule, enabling it to generate a basic current according to this bias voltage. Since the function of the first power supply submodule is to provide the current required for the adjustment module to operate normally, and the current required for the adjustment module to operate normally is very small, the first power supply submodule only needs to output a very small basic current. Thus, even when the current required by the external load remains unchanged or is unused, the first power supply submodule in the buffer module consumes only a small basic current, thereby saving power consumption.

[0067] In some possible implementations, the first power supply submodule can be implemented using a first transistor, which can be a P-type transistor, for example, Figure 4 The first transistor, MP2, has its gate connected to the bias voltage, its source connected to the power supply voltage, and its drain connected to the second terminal of the current adjustment submodule. Based on the bias voltage, the first transistor generates a minimum current sufficient to support the operation of the adjustment module, and this minimum current is used as the base current. Thus, by providing the adjustment submodule with the minimum current for normal operation through the first transistor, the power consumption of the low-dropout voltage regulator circuit can be reduced.

[0068] The current adjustment submodule 212 is used to adjust the output voltage of the second terminal of the current adjustment submodule based on the first output voltage to obtain the second output voltage.

[0069] Here, the second terminal of the current adjustment submodule serves as the output terminal of the buffer module, connected to the first terminal of the adjustment module, and provides a second output voltage to the adjustment module. After the first output voltage is provided to the current adjustment submodule, the first output voltage adjusts the output current within the current adjustment submodule, allowing the output current to change with the current of the external load; as the output current in the current adjustment submodule changes, the output voltage of the adjustment submodule changes, thus obtaining the second output voltage provided to the adjustment module. Figure 4As shown, the current can be the current flowing through the entire branch containing transistors MN4 and MP6, for example, the sum of the currents generated by transistors MN4 and MP6. For instance, the first output voltage causes the adjustment current to increase as the external load current increases and decrease as the external load current decreases. Based on this output current, a second output voltage is generated at the second terminal of the current adjustment submodule to supply power to the adjustment submodule within the adjustment module. Thus, in the buffer module, a bias voltage is connected to the first terminal of the first power supply submodule to provide the minimum current required for normal operation of the adjustment module. Therefore, even when the external load is in a low-power state, the first power supply submodule will not consume excessive power, saving power. Since the first output voltage increases as the external load current increases, the adjustment current output by the current adjustment submodule, controlled by this first output voltage, increases as the external load current increases. This allows the target current supplied to the external load through the adjustment module to be adjusted by a determined second output voltage. Furthermore, when the external load does not require a large current, the first output voltage will not increase, preventing the current adjustment submodule from outputting a large adjustment current, thereby saving power.

[0070] In some embodiments, the current adjustment submodule 212 can be implemented using a current adjustment unit and a mirror unit, such as... Figure 2C As shown, the first end of the current adjustment unit 231 is connected to the output end of the error amplification module 101, the second end of the current adjustment unit 231 is connected to the first end of the mirror unit 232, and the third end of the current adjustment unit 231 is connected to the second end of the mirror unit 232 and the first end of the adjustment module 103, respectively.

[0071] Here, the first terminal of the current adjustment unit 231 serves as the first terminal of the current adjustment submodule and is connected to the output terminal of the error amplification module to receive the first output voltage. The second terminal of the current adjustment unit 231 is connected to the first terminal of the mirror unit 232 to provide voltage to the mirror unit. The third terminal of the current adjustment unit 231 is connected to the second terminal of the mirror unit 232, and this connection node serves as the second terminal of the current adjustment submodule to provide a second output voltage to the adjustment module.

[0072] The current adjustment unit is used to adjust the mirror current generated by the mirror unit based on the first output voltage, so that the mirror unit outputs a first output current, and to determine the second output voltage based on the first output voltage and the first output current.

[0073] Here, the mirror unit can be implemented through a mirror circuit, capable of outputting a first output current of a corresponding magnitude according to the voltage provided by the current adjustment module. Since the first output voltage can increase with the increase of the current required by the external load, and the current adjustment unit provides the voltage to the mirror unit based on the first output voltage, the first output current can also increase with the increase of the current required by the external load.

[0074] In some possible implementations, the error amplification module provides a first output voltage to the current adjustment unit. When the current required by the external load changes, the current adjustment unit can adjust the magnitude of the mirror current generated by the mirror unit according to the change in the external load current using this first output voltage. In this way, the first output current output by the mirror unit can change with the change in the external load current, thereby providing a second output voltage to the adjustment module, enabling the adjustment module to output a target current matching the external load.

[0075] In some possible implementations, the current adjustment unit 231 can be implemented using a second transistor and a third transistor, wherein the second transistor can be as follows: Figure 4 The transistor MN3 shown can be a third transistor as follows: Figure 4 The transistor MN4 is shown. The gate of the second transistor is connected to the output terminal of the error amplification module, the drain is connected to the first terminal of the mirror unit, and the source is grounded.

[0076] The gate of the third transistor is connected to the output terminal of the error amplification module, the drain is connected to the second terminal of the mirror unit and the first terminal of the adjustment module, and the source is grounded.

[0077] The second transistor is used to generate the third output voltage based on the first output voltage.

[0078] Here, the gate of the second transistor serves as the first terminal of the current adjustment unit, and the drain of the second transistor serves as the second terminal of the current adjustment unit. Thus, the first output voltage is applied through the gate of the second transistor, and the voltage at its drain is used as the third output voltage, which is then supplied to the mirror unit.

[0079] The mirror unit is used to generate the first output current based on the third output voltage.

[0080] Here, if the mirror unit is a mirror circuit implemented using two transistors, the third output voltage can be provided to the gates of these two transistors, so that the first output current of the mirror unit varies with the change of the third output voltage. In this way, the first output current of the mirror unit can vary with the change in the current required by the external load.

[0081] The third transistor is used to generate a second output current based on the first output voltage; and to obtain the second output voltage based on the first output current and the second output current.

[0082] Here, the second output voltage is determined by the sum of the first and second output currents. The gate of the third transistor is connected to the first output voltage, and the source of the third transistor is grounded. Therefore, the third transistor generates current based on the gate-source voltage difference, which is the second output current. Since the drain of this third transistor is connected to the first terminal of the adjustment module, in order for the transistor in the adjustment module to generate the target current required by the external load, the power supply voltage is divided according to the first and second output currents to generate the second output voltage supplied to the gate of the transistor in the adjustment module. In a specific example, if the current required by the external load increases, the feedback voltage in the adjustment module decreases, and since the output voltage of the error amplifier module can increase with the increase of the external current, the first output voltage increases. Thus, the gate voltage supplied to the second transistor increases, thereby decreasing the third output voltage supplied by the second transistor to the mirror unit. That is, the gate voltage of the transistor in the mirror unit decreases, the gate-source voltage difference increases, and therefore the first output current output by the mirror unit increases. As the gate voltage supplied to the third transistor increases, the output current of the third transistor also increases. To ensure that the transistors in the adjustment module can generate a large current sufficient for the external load, the sum of the first output current generated by the mirror unit and the second output current generated by the third transistor flows rapidly through the third transistor. This pulls down the voltage at the output node between the drain of the mirror unit and the third transistor, thus lowering the second output voltage. This results in a smaller second output voltage being supplied to the transistors in the adjustment module, increasing the gate-source voltage difference and enabling the output of a large current required by the external load. Therefore, the second output voltage is influenced by both the third transistor and the mirror unit. Figure 4 As shown, if the current required by the external load increases, the output current of transistor MP6 becomes the first output current, and the output current of transistor MN4 becomes the second output current. Both the first and second output currents are large currents. The sum of the first and second output currents is a large current flowing through transistor MN4. Because of this large current flowing through transistor MN4, the instantaneous voltage of node BO is lowered, and the potential of node BO decreases, thus lowering the input voltage of the adjustment module and obtaining the second output voltage. This provides a smaller second output voltage to transistor MP7, which acts as the adjustment module, thereby increasing the gate-source voltage difference of transistor MP7 and outputting a larger current to meet the needs of the external load.

[0083] like Figure 4As shown, if the current required by the external load decreases, the currents left by transistors MP6 and MN4 are both smaller; that is, a smaller current flows through transistors MP6 and MN4, raising the current at node BO, i.e., the potential of node BO increases, raising the input voltage of the adjustment module, resulting in a larger second output voltage; thus, a larger second output voltage is provided to transistor MP7, which acts as the adjustment module, thereby reducing the gate-source voltage difference of transistor MP7, and thus outputting a smaller current to meet the needs of the external load.

[0084] In this embodiment, a current adjustment unit is implemented using a second transistor and a third transistor. The first output voltage is used as the gate voltage of the second and third transistors to adjust the magnitude of the current output by the mirror unit. This allows the current output by the mirror unit to increase as the external current increases and decrease as the external current decreases, thus meeting the low power consumption requirements of the external load.

[0085] In some possible implementations, the mirror unit can be implemented using two transistors, for example, a fourth transistor and a fifth transistor. The gate and drain of the fourth transistor and the gate of the fifth transistor are respectively connected to the drain of the second transistor in the current adjustment unit. The sources of the fourth and fifth transistors are respectively connected to the power supply voltage. The drain of the fifth transistor is connected to the drain of the third transistor in the current adjustment unit and the first terminal of the adjustment module. The fourth and fifth transistors form a mirror circuit, and the output current of the fourth transistor and the output current of the fifth transistor satisfy a preset ratio. For example, the output current of the fifth transistor is greater than the output current of the fourth transistor and satisfies the preset ratio, which can be set during the transistor's process design. In this way, the second transistor in the current adjustment unit provides a gate voltage to the gates of the fourth and fifth transistors through a first output voltage, which can map the change in the first output voltage caused by the current of the external load into the output current of the fifth transistor, enabling the fifth transistor to output a larger current, i.e., the first output current. In this way, the first output current output through the fifth transistor can increase with the increase of the current required by the external load, thereby enabling the generated second output voltage to adjust the adjustment module to provide a suitable target current to the external load. Moreover, when the external load is operating in a low-power state, the first output voltage of the error amplifier module is smaller, resulting in smaller mirror currents output by the fourth and fifth transistors, less power consumption, and thus power saving.

[0086] In some embodiments, the error amplification module 101 can be implemented using a second power supply submodule and an amplification submodule, such as... Figure 2DAs shown, the first terminal of the amplification submodule 241 is connected to the feedback voltage, the second terminal of the amplification submodule 241 is connected to the reference voltage 243, and the third terminal of the amplification submodule 241 is connected to the third terminal of the second power supply submodule 242; the first terminal of the second power supply submodule 242 is connected to the bias voltage 244, and the second terminal of the second power supply submodule 242 is connected to the power supply voltage.

[0087] The second power supply submodule 242 is used to generate a third output current for the operation of the amplification submodule based on the bias voltage and the power supply voltage.

[0088] Here, the second power supply submodule can be implemented using transistors, for example... Figure 4 The transistor MP1 is used in this circuit. The gate of this transistor is connected to the bias voltage, the source is connected to the power supply voltage, and the drain is connected to the amplification submodule. In this way, the gate-source voltage difference is formed by the bias voltage and the power supply voltage to generate current, namely the third output current.

[0089] The amplification submodule 241 is used to amplify the difference between the feedback voltage and the reference voltage based on the third output current to obtain the first output voltage.

[0090] Here, the amplification submodule enters the working state through the third output current and amplifies the difference between the input feedback voltage and the reference voltage to provide a first output voltage to the second transistor in the current adjustment unit, thereby adjusting the second output voltage output by the buffer module. This amplification submodule can be achieved through... Figure 5 The circuit formed by the transistors MP3, MP4, MN1, and MN2 shown is implemented.

[0091] In this embodiment, a third output current is provided to the amplification submodule by a second power supply submodule connected to a bias voltage. This saves circuit losses compared to using a constant current source to provide the third output current to the amplification submodule. Furthermore, by connecting the amplification submodule to a feedback voltage, a first output voltage that increases with the increase of the current required by the external load can be provided to the buffer module. This adjusts the second output voltage provided by the buffer module to the adjustment module, thereby enabling the adjustment module to provide the required target current to the external load.

[0092] The following describes the application of the low dropout voltage regulator circuit provided in the embodiments of this application in a real-world scenario, taking a low dropout LDO circuit that is adjustable according to the load conditions as an example.

[0093] In related technologies, an LDO circuit consists of an error amplifier, a buffer, and a transfer transistor. The error amplifier amplifies the output voltage by comparing the difference between a reference voltage and the desired system voltage. The buffer drives the transfer transistor. Therefore, most of the current consumption in an LDO is used in the buffer. Finally, the transistor provides the current required by the system. Figure 3A and Figure 3B As shown, I1 and I2 are current sources that support the operation of the error amplifier and buffer. These current sources use a constant current regardless of the load current required by the system. Figure 3A This is a schematic diagram of the composition and structure of an LDO circuit in related technologies, such as... Figure 3A As shown, the LDO circuit includes an error amplifier, a buffer, and a transfer transistor. The error amplifier includes: a power supply voltage terminal VDD, a current source I1, a feedback voltage VBF, a reference voltage VREF, P-type transistors MP1 and MP2, and N-type transistors MN1 and MN2. P-type transistors MP1 and MP2 amplify the voltage difference of the input voltage. The gate of P-type transistor MP1 is connected to the system's feedback voltage VFB, and the gate of P-type transistor MP2 is connected to the system's desired reference voltage VFB. The current source I1 provides the necessary current to P-type transistors MP1 and MP2 to start them, enabling them to amplify the voltage difference of the input voltage. N-type transistors MN1 and MN2 are the output loads of the error amplifier. The output node AO of the error amplifier provides the output voltage of the error amplifier to the gate of transistor MP3, thereby adjusting the output current of transistor MP3 through the output voltage of AO.

[0094] The buffer consists of a current source I2 and a P-type transistor MP3. All current used internally by the LDO is consumed in the buffer. Current source I2 provides the current for the buffer's operation, and it is connected to the source of transistor MP3. To allow the output current of transistor MP4 to be adjusted by changing the voltage at output node BO after current source I2 is connected to transistor MP3, a constant current source with a large current capacity is required as current source I2. Thus, a large current from current source I2 flows through transistor MP3, reducing the voltage at output node BO and increasing the output current of transistor MP4. Therefore, to control the output current of transistor MP4, both current source I2 and transistor MP3 require a large amount of current. Regardless of the output current of transistor MP4, the large current in current source I2 remains stable, so the mobile device connected to the LDO circuit will continuously consume a constant current, even when the mobile device is not in use.

[0095] Transistor MP4 acts as a transfer transistor, outputting current from its drain to provide the current required by the system. Resistors RF1 and RF2 sense the current output by the P-type transistor MP4 to generate the feedback voltage VFB. Capacitor CL is a decoupling capacitor, which stabilizes the supply voltage of the LDO output. Current sources I1 and I2 are current sources that support the operation of the error amplifier and buffer. Regardless of the load current required by the system, current sources I1 and I2 use constant current.

[0096] exist Figure 3A Adding resistor R1 to the existing circuit will cause the current consumption to vary with the load current. However, since the current through MN5, which changes the current through R1, is provided by I2, the current through I2 should be as large as possible, just large enough to adjust the current through R1. Figure 3B As shown, Figure 3B This is a schematic diagram of another component structure of an LDO circuit in related technologies. Figure 3B The composition and structure of the intermediate error amplifier Figure 3A The intermediate error amplifiers have the same structure. Figure 3B The intermediate buffer differs in structure from the 3A intermediate buffer. Figure 3B The buffer includes: current source I2, N-type transistors MN3, MN4, MN5, and MN6, resistors R1 and R2, and P-type transistor MP3. Figure 3B In this configuration, the transmission transistor section includes P-type transistors MP4 and MP5. The gate of transistor MP5 is connected to a bias voltage PBIAS to ensure that the output current of transistor MP4 is unaffected by changes in the LDO output voltage. Capacitors C1, C2, and C3 are used to stabilize the LDO's operation and prevent LDO jitter.

[0097] exist Figure 3B and Figure 3A In the circuit structure of the LDO shown, a constant current source I2 with a large current capacity is used. This ensures that regardless of the current required by the system connected to the LDO, the current consumed by the current source I2 within the LDO remains constant. For example... Figure 3C As shown, the current consumption 32 of the LDO's internal buffer remains constant as the system load current 31 changes. Thus, Figure 3A and Figure 3B The circuit structure of the LDO shown cannot support the low-power modes required by mobile applications. When using Figure 3A and Figure 3B With the LDO circuit structure shown, the mobile device continuously consumes a constant current, meaning that current continues to flow even when the mobile device is not in use. In this situation, the mobile device's usage time is reduced, posing a significant problem in mobile applications that require low power consumption.

[0098] Based on this, embodiments of this application provide a low-dropout voltage regulator circuit, such as... Figure 4 As shown, the low dropout voltage regulator circuit includes three modules: an error amplifier, a buffer, and a transfer transistor. The error amplifier includes: a power supply voltage terminal VDD, P-type transistors MP1, MP3, and MP4, and N-type transistors MN1 and MN2. The gate of P-type transistor MP1 is connected to the bias voltage BIAS, and its source is connected to the power supply voltage VDD. Thus, transistor MP1, through the bias voltage BIAS connected to its gate, provides the operating current source for MP3 and MP4, which amplify the voltage. The gate of transistor MP3 inputs the system feedback voltage VFB, and the gate of transistor MP4 inputs the system's desired reference voltage VREF. Transistors MN1 and MN2 are the output loads of the error amplifier. The output voltage of the error amplifier is output to the buffer through the output node AO. The gate of transistor MP2, connected to the bias voltage BIAS, can output a small current to BO, thereby providing a small current for transistor MP7 to operate normally. When the external load requires a large current, the voltage of AO increases. As the voltage of AO increases, the gate-source voltage difference between transistors MN5 and MN6 increases, so the output current of transistors MN5 and MN6 increases. As the output current of transistors MN6 and MN6 increases, the current supplied to the system will also increase.

[0099] exist Figure 4 In this circuit, the LDO's buffer includes P-type transistors MP2, MP5, and MP6, and N-type transistors MN3 and MN4. The gate of transistor MP2 is connected to the bias voltage BIAS. The output current of transistor MP2 is very small, providing the basic operating current for transistor MP7. The output voltage of the error amplifier's output node AO is connected to the gates of transistors MN3 and MN4 in the buffer, providing gate voltages for MN3 and MN4. The voltage at the error amplifier's output node AO increases with the system's required current. The voltage at this output node AO can be adjusted by increasing or decreasing the current of transistors MN3 and MN4 to adjust the gate voltages of transistors MP5 and MP6, thereby adjusting the output current of MP6 so that the current consumed by the buffer increases or decreases according to the system's demand. The transfer transistor includes P-type transistor MP7, which outputs current from its drain to provide the system's required current and generates a constant voltage, which serves as the LDO's output voltage. Resistors RF1 and RF2 are used to sense the LDO circuit's output voltage to generate the feedback voltage VFB. Capacitor CL is a decoupling capacitor that stabilizes the LDO's output power supply voltage.

[0100] exist Figure 4In this circuit, if the external load connected to the LDO circuit requires a large current, meaning the output terminal needs to output a large current, the output voltage at the output terminal will decrease. Due to the voltage divider effect of resistors RF1 and RF2, the voltage of VFB decreases and is fed back to the error amplifier. The output voltage of the error amplifier's output node AO increases, and the gate voltage of transistor MN3 increases. This increases the gate-source voltage difference of transistor MN3, causing the output current of transistor MN3 to increase, thereby reducing the gate voltages supplied to transistors MP5 and MP6. Because the gate voltages of MP5 and MP6 decrease, the output current of MP6 increases, and since the gate of MN4 is connected to the output node AO, the output current of transistor MN4 also increases. Thus, a large current rapidly flows through transistor MN4, pulling down the voltage of output node BO, causing the gate voltage of transistor MP7 to decrease. This increases the gate-source voltage difference of transistor MP7, increasing the output current of transistor MP7, and ultimately enabling the output terminal to output a large current to the external load.

[0101] If the external load connected to the LDO circuit requires a small current, i.e., the output terminal needs to output a small current, the output voltage at the output terminal increases. Due to the voltage division effect of resistors RF1 and RF2, the voltage of VFB increases and is fed back to the error amplifier. The output voltage of the error amplifier's output node AO decreases. The gate voltage of transistor MN3 decreases, thus reducing the gate-source voltage difference of transistor MN3, resulting in a decrease in the output current of transistor MN3, which in turn increases the gate voltage of transistors MP5 and MP6. Because the gate voltages of MP5 and MP6 increase, the output current of MP6 decreases, and since the gate of MN4 is connected to the output node AO, the output current of transistor MN4 decreases. Thus, a small current flows rapidly through transistor MN4, increasing the voltage at the output node BO, which in turn increases the gate voltage of transistor MP7, reducing the voltage difference between the gate and source of transistor MP7, decreasing the output current of transistor MP7, and ultimately enabling the output terminal to output a small current to the external load.

[0102] exist Figure 4In the LDO circuit structure provided, transistor MP2 is connected to a bias voltage to provide the basic operating current for transistor MP7, so the current of transistor MP2 is very small. When the external load of the LDO circuit requires a large current, transistor MN3 adjusts the output current of transistors MP5 and MP6, increasing the output current of transistor MP6, thereby reducing the voltage at the output node BO, and further increasing the output current of transistor MP7, thus providing a large current to the electronic device. However, when the electronic device does not require a large current or is not in use, only transistor MP2 flows with a small current in the LDO circuit, while the current flowing through transistors MP5 and MP6 varies with the current required by the external load. Therefore, in the LDO circuit provided in this application embodiment, the current consumption of the buffer is adjusted according to the system's required current, thereby meeting the low-power characteristics suitable for mobile devices.

[0103] In the LDO circuit provided in this application embodiment, the current consumption of the buffer varies according to the current required by the system (e.g., load current), such as... Figure 5 As shown, the current consumption 52 of the buffer in the LDO circuit varies with the load current 51 required by the system. In this way, the LDO circuit allows the current consumption of the buffer to be adjusted according to the system's current requirements, thereby meeting the low-power characteristics suitable for mobile devices.

[0104] Based on the foregoing embodiments, the driving method for the low dropout voltage regulator circuit provided in this application can be implemented by a device, which includes the included units and the modules included in each unit, and can be implemented by a processor in a computer device; of course, it can also be implemented by specific logic circuits; in the implementation process, the processor can be a central processing unit (CPU), a microprocessor unit (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA), etc.

[0105] This application provides a driving method for a low-dropout voltage regulator circuit, applied to the low-dropout voltage regulator circuit in the above embodiments. The implementation flow of the driving method for the low-dropout voltage regulator circuit is as follows: Figure 6 As shown, combined with Figure 6 The steps shown are explained below:

[0106] Step S601: The buffer module in the low dropout voltage regulator circuit provides the basic operating current to the adjustment module in the low dropout voltage regulator circuit based on the input bias voltage.

[0107] Step S602: The adjustment module generates a feedback voltage based on the current change of the external load.

[0108] Step S603: The error amplification module in the low dropout voltage regulator circuit generates a first output voltage based on a preset reference voltage and the feedback voltage.

[0109] Step S604: Using the buffer module in the low-dropout voltage regulator circuit, determine the second output voltage based on the first output voltage.

[0110] Step S605: The adjustment module in the low-dropout voltage regulator circuit generates a target current for output to the external load based on the second output voltage.

[0111] In this embodiment, an adjustment module generates a feedback voltage based on changes in the current of the external load. This allows the adjustment module to promptly sense changes in the external load current and provide timely feedback to the error amplification module. This feedback voltage is fed back to the error amplification module, enabling it to generate a first output voltage based on a preset reference voltage and the feedback voltage. This allows the output current of the buffer module to change with the current required by the external load. Based on the first output voltage, the buffer module determines a second output voltage and provides it to the adjustment module, allowing the adjustment module to determine the target current for output to the external load. Thus, when the external load is in a low-power state, the current consumed in this low-dropout regulator circuit is minimal. Furthermore, by sensing changes in the external load current through the adjustment module, the first output voltage of the error amplification module can change accordingly. This allows the buffer module to adjust its target current according to the current required by the external load, ensuring that the target current meets the needs of the low-power external load.

[0112] This application provides an electronic device. Figure 7 This is a schematic diagram of the composition structure of an electronic device provided in an embodiment of this application, as shown below. Figure 7 As shown, the electronic device 700 includes: an external load 701 and a low-dropout voltage regulator circuit 702;

[0113] The external load 701 is connected to the output terminal of the low dropout voltage regulator circuit 702;

[0114] The external load 701 is used to feed back current changes to the low dropout voltage regulator circuit 702;

[0115] The low-dropout voltage regulator circuit 702 is used to provide a target current to the external load 701 that satisfies the current change based on the current change of the external load 701.

[0116] The descriptions of the apparatus embodiments above are similar to those of the method embodiments above, and have similar beneficial effects. In some embodiments, the functions or modules included in the apparatus provided in this disclosure can be used to perform the methods described in the method embodiments above. For technical details not disclosed in the apparatus embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0117] It should be noted that, in the embodiments of this application, if the above-described circuit layout wiring method is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the related technology, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, mobile hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware, software, or firmware, or any combination of hardware, software, and firmware.

[0118] This application provides a computer device including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor executes the program, it implements some or all of the steps in the above-described method.

[0119] This application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements some or all of the steps in the above-described method. The computer-readable storage medium can be transient or non-transient.

[0120] This application provides a computer program including computer-readable code, wherein when the computer-readable code is executed in a computer device, a processor in the computer device performs some or all of the steps in the above-described method.

[0121] This application provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, it implements some or all of the steps in the above-described method. This computer program product can be implemented specifically through hardware, software, or a combination thereof. In some embodiments, the computer program product is specifically embodied as a computer storage medium; in other embodiments, the computer program product is specifically embodied as a software product, such as a software development kit (SDK), etc.

[0122] It should be noted that the descriptions of the various embodiments above tend to emphasize the differences between them, while their similarities or commonalities can be referred to interchangeably. The descriptions of the above embodiments of the device, storage medium, computer program, and computer program product are similar to the descriptions of the above method embodiments and have similar beneficial effects. For technical details not disclosed in the embodiments of the device, storage medium, computer program, and computer program product of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0123] It should be noted that, in the embodiments of this application, if the above-described pixel capacitor circuit driving method is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the related technology, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, mobile hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware, software, or firmware, or any combination of hardware, software, and firmware.

[0124] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above steps / processes do not imply a sequential order of execution; the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above embodiments of this application are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0125] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0126] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0127] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0128] In addition, each functional unit in the various embodiments of this application can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0129] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0130] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence or the part that contributes to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, magnetic disks, or optical disks.

[0131] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A low dropout voltage regulator circuit, characterized in that, The low-dropout voltage regulator circuit includes: an error amplification module, a buffer module, and an adjustment module; the first terminal of the buffer module is connected to the output terminal of the error amplification module; the second terminal of the buffer module is connected to the first terminal of the adjustment module; the third terminal of the buffer module is connected to a bias voltage to provide the basic operating current of the adjustment module; the second terminal of the adjustment module is connected to an external load. The error amplification module is used to generate a first output voltage based on a preset reference voltage and the feedback voltage provided by the adjustment module; The adjustment module is configured to generate the feedback voltage based on the current change of the external load; and to determine the target current to be output to the external load based on the second output voltage. The buffer module is used to determine the second output voltage based on the first output voltage; The buffer module includes a first power supply submodule and a current adjustment submodule. The first terminal of the first power supply submodule is connected to the bias voltage, the second terminal of the first power supply submodule is connected to the power supply voltage, the third terminal of the first power supply submodule is connected to the second terminal of the current adjustment submodule and the first terminal of the adjustment module, the first terminal of the current adjustment submodule is connected to the output terminal of the error amplification module, the third terminal of the current adjustment submodule is connected to the power supply voltage, and the fourth terminal of the current adjustment submodule is grounded. The first power supply submodule is used to generate the basic current that can support the operation of the adjustment module based on the bias voltage; The current adjustment submodule is used to adjust the output voltage of the second terminal of the current adjustment submodule based on the first output voltage to obtain the second output voltage; The current adjustment submodule includes a current adjustment unit and a mirror unit; the first end of the current adjustment unit is connected to the output end of the error amplification module, the second end of the current adjustment unit is connected to the first end of the mirror unit, and the third end of the current adjustment unit is connected to the second end of the mirror unit and the first end of the adjustment module, respectively. The current adjustment unit is used to obtain a third output voltage based on the first output voltage and adjust the mirror current generated by the mirror unit so that the mirror unit outputs a first output current, and to determine a second output voltage based on the first output voltage and the first output current; The mirror unit is used to generate the first output current based on the third output voltage; The current adjustment unit includes a second transistor and a third transistor; the gate of the second transistor is connected to the output terminal of the error amplification module, the drain is connected to the first terminal of the mirror unit, and the source is grounded; the gate of the third transistor is connected to the output terminal of the error amplification module, the drain is connected to the second terminal of the mirror unit and the first terminal of the adjustment module, and the source is grounded. The second transistor is of type N and is used to generate the third output voltage based on the first output voltage; The third transistor is of type N and is used to generate a second output current based on the first output voltage; and to obtain the second output voltage based on the first output current and the second output current.

2. The low dropout voltage regulator circuit according to claim 1, characterized in that, The adjustment module includes: an adjustment submodule and a voltage divider submodule; The first terminal of the adjustment submodule is connected to the second terminal of the buffer module, the second terminal of the adjustment submodule is connected to the first terminal of the voltage divider submodule, and the third terminal of the adjustment submodule is connected to the power supply voltage; the second terminal of the voltage divider submodule is connected to the first terminal of the error amplification module, and the third terminal of the voltage divider submodule is grounded. The adjustment submodule is used to generate the target current based on the second output voltage and transmit it to the external load; The voltage divider submodule is used to divide the voltage corresponding to the current change of the external load to obtain the feedback voltage, and then feed it back to the error amplification module.

3. The low dropout voltage regulator circuit according to claim 1, characterized in that, The first power supply submodule includes a first transistor, the gate of the first transistor is connected to the bias voltage, the source is connected to the power supply voltage, and the drain is connected to the second terminal of the current adjustment submodule. The first transistor is configured to generate a minimum current capable of supporting the operation of the adjustment module based on the bias voltage, and to use the minimum current as the base current.

4. The low dropout voltage regulator circuit according to claim 1, characterized in that, The mirror unit includes: a fourth transistor and a fifth transistor; The fourth transistor and the fifth transistor form a mirror circuit, and the output current of the fourth transistor and the output current of the fifth transistor satisfy a preset ratio.

5. The low dropout voltage regulator circuit according to claim 1, characterized in that, The error amplification module includes: a second power supply submodule and an amplification submodule; The first terminal of the amplification submodule is connected to the feedback voltage, the second terminal of the amplification submodule is connected to the reference voltage, and the third terminal of the amplification submodule is connected to the third terminal of the second power supply submodule; the first terminal of the second power supply submodule is connected to the bias voltage, and the second terminal of the second power supply submodule is connected to the power supply voltage. The second power supply submodule is used to generate a third output current for the amplification submodule to operate based on the bias voltage and the power supply voltage; The amplification submodule is used to amplify the difference between the feedback voltage and the reference voltage based on the third output current to obtain the first output voltage.

6. An electronic device, characterized in that, The electronic device includes: an external load and a low-dropout voltage regulator circuit as described in any one of claims 1 to 5; the external load is connected to the output terminal of the low-dropout voltage regulator circuit; The external load is used to feed back current changes to the low-dropout voltage regulator circuit; The low-dropout voltage regulator circuit is used to provide a target current to the external load that satisfies the current change based on the current change of the external load.

7. A driving method for a low-dropout voltage regulator circuit, characterized in that, The method, applied to the low-dropout voltage regulator circuit according to any one of claims 1 to 5, comprises: The buffer module in the low dropout voltage regulator circuit provides the basic operating current to the adjustment module in the low dropout voltage regulator circuit based on the input bias voltage. The adjustment module generates a feedback voltage based on the current change of the external load. The error amplification module in the low dropout voltage regulator circuit generates a first output voltage based on a preset reference voltage and the feedback voltage. The buffer module in the low-dropout voltage regulator circuit determines the second output voltage based on the first output voltage; The adjustment module in the low-dropout voltage regulator circuit generates a target current for output to the external load based on the second output voltage.

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