Encoding method, decoding method, communication apparatus, storage medium, and program product

Abstract

Provided in the present application are an encoding method, a decoding method, a communication apparatus, a storage medium, and a program product. The encoding method comprises: determining a first sequence for encoding K bits to be encoded, wherein the first sequence comprises N bit indexes, and the N bit indexes are arranged according to the reliability of the N bit indexes; on the basis of K bit indexes in the first sequence, placing said K bits, so as to obtain a second sequence; and performing polar code encoding on the second sequence, so as to obtain a third sequence. Therefore, a polar code encoding mechanism applicable to a PLC system is provided. Due to the proven ability of polar code encoding to reach the Shannon limit, the encoding method can reduce the block error rate of encoding, thereby improving the encoding performance.

Description

An encoding and decoding method, a communication device, a storage medium, and a program product.

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202411220256.3, filed on August 30, 2024, entitled "An Encoding and Decoding Method, Communication Device, Storage Medium and Program Product", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of communication technology, and in particular to an encoding and decoding method, a communication device, a storage medium, and a program product. Background Technology

[0004] Power line communication (PLC) transmits digital signals over power lines (AC or DC). Building upon PLC, high-speed power line communication (HPLC), also known as broadband power line communication, has been proposed. This broadband power line communication technology transmits data over low-voltage power lines. Compared to traditional PLC, HPLC offers greater bandwidth and higher transmission rates, meeting the higher demands of low-voltage power line communication.

[0005] In PLCs and HPLCs, turbo codes are used for encoding. Turbo codes cleverly combine component codes and random interleavers, employing a parallel cascaded structure to realize the concept of random encoding. They utilize a soft-input, soft-output iterative decoding method, achieving performance close to the Shannon limit. However, with the increasing widespread application of HPLC, how to further improve the encoding performance in PLCs or HPLCs is a problem that urgently needs to be solved. Summary of the Invention

[0006] This application provides an encoding and decoding method, a communication device, a storage medium, and a program product for improving encoding performance.

[0007] Firstly, embodiments of this application provide an encoding method. This method can be applied to a first device. The first device can be applied to a PLC, specifically such as an HPLC system. For example, the first device can be a central coordinator (CCO), proxy coordinator (PCO), or station (STA), or it can be a module applied to a CCO, PCO, or STA, such as a circuit, chip, chip system, or processor, or it can be a logic node, logic module, or software capable of implementing all or part of the functions of a CCO, PCO, or STA. The first device can also be called a transmitter, transmitting device, or transmitting equipment. The method includes: determining a first sequence for encoding K bits to be encoded, the first sequence including N bit indices, the N bit indices being arranged according to their reliability, N being the code length corresponding to the K bits to be encoded, N and K being positive integers, N being greater than or equal to K; placing K bits to be encoded according to the K bit indices in the first sequence to obtain a second sequence; and performing polar code encoding on the second sequence to obtain a third sequence. Alternatively, the method includes: determining a first sequence for encoding K bits to be encoded, the first sequence including N bit indices arranged according to the reliability of the N bit indices, where N is the code length corresponding to the K bits to be encoded, and N and K are both positive integers, with N greater than or equal to K; placing the K bits to be encoded according to the K bit indices in the first sequence to obtain a second sequence; performing polar code encoding on the second sequence to obtain a third sequence; performing frequency domain or time domain processing on the third sequence to obtain a signal, and transmitting the signal via a power line.

[0008] The reliability of the N bit indices can also be viewed as the reliability of the N polarization channels. In polar coding, when the code length is infinitely long, the binary symmetric channel can be polarized into two types of channels, which are polarization channels. Polarization channels include pure noise channels with a capacity of 0 and noiseless channels with a capacity of 1. These N bit indices can also be understood as the sequence numbers of the N polarization channels.

[0009] This application provides a mechanism for polar encoding of bits transmitted in a PLC (e.g., HPLC) system. Polar codes can reach the Shannon limit, reducing the block error rate (BLER) and thus improving encoding performance. Furthermore, encoding K bits to be encoded using a reliability-selected K bit sequence ensures that the K bits are carried on a highly reliable polarized channel, guaranteeing the encoding reliability of the K bits.

[0010] In one possible implementation, the first sequence is a subset of the fourth sequence, which contains N. max A bit index, N max The bit index in the fourth sequence is arranged according to N. max The reliability corresponding to each bit index is arranged from low to high, N max N is a positive integer greater than or equal to N. Optionally, the fourth sequence may be pre-configured or predefined in the first device, such as by means of a protocol.

[0011] The fourth sequence can be viewed as a reliability sequence; the fourth sequence can be a sequence of reliability values ​​for N. max The result of arranging the bit indices.

[0012] Thus, the first device can flexibly determine the first sequence based on the fourth sequence according to the requirements, so as to improve the coding flexibility and meet the different coding requirements of the first device.

[0013] In one possible implementation, the fourth sequence is a sequence corresponding to one of the following codewords, wherein: a codeword satisfies one of the following conditions: codeword 1: the length of the bit to be encoded is 8 bytes, the code length is 128 bits, and the code rate is 1 / 2; codeword 2: the length of the bit to be encoded is 8 bytes, the code length is 256 bits, and the code rate is 1 / 4; codeword 3: the length of the bit to be encoded is 12 bytes, the code length is 256 bits, and the code rate is 3 / 8; codeword 4: the length of the bit to be encoded is 16 bytes, the code length is 256 bits, and the code rate is 1 / 2; or, codeword 5: the length of the bit to be encoded is 32 bytes, the code length is 512 bits, and the code rate is 1 / 2.

[0014] A codeword can be viewed as an encoding method or encoding scheme, which defines at least two of the following: code length, code rate, or the length of the bits to be encoded. The fourth sequence corresponding to any two codewords can be different.

[0015] In this way, different fourth sequences are set for different types of codewords, so that the first device can select the corresponding fourth sequence based on the codeword, rather than designing a general fourth sequence for any codeword. This allows for more targeted encoding of the bits to be encoded, which is beneficial to improving the encoding performance.

[0016] In one possible implementation, the fourth sequence can be the following sequence:

[0017] [0,8,4,16,32,2,64,10,6,12,18,1,9,5,20,17,33,34,3,24,36,65,11,7,66,40,13,19,14,68,21,48,22,35,72,25,37,26,80,38,67,41,28,96,15,42,69,49,70,44,23,73,50,74,52,27,81,39,76,56,82,29,97,30,43,84,98,88,71,45,1 [00,51,46,104,75,53,112,54,77,57,83,78,58,31,85,60,86,99,89,90,101,92,102,47,105,106,113,108,55,114,79,59,61,87,91,103,93,107,109,115,117,63,95,111,119,127,62,94,110,116,118,120,122,124,126,121,125,123]. For example, in this case, the fourth sequence can also refer to the contents of the fourth sequence shown in Table 1 below. This is just an example of the fourth sequence. In fact, the fourth sequence can also be the content of any of the fourth sequences shown in Tables 2 to 5 below.

[0018] The fourth sequence listed in this embodiment can be applied to encoding under codeword 1, that is, to encoding when K is 64, N is 128, and the code rate is 1 / 2.

[0019] Thus, a separate fourth sequence was designed for codeword 1, improving the encoding performance of codeword 1.

[0020] In one possible implementation, the fourth sequence can be the following sequence:

[0021] [0,32,64,128,16,80,48,96,144,8,72,40,160,136,24,192,88,4,68,36,132,20,56,84,104,52,100,148,152,12,112,76,44,164,140,168,28,196,176,2,66,34,130,18,82,50,98,146,10,74,42,162,138,26,194,200,90,6,70,38,134,22,58,92,208,86,106,54,60,1 02,108,150,154,14,114,78,46,166,142,156,1,65,33,129,17,81,49,97,145,9,73,41,161,137,25,193,89,5,69,37,133,21,57,170,85,105,53,101,224,149,153,116,13,113,77,45,165,141,169,172,29,30,197,198,177,178,3,67,35,131,19,83,51,99,147,11,7 5,43,163,139,120,27,195,201,202,180,91,7,71,39,135,23,59,93,209,87,107,204,55,61,103,94,109,151,210,155,184,62,15,115,79,47,167,143,157,110,171,225,212,117,158,173,31,226,118,199,179,121,216,174,203,228,181,122,205,182,232,124,95 ,211,185,63,206,111,186,240,213,159,227,119,214,188,217,175,229,123,218,230,183,220,233,125,207,234,126,187,241,236,242,215,189,244,190,219,248,231,221,222,235,127,237,243,238,245,191,246,249,250,252,223,239,247,251,253,255,254). For example, in this case, the fourth sequence can also refer to the content of the fourth sequence shown in Table 6 below. This is just an example of the fourth sequence; in fact, the fourth sequence can also be the content of the fourth sequence shown in any of the tables 7 to 13 below.

[0022] The fourth sequence listed in this embodiment can be applied to encoding under codeword 2, that is, to encoding when K is 64, N is 256, and the code rate is 1 / 4.

[0023] Thus, a separate fourth sequence was designed for codeword 2, improving the encoding performance of codeword 2.

[0024] In one possible implementation, the fourth sequence can be the following sequence:

[0025] [0,32,16,64,128,8,40,24,48,72,80,4,36,20,68,136,132,96,12,144,44,160,28,2,34,18,66,130,52,10,42,26,50,76,74,56,82,84,6,38,22,70,192,138,134,98,88,140,14,100,146,1,33,17,65,129,9,41,25,49,73,81,5,37,21,69,137,133,97,13,145,148,104 ,45,161,46,29,162,3,35,19,67,131,53,11,30,43,54,152,27,51,77,75,57,78,164,83,112,85,7,58,39,23,71,193,86,139,135,99,194,89,168,60,141,15,101,147,90,142,196,149,102,176,105,92,47,150,163,200,31,55,153,106,79,165,113,59,154,208,108 ,87,166,114,195,169,61,156,91,224,116,143,170,62,197,103,177,93,120,198,172,151,201,178,107,94,202,180,155,209,109,204,167,115,184,210,110,157,225,117,158,212,171,63,226,118,216,121,199,173,228,179,122,174,95,232,203,124,181,240, 182,205,185,211,111,206,186,159,213,188,214,227,119,217,218,229,220,123,230,175,233,125,234,236,241,126,242,183,207,187,189,215,219,221,231,235,237,127,243,191,223,239,247,255,190,222,238,244,246,248,250,252,254,245,249,253,251). For example, in this case, the fourth sequence can also refer to the content of the fourth sequence shown in Table 14 below. This is just an example of the fourth sequence; in reality, the fourth sequence can also be the content of the fourth sequence shown in any of the tables 15 to 23 below.

[0026] The fourth sequence listed in this embodiment can be applied to encoding under codeword 3 or codeword 4, that is, to encoding when K is 96, N is 256, and the code rate is 3 / 8; and to encoding when K is 128, N is 256, and the code rate is 1 / 2.

[0027] Thus, a separate fourth sequence was designed for codeword 3 or codeword 4, improving the encoding performance of codeword 3 or codeword 4.

[0028] In one possible implementation, the fourth sequence can be the following sequence:

[0029] [0,32,64,128,16,256,48,80,8,96,40,72,144,136,160,24,264,272,192,4,36,68,132,20,260,288,56,52,88,84,12,100,44,76,104,148,320,140,152,164,28,112,268,2,34,66,130,18,258,50,82,10,98,42,74,146,138,168,162,26,266,276,384,274,194,196,6,38,70,134,22,262,280,176,290,292,58,54,200,90,86,60,14,102,92,46,78,106,296,150,1,33,65,129,17,257,49,81,9,97,41,73,145,137,161,25,265,273,322,193,5,37,69,133,21,261,289,57,53,142,89,85,13,101,45,77,208,105,149,154,321,141,108,153,324,165,29,113,166,30,114,156,269,3,35,67,131,19,259,51,83,11,99,304,43,75,147,139,169,163,27,270,267,170,277,385,116,275,328,224,195,278,386,197,7,39,71,135,23,263,281,177,291,172,198,293,59,55,120,282,201,178,91,388,87,61,336,294,15,103,93,202,47,79,107,297,151,284,180,62,323,143,392,94,209,155,109,298,204,325,352,167,31,115,210,184,157,305,110,271,326,400,300,171,117,329,225,158,279,306,212,387,173,118,199,330,226,416,121,283,179,389,308,216,337,174,295,203,332,228,122,390,285,181,63,312,338,393,95,448,299,205,232,124,286,182,353,394,340,211,185,111,206,327,401,354,301,240,396,186,344,159,307,213,402,302,356,119,188,331,227,214,417,309,404,217,360,175,418,333,229,310,123,391,218,408,313,339,368,449,420,334,230,220,233,125,287,183,314,450,395,341,424,234,126,207,316,355,452,342,241,432,397,187,345,236,456,403,303,357,242,398,346,189,464,215,244,358,348,405,190,361,480,248,419,406,311,362,219,409,369,364,421,335,410,231,370,221,315,422,412,451,372,222,425,235,127,376,317,426,453,343,318,433,428,454,237,434,457,238,243,436,399,458,347,460,465,245,359,349,246,466,191,481,249,407,363,365,411,371,423,413,373,223,377,427,319,429,455,435,239,437,459,461,467,247,351,483,251,367,415,375,379,431,439,463,471,487,255,383,447,479,250,252,254,350,366,374,378,380,382,414,430,438,440,442,444,446,462,468,470,472,474,476,478,482,484,486,488,490,492,494,496,498,500,502,504,506,508,510,495,253,381,441,445,469,473,477,485,489,493,497,501,505,509,511,443,475,491,499,507,

[503] . For example, in this case, the fourth sequence can also refer to the content of the fourth sequence shown in Table 24 below. This is just an example of the fourth sequence; in reality, the fourth sequence can also be the content of the fourth sequence shown in any of the tables 25 to 32 below.

[0030] The fourth sequence listed in this embodiment can be applied to encoding under codeword 5, that is, to encoding when K is 256, N is 512, and the code rate is 1 / 2.

[0031] Thus, a separate fourth sequence was designed for codeword 5, improving the encoding performance of codeword 5.

[0032] In one possible implementation, the N bit indices are the N bit indices in the fourth sequence whose bit indices are less than N. This applies when the bit indices start from 0. If the bit indices start from 1, then the N bit indices are the N bit indices in the fourth sequence whose bit indices are less than or equal to N.

[0033] This provides a simple way to determine the N-bit index or the first sequence, which helps improve the efficiency of the N-bit index.

[0034] In one possible implementation, the N bit indices are arranged in ascending order of reliability.

[0035] This makes it easier to select K bit indices from the first sequence that meet the reliability requirements.

[0036] In one possible implementation, the K bit indices are determined from the first sequence based on reliability sorting.

[0037] Thus, a method for filtering K bit indices is provided, and the reliability of the determined K bit indices can meet certain conditions, so that the encoding can meet the corresponding requirements.

[0038] In one possible implementation, the K bit indices are the K bit indices with the highest reliability values ​​in the first sequence. Alternatively, the K bit indices are the K bit indices with the highest reliability in the first sequence.

[0039] Thus, the high reliability of the K bit indexes allows the K bits to be encoded to be carried on a highly reliable polarized channel, thereby maximizing the reliability of the encoding.

[0040] In one possible implementation, the K bits to be encoded include cyclic redundancy check bits.

[0041] In this way, encoding the cyclic redundancy check (CRC) bits can also ensure the accuracy of the CRC encoding.

[0042] In one possible implementation, the third sequence is represented as:

[0043] X = uG N

[0044] Where X = [x0, x1, x2, ..., x N-1 X represents the second sequence, u = [u0, u1, u2, ..., u] N-1 In u, K bits to be encoded are placed at positions corresponding to the K bit indices. In addition to the positions corresponding to the K bit indices, frozen bits are placed in u. G N It is an N×N matrix. It is the nth Kronecker product of matrix G2. This provides a specific process for polar encoding.

[0045] In one possible implementation, the third sequence is processed in the frequency domain or time domain to obtain a signal, which is then transmitted to the second device via a power line.

[0046] Secondly, embodiments of this application provide a decoding method, or in other words, a decryption method. This method can be applied to a second device. The second device can be applied to a PLC, specifically such as an HPLC system. For example, the second device can be a central coordinator (CCO), proxy coordinator (PCO), or station (STA), or it can be a module applied in the CCO, PCO, or STA, such as a circuit, chip, chip system, or processor, or it can be a logic node, logic module, or software that can implement all or part of the functions of the CCO, PCO, or STA. The second device can also be called a receiving end, receiving device, or receiving equipment. Optionally, the first device and the second device may be different devices, or the first device and the second device may be the same device; no specific limitation is made in this regard. The decoding method includes: performing polar code decoding on the received signal (or sequence) to obtain a second sequence; processing the second sequence based on K bit indices to obtain K bits to be encoded, wherein: the K bit indices belong to the first sequence, the first sequence includes N bit indices, the N bit indices are arranged according to their reliability, N is the code length corresponding to the K bits to be encoded, N and K are both positive integers, and N is greater than or equal to K. Alternatively, the method can be described as: receiving a signal via a power line; performing polar code decoding on the received signal to obtain a second sequence; processing the second sequence based on the K bit indices to obtain K bits to be encoded, wherein: the K bit indices belong to the first sequence, the first sequence includes N bit indices, the N bit indices are arranged according to their reliability, N is the code length corresponding to the K bits to be encoded, N and K are both positive integers, and N is greater than or equal to K.

[0047] In one possible implementation, the first sequence is a subset of the fourth sequence, which contains Nmax bit indices arranged in ascending order of reliability, where Nmax is a positive integer greater than or equal to N. Optionally, the fourth sequence may be pre-configured or pre-defined in the first device, for example, pre-defined in the first device via a protocol. The fourth sequence can be considered a reliability sequence, and may be the result of arranging the Nmax bit indices according to reliability.

[0048] In one possible implementation, the fourth sequence is a sequence corresponding to one of the following codewords, wherein: a codeword satisfies one of the following conditions: codeword 1: the length of the bit to be encoded is 8 bytes, the code length is 128 bits, and the code rate is 1 / 2; codeword 2: the length of the bit to be encoded is 8 bytes, the code length is 256 bits, and the code rate is 1 / 4; codeword 3: the length of the bit to be encoded is 12 bytes, the code length is 256 bits, and the code rate is 3 / 8; codeword 4: the length of the bit to be encoded is 16 bytes, the code length is 256 bits, and the code rate is 1 / 2; or, codeword 5: the length of the bit to be encoded is 32 bytes, the code length is 512 bits, and the code rate is 1 / 2.

[0049] In one possible implementation, the fourth sequence can be the following sequence:

[0050] [0,8,4,16,32,2,64,10,6,12,18,1,9,5,20,17,33,34,3,24,36,65,11,7,66,40,13,19,14,68,21,48,22,35,72,25,37,26,80,38,67,41,28,96,15,42,69,49,70,44,23,73,50,74,52,27,81,39,76,56,82,29,97,30,43,84,98,88,71,45,1 [00,51,46,104,75,53,112,54,77,57,83,78,58,31,85,60,86,99,89,90,101,92,102,47,105,106,113,108,55,114,79,59,61,87,91,103,93,107,109,115,117,63,95,111,119,127,62,94,110,116,118,120,122,124,126,121,125,123]. For example, in this case, the fourth sequence can also refer to the contents of the fourth sequence shown in Table 1 below. This is merely an example of the fourth sequence; in reality, the fourth sequence can also be the content of any of the fourth sequences shown in Tables 2 to 5 below. The fourth sequence listed in this embodiment can be applied to encoding under codeword 1, that is, to encoding when K is 64, N is 128, and the code rate is 1 / 2.

[0051] In one possible implementation, the fourth sequence can be the following sequence:

[0052] [0,32,64,128,16,80,48,96,144,8,72,40,160,136,24,192,88,4,68,36,132,20,56,84,104,52,100,148,152,12,112,76,44,164,140,168,28,196,176,2,66,34,130,18,82,50,98,146,10,74,42,162,138,26,194,200,90,6,70,38,134,22,58,92,208,86,106,54,60,1 02,108,150,154,14,114,78,46,166,142,156,1,65,33,129,17,81,49,97,145,9,73,41,161,137,25,193,89,5,69,37,133,21,57,170,85,105,53,101,224,149,153,116,13,113,77,45,165,141,169,172,29,30,197,198,177,178,3,67,35,131,19,83,51,99,147,11,7 5,43,163,139,120,27,195,201,202,180,91,7,71,39,135,23,59,93,209,87,107,204,55,61,103,94,109,151,210,155,184,62,15,115,79,47,167,143,157,110,171,225,212,117,158,173,31,226,118,199,179,121,216,174,203,228,181,122,205,182,232,124,95 ,211,185,63,206,111,186,240,213,159,227,119,214,188,217,175,229,123,218,230,183,220,233,125,207,234,126,187,241,236,242,215,189,244,190,219,248,231,221,222,235,127,237,243,238,245,191,246,249,250,252,223,239,247,251,253,255,254). For example, in this case, the fourth sequence can also refer to the content of the fourth sequence shown in Table 6 below. This is just an example of the fourth sequence; in fact, the fourth sequence can also be the content of the fourth sequence shown in any of the tables 7 to 13 below.The fourth sequence listed in this embodiment can be applied to encoding under codeword 2, that is, to encoding when K is 64, N is 256, and the code rate is 1 / 4.

[0053] In one possible implementation, the fourth sequence can be the following sequence:

[0054] [0,32,16,64,128,8,40,24,48,72,80,4,36,20,68,136,132,96,12,144,44,160,28,2,34,18,66,130,52,10,42,26,50,76,74,56,82,84,6,38,22,70,192,138,134,98,88,140,14,100,146,1,33,17,65,129,9,41,25,49,73,81,5,37,21,69,137,133,97,13,145,148,104 ,45,161,46,29,162,3,35,19,67,131,53,11,30,43,54,152,27,51,77,75,57,78,164,83,112,85,7,58,39,23,71,193,86,139,135,99,194,89,168,60,141,15,101,147,90,142,196,149,102,176,105,92,47,150,163,200,31,55,153,106,79,165,113,59,154,208,108 ,87,166,114,195,169,61,156,91,224,116,143,170,62,197,103,177,93,120,198,172,151,201,178,107,94,202,180,155,209,109,204,167,115,184,210,110,157,225,117,158,212,171,63,226,118,216,121,199,173,228,179,122,174,95,232,203,124,181,240, 182,205,185,211,111,206,186,159,213,188,214,227,119,217,218,229,220,123,230,175,233,125,234,236,241,126,242,183,207,187,189,215,219,221,231,235,237,127,243,191,223,239,247,255,190,222,238,244,246,248,250,252,254,245,249,253,251). For example, in this case, the fourth sequence can also refer to the content of the fourth sequence shown in Table 14 below. This is just an example of the fourth sequence; in reality, the fourth sequence can also be the content of the fourth sequence shown in any of the tables 15 to 23 below.

[0055] The fourth sequence listed in this embodiment can be applied to encoding under codeword 3 or codeword 4, that is, to encoding when K is 96, N is 256, and the code rate is 3 / 8; and to encoding when K is 128, N is 256, and the code rate is 1 / 2.

[0056] In one possible implementation, the fourth sequence can be the following sequence:

[0057] [0,32,64,128,16,256,48,80,8,96,40,72,144,136,160,24,264,272,192,4,36,68,132,20,260,288,56,52,88,84,12,100,44,76,104,148,320,140,152,164,28,112,268,2,34,66,130,18,258,50,82,10,98,42,74,146,138,168,162,26,266,276,384,274,194,196,6,38,70,134,22,262,280,176,290,292,58,54,200,90,86,60,14,102,92,46,78,106,296,150,1,33,65,129,17,257,49,81,9,97,41,73,145,137,161,25,265,273,322,193,5,37,69,133,21,261,289,57,53,142,89,85,13,101,45,77,208,105,149,154,321,141,108,153,324,165,29,113,166,30,114,156,269,3,35,67,131,19,259,51,83,11,99,304,43,75,147,139,169,163,27,270,267,170,277,385,116,275,328,224,195,278,386,197,7,39,71,135,23,263,281,177,291,172,198,293,59,55,120,282,201,178,91,388,87,61,336,294,15,103,93,202,47,79,107,297,151,284,180,62,323,143,392,94,209,155,109,298,204,325,352,167,31,115,210,184,157,305,110,271,326,400,300,171,117,329,225,158,279,306,212,387,173,118,199,330,226,416,121,283,179,389,308,216,337,174,295,203,332,228,122,390,285,181,63,312,338,393,95,448,299,205,232,124,286,182,353,394,340,211,185,111,206,327,401,354,301,240,396,186,344,159,307,213,402,302,356,119,188,331,227,214,417,309,404,217,360,175,418,333,229,310,123,391,218,408,313,339,368,449,420,334,230,220,233,125,287,183,314,450,395,341,424,234,126,207,316,355,452,342,241,432,397,187,345,236,456,403,303,357,242,398,346,189,464,215,244,358,348,405,190,361,480,248,419,406,311,362,219,409,369,364,421,335,410,231,370,221,315,422,412,451,372,222,425,235,127,376,317,426,453,343,318,433,428,454,237,434,457,238,243,436,399,458,347,460,465,245,359,349,246,466,191,481,249,407,363,365,411,371,423,413,373,223,377,427,319,429,455,435,239,437,459,461,467,247,351,483,251,367,415,375,379,431,439,463,471,487,255,383,447,479,250,252,254,350,366,374,378,380,382,414,430,438,440,442,444,446,462,468,470,472,474,476,478,482,484,486,488,490,492,494,496,498,500,502,504,506,508,510,495,253,381,441,445,469,473,477,485,489,493,497,501,505,509,511,443,475,491,499,507,

[503] . For example, in this case, the fourth sequence can also refer to the content of the fourth sequence shown in Table 24 below. This is just an example of the fourth sequence; in reality, the fourth sequence can also be the content of the fourth sequence shown in any of the tables 25 to 32 below.

[0058] The fourth sequence listed in this embodiment can be applied to encoding under codeword 5, that is, to encoding when K is 256, N is 512, and the code rate is 1 / 2.

[0059] In one possible implementation, the N bit indices are the N bit indices in the fourth sequence whose bit indices are less than N. This applies when the bit indices start from 0. If the bit indices start from 1, then the N bit indices are the N bit indices in the fourth sequence whose bit indices are less than or equal to N.

[0060] In one possible implementation, the N bit indices are arranged in ascending order of reliability.

[0061] In one possible implementation, the K bit indices are determined from the first sequence based on reliability sorting.

[0062] In one possible implementation, the K bit indices are the K bit indices with the highest reliability values ​​in the first sequence. Alternatively, the K bit indices are the K bit indices with the highest reliability in the first sequence.

[0063] In one possible implementation, the K bits to be encoded include cyclic redundancy check bits.

[0064] In one possible implementation, the third sequence is represented as:

[0065] X = uG N

[0066] Where X = [x0, x1, x2, ..., x N-1 X represents the second sequence, u = [u0, u1, u2, ..., u] N-1 In u, K bits to be encoded are placed at positions corresponding to the K bit indices. In addition to the positions corresponding to the K bit indices, frozen bits are placed in u. G N It is an N×N matrix. It is the nth Kronecker product of matrix G2. This provides a specific process for polar encoding.

[0067] Thirdly, embodiments of this application provide a communication device. This communication device can be the first device described in the first aspect above, or a software or hardware module (such as a chip) within the first device. The communication device includes corresponding means or modules for performing the first aspect or any possible implementation described above. For example, the communication device includes a processing unit (sometimes also called a processing module) and a transceiver unit (sometimes also called a transceiver module).

[0068] For example, a processing unit is used to determine a first sequence for encoding K bits to be encoded, the first sequence including N bit indices, the N bit indices being arranged according to the reliability of the N bit indices, N being the code length corresponding to the K bits to be encoded, N and K being positive integers, N being greater than or equal to K; according to the K bit indices in the first sequence, K bits to be encoded are placed to obtain a second sequence; the second sequence is polar encoded to obtain a third sequence.

[0069] Optionally, the communication device may also perform any of the possible implementations in the first aspect above, which will not be listed here.

[0070] Fourthly, embodiments of this application provide a communication device. This communication device can be the second device described in the first aspect above, or a software or hardware module (such as a chip) within the second device. The communication device includes corresponding means or modules for performing the first aspect or any possible implementation described above. For example, the communication device includes a processing unit (sometimes also called a processing module) and a transceiver unit (sometimes also called a transceiver module).

[0071] For example, a processing unit is used to perform polar code decoding on the received signal to obtain a second sequence; based on K bit indices, the second sequence is processed to obtain K bits to be encoded, wherein: the K bit indices belong to the first sequence, the first sequence includes N bit indices, the N bit indices are arranged according to the reliability of the N bit indices, N is the code length corresponding to the K bits to be encoded, N and K are both positive integers, and N is greater than or equal to K.

[0072] Optionally, the communication device may also perform any of the possible implementations in the second aspect above, which will not be listed here.

[0073] Fifthly, embodiments of this application provide a communication system. This communication system includes the communication device as described in the third aspect and the communication device as described in the fourth aspect. The functions of the communication device described in the third aspect are as described in the preceding third aspect, and the functions of the communication device described in the fourth aspect are as described in the preceding fourth aspect.

[0074] Sixthly, embodiments of this application provide a communication device. The communication device includes: a processor and a communication interface; the communication interface is used to communicate with a module outside the communication device; the processor is used to execute computer programs or instructions to cause the methods described in any of the above aspects to be executed. The communication device can be the first device in the first aspect, or a device including the first device, or a device included in the first device, such as a chip; or, the communication device can be the second device in the second aspect, or a device including the second device, or a device included in the second device.

[0075] In a seventh aspect, embodiments of this application provide a communication device. The communication device includes: at least one processor; the processor is configured to execute a computer program or instructions stored in a memory to implement the method described in any of the preceding aspects. The memory may be coupled to the processor, or may be independent of the processor. The communication device may be the first device as described in the first aspect, or a device including the first device, or a device included in the first device, such as a chip; or, the communication device may be the second device as described in the second aspect, or a device including the second device, or a device included in the second device.

[0076] Eighthly, embodiments of this application provide a computer-readable storage medium. The computer storage medium stores computer-readable instructions, which, when read and executed by a computer, cause the computer to perform the method in any possible implementation of either the first or second aspect described above.

[0077] Ninthly, embodiments of this application provide a computer program product. When a computer reads and executes the computer program product, the computer performs the method in any possible implementation of either the first or second aspect described above. The computer program product includes computer programs and / or instructions, etc.

[0078] In a tenth aspect, embodiments of this application provide a chip. The chip is used to read a computer program stored in a memory to execute the method in any possible implementation of either the first or second aspect described above.

[0079] It is understood that the technical effects of the second to tenth aspects can refer to the technical effects of any possible implementation of the first aspect, and will not be repeated here. Attached Figure Description

[0080] Figure 1 is a schematic diagram of a PLC system provided in an embodiment of this application;

[0081] Figure 2 shows a PLC system applicable to an embodiment of this application;

[0082] Figure 3 is a schematic diagram of a physical layer protocol data unit;

[0083] Figure 4 is a schematic diagram of an encoding method provided in an embodiment of this application;

[0084] Figures 5 and 6 are schematic diagrams comparing the block error rate of the present application embodiment with that of Turbo coding;

[0085] Figure 7 is a schematic diagram of a decoding method provided in an embodiment of this application;

[0086] Figures 8 to 11 are schematic diagrams of the structures of four communication devices provided in the embodiments of this application. Detailed Implementation

[0087] The solutions provided in this application can be applied to various communication systems, such as communication systems using PLC technology (hereinafter referred to as PLC systems), specifically, communication systems using HPLC technology (hereinafter referred to as HPLC systems). PLC systems can be applied to various industrial or home IoT scenarios. For example, PLCs can be applied to intelligent building systems (such as energy management (e.g., grid management), security monitoring, lighting control, or building automation), and also to various scenarios such as smart transportation, smart grids, and smart cities. For instance, using a PLC to control a building energy management system can achieve energy consumption monitoring and ambient temperature control, improving building energy efficiency. As another example, using a PLC to implement an intelligent lighting system can automatically control lighting based on human perception, improving indoor lighting comfort and saving electricity costs.

[0088] Please refer to Figure 1, which is a schematic diagram of a PLC system provided in an embodiment of this application. Figure 1 illustrates a first device and a second device. A device can refer to the equipment itself, or a module within the equipment, such as a software module or hardware module. A device can also be replaced by a device, network element, entity, or node, etc., without specific limitation.

[0089] For example, the first device modulates the signal into a high-frequency radio wave and transmits it to the power line. The signal then reaches the second device, which separates the high-frequency radio wave from the current, completing the signal transmission. Alternatively, the first device can encode, modulate, and amplify the signal to be transmitted, converting it into a high-frequency signal and coupling it to the power line, thereby transmitting the signal to the second device. The second device can then sequentially perform coupling, filtering, demodulation, and decoding processes on the signal to recover the original signal.

[0090] In the various embodiments of this application, a first device is used as the signal transmitter and a second device as the signal receiver. In reality, the receiver and transmitter are relative; for example, the second device can act as the signal transmitter and the first device can act as the signal receiver, without any specific limitation.

[0091] In another possible implementation, the first device and the second device can also be the same device. For example, the first device sends a signal and receives the signal itself. That is, the first device or the second device acts as both the signal sender and the signal receiver. There is no specific limitation on this.

[0092] Figure 2 illustrates a PLC system to which this application embodiment applies. Figure 2 illustrates at least one central coordinator (CCO), at least one proxy coordinator (PCO) (such as PCO1 to PCO3), and at least one station (STA) (such as STA1 to STA8). Any one of the CCO, PCO1 to PCO3, and STA1 to STA8 in Figure 2 can be used as an example of a first device, and the other one of the CCO, PCO1 to PCO3, and STA1 to STA8 in Figure 2 can be used as an example of a second device.

[0093] The Control Center (CCO) is responsible for the access and signal transmission / reception of the STA and / or Power Control Center (PCO). The PCO is responsible for signal relay and forwarding functions. The STA is responsible for receiving and transmitting power line carrier signals. For example, the CCO or PCO can be a digital data acquisition unit, and the STA can be an inverter. Alternatively, the CCO or PCO can be an inverter, and the STA can be a photovoltaic optimizer. Or, the CCO can be a digital data acquisition unit, the PCO can be an inverter, and the STA can be a photovoltaic optimizer. Or, the CCO or PCO can be a digital data acquisition unit, and the STA can be an electricity meter. Or, the CCO can be a central controller, and the STA can be a lighting fixture.

[0094] For example, signals from external devices can be transmitted across the entire network via power lines through the CCO in the applied HPLC system. External devices include concentrators, converged terminals, smart gateways, or access network devices (such as base stations). Communication between the external devices and the CCO can be wireless, without specific limitations. The CCO sends signals to the PCO, which can then forward signals received from the CCO. For example, the PCO can forward signals from the CCO to other PCOs or STAs under that PCO. Alternatively, the PCO can forward signals from other PCOs or STAs under that PCO to the CCO.

[0095] For example, STA1, STA2, and STA3 can receive signals from CCO. PCO1 can also receive signals from CCO, and PCO1 will forward the signals to STA4, STA5, PCO2, and PCO3. PCO2 can send signals to STA6 and STA7, and PCO3 can send signals to STA8 and STA9.

[0096] The signals involved in Figure 2 can be carried in a physical layer protocol data unit (PPDU). As shown in Figure 3, a PPDU includes a preamble, frame control, and payload data. The preamble has synchronization and detection functions, and the frame control contains the control information needed to demodulate the data frame. The payload data carries the signal to be transmitted. As shown in Figure 3, a PPDU can include a preamble, frame control 1, frame control 2... frame control M_fch, data payload 1, data payload 2, data payload 3... data payload N_pld.

[0097] Currently, Turbo codes are used for both frame control and payload data channel coding in PPDUs. However, as PLCs are used in increasingly diverse applications, there is a need to further improve the performance of frame control and data payload.

[0098] In view of this, embodiments of this application provide an encoding scheme. This scheme proposes a method for constructing a reliability sequence of Polar codes, and encodes signals in a PLC system (such as an HPLC system) using Polar codes based on the reliability sequence. Since Polar codes can reach the Shannon limit, the block error rate (BLER) of the encoding can be reduced, thereby improving encoding performance. The block error rate refers to the average error rate of a transport block after cyclic redundancy check (CRC), and is an important indicator reflecting network performance and service quality.

[0099] The coding scheme provided in the embodiments of this application is described below with reference to the accompanying drawings. In the accompanying drawings corresponding to the various embodiments of this application, all steps indicated by dashed lines are optional steps.

[0100] The first device involved in the various embodiments of this application is, for example, any of the first devices shown in FIG1, any of the CCO, PCO, or STA shown in FIG2, etc. Similarly, the second device involved in the various embodiments of this application is, for example, the second device shown in FIG1, or the CCO, PCO, or STA shown in FIG2. Furthermore, as standards evolve, the names and / or functions of the devices may change, but this is not a limitation.

[0101] Please refer to Figure 4, which is a schematic diagram of an encoding method provided in an embodiment of this application. The steps illustrated in Figure 4 will be described below.

[0102] S401, The first device determines a first sequence for encoding K bits to be encoded.

[0103] The K bits to be encoded can be understood as the bits in a bit stream, bit string, or bit sequence that need to be encoded. This refers to the bit sequence before or before channel coding. For example, if the bits are sequentially 1, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, then the K bits to be encoded would be: 10101100101. The K bits to be encoded can include valid bits and check bits. Valid bits can be understood as bits carrying valid data, while check bits are used by the receiver to verify the accuracy of the valid bits. Check bits may include, for example, cyclic redundancy check (CRC) bits. The K bits to be encoded can be some or all of the bits corresponding to a PPDU, such as bits corresponding to frame control or data payload.

[0104] In the various embodiments of this application, the K bits to be encoded can be understood as K bits that need to be encoded at a certain time. The bits to be encoded can be understood as bits that need to be encoded in general. In other words, the K bits to be encoded are considered as an example of bits to be encoded.

[0105] K bits to be encoded are encoded using a first sequence. This first sequence includes N bit indices, where N is a positive integer. These N bit indices can also be referred to as, or understood as, the indices of N polarization channels. Channel polarization refers to the fact that when the code length is infinitely long, a binary symmetric channel can be polarized into two types of channels, which are called polarized channels. Polarized channels include pure noise channels with a capacity of 0, and noiseless channels with a capacity of 1. The proportion of noiseless channels is equal to the channel capacity of the original binary symmetric channel. The code length refers to the length of the bit sequence to be transmitted after encoding the bits to be encoded.

[0106] The code length corresponding to the K bits to be encoded is N, or N is the code length for encoding the K bits to be encoded. The code length of the K bits to be encoded refers to the length of the bit sequence to be transmitted obtained by encoding the K bits to be encoded. The code length is greater than or equal to the length of the K bits to be encoded, that is, N is greater than or equal to K. K is a positive integer. The length of the K bits to be encoded and the code length of the K bits to be encoded can be pre-configured by signals or signaling, or they can be obtained or calculated by the first device or the second device, for example, they can be determined based on codewords, or they can be pre-configured or pre-defined, such as predetermined by a protocol, or determined by negotiation between the first device and the second device. There is no specific limitation on this.

[0107] In this context, a codeword can be understood as an encoding method (or mode). A codeword defines at least two of the following: the length of the bit to be encoded, the code length, and the code rate. The code rate is the ratio of the length of the bit to be encoded to the code length. The code rate can be represented by R. For example, the first and second devices can determine the code length based on the codeword, the frame structure used to transmit K bits to be encoded, the number of layers, and the modulation scheme.

[0108] The method by which the first device determines the first sequence is described below.

[0109] For example, the first device may be pre-configured or pre-defined with a fourth sequence, such as by pre-configuring a fourth sequence via a protocol, or the first device may obtain the fourth sequence from the second device, etc., without specific limitations. The fourth sequence may be a bit index arranged according to reliability or reliability number, such as a bit index arranged in ascending order of reliability or reliability number. The first device can determine the first sequence based on the fourth sequence.

[0110] For example, the first device can determine N bit indices with values ​​less than or equal to the code length from the fourth sequence based on the code length, and determine the first sequence based on these N bit indices. For instance, the N bit indices can be arranged in ascending or descending order of reliability corresponding to these N bit indices to obtain the first sequence. The first sequence can be a subset of the fourth sequence. The reliability corresponding to the N bit indices refers to the reliability corresponding to the N polarization channels. The reliability of the polarization channel can be understood as a domain transformation of the signal, similar to a Fourier transform. For example, the signal can be transformed from the polarization channel index to the reliability weight domain to obtain the reliability corresponding to the polarization channel or bit index. The embodiments of this application do not specifically limit the specific method of determining the reliability.

[0111] In one possible implementation, the first device can determine the fourth sequence based on the codewords corresponding to the K bits to be encoded.

[0112] For example, the first device may be pre-configured or pre-defined with multiple candidate sequences corresponding to various codewords, i.e., multiple candidate sequences. For instance, multiple candidate sequences may be pre-configured via a protocol, or the first device may obtain multiple codewords based on the second device; no specific limitations are imposed on this. The content of the candidate sequences can refer to the content of the fourth sequence, and will not be listed here.

[0113] Optionally, multiple codewords may be included, for example, codewords 1 to 5. The names of codewords 1 to 5 may also be varied, and this embodiment does not specifically limit their use.

[0114] For example, codeword 1 defines or satisfies at least two of the following: the length of the bit to be encoded (e.g., a physical block (PB)) is 8 bytes, the code length is 128 bits, or the code rate is 1 / 2. PB is, for example, a PB in frame control or data payload. The length of the bit to be encoded (or PB) being 8 bytes can be replaced by the length of the bit to be encoded (e.g., PB) being 64 bits. For example, the first or second device can obtain the code rate based on signaling or other signals, or determine the code rate based on the codeword corresponding to K bits to be encoded. The method by which the first device determines the codeword corresponding to the K bits to be encoded can be referred to the previously discussed method for determining the code length, and will not be listed here.

[0115] Codeword 2 defines or satisfies at least two of the following: the length of the bit to be encoded (e.g., PB) is 8 bytes, the code length is 256 bits, or the code rate is 1 / 4. The length of the bit to be encoded (e.g., PB) being 8 bytes can be replaced by the length of the bit to be encoded (or PB) being 64 bits.

[0116] Codeword 3 defines or satisfies at least two of the following: the length of the bit to be encoded is 12 bytes, the code length is 256 bits, or the code rate is 3 / 8. The length of the bit to be encoded (e.g., PB) being 12 bytes can be replaced by the length of the bit to be encoded (e.g., PB) being 96 bits.

[0117] Codeword 4 defines or satisfies at least two of the following: the length of the bit to be encoded is 16 bytes, the code length is 256 bits, or the code rate is 1 / 2. The length of the bit to be encoded (e.g., PB) being 16 bytes can be replaced by the length of the bit to be encoded (e.g., PB) being 128 bits.

[0118] Codeword 5 defines or satisfies at least two of the following: the length of the bit to be encoded is 32 bytes, the code length is 512 bits, or the code rate is 1 / 2. The length of the bit to be encoded (e.g., PB) being 32 bytes can be replaced by the length of the bit to be encoded (e.g., PB) being 256 bits.

[0119] Optionally, the fourth sequence can be a sequence from any of the tables in Tables 1 to 32 below, or the fourth sequence can be a sequence arranged by bit indices from low to high reliability from any of the tables in Tables 1 to 32 below, or the fourth sequence can satisfy any of the tables in Tables 1 to 32 below.

[0120] The reliability or reliability number in any of the following tables can be used as follows: This indicates that bit indexing can be used. The following is a table representation of the fourth sequence. In reality, there are many other ways to represent the fourth sequence, such as matrices or functions. No specific limitation is made here regarding the specific form of the fourth sequence.

[0121] Table 1

[0122] Optionally, the fourth sequence shown in Table 1 can also be represented as:

[0123] Q1=[0,8,4,16,32,2,64,10,6,12,18,1,9,5,20,17,33,34,3,24,36,65,11,7,66,40,13,19,14,68,21,48,22,35,72,25 ,37,26,80,38,67,41,28,96,15,42,69,49,70,44,23,73,50,74,52,27,81,39,76,56,82,29,97,30,43,84,98,88,71,45 ,100,51,46,104,75,53,112,54,77,57,83,78,58,31,85,60,86,99,89,90,101,92,102,47,105,106,113,108,55,114,79,59,61,87,91,103,93,107,109,115,117,63,95,111,119,127,62,94,110,116,118,120,122,124,126,121,125,123]. Q1 represents the fourth sequence.

[0124] Table 2

[0125] Optionally, the fourth sequence shown in Table 2 can also be represented as:

[0126] Q1=[0,4,2,8,16,1,32,5,3,6,9,10,64,17,12,18,33,20,7,34,24,11,65,36,66,13,40,19,68,14,48,21,72,35,22,25 ,80,37,26,96,38,67,28,41,69,15,42,49,70,44,73,50,23,74,52,81,76,56,82,27,97,84,39,29,98,88,30,100,43,1 04,112,71,45,46,51,75,53,54,77,57,78,83,85,58,99,89,31,101,105,113,47,55,79,59,87,91,103,107,115,63,95,111,119,60,62,86,90,92,94,102,106,108,110,114,116,118,120,122,124,126,127,61,93,109,117,121,125,123]. Q1 represents the fourth sequence.

[0127] Table 3

[0128] Optionally, the fourth sequence shown in Table 3 can also be represented as:

[0129] Q1=[0,4,8,2,16,32,1,6,5,9,10,64,3,17,12,18,20,33,34,7,24,11,36,65,13,66,40,19,14,68,21,48,72,35,22,25 ,37,80,26,38,67,28,96,41,15,42,69,49,70,44,73,50,23,74,52,81,27,76,56,82,39,29,97,84,30,98,88,43,100,7 1,104,45,51,112,46,75,53,54,77,57,78,83,58,60,85,86,31,99,89,101,105,90,113,47,55,79,59,61,87,91,103,107,115,63,95,111,119,62,92,94,102,106,108,110,114,116,118,120,122,124,126,127,93,109,117,121,125,123]. Q1 represents the fourth sequence.

[0130] Table 4

[0131] Optionally, the fourth sequence shown in Table 4 can also be represented as:

[0132] Q1=[0,4,8,16,2,32,6,64,10,1,5,9,12,17,18,3,20,33,34,24,36,7,65,11,66,13,40,19,14,68,21,48,35,22,72,25 ,37,26,80,38,67,28,41,96,15,69,42,49,70,44,23,73,50,74,52,27,81,76,39,56,82,29,97,84,30,43,98,88,71,10 0,45,51,104,46,112,75,53,54,77,57,83,78,58,60,85,31,86,99,89,90,101,92,102,105,47,106,113,55,79,59,61,87,91,93,103,107,115,63,95,111,119,62,94,108,110,114,116,118,120,122,124,126,127,109,117,121,125,123]. Q1 represents the fourth sequence.

[0133] Table 5

[0134] Optionally, the fourth sequence shown in Table 5 can also be represented as:

[0135] Q1=[0,8,4,16,32,2,64,10,12,6,18,20,34,24,1,9,5,17,33,36,3,65,66,40,11,13,68,7,19,14,21,48,22,72,35,25 ,37,26,80,38,67,41,28,96,42,69,15,49,70,44,23,73,50,74,27,52,81,39,76,29,56,82,97,43,30,84,98,71,45,88 ,51,100,46,75,104,53,77,54,112,57,83,78,58,31,85,60,99,86,89,101,90,47,102,92,105,106,55,113,108,114,79,116,59,120,61,62,87,91,103,93,107,109,115,117,121,63,95,111,119,123,127,94,110,118,122,124,126,125]. Q1 represents the fourth sequence.

[0136] Optionally, any of the fourth sequences shown in Tables 1 to 5 above can be applied to the case of codeword 1, that is, to the case where the length to be encoded is 8 bytes (i.e., K is 64), the code rate is 1 / 2, and the code length is 128 (i.e., N is 128).

[0137] Table 6

[0138] Optionally, the fourth sequence shown in Table 6 can also be represented as:

[0139] Q2=[0,32,64,128,16,80,48,96,144,8,72,40,160,136,24,192,88,4,68,36,132,20,56,84,104,52,100,148,152,12,112,76,44,164,1 40,168,28,196,176,2,66,34,130,18,82,50,98,146,10,74,42,162 ,138,26,194,200,90,6,70,38,134,22,58,92,208,86,106,54,60,1 02,108,150,154,14,114,78,46,166,142,156,1,65,33,129,17,81,49,97,145,9,73,41,161,137,25,193,89,5,69,37,133,21,57,170,85,105,53,101,224,149,153,116,13,113,77,45,165,141,169,172,29,30,197,198,177,178,3,67,35,131,19,83,51,99,147,11,75,4 3,163,139,120,27,195,201,202,180,91,7,71,39,135,23,59,93,209,87,107,204,55,61,103,94,109,151,210,155,184,62,15,115,79,47,167,143,157,110,171,225,212,117,158,173,31,226,118,199,179,121,216,174,203,228,181,122,205,182,232,124,95,211,1 [85,63,206,111,186,240,213,159,227,119,214,188,217,175,229,123,218,230,183,220,233,125,207,234,126,187,241,236,242,215,189,244,190,219,248,231,221,222,235,127,237,243,238,245,191,246,249,250,252,223,239,247,251,253,255,254], where Q2 represents the fourth sequence.

[0140] Table 7

[0141] Table 8

[0142] Table 9

[0143] Table 10

[0144] Table 11

[0145] Table 12

[0146] Table 13

[0147] Optionally, any of the fourth sequences shown in Tables 6 to 13 above can be applied to the case of codeword 2, that is, to the case where the length to be encoded is 8 bytes (i.e., K is 64), the code rate is 1 / 4, and the code length is 256.

[0148] Table 14

[0149] Optionally, the fourth sequence shown in Table 14 can also be represented as:

[0150] Q3=[0,32,16,64,128,8,40,24,48,72,80,4,36,20,68,136,132,96,12,144,44,160,28,2,34,18,66,130,52,10,42,26,50,76,74,56,82 ,84,6,38,22,70,192,138,134,98,88,140,14,100,146,1,33,17,65 ,129,9,41,25,49,73,81,5,37,21,69,137,133,97,13,145,148,104 ,45,161,46,29,162,3,35,19,67,131,53,11,30,43,54,152,27,51,77,75,57,78,164,83,112,85,7,58,39,23,71,193,86,139,135,99,194,89,168,60,141,15,101,147,90,142,196,149,102,176,105,92,47,150,163,200,31,55,153,106,79,165,113,59,154,208,108,87 ,166,114,195,169,61,156,91,224,116,143,170,62,197,103,177,93,120,198,172,151,201,178,107,94,202,180,155,209,109,204,167,115,184,210,110,157,225,117,158,212,171,63,226,118,216,121,199,173,228,179,122,174,95,232,203,124,181,240,182,20 5,185,211,111,206,186,159,213,188,214,227,119,217,218,229,220,123,230,175,233,125,234,236,241,126,242,183,207,187,189,215,219,221,231,235,237,127,243,191,223,239,247,255,190,222,238,244,246,248,250,252,254,245,249,253,251],Q3 represents the fourth sequence.

[0151] Table 15

[0152] Table 16

[0153] Table 17

[0154] Table 18

[0155] Table 19

[0156] Table 20

[0157] Table 21

[0158] Table 22

[0159] Table 23

[0160] Optionally, any of the fourth sequences shown in Tables 14 to 23 above can be applied to codeword 3 or codeword 4, that is, when the length of the bit to be encoded is 12 bytes (i.e., K is 96), the code length is 256 bits (i.e., N is 256), and the code rate is 3 / 8; or when the length of the bit to be encoded is 16 bytes (i.e., K is 128), the code length is 256 bits (i.e., N is 256), or the code rate is 1 / 2.

[0161] Table 24

[0162] Optionally, the fourth sequence shown in Table 24 can also be represented as:

[0163] Q4＝[0,32,64,128,16,256,48,80,8,96,40,72,144,136,160,24,264,272,192,4,36,68,132,20,260,288,56,52,88,84,12,100,44,76,104,148,320,140,152,164,28,112,268,2,34,66,130,18,258,50,82,10,98,42,74,146,138,168,162,26,266,276,384,274,194,196,6,38,70,134,22,262,280,176,290,292,58,54,200,90,86,60,14,102,92,46,78,106,296,150,1,33,65,129,17,257,49,81,9,97,41,73,145,137,161,25,265,273,322,193,5,37,69,133,21,261,289,57,53,142,89,85,13,101,45,77,208,105,149,154,321,141,108,153,324,165,29,113,166,30,114,156,269,3,35,67,131,19,259,51,83,11,99,304,43,75,147,139,169,163,27,270,267,170,277,385,116,275,328,224,195,278,386,197,7,39,71,135,23,263,281,177,291,172,198,293,59,55,120,282,201,178,91,388,87,61,336,294,15,103,93,202,47,79,107,297,151,284180,62,323,143,392,94,209,155,109,298,204,325,352,167,31,115,210,184,157,305,110,271,326,400,300,171,117,329,225,158,279,306,212,387,173,118,199,330,226,416,121,283,179,389,308,216,337,174,295,203,332,228,122,390,285,181,63,312,338,393,95,448,299,205,232,124,286,182,353,394,340,211,185,111,206,327,401,354,301,240,396,186,344,159,307,213,402,302,356,119,188,331,227,214,417,309,404,217,360,175,418,333,229,310,123,391,218,408,313,339,368,449,420,334,230,220,233,125,287,183,314,450,395,341,424,234,126,207 ,316,355,452,342,241,432,397,187,345,236,456,403,303,357,242,398,346,189,464,215,244,358,348,405,190,361,480,248,419,406,311,362,219,409,369,364,421,335,410,231,370,221,315,422,412,451,372,222,425,235,127,376,317,426,453,343,318,433,42 8,454,237,434,457,238,243,436,399,458,347,460,465,245,359,349,246,466,191,481,249,407,363,365,411,371,423,413,373,223,377,427,319,429,455,435,239,437,459,461,467,247,351,483,251,367,415,375,379,431,439,463,471,487,255,383,447,479,250,2 52,254,350,366,374,378,380,382,414,430,438,440,442,444,446,462,468,470,472,474,476,478,482,484,486,488,490,492,494,496,498,500,502,504,506,508,510,495,253,381,441,445,469,473,477,485,489,493,497,501,505,509,511,443,475,491,499,507,503]. Q4 represents the fourth sequence.

[0164] Table 25

[0165] Table 26

[0166] Table 27

[0167] Table 28

[0168] Table 29

[0169] Table 30

[0170] Table 31

[0171] Table 32

[0172] Optionally, any of the fourth sequences shown in Tables 24 and 32 above can be applied to the case of codeword 5, that is, the length of the bit to be encoded is 32 bytes (i.e., K is 256), the code length is 512 bits (i.e., N is 512), and the code rate is 1 / 2.

[0173] Tables 1 through 32 above are used to encode any K bits to be encoded, without specific limitations. For example, any table in Table 14 or Table 32 can also be used to encode bits when K is 64. Similarly, any table in Table 24 or Table 32 can also be used to encode bits when K is 128 or 64, without specific limitations.

[0174] S402. The first device places K bits to be encoded according to the K bit indices in the first sequence to obtain the second sequence.

[0175] For example, the first device can determine K bit indices from the first sequence according to the reliability of N bit indices. For instance, the first device can determine the K bit indices with the highest reliability from the first sequence. Optionally, the K bit indices are a subset of the first sequence. The K bit indices can also be called an information bit set, which can be represented as InfoSet. The K bit indices can be arranged in ascending order of reliability.

[0176] For example, if the codeword of the K bits to be encoded is codeword 1, then the index InfoSet1 of the K bits can be:

[0177] {31,43,45,46,47,51,53,54,55,57,58,59,60,61,62,63,71,75,77,78,79,83,84,85,86,87,88,89,90,91,92,93,94,95,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127}.

[0178] For example, if the codeword of the K bits to be encoded is codeword 2, then the index InfoSet2 of the K bits can be:

[0179] {63,95,111,119,122,123,124,125,126,127,159,175,181,182,183,185,186,187,188,189,190,191,205,206,207,211,213,214,215,217,218,219,2 20,221,222,223,227,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255}.

[0180] For example, if the codeword of the K bits to be encoded is codeword 3, then the index InfoSet3 of the K bits can be:

[0181] {63,94,95,107,109,110,111,115,117,118,119,121,122,123,124,125,126,127,151,155,157,158,159,167,171,173,174,175,178,179,180,181,182,183,184,185,186,187,188,189,190,191,199,201,202,203,204,205,2 06,207,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255}.

[0182] For example, if the codeword of the K bits to be encoded is codeword 4, then the index InfoSet4 of the K bits can be:

[0183] {31,55,59,61,62,63,79,87,91,93,94,95,103,106,107,108,109,110,111,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127, 143,151,153,154,155,156,157,158,159,165,166,167,169,170,171,172,173,174,175,177,178,179,180,181,182,183,184,185,186,187,188,18 9,190,191,195,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224 ,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255}.

[0184] For example, if the codeword of the K bits to be encoded is codeword 5, then the index InfoSet5 of the K bits can be:

[0185] {63,95,111,119,122,123,124,125,126,127,159,175,181,182,183,185,186,187,188,189,190,191,203,205,206,207,211,213,214,215,217,218,219,220,221,222,223,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255,285,286,287,295,299,301,302,303,307,309,310,311,312,313,314,315,316,317,318,319,327,331,332,333,334,335,338,339,340,341,342,343,344,345,346,347,348,349,350,351,353,354,355,356,357,358,359,360,361,362,363,364,365,366,367,368,369,370,371,372,373,374,375,376,377,378,379,380,381,382,383,390,391,393,394,395,396,397,398,399,401,402,403,404,405,406,407,408,409,410,411,412,413,414,415,417,418,419,420,421,422,423,424,425,426,427,428,429,430,431,432,433,434,435,436,437,438,439,440,441,442,443,444,445,446,447,448,449,450,451,452,453,454,455,456,457,458,459,460,461,462,463,464,465,466,467,468,469,470,471,472,473,474,475,476,477,478,479,480,481,482,483,484,485,486,487,488,489,490,491,492,493,494,495,496,497,498,499,500,501,502,503,504,505,506,507,508,509,510,511}。 ,

[0186] After obtaining the K bit indices, K bits to be encoded can be placed based on these K bit indices to obtain the second sequence. This is equivalent to placing K bits to be encoded based on the positions corresponding to the K bit indices. Since the polarization channel corresponding to the K bit indices has high reliability, placing the K bits to be encoded in positions with high reliability ensures coding reliability and reduces the block error rate. In the N bit indices, positions other than those indicated by the K bit indices are used to place known bits or frozen bits. A frozen bit, for example, is 0. The positions used to place frozen bits can be called frozen bits.

[0187] For example, if the K bits to be encoded are 1, 0, and we take K as 2 as an example (in reality, K can take more values), the first sequence is [1, 0, 3, 2]. Here, we simplify this to a first sequence containing 4 bit indices, but in practice, there may be more. For example, if the K bit indices are [3, 2], then the K bits to be encoded are placed in the third and fourth positions. The second sequence can be represented as [0, 0, 1, 0]. Known bits or frozen bits are placed in the first and second positions of the second sequence.

[0188] S403. The first device encodes the second sequence using polar codes to obtain the third sequence.

[0189] For example, the second sequence u = [u0, u1, u2, ..., u N-1 The second sequence is input to the encoder, and the encoder performs polar code encoding on the second sequence to obtain the third sequence. The third sequence can be represented by the following formula (1).

[0190] X = uG N (1)

[0191] Where X = [x0, x1, x2, ..., x N-1 X represents the second sequence, u = [u0, u1, u2, ..., u] N-1 ], u can be considered as a second sequence, where K bits to be encoded are placed at the positions corresponding to the K bit indices, and frozen bits are placed at the positions corresponding to the K bit indices in u. G N It is an N×N matrix. It is the nth Kronecker product of matrix G2.

[0192] S404, The first device sends a signal to the second device. Correspondingly, the second device receives the signal from the first device.

[0193] For example, the first device outputs a third sequence and performs time-domain or frequency-domain processing on the third sequence, specifically, for example, modulation processing. Optionally, it may also perform at least one of the following processing methods: Inverse Fast Fourier Transform (IFFT), adding a cyclic prefix (CP), or windowing, to obtain a signal. Optionally, the first device may also perform at least one of the following processing methods: power amplification and coupling, and transmit the signal to the second device via a power line. Correspondingly, the second device receives the signal and decodes the received signal to obtain K bits to be encoded. S404 is an optional step, illustrated by dashed lines.

[0194] This application compares the effects of the encoding scheme provided in this application with the Turbo encoding scheme. The following description, in conjunction with the effect comparison figures shown in Figures 5 and 6, illustrates this. In Figures 5 and 6, the horizontal axis represents Eb / N0, where Eb / N0 is the ratio of bit energy to noise power spectrum, which is related to the signal-to-noise ratio (SNR). The vertical axis represents the block error rate.

[0195] As shown in Figure 5, curves a, b, c, d, and e represent: the relationship between bit error rate (BER) and Eb / N0 when using Turbo encoding with a code length of 16 bytes, a code length of 256, and CB=1; the relationship between BER and Eb / N0 when using polar encoding in this embodiment with a code length of 12 bytes, a code length of 256, and one code block; the relationship between BER and Eb / N0 when using polar encoding in this embodiment with a code length of 16 bytes, a code length of 256, and CB=1; the relationship between BER and Eb / N0 when using polar encoding in this embodiment with a code length of 8 bytes, a code length of 128, and CB=1; and the relationship between BER and Eb / N0 when using polar encoding in this embodiment with a code length of 8 bytes, a code length of 256, and CB=1.

[0196] As can be seen from Figure 5, compared with PB16, Turbo, R=1 / 2, and Iter15, Polar List8:

[0197] With PB = 8 bytes and code rate R = 1 / 4: the Polar encoding provided in this application embodiment is ~1.0dB@BLER = 1%;

[0198] With PB = 8 bytes and code rate R = 1 / 2: the Polar encoding provided in this application embodiment is ~0.3dB@BLER = 1%;

[0199] With PB = 12 bytes and code rate R = 3 / 8: the Polar encoding provided in this application embodiment is ~0.7dB@BLER = 1%;

[0200] With PB = 16 bytes and code rate R = 1 / 2: the Polar encoding provided in this application embodiment is ~0.4dB@BLER = 1%;

[0201] List8 contains the settings parameters for the decoder corresponding to the encoder.

[0202] As shown in Figure 6, curves a and b in Figure 6 represent the relationship between bit error rate and Eb / N0 when polar encoding is used in the embodiments of this application with a code length of 32 bytes, a code length of 512, and CB=1, and the relationship between bit error rate and Eb / N0 when Turbo encoding is used with a code length of 40 bytes, a code length of 640, and CB=1.

[0203] As shown in Figure 6, compared with PB32, Turbo, R=1 / 2, and Iter15, Polar List8 is: PB32, R=1 / 2: Polar is ~0.05dB better @ BLER=1%; Polar is ~0.2dB better @ BLER=10%.

[0204] As can be seen from Figures 5 and 6, when the length of the bit to be encoded is less than or equal to 32 bytes, the polar code provided in this application embodiment has better performance than the Turbo code, especially with an improved block error rate.

[0205] This application provides a decoding scheme. The scheme proposes a method for constructing a reliability sequence of Polar codes, and uses this reliability sequence to decode signals in a PLC system (such as an HPLC system). Since Polar codes can reach the Shannon limit, the block error rate of the encoding can be reduced, thereby improving the decoding performance. This decoding method can be applied to a second device. The second device can be the second device in the encoding flow shown in Figure 4. The implementation of the second device can refer to the content of the second device discussed above, and will not be listed here.

[0206] Please refer to Figure 7, which is a schematic diagram of a decoding method provided in an embodiment of this application. The steps illustrated in Figure 7 will be described below.

[0207] S701, The second device performs polar code decoding on the received signal to obtain the second sequence.

[0208] For example, the second device receives a signal from the first device via a power line. The second device can input the received signal into a decoder to determine a second sequence, specifically, for example, based on the above formula (1), taking the signal as X, and based on the signal and G. N This allows us to determine the second sequence. The content of the second sequence can be found in Figure 4 above, and will not be listed here again.

[0209] S702, The second device processes the second sequence based on K bit indices to obtain K bits to be encoded.

[0210] The method by which the second device determines the K bit indices can refer to the method described above for determining the K bit indices by the first device, and the content of the K bit indices can also refer to the content of the K bit indices discussed in Figure 4 above, which will not be listed here again. Based on the K bit indices, the second device determines the K bits corresponding to the K bit indices from the second sequence, thereby obtaining K bits to be encoded. The content of the K bits to be encoded can also refer to the content of the K bits to be encoded discussed in Figure 4 above.

[0211] Optionally, if the K bits to be encoded also include a check bit, the second device can also verify whether the valid bits among the K bits to be encoded are correct based on the check bit.

[0212] Based on the same concept, referring to FIG8, this application embodiment provides a communication device 800, which includes a processing unit 801 and a transceiver unit 802. The device 800 can be a communication device, or it can be an apparatus applied to a communication device that supports the communication device in executing the encoding method involved in FIG4, or the decoding method involved in FIG7. The device 800 can be any of the first or second devices mentioned above, or it can implement the functions of the first or second devices mentioned above.

[0213] The transceiver unit can also be referred to as a transceiver module, transceiver, transceiver machine, transceiver device, etc. The processing unit can also be referred to as a processor, processing board, processing unit, processing device, etc. Optionally, the device in the transceiver unit used to implement the receiving function can be considered as a receiving unit. It should be understood that the transceiver unit is used to execute the sending and receiving operations of the communication device in the above method embodiments, and the device in the transceiver unit used to implement the sending function can be considered as a sending unit; that is, the transceiver unit includes a receiving unit and a sending unit.

[0214] Furthermore, if the device is implemented using a chip / chip circuit, the transceiver unit can be an input / output circuit and / or a communication interface, performing input operations (corresponding to the aforementioned receiving operations) and output operations (corresponding to the aforementioned sending operations); the processing unit is an integrated processor, microprocessor, or integrated circuit.

[0215] The following describes in detail the implementation of this device 800 in both the transmitting and receiving ends.

[0216] By way of example, when the device 800 is applied to the transmitting end, the operations performed by its various units will be described in detail.

[0217] In one possible embodiment, the communication device 800 can be applied to the first device or implement the functions of the first device, and execute the methods performed by the first device, specifically, for example, the methods performed by the first device in the embodiment shown in FIG4 above.

[0218] For example, processing unit 801 is used to execute steps S401 to S403. Optionally, transceiver unit 802 is used to execute step S404.

[0219] By way of example, when the device 800 is applied to the receiving end, the operations performed by its various units will be described in detail.

[0220] In one possible embodiment, the communication device 800 can be applied to the second device or implement the functions of the second device, executing the methods performed by the second device, specifically, for example, the methods performed by the second device in the embodiment shown in FIG7 above.

[0221] For example, processing unit 801 is used to execute steps S701 and S702.

[0222] Based on the same concept, as shown in FIG9, this application provides a communication device 900. The communication device 900 includes a processor 910. Optionally, the communication device 900 may further include a memory 920 for storing instructions executed by the processor 910, or storing input data required for the processor 910 to execute instructions, or storing data generated after the processor 910 executes instructions. The processor 910 can implement the method embodiments described in FIG4 or FIG7 using the instructions stored in the memory 920.

[0223] In various embodiments of this application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components, and may implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.

[0224] In various embodiments of this application, the memory can be non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), or it can be volatile memory, such as random-access memory (RAM). The memory can also be any other medium capable of carrying or storing desired program code in the form of instructions or data structures, and accessible by a computer, but is not limited thereto. The memory in the embodiments of this application can also be a circuit or any other device capable of implementing storage functions, used to store computer programs, computer program or instruction and / or data.

[0225] Based on the same concept, as shown in FIG10, this application embodiment provides a communication device 1000, which may be a chip or a chip system. Optionally, in this application embodiment, the chip system may be composed of chips, or may include chips and other discrete devices.

[0226] The communication device 1000 may include at least one processor 1010 coupled to a memory. Optionally, the memory may be located within or outside the device. For example, the communication device 1000 may also include at least one memory 1020. The memory 1020 stores computer programs, configuration information, computer programs or instructions, and / or data necessary for implementing any of the above embodiments. The processor 1010 may execute the computer programs stored in the memory 1020 to complete the method embodiments described in FIG4 or FIG7. Optionally, the memory may also be integrated with the processor.

[0227] The coupling in this embodiment is an indirect coupling or communication connection between devices, units, or modules, which can be electrical, mechanical, or other forms, used for information exchange between devices, units, or modules. The processor 1010 may operate in conjunction with the memory 1020. This embodiment does not limit the specific connection medium between the transceiver 1030, processor 1010, and memory 1020.

[0228] The communication device 1000 may also include a transceiver 1030, through which the communication device 1000 can interact with other devices. The transceiver 1030 may be a circuit, a bus, a transceiver, or any other device that can be used for information interaction, or a signal transceiver unit. As shown in Figure 10, the transceiver 1030 includes a transmitter 1031, a receiver 1032, and an antenna 1033. Furthermore, when the communication device 1000 is a chip-type device or circuit, the transceiver in the communication device 1000 may also be an input / output circuit and / or a communication interface, capable of inputting data (or receiving data) and outputting data (or transmitting data). The processor may be an integrated processor, a microprocessor, or an integrated circuit, and the processor can determine the output data based on the input data.

[0229] In one possible implementation, the communication device 1000 can be applied to a communication device. Specifically, the communication device 1000 can be a communication device or a device capable of supporting a communication device and implementing the functions of the first or second device in the method embodiments of FIG4 or FIG7. The memory 1020 stores the necessary computer programs, computer programs or instructions and / or data for implementing the functions of the first or second device in the method embodiments of FIG4 or FIG7. The processor 1010 can execute the computer program stored in the memory 1020 to complete the method performed by the first or second device in the method embodiments of FIG4 or FIG7.

[0230] Based on the same concept, referring to FIG11, this application embodiment also provides another communication device 1100, including: an input / output interface 1110 and a logic circuit 1120; the input / output interface 1110 is used to receive code instructions and transmit them to the logic circuit 1120; the logic circuit 1120 is used to run the code instructions to execute the method executed by the first device or the second device in any of the above embodiments.

[0231] The following is a detailed description of the operation performed by the device 1100 when applied to the first or second device.

[0232] In one possible embodiment, the communication device 1100 can be applied to the first device to execute the method performed by the first device, specifically, for example, the method performed by the first device in the embodiment shown in FIG4 or FIG7.

[0233] Since the communication device 1100 provided in this embodiment can be applied to the first device to execute the method performed by the first device, the technical effects it can achieve can be referred to the above method embodiment, and will not be repeated here.

[0234] In another possible embodiment, the communication device 1100 can be applied to a second device to execute the methods performed by the second device, specifically, for example, the methods performed by the second device in the embodiments shown in FIG4 or FIG7.

[0235] Since the communication device 1100 provided in this embodiment can be applied to the second device to execute the method performed by the second device, the technical effects it can achieve can be referred to the above method embodiment, and will not be repeated here.

[0236] Based on the same concept, this application also provides a communication system. The system includes at least one first device and at least one second device. The function of any of the at least one first device can be referred to the function of the first device involved in FIG4 or FIG7, and the function of any of the at least one second device can be referred to the function of the second device involved in FIG4 or FIG7. The technical effects obtained can be referred to the above method embodiments, and will not be repeated here.

[0237] Based on the same concept, embodiments of this application also provide a computer-readable storage medium storing a computer program or instructions, which, when executed, cause the method performed by the communication device in any of the above embodiments to be implemented. The computer-readable storage medium may include various media capable of storing program code, such as a USB flash drive, portable hard drive, read-only memory, random access memory, magnetic disk, or optical disk.

[0238] In order to realize the functions of the communication device shown in Figures 8 to 11, this application embodiment also provides a chip, including a processor, for supporting the communication device to realize the functions involved in the first or second device in the above method embodiment.

[0239] In one possible design, the chip is connected to a memory or the chip includes a memory for storing computer programs or instructions and data necessary for the first or second device.

[0240] Based on the same concept, embodiments of this application provide a computer program product. When a computer reads and executes the computer program product, it causes the computer to perform the method in any possible implementation of Figure 4 or Figure 7. The computer program product includes computer programs and / or instructions, etc.

[0241] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0242] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer programs or instructions. These computer programs or instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or one or more blocks of the block diagrams.

[0243] These computer programs or instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0244] These computer programs or instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

Claims

1. An encoding method, characterized in that, A first device applied in a power line carrier communication PLC system, the method comprising: A first sequence is determined for encoding K bits to be encoded. The first sequence includes N bit indices, which are arranged according to their reliability. N is the code length corresponding to the K bits to be encoded. N and K are both positive integers, and N is greater than or equal to K. Based on the K bit indices in the first sequence, place the K bits to be encoded to obtain the second sequence; The second sequence is polarized to obtain the third sequence.

2. A decoding method, characterized in that, A second device applied in a power line carrier communication PLC system, the method comprising: The received signal is polarized to obtain the second sequence; Based on the K bit indices, the second sequence is processed to obtain K bits to be encoded, where: The K bit indices belong to a first sequence, which includes N bit indices. The N bit indices are arranged according to their reliability. N is the code length corresponding to the K bits to be encoded. Both N and K are positive integers, and N is greater than or equal to K.

3. The method according to claim 1 or 2, characterized in that, The first sequence is a subset of the fourth sequence, which contains N. max A bit index, the N max The bit index in the fourth sequence is according to the N... max The reliability corresponding to each bit index is arranged from low to high, and the N... max It is a positive integer greater than or equal to N.

4. The method according to claim 3, characterized in that, The fourth sequence is a sequence corresponding to one of the following codewords, wherein the codeword satisfies one of the following conditions: The length of the bit to be encoded is 8 bytes, the code length is 128 bits, and the code rate is 1 / 2; The length of the bit to be encoded is 8 bytes, the code length is 256 bits, and the code rate is 1 / 4; The length of the bit to be encoded is 12 bytes, the code length is 256 bits, and the code rate is 3 / 8; The length of the bit to be encoded is 16 bytes, the code length is 256 bits, and the code rate is 1 / 2; or, The length of the bit to be encoded is 32 bytes, the code length is 512 bits, and the code rate is 1 / 2.

5. The method according to claim 3 or 4, characterized in that, The fourth sequence is the sequence shown in the table below:

6. The method according to claim 5, characterized in that, K is 64 and N is 128.

7. The method according to claim 3 or 4, characterized in that, The fourth sequence is the sequence in the following table:

8. The method according to claim 7, characterized in that, K is 64 and N is 256.

9. The method according to claim 3 or 4, characterized in that, The fourth sequence is the sequence in the following table:

10. The method according to claim 9, characterized in that, The K is 96 and the N is 256; or the K is 128 and the N is 256.

11. The method according to claim 3 or 4, characterized in that, The fourth sequence is the sequence in the table below:

12. The method according to claim 11, characterized in that, K is 256 and N is 512.

13. The method according to any one of claims 3-12, characterized in that, The N bit indices are the N bit indices in the fourth sequence whose bit indices are less than N.

14. The method according to any one of claims 1-13, characterized in that, The N bit indices are arranged from low to high reliability.

15. The method according to any one of claims 1-14, characterized in that, The K bit indices are determined from the first sequence based on reliability sorting.

16. The method according to claim 15, characterized in that, The K bit indices are the K bit indices of the reliability values ​​that appear first in the first sequence.

17. The method according to any one of claims 1-16, characterized in that, The K bits to be encoded include cyclic redundancy check bits.

18. The method according to any one of claims 1-17, characterized in that, The third sequence is represented as: X = uG N Where X = [x0, x1, x2, ..., x N-1 X represents the second sequence, u = [u0, u1, u2, ..., u] N-1 In u, the K bits to be encoded are placed at the positions corresponding to the K bit indices. In u, except for the positions corresponding to the K bit indices where frozen bits are placed, G... N It is an N×N matrix. It is the nth Kronecker product of matrix G2.

19. The method according to any one of claims 1 and 3-18, characterized in that, The method further includes: The third sequence is processed in the frequency domain or time domain to obtain a signal; The signal is transmitted to the second device via the power line.

20. A communication device, characterized in that, It includes one or more processors, said one or more processors for executing computer programs or instructions in memory, such that the communication device implements the method as described in any one of claims 1 and 3-19, or implements the method as described in any one of claims 2 and 3-18.

21. A computer program product, characterized in that, When the computer program product is executed, it causes the processor to perform the method as described in any one of claims 1 and 3-19, or to implement the method as described in any one of claims 2 and 3-18.

22. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions that, when executed by a communication device, implement the method as described in any one of claims 1 and 3-19, or the method as described in any one of claims 2 and 3-18.

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