Signal conversion device and signal conversion method

Abstract

This signal conversion device comprises: a first signal reception unit that receives a first signal used in a first network; a data deletion unit that generates a second signal by deleting a portion of data from the first signal received by the first signal reception unit; a first signal generation unit that generates a third signal used in a second network by packetizing the second signal generated by the data deletion unit; and a first signal transmission unit that transmits the third signal generated by the first signal generation unit to the second network.

Description

Signal conversion device and signal conversion method

[0001] The present invention relates to a signal conversion device and a signal conversion method.

[0002] To reduce the procurement costs of optical transport networks, there has been a growing movement to standardize long-distance optical transmission interfaces and enable interoperability between different vendors. In particular, for relatively short-distance communication applications, such as between data centers, standards such as OIF 400ZR and OpenZR+ MSA, which can be implemented in compact pluggable modules, have become mainstream compared to conventional OTN (Optical Transport Network) standards such as ITU-T Recommendations G.709 and G.709.1. These standards do not accommodate various client signals, but only Ethernet at rates of 100 Gbps or higher. They also eliminate intermediate frames such as ODU (Optical Channel Data Unit) and directly accommodate Ethernet in a transmission frame (FlexO) to reduce bit rates. They also utilize overhead (OH) to enable simplified management and monitoring functions.

[0003] Non-Patent Document 1 discloses a circuit emulation technique. Fig. 14 is a diagram showing an overview of processing by the circuit emulation technique disclosed in Non-Patent Document 1. In the circuit emulation technique, an SDH (Synchronous Digital Hierarchy) signal A1, which is a line signal as shown in Fig. 14(A), is divided into multiple signals B1, B2, B3, and B4 as shown in Fig. 14(B). Then, by adding an OH (Overhead) to the beginning of each of the multiple signals B1, B2, B3, and B4 as shown in Fig. 14(B), multiple signals C1, C2, C3, and C4 used in the second network are generated.

[0004] IETF, RFC4842, April 2007

[0005] However, when using the Circuit Emulation technology disclosed in Non-Patent Document 1, the bit rate of OTN (first network) is higher than the bit rate of Ethernet (second network), which poses a problem that OTN signals used in OTN cannot be converted into MAC (Media Access Control) frames used in Ethernet. As a specific example, the bit rate of 100G-class ODU4 is approximately 104.8 Gbit / s, which exceeds the bit rate (100 Gbit / s) of 100GbE MAC frames.

[0006] The present invention aims to provide a technology that can convert a signal used in a first network into a signal used in a second network, even if the bit rate of the first network is higher than the bit rate of the second network.

[0007] One aspect of the present invention is a signal conversion device comprising: a first signal receiving unit that receives a first signal used in a first network; a data reduction unit that generates a second signal by reducing some of the data of the first signal received by the first signal receiving unit; a first signal generating unit that generates a third signal used in a second network by packetizing the second signal generated by the data reduction unit; and a first signal transmitting unit that transmits the third signal generated by the first signal generating unit to the second network.

[0008] Another aspect of the present invention is a signal conversion method having a signal receiving process for receiving a first signal used in a first network, a data reduction process for generating a second signal by reducing some data of the first signal received in the signal receiving process, a signal generation process for generating a third signal used in a second network by packetizing the second signal generated in the data reduction process, and a signal transmission process for transmitting the third signal generated in the signal generation process to the second network.

[0009] According to the present invention, even if the bit rate of the first network is higher than the bit rate of the second network, a signal used in a first network can be converted into a signal used in a second network.

[0010] FIG. 1 is a schematic block diagram showing the configuration of a signal conversion device according to a first embodiment of the present invention. FIG. 2 is a diagram for explaining the processing of a bandwidth reduction unit and a packet accommodating unit according to the first embodiment of the present invention. FIG. 3 is a diagram for explaining the processing of a packet receiving unit and a frame reconstructing unit according to the first embodiment of the present invention. FIG. 4 is a schematic block diagram showing the configuration of a signal conversion device according to a second embodiment of the present invention. FIG. 5 is a diagram for explaining the processing of a bandwidth reduction unit, a TS separation unit, and a packet accommodating unit according to the second embodiment of the present invention. FIG. 6 is a diagram for explaining the processing of a packet receiving unit, a TS combination unit, and a frame reconstructing unit according to the second embodiment of the present invention. FIG. 7 is a schematic block diagram showing the configuration of a signal conversion device 100c according to a third embodiment of the present invention. FIG. 8 is a diagram for explaining the processing of a bandwidth control unit, a packet observation unit, and a buffer amount control unit according to the third embodiment. FIG. 9 is a diagram for explaining the processing of a bandwidth control unit, a packet observation unit, and a buffer amount control unit according to the third embodiment. FIG. 10 is a schematic block diagram showing the configuration of a signal conversion device according to a fourth embodiment of the present invention. FIG. 11 is a diagram for explaining a first clock information transfer method according to the fourth embodiment. FIG. 12 is a diagram for explaining a first clock information transfer method according to the fourth embodiment. FIG. 13 is a diagram for explaining a second clock information transfer method according to the fourth embodiment. FIG. 14 is a diagram showing an overview of processing using Circuit Emulation technology disclosed in Non-Patent Document 1.

[0011] Hereinafter, first to fourth embodiments of the present invention will be described with reference to the drawings.

[0012] First Embodiment First, a first embodiment of the present invention will be described. Fig. 1 is a schematic block diagram showing the configuration of a signal conversion device 100a according to the first embodiment of the present invention.

[0013] The signal conversion device 100a includes a device management control unit 10a, a memory unit 20a, an OTN signal receiving unit 30a, a bandwidth reduction unit 31a, a packet accommodating unit 32a, a packet transmitting unit 33a, a packet receiving unit 40a, a packet processing unit 41a, a frame reconstruction unit 42a, and an OTN signal transmitting unit 43a.

[0014] The device management control unit 10a includes a CPU (Central Processing Unit) and controls each unit constituting the signal conversion device 100a. That is, the device management control unit 10a controls the storage unit 20a, the OTN signal receiving unit 30a, the bandwidth reducing unit 31a, the packet accommodating unit 32a, the packet transmitting unit 33a, the packet receiving unit 40a, the packet processing unit 41a, the frame reconstructing unit 42a, and the OTN signal transmitting unit 43a.

[0015] The storage unit 20a includes semiconductor memories such as RAM (Random Access Memory) and ROM (Read Only Memory), and stores data transmitted and received by the signal conversion device 100a, data required to drive the signal conversion device 100a, and the like.

[0016] The OTN signal receiving unit 30a is connected to the bandwidth reducing unit 31a. The OTN signal receiving unit 30a receives an OTN signal from a device (not shown) connected to a network using an OTN (Optical Transport Network), via the network using the OTN, and outputs the OTN signal to the bandwidth reducing unit 31a. The OTN signal receiving unit 30a receives, for example, a 100G-class OTN signal (OTU4) consisting of 80 TSs (Tributary Slots). In the case of OTU4, one TS has a transmission capacity of approximately 1.3 Gbit / s and is used to multiplex and accommodate low-speed signals.

[0017] The band reduction unit 31a is connected to the OTN signal receiving unit 30a and the packet accommodating unit 32a. The OTN signal is input to the band reduction unit 31a from the OTN signal receiving unit 30a. The band reduction unit 31a deletes some of the multiple TSs included in the input OTN signal and outputs the signal to the packet accommodating unit 32a. For example, the band reduction unit 31a deletes the 76th to 80th TSs located in the payload area out of the 80 TSs included in the OTN signal.

[0018] The packet accommodating unit 32a is connected to the bandwidth reducing unit 31a and the packet transmitting unit 33a. An OTN signal from which the 76th to 80th TSs have been deleted out of the 80 TSs is input to the packet accommodating unit 32a. The packet accommodating unit 32a accommodates the input OTN signal in a MAC frame used in Ethernet and outputs the frame to the packet transmitting unit 33a.

[0019] The packet transmitting unit 33a is connected to the packet accommodating unit 32a. MAC frames used in Ethernet are input to the packet transmitting unit 33a from the packet accommodating unit 32a. The packet transmitting unit 33a transmits the input MAC frames as Ethernet signals. The packet transmitting unit 33a may transmit the MAC frames to a ZR / ZR+ optical module or a Layer 2 network.

[0020] In addition, by performing processing by the OTN signal receiving unit 30a, the bandwidth reduction unit 31a, the packet accommodating unit 32a, and the packet transmitting unit 33a, the data of a portion of the OTN signal (for example, a portion of the payload area) can be reduced to lower the bit rate, and then the signal can be accommodated in a MAC frame and transmitted via a network using Ethernet.

[0021] The packet receiving unit 40a is connected to the packet processing unit 41a. The packet receiving unit 40a receives a MAC frame transmitted by a packet transmitting unit 33a of another signal conversion device 100a connected to the network using Ethernet, via the network using Ethernet, and outputs the MAC frame to the packet processing unit 41a.

[0022] The packet processing unit 41a is connected to the packet receiving unit 40a and the frame reconstructing unit 42a. The packet processing unit 41a receives a MAC frame as input from the packet receiving unit 40a. The packet processing unit 41a extracts a bandwidth-reduced OTN signal from the input MAC frame payload and outputs the OTN signal to the frame reconstructing unit 42a.

[0023] The frame reconstruction unit 42a is connected to the packet processing unit 41a and the OTN signal transmission unit 43a. For example, a bandwidth-reduced OTN signal including the 1st to 75th TSs is input to the frame reconstruction unit 42a from the packet processing unit 41a. The frame reconstruction unit 42a reconstructs the OTN signal by padding the 76th to 80th TSs to the input OTN signal including the 1st to 75th TSs, that is, by adding the 76th to 80th TSs, and outputs the OTN signal to the OTN signal transmission unit 43a.

[0024] The OTN signal transmitting unit 43a is connected to the frame reconstructing unit 42a. For example, an OTN signal including the 1st to 80th TSs is input to the OTN signal transmitting unit 43a from the frame reconstructing unit 42a. The OTN signal transmitting unit 43a transmits the input OTN signal to a device (not shown) connected to the OTN.

[0025] Fig. 2 is a diagram for explaining the processing of the bandwidth reduction unit 31a and the packet accommodating unit 32a according to the first embodiment of the present invention. Here, a case will be explained in which an ODU (Optical channel Data Unit) shown in Fig. 2A is input as an OTN signal from the OTN signal receiving unit 30a to the bandwidth reduction unit 31a in Fig. 1. The ODU shown in Fig. 2A includes areas such as FA, OTU OH, ODU OH, OPU OH, and Payload.

[0026] The bandwidth reduction unit 31a sets a part of the payload area of ​​the ODU shown in Fig. 2A as a deletion target area D11. Then, the bandwidth reduction unit 31a performs bandwidth reduction by deleting the set deletion target area D11 from the ODU shown in Fig. 2A, thereby generating the signal shown in Fig. 2B.

[0027] Next, the packet accommodating unit 32a generates the MAC frame shown in Fig. 2C by adding OH and FCS data before and after the signal shown in Fig. 2B generated by the bandwidth reduction unit 31a. Note that Fig. 2A describes the case where the bandwidth reduction unit 31a deletes part of the ODU payload, but this is not limited to this. For example, the bandwidth reduction unit 31a may delete at least part of the time slot, frame sequence, byte, bit, and OH area.

[0028] 3 is a diagram illustrating the processing of the packet receiving unit 40a and the frame reconstruction unit 42a according to the first embodiment of the present invention. Here, a case will be described in which the packet receiving unit 40a receives some of the multiple MAC frames shown in FIG. 3C, but is unable to receive all of the remaining frames due to a timeout. Each of the multiple MAC frames shown in FIG. 3C includes an OH, Payload, and FCS area.

[0029] The frame reconstruction unit 42a generates a bandwidth-reduced ODU frame as shown in Figure 3(B) by replacing the area of ​​the ODU frame that was transmitted in the MAC frame that could not be received in its entirety due to a timeout in Figure 3(C) with dummy data, and further generates the ODU frame as shown in Figure 3(A) by padding the bandwidth-reduced TS.

[0030] By performing such processing in the frame reconstruction unit 42a, even if the MAC frame times out at the receiving end due to delay fluctuations, communication can be continued by supplementing with dummy data.

[0031] In order to fit the OTN signal with a portion of the band deleted into the bit rate of the MAC frame, for example, an interframe gap (IFG) may be inserted between the multiple MAC frames to be generated. Also, the length of the MAC frame may be made variable, and padding may be performed on the portion where the bit rate is insufficient.

[0032] 3A and 3B, the case where the frame reconstruction unit 42a performs padding processing has been described, but the padding data may be a fixed pattern such as All-0, All-1, or 0101. Alternatively, the padding data may be random data such as PRBS31. When random data such as PRBS31 is used, the possibility of restoring the transmitted data remains.

[0033] In the first embodiment described above, the signal conversion device 100a includes an OTN signal receiving unit 30a (also referred to as a first signal receiving unit) that receives an OTN signal (also referred to as a first signal) used in an OTN (also referred to as a first network). The signal conversion device 100a also includes a bandwidth reduction unit 31a (also referred to as a data reduction unit) that generates an OTN signal (also referred to as a second signal) as shown in FIG. 2B by reducing part of the data (e.g., the deletion target area D11 in FIG. 2A) from the OTN signal received by the OTN signal receiving unit 30a. The signal conversion device 100a also includes a packet accommodating unit 32a (also referred to as a first signal generating unit) that packetizes the OTN signal generated by the bandwidth reduction unit 31a to generate a MAC frame (also referred to as a third signal) used in a network using Ethernet (also referred to as a second network). The signal conversion device 100a also includes an OTN signal transmission unit 43a (also referred to as a first signal transmission unit) that transmits the MAC frame generated by the packet accommodating unit 32a to a network that uses Ethernet.

[0034] As a result, the signal conversion device 100a according to the first embodiment can convert a signal used in an OTN into a signal used in a network using Ethernet, even if the bit rate of the OTN is higher than the bit rate of a network using Ethernet.

[0035] In the first embodiment described above, the signal conversion device 100a includes a packet receiving unit 40a (also referred to as a second signal receiving unit) that determines whether a MAC frame (also referred to as a fourth signal) used in a network using Ethernet (also referred to as a second network) could not be received due to a timeout. The signal conversion device 100a also includes a frame reconstructing unit 42a (also referred to as a second signal generating unit) that generates an OTN signal (also referred to as a fifth signal) such as that shown in FIG. 3A by adding predetermined padding data to the MAC frame when the packet receiving unit 40a determines that the MAC frame could not be received due to a timeout. The signal conversion device 100a also includes an OTN signal transmitting unit 43a (also referred to as a second signal transmitting unit) that transmits the OTN signal generated by the frame reconstructing unit 42a to the network using OTN (also referred to as a first network).

[0036] As a result, even if a timeout occurs at the receiving end of a MAC frame, the signal conversion device 100a according to the first embodiment can limit the scope of the effect.

[0037] Second Embodiment Next, a second embodiment of the present invention will be described. Fig. 4 is a schematic block diagram showing the configuration of a signal conversion device 100b according to the second embodiment of the present invention.

[0038] The signal conversion device 100b includes a device management control unit 10b, a memory unit 20b, an OTN signal receiving unit 30b, a bandwidth reduction unit 31b, packet accommodating units 32b-1, 32b-2, ..., 32b-10, a packet transmitting unit 33b, a TS separation unit 34b, a packet multiplexing unit 35b, a packet receiving unit 40b, packet processing units 41b-1, 41b-2, ..., 41b-10, an OTN signal transmitting unit 43b, a TS combination unit 45b, and a frame reconstruction unit 42b.

[0039] The device management control unit 10b includes a CPU (Central Processing Unit) and controls the components of the signal conversion device 100b. That is, the device management control unit 10b controls the storage unit 20b, the OTN signal receiving unit 30b, the bandwidth reduction unit 31b, the packet accommodating units 32b-1, 32b-2, ..., 32b-10, the packet transmitting unit 33b, the TS separation unit 34b, the packet multiplexing unit 35b, the packet receiving unit 40b, the packet processing units 41b-1, 41b-2, ..., 41b-10, the OTN signal transmitting unit 43b, the TS combining unit 45b, and the frame reconstruction unit 42b.

[0040] The storage unit 20b includes semiconductor memories such as RAM (Random Access Memory) and ROM (Read Only Memory), and stores data transmitted and received by the signal conversion device 100b, data required to drive the signal conversion device 100b, and the like.

[0041] The OTN signal receiving unit 30b is connected to the bandwidth reducing unit 31b. The OTN signal receiving unit 30b receives an OTN signal from a device (not shown) connected to a network using an OTN (Optical Transport Network), via the network using an OTN, and outputs the OTN signal to the bandwidth reducing unit 31b. The OTN signal receiving unit 30b receives an OTN signal consisting of, for example, 80 TSs (Tributary Slots).

[0042] The band reduction unit 31b is connected to the OTN signal receiving unit 30b and the TS separation unit 34b. The OTN signal is input to the band reduction unit 31b from the OTN signal receiving unit 30b. The band reduction unit 31b deletes some of the multiple TSs included in the input OTN signal and outputs the resulting signal to the TS separation unit 34b. For example, the band reduction unit 31b deletes the 76th to 80th TSs located in the payload area from among the 80 TSs included in the OTN signal.

[0043] The TS separation unit 34b is connected to the bandwidth reduction unit 31b and the packet accommodating units 32b-1, 32b-2, ..., 32b-10. The TS separation unit 34b groups the OTN signal including 75 TSs input from the bandwidth reduction unit 31b and outputs them to the packet accommodating units 32b-1, 32b-2, ..., 32b-10. For example, the first eight TSs are used to create nine groups, and the remaining three TSs create one group.

[0044] The packet accommodating units 32b-1, 32b-2, ..., 32b-10 are connected to the TS separation unit 34b and the packet multiplexing unit 35b. TSs grouped into groups of eight are input to the packet accommodating units 32b-1, 32b-2, ..., 32b-10. The packet accommodating units 32b-1, 32b-2, ..., 32b-10 accommodate the input grouped TSs in MAC frames used in Ethernet and output them to the packet multiplexing unit 35b.

[0045] The packet multiplexing unit 35b is connected to the packet accommodating units 32b-1, 32b-2, ..., 32b-10 and the packet transmitting unit 33b. MAC frames are input to the packet multiplexing unit 35b from each of the packet accommodating units 32b-1, 32b-2, ..., 32b-10. The packet multiplexing unit 35b multiplexes the input MAC frames into a single signal and outputs the signal to the packet transmitting unit 33b.

[0046] The packet transmitter 33b is connected to the packet multiplexer 35b. MAC frames used in Ethernet are input to the packet transmitter 33b from the packet multiplexer 35b. The packet transmitter 33b transmits the input MAC frames as Ethernet signals. The packet transmitter 33b may also transmit the MAC frames to a ZR / ZR+ optical module or a Layer 2 network.

[0047] In addition, by performing processing by the OTN signal receiving unit 30b, the bandwidth reduction unit 31b, the TS separation unit 34b, the packet accommodating units 32b-1, 32b-2, ..., 32b-10, the packet multiplexing unit 35b, and the packet transmitting unit 33b, it is possible to reduce the data of a portion of the OTN signal (for example, a portion of the payload area) to lower the bit rate, and then accommodate it in a MAC frame and transmit it via a network using Ethernet.

[0048] The packet receiving unit 40b is connected to the packet separating unit 44b. The packet receiving unit 40b receives MAC frames transmitted by a packet transmitting unit 33b of another signal conversion device 100b connected to the network using Ethernet, via the network using Ethernet, and outputs the MAC frames to the packet separating unit 44b.

[0049] The packet separator 44b is connected to the packet receiver 40b and the packet processors 41b-1, 41b-2, ..., 41b-10. MAC frames are input to the packet separator 44b from the packet receiver 40b. The packet separator 44b separates the input MAC frames into groups made up of TSs and outputs them to the packet processors 41b-1, 41b-2, ..., 41b-10.

[0050] The packet processing units 41b-1, 41b-2, ..., 41b-10 are connected to the packet separation unit 44b and the TS combination unit 45b. MAC frames related to groups made up of TSs are input to the packet processing units 41b-1, 41b-2, ..., 41b-10 from the packet separation unit 44b. Each of the packet processing units 41b-1, 41b-2, ..., 41b-10 performs reception processing on the input group and outputs each of the grouped TS signals to the TS combination unit 45b.

[0051] The TS combining unit 45b is connected to the packet processing units 41b-1, 41b-2, ..., 41b-10 and the frame reconstruction unit 42b. The TS combining unit 45b receives grouped TS signals from each of the packet processing units 41b-1, 41b-2, ..., 41b-10. The TS combining unit 45b combines the input signals to generate a bandwidth-reduced OTN signal and outputs it to the frame reconstruction unit 42b.

[0052] The frame reconstruction unit 42b is connected to the TS combination unit 45b and the OTN signal transmission unit 43b. The band-reduced OTN signal is input to the frame reconstruction unit 42b from the TS combination unit 45b. The frame reconstruction unit 42b reconstructs the OTN signal by padding the 76th to 80th TSs that were deleted by the band reduction, that is, by adding the 76th to 80th TSs, and outputs the OTN signal to the OTN signal transmission unit 43b.

[0053] The OTN signal transmitting unit 43b is connected to the frame reconstructing unit 42b. For example, an OTN signal including the 1st to 80th TSs is input to the OTN signal transmitting unit 43b from the frame reconstructing unit 42b. The OTN signal transmitting unit 43b transmits the input OTN signal to a device (not shown) connected to the OTN via a network that uses OTN.

[0054] 5 is a diagram for explaining the processing of the bandwidth reduction unit 31b, TS separation unit 34b, and packet accommodation units 32b-1, ..., 32b-10 according to the second embodiment of the present invention. Here, a case will be explained in which an ODU (Optical channel Data Unit) shown in (A) of Fig. 5 is input as an OTN signal from the OTN signal receiving unit 30b to the bandwidth reduction unit 31b in Fig. 4. The ODU shown in (A) of Fig. 5 includes areas such as FA, OTU OH, ODU OH, OPU OH, and Payload.

[0055] The bandwidth reduction unit 31b sets a part of the payload area of ​​the ODU shown in Fig. 5A as a deletion target area D21. Then, the bandwidth reduction unit 31b performs bandwidth reduction by deleting the set deletion target area D21 from the ODU shown in Fig. 5A, thereby generating the signal shown in Fig. 5B.

[0056] Next, the TS separation unit 34b generates the multiple signals shown in Fig. 5C by grouping the signals shown in Fig. 5B by predetermined TSs. Next, each of the packet accommodating units 32b-1, ..., 32b-10 converts the multiple signals shown in Fig. 5C into multiple MAC frames by attaching a predetermined OH (MAC OH) to each of the signals.

[0057] 6 is a diagram for explaining the processing of the packet receiving unit 40b, TS combining unit 45b, and frame reconstructing unit 42b according to the second embodiment of the present invention. Here, a case will be explained in which the packet receiving unit 40b was able to receive some of the multiple MAC frames shown in FIG. 6D, but was unable to receive all of the remaining frames due to a timeout.

[0058] The TS combining unit 45b replaces the TS data related to the MAC frame that was not fully received due to a timeout in FIG. 6D with dummy data, thereby generating a signal as shown in FIG. 6C.

[0059] In this way, by padding the TS data related to the MAC frame whose reception by the packet receiver 40b has timed out, the impact can be limited to a specific tributary port (client signal). Furthermore, path monitoring's BIP8 (Bit Interleaved Parity-Level 8) detects errors, but suppresses them when a timeout is detected. Instead, the FCS is used to confirm that there are no errors. Furthermore, TS identification is performed by inserting MAC OH or identification information into the payload area of ​​the MAC frame.

[0060] In the second embodiment, the TS separation unit 34b (also referred to as the first signal generation unit) groups multiple TSs included in a signal (also referred to as the second signal) such as that shown in FIG. 5B generated by the bandwidth reduction unit 31b (also referred to as the data reduction unit), and then generates a MAC frame (also referred to as the third signal). That is, groups are created using TSs (Tributary Slots), and the payload area of ​​the MAC frame is composed of only signals belonging to the same group. As a result, even if reception of a MAC frame times out at the receiving end, the TS portion can be padded with dummy data, allowing communication to continue without signal loss and minimizing the impact.

[0061] [Third Embodiment] Next, a third embodiment of the present invention will be described below. Fig. 7 is a schematic block diagram showing the configuration of a signal conversion device 100c according to the third embodiment of the present invention.

[0062] The signal conversion device 100c includes a device management control unit 10c, a memory unit 20c, an OTN signal receiving unit 30c, a bandwidth reduction unit 31c, a packet accommodating unit 32c, a packet transmitting unit 33c, a bandwidth control unit 36c, a test signal generating unit 37c, a packet receiving unit 40c, a packet processing unit 41c, a frame reconstruction unit 42c, and an OTN signal transmitting unit 43c.

[0063] The configurations of the device management control unit 10c, memory unit 20c, OTN signal receiving unit 30c, bandwidth reduction unit 31c, packet accommodating unit 32c, packet transmitting unit 33c, packet receiving unit 40c, frame reconstruction unit 42c, and OTN signal transmitting unit 43c in the third embodiment are the same as the configurations of the device management control unit 10a, memory unit 20a, OTN signal receiving unit 30a, bandwidth reduction unit 31a, packet accommodating unit 32a, packet transmitting unit 33a, packet receiving unit 40a, frame reconstruction unit 42a, and OTN signal transmitting unit 43a in the first embodiment, and therefore descriptions thereof will be omitted.

[0064] The bandwidth control unit 36c in the third embodiment is connected to the bandwidth reduction unit 31c. The bandwidth control unit 36c controls the amount of data that the bandwidth reduction unit 31c reduces from the OTN signal based on feedback information transmitted from another signal conversion device 100c.

[0065] The test signal generation unit 37c is connected to the packet transmission unit 33c. Before the signal conversion device 100c starts communication with another device, the test signal generation unit 37c generates a test signal and transmits it from the packet transmission unit 33c to check the network status in advance. Note that the test signal generation unit 37c does not necessarily have to be provided in the signal conversion device 100c.

[0066] The packet processing unit 41c according to the third embodiment includes a buffer 411c, a reading unit 412c, a TS extraction unit 413c, a packet monitoring unit 414c, and a buffer amount control unit 415c.

[0067] The buffer 411c temporarily stores MAC frames output by the packet receiving unit 40c. The reading unit 412c reads out the MAC frames stored in the buffer 411c one by one and outputs them to the TS extraction unit 413c. The TS extraction unit 413c extracts a TS from the MAC frame output by the reading unit 412c and outputs it to the frame reconstruction unit 42c. The packet observation unit 414c observes the MAC frames output by the packet receiving unit 40c and outputs the observation results to the buffer amount control unit 415c. The buffer amount control unit 415c controls the capacity of the buffer 411c based on the observation results output by the packet observation unit 414c, and also controls the speed at which the reading unit 412c reads data from the buffer 411c.

[0068] 8 and 9 are diagrams illustrating the processing of the bandwidth control unit 36c, packet observation unit 414c, and buffer amount control unit 415c according to the third embodiment. (A) of FIG. 8 shows an example of packet observation by the packet observation unit 414c. (A) of FIG. 8 shows a case where the packet observation unit 414c observes packets P11, P12, P13, and P14 in that order. (A) of FIG. 8 shows that the arrival interval T11 between packets P11 and P12 is long, the arrival interval T12 between packets P12 and P13 is short, and the arrival interval T13 between packets P13 and P14 is long, resulting in variations in the arrival intervals of multiple packets P11 to P14.

[0069] In this case, the buffer amount control unit 415c increases the capacity of the buffer 411c by a predetermined amount B11 compared to normal, as shown in Figure 8(B). This increases communication delays, but allows communication to continue without timing out even if the packet arrival intervals fluctuate greatly. In this case, the observation results of the packet observation unit 414c may be fed back to the bandwidth control unit 36c of the signal conversion device 100c on the transmitting side, causing the bandwidth control unit 36c to delete more bandwidth.

[0070] 9A shows another example of packet observation by the packet observation unit 414c. (A) of FIG. 9 shows a case where the packet observation unit 414c observes packets P21, P22, P23, and P24 in that order. (A) of FIG. 9 shows that the arrival interval T21 between packets P21 and P22 is medium, the arrival interval T22 between packets P22 and P23 is medium, and the arrival interval T23 between packets P23 and P24 is medium, and the arrival intervals between multiple packets P21 to P24 are stable.

[0071] In this case, the buffer amount control unit 415c reduces the capacity of the buffer 411c by a predetermined amount B21 compared to normal, as shown in Figure 9B. This reduces communication delays. In this case, the observation results of the packet observation unit 414c may be fed back to the bandwidth control unit 36c of the signal conversion device 100c on the transmitting side, causing the bandwidth control unit 36c to delete the reduced bandwidth.

[0072] In the third embodiment, the signal conversion device 100c includes a packet receiving unit 40c (also referred to as a second signal receiving unit) that receives multiple packets included in a MAC frame (also referred to as a fourth signal) used in a network that uses Ethernet (also referred to as a second network). The signal conversion device 100c also includes a buffer amount control unit 415c that changes the capacity of a buffer 411c that stores multiple packets based on the reception interval of the multiple packets received by the packet receiving unit 40c.

[0073] In addition, in the third embodiment, the signal conversion device 100c is equipped with an OTN signal transmission unit 43c (also referred to as a second signal transmission unit) that changes the amount of data deleted by the other signal conversion device 100c by transmitting information regarding the buffer capacity changed by the buffer amount control unit 415c to the other signal conversion device 100c.

[0074] According to the third embodiment, the capacity of the buffer 411c that temporarily stores the MAC frame packet received by the signal conversion device 100c can be appropriately controlled based on the packet, and the amount of data reduced by the bandwidth reduction unit 31c of the signal conversion device 100c that transmits the MAC frame can be appropriately controlled, thereby realizing stable communication.

[0075] Note that information for identifying the TS to be transmitted may be generated by the signal conversion device 100c on the transmitting side and included in the main signal, thereby enabling adaptive control of bandwidth reduction and increase. Note that the information for identifying the TS may be transferred in a reserved area of ​​the OTN OH, or may be transferred by creating a dedicated area in the payload area of ​​the MAC frame.

[0076] [Fourth Embodiment] Next, a fourth embodiment of the present invention will be described below. Fig. 10 is a schematic block diagram showing the configuration of a signal conversion device 100d according to the fourth embodiment of the present invention.

[0077] The signal conversion device 100d includes a device management control unit 10d, a memory unit 20d, an OTN signal receiving unit 30d, a bandwidth reduction unit 31d, a packet accommodating unit 32d, a packet transmitting unit 33d, a clock information generating unit 38d, a packet receiving unit 40d, a packet processing unit 41d, a frame reconstruction unit 42d, and an OTN signal transmitting unit 43d.

[0078] The configurations of the device management control unit 10d, memory unit 20d, OTN signal receiving unit 30d, bandwidth reduction unit 31d, packet accommodating unit 32d, packet transmitting unit 33d, packet receiving unit 40d, frame reconstruction unit 42d, and OTN signal transmitting unit 43d in the fourth embodiment are the same as the configurations of the device management control unit 10a, memory unit 20a, OTN signal receiving unit 30a, bandwidth reduction unit 31a, packet accommodating unit 32a, packet transmitting unit 33a, packet receiving unit 40a, frame reconstruction unit 42a, and OTN signal transmitting unit 43a in the first embodiment, and therefore descriptions thereof will be omitted.

[0079] The clock information generating unit 38d in the fourth embodiment is connected to the OTN signal receiving unit 30d, the packet accommodating unit 32d, and the packet transmitting unit 33d. The clock information generating unit 38d generates clock information based on the OTN signal received by the OTN signal receiving unit 30d and the MAC frame packet transmitted by the packet transmitting unit 33d, and outputs the clock information to the packet accommodating unit 32d.

[0080] The packet processing unit 41d according to the fourth embodiment includes a buffer 411d, a readout unit 412d, an OTN signal extraction unit 416d, and a clock information processing unit 417d. The buffer 411d temporarily stores MAC frames output by the packet receiving unit 40d. The readout unit 412d reads the MAC frames stored in the buffer 411d one by one and outputs them to the OTN signal extraction unit 416d. The OTN signal extraction unit 416d extracts OTN signals from the MAC frames output by the readout unit 412d and outputs them to the frame reconstruction unit 42d. The clock information processing unit 417d acquires clock information from the MAC frames stored in the buffer 411d and controls the speed at which the readout unit 412d reads data from the buffer 411d based on the clock information.

[0081] The ODU clock frequency after band reduction generated by the clock information generating unit 38d is based on the following formula (1).

[0082]

[0083] In the above formula (1), f is the frequency of the clock common to transmission and reception, and C ｎis the number of client n-bit data chunks per server frame period, and P ｓｅｒｖｅｒ is the maximum number of n-bit data chunks that can be included in the server's payload area.

[0084] Here, the reference frequency f can be the bit rate of the MAC frame being transmitted and received. At the receiving end, a clock is extracted from the received signal by clock data recovery processing. Note that a clock supplied by a CSM (Clock Supply Module), a GPS (Global Positioning System), or a SynchE (Synchronous Ethernet) device may also be used as the reference frequency f.

[0085] Next, a first clock information transfer method according to the fourth embodiment will be described. When a method in which the MAC frame length is fixed and an IFG is inserted is used as the rate adaptation method, the packet transmitter 33d transmits the ODU clock frequency after bandwidth reduction, which is expressed by the following equation (2), as clock information.

[0086]

[0087] In the above formula (2), the preamble length, the number of ODU data, the MAC frame, and the number of ODU data included in the MAC can be acquired or derived from the MAC OH or the like, or can be fixed values. Therefore, the transfer of the number of ODU data may be omitted. Therefore, the only information that needs to be transferred by the packet transmission unit 33d is the IFG length. The IFG length itself may be transferred, or alternatively, information obtained by adding the preamble length and the MAC frame length (the denominator part of the above formula (2)) may be transferred. The packet transmission unit 33d may also transfer information regarding changes (increases or decreases) in the IFG length.

[0088] The packet transmitter 33d can transfer clock information using MAC payload. Clock information may be inserted into each frame of the bandwidth-reduced ODU shown in FIG. 11A and transmitted as shown in FIG. 11B. Alternatively, clock information for several frames may be transmitted collectively. Clock information may also be transferred as a dedicated MAC frame. For the bandwidth-reduced ODU (FIG. 12A), clock information (FIG. 12C) may be transmitted as an ordered set using idle blocks obtained by 66-bit encoding of stuff (IFG) between multiple MAC frames (FIG. 12B).

[0089] Next, a second clock information transfer method according to the fourth embodiment will be described. When a method of padding a MAC frame with stuff data is used as the rate adaptation method, the packet transmitter 33d transmits the ODU clock frequency after bandwidth reduction, which is expressed by the following equation (3), as clock information.

[0090]

[0091] In equation (3), the preamble length, MAC frame length, and MAC payload length can be obtained from the MAC OH or the like, or are fixed values. Therefore, the transfer of this information can be omitted. Furthermore, if the IFG length is fixed, the transfer of the IFG length is also unnecessary, and the only information that needs to be transferred is the number of Stuffs. As frequency information, the number of Stuffs may be transferred as is, or information regarding the numerator and denominator of equation (3) above may be transferred separately. Furthermore, changes (increases or decreases) in the numerator and denominator of equation (3) above may be transferred.

[0092] The stuff information may be mapped so that the stuff is distributed in the payload area, as shown in Fig. 13. The positions of the client data and stuff are determined by the following formulas (4) and (5) for the j-th (j = 1, 2, ...) data in the payload area. Note that the stuff may be arranged so that it is grouped together within the frame.

[0093]

[0094]

[0095] The clock information can be transferred in the MAC payload. As shown in FIG. 13, clock information may be inserted into each frame for transmission. Alternatively, clock information for several frames may be transmitted together. The clock information may also be transferred as a dedicated MAC frame. The clock information may also be transmitted as an ordered set using an idle block in which the IFG is 66b encoded.

[0096] In the above-described fourth embodiment, the packet transmitting unit 33d (also referred to as a first signal transmitting unit) transmits clock information included in a MAC frame (also referred to as a third signal).

[0097] When transmitting a signal via a Layer 2 network, frequency information of the OTN clock signal is lost, making frequency-transparent transmission impossible. However, according to the fourth embodiment, clock information is transmitted by being included in a MAC frame, so that the loss of frequency information of the clock signal can be prevented.

[0098] At least some of the functions of each of the signal conversion devices 100a, 100b, 100c, and 100d in the first to fourth embodiments described above may be implemented by a computer. In this case, a program for implementing this function may be recorded on a computer-readable recording medium, and the program may be loaded and executed by a computer system. The term "computer system" as used herein includes hardware such as an operating system (OS) and peripheral devices. The term "computer-readable recording medium" also refers to portable media such as flexible disks, optical magnetic disks, read-only memories (ROMs), and CD-ROMs, as well as storage devices such as hard disks built into computer systems. Furthermore, the term "computer-readable recording medium" may also include media that dynamically store programs for a short period of time, such as communication lines used when transmitting programs via networks such as the Internet or telephone lines, and media that store programs for a fixed period of time, such as volatile memory within the computer systems that serve as the server or client in such cases. Furthermore, the above program may be one that realizes part of the functions described above, or may be one that can realize the functions described above in combination with a program already recorded in a computer system, or may be one that is realized using a programmable logic device such as an FPGA.

[0099] The first to fourth embodiments of the present invention have been described above in detail with reference to the drawings. However, the specific configurations are not limited to these embodiments, and designs within the scope of the present invention are also included.

[0100] The present invention can be applied to a signal conversion device and a signal conversion method that require converting a signal used in a first network into a signal used in a second network, even if the bit rate of the first network is higher than the bit rate of the second network.

[0101] DESCRIPTION OF THE SYMBOLS 10a, 10b, 10c, 10d... Device management control unit, 20a, 20b, 20c, 20d... Storage unit, 30a, 30b, 30c, 30d... OTN signal receiving unit, 31a, 31b, 31c, 31d... Bandwidth reduction unit, 32a, 32b-1 to 32b-10, 32c, 32d... Packet accommodating unit, 33a, 33b, 33c, 33d... Packet transmitting unit 33a, 34b... TS demultiplexing unit, 35b... Packet multiplexing unit, 40a, 40b, 40c, 40d... Packet receiving unit, 41a, 41b-1 to 41b-10, 41c, 41d... Packet processing unit, 42a, 42b, 42c, 42d... Frame reconstruction unit, 43a, 43b, 43c, 43d...OTN signal transmitting units, 100a, 100b, 100c, 100d...signal conversion devices

Claims

1. A signal conversion device comprising: a first signal receiving unit that receives a first signal used in a first network; a data reduction unit that generates a second signal by reducing some of the data in the first signal received by the first signal receiving unit; a first signal generating unit that generates a third signal used in a second network by packetizing the second signal generated by the data reduction unit; and a first signal transmitting unit that transmits the third signal generated by the first signal generating unit to the second network.

2. The signal conversion device according to claim 1, further comprising: a second signal receiving unit that determines whether a fourth signal used in the second network could not be received due to a timeout; a second signal generating unit that generates a fifth signal by adding predetermined data to the fourth signal when the second signal receiving unit determines that the fourth signal could not be received due to a timeout; and a second signal transmitting unit that transmits the fifth signal generated by the second signal generating unit to the first network.

3. The signal conversion device according to claim 1, wherein the first signal generation unit generates the third signal after grouping a plurality of tributary slots included in the second signal generated by the data reduction unit.

4. The signal conversion device according to claim 1, further comprising: a second signal receiving unit that receives a plurality of packets contained in a fourth signal used in the second network; and a buffer amount control unit that changes the capacity of a buffer that stores the plurality of packets based on the reception interval of the plurality of packets received by the second signal receiving unit.

5. A signal conversion device as described in claim 4, further comprising a second signal transmission unit that changes the amount of data deleted by another signal conversion device by transmitting information regarding the buffer capacity changed by the buffer amount control unit to the other signal conversion device.

6. The signal conversion device according to claim 1, wherein the first signal transmitting section transmits clock information included in the third signal.

7. The signal conversion device according to claim 1, wherein the first network is an OTN (Optical Transport Network), and the second network is a network using Ethernet.

8. A signal conversion method comprising: a signal receiving process for receiving a first signal used in a first network; a data reduction process for generating a second signal by reducing part of the data of the first signal received in the signal receiving process; a signal generation process for generating a third signal used in a second network by packetizing the second signal generated in the data reduction process; and a signal transmission process for transmitting the third signal generated in the signal generation process to the second network.

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