Display device and electronic device comprising same

Abstract

This display device includes a display panel, a data driver, and a power voltage generator. The display panel includes pixels configured to emit light on the basis of a first power voltage and a second power voltage smaller than the first power voltage. The data driver outputs a data voltage to the pixels. The power voltage generator outputs a data power voltage, a maximum data voltage, and a minimum data voltage to the data driver. A luminance setting value is changed, the data power voltage and the maximum data voltage are changed, and the minimum data voltage is fixed.

Description

Display device and electronic device including same

[0001] The present invention relates to a display device and an electronic device including the same, and more particularly, to a display device capable of reducing power consumption and an electronic device including the same.

[0002] In general, a display device includes a display panel and a display panel driver. The display panel includes a plurality of gate lines, a plurality of data lines, a plurality of emission lines, and a plurality of pixels. The display panel driver includes a gate driver that provides a gate signal to the plurality of gate lines, a data driver that provides a data voltage to the data lines, an emission driver that provides an emission signal to the emission lines, and a drive control unit that controls the gate driver, the data driver, and the emission driver.

[0003] In a conventional pixel, the driving current is determined in proportion to the square of the difference between the high power supply voltage and the data voltage, and the data voltage may decrease toward white and increase toward black. Since the high power supply voltage is difficult to quickly control, and changes in the high power supply voltage affect the displayed image, in a conventional pixel, the high power supply voltage is fixed even if the brightness setting value of the display device or the brightness mode of the display device changes. When the high power supply voltage is fixed, the black data voltage is also fixed, and the data power supply voltage applied to the data driving unit is also fixed.

[0004] In this case, even if the brightness setting value is relatively low or the brightness mode is a low brightness mode, the high power supply voltage, the black data voltage, and the data power supply voltage are fixed, so there is a problem of high power consumption of the display device.

[0005] An object of the present invention is to provide a display device capable of reducing power consumption by varying a data power supply voltage and a maximum data voltage according to a brightness setting value or brightness mode of the display device.

[0006] Another object of the present invention is to provide an electronic device including the display device.

[0007] According to one embodiment of the present invention, a display device includes a display panel, a data driver, and a power voltage generator. The display panel includes pixels that emit light based on a first power voltage and a second power voltage lower than the first power voltage. The data driver outputs a data voltage to the pixels. The power voltage generator outputs a data power voltage, a maximum data voltage, and a minimum data voltage to the data driver. A luminance setting value changes, the data power voltage and the maximum data voltage change, and the minimum data voltage is fixed.

[0008] In one embodiment of the present invention, the brightness setting value may be changed, and the difference between the data power voltage and the maximum data voltage may be fixed.

[0009] In one embodiment of the present invention, the data power supply voltage may be greater than the maximum data voltage.

[0010] In one embodiment of the present invention, the brightness setting value may be changed, and the difference between the reference voltage applied to the pixel and the minimum data voltage may be fixed.

[0011] In one embodiment of the present invention, the reference voltage may be different from the first power supply voltage. The reference voltage may be different from the second power supply voltage.

[0012] In one embodiment of the present invention, the reference voltage may be greater than the minimum data voltage.

[0013] In one embodiment of the present invention, the minimum data voltage may be greater than the second power supply voltage.

[0014] In one embodiment of the present invention, the maximum data voltage may be greater than the white data voltage corresponding to the maximum grayscale at the luminance setting value.

[0015] In one embodiment of the present invention, the brightness setting value may be changed, and the difference between the maximum data voltage and the white data voltage may be fixed.

[0016] In one embodiment of the present invention, the minimum data voltage may be equal to a black data voltage corresponding to the minimum grayscale.

[0017] In one embodiment of the present invention, the pixel may include a light-emitting element and a first transistor for applying a driving current to the light-emitting element. The first transistor may be an N-type transistor.

[0018] In one embodiment of the present invention, the driving current of the pixel may be proportional to the square of the difference between the data voltage and the reference voltage applied to the pixel.

[0019] In one embodiment of the present invention, the pixel comprises a first transistor including a control electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node, a second transistor including a control electrode to which a write gate signal is applied, a first electrode to which the data voltage is applied, and a second electrode connected to the first node, a third transistor including a control electrode to which a reference gate signal is applied, a first electrode to which a reference voltage is applied, and a second electrode connected to the first node, a fourth transistor including a control electrode to which an initialization gate signal is applied, a first electrode to which an initialization voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element, a fifth transistor including a control electrode to which a first emission signal is applied, a first electrode to which the first power voltage is applied, and a second electrode connected to the second node, a sixth transistor including a control electrode to which a second emission signal is applied, a first electrode connected to the third node, and a second electrode connected to the anode electrode of the light-emitting element, The light emitting element may include an anode electrode and a cathode electrode to which the second power voltage is applied, a first capacitor including a first electrode connected to the first node and a second electrode connected to the third node, and a second capacitor including a first electrode to which the first power voltage is applied and a second electrode connected to the third node.

[0020] In one embodiment of the present invention, the second transistor, the third transistor, and the fourth transistor may be N-type transistors. At least one of the fifth transistor and the sixth transistor may be a P-type transistor.

[0021] In one embodiment of the present invention, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor may be N-type transistors.

[0022] In one embodiment of the present invention, in the first section, the first emission signal may have a deactivation level, the second emission signal may have an activation level, the reference gate signal may have an activation level, the initialization gate signal may have an activation level, and the write gate signal may have a deactivation level.

[0023] In one embodiment of the present invention, in the second section, the first emission signal may have an activation level, the second emission signal may have a deactivation level, the reference gate signal may have an activation level, the initialization gate signal may have an activation level, and the write gate signal may have a deactivation level.

[0024] In one embodiment of the present invention, in the third section, the first emission signal may have a deactivation level, the second emission signal may have a deactivation level, the reference gate signal may have a deactivation level, the initialization gate signal may have an activation level, and the write gate signal may have an activation level.

[0025] In one embodiment of the present invention, in the fourth section, the first emission signal may have an activation level, the second emission signal may have an activation level, the reference gate signal may have a deactivation level, the initialization gate signal may have a deactivation level, and the write gate signal may have a deactivation level.

[0026] In one embodiment of the present invention, the display device may further include a driving control unit that controls the operations of the data driving unit and the power voltage generating unit. The driving control unit may output the brightness setting value to the power voltage generating unit.

[0027] In one embodiment of the present invention, the drive control unit and the data drive unit may be formed integrally to form an integrated drive unit. The integrated drive unit may output the brightness setting value to the power voltage generator. The power voltage generator may output the data power voltage, the maximum data voltage, and the minimum data voltage to the integrated drive unit.

[0028] According to one embodiment of the present invention for realizing the above-described object, a display device includes a display panel, a data driver, and a power voltage generator. The display panel includes pixels that emit light based on a first power voltage and a second power voltage lower than the first power voltage. The data driver outputs a data voltage to the pixels. The power voltage generator outputs a data power voltage, a maximum data voltage, and a minimum data voltage to the data driver. The luminance mode changes, the data power voltage and the maximum data voltage change, and the minimum data voltage is fixed.

[0029] According to one embodiment of the present invention for realizing the above object, an electronic device includes a display panel, a data driver, a power voltage generator, a drive control unit, and a processor. The display panel includes pixels that emit light based on a first power voltage and a second power voltage lower than the first power voltage. The data driver outputs a data voltage to the pixels. The power voltage generator outputs a data power voltage, a maximum data voltage, and a minimum data voltage to the data driver. The drive control unit controls operations of the data driver and the power voltage generator. The processor outputs an input control signal and input image data to the drive control. A brightness setting value changes, the data power voltage and the maximum data voltage change, and the minimum data voltage is fixed.

[0030] According to the display device and the electronic device including the display device, the driving current of the pixel is determined in proportion to the square of the difference between the data voltage and the reference voltage, and the data voltage may increase as the color moves toward white and decrease as the color moves toward black.

[0031] The data power voltage and the maximum data voltage can be varied according to the brightness setting value or brightness mode of the display device, and the minimum data voltage can be fixed regardless of the brightness setting value and the brightness mode of the display device.

[0032] Since the data power voltage and the maximum data voltage vary depending on the brightness setting value or the brightness mode, when the brightness setting value is relatively low or the brightness mode is a low brightness mode, the white data voltage and the data power voltage can be set relatively low. Accordingly, the power consumption of the display device can be reduced.

[0033] FIG. 1 is a block diagram showing a display device according to one embodiment of the present invention.

[0034] Fig. 2 is a circuit diagram showing pixels of the display panel of Fig. 1.

[0035] Figure 3 is a timing diagram showing input signals applied to the pixels of Figure 2.

[0036] Fig. 4 is a circuit diagram showing the operation of the pixel of Fig. 2 in the first section.

[0037] FIG. 5 is a timing diagram showing input signals applied to the pixels of FIG. 4 in the first section.

[0038] Fig. 6 is a circuit diagram showing the operation of the pixel of Fig. 2 in the second section.

[0039] Figure 7 is a timing diagram showing input signals applied to the pixels of Figure 6 in the second section.

[0040] Fig. 8 is a circuit diagram showing the operation of the pixel of Fig. 2 in the third section.

[0041] Fig. 9 is a timing diagram showing input signals applied to the pixels of Fig. 8 in the third section.

[0042] Fig. 10 is a circuit diagram showing the operation of the pixel of Fig. 2 in the fourth section.

[0043] Figure 11 is a timing diagram showing input signals applied to the pixels of Figure 10 in the fourth section.

[0044] FIG. 12 is a diagram showing a data power voltage, a maximum data voltage, a minimum data voltage, a first power voltage, a second power voltage, and a reference voltage when the brightness setting value of the display device of FIG. 1 is a first value.

[0045] FIG. 13 is a diagram showing a data power voltage, a maximum data voltage, a minimum data voltage, a first power voltage, a second power voltage, and a reference voltage when the brightness setting value of the display device of FIG. 1 is a second value.

[0046] FIG. 14 is a diagram showing a data power voltage, a maximum data voltage, a minimum data voltage, a first power voltage, a second power voltage, and a reference voltage when the brightness setting value of the display device of FIG. 1 is a third value.

[0047] FIG. 15 is a diagram showing a data power voltage, a maximum data voltage, a minimum data voltage, a first power voltage, a second power voltage, and a reference voltage when the brightness setting value of the display device of FIG. 1 is the fourth value.

[0048] Fig. 16 is a drawing showing the setting of a gamma lookup table according to the luminance setting value of the display device of Fig. 1.

[0049] Fig. 17 is a drawing showing an example of the driving timing of the display panel of Fig. 1.

[0050] Fig. 18 is a drawing showing an example of the driving timing of the display panel of Fig. 1.

[0051] FIG. 19 is a circuit diagram showing pixels of a display panel of a display device according to one embodiment of the present invention.

[0052] Figure 20 is a timing diagram showing input signals applied to the pixels of Figure 19.

[0053] Fig. 21 is a block diagram showing a display device according to one embodiment of the present invention.

[0054] FIG. 22 is a block diagram illustrating an electronic device according to one embodiment of the present invention.

[0055] Figure 23 is a drawing showing an example in which the electronic device of Figure 22 is implemented as a smartphone.

[0056] Figure 24 is a drawing showing an example in which the electronic device of Figure 22 is implemented as a monitor.

[0057] Hereinafter, the present invention will be described in more detail with reference to the attached drawings.

[0058] FIG. 1 is a block diagram showing a display device according to one embodiment of the present invention.

[0059] Referring to Fig. 1, the display device includes a display panel (100) and a display panel driver. The display panel driver includes a drive control unit (200), a gate driver (300), a power voltage generator (400), a data driver (500), and an emission driver (600).

[0060] The above display panel (100) includes a display portion (AA) that displays an image and a peripheral portion (PA) arranged adjacent to the display portion (AA).

[0061] The display panel (100) may include a plurality of gate lines (GWL, GRL, GBL), a plurality of data lines (DL), a plurality of emission lines (EL1, EL2), and a plurality of pixels electrically connected to each of the gate lines (GWL, GRL, GBL), the data lines (DL), and the emission lines (EL1, EL2). The gate lines (GWL, GRL, GBL) may extend in a first direction (D1), the data lines (DL) may extend in a second direction (D2) intersecting the first direction (D1), and the emission lines (EL1, EL2) may extend in the first direction (D1).

[0062] The driving control unit (200) may receive input image data (IMG) and an input control signal (CONT) from an external device. For example, the driving control unit (200) may receive the input image data (IMG) and the input control signal (CONT) from a host or an application processor. For example, the input image data (IMG) may include red image data, green image data, and blue image data. The input image data (IMG) may include white image data. The input image data (IMG) may include magenta image data, yellow image data, and cyan image data. The input control signal (CONT) may include a master clock signal and a data enable signal. The input control signal (CONT) may further include a vertical synchronization signal and a horizontal synchronization signal. The input control signal (CONT) may further include a brightness setting value. The above luminance setting value may refer to a luminance value represented by the maximum grayscale of the input image data (IMG). The above luminance setting value may be set by a user or may be automatically set based on the surrounding luminance.

[0063] The above driving control unit (200) can generate a first control signal (CONT1), a second control signal (CONT2), a third control signal (CONT3), a fourth control signal (CONT4), and a data signal (DATA) based on the input image data (IMG) and the input control signal (CONT).

[0064] The above driving control unit (200) can generate the first control signal (CONT1) for controlling the operation of the gate driving unit (300) based on the input control signal (CONT) and output the first control signal (CONT1) to the gate driving unit (300). The first control signal (CONT1) can include a vertical start signal and a gate clock signal.

[0065] The above drive control unit (200) can generate the second control signal (CONT2) for controlling the operation of the data drive unit (500) based on the input control signal (CONT) and output it to the data drive unit (500). The second control signal (CONT2) can include a horizontal start signal and a load signal.

[0066] The above driving control unit (200) can generate a data signal (DATA) based on the input image data (IMG). The driving control unit (200) can output the data signal (DATA) to the data driving unit (500).

[0067] The above driving control unit (200) can generate the third control signal (CONT3) for controlling the operation of the power voltage generation unit (400) based on the input control signal (CONT) and output it to the power voltage generation unit (400).

[0068] The above drive control unit (200) can generate the fourth control signal (CONT4) for controlling the operation of the emission drive unit (600) based on the input control signal (CONT) and output it to the emission drive unit (600).

[0069] The gate driver (300) can generate gate signals for driving the gate lines (GWL, GRL, GBL) in response to the first control signal (CONT1) received from the drive control unit (200). The gate driver (300) can output the gate signals to the gate lines (GWL, GRL, GBL). For example, the gate driver (300) can be integrated on the peripheral portion (PA) of the display panel (100). For example, the gate driver (300) can be mounted on the peripheral portion (PA) of the display panel (100).

[0070] The power voltage generation unit (400) can generate a power voltage in response to the third control signal (CONT3) received from the drive control unit (200). The power voltage generation unit (400) can provide the power voltage to the data driving unit (500). For example, the power voltage generation unit (400) can output a data power voltage (AVDD), a maximum data voltage (VDMAX), and a minimum data voltage (VDMIN) to the data driving unit (500).

[0071] For example, the power voltage generation unit (400) may be configured as a separate integrated circuit from the data driving unit (500). Alternatively, the power voltage generation unit (400) may be arranged within the drive control unit (200) or may be arranged within the data driving unit (500).

[0072] The data driving unit (500) may receive the second control signal (CONT2) and the data signal (DATA) from the driving control unit (200), and may receive a gamma reference voltage from a gamma reference voltage generation unit. The data driving unit (500) may convert the data signal (DATA) into an analog data voltage using the gamma reference voltage. The data driving unit (500) may output the data voltage to the data line (DL).

[0073] The above maximum data voltage (VDMAX) and the above minimum data voltage (VDMIN) may refer to the maximum and minimum values ​​of the data voltage generated by the data driver (500) at a specific brightness setting value. The above maximum data voltage (VDMAX) may be the basis of the data voltage for the maximum grayscale. The above minimum data voltage (VDMIN) may be the basis of the data voltage for the minimum grayscale. The above data voltage for the maximum grayscale may be a white data voltage. The above data voltage for the minimum grayscale may be a black data voltage. When the data signal is an 8-bit value, the above maximum grayscale may be 255 grayscale, and the above minimum grayscale may be 0 grayscale.

[0074] In this embodiment, the white data voltage may be greater than the black data voltage. In this embodiment, the data voltage representing a high gray level may be greater than the data voltage representing a low gray level.

[0075] The emission driving unit (600) can generate emission signals for driving the emission lines (EL1, EL2) in response to the fourth control signal (CONT4) received from the driving control unit (200). The emission driving unit (600) can output the emission signals to the emission lines (EL1, EL2). For example, the emission driving unit (600) can be integrated on the peripheral portion (PA) of the display panel (100). For example, the emission driving unit (600) can be mounted on the peripheral portion (PA) of the display panel (100).

[0076] In FIG. 1, for convenience of explanation, the gate driver (300) is illustrated as being disposed on the first side of the display panel (100) and the emission driver (600) is illustrated as being disposed on the second side of the display panel (100). However, the present invention is not limited thereto. For example, both the gate driver (300) and the emission driver (600) may be disposed on the first side of the display panel (100). For example, both the gate driver (300) and the emission driver (600) may be disposed on both sides of the display panel (100). For example, the gate driver (300) and the emission driver (600) may be formed integrally.

[0077] Fig. 2 is a circuit diagram showing a pixel of the display panel (100) of Fig. 1. Fig. 3 is a timing diagram showing input signals applied to the pixel of Fig. 2.

[0078] Referring to FIGS. 1 to 3, the display panel (100) includes a plurality of pixels, each of which includes a light-emitting element (EE). The pixels can emit light based on a first power supply voltage (ELVDD) and a second power supply voltage (ELVSS) that is lower than the first power supply voltage (ELVDD).

[0079] The above pixels receive a write gate signal (GW), an initialization gate signal (GB), a reference gate signal (GR), the data voltage (VDATA), a first emission signal (EM1), and a second emission signal (EM2), and display the image by emitting light from the light-emitting element (EE) according to the level of the data voltage (VDATA).

[0080] The pixel includes a light-emitting element (EE) and a first transistor (T1) for applying a driving current to the light-emitting element (EE). Here, the first transistor (T1) may be an N-type transistor. The first transistor (T1) may be an oxide semiconductor thin film transistor.

[0081] The driving current of the pixel may be proportional to the square of the difference between the data voltage (VDATA) and the reference voltage (VREF). The reference voltage (VREF) may be different from the first power voltage (ELVDD). The reference voltage (VREF) may be different from the second power voltage (ELVSS).

[0082] For example, the reference voltage (VREF) may be less than the white data voltage and greater than the black data voltage. For example, the reference voltage (VREF) may be less than the first power supply voltage (ELVDD).

[0083] The pixel includes a first transistor (T1) including a control electrode connected to a first node (N1), a first electrode connected to a second node (N2), and a second electrode connected to a third node (N3), a second transistor (T2) including a control electrode to which the write gate signal (GW) is applied, a first electrode to which the data voltage (VDATA) is applied, and a second electrode connected to the first node (N1), a third transistor (T3) including a control electrode to which the reference gate signal (GR) is applied, a first electrode to which the reference voltage (VREF) is applied, and a second electrode connected to the first node (N1), a fourth transistor (T4) including a control electrode to which the initialization gate signal (GB) is applied, a first electrode to which the initialization voltage (VAINIT) is applied, and a second electrode connected to the anode electrode of the light emitting element (EE), a control electrode to which the first emission signal (EM1) is applied, and a first power voltage (ELVDD) is applied. It may include a fifth transistor (T5) including a first electrode to which the second emission signal (EM2) is applied and a second electrode connected to the second node (N2), a sixth transistor (T6) including a control electrode to which the second emission signal (EM2) is applied, a first electrode connected to the third node (N3) and a second electrode connected to the anode electrode of the light-emitting element (EE), the light-emitting element (EE) including the anode electrode and a cathode electrode to which the second power voltage (ELVSS) is applied, a first capacitor (C1) including a first electrode connected to the first node (N1) and a second electrode connected to the third node (N3), and a second capacitor (C2) including a first electrode to which the first power voltage (ELVDD) is applied and a second electrode connected to the third node (N3).

[0084] In the present embodiment, the second transistor (T2), the third transistor (T3), and the fourth transistor (T4) may be N-type transistors. The second transistor (T2), the third transistor (T3), and the fourth transistor (T4) may be oxide semiconductor thin film transistors.

[0085] In this embodiment, the fifth transistor (T5) and the sixth transistor (T6) may be P-type transistors. The fifth transistor (T5) and the sixth transistor (T6) may be low-temperature polycrystalline silicon (LTPS) thin film transistors.

[0086] Referring to Fig. 3, the driving timing of the pixel may include a first period (DR1), a second period (DR2), a third period (DR3), and a fourth period (DR4). The first period (DR1) may be an initialization period, the second period (DR2) may be a threshold voltage compensation period, the third period (DR3) may be a writing period, and the fourth period (DR4) may be an emission period.

[0087] Fig. 4 is a circuit diagram showing the operation of the pixel of Fig. 2 in the first section (DR1). Fig. 5 is a timing diagram showing input signals applied to the pixel of Fig. 4 in the first section (DR1).

[0088] When the first emission signal (EM1), the second emission signal (EM2), the reference gate signal (GR), the initialization gate signal (GB), and the write gate signal (GW) are applied to a P-type transistor, the activation levels of the first emission signal (EM1), the second emission signal (EM2), the reference gate signal (GR), the initialization gate signal (GB), and the write gate signal (GW) may be a low level, and the deactivation levels of the first emission signal (EM1), the second emission signal (EM2), the reference gate signal (GR), the initialization gate signal (GB), and the write gate signal (GW) may be a high level.

[0089] Conversely, when the first emission signal (EM1), the second emission signal (EM2), the reference gate signal (GR), the initialization gate signal (GB), and the write gate signal (GW) are applied to the N-type transistor, the activation levels of the first emission signal (EM1), the second emission signal (EM2), the reference gate signal (GR), the initialization gate signal (GB), and the write gate signal (GW) may be a high level, and the deactivation levels of the first emission signal (EM1), the second emission signal (EM2), the reference gate signal (GR), the initialization gate signal (GB), and the write gate signal (GW) may be a low level.

[0090] Referring to FIGS. 1 to 5, in the first section (DR1), the first emission signal (EM1) may have a deactivation level, the second emission signal (EM2) may have an activation level, the reference gate signal (GR) may have an activation level, the initialization gate signal (GB) may have an activation level, and the write gate signal (GW) may have a deactivation level.

[0091] In the first section (DR1), the second transistor (T2) may be turned off, the third transistor (T3) may be turned on, the fourth transistor (T4) may be turned on, the fifth transistor (T5) may be turned off, and the sixth transistor (T6) may be turned on.

[0092] In the first section (DR1), the third transistor (T3) is turned on, so that the reference voltage (VREF) can be applied to the first node (N1).

[0093] In the first section (DR1), the fourth transistor (T4) and the sixth transistor (T6) are turned on, so that the initialization voltage (VAINIT) can be applied to the anode electrode of the light-emitting element (EE) and the third node (N3).

[0094] Fig. 6 is a circuit diagram showing the operation of the pixel of Fig. 2 in the second section (DR2). Fig. 7 is a timing diagram showing input signals applied to the pixel of Fig. 6 in the second section (DR2).

[0095] Referring to FIGS. 1 to 7, in the second section (DR2), the first emission signal (EM1) may have an activation level, the second emission signal (EM2) may have a deactivation level, the reference gate signal (GR) may have the activation level, the initialization gate signal (GB) may have the activation level, and the write gate signal (GW) may have the deactivation level.

[0096] In the second section (DR2), the second transistor (T2) may be turned off, the third transistor (T3) may be turned on, the fourth transistor (T4) may be turned on, the fifth transistor (T5) may be turned on, and the sixth transistor (T6) may be turned off. In the second section (DR2), the first transistor (T1) may be turned on by the reference voltage (VREF) applied to the first node (N1).

[0097] In the second section (DR2), the third transistor (T3) is maintained in a turned-on state, and the reference voltage (VREF) can be applied to the first node (N1).

[0098] In the second section (DR2), the fourth transistor (T4) is maintained in a turn-on state, and the initialization voltage (VAINIT) can be applied to the anode electrode of the light-emitting element (EE).

[0099] In the second section (DR2), the fifth transistor (T5) and the first transistor (T1) are turned on, so that the voltage of the third node (N3) can be the difference between the reference voltage (VREF) and the threshold voltage of the first transistor (T1). That is, since the threshold voltage component of the first transistor (T1) is applied to the third node (N3) in the second section (DR2), the second section (DR2) can be called the threshold voltage compensation section.

[0100] Fig. 8 is a circuit diagram showing the operation of the pixel of Fig. 2 in the third section (DR3). Fig. 9 is a timing diagram showing input signals applied to the pixel of Fig. 8 in the third section (DR3).

[0101] Referring to FIGS. 1 to 9, in the third section (DR3), the first emission signal (EM1) may have the deactivation level, the second emission signal (EM2) may have the deactivation level, the reference gate signal (GR) may have the deactivation level, the initialization gate signal (GB) may have the activation level, and the write gate signal (GW) may have the activation level.

[0102] In the third section, the second transistor (T2) may be turned on, the third transistor (T3) may be turned off, the fourth transistor (T4) may be turned on, the fifth transistor (T5) may be turned off, and the sixth transistor (T6) may be turned off.

[0103] In the third section (DR3), the second transistor (T2) is turned on, so that the data voltage (VDATA) can be applied to the first node (N1), and due to the coupling of the first capacitor (C1), the data voltage (VDATA) can be transmitted to the third node (N3).

[0104] When the data voltage (VDATA) is transmitted from the third node (N3), the data voltage (VDATA) can be transmitted to the third node (N3) according to the ratio (C1 / (C1+C2)) of the capacitances of the first capacitor (C1) and the second capacitor (C2).

[0105] In the third section (DR3), the fourth transistor (T4) is maintained in a turn-on state, and the initialization voltage (VAINIT) can be applied to the anode electrode of the light-emitting element (EE).

[0106] Fig. 10 is a circuit diagram showing the operation of the pixel of Fig. 2 in the fourth section (DR4). Fig. 11 is a timing diagram showing input signals applied to the pixel of Fig. 10 in the fourth section (DR4).

[0107] Referring to FIGS. 1 to 11, in the fourth section (DR4), the first emission signal (EM1) may have the activation level, the second emission signal (EM2) may have the activation level, the reference gate signal (GR) may have the deactivation level, the initialization gate signal (GB) may have the deactivation level, and the write gate signal (GW) may have the deactivation level.

[0108] In the fourth section (DR4), the first transistor (T1) may be turned on, the second transistor (T2) may be turned off, the third transistor (T3) may be turned off, the fourth transistor (T4) may be turned off, the fifth transistor (T5) may be turned on, and the sixth transistor (T6) may be turned on.

[0109] The driving current of the above light-emitting element (EE) can be expressed by the following equation 1.

[0110] [Formula 1]

[0111]

[0112] Here, μ can represent mobility, Cox can represent gate-channel capacitance, W can represent channel width, and L can represent channel length.

[0113] Fig. 12 is a diagram showing the data power supply voltage (AVDD), the maximum data voltage (VDMAX), the minimum data voltage (VDMIN), the first power supply voltage (ELVDD), the second power supply voltage (ELVSS), and the reference voltage (VREF) when the brightness setting value of the display device of Fig. 1 is a first value. Fig. 13 is a diagram showing the data power supply voltage (AVDD), the maximum data voltage (VDMAX), the minimum data voltage (VDMIN), the first power supply voltage (ELVDD), the second power supply voltage (ELVSS), and the reference voltage (VREF) when the brightness setting value of the display device of Fig. 1 is a second value. Fig. 14 is a diagram showing the data power supply voltage (AVDD), the maximum data voltage (VDMAX), the minimum data voltage (VDMIN), the first power supply voltage (ELVDD), the second power supply voltage (ELVSS), and the reference voltage (VREF) when the brightness setting value of the display device of Fig. 1 is a third value. Fig. 15 is a diagram showing the data power supply voltage (AVDD), the maximum data voltage (VDMAX), the minimum data voltage (VDMIN), the first power supply voltage (ELVDD), the second power supply voltage (ELVSS), and the reference voltage (VREF) when the brightness setting value of the display device of Fig. 1 is a fourth value.

[0114] For example, the first value of FIG. 12 may be greater than the second value of FIG. 13, the second value of FIG. 13 may be greater than the third value of FIG. 14, and the third value of FIG. 14 may be greater than the fourth value of FIG. 15. For example, the first value may be 1000 nit, the second value may be 500 nit, the third value may be 100 nit, and the fourth value may be 10 nit.

[0115] For example, when the brightness setting value of the display device of FIG. 12 is the first value, it may be an ultra-high brightness mode, when the brightness setting value of the display device of FIG. 13 is the second value, it may be a high brightness mode, when the brightness setting value of the display device of FIG. 14 is the third value, it may be a medium brightness mode, and when the brightness setting value of the display device of FIG. 15 is the fourth value, it may be a low brightness mode.

[0116] Referring to FIGS. 1 to 15, when the brightness setting value changes, the data power voltage (AVDD) and the maximum data voltage (VDMAX) may change. On the other hand, when the brightness setting value changes, the minimum data voltage (VDMIN) may be fixed.

[0117] For example, the larger the brightness setting value, the larger the data power voltage (AVDD) and the maximum data voltage (VDMAX) may be. Conversely, the smaller the brightness setting value, the smaller the data power voltage (AVDD) and the maximum data voltage (VDMAX) may be. When the brightness setting value decreases, the data power voltage (AVDD) decreases, so when the brightness setting value decreases, the power consumption of the data driving unit (500) may decrease.

[0118] When the above brightness setting value changes, the difference between the data power supply voltage (AVDD) and the maximum data voltage (VDMAX) may be fixed. For example, the difference between the data power supply voltage (AVDD) and the maximum data voltage (VDMAX) may be a first fixed voltage difference (VF1). The data power supply voltage (AVDD) may be greater than the maximum data voltage (VDMAX).

[0119] The above maximum data voltage (VDMAX) may be greater than or less than the first power supply voltage (ELVDD) of the pixel.

[0120] FIGS. 12 and 13 illustrate a case where the maximum data voltage (VDMAX) is greater than the first power supply voltage (ELVDD) of the pixel, and FIGS. 14 and 15 illustrate a case where the maximum data voltage (VDMAX) is less than the first power supply voltage (ELVDD) of the pixel.

[0121] When the luminance setting value changes, the difference between the reference voltage (VREF) and the minimum data voltage (VDMIN) may be fixed. For example, the difference between the reference voltage (VREF) and the minimum data voltage (VDMIN) may be a second fixed voltage difference (VF2). When the luminance setting value changes, the minimum data voltage (VDMIN) may be fixed, and the difference between the reference voltage (VREF) and the minimum data voltage (VDMIN) may also be fixed, so that the reference voltage (VREF) may also be fixed. The reference voltage (VREF) may be greater than the minimum data voltage (VDMIN).

[0122] Additionally, the minimum data voltage (VDMIN) may be greater than the second power supply voltage (ELVSS).

[0123] The above maximum data voltage (VDMAX) may mean the maximum value of the data voltage output by the data driving unit (500) at a specific brightness setting value, and the above minimum data voltage (VDMIN) may mean the minimum value of the data voltage output by the data driving unit (500) at a specific brightness setting value.

[0124] The maximum capability of the data voltage that the data driving unit (500) can output regardless of the brightness setting value can be referred to as IC Analog Max., and the minimum capability of the data voltage that the data driving unit (500) can output regardless of the brightness setting value can be referred to as IC Analog Min.

[0125] At the above specific luminance setting value, the maximum data voltage (VDMAX) may be greater than the white data voltage corresponding to the maximum grayscale (255G) at the above specific luminance setting value.

[0126] When the above brightness setting value changes, the difference between the maximum data voltage (VDMAX) and the white data voltage may be fixed. For example, the difference between the maximum data voltage (VDMAX) and the white data voltage may be a third fixed voltage difference (VF3).

[0127] Ideally, the white data voltage may be matched to the maximum data voltage (VDMAX). However, in reality, the white data voltage may need to be compensated for due to process deviations of the display panel (100), deterioration of the display panel (100), etc. Therefore, a compensation margin can be secured by setting the maximum data voltage (VDMAX) to be greater than the white data voltage.

[0128] On the other hand, the minimum data voltage (VDMIN) can be set equal to the black data voltage corresponding to the minimum grayscale (0G).

[0129] In FIGS. 12 to 15, the gamma lookup table (GLUT) exemplifies a case in which it has 13 bits, and can divide the maximum data voltage (VDMAX) and the minimum data voltage (VDMIN) into 8192 analog points. At this time, the maximum data voltage (VDMAX) has a value of 8191, and the minimum data voltage (VDMIN) has a value of 0. Considering the compensation margin, the white data voltage corresponding to the maximum grayscale (255G) can have a value of 8000. The black data voltage corresponding to the minimum grayscale (0G) can have a value of 0, like the minimum data voltage (VDMIN).

[0130] Since the brightness setting value of Fig. 13 is smaller than the brightness setting value of Fig. 12, the maximum data voltage (VDMAX) of Fig. 13 may be smaller than the maximum data voltage (VDMAX) of Fig. 12. In addition, the data power voltage (AVDD) of Fig. 13 may be smaller than the data power voltage (AVDD) of Fig. 12. In this way, when the brightness setting value decreases, the data power voltage (AVDD) decreases, so that the power consumption of the display device may be reduced.

[0131] In addition, since the maximum data voltage (VDMAX) of FIG. 13 is smaller than the maximum data voltage (VDMAX) of FIG. 12, and the number of analog points (e.g., 8192) according to the number of bits (e.g., 13 bits) of the gamma lookup table (GLUT) between the maximum data voltage (VDMAX) and the minimum data voltage (VDMIN) is the same, when the luminance setting value decreases, the voltage difference between adjacent analog points can decrease, and the voltage control precision of the data voltage (VDATA) can increase.

[0132] The driving current of the pixel is proportional to the square of the difference between the data voltage (VDATA) and the reference voltage (VREF), and the luminance of the pixel can be determined by the potential difference of the data voltage (VDATA) with respect to the reference voltage (VREF). In the data voltage (VDATA), white may be in the direction in which the voltage increases, and black may be in the direction in which the voltage decreases.

[0133] From here, the steps of setting the data power supply voltage (AVDD), the maximum data voltage (VDMAX), the minimum data voltage (VDMIN), the first power supply voltage (ELVDD), the second power supply voltage (ELVSS), and the reference voltage (VREF) are described.

[0134] In the first step, the black data voltage can be set to a voltage at which the brightness of the black image is lower than 0.005 nit. The black data voltage is determined by the off characteristic of the first transistor (T1) and may not vary depending on the brightness setting value but may have a fixed value. Therefore, the black data voltage does not need to be changed, and since it is the lowest voltage among the data voltages, it can be fixed to the minimum data voltage (VDMIN, IC Analog Min. of FIG. 12). That is, the minimum value (VDMIN) of the data voltage generated by the data driver (500) at the specific brightness setting value can be fixed to IC Analog Min., which is the minimum capability of the data voltage that the data driver (500) can output, regardless of the brightness.

[0135] In the second step, while the black data voltage is fixed to the minimum data voltage (VDMIN, IC Analog Min. of Fig. 12), the reference voltage (VREF) is fixed and set to a voltage at which the brightness of the black image can be determined to be less than 0.005 nit.

[0136] In the third step, the white data voltage is set to vary according to the brightness setting value (e.g., 1000 nit, 500 nit, 100 nit, 10 nit, etc.). As the white data voltage varies according to the brightness setting value (e.g., 1000 nit, 500 nit, 100 nit, 10 nit, etc.), the maximum data voltage (VDMAX) may also be set to vary. As the brightness setting value increases, the white data voltage must be higher, so that when the brightness setting value is the maximum brightness setting value (e.g., 1000 nit), the maximum data voltage (VDMAX) may be determined as the IC Analog Max. value. When the brightness setting value is lower than the maximum brightness setting value (e.g., 1000 nit), the maximum data voltage (VDMAX) may be gradually lowered. For example, the maximum data voltage (VDMAX) when the brightness setting value is 500 nit may be less than the maximum data voltage (VDMAX) when the brightness setting value is 1000 nit. For example, the maximum data voltage (VDMAX) when the brightness setting value is 100 nit may be less than the maximum data voltage (VDMAX) when the brightness setting value is 500 nit.

[0137] In the fourth step, since the data power supply voltage (AVDD) is a reference power of the data driving unit (500), it can be appropriately set according to the operating characteristics of the data driving unit (500). For example, the data power supply voltage (AVDD) can be set to be 0.3 V higher than the maximum data voltage (VDMAX). That is, when the brightness setting value decreases, the maximum data voltage (VDMAX) decreases, and accordingly, the data power supply voltage (AVDD) can decrease. When the data power supply voltage (AVDD) decreases, the power consumption of the data driving unit (500) can be reduced.

[0138] In this embodiment, the drive control unit (200) can control the operations of the data drive unit (500) and the power voltage generation unit (400). The drive control unit (200), the power voltage generation unit (400), and the data drive unit (500) can be formed separately.

[0139] The above driving control unit (200) can output the brightness setting value (DBV) to the power voltage generation unit (400). The power voltage generation unit (400) can generate the data power voltage (AVDD) and the maximum data voltage (VDMAX) that vary according to the brightness setting value (DBV) and output them to the data driving unit (500). The power voltage generation unit (400) can generate the minimum data voltage (VDMIN) that is fixed and does not vary according to the brightness setting value (DBV) and output them to the data driving unit (500).

[0140] Fig. 16 is a drawing showing the setting of a gamma lookup table (GLUT) according to the luminance setting value (DBV) of the display device of Fig. 1.

[0141] Referring to FIGS. 1 to 16, if there are many brightness setting steps, the number of variable steps of the data power supply voltage (AVDD) may increase. FIG. 16 exemplifies a case where there are 8 brightness setting steps. In the first brightness setting step, the brightness setting value (DBV) may be 1000 nit, in the second brightness setting step, the brightness setting value (DBV) may be 600 nit, in the third brightness setting step, the brightness setting value (DBV) may be 400 nit, in the fourth brightness setting step, the brightness setting value (DBV) may be 200 nit, in the fifth brightness setting step, the brightness setting value (DBV) may be 100 nit, in the sixth brightness setting step, the brightness setting value (DBV) may be 50 nit, in the seventh brightness setting step, the brightness setting value (DBV) may be 10 nit, and in the eighth brightness setting step, the brightness setting value (DBV) may be 4 nit.

[0142] As described above, in each of the brightness setting steps, the white data voltage corresponding to the maximum grayscale (255G) may have a value of 8000.

[0143] In the case of the brightness setting value (DBV) between the above brightness setting steps, the white data voltage cannot be set to 8000, and only the value of the gamma lookup table (GLUT) can be changed.

[0144] For example, if the brightness setting value (DBV) is 800 nit between 1000 nit and 600 nit, the white data voltage cannot be reset to 8000, so the white data voltage can be set to a specific value less than 8000 within a gamma lookup table (GLUT) in which the brightness setting value is 1000 nit.

[0145] Similarly, if the luminance setting value (DBV) is 500 nit between 600 nit and 400 nit, the white data voltage cannot be reset to 8000, so the white data voltage can be set to a specific value less than 8000 within a gamma lookup table (GLUT) in which the luminance setting value is 600 nit.

[0146] Fig. 17 is a drawing showing an example of the driving timing of the display panel (100) of Fig. 1.

[0147] Referring to FIGS. 1 to 17, the driving timing may include a plurality of frames (FR1, FR2). The driving timing may include first and second frames (FR1, FR2). Each frame (FR1, FR2) may include an active period (AC1, AC2) and a blank period (BL1, BL2). Each frame (FR1, FR2) may include first and second active periods (AC1, AC2) and first and second blank periods (BL1, BL2).

[0148] The first frame (FR1) may include the first active section (AC1) and the first blank section (BL1), and the second frame (FR2) may include the second active section (AC2) and the second blank section (BL2).

[0149] Fig. 17 illustrates a case where the display panel (100) is driven at a fixed frequency. Accordingly, the first frame (FR1) and the second frame (FR2) may have the same length. The first active section (AC1) and the second active section (AC2) may have the same length. The first blank section (BL1) and the second blank section (BL2) may have the same length.

[0150] In the active period (AC1, AC2), the gate signals (GW, GB, GR) and the emission signals (EM1, EM2) may be sequentially applied to the pixel rows. In the blank period (BL1, BL2), the gate signals (GW, GB, GR) and the emission signals (EM1, EM2) may not be applied to the pixel rows.

[0151] In the present embodiment, the maximum data voltage (VDMAX) and the data power voltage (AVDD) can be varied on a frame-by-frame basis according to the brightness setting value (DBV). The maximum data voltage (VDMAX) and the data power voltage (AVDD) can be varied within the blank intervals (BL1, BL2).

[0152] If the interface of the power voltage generation unit (400) and the data driving unit (500) is an I2C (inter integrated circuit) interface, a voltage setting time of about 30 μs may be required, and a time of about 20 horizontal line sections may be required.

[0153] When the interface of the power voltage generation unit (400) and the data driving unit (500) is used as a system power management interface (SPMI), the voltage setting time can be reduced to within 2 μs.

[0154] Fig. 18 is a drawing showing an example of the driving timing of the display panel (100) of Fig. 1.

[0155] Referring to FIGS. 1 to 18, the driving timing may include a plurality of frames (FR1, FR2, FR3). The driving timing may include first, second, and third frames (FR1, FR2, FR3). Each frame (FR1, FR2, FR3) may include active periods (AC1, AC2, AC3) and blank periods (BL1, BL2, BL3). Each frame (FR1, FR2, FR3) may include first, second, and third active periods (AC1, AC2, AC3) and first, second, and third blank periods (BL1, BL2, BL3).

[0156] Fig. 18 illustrates a case where the display panel (100) is driven with a variable frequency. The first frame (FR1) having a first frequency may include the first active period (AC1) and the first blank period (BL1). The second frame (FR2) having a second frequency different from the first frequency may include the second active period (AC2) and the second blank period (BL2). The third frame (FR3) having a third frequency different from the first and second frequencies may include the third active period (AC3) and the third blank period (BL3).

[0157] The first active section (AC1) may have the same length as the second active section (AC2), and the first blank section (BL1) may have a different length from the second blank section (BL2).

[0158] The second active section (AC2) may have the same length as the third active section (AC3), and the second blank section (BL2) may have a different length from the third blank section (BL3).

[0159] A display device supporting variable frequencies may include a lighting frame in which a data voltage is written to a pixel and a holding frame in which the data voltage is not written to a pixel and only emits light. The lighting frame may be arranged within the active section (AC1, AC2, AC3). The holding frame may be arranged within the blank section (BL1, BL2, BL3).

[0160] For example, in the lighting frame, the data voltage (VDATA) may be applied to the first transistor (T1) and the light-emitting element (EE) may emit light. For example, in the holding frame, the data voltage (VDATA) may not be applied to the first transistor (T1) and the light-emitting element (EE) may emit light.

[0161] In the present embodiment, the maximum data voltage (VDMAX) and the data power voltage (AVDD) can be varied on a frame-by-frame basis according to the brightness setting value (DBV). The maximum data voltage (VDMAX) and the data power voltage (AVDD) can be varied within the blank periods (BL1, BL2, BL3).

[0162] According to the present embodiment, the driving current of the pixel is determined in proportion to the square of the difference between the data voltage (VDATA) and the reference voltage (VREF), and the data voltage (VDATA) may increase as it goes to white and decrease as it goes to black.

[0163] The data power voltage (AVDD) and the maximum data voltage (VDMAX) can be varied according to the brightness setting value (DBV) or brightness mode of the display device, and the minimum data voltage (VDMIN) can be fixed regardless of the brightness setting value (DBV) and the brightness mode of the display device.

[0164] Since the data power supply voltage (AVDD) and the maximum data voltage (VDMAX) vary depending on the brightness setting value (DBV) or the brightness mode, when the brightness setting value (DBV) is relatively low or the brightness mode is a low brightness mode, the white data voltage and the data power supply voltage (AVDD) can be set relatively low. Accordingly, the power consumption of the display device can be reduced.

[0165] When the fifth transistor (T5) and the sixth transistor (T6) of the pixel are P-type transistors, the activation level and inactivation level of the emission signal (EM1, EM2) can be used at a relatively low voltage, so that the power consumption of the display device can be further reduced.

[0166] Fig. 19 is a circuit diagram showing a pixel of a display panel (100) of a display device according to one embodiment of the present invention. Fig. 20 is a timing diagram showing input signals applied to the pixel of Fig. 19.

[0167] The display device according to the present embodiment is the same as the display device of FIGS. 1 to 18 except that the fifth transistor and the sixth transistor are N-type transistors, and therefore the same reference numbers are used for the same or similar components, and redundant descriptions are omitted.

[0168] Referring to FIGS. 1, 12, and 20, the display panel (100) includes a plurality of pixels, each of which includes a light-emitting element (EE). The pixels can emit light based on a first power supply voltage (ELVDD) and a second power supply voltage (ELVSS) that is lower than the first power supply voltage (ELVDD).

[0169] The above pixels receive a write gate signal (GW), an initialization gate signal (GB), a reference gate signal (GR), the data voltage (VDATA), a first emission signal (EM1), and a second emission signal (EM2), and display the image by emitting light from the light-emitting element (EE) according to the level of the data voltage (VDATA).

[0170] The pixel includes a light-emitting element (EE) and a first transistor (T1) for applying a driving current to the light-emitting element (EE). Here, the first transistor (T1) may be an N-type transistor. The first transistor (T1) may be an oxide semiconductor thin film transistor.

[0171] The driving current of the pixel may be proportional to the square of the difference between the data voltage (VDATA) and the reference voltage (VREF). The reference voltage (VREF) may be different from the first power voltage (ELVDD). The reference voltage (VREF) may be different from the second power voltage (ELVSS).

[0172] The pixel includes a first transistor (T1) including a control electrode connected to a first node (N1), a first electrode connected to a second node (N2), and a second electrode connected to a third node (N3), a second transistor (T2) including a control electrode to which the write gate signal (GW) is applied, a first electrode to which the data voltage (VDATA) is applied, and a second electrode connected to the first node (N1), a third transistor (T3) including a control electrode to which the reference gate signal (GR) is applied, a first electrode to which the reference voltage (VREF) is applied, and a second electrode connected to the first node (N1), a fourth transistor (T4) including a control electrode to which the initialization gate signal (GB) is applied, a first electrode to which the initialization voltage (VAINIT) is applied, and a second electrode connected to the anode electrode of the light emitting element (EE), a control electrode to which the first emission signal (EM1) is applied, and a first power voltage (ELVDD) is applied. It may include a fifth transistor (T5) including a first electrode to which the second emission signal (EM2) is applied and a second electrode connected to the second node (N2), a sixth transistor (T6) including a control electrode to which the second emission signal (EM2) is applied, a first electrode connected to the third node (N3) and a second electrode connected to the anode electrode of the light-emitting element (EE), the light-emitting element (EE) including the anode electrode and a cathode electrode to which the second power voltage (ELVSS) is applied, a first capacitor (C1) including a first electrode connected to the first node (N1) and a second electrode connected to the third node (N3), and a second capacitor (C2) including a first electrode to which the first power voltage (ELVDD) is applied and a second electrode connected to the third node (N3).

[0173] In the present embodiment, the second transistor (T2), the third transistor (T3), the fourth transistor (T4), the fifth transistor (T5), and the sixth transistor (T6) may be N-type transistors. The second transistor (T2), the third transistor (T3), the fourth transistor (T4), the fifth transistor (T5), and the sixth transistor (T6) may be oxide semiconductor thin film transistors.

[0174] In this embodiment, since the first to sixth transistors (T1 to T6) are all configured as N-type transistors, the manufacturing process of the display panel (100) can be simplified, and the manufacturing cost of the display device can be reduced.

[0175] According to the present embodiment, the driving current of the pixel is determined in proportion to the square of the difference between the data voltage (VDATA) and the reference voltage (VREF), and the data voltage (VDATA) may increase as it goes to white and decrease as it goes to black.

[0176] The data power voltage (AVDD) and the maximum data voltage (VDMAX) can be varied according to the brightness setting value (DBV) or brightness mode of the display device, and the minimum data voltage (VDMIN) can be fixed regardless of the brightness setting value (DBV) and the brightness mode of the display device.

[0177] Since the data power supply voltage (AVDD) and the maximum data voltage (VDMAX) vary depending on the brightness setting value (DBV) or the brightness mode, when the brightness setting value (DBV) is relatively low or the brightness mode is a low brightness mode, the white data voltage and the data power supply voltage (AVDD) can be set relatively low. Accordingly, the power consumption of the display device can be reduced.

[0178] Fig. 21 is a block diagram showing a display device according to one embodiment of the present invention.

[0179] Except that the drive control unit and the data drive unit according to the present embodiment are formed integrally, the same as the display devices of FIGS. 1 to 18 is used for identical or similar components, and redundant descriptions are omitted.

[0180] Referring to FIGS. 2 to 18 and 21, the drive control unit (200) can control the operations of the data drive unit (500) and the power voltage generation unit (400). The drive control unit (200) and the data drive unit (500) can be formed integrally to form an integrated drive unit (TED). A drive module in which at least the drive control unit (200) and the data drive unit (500) are formed integrally can be named a timing controller embedded data driver (Timing Controller Embedded Data Driver).

[0181] The above power voltage generation unit (400) can be formed separately from the integrated driving unit (TED).

[0182] The integrated driving unit (TED) can output the brightness setting value (DBV) to the power voltage generating unit (400). The power voltage generating unit (400) can generate the data power voltage (AVDD) and the maximum data voltage (VDMAX) that vary according to the brightness setting value (DBV) and output them to the integrated driving unit (TED). The power voltage generating unit (400) can generate the minimum data voltage (VDMIN) that is fixed and does not vary according to the brightness setting value (DBV) and output them to the integrated driving unit (TED).

[0183] According to the present embodiment, the driving current of the pixel is determined in proportion to the square of the difference between the data voltage (VDATA) and the reference voltage (VREF), and the data voltage (VDATA) may increase as it goes to white and decrease as it goes to black.

[0184] The data power voltage (AVDD) and the maximum data voltage (VDMAX) can be varied according to the brightness setting value (DBV) or brightness mode of the display device, and the minimum data voltage (VDMIN) can be fixed regardless of the brightness setting value (DBV) and the brightness mode of the display device.

[0185] Since the data power supply voltage (AVDD) and the maximum data voltage (VDMAX) vary depending on the brightness setting value (DBV) or the brightness mode, when the brightness setting value (DBV) is relatively low or the brightness mode is a low brightness mode, the white data voltage and the data power supply voltage (AVDD) can be set relatively low. Accordingly, the power consumption of the display device can be reduced.

[0186] FIG. 22 is a block diagram illustrating an electronic device (1000) according to one embodiment of the present invention. FIG. 23 is a diagram illustrating an example in which the electronic device (1000) of FIG. 22 is implemented as a smartphone. FIG. 24 is a diagram illustrating an example in which the electronic device (1000) of FIG. 22 is implemented as a monitor.

[0187] Referring to FIGS. 22 to 24, the electronic device (1000) may include a processor (1010), a memory device (1020), a storage device (1030), an input / output device (1040), a power supply (1050), and a display device (1060). In this case, the display device (1060) may be the display device of FIG. 1. In addition, the electronic device (1000) may further include several ports that can communicate with a video card, a sound card, a memory card, a USB device, etc., or communicate with other systems.

[0188] According to one embodiment, as illustrated in FIG. 23, the electronic device (1000) may be implemented as a smartphone. As illustrated in FIG. 24, the electronic device (1000) may be implemented as a monitor. However, this is merely exemplary, and the electronic device (1000) is not limited thereto. For example, the electronic device (1000) may be implemented as a television, a mobile phone, a video phone, a smart pad, a smart watch, a tablet PC, a vehicle navigation system, a laptop, a head-mounted display device, etc.

[0189] The processor (1010) may perform specific calculations or tasks. Depending on the embodiment, the processor (1010) may be a microprocessor, a central processing unit, an application processor, etc. The processor (1010) may be connected to other components via an address bus, a control bus, a data bus, etc. Depending on the embodiment, the processor (1010) may also be connected to an expansion bus, such as a Peripheral Component Interconnect (PCI) bus.

[0190] The above processor (1010) can output the input image data (IMG) and the input control signal (CONT) to the drive control unit (200) of Fig. 1. The processor (1010) may also be referred to as a host.

[0191] The memory device (1020) can store data necessary for the operation of the electronic device (1000). For example, the memory device (1020) may include a non-volatile memory device such as an Erasable Programmable Read-Only Memory (EPROM) device, an Electrically Erasable Programmable Read-Only Memory (EEPROM) device, a flash memory device, a Phase Change Random Access Memory (PRAM) device, a Resistance Random Access Memory (RRAM) device, a Nano Floating Gate Memory (NFGM) device, a Polymer Random Access Memory (PoRAM) device, a Magnetic Random Access Memory (MRAM), a Ferroelectric Random Access Memory (FRAM) device, and / or a volatile memory device such as a Dynamic Random Access Memory (DRAM) device, a Static Random Access Memory (SRAM) device, a mobile DRAM device, and the like.

[0192] The storage device (1030) may include a solid state drive (SSD), a hard disk drive (HDD), a CD-ROM, etc. The input / output device (1040) may include an input means such as a keyboard, a keypad, a touchpad, a touchscreen, a mouse, etc., and an output means such as a speaker, a printer, etc. In some embodiments, a display device (1060) may be included in the input / output device (1040). The power supply (1050) may supply power required for the operation of the electronic device (1000). The display device (1060) may be connected to other components via the buses or other communication links.

[0193] According to the display device and electronic device including the same according to the present invention described above, power consumption of the display device can be reduced.

[0194] Although the present invention has been described with reference to the above embodiments, it will be understood by those skilled in the art that various modifications and changes can be made to the present invention without departing from the spirit and scope of the present invention as set forth in the claims below.

[0195] <Explanation of symbols>

[0196] 100: Display panel 200: Drive control unit

[0197] 300: Gate driver 400: Power voltage generator

[0198] 500: Data drive unit 600: Emission drive unit

Claims

1. A display panel including pixels that emit light based on a first power supply voltage and a second power supply voltage that is lower than the first power supply voltage; A data driver that outputs a data voltage to the above pixel; and The data driving unit includes a power supply voltage generation unit that outputs a data power supply voltage, a maximum data voltage, and a minimum data voltage, The brightness setting value changes, the data power voltage and the maximum data voltage change, A display device characterized in that the minimum data voltage is fixed.

2. A display device characterized in that, in the first paragraph, the brightness setting value changes and the difference between the data power voltage and the maximum data voltage is fixed.

3. A display device according to claim 2, characterized in that the data power supply voltage is greater than the maximum data voltage.

4. A display device characterized in that, in the first paragraph, the brightness setting value changes and the difference between the reference voltage applied to the pixel and the minimum data voltage is fixed.

5. In the fourth paragraph, the reference voltage is different from the first power supply voltage, A display device characterized in that the reference voltage is different from the second power supply voltage.

6. A display device according to claim 4, characterized in that the reference voltage is greater than the minimum data voltage.

7. A display device according to claim 6, characterized in that the minimum data voltage is greater than the second power supply voltage.

8. A display device according to claim 1, characterized in that the maximum data voltage is greater than the white data voltage corresponding to the maximum grayscale in the luminance setting value.

9. A display device according to claim 8, characterized in that the brightness setting value changes and the difference between the maximum data voltage and the white data voltage is fixed.

10. A display device according to claim 8, characterized in that the minimum data voltage is the same as the black data voltage corresponding to the minimum grayscale.

11. In the first paragraph, the pixel includes a light-emitting element and a first transistor that applies a driving current to the light-emitting element, A display device characterized in that the first transistor is an N-type transistor.

12. A display device according to claim 11, wherein the driving current of the pixel is proportional to the square of the difference between the data voltage and the reference voltage applied to the pixel.

13. In the 11th paragraph, the pixel The first transistor including a control electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node; A second transistor including a control electrode to which a write gate signal is applied, a first electrode to which the data voltage is applied, and a second electrode connected to the first node; A third transistor including a control electrode to which a reference gate signal is applied, a first electrode to which a reference voltage is applied, and a second electrode connected to the first node; A fourth transistor including a control electrode to which an initialization gate signal is applied, a first electrode to which an initialization voltage is applied, and a second electrode connected to the anode electrode of the light-emitting element; A fifth transistor including a control electrode to which a first emission signal is applied, a first electrode to which the first power voltage is applied, and a second electrode connected to the second node; A sixth transistor including a control electrode to which a second emission signal is applied, a first electrode connected to the third node, and a second electrode connected to the anode electrode of the light-emitting element; The light emitting element including the anode electrode and the cathode electrode to which the second power voltage is applied; A first capacitor including a first electrode connected to the first node and a second electrode connected to the third node; and A display device characterized by comprising a second capacitor including a first electrode to which the first power voltage is applied and a second electrode connected to the third node.

14. In the 13th paragraph, the second transistor, the third transistor and the fourth transistor are N-type transistors, A display device characterized in that at least one of the fifth transistor and the sixth transistor is a P-type transistor.

15. A display device according to claim 13, characterized in that the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are N-type transistors.

16. In the 13th paragraph, in the first section, the first emission signal has a deactivation level, the second emission signal has an activation level, the reference gate signal has an activation level, the initialization gate signal has an activation level, and the write gate signal has a deactivation level; in the second section after the first section, the first emission signal has an activation level, the second emission signal has an deactivation level, the reference gate signal has the activation level, the initialization gate signal has the activation level, and the write gate signal has the deactivation level; in the third section after the second section, the first emission signal has the deactivation level, the second emission signal has the deactivation level, the reference gate signal has the deactivation level, the initialization gate signal has the activation level, and the write gate signal has the activation level; in the fourth section after the third section, the first A display device characterized in that the emission signal has the activation level, the second emission signal has the activation level, the reference gate signal has the deactivation level, the initialization gate signal has the deactivation level, and the write gate signal has the deactivation level.

17. In the first paragraph, further comprising a driving control unit that controls the operation of the data driving unit and the power voltage generating unit, A display device characterized in that the driving control unit outputs the brightness setting value to the power voltage generation unit.

18. In the 17th paragraph, the driving control unit and the data driving unit are formed integrally to form an integrated driving unit, The above integrated driving unit outputs the brightness setting value to the power voltage generating unit, A display device characterized in that the power voltage generation unit outputs the data power voltage, the maximum data voltage, and the minimum data voltage to the integrated driving unit.

19. A display panel including pixels that emit light based on a first power supply voltage and a second power supply voltage that is lower than the first power supply voltage; A data driver that outputs a data voltage to the above pixel; and The data driving unit includes a power supply voltage generation unit that outputs a data power supply voltage, a maximum data voltage, and a minimum data voltage, The brightness mode changes, the data power voltage and the maximum data voltage change, A display device characterized in that the minimum data voltage is fixed.

20. A display panel including pixels that emit light based on a first power supply voltage and a second power supply voltage that is lower than the first power supply voltage; A data driver that outputs a data voltage to the above pixel; A power voltage generation unit that outputs a data power voltage, a maximum data voltage, and a minimum data voltage to the above data driving unit; A drive control unit that controls the operation of the data drive unit and the power voltage generation unit; and Includes a processor that outputs an input control signal and input image data to the above driving control unit, The brightness setting value changes, the data power voltage and the maximum data voltage change, An electronic device characterized in that the minimum data voltage is fixed.

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