Encoding method and apparatus, decoding method and apparatus, device, and storage medium

By using the same scrambler to scramble and encode training frames and data frames, the problem of scramblers not being reusable in training and data modes is solved, improving data transmission efficiency and security while reducing hardware resource requirements.

WO2026051520A1PCT designated stage Publication Date: 2026-03-12HUAWEI TECH CO LTD
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-06-26
Publication Date
2026-03-12

AI Technical Summary

Technical Problem

In existing technologies, scramblers for training mode and data mode cannot be reused, which increases hardware resources and requires additional frequency division circuits when switching modes, affecting efficiency and cost.

Method used

The same scrambler is used to scramble both training and data frames, and the scrambler continues to run when switching from training mode to data mode, avoiding additional hardware resources and initial value transfer. The same scrambler is used to scramble and encode both training and data frames.

Benefits of technology

It improves training efficiency, reduces hardware resource requirements, simplifies mode switching, and enhances the security and stability of data transmission.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to the technical field of communications, and discloses an encoding method and apparatus, a decoding method and apparatus, a device, and a storage medium. The encoding method comprises: acquiring a training frame; scrambling the training frame on the basis of a scrambler to obtain scrambled data, the scrambler being further used for scrambling a data frame; and performing first encoding on the basis of the scrambled data to obtain first encoded data. In the encoding method provided in the present application, a same scrambler is used to scramble a training frame and a data frame, thereby avoiding an increase in additional hardware resources. In addition, scrambling of a training frame in a training mode and scrambling of a data frame in a data mode are implemented by using a same scrambler, a device used for encoding is smoothly switched from the training mode to the data mode, and operation of the scrambler is uninterrupted; therefore, an initial value of the scrambler in the data mode does not need to be transmitted, so that the transmission time of the initial value is saved, thereby improving the training efficiency.
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Description

Encoding and decoding method, device, apparatus and storage medium

[0001] The present application claims priority to the Chinese patent application No. 202411255734.4, filed on September 6, 2024, and entitled "Encoding and decoding method, device, apparatus and storage medium", the entire content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the field of communication technology, in particular to an encoding and decoding method, device, apparatus and storage medium. BACKGROUND

[0003] With the development of industrial intelligence, the requirements for the security and stability of data transmission are becoming higher and higher. In the process of data transmission, the data is encoded. In addition, scrambling the data before encoding as a digital signal processing technology, by scrambling the original data, the data is scattered in time and frequency, realizing the randomization of the data, and thus improving the security and stability of the transmitted data. SUMMARY

[0004] The present application provides an encoding and decoding method, device, apparatus and storage medium to improve the security and stability of data transmission. The technical solution is as follows.

[0005] In a first aspect, an encoding method is provided. The method comprises: obtaining a training frame; scrambling the training frame based on a scrambler to obtain scrambled data, the scrambler also being used for scrambling a data frame; and performing first encoding based on the scrambled data to obtain first encoded data.

[0006] The encoding method provided by the present application uses the same scrambler to scramble the training frame and the data frame, avoiding the increase of additional hardware resources. Moreover, since the scrambling of the training frame in the training mode and the scrambling of the data frame in the data mode are realized by the same scrambler, the device used for encoding is smoothly switched from the training mode to the data mode, and the scrambler runs uninterruptedly in the training mode and the training mode, so there is no need to transmit the initial value of the scrambler in the data mode, saving the time of initial value transmission and improving the training efficiency.

[0007] In a possible implementation, the scrambling of the training frame based on the scrambler to obtain the scrambled data comprises: obtaining first scrambler bits output by the scrambler, scrambling the training frame based on the first scrambler bits to obtain the scrambled data.

[0008] In a possible implementation, the scrambling the training frame based on the first scrambler bit to obtain scrambled data comprises: scrambling the training frame based on the first scrambler bit and a second scrambler bit to obtain the scrambled data, the second scrambler bit being generated based on the first scrambler bit.

[0009] The application does not limit the process of scrambling the training frame to obtain scrambled data. One scrambler bit (for example, the first scrambler bit) can be used, or multiple scrambler bits (for example, the first scrambler bit and the second scrambler bit) can be used. The scrambling process has high flexibility.

[0010] In a possible implementation, when the scrambled data is obtained based on the first scrambler bit, the first encoding is performed based on the scrambled data to obtain first encoded data, which comprises: performing the first encoding on the scrambled data and a second scrambler bit to obtain the first encoded data, the second scrambler bit being generated based on the first scrambler bit. Even if only one scrambler bit is used in the process of scrambling the training frame, other scrambler bits (for example, the second scrambler bit) generated by the scrambler can also be used in the encoding process, so that all the multiple scrambler bits generated by the scrambler are used, and the waste of the second scrambler bit is avoided.

[0011] In a possible implementation, when the scrambled data is obtained based on the first scrambler bit and the second scrambler bit, the first encoding is performed based on the scrambled data to obtain first encoded data, which comprises: performing the first encoding on the scrambled data to obtain the first encoded data. The scrambled data can be directly encoded, and no scrambler bit is needed, so that the encoding process is simple and efficient.

[0012] Even if different scrambling modes are used to obtain different scrambled data, different encoding modes can be used to perform the first encoding on the different scrambled data, so that the first encoded data can be obtained by encoding any scrambled data, which is suitable for any scrambling scenario and has high universality.

[0013] In a possible implementation, the training frame comprises multiple subframes, and the last subframe in the multiple subframes comprises information field (InfoField) information. The InfoField information is used to interact with a communication end, and the InfoField information does not carry an initial value of a scrambler. The initial value of the scrambler does not need to be carried in the training frame, so that the amount of data carried in the training frame is smaller, and the efficiency of the training frame with a smaller amount of data to be processed is higher.

[0014] In a possible implementation, the training frame comprises 16 subframes, and the length of each subframe is 128 bits. The boundary of the subframe corresponds to the boundary of one data frame.

[0015] In one possible implementation, the training frame consists of 8 subframes, each 512 bits long, and the boundaries of the subframes correspond to the boundaries of a data frame.

[0016] This application does not limit the structure of the training frames and can include any number of subframes of any size, such as 16 128-bit subframes or 8 512-bit subframes, which provides high flexibility.

[0017] In one possible implementation, after obtaining the first encoded data, the method further includes: performing a first pulse amplitude modulation (PAM) mapping on the first encoded data to obtain a training sequence. Even if the first encoded data is not a first PAM code group, that is, the symbols in the first encoded data are not assigned to the first PAM level value, a training sequence represented by the first PAM level value can still be obtained by performing the first PAM mapping on the first encoded data, thereby achieving successful transmission of the first encoded data.

[0018] In one possible implementation, the first PAM mapping is a PAM2 mapping.

[0019] In one possible implementation, the method further includes: scrambling the data frame based on a scrambler to obtain a scrambled data frame; and performing a second encoding on the scrambled data frame to obtain second encoded data. In addition to scrambling and first encoding the training frame, the data frame is also scrambled and second encoded. The encoding method provided in this application is applicable to both training and data modes, exhibiting high versatility.

[0020] In one possible implementation, scrambling a data frame using a scrambler to obtain a scrambled data frame includes: scrambling the data frame using a first scrambler bit, a second scrambler bit, and a third scrambler bit, where the second and third scrambler bits are derived from the first scrambler bit. The first and second scrambler bits are the scrambler bits used in training mode to scramble training frames. The scrambler bits used in training mode are reused multiple times, resulting in high utilization of the scrambler bits.

[0021] In one possible implementation, the third scrambler bit is based on Y. n Generate, Y n It has the same maximum displacement length as the first scrambler bit.

[0022] In one possible implementation, the third scrambler bit is based on Z. n Generate, Z n It has the same maximum displacement length as the first scrambler bit.

[0023] The application does not limit the generation manner of the third scrambling code bit, which can be based on Y n or Z n , and has high flexibility.

[0024] In a possible implementation, after obtaining the second encoded data, the method further includes: performing second PAM mapping on the second encoded data to obtain a data sequence. The second PAM mapping is performed on the second encoded data that does not belong to the second PAM code group, so as to map the second encoded data into the data sequence including a plurality of second PAM level values, and to realize successful transmission of the second encoded data by transmitting the data sequence.

[0025] In a possible implementation, the second PAM is a non-integer multiple of the first PAM. The application does not limit the first PAM used in the training mode and the second PAM used in the data mode, which can be any pair of PAMs that are non-integer multiples, and has high flexibility.

[0026] In a possible implementation, the second PAM mapping is PAM3 mapping.

[0027] In a possible implementation, the second encoding is implemented by an 8B6T encoder. The scrambled data frame can be encoded by one 8B6T encoder, and the encoding operation of the scrambled data frame is simple and has high encoding efficiency.

[0028] In a possible implementation, the first encoding is implemented by one encoder, and the training sequence includes the encoding result of the one encoder; or the first encoding is implemented by a plurality of encoders, and the training sequence includes the encoding result of the plurality of encoders. The application does not limit the encoder used for the first encoding, which can be based on one encoder or a plurality of encoders, and has high flexibility.

[0029] In a possible implementation, the one encoder is a 4B6B encoder, and the plurality of encoders are 2B3B encoders.

[0030] In a possible implementation, the first encoding is performed on the scrambled data to obtain the first encoded data, including: determining a transmission code group corresponding to the scrambled data according to the scrambled data; and determining the first encoded data according to the transmission code group.

[0031] In a possible implementation, the first encoded data is determined according to the transmission code group, specifically including: determining the first encoded data according to a result obtained by taking a complement of the transmission code group.

[0032] In a second aspect, an encoding apparatus is provided, which comprises: an obtaining module configured to obtain a training frame; a scrambling module configured to scramble the training frame based on a scrambler to obtain scrambled data, the scrambler being further configured to scramble a data frame; and an encoding module configured to perform first encoding on the scrambled data to obtain first encoded data.

[0033] In a possible implementation, the scrambling module is configured to obtain first scrambler bits output by the scrambler, and scramble the training frame based on the first scrambler bits to obtain the scrambled data.

[0034] In a possible implementation, the scrambling module is configured to scramble the training frame based on the first scrambler bits and second scrambler bits to obtain the scrambled data, the second scrambler bits being generated based on the first scrambler bits; and the encoding module is configured to perform first encoding on the scrambled data to obtain the first encoded data.

[0035] In a possible implementation, the encoding module is configured to perform first encoding on the scrambled data and the second scrambler bits to obtain the first encoded data, the second scrambler bits being generated based on the first scrambler bits.

[0036] In a possible implementation, the training frame comprises a plurality of subframes, and a last subframe in the plurality of subframes comprises InfoField information, the InfoField information being used to interact with a communication end, and the InfoField information not carrying an initial value of the scrambler.

[0037] In a possible implementation, the training frame comprises 16 subframes, each subframe having a length of 128 bits, and a boundary of a subframe corresponding to a boundary of a data frame.

[0038] In a possible implementation, the training frame comprises 8 subframes, each subframe having a length of 512 bits, and a boundary of a subframe corresponding to a boundary of a data frame.

[0039] In a possible implementation, the apparatus further comprises a first mapping module configured to perform first PAM mapping on the first encoded data to obtain a training sequence.

[0040] In a possible implementation, the first PAM mapping is PAM2 mapping.

[0041] In a possible implementation, the scrambling module is further configured to scramble the data frame based on the scrambler to obtain a scrambled data frame; and the encoding module is further configured to perform second encoding on the scrambled data frame to obtain second encoded data.

[0042] In a possible implementation, the scrambling module is configured to scramble the data frame based on the first scrambling code bit, the second scrambling code bit and the third scrambling code bit to obtain a scrambled data frame, and the second scrambling code bit and the third scrambling code bit are obtained based on the first scrambling code bit.

[0043] In a possible implementation, the third scrambling code bit is generated based on Y n and Y n has the same maximum displacement length as the first scrambling code bit.

[0044] In a possible implementation, the third scrambling code bit is generated based on Z n and Z n has the same maximum displacement length as the first scrambling code bit.

[0045] In a possible implementation, the apparatus further includes a second mapping module configured to perform second PAM mapping on the second encoded data to obtain a data sequence.

[0046] In a possible implementation, the second PAM is a non-integer multiple of the first PAM.

[0047] In a possible implementation, the second PAM mapping is PAM3 mapping.

[0048] In a possible implementation, the second encoding is implemented by an 8B6T encoder.

[0049] In a possible implementation, the first encoding is implemented by one encoder, and the training sequence includes an encoding result of the one encoder; or the first encoding is implemented by multiple encoders, and the training sequence includes encoding results of the multiple encoders.

[0050] In a possible implementation, the one encoder is a 4B6B encoder, and the multiple encoders are 2B3B encoders.

[0051] In a possible implementation, the encoding module is configured to determine a transmission code group corresponding to the scrambled data according to the scrambled data, and determine the first encoded data according to the transmission code group.

[0052] In a possible implementation, the encoding module is configured to determine the first encoded data according to a result obtained by taking a complement of the transmission code group.

[0053] In a third aspect, a decoding method is provided, which includes obtaining a signal sequence, performing first decoding based on the signal sequence to obtain a sequence to be descrambled, determining scrambled data obtained by scrambling a training frame by using a scrambling code based on the sequence to be descrambled, and descrambling the scrambled data by using the scrambling code to obtain the training frame, and the scrambling code is further used to scramble a data frame.

[0054] In a fourth aspect, an encoding device is provided, which includes a processor configured to load and execute at least one instruction to cause the encoding device to perform the method in any possible implementation of the first aspect. In this case, the processor is configured to perform the method in any possible implementation of the first aspect to cause the encoding device to perform the method in any possible implementation of the first aspect.

[0055] In a possible implementation, the device includes a memory coupled to the processor, and the memory stores the at least one instruction.

[0056] In a fifth aspect, a decoding device is provided, which includes a processor configured to load and execute at least one instruction to cause the decoding device to perform the method in any possible implementation of the third aspect. In this case, the processor is configured to perform the method in any possible implementation of the third aspect to cause the decoding device to perform the method in any possible implementation of the third aspect.

[0057] In a sixth aspect, a computer-readable storage medium is provided, which stores at least one instruction, and the instruction is loaded and executed by a processor to implement the encoding method in any possible implementation of the first aspect and / or the decoding method in any possible implementation of the third aspect.

[0058] In a seventh aspect, a computer program (product) is provided, which includes computer programs / instructions, and the computer programs / instructions are executed by a processor to cause a computer to implement the encoding method in any possible implementation of the first aspect and / or the decoding method in any possible implementation of the third aspect.

[0059] In an eighth aspect, a communication apparatus is provided, which includes a transceiver, a memory and a processor. In this case, the transceiver, the memory and the processor communicate with each other through an internal connection path, the memory is configured to store instructions, and the processor is configured to execute the instructions stored in the memory to control the transceiver to receive a signal and control the transceiver to send a signal, and when the processor executes the instructions stored in the memory, the processor is caused to perform the method in any possible implementation of the first aspect or the third aspect. Optionally, the communication apparatus can be a chip.

[0060] Optionally, the processor is one or more, and the memory is one or more.

[0061] Optionally, the memory can be integrated with the processor, or the memory and the processor are separately arranged.

[0062] In a specific implementation process, the memory can be a non-transitory memory, for example, a read only memory (ROM), which can be integrated on the same chip with the processor, or can be separately arranged on different chips. The type of memory and the arrangement manner of the memory and the processor are not limited in the present application.

[0063] In a ninth aspect, a chip is provided, including a processor, configured to invoke and run running program instructions or codes stored in a memory, so that a communication device installed with the chip performs the method in any of the aspects.

[0064] In a tenth aspect, another chip is provided, including an input interface, an output interface, a processor and a memory, the input interface, the output interface, the processor and the memory are connected through internal connection paths, the processor is configured to execute the codes in the memory, and when the codes are executed, the processor is configured to perform the method in any of the aspects.

[0065] In an eleventh aspect, a processing system is provided, including an encoding device and a decoding device, the encoding device is configured to implement the encoding method in any of the possible implementation manners of the first aspect, and the decoding device is configured to implement the decoding method in any of the possible implementation manners of the third aspect.

[0066] In a twelfth aspect, a decoding apparatus is provided, including an acquisition module, configured to acquire a signal sequence; a decoding module, configured to perform first decoding based on the signal sequence to obtain a sequence to be descrambled; a descrambling module, configured to determine scrambled data obtained by scrambling a training frame by a scrambler based on the sequence to be descrambled, and perform descrambling on the scrambled data to obtain the training frame, and the scrambler is further configured to scramble a data frame.

[0067] It should be understood that the apparatus mentioned in the above second aspect, eighth aspect and twelfth aspect can be the chip mentioned in the ninth aspect or the tenth aspect, and can also be the device mentioned in the fourth aspect or the fifth aspect. The beneficial effects achieved by the technical solutions of the second aspect to the twelfth aspect and the corresponding possible implementation manners can be referred to the technical effects of the first aspect and the corresponding possible implementation manners, which will not be described herein. BRIEF DESCRIPTION OF DRAWINGS

[0068] FIG. 1 is a schematic diagram of data processing provided by an embodiment of the present application;

[0069] FIG. 2 is a schematic diagram of data processing in different modes provided by an embodiment of the present application;

[0070] FIG. 3 is a schematic diagram of encoding provided by an embodiment of the present application;

[0071] FIG. 4 is a schematic diagram of an implementation environment according to an embodiment of the present application;

[0072] FIG. 5 is a schematic diagram of another implementation environment according to an embodiment of the present application;

[0073] FIG. 6 is a schematic diagram of yet another implementation environment according to an embodiment of the present application;

[0074] FIG. 7 is a schematic diagram of still another implementation environment according to an embodiment of the present application;

[0075] FIG. 8 is a flowchart of an encoding method according to an embodiment of the present application;

[0076] FIG. 9 is a schematic diagram of a structure of a training frame according to an embodiment of the present application;

[0077] FIG. 10 is a schematic diagram of a structure of an InfoField information according to an embodiment of the present application;

[0078] FIG. 11 is a schematic diagram of a structure of another training frame according to an embodiment of the present application;

[0079] FIG. 12 is a schematic diagram of a structure of another InfoField information according to an embodiment of the present application;

[0080] FIG. 13 is a schematic diagram of an encoding process according to an embodiment of the present application;

[0081] FIG. 14 is a schematic diagram of another encoding process according to an embodiment of the present application;

[0082] FIG. 15 is a schematic diagram of a processing of a training frame according to an embodiment of the present application;

[0083] FIG. 16 is a schematic diagram of a processing of another training frame according to an embodiment of the present application;

[0084] FIG. 17 is a schematic diagram of yet another encoding process according to an embodiment of the present application;

[0085] FIG. 18 is a schematic diagram of a structure of an encoding apparatus according to an embodiment of the present application;

[0086] FIG. 19 is a schematic diagram of a structure of a network device according to an embodiment of the present application;

[0087] FIG. 20 is a schematic diagram of a structure of another network device according to an embodiment of the present application. DETAILED DESCRIPTION

[0088] The terms used in the implementation part of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. In order to make the purpose, technical solutions and advantages of the present application clearer, the implementation part of the present application will be described in further detail below with reference to the drawings.

[0089] In the field of communication technology, single pair Ethernet (SPE) has improved communication rate and communication distance compared with traditional bus, which can improve the communication rate by hundreds of times, and the farthest communication distance can reach 1 kilometer (km). SPE solves the pain point that the traditional bus usually cannot meet the development needs of industrial intelligence at tens of kilobits per second (kps), and can supply power to industrial field devices while communicating data.

[0090] Before transmitting data, the communication device encodes the data to be transmitted to avoid long continuous level, ensure bandwidth utilization efficiency and improve data transmission reliability. In addition, the data will be scrambled before encoding to realize data randomization and avoid radiation spikes. Figure 1 shows the encoding and scrambling process in two modes, which adapt to the needs of different scenarios. The left graph of Figure 1 adapts to long-reach mode, for example, process industry 500 meter (m) reliable transmission, and the right graph of Figure 1 adapts to low-latency mode, for example, motion control 1.5 microsecond (us) low latency. Referring to Figure 1, whether it is long-reach mode or low-latency mode, the communication device will scramble the data using a side-stream scrambler, and then encode the scrambled data. Scrambling, for example, is side-stream scrambling as shown in Figure 1, and encoding, for example, is 8B6T encoding as shown in Figure 1.

[0091] Referring to FIG. 2, in the related art, a communication device encodes information (which can come from a service frame or an idle frame) received by a media independent interface (MII) interface in a data mode 80B / 81B to obtain a code block composed of 81 bits, inserts 9 bits of operations administration and maintenance (OAM) every 50 code blocks, and sends the code block to a reed solomon (RS) (450, 406) to perform forward error correction (FEC) encoding to generate an FEC data frame. The FEC data frame is subjected to exclusive OR with a pseudo-noise (PN) sequence generated by a scrambler based on a 15-bit linear-feedback shift register (LFSR) to perform side stream scrambling, which can also be referred to as bypass scrambling in some cases, as shown in FIG. 2. The scrambled data stream is mapped to 2 PAM3 symbols every 3 bits, that is, 3B2T line coding is performed, to obtain a PAM3 data sequence. In a training mode, the scrambler generates a PN sequence using a 33-bit LFSR, and the training frame is subjected to exclusive OR scrambling with the PN sequence. The scrambled training bit stream is mapped to a PAM2 training sequence.

[0092] Due to different modulation efficiencies of 3B2T PAM3 and PAM2, the scramblers used to generate PN sequences in the training mode and the data mode cannot be multiplexed, and the training mode and the data mode use different side stream scramblers, that is, different LFSR orders. For example, as shown in FIG. 3, in the training mode, the scrambler generates a PN sequence 1 based on a 33-bit LFSR and a clock clk1, and the training frame is subjected to scrambling using the PN sequence 1. The scrambled bit stream is mapped to a training sequence using PAM2. In the data mode, the scrambler generates a PN sequence 2 based on a 15-bit LFSR and a clock clk2, and the data frame is subjected to scrambling using the PN sequence 2. The scrambled bit stream is mapped to a data sequence using 3B2T PAM3. A multiplexer (MUX) is used to select an output sequence, which can be the data sequence in the data mode or the training sequence in the training mode. As can be seen, the scramblers in the training mode and the data mode cannot be multiplexed, and in addition, an additional frequency division circuit is needed to provide different working clocks, which increases hardware resources.

[0093] The embodiment of the present application provides a coding method, please refer to Fig. 4, which shows an implementation environment schematic diagram of the coding method provided by the embodiment of the present application, the implementation environment includes a communication device 01, the communication device 01 includes a scrambling code generator, which is used for scrambling the obtained training frame to obtain a scrambled bit stream, and performing first coding on the scrambled bit stream to obtain first coded data. Wherein, the bit stream obtained after the training frame is scrambled is also the scrambled data, and the scrambling code generator included in the communication device 01 is also used for scrambling the data frame.

[0094] Optionally, the communication device 01 can be a device configured in a servo system, for example, as shown in Fig. 5, the servo system includes a servo drive and a servo motor. Wherein, the servo system is an automatic control system which enables the position, orientation, state and other outputs of an object to follow the changes of the input target or given value. The servo drive is a controller for controlling the servo motor, which is used for converting the instructions issued by the upper computer into signals recognizable by the servo motor, so as to realize the accurate control of the servo motor. The servo motor is a motor for controlling the operation of mechanical elements, which is used for converting voltage signals into torque and speed to drive mechanical elements. For the servo system shown in Fig. 5, the communication device 01 shown in Fig. 4 can be a servo drive or a servo motor.

[0095] In addition, the communication device 01 can also be configured in other application scenarios, and the communication device 01 can be a switch or an end-side instrument. Wherein, the end-side instrument and the switch are configured with an SPE interface, and the end-side instrument and the switch communicate through the SPE interface. Fig. 6 is a structural schematic diagram of a switch and an end-side instrument provided by the embodiment of the present application, and the communication device 01 in Fig. 4 can be the end-side instrument or the field switch shown in Fig. 6. In Fig. 6, the end-side instrument and the field switch communicate through a pair of twisted copper wires. Referring to Fig. 6, the end-side instrument can be used for visual & spectral analysis, ultrasonic flow analysis and valve positioning. In the case that the end-side instrument is used for valve positioning, the end-side instrument can be called a valve positioner as shown in Fig. 6.

[0096] Fig. 6 is intended to illustrate the connection of the end-side instrument and the field switch, and is not used to limit the network topology structure in which the end-side instrument and the field switch are located. The network topology structure in which the end-side instrument and the field switch are located can be as shown in Fig. 6, two field switches are connected to a power switch, and the power switch is connected to a control room. The network topology structure in which the end-side instrument and the field switch are located can also be as shown in Fig. 7, any field switch is connected to a plurality of power switches, and the plurality of power switches are connected to the control room.

[0097] Exemplarily, the communication device 01 can be a server, for example, a central server, an edge server, or a local server in a local data center. The server can be a physical server, or a cloud server providing cloud computing services. In some embodiments, the communication device 01 can be a terminal device such as a desktop computer, a notebook computer, or a smart phone. The communication device 01 can be a standalone device, or a component on a device, for example, a transceiver, a processor, or a chip.

[0098] The encoding method provided in the embodiments of the present application can be applied to the implementation environment shown in any of FIGS. 4-7. For example, the method is applied to the communication device 01, and a flowchart of the method is shown in FIG. 8, including S801-S803.

[0099] S801, obtaining a training frame.

[0100] In a possible implementation, the communication devices can transmit information in two working modes, namely a training mode and a data mode. The information transmitted in the training mode is, for example, a training sequence, and the information transmitted in the data mode is, for example, service data or invalid data. The description of the invalid data can be referred to the description of the data mode below. In the training mode, the communication device as a sending end transmits the training sequence, so that the circuit and algorithm of the communication device as a receiving end can converge quickly and stably, thereby ensuring that the service data transmitted by the communication device as the sending end in the data mode can be reliably received. The service data transmitted in the data mode can be video information, audio information, image information, control information, or application software information, etc. In the embodiments of the present application, the communication device as the sending end can be referred to as a first device, and the communication device as the receiving end can be referred to as a second device. In some cases, the second device also belongs to a far-end communication device. Optionally, the transmission between the communication devices can be bidirectional transmission. In this case, the communication device as the sending end can also be the communication device as the receiving end, and the communication device as the receiving end can also be the communication device as the sending end.

[0101] Based on the training sequence transmission requirement of the first device in the training mode, the first device can first acquire a training frame, and process the training frame to obtain the training sequence to be transmitted. The first device can receive the training frame sent from other devices, or generate the training frame to be transmitted. The embodiments of the present application do not limit the manner of acquiring the training frame by the first device, nor the structure of the training frame. In a possible implementation manner, the boundary of a subframe in the training frame and the data frame in the data mode have a corresponding relationship. The training frame includes a plurality of subframes. The last subframe in the plurality of subframes includes information field (InfoField) information. The InfoField information is used to interact information with a communication end, and the information includes a start operation. The InfoField information does not carry the initial value of the scrambler. The communication end of the first device refers to a second device used to receive the training sequence.

[0102] FIG. 9 is a structure diagram of a training frame provided by an embodiment of the present application. The training frame in FIG. 9 is 2048 bits long, and includes 16 subframes. The length of each subframe is 128 bits. The boundary of one subframe corresponds to the boundary of one data frame. The last subframe, that is, the 16th subframe, includes InfoField information. Optionally, the InfoField information can be located in the first L bits of the last subframe. Referring to FIG. 9, the first bit of the first 15 subframes of the training frame is 1. The first L bits of the last subframe are InfoField information, and the remaining bit positions are all 0. In some cases, the InfoField information can also be located in the last L bits of the last subframe. L is, for example, 96.

[0103] Fig. 10 is a structure diagram of an InfoField information according to an embodiment of the present application. Referring to Fig. 10, the InfoField information includes 12 octets, which can also be referred to as bytes in some cases, and the InfoField information has a total of 96 bits. Byte 1 in the InfoField information is assigned a value of 0xBB, byte 2 is assigned a value of 0xA7, and byte 3 is assigned a value of 0x00, and the first three bytes serve as a delimiter of the InfoField information. Bytes 4, 5, and 6, which have a total of 24 bits, are used to carry a value of a partial frame count (PFC) of a training frame. Byte 7 is used to carry a message (Message) indicating a physical medium attachment state (PMA state) in which a current device is located. For example, when the PMA state in the Message field is 00, it indicates that the current device is in an initial training phase. Bytes 8, 9, and 10 carry a user configuration capability (UsrCfgCap) and a data switch partial frame (DataSwPFC). The UsrCfgCap is, for example, a value of a user configuration specific register and a physical (PHY) capability (such as energy saving and operation administration and maintenance). The DataSwPFC is, for example, a number of a first subframe of a training frame corresponding to a switch from PAM2 to PAM3. Two bytes are sufficient to carry the value of the user configuration register and the PHY capability. Bytes 11 and 12 are used to carry a cyclic redundancy check 16 (CRC16).

[0104] In a possible case, the training frame can also have a size of 4096 bits. Referring to Fig. 11, the training frame includes 8 subframes, each of which has a size of 512 bits. A boundary of one subframe corresponds to a boundary of one data frame in a data mode. Except for the first bit of the first 7 subframes and the first 80 bits of the InfoField information in the last subframe, that is, the 8th subframe, the remaining bit positions are all 0. The correspondence between the subframes and the data frames shown in Figs. 11 and 9 is that a boundary of one subframe corresponds to a boundary of one data frame. The reason is that the scrambling manner of the first device for the training frame is different. Therefore, although there is a 4-fold relationship between the subframe lengths of the training frames shown in Figs. 11 and 9, after processing based on different scrambling manners, a boundary of one subframe still corresponds to a boundary of one data frame. For a description of the influence of different scrambling manners on the correspondence between the subframes and the data frames, reference can be made to related content in the following embodiments, which will not be repeated here.

[0105] Optionally, the training frame can also have other structures, for example, the training frame has a length of 1024 bits, includes 8 subframes, each subframe has a length of 128 bits, the last subframe includes the InfoField information, and the boundary of one subframe corresponds to the boundary of one data frame. Alternatively, the training frame has a length of 2048 bits, includes 8 subframes, each subframe has a length of 256 bits, the last subframe includes the InfoField information, and the boundary of one subframe corresponds to the boundary of two data frames.

[0106] The embodiments of the present application do not limit the structure of the training frame, nor the structure of the InfoField information included in the training frame. For example, the length L of the InfoField information can be 96 as shown in FIG. 10, or can be 80. FIG. 12 is a schematic view of another structure of the InfoField information provided by the embodiments of the present application. Referring to FIG. 12, the InfoField information includes 10 bytes, and has a total of 80 bits. In FIG. 12, since the first device uses the same scrambler for scrambling in the training mode and the data mode, and the scrambler does not stop running when the training mode switches to the data mode, after the training mode descrambler successfully synchronizes, the data mode does not need to perform a synchronization operation, nor does it need to carry the initial value of the scrambler in the data mode by using the InfoField information. Since the starting time of the device can be controlled within 500 milliseconds (ms), when the total number of subframes transmitted is less than 65536, the PFC and the DataSwPFC in the InfoField information can each be shortened by 1 byte, that is, the InfoField information can be shortened from 96 bits in FIG. 10 to 80 bits in FIG. 12.

[0107] S802, scrambling the training frame based on the scrambler to obtain scrambled data, and the scrambler is also used for scrambling the data frame.

[0108] In a possible implementation, the first device can obtain first scrambler bits output by the scrambler, scramble the training frame based on the first scrambler bits to obtain scrambled data, and the scrambled data is the training frame after scrambling. In some cases, the scrambler bits can also be referred to as scrambling bits. The scrambler can be a side stream scrambler. The process of scrambling the training frame by the scrambler includes but is not limited to the following two ways.

[0109] Scrambling mode one: scrambling the training frame by using the first scrambler bits.

[0110] FIG. 13 is a schematic view of an encoding process provided by the embodiments of the present application. Referring to FIG. 13, the scrambler generates a main PN sequence Scr n [0] by using the LFSR. The generated Scr n[0] is the first scrambler bit. Taking a 33-bit LFSR as an example, the 33 bits in the LFSR at time n can be represented as Scr n [32:0], in each code group period, the shift register is shifted forward by one bit, producing a value generated by Scr. n [0] represents the new bit. Here, the code group period refers to the period of each transmitted code group (tx_code_group), for example, a six-element code group period. In some cases, Scr... n [0] can be generated based on polynomials, for example, polynomials including 1+x 13 +x 33 or 1+x 20 +x 33 .

[0111] In one possible implementation, the two communicating devices can be classified as a master device and a slave device. The master device can send training sequences to the slave device, and the slave device can also send training sequences to the master device. If the first device is the master device, then Scr... n [0] Based on polynomial G M (x)=1+x 13 +x 33 If the first device belongs to the slave device, Scr n [0] Based on polynomial G S (x)=1+x 20 +x 33 Generate. Regardless of how the first device acquires the first scrambler bit Scr. n [0], all can utilize Scr n [0] Scramble the training frames to obtain scrambled data ST. n [0], the scrambling process can be found in Formula 1.

[0112] In formula 1 The indicator is XORed, where n refers to the current time of the first device, i.e., the current code group period, mod is the modulo operator, N is the length of the training frame, m is the number of subframes in the training frame, i.e., for the first training frame, there are subframes 0, 1, ..., m-1. N is an integer multiple of m, each subframe includes N / m bits, and L is the length of the InfoField information carried in the training frame.

[0113] n mod N is used to calculate the remainder when n is divided by N. For example, if n = 2049 and N = 2048, n mod N equals 1. The first device calculates the remainder between n and N based on the current time n. If the remainder is within the range... Between, the first device will combine the InfoField information and Scr from the training frames.n [0] Perform an XOR operation to obtain the scrambled data ST. n [0]. If the remainder is 0, that is, n is... Divisible division, the first device will Scr n Perform an XOR operation on [0] and 1 to obtain the scrambled data ST. n [0], performing an XOR operation with 1 can also be understood as performing an XOR operation on Scr n [0] Invert. If the remainder is not equal to 0 and is not located at [0, 0], then [0, 0] is the inverse of the remainder. In the case of "otherwise" in Formula 1, the first device directly applies Scr n [0] is used as scrambling data. Combining the training frames shown in Figure 9, the above process can be understood as scrambling Scr... n [0] Sequence interval subframe length Perform inversion, and after m-1 consecutive inversions, the interval is... The L consecutive bits following the first bit are XORed with the InfoField information, and this process is repeated.

[0114] The above example is intended to illustrate the process of scrambling training frames using the first scrambler bit, rather than to limit the method of scrambling training frames using the first scrambler bit. The first device can invert the length of a single subframe as shown in Formula 1, or it can be spaced out by other bit numbers. Other bit numbers can be integer multiples of any subframe length. Taking a training frame with a subframe size of 256 bits as an example, N / m in Formula 1 can be replaced with other multiples of 256 such as 512.

[0115] Scrambling Method 2: The training frame is scrambled based on the first scrambler bit and the second scrambler bit to obtain scrambled data. The second scrambler bit is generated based on the first scrambler bit.

[0116] In scrambling method two, the first device scrambles the training frame using multiple scrambler bits. Figure 14 is a schematic diagram of another encoding process provided in an embodiment of this application. Referring to Figure 14, the scrambler, in addition to using LSFR to generate the first scrambler bit Scr, also uses LSFR to generate the first scrambler bit Scr. n [0], and will also utilize Scr n [0] Derived sequences were obtained, resulting in the sequence Sx shown in Figure 14. n [1]-Sx n [3], Sx n [1]-Sx n [3] That is, the second scrambler bit. For example, the second scrambler bit is generated based on the first scrambler bit and an auxiliary generator polynomial g(x). The generation process can be found in Formulas 2-4.

[0117] Formula 2-4 and denotes XOR operation, Scr n [i] denotes Scr n [0] is delayed by i ticks, where a tick corresponds to a clock period, and 1 tick is equivalent to 1 clock period. For example, Scr n [3] denotes Scr n [0] delayed by 3 ticks, and the first device performs XOR operation on Scr n [3] and Scr n [8] to obtain Sx n [1]. The first device performs XOR operation on Scr n [6] and Scr n

[0016] to obtain Sx n [2]. The first device performs XOR operation on Scr n [9], Scr n

[0014] , Scr n

[0019] , Scr n

[0024] to obtain Sx n [3]. Through Formula 2-Formula 4, the first device can process the first scrambling code bit Scr n [0] to obtain a plurality of second scrambling code bits, which include Sx n [1]-Sx n [3], which can be expressed as Sx n [3:1] in some cases.

[0118] After obtaining the second scrambling code bits, the first device scrambles the training frame by using a plurality of scrambling code bits including the first scrambling code bits and the second scrambling code bits. For example, the training frame is scrambled by Sx n [3:1], Scr n [0] every 4 bits, respectively, to obtain the scrambled data ST n [3:0] shown in FIG. 14, where ST n [3:0] denotes ST n [3], ST n [2], ST n [1], ST n [0]. The process of scrambling the training frame based on the scrambling code bits can be referred to Formula 5-Formula 8.

[0119] In Formula 5-Formula 8, ​Also indicates the exclusive or operation, mod is the modulo operator, the meaning of formula 5-formula 8 and the meaning of formula 1 are similar, please refer to the related content of formula 1, which will not be repeated here. n [0] is always aligned with Scr n [0]. Therefore, for the first m-1 subframes of the training frame, the first bit is 1, which causes only Scr n [0] to be inverted when the scrambling code bit is scrambled. n [3:1], Scr n [0] is scrambled.

[0120] Optionally, the scrambling mode also affects the correspondence between the boundaries of the subframes and the boundaries of the data frames. For example, the first device uses scrambling mode one to scramble the training frame shown in FIG. 9 by single bit, in one scrambling code clock period, 1 bit of the training frame is scrambled, the first device uses scrambling mode two to scramble the training frame shown in FIG. 11 by 4 bits in parallel, that is, in one scrambling code clock period, 4 bits of the training frame are scrambled at the same time, therefore, although the sizes of the subframes in the training frames of FIG. 9 and FIG. 11 are different, the size of the subframe shown in FIG. 11 is four times the size of the subframe shown in FIG. 9, but the correspondence between the subframes and the data frames is that the boundary of one subframe corresponds to the boundary of one data frame. If the training frames with different subframe sizes use the same scrambling mode, the correspondence between the subframes and the data frames is different, for example, in the above embodiment, the 1024-bit training frame 1 including 8 subframes and the 2048-bit training frame 2 including 8 subframes, after being scrambled by scrambling mode one, the boundary of one subframe in the training frame 1 corresponds to the boundary of one data frame, and the boundary of one subframe in the training frame 2 corresponds to the boundary of two data frames.

[0121] S803, based on the scrambled data, first encoding is performed to obtain first encoded data.

[0122] In a possible implementation, the first device further encodes the scrambled data to obtain the first encoded data, for example, using 4B6B encoding shown in FIG. 13 and FIG. 14, where 4B6B encoding refers to that the scrambled data before encoding is 4 bits, and the first encoded data after encoding is a code group composed of 6 binary symbols, in some cases, the symbol includes a sign and a bit, for example, the sign is +-. The code group composed of 6 binary symbols can be referred to as a six-symbol code group. The first device can obtain a mapping relationship between the scrambled data and a transmission code group (tx_code_group), find the transmission code group corresponding to the scrambled data in the mapping relationship according to the scrambled data, and determine the first encoded data according to the found transmission code group. For example, the found transmission code group is taken as the first encoded data, or the found transmission code group is inverted, and the inverted complementary code group is taken as the first encoded data.

[0123] In response to the fact that the first device can obtain different scrambled data by using different scrambling manners such as scrambling manner one or scrambling manner two in S802, the first device can also use different encoding manners such as encoding manner one or encoding manner two to encode the scrambled data.

[0124] Encoding manner one: using the scrambled data and the second scrambler bit to perform first encoding to obtain the first encoded data.

[0125] In response to the scrambled data obtained by using scrambling manner one, refer to FIG. 13, although the first device only uses Scr n [0] in the process of scrambling the training frame to obtain the scrambled data ST n [0], that is, the first scrambler bit. However, the scrambler can also derive the second scrambler bit Sx n [1]-Sx n [3] from Scr n [0]. In some cases, the second scrambler bit can also be represented as Sx n [3:1]. The scrambled data ST n [0] is 4B6B encoded together with the second scrambler bit Sx n [1]-Sx n [3] to obtain the first encoded data. 4B6B encoding refers to that the input before encoding is 4 bits, and the output after encoding is a six-symbol code group composed of 6 binary symbols. In some cases, 4B6B encoding can be represented as 4B / 6B encoding.

[0126] In some cases, the second scrambler bit Sx n[3:1] are generated by linear combination of the LFSR bits stored in the scrambler, the process of generating the second scrambler bits is similar to the process of generating the second scrambler bits in scrambling mode two, please refer to the relevant description in scrambling mode two, which will not be described here. The second scrambler bits Sx n [1] - Sx n [3] have the same maximum shift length, for example, the maximum shift length is 2 n [0] 33 -1, but the second scrambler bits Sx n [1] - Sx n [3] and the first scrambler bits Scr n [0] are large and different, therefore, the second scrambler bits Sx n [1] - Sx n [3] and the first scrambler bits Scr n [0] have no short-term correlation.

[0127] Exemplarily, the first device acquires a 4bit code block composed of the second scrambler bits and the scrambling data, finds the mapping relationship between the 4bit code block and the transmission code group, and determines the transmission code group found as the first encoding data. In some cases, the 4bit code block can be referred to as a quaternary code group or a four-bit code block, and the first device can determine the transmission code group based on the mapping relationship shown in Table 1.

[0128] Table 1

[0129] The 4bit code block in Table 1 is composed of the second scrambler bits Sx n [3], Sx n [2], Sx n [1] and the scrambling data ST n [0], the transmission code group belongs to the PAM2 six-element code group, and the + in the transmission code group corresponds to the 1 level and the - corresponds to the -1 level. The sum of the code elements in any one transmission code group in Table 1 is 0, that is, the non-uniformity change of each transmission code group is 0, and the non-uniformity can be constrained in the process of encoding the first encoding data based on Table 2, thereby realizing direct current balance and effectively avoiding the occurrence of long continuous levels, for example, based on the mapping relationship shown in Table 1, a plurality of 4bit code blocks based on the scrambling data are encoded, and the maximum number of long continuous + and long continuous - in the plurality of first encoding data generated by the encoding is 4.

[0130] In a possible implementation, since the number of positive and negative symbols in any of the transmission code groups in Table 1 is the same, the first encoded data obtained based on Table 1 can also be used to assist in delimiting. For example, if the second device detects that the number of positive and negative symbols in a received six-symbol code group is different, it is considered that the boundary of the current code group is incorrect, and the code group boundary is adjusted by sliding.

[0131] Optionally, since the sum of the symbols in the PAM2 six-symbol code group is 0, that is, the non-uniformity change amount is 0, there are 20 code groups in total, and the code block composed of 4 bits has a total of 16, therefore, 4 six-symbol code groups can be deleted from the 20 PAM2 six-symbol code groups with the sum of the symbols being 0, to obtain the transmission code group corresponding to the 16 four-bit code blocks one by one, for example, deleting the 4 consecutive 3+ code groups (+++---), (-+++--), (--+++-) and (---+++) to obtain the 16 transmission code groups as shown in Table 1. Since there is no case of consecutive 3+ in each transmission code group, it can be used to assist the receiver in judging whether the polarity needs to be reversed. The first device can also select the transmission code group from the 20 PAM2 six-symbol code groups in other ways to obtain multiple transmission code groups different from Table 1.

[0132] In addition, the mapping relationship between different transmission code groups and 4bit code blocks can be as shown in Table 1, or other relationships, and the mapping relationship can be obtained by random mapping or can be obtained according to the minimum Euclidean distance between the code groups. In addition, the transmission code group can be represented by the combination of + and - as shown in Table 1, or can be written as represented by 0 and 1, that is, - in Table 1 is mapped to 0, and 1 in Table 1 is mapped to 1. For example, -+--++ can be represented as 0 1 0 0 1 1.

[0133] No matter what way the first device obtains the mapping relationship between the 4bit code block and the transmission code group, the first device can look up the mapping relationship according to the 4bit code block composed of the scrambling data and the second scrambler bit, and take the transmission code group obtained by the lookup as the first encoded data obtained by encoding the scrambling data. Taking the mapping relationship shown in Table 1 as an example, the scrambling data is 1, and the second scrambler bits are 0, 1 and 0 respectively, and the 4bit code block composed of 0101 is obtained. The transmission code group obtained by the lookup is ++-+-, and the first device determines that the first encoded data is ++-+-.

[0134] In a possible case, the first device can also acquire a current running disparity (RD) in the process of first encoding the scrambled data to obtain the first encoded data, the running disparity indicating a cumulative result of the disparity of the first encoded data obtained by previous encoding; and determine the first encoded data according to the running disparity and the disparity variation of the found transmission code group. Optionally, in the case that the scrambled data is data to be first encoded, the running disparity can be an initial value set based on experience, for example, 1 or -1, etc. If the scrambled data is not data to be first encoded, the running disparity is the sum of the initial value and the disparity variation of the first encoded data obtained by historical encoding. Next, Table 2 is taken as an example to illustrate the process of obtaining the first encoded data based on disparity.

[0135] Table 2

[0136] The difference between Table 1 and Table 2 is that the sum of the symbols in each transmission code group in Table 1 is 0, that is, the disparity variation is 0; the RD in Table 2 indicates the running disparity, the disparity variation of 12 transmission code groups is 0, the disparity variation of 4 transmission code groups is not 0, and there is a unique complementary code group. The first device determines the first encoded data to be ++-+-+ based on the current running disparity, for example, -1, after looking up Table 2 according to the 4-bit code block, for example, 0000. If the 4-bit code block is 0001, since the disparity variation of -++-+- corresponding to 0001 is 0, the number of positive and negative levels is equal, and therefore -++-+- is directly determined as the first encoded data.

[0137] In a possible case, the first device can also update the RD based on the disparity variation of the first encoded data after determining the first encoded data, to encode the next 4-bit code block by using the updated RD. Continuing to take the 4-bit code block as 0000 and the running disparity RD as -1 as an example, the first encoded data obtained by encoding is ++-+-+, and the disparity variation is 2, so the running disparity RD is updated to -1+2=1.

[0138] Referring to the above examples, in scrambling mode one and encoding mode one, the first scrambler bits and the second scrambler bits generated by the scrambler are used for scrambling and first encoding, wherein the first scrambler bits are used for scrambling, and the second scrambler bits are used for first encoding. That is, the scrambler bits in the embodiments of the present application are intended to emphasize that the scrambler bits are generated by the scrambler, and are not used to limit that the scrambler bits must be used for scrambling. The scrambler bits generated by the scrambler can be used for scrambling the training frame, for example, the first scrambler bits, and the scrambler bits generated by the scrambler can also not be used for scrambling the training frame, but be used for first encoding, for example, the second scrambler bits. In addition, since the second scrambler bits are not used for scrambling in scrambling mode one, the second scrambler bits can also be referred to as reference bits, or other names, and the meaning of the scrambler bits does not limit the function of the bits.

[0139] In encoding mode two, the scrambled data is first encoded to obtain first encoded data.

[0140] Referring to FIG. 14, the first device obtains four-bit scrambled data ST n [0], ST n [1], ST n [2], and ST n [3] after scrambling the training frame using the first scrambler bits and the second scrambler bits. The four-bit scrambled data forms a 4bit code block. The first device determines the transmission code group corresponding to the 4bit code block by looking up the mapping relationship, and obtains the first encoded data. The encoding process of obtaining the first encoded data based on the mapping relationship in encoding mode two is similar to the process of obtaining the first encoded data based on the mapping relationship in encoding mode one. For details, refer to the related description in encoding mode one, which will not be repeated here. Compared with encoding mode one, the time for encoding and transmitting the scrambled training frame based on encoding mode two can be shortened by 3 / 4 for the training frame of the same length.

[0141] In a possible implementation, the first device can select a corresponding encoding mode to first encode the scrambled data based on the scrambling mode adopted, to obtain first encoded data. The first device can also introduce delimiting information in the encoding process, and the delimiting information is used for code group delimiting by the second device. For example, when the code group period n is a specific value, the first device also encodes and outputs a fixed six-bit code group with an uneven change amount of 0, that is, a fixed code group. The fixed code group can be located in the 4B6B encoding table shown in Table 1 or Table 2, or can be located outside the 4B6B encoding table. The delimiting information can be referred to as a delimiter in some cases.

[0142] Optionally, the delimiting information can be a complete fixed code group. For example, when the code group period n is a specific value, the first device encodes the scrambled data into a fixed code group; if the code group period n of the first device is not a specific value, the first device performs 4B6B encoding on the scrambled data. Using the scrambled data as ST... n Taking [3:0] as an example, the first device is for ST n [3:0] can be 4B6B encoded, which can be used to encode ST. n [3:0] Generate PAM2 six-element code groups according to the 4B6B encoding shown in Table 1 or Table 2, and use the fixed code group as delimitation information.

[0143] Furthermore, the delimiting information can also be part of a fixed code group. For example, when the code group period is a specific value, the first device introduces multiple adjacent fixed code groups, and some code elements in the multiple adjacent fixed code groups constitute the delimiting information. The operation of generating delimiting information during the encoding process described above can be found in Formula 9.

[0144] In Formula 9, tx_code_group refers to the first encoded data obtained, and k is an integer, such as k = 0, 1, 2, ... The code group period n in Formula 9 is a specific value, meaning that the code group period n is divisible by 128 or the remainder when n is divided by 128 is 1. When n is divisible by 128, such as n = 0, 128, 256, ..., the encoded output is a fixed six-element code group (-,-,-,+,+,+); when the code group period n is divided by 128 and the remainder is 1, such as n = 1, 129, 257, ..., the output is a fixed six-element code group (+,+,-,+,-,-). The five consecutive +s in these two consecutive fixed six-element code groups form the delimiting information. Since the first encoded data obtained according to the encoding shown in Table 1 has a maximum of 4 consecutive 1s or consecutive -1s, and the two fixed code groups have 5 consecutive 1 levels, the delimiting information determined based on the two fixed code groups is 5 1 levels. The receiver can identify the boundary of the code group by searching for 5 consecutive 1 levels in the PAM2 sequence, and can determine whether polarity reversal is needed based on 5 consecutive 1 levels or -1 levels.

[0145] In a possible implementation, taking the training frame with a length of 4096 bits composed of 8 subframes and scrambling mode two as an example, the first encoded data obtained through formula 9 is implemented to encode two fixed code groups after the first 8 bits of the first 7 subframes of each training frame are scrambled. Since the first 8 bits of the last subframe carry the InfoField information, if the 8 bits are encoded to output fixed code groups, the InfoField information carried will be lost, therefore, the 1st-8th bits of the last subframe are scrambled and encoded according to the 4B6B encoding table, that is, the delimitation information will be staggered from the first 8 bits of the last subframe, and is presented as non-uniform intervals, that is, k in formula 9 is not an integer multiple of 7. If the position of the InfoField is staggered from the 1st-8th bits of the last subframe, that is, the 1st-8th bits of the last subframe do not carry the InfoField information, the first 8 bits of the last subframe can also be encoded to fixed code groups after being scrambled, that is, k in formula 9 can be any integer, including an integer multiple of 7.

[0146] Based on the case that the first device introduces delimitation information in the encoding process, the second device can determine the reliability of the current code group boundary according to whether the rule (number and interval period) of the delimitation information is consistent with the encoding rule. For example, the sequence after encoding of each subframe contains two fixed code groups shown in formula 9, and the two fixed code groups are a group. The second device first searches for the boundary of the code group through five + in a row, and if the two fixed code groups corresponding to the current delimitation information are the same as the two fixed code groups sent, it is considered that the delimitation information is correct, and based on the position of the fixed code group corresponding to the current delimitation information, the position of the subsequent fixed code group is inferred and the correctness of the fixed code group is detected. If the number of correct groups in the 8 fixed code groups exceeds 7, it is considered that the boundary of the current code group is correct and reliable.

[0147] In a possible case, in addition to using one encoder for first encoding as shown in FIGS. 13 and 14, the first device can also use multiple encoders. For example, one encoder is a 4B6B encoder, and multiple encoders are 2B3B encoders. Referring to FIG. 15, FIG. 15 is used for encoding the scrambled data obtained by using scrambling mode one, and the first device scrambles the training frame and the ST n [0] and the second scrambler bit Sx n [1] together as a 2bit code block, and performs 2B3B encoding, at the same time, the second scrambler bit Sx n [2] and Sx n [3] are also taken as another 2bit code block, and perform 2B3B encoding. Wherein, 2B3B encoding refers to that the input before encoding is 2bit, and the output after encoding is a ternary code group composed of 3 binary code elements, and in some cases, 2B3B encoding can be referred to as 2B / 3B encoding.

[0148] The process of obtaining a ternary code group from a 2bit code block by the 2B3B encoder is similar to the process of obtaining a six-ary code group from a 4bit code block, the difference is that in the process of encoding a 2bit code block, the searched transmission code group is a PAM2 ternary code group, while in the process of encoding a 4bit code block, the searched transmission code group is a PAM2 six-ary code group, which can be referred to the related description of the encoding mode one, and will not be repeated here.

[0149] The first device can encode a ternary code group from a 2bit code block and a non-uniformity running amount RD. When RD < 0, a ternary code group with a non-uniformity change amount > 0 (i.e., the number of positive levels 1 is greater than the number of negative levels -1) is output; when RD ≥ 0, a ternary code group with a non-uniformity change amount < 0 (the number of negative levels -1 is greater than the number of positive levels 1) is output. Then, the first device can combine the two ternary code groups generated by the two 2B3B encoders together through a multiplexer to form a six-ary code group, that is, the first encoded data. Alternatively, the mapping relationship between the 2bit code block and the ternary code group can be referred to Table 3.

[0150] Table 3

[0151] In Table 3, the transmission code group corresponds to a PAM2 ternary code group, in the case that the input sequence is 00 and RD is less than 0, the output transmission code group is +++, and in the case that RD is not less than 0, for example, greater than or equal to 0, the output transmission code group is ---.

[0152] In a possible case, the scrambled data obtained by using the scrambling mode two can also be encoded by multiple encoders, as shown in FIG. 16, the first device sends the ST n [0] and the ST n [1] generated by scrambling the training frame into a 2B3B encoder, sends the ST n [2] and the ST n [3] generated by scrambling the training frame into another 2B3B encoder, the encoding process of the 2B3B encoder is similar to the encoding process shown in FIG. 15, which can be referred to the related description of FIG. 15, and will not be repeated here.

[0153] The first device combines the two ternary code groups into one six-ary code group, i.e., the first encoded data, by using a multiplexer after the two ternary code groups are encoded by the two encoders. Alternatively, the first device can encode the first encoded data by using a 4B6B encoder or a 2B3B encoder. Regardless of the manner in which the first device obtains the first encoded data, the first encoded data can be used to determine the training sequence to be transmitted, and the training sequence includes the first PAM level value, e.g., the PAM2 level value, including the 1 level and the -1 level. If the symbol in the first encoded data is the PAM2 level value, the first device can directly transmit the first encoded data as the training sequence, e.g., directly transmitting the first encoded data as shown in FIG. 13 and FIG. 14. The first encoded data that can be directly transmitted can be data encoded based on the mapping relationship shown in Table 1 or Table 2, and the first encoded data is, for example, (--+-++). The first device can directly transmit the first encoded data as the training sequence.

[0154] If the symbol in the first encoded data is not the PAM2 level value, e.g., the symbol is represented in another form different from +- and +-, e.g., 01, the first device will further perform the first PAM mapping on the first encoded data to obtain the training sequence, and transmit the training sequence to the second device. Referring to FIG. 17, the encoder used to perform the first encoding in FIG. 17 corresponds to one 4B6B encoder or two 2B3B encoders in FIG. 13-FIG. 16. In some cases, the encoder used to perform the first encoding can also be referred to as the first encoder, the PAM2 six-ary code group encoder, or the PAM2 six-ary code group generator. After the first device outputs the first encoded data by using the encoder, the first device further performs the first PAM mapping on the first encoded data to obtain the training sequence to be transmitted.

[0155] Alternatively, the first PAM mapping used by the first device in the training mode is the PAM2 mapping shown in FIG. 17. Taking the first encoded data 0 1 1 0 0 1 as an example, 0 is mapped to - and 1 is mapped to + by using the PAM2 mapping to obtain the training sequence -++--+. Wherein, - represents the -1 level and + represents the 1 level. If the first encoding is implemented by using one encoder, the training sequence includes the encoding result of the one encoder. If the first encoding is implemented by using multiple encoders, the training sequence includes the encoding results of the multiple encoders.

[0156] Regardless of the manner in which the first device obtains the training sequence, the training sequence can be transmitted to the second device. Referring to FIG. 17, the first device transmits the generated training sequence to the MUX, and the MUX selects the PAM2 training path in the training mode based on the fact that the current mode is the training mode, and transmits the training sequence generated by the PAM2 training path to the second device. By transmitting the training sequence to the second device, the transmission of the training sequence is used to pre-process the received signal by using a circuit or an algorithm, and the correct transmission of the data frame in the data mode is ensured based on the pre-processing result.

[0157] For example, the first device and the second device of full duplex communication will first perform PMA training. After the second device receiver is normal, the synchronization is realized by scrambling code, and the training frame is correctly received, the first device and the second device switch to data mode to transmit data frames. Optionally, the data frames transmitted in the data mode include data frames corresponding to service data and data frames corresponding to invalid data. For example, the data mode includes an Idle state, and the data transmitted in the Idle state is invalid data. The invalid data is used for detection before the service data is transmitted, and the invalid data can also be referred to as an idle frame or idle data. In this case, the MII first transmits invalid data, and after it is determined that the communication device in the Idle state works normally, valid service data is transmitted.

[0158] Regardless of whether the data frame is invalid data or service data generated based on the MII interface, the first device can process the data frame. In a possible implementation, the first device will also scramble the data frame based on a scrambler, and perform second encoding on the scrambled data frame to obtain second encoded data. The first device can process the information stream received from the MII as shown in FIG. 1 to obtain a data frame to be scrambled.

[0159] In the long distance mode, for the information stream received from the MII interface, the first device will first perform 64B / 65B encoding on the information stream. The 64B / 65B encoding means that the input before encoding is 64 bits, and the output after encoding is 65 bits. In some cases, the 64B / 65B encoding can be represented as 64B65B encoding. For a code block composed of 65 bits of output after encoding, 1 bit is inserted every 15 code blocks (1 bit insertion), and the 15 65-bit code blocks and the inserted 1 bit are sent into an FEC encoder together to obtain a data frame. The FEC encoding can be encoding performed by using a RS code type, for example, RS(128, 122) shown in FIG. 1. Since the data frame is obtained by using FEC encoding in the long distance mode, the data frame processed by the first device can also be referred to as an FEC frame or an FEC data frame in some cases.

[0160] Optionally, the data frame can also be referred to as a physical frame (PHY frame) in the case that the data frame is processed by a physical coding sublayer (PCS) in a physical layer. In the low latency mode, the first device encodes the information stream received from the MII interface by 16B / 17B encoding, which means that the input before encoding is 16 bits and the output after encoding is 17 bits, and in some cases, the 16B / 17B encoding can be represented as 16B17B encoding. For each 17-bit code block obtained by encoding, one bit is inserted every 15 code blocks, and the 15 17-bit code blocks and the inserted one bit form a data frame to be scrambled.

[0161] In one possible case, since the length of the data frame in the long distance mode is 4 times the length of the data frame in the low latency mode, if the boundary of one subframe corresponds to one data frame in the long distance mode, i.e., the boundary of the FEC frame, then the boundary of one subframe corresponds to the boundaries of four data frames in the low latency mode.

[0162] Optionally, the first device can use the same scrambler in the data mode as in the training mode to scramble the data frame. For example, the first device scrambles the data frame based on the first scrambler bit, the second scrambler bit, and the third scrambler bit to obtain a scrambled data frame, and the second scrambler bit and the third scrambler bit are obtained based on the first scrambler bit. Taking the scrambler shown in FIG. 13 as an example, in FIG. 13, the data frame is scrambled every 8 bits D n [7:0] with the third scrambler bit Sy n [3:0], the second scrambler bit Sx n [3:1], and the first scrambler bit Scr n [0] to obtain the scrambled data frame.

[0163] Similar to the obtaining process of the second scrambler bit, the third scrambler bit is also obtained by the scrambler based on the first scrambler bit. In one possible case, the third scrambler bit is obtained based on Y n , and the first scrambler bit has the same maximum displacement length, for example, the third scrambler bit is obtained based on Y n and the auxiliary generator polynomial g(x). n

[0164] In formula 10, Scr n [4] and Scr n [6] are obtained by delaying Scr n [0] multiple times, for example, Scr​n [0] Delay 4 beats to get Scr n [4], for Scr n [0] Delay 6 beats to get Scr n [6]. The first device for Scr n [4] and Scr n [6] Perform an XOR operation to obtain Y n Because Y n First scrambler bit Scr based on delayed multi-phase operation n [0] is obtained through processing, therefore, Y n The first scrambler bit has the same maximum shift length as the first scrambler bit. The first device will Y n The third scrambler bit Sy is determined to be... n [0] After that, it can be based on Y n The polynomial g(x) continues to generate other third scrambler bits, such as Sy in Equation 11. n [1] Sy in Formula 12 n [2] and Sy in Formula 13 n [3]

[0165] In one possible implementation, the third scrambler bit can also be based on Z. n Generate, Z n It has the same maximum displacement length as the first scrambler bit, and the generation process can be found in Equations 14-17.

[0166] Equation 14-Equation 17, Scr n The meaning of [i] and Scr in Formula 1 n The meaning of [i] is similar; please refer to the relevant content in Formula 1, and it will not be repeated here. n [0]、Sy n [1], Sy n [2] and Sy n [3] is based on Z n The generated third scrambler bit can be represented as the third scrambler bit Sy in some cases. n [3:0]. The process of obtaining the third scrambler bit based on formulas 14-17 is similar to the process of obtaining the third scrambler bit based on formulas 10-13, and can be found in the relevant descriptions, which will not be repeated here.

[0167] For example, during the process of obtaining the third scrambler bit based on polynomial processing, the third scrambler bits of the master device and the slave device should remain different. Optionally, the master device and the slave device can use different polynomials to generate different third scrambler bits. For example, the master device uses formulas 10-13 to generate the third scrambler bit, and the slave device uses formulas 14-17. Alternatively, the master device uses formulas 14-17 to generate the third scrambler bit, and the slave device uses formulas 10-13. If the polynomials used by the master device and the slave device to generate the first scrambler bit are different, for example, 1+x respectively... 13 +x 33 or 1+x 20 +x 33 The generated first scrambler bits have the same maximum shift length but almost no short-term correlation. Even if the master and slave devices use the same polynomial, such as Equation 10-13, to generate the third scrambler bits, the short-term correlation between the third scrambler bits generated by the master and slave devices is very weak. Therefore, the master and slave devices can also use the same polynomial and generate the third scrambler bits based on the first scrambler bits. "The same polynomial" means that the master and slave devices use the same generating polynomial for the same third scrambler bit, but different polynomials for different third scrambler bits.

[0168] In one possible scenario, although the second and third scrambler bits are obtained by using Scr... n [0] have the same maximum shift length (2) 33 The scrambler bits are constructed from the bits in the LFSR (-1). The delays between the first, second, and third scrambler bits are large and different, and the short-term correlation between them is weak. The scrambler continuously generates the first, second, and third scrambler bits. In training mode, only the first and second scrambler bits are used. Since the scrambler operation is uninterrupted when switching from training mode to data mode, and the first, second, and third scrambler bits are used to scramble data frames in data mode, as long as the scrambler synchronization is achieved in training mode, the scramblers at the receiving and transmitting ends will remain synchronized after switching to data mode, without the need for additional synchronization or initialization operations.

[0169] Referring to Figures 13, 14, and 17, for each 8-bit data D n [7:0], the first device can D n [7:0] respectively with the first scrambler bit Scr n [0], Second scrambler bit Sx n [3:1] and the third scrambler bit Sy n[3:0] are scrambled. For example, D n [0] is XORed with Scr n [0] to obtain a first bit, D n [1] is XORed with Sx n [1] to obtain a second bit, D n [2] is XORed with Sx n [2] to obtain a third bit, D n [3] is XORed with Sx n [3] to obtain a fourth bit, D n [4] is XORed with Sy n [0] to obtain a fifth bit, D n [5] is XORed with Sy n [1] to obtain a sixth bit, D n [6] is XORed with Sy n [2] to obtain a seventh bit, D n [7] is XORed with Sy n [3] to obtain an eighth bit. The first device inputs the eight bits obtained by scrambling into an encoder to perform second encoding, and obtains second encoded data.

[0170] In a possible implementation, the scrambler generates encoding bits used for encoding the scrambled data frame in addition to the scrambler bits used for generating the scrambled data frame. Referring to FIG. 13, the scrambler generates an encoding bit Sg n [0] and sends the Sg n [0] to the encoder of the 8B6T, so that the encoder of the 8B6T performs second encoding on the scrambled data frame based on the encoding bit, and obtains second encoded data. For example, in the case where the first device performs the encoding to obtain the first encoded data while constraining the unevenness as described in the foregoing embodiment, for example, the first device in the encoding mode one determines the first encoded data based on the unevenness change amount and the unevenness operation amount of the transmission code group, the Sg n [0] generated by the scrambler can also be sent to the encoder of the 4B6B shown in FIG. 13, so that the first encoded data is obtained by performing first encoding based on the Sg n [0], and the unevenness is constrained.

[0171] The embodiments of the present application do not limit the manner of obtaining the encoding bit Sg n [0], which can be obtained based on different shift register processing, for example, a 15-bit LFSR is generated according to the polynomial 1+x 11 +x 15 or 1+x 4 +x 15 In some cases, the Sgn [0] can also be generated based on the elements in the same 33-bit shift register as Scr n [0], for example Or Sg n [0] is generated in either way, it is necessary to ensure that Sg n [0] has a large enough delay and weak enough short-term correlation with Scr n [0], Sx n [3:1], and Sy n [3:0].

[0172] After the first device generates Sg n [0] using the scrambler, the scrambled data frame and Sg n [0] are sent to the encoder for the second encoding. Optionally, the second encoding can be 8B6T encoding, where B indicates bit and T indicates ternary, representing the meaning of ternary. 8B6T encoding refers to that the input before encoding is 8 bits and the output after encoding is a code group composed of six ternary symbols, which can be represented as 8B / 6T encoding in some cases. The first device performs the second encoding on every 8 bits of the scrambled data frame to obtain the second encoded data belonging to the PAM3 six-symbol code group, and each 8 bits in the scrambled data frame is temporarily referred to as an 8-bit code block.

[0173] Optionally, the second encoding is implemented by an 8B6T encoder, and the process is similar to that of the first encoding. The first device can find the mapping relationship between the 8-bit code block and the first code group to obtain the first code group corresponding to the 8-bit code block; and obtain the second encoded data based on the encoded bits and the first code group. The first code group refers to the PAM3 six-symbol code group that has a one-to-one correspondence with different 8-bit code blocks, and the process of obtaining the correspondence between the first code group and the 8-bit code block is similar to that of obtaining the correspondence between the 4-bit code block and the transmission code group shown in Table 1. Please refer to the related description, which will not be repeated here. In addition, the encoder that performs the second encoding can also be referred to as the second encoder or the PAM3 six-symbol code group generator.

[0174] Since there are 256 different combination ways for the 8-bit code block, there are also 256 first code groups. The first device can find the first code group corresponding to the scrambled 8-bit data frame 11001011 according to the mapping relationship of the 8-bit code block, and find that the first code group corresponding to the scrambled 8-bit data frame is (-1, 1, 1, 0, 0, 1), where -1 / 0 / 1 is the level value of PAM3.

[0175] Similar to the process of the first encoding, the first device also controls the unbalance in the process of encoding the second encoded data to achieve the DC balance. The first device can determine whether to perform the negation on the first code group according to the running amount RD of the unbalance at the current time and the unbalance change amount of the first code group. For example, when the first device encodes 11001011, the RD is 1, and since the unbalance change amount of the first code group is 2, both the RD and the unbalance change amount are greater than 0, that is, both are positive numbers, the first device performs the negation on the first code group, and determines the complementary code group (1, -1, -1, 0, 0, -1) obtained by the negation as the second encoded data.

[0176] In a possible implementation, the running amount of the unbalance is 0, and the unbalance change amount of the first code group is not 0. In this case, the first device can determine whether to perform the negation on the first code group according to the encoding bit Sg n [0]. For example, when Sg n [0] is 1, it is determined that the negation is performed on the first code group, and the complementary code group obtained by the negation is determined as the second encoded data. Sg n [0] can increase the randomization of the second encoded data.

[0177] In addition, since the second device does not need to synchronize Sg n [0], the first device can choose to obtain the second encoded data by processing Sg n [0], or can not use Sg n [0]. That is, for the case that the running amount of the unbalance is 0 and the unbalance change amount of the first code group is not 0, it is determined that the negation is performed on each code element included in the first code group, that is, the complementary code group of the first code group is output as the second encoded data.

[0178] Similar to the process of the first encoding, the first device can implement the second encoding based on one encoder, or implement the second encoding based on multiple encoders. For example, for each 8-bit code block in the scrambled data frame, two 4B3T encoders are used to encode the 8-bit code block respectively. The first 4B3T encoder encodes the first 4 bits in the 8-bit code block to obtain a PAM3 ternary code group, and the second 4B3T encoder encodes the last 4 bits in the 8-bit code block to obtain another PAM3 ternary code group. The two PAM3 ternary code groups are combined to obtain a PAM3 six-ary code group, and the PAM3 six-ary code group is determined as the second encoded data.

[0179] No matter how the first device encodes the second encoded data, the data sequence can be obtained according to the second encoded data, and the data sequence is sent to the second device, and the data sequence includes the second PAM level value. Similar to the process of sending the first encoded data, in the case that the symbol in the second encoded data is the second PAM level value, the first device can directly send the second encoded data as the data sequence to the remote communication device, that is, the second device. In the case that the symbol in the second encoded data is not the second PAM level value, the first device can perform second PAM mapping on the second encoded data to obtain the data sequence.

[0180] Optionally, the second PAM can be a non-integer multiple of the first PAM. Taking the first PAM mapping as PAM2 mapping as an example, the second PAM mapping can be PAM3 mapping. After the first device performs second PAM mapping on the second encoded data to obtain the data sequence, the first device can send the data sequence to the second device. Referring to FIG. 17, the first device sends the data sequence to the MUX, and based on the current belonging to the data mode, the MUX selects the PAM3 data path in the data mode and sends the data sequence generated by the PAM3 data path to the second device.

[0181] In summary, the encoding method provided in the embodiments of the present application uses the same scrambler to scramble the training frame and the data frame, avoiding the increase of additional hardware resources. Moreover, since the first device scrambles the training frame in the training mode and scrambles the data frame in the data mode by using the same scrambler, the scrambler runs uninterruptedly when the first device switches from the training mode to the data mode, and therefore, there is no need to transmit the initial value of the scrambler in the data mode in the training phase, saving the time of initial value transmission and improving the training efficiency. The training frame scrambled by the first encoding mode in the training mode and the data frame scrambled by the second encoding mode in the data mode have different encoding efficiencies, but both can constrain the unevenness and ensure the direct current balance of the first encoded data and the second encoded data, meeting the safety application requirements.

[0182] The embodiments of the present application also provide a decoding method. Optionally, the second device obtains a signal sequence; performs first decoding based on the signal sequence to obtain a sequence to be descrambled; determines scrambled data obtained by scrambling the training frame by using a scrambler based on the sequence to be descrambled, and descrambles the scrambled data to obtain the training frame, and the scrambler is also used for scrambling the data frame.

[0183] In a possible case, after receiving the signal sequence sent by the first device, the second device can process the signal sequence. The signal sequence refers to the sequence of the output sequence sent by the first device and transmitted to the second device through the cable. The output sequence includes the training sequence sent in the training mode and the data sequence sent in the data mode. The signal sequence can be the same as the output sequence, or can be different from the output sequence. For example, the output sequence is interfered by noise or inter-symbol interference caused by the channel during transmission, so that the signal sequence received by the second device is different from the output sequence sent by the first device. Regardless of the case of the signal sequence, the second device can process the signal sequence. Corresponding to the case that the first device scrambles and encodes the output sequence, the second device also performs decoding and descrambling operations on the signal sequence. Next, the process of signal processing, decoding and descrambling of the second device on the signal sequence in the training mode and the data mode is introduced respectively.

[0184] Exemplarily, in the training mode, the second device performs signal processing on the signal sequence to obtain a PAM2 sequence. The signal processing includes amplification, echo cancellation, equalization, clock recovery, decision, etc. The amplification technology refers to increasing the signal amplitude to improve the signal strength. The echo cancellation is used to eliminate echo interference to improve the signal quality. The equalization technology is used to compensate for the distortion of the signal sequence caused by the non-uniform frequency response during transmission. The clock recovery is used to extract the clock component embedded in the signal sequence. The decision technology is used to judge and process the signal sequence, and classify and decide the signal sequence.

[0185] After the second device processes the signal sequence to obtain the PAM2 sequence, the second device can obtain the sequence to be decoded according to the PAM2 sequence. If the first device adopts the first PAM mapping to obtain the training sequence, the second device can demap the PAM2 sequence to obtain a 01 bit sequence, and take the bit sequence as the sequence to be decoded. If the first device does not perform the first PAM mapping, the second device can directly take the PAM2 sequence as the sequence to be decoded. Regardless of whether the second device performs demapping, the second device can perform first decoding on the sequence to be decoded. The first decoding refers to the decoding realized by using the inverse mapping relationship corresponding to the first encoding. In S803, the first device can use one 4B6B encoder to first encode the scrambled data, or can use two 2B3B encoders to first encode the scrambled data. The second device can also use different decoding modes in the training mode to first decode the sequence to be decoded by using different inverse mapping relationships. Different decoding modes correspond to different encoding modes in the training mode.

[0186] Decoding mode one: the second device determines a second code group according to the sequence to be decoded, the second code group including six code elements; and determines a first sequence corresponding to the second code group according to a first inverse mapping relationship.

[0187] Optionally, the second device divides the sequence to be decoded into a plurality of second code groups according to the code group boundary, and one second code group includes six code symbols, and the code symbol is a binary code symbol. The code group boundary can be set based on experience. In the case that the first device introduces the delimiting information in the encoding process, the code group boundary can also be determined according to the delimiting information. In the case that the first device uses a fixed code group as the delimiting information, the second device searches for a code group with the same content as the fixed code group in the sequence to be decoded to obtain the code group boundary. Alternatively, in the case that the first device continuously introduces two fixed code groups, and the delimiting information is part of the two fixed code groups, the second device searches for the delimiting information in the sequence to be decoded. Taking the case that the delimiting information is formed by five consecutive + in the two consecutive fixed code groups as an example, the second device can find the five consecutive + in the sequence to be decoded to obtain the code group boundary.

[0188] In a possible case, after determining the code group boundary according to the delimiting information, the second device also detects the reliability of the code group boundary. For example, the code group boundary determined based on the delimiting information and the period of occurrence of the two fixed code groups corresponding to the delimiting information are used to predict the occurrence position of the next fixed code group, and the code group set at the predicted position is checked to see whether it is the same as the two fixed code groups. If yes, it is considered to be matched. The matching can also be understood as legal or correct. If at least B predicted positions of A predicted positions are matched with the two fixed code groups, it is considered that the boundary of the current code group is reliable. A and B can be any integers set based on experience, and B is not greater than A, for example, A is 8 and B is 7. Optionally, considering the influence of link errors, whether the code group set and the two fixed code groups match can also be determined according to whether the code symbols at some corresponding positions of the code group set and the two fixed code groups are consistent.

[0189] Regardless of the way in which the second device obtains the code group boundary, the sequence to be decoded can be divided into a plurality of second code groups according to the code group boundary, and a first reverse mapping relationship is determined according to the encoding table used by the first device for encoding. The encoding table used for encoding can be a 4B6B encoding table, for example, the encoding table shown in Table 1 or Table 2. The second device determines the reverse mapping relationship between the six code groups and the 4-bit code blocks, i.e., the first reverse mapping relationship, according to the mapping relationship between the 4-bit code blocks and the six code groups in the 4B6B encoding table. Then, the second device searches for the 4-bit code blocks matched with the second code group in the first reverse mapping relationship to obtain the first sequence corresponding to the second code group. Taking the second code group as --+-++ shown in Table 1, and the first sequence determined based on the first reverse mapping relationship as 0000, in the case of no error, the second code group is the first encoded data output by the 4B6B encoder of the first device, and the first sequence obtained by decoding is the 4-bit code block input into the 4B6B encoder of the first device.

[0190] Decoding mode two, the second device determines a third code group according to the sequence to be decoded, the third code group comprising three code elements; determines a second sequence corresponding to the third code group according to a second inverse mapping relationship.

[0191] In a possible case, after obtaining the sequence to be decoded, the second device can divide every 6 code elements in the sequence into an input based on the code group boundary of the sequence to be decoded, and input every 6 code elements into a demultiplexer to obtain two third code groups each comprising three code elements, wherein the code elements included in the third code groups are binary code elements. Then, the second device obtains the second inverse mapping relationship, and the process of obtaining the second inverse mapping relationship is similar to the process of obtaining the first inverse mapping relationship, and is determined according to the 2B3B encoding table used by the first device for encoding, for example, Table 3 in S803. Then, the second device can look up the third code group in the second inverse mapping relationship to obtain a second sequence corresponding to the third code group. In the case of no error code, the third code group is a ternary code group output by the 2B3B encoder of the first device, and the second sequence is a 2bit code block input into the 2B3B encoder of the first device.

[0192] Regardless of whether the sequence obtained by the second device is the first sequence or the second sequence, the first sequence or the second sequence can be taken as a sequence to be descrambled, and the sequence to be descrambled is descrambled to obtain a training frame. In the case that the first device can use one scrambler bit or multiple scrambler bits in the process of scrambling the training frame, the second device can also use different descrambling modes to descramble the sequence to be descrambled to obtain a training bit stream, and determine the training frame based on the training bit stream.

[0193] Descrambling mode one, scrambling data scrambled by using the first scrambler bit is determined from the sequence to be descrambled, and the scrambling data is descrambled.

[0194] The training frame corresponding to the scrambling mode one shown in S802 is only scrambled by the first scrambler bit, and regardless of whether the second device uses the decoding mode one or the decoding mode two to obtain the sequence to be descrambled, the second device can extract the scrambling data from the sequence to be descrambled. For example, the 0th bit in the first sequence of four bits is determined as the scrambling data, which corresponds to ST n[0]. After that, the second device can use a descrambler to descramble the scrambled data. The descrambler of the second device uses the same generation polynomial as the scrambler of the first device. For example, if the second device is a slave device as a receiving (Rx) end and the first device is a master device as a transmitting (Tx) end, the descrambler of the slave device uses the same generation polynomial as the scrambler of the master device, or if the second device is a master device as an Rx end and the first device is a slave device as a Tx end, the descrambler of the master device uses the same generation polynomial as the scrambler of the slave device. The description of the generation polynomial can refer to the description of the polynomial in S802, which will not be repeated here.

[0195] In the second descrambling manner, the sequence to be descrambled is determined as the scrambled data, and the scrambled data is descrambled.

[0196] The second descrambling manner corresponds to the case where the training frame shown in the second scrambling manner in S802 is scrambled by the first scrambler bit and the second scrambler bit, and therefore, the 0th bit in the sequence to be descrambled is data scrambled by the first scrambler bit, that is, it corresponds to ST n [0], the 1st-3rd bits are data scrambled by the second scrambler bit, which correspond to ST n [1], ST n [2], ST n [3], based on which, the second device can descramble all the sequences to be descrambled. The process of descrambling all the sequences to be descrambled by the second device is similar to the process of descrambling the scrambled data in the first descrambling manner, which can refer to the related description of the first descrambling manner, which will not be repeated here.

[0197] In a possible implementation, for the case where the first device introduces the delimiting information in the first encoded data, the second device can choose to directly descramble the decoded first sequence or the second sequence, or can descramble the sequence decoded from the code group at the non-delimiting information position in the first sequence or the second sequence.

[0198] Exemplarily, the second device also acquires a descrambler synchronization result in the process of descrambling the sequence to be descrambled to obtain the training bit stream, and the descrambler synchronization result indicates whether the synchronization is successful. The second device can determine whether the boundary of the second code group or the third code group needs to be adjusted according to the descrambler synchronization result, that is, whether the code group boundary acquired by the second device is accurate. In a possible case, if the descrambler synchronization result is synchronization success, the code group boundary is correct, and if the descrambler synchronization result is synchronization failure, the code group boundary is incorrect, and the code group boundary needs to be adjusted, for example, the code group boundary is moved by 1 code element.

[0199] Optionally, when the first device adopts 4B6B encoding shown in Table 1, since the number of code elements of different values, for example, 01 or +- in a six-element code group is equal, the second device determines that the code group boundary is incorrect when detecting that the number of code elements of different values in the second code group is not equal, and adjusts the boundary. The detection of the descrambler synchronization result or the number of code elements of different values in the second code group is continued based on the new boundary, and if the descrambler synchronization fails or the number of code elements of different values is different, the boundary is continuously adjusted. If the boundary is adjusted for y times and the descrambler still fails to synchronize, polarity inversion is performed, that is, 0 in the second code group is changed to 1, 1 is changed to 0, or + in the second code group is changed to -, and - is changed to +. The judgment and adjustment of the code block boundary are continued based on the second code group after polarity inversion until the descrambler correctly synchronizes.

[0200] wherein y can be an arbitrary value based on experience, for example, y≥6. The polarity inversion is because when the twisted pair is connected with the second device, there can be a reverse connection situation, that is, the communication devices connected at both ends of the same wire have different polarities, for example, one end is positive polarity and the other end is negative polarity, thereby causing the polarity of the signal sequence of the second device to be opposite to that of the output sequence of the first device.

[0201] Optionally, after the descrambler of the second device synchronizes, the training bit stream obtained by descrambling can be delimited according to the generation rule of the training frame (for example, a continuous m-1 100…0 subframe sequence, and the InfoField information carried in the last subframe, and the first 3 bytes of the InfoField information are fixed), and the training frame is obtained. Since the position of the delimiting information corresponds to the boundary of the training frame subframe, the subframe can be delimited according to the position of the delimiting information. After the descrambler synchronizes, the second device can determine the position of the last subframe according to the subframe boundary and the InfoField information carried in the last subframe, and combine the 3 fixed bytes of the InfoField to achieve training frame delimiting. Regardless of the way in which the second device completes the training frame delimiting, each subframe in the training frame can be determined, and the InfoField information can be extracted from the determined last subframe to obtain the indication of the transmission signal, the state of the remote receiver, and the indication of the modulation format switching.

[0202] In a possible case, in the data mode, the analog front end and the PMA of the second device process the signal sequence to obtain a PAM3 sequence, the process of obtaining the PAM3 sequence is similar to the process of obtaining the PAM2 sequence, and details are described in the foregoing embodiments and are not repeated here. Then, the second device decodes the PAM3 sequence to obtain an 8-bit sequence. Because the data mode multiplexes the scrambler of the training mode, and the scrambler runs uninterruptedly during mode switching, after the second device achieves the synchronization of the scrambler in the training phase, the descrambler of the receiving end in the data mode is still synchronized with the remote Tx, and the 8-bit sequence obtained by decoding can be directly descrambled to obtain data bits. Because the switching from the training mode to the data mode is implemented at the boundary of the training frame and the boundary of the six-bit code group, the data frame in the data mode is delimited according to the corresponding relationship between the training frame boundary and the data frame boundary. The process of decoding and descrambling the PAM3 sequence is similar to the process of decoding and descrambling the sequence to be decoded in the training mode, and details are described in the foregoing embodiments and are not repeated here.

[0203] The encoding method of the embodiments of the present application is introduced above, and the encoding apparatus is also provided in the embodiments of the present application corresponding to the above method. FIG. 18 is a structural schematic diagram of an encoding apparatus provided by the embodiments of the present application. Based on the following multiple modules shown in FIG. 18, the encoding apparatus shown in FIG. 18 can perform all or part of the operations shown in FIG. 8. It should be understood that the apparatus can include more additional modules than the shown modules or omit part of the shown modules, and the embodiments of the present application do not limit this. As shown in FIG. 18, the apparatus includes:

[0204] The acquisition module 1801 is configured to acquire a training frame.

[0205] The scrambling module 1802 is configured to scramble the training frame based on a scrambler to obtain scrambled data, and the scrambler is also configured to scramble a data frame.

[0206] The encoding module 1803 is configured to perform first encoding based on the scrambled data to obtain first encoded data.

[0207] In a possible implementation, the scrambling module 1802 is configured to acquire first scrambler bits output by the scrambler, and scramble the training frame based on the first scrambler bits to obtain the scrambled data.

[0208] In a possible implementation, the scrambling module 1802 is configured to scramble the training frame based on the first scrambler bits and second scrambler bits to obtain the scrambled data, and the second scrambler bits are generated based on the first scrambler bits; and the encoding module 1803 is configured to perform first encoding on the scrambled data to obtain the first encoded data.

[0209] In a possible implementation, the encoding module 1803 is configured to perform first encoding on the scrambled data and second scrambler bits to obtain first encoded data, the second scrambler bits being generated based on the first scrambler bits.

[0210] In a possible implementation, the training frame includes a plurality of subframes, and a last subframe in the plurality of subframes includes InfoField information, the InfoField information being used to interact with a communication end, and the InfoField information does not carry an initial value of a scrambler.

[0211] In a possible implementation, the training frame includes 16 subframes, each subframe has a length of 128 bits, and a boundary of each subframe corresponds to a boundary of a data frame.

[0212] In a possible implementation, the training frame includes 8 subframes, each subframe has a length of 512 bits, and a boundary of each subframe corresponds to a boundary of a data frame.

[0213] In a possible implementation, the apparatus further includes a first mapping module configured to perform first PAM mapping on the first encoded data to obtain the training sequence.

[0214] In a possible implementation, the first PAM mapping is PAM2 mapping.

[0215] In a possible implementation, the scrambling module 1802 is further configured to scramble a data frame based on the scrambler to obtain a scrambled data frame, and the encoding module 1803 is further configured to perform second encoding on the scrambled data frame to obtain second encoded data.

[0216] In a possible implementation, the scrambling module 1802 is configured to scramble a data frame based on the first scrambler bits, second scrambler bits, and third scrambler bits to obtain a scrambled data frame, the second scrambler bits and the third scrambler bits being obtained based on the first scrambler bits.

[0217] In a possible implementation, the third scrambler bits are generated based on Y n and have the same maximum displacement length as the first scrambler bits. n

[0218] In a possible implementation, the third scrambler bits are generated based on Z n and have the same maximum displacement length as the first scrambler bits. n

[0219] In a possible implementation, the apparatus further includes a second mapping module configured to perform second PAM mapping on the second encoded data to obtain a data sequence. ​​

[0220] In a possible implementation, the second PAM is a non-integer multiple of the first PAM.

[0221] In a possible implementation, the second PAM mapping is a PAM3 mapping.

[0222] In a possible implementation, the second encoding is implemented by an 8B6T encoder.

[0223] In a possible implementation, the first encoding is implemented by one encoder, and the training sequence includes the encoding result of the one encoder; or the first encoding is implemented by multiple encoders, and the training sequence includes the encoding result of the multiple encoders.

[0224] In a possible implementation, the one encoder is a 4B6B encoder, and the multiple encoders are 2B3B encoders.

[0225] In a possible implementation, the encoding module 1803 is configured to determine a transmission code group corresponding to the scrambled data according to the scrambled data, and determine the first encoded data according to the transmission code group.

[0226] In a possible implementation, the encoding module 1803 is configured to determine the first encoded data according to a result obtained by negating the transmission code group.

[0227] The above apparatus uses the same scrambler to scramble the training frame and the data frame, avoiding additional increase in hardware resources. Moreover, since the scrambling of the training frame in the training mode and the scrambling of the data frame in the data mode are implemented by the same scrambler, the device for encoding is smoothly switched from the training mode to the data mode and the scrambler runs uninterruptedly, so there is no need to transmit the initial value of the scrambler in the data mode, saving the time for transmission of the initial value and improving the training efficiency.

[0228] It should be understood that the apparatus provided in the above FIG. 18 is only exemplified by the above division of functional modules when implementing its functions, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the above described functions. In addition, the encoding apparatus and the encoding method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process is described in the method embodiments, which will not be repeated here. In addition, the encoding apparatus provided in FIG. 18 can be a chip or a communication device, for example, the encoding apparatus can be the following encoding device.

[0229] Referring to FIG. 19, FIG. 19 shows a structural diagram of a network device 1900 provided in an example embodiment of the present application. The network device 1900 shown in FIG. 19 is configured to perform operations involved in the encoding method shown in FIG. 8 or implement operations involved in the decoding method in the above-described embodiments. The network device 1900 is, for example, a switch, a router, etc., and can be implemented by a general bus architecture.

[0230] As shown in FIG. 19, the network device 1900 includes at least one processor 1901, a memory 1903, and at least one communication interface 1904.

[0231] The processor 1901 is, for example, a general central processing unit (CPU), a digital signal processor (DSP), a network processer (NP), a graphics processing unit (GPU), a neural-network processing units (NPU), a data processing unit (DPU), a microprocessor, or one or more integrated circuits for implementing the schemes of the present application. For example, the processor 1901 includes an application-specific integrated circuit (ASIC), a programmable logic device (PLD) or other programmable logic device, transistor logic, a hardware component, or any combination thereof. The PLD is, for example, a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof. It can implement or execute various logical blocks, modules, and circuits described in connection with the disclosure of the embodiments of the present application. The processor can also be a combination of computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0232] Optionally, the network device 1900 further includes a bus. The bus is used to transmit information between the components of the network device 1900. The bus can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in FIG. 19, but it does not mean that there is only one bus or only one type of bus.

[0233] The memory 1903 is, for example, a read-only memory (ROM) or other type of static storage device that can store static information and instructions, or a random access memory (RAM), or other type of dynamic storage device that can store information and instructions for execution by the processor 1901, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM), or other optical disk storage, a magnetic disk storage or other magnetic storage devices, or any other medium capable of storing desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited thereto. The memory 1903 is, for example, independent and connected to the processor 1901 through the bus. The memory 1903 can also be integrated with the processor 1901.

[0234] The communication interface 1904 uses any transceiver-like mechanism for communicating with other devices or a communication network, which can be an Ethernet network, a radio access network (RAN), a wireless local area networks (WLAN), etc. The communication interface 1904 can include wired communication interfaces and / or wireless communication interfaces. Specifically, the communication interface 1904 can be an Ethernet interface, a fast Ethernet (FE) interface, a gigabit Ethernet (GE) interface, an asynchronous transfer mode (ATM) interface, a wireless local area networks (WLAN) interface, a cellular network communication interface, or a combination thereof. The Ethernet interface can be an optical interface, an electrical interface, or a combination thereof. In embodiments of the present application, the communication interface 1904 can be used for the network device 1900 to communicate with other devices.

[0235] In particular embodiments, as one example, the processor 1901 can include one or more CPUs, such as CPU0 and CPU1 shown in FIG. 19. Each of these processors can be a single-CPU processor or a multi-CPU processor. A processor, as used herein, can refer to one or more devices, circuits, and / or processing cores for processing data, such as computer program instructions.

[0236] In particular embodiments, as one example, the network device 1900 can include multiple processors, such as the processor 1901 and the processor 1905 shown in FIG. 19. Each of these processors can be a single-CPU processor or a multi-CPU processor. A processor, as used herein, can refer to one or more devices, circuits, and / or processing cores for processing data, such as computer program instructions.

[0237] In a specific implementation, as an example, the network device 1900 can further include an output device and an input device. The output device and the processor 1901 communicate, and can display information in a variety of ways. For example, the output device can be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector, etc. The input device and the processor 1901 communicate, and can receive user input in a variety of ways. For example, the input device can be a mouse, a keyboard, a touch screen device, or a sensor device, etc.

[0238] In some embodiments, the memory 1903 is configured to store program code 1910 for implementing the solutions of the present application, and the processor 1901 can execute the program code 1910 stored in the memory 1903. That is, the network device 1900 can implement the encoding method provided by the method embodiments through the processor 1901 and the program code 1910 in the memory 1903. The program code 1910 can include one or more software modules. Alternatively, the processor 1901 itself can also store program codes or instructions for implementing the solutions of the present application.

[0239] In specific embodiments, the network device 1900 of the embodiments of the present application can correspond to the communication device in the above-mentioned various method embodiments.

[0240] The steps of the encoding method provided by FIG. 8 are completed by the integrated logic circuit of hardware or the instructions in the form of software in the processor of the network device 1900. The steps of the method disclosed in the embodiments of the present application can be directly embodied as being completed by a hardware processor, or being completed by a combination of hardware and software modules in the processor. The software module can be located in a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically erasable programmable memory, a register, or other mature storage media in the field. The storage medium is located in the memory, and the processor reads the information in the memory and combines the hardware to complete the steps of the above-mentioned method. To avoid repetition, it will not be described in detail here.

[0241] Referring to FIG. 20, FIG. 20 shows a structural schematic diagram of a network device 2000 according to another example embodiment of the present application. The network device 2000 shown in FIG. 20 is configured to perform all or part of the operations involved in the encoding method shown in FIG. 8 or implement all or part of the operations involved in the decoding method in the above-mentioned embodiments. The network device 2000 is, for example, a switch, a router, etc. The network device 2000 can be implemented by a general bus architecture.

[0242] As shown in FIG. 20, the network device 2000 includes a master board 2010 and an interface board 2030.

[0243] The master board 2010 is also referred to as a main processing unit (MPU) or a route processor card. The master board 2010 is used for control and management of various components in the network device 2000, including route calculation, device management, device maintenance, and protocol processing functions. The master board 2010 includes a central processor 2011 and a memory 2012.

[0244] The interface board 2030 is also referred to as a line processing unit (LPU), a line card, or a service board. The interface board 2030 is used to provide various service interfaces and implement forwarding of data packets. The service interfaces include, but are not limited to, Ethernet interfaces, POS (Packet over SONET / SDH) interfaces, and the like. The Ethernet interface is, for example, a Flexible Ethernet Client (FlexE Client). The interface board 2030 includes a central processor 2031, a network processor 2032, a forwarding table item memory 2034, and a physical interface card (PIC) 2033.

[0245] The central processor 2031 on the interface board 2030 is used to control and manage the interface board 2030 and communicate with the central processor 2011 on the master board 2010.

[0246] The network processor 2032 is configured to implement the forwarding processing of the packet. The network processor 2032 can be a forwarding chip. The forwarding chip can be a network processor (NP). In some embodiments, the forwarding chip can be implemented by an application-specific integrated circuit (ASIC) or a field programmable gate array (FPGA). Specifically, the network processor 2032 is configured to forward the received packet based on a forwarding table stored in the forwarding table entry memory 2034. If the destination address of the packet is the address of the network device 2000, the packet is sent to the CPU (e.g., the central processor 2031) for processing. If the destination address of the packet is not the address of the network device 2000, the next hop and the out interface corresponding to the destination address are found from the forwarding table based on the destination address, and the packet is forwarded to the out interface corresponding to the destination address. The processing of the uplink packet can include the processing of the packet entry interface and the forwarding table lookup. The processing of the downlink packet can include the forwarding table lookup, etc. In some embodiments, the central processor can also perform the function of the forwarding chip, such as implementing software forwarding based on a general-purpose CPU, so that the interface board does not need a forwarding chip.

[0247] The physical interface card 2033 is configured to implement the interfacing function of the physical layer. The original traffic enters the interface board 2030 through the physical interface card 2033, and the processed packet is sent out from the physical interface card 2033. The physical interface card 2033, also referred to as a daughter card, can be installed on the interface board 2030 and is responsible for converting the optical and electrical signals into packets and forwarding the packets to the network processor 2032 for processing after performing the legality check. In some embodiments, the central processor 2031 can also perform the function of the network processor 2032, such as implementing software forwarding based on a general-purpose CPU, so that the physical interface card 2033 does not need a network processor 2032.

[0248] Optionally, the network device 2000 includes multiple interface boards. For example, the network device 2000 further includes an interface board 2040. The interface board 2040 includes a central processor 2041, a network processor 2042, a forwarding table entry memory 2044, and a physical interface card 2043. The functions and implementation manners of the components in the interface board 2040 are the same as or similar to those of the interface board 2030, which will not be described herein.

[0249] Optionally, the network device 2000 further includes a switch fabric 2020. The switch fabric 2020 can also be referred to as a switch fabric unit (SFU). In the case where the network device 2000 has multiple interface boards, the switch fabric 2020 is used to complete data exchange between the interface boards. For example, the interface board 2030 and the interface board 2040 can communicate through the switch fabric 2020.

[0250] The main control board 2010 is coupled with the interface boards. For example, the main control board 2010, the interface board 2030, the interface board 2040, and the switch fabric 2020 are connected through a system bus and a system backboard to communicate with each other. In a possible implementation, an inter-process communication (IPC) channel is established between the main control board 2010 and the interface board 2030 and the interface board 2040, and the main control board 2010 and the interface board 2030 and the interface board 2040 communicate through the IPC channel.

[0251] In logic, the network device 2000 includes a control plane and a forwarding plane. The control plane includes the main control board 2010 and the central processor 2011, and the forwarding plane includes various components that perform forwarding, such as the forwarding table item memory 2034, the physical interface card 2033, and the network processor 2032. The control plane performs functions such as generating a forwarding table, processing signaling and protocol packets, configuring and maintaining the state of the network device, and the like. The control plane generates a forwarding table and delivers the forwarding table to the forwarding plane. In the forwarding plane, the network processor 2032 performs table lookup and forwarding on a packet received by the physical interface card 2033 based on the forwarding table delivered by the control plane. The forwarding table delivered by the control plane can be stored in the forwarding table item memory 2034. In some embodiments, the control plane and the forwarding plane can be completely separated and not on the same network device.

[0252] It is worth mentioning that the master board can be one or more, and when there are multiple master boards, the master boards can include a master master board and a backup master board. The interface board can be one or more, and the stronger the data processing capability of the network device, the more interface boards are provided. The physical interface card on the interface board can also be one or more. The switching network board can be none or one or more, and when there are multiple switching network boards, the switching network boards can collectively implement load sharing and redundancy. Under the centralized forwarding architecture, the network device can not need the switching network board, and the interface board undertakes the processing function of the entire system of service data. Under the distributed forwarding architecture, the network device can have at least one switching network board, and the switching network board is used to realize data exchange between multiple interface boards and provide large-capacity data exchange and processing capability. Therefore, the data access and processing capability of the network device in the distributed architecture is greater than that of the network device in the centralized architecture. Alternatively, the network device can also be in the form of only one board card, that is, the functions of the interface board and the master board are integrated on the one board card, and at this time, the central processor on the interface board and the central processor on the master board can be combined into one central processor on the one board card to perform the functions of the two superimposed boards. The data exchange and processing capability of the network device in this form is relatively low (for example, low-end switches or routers and the like). Which architecture is used depends on the specific network deployment scenario, and no limitation is made herein.

[0253] In specific embodiments, the network device 2000 corresponds to the encoding apparatus shown in FIG. 18. In some embodiments, the scrambling module 1802 in the encoding apparatus shown in FIG. 18 corresponds to the central processor 2011 or the network processor 2032 in the network device 2000.

[0254] The embodiment of the present application also provides a communication device, which comprises a transceiver, a memory and a processor. The transceiver, the memory and the processor communicate with each other through an internal connection path. The memory is used to store instructions, and the processor is used to execute the instructions stored in the memory to control the transceiver to receive a signal and control the transceiver to send a signal. When the processor executes the instructions stored in the memory, the processor executes the encoding method shown in FIG. 8 or implements the decoding method in the above embodiment.

[0255] It should be understood that the above processor can be a CPU, and can also be other general-purpose processors, DSPs, ASICs, FPGAs or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc. It is worth mentioning that the processor can be a processor supporting an advanced RISC machine (ARM) architecture.

[0256] Further, in an alternative embodiment, the aforementioned memory can include read-only memory and random access memory, and provide the processor with instructions and data. The memory can also include non-volatile random access memory. For example, the memory can also store device type information.

[0257] The memory can be volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of illustration, and not limitation, nonvolatile memory can be ROM, programmable ROM (PROM), erasable PROM (EPROM), EEPROM, or flash memory. Volatile memory can be RAM, which acts as external cache memory. By way of illustration and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0258] Embodiments of the present application also provide an encoding device, which comprises a processor configured to load and execute at least one instruction to enable the encoding device to implement the encoding method shown in FIG. 8. Optionally, the device further comprises a memory coupled to the processor, and the memory is configured to store the at least one instruction.

[0259] Embodiments of the present application also provide a decoding device, which comprises a processor configured to load and execute at least one instruction to enable the decoding device to implement the decoding method in the above embodiments. Optionally, the device further comprises a memory coupled to the processor, and the memory is configured to store the at least one instruction.

[0260] Embodiments of the present application also provide a computer readable storage medium, which stores at least one instruction, and the instruction is loaded and executed by a processor to enable a computer to implement the encoding method shown in FIG. 8 or implement the decoding method in the above embodiments.

[0261] The embodiment of the present application further provides a computer program (product), which, when executed by a computer, can enable a processor or the computer to perform the corresponding steps and / or processes in the above method embodiments.

[0262] The embodiment of the present application further provides a chip, which comprises a processor, and is used for calling and running instructions stored in a memory, so that a communication device installed with the chip performs the encoding method as shown in FIG. 8 or implements the decoding method in the above embodiment.

[0263] The embodiment of the present application further provides another chip, which comprises an input interface, an output interface, a processor and a memory, and the input interface, the output interface, the processor and the memory are connected through internal connection paths. The processor is used for executing code in the memory, and when the code is executed, the processor is used for performing the encoding method as shown in FIG. 8 or implementing the decoding method in the above embodiment.

[0264] The embodiment of the present application further provides a decoding device, which comprises an acquisition module, a decoding module and a descrambling module. The acquisition module is used for acquiring a signal sequence. The decoding module is used for performing first decoding based on the signal sequence to obtain a sequence to be descrambled. The descrambling module is used for determining scrambled data obtained by using a scrambler to scramble a training frame based on the sequence to be descrambled, and performing descrambling on the scrambled data to obtain the training frame. The scrambler is also used for scrambling a data frame.

[0265] It should be understood that the decoding device described above only takes the division of the above functional modules as an example when realizing its functions, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the decoding device and the decoding method provided in the above embodiment belong to the same concept, and the specific implementation process is described in the method embodiment, which will not be repeated here. In addition, the decoding device can be a chip or a communication device, for example, the decoding device can be the decoding device described above.

[0266] The embodiment of the present application further provides a processing system, which comprises an encoding device and a decoding device. The encoding device is used for performing the encoding method as shown in FIG. 8, and the decoding device is used for implementing the decoding method in the above embodiment.

[0267] In the above embodiments, all or part can be implemented by software, hardware, firmware, or any combination thereof. When implemented by software, all or part can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, all or part generates the processes or functions described in the present application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another, for example, the computer instructions can be transferred from one website, computer, server or data center to another via wired (such as coaxial cable, optical fiber, digital subscriber line) or wireless (such as infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium accessible by a computer or a data storage device such as a server, data center, etc. containing one or more available media. The available media can be magnetic media (such as floppy disk, hard disk, magnetic tape), optical media (such as DVD), or semiconductor media (such as Solid State Disk), etc.

[0268] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data for analysis, stored data, displayed data, etc.) and signals involved in the present application are all authorized by the user or fully authorized by all parties, and the collection, use and processing of related data need to comply with relevant laws, regulations and standards of relevant countries and regions. For example, the training frames involved in the present application are obtained under full authorization.

[0269] Those of ordinary skill in the art can understand that, in combination with the method steps and modules described in the embodiments disclosed herein, all or part can be implemented by software, hardware, firmware, or any combination thereof. In order to clearly illustrate the interchangeability of hardware and software, the steps and components of the embodiments have been described in the above description. Whether the functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those of ordinary skill in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0270] Those of ordinary skill in the art can understand that all or part of the steps of the above embodiments can be completed by hardware, or by a program instructing related hardware, which can be stored in a computer-readable storage medium. The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0271] When implemented in software, the functions can be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media include both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media can be any available media that can be accessed by a general purpose or special purpose computing device. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code means in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computing device, or a general-purpose or special-purpose computing device. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, or twisted pair, then the coaxial cable, fiber optic cable, or twisted pair are included in the definition of medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), and Blu-Ray® disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0272] In other embodiments, the functionality of various implementations of the present embodiments can be incorporated into both the hardware and / or software of existing computing devices and / or systems. Thus, for example, the present embodiments can be used in conjunction with hardware and / or software of a general purpose computing device or a special purpose computing device.

[0273] In the context of the present embodiments, the computer program code or associated data can be embodied in any suitable form and carried by any suitable carrier. Examples of carriers include signals, computer readable media, and the like.

[0274] Examples of signals can include, but are not limited to, electronic, electromagnetic, optical, sound, or other forms of propagated signals, such as carrier waves, infrared signals, and the like.

[0275] A machine-readable medium includes any tangible medium that can store or transfer programming code means, e.g., instructions or data structures. Non-limiting examples of a machine- readable medium include a floppy disk, magnetic disk, magnetic tape, optical disk, magneto-optical disk, RAM, ROM, erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, compact disc read-only memory (CD-ROM), digital versatile disc (DVD), Blu-Ray® disc, etc. Machine-readable media also include transmission media, such as those that carry computer programs in signals such as carrier waves or the like. Examples of a machine- readable medium include a transmission line, a coaxial cable, a fiber-optic cable, and / or the like. A machine-readable medium can also be any medium that can be enrolled in a computer system.

[0276] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system, device and module can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

[0277] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are merely schematic, for example, the division of the module is only a logical function division, and actual implementation can have another division mode, for example, a plurality of modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed modules can be indirect coupling or communication connection through some interfaces, devices or modules, and can also be electrical, mechanical or other form of connection.

[0278] The module described as a separate component can be or can not be physically separated, and the component displayed as a module can be or can not be a physical module, that is, can be located in one place, or can be distributed to a plurality of network modules. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiment of the present application.

[0279] In addition, the functional modules in each embodiment of the present application can be integrated in one processing module, or each module can exist physically, or two or more modules can be integrated in one module. The integrated module can be realized in the form of hardware or in the form of a software functional module.

[0280] The integrated module, if realized in the form of a software functional module and sold or used as an independent product, can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or say the part of the prior art that contributes to the technical solutions, or all or part of the technical solutions can be embodied in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method in each embodiment of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various storage program codes.

[0281] The terms "first", "second", and the like, used in the present application, are used to distinguish between similar or identical items or items having substantially the same function, and it should be understood that there is no logical or chronological dependency between "first", "second", and "n", nor is the quantity and execution order limited. It should also be understood that although the following description uses the terms first, second, and the like to describe various elements, these elements should not be limited by the terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of various described examples, a first image can be referred to as a second image, and similarly, a second image can be referred to as a first image. The first image and the second image can both be images, and in some cases, can be separate and distinct images.

[0282] It should also be understood that in various embodiments of the present application, the size of the serial number of various processes does not mean the order of execution, and the execution order of various processes should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0283] In the present application, the term "at least one" means one or more, and the term "multiple" in the present application means two or more, for example, multiple second messages refer to two or more second messages. The terms "system" and "network" are often used interchangeably in this document.

[0284] It should be understood that the terms used in the description of various described examples herein are only for the purpose of describing specific examples and are not intended to be limiting. As used in the description of various described examples and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0285] It should also be understood that the term "and / or" used herein means and encompasses any and all possible combinations of one or more of the associated listed items. The term "and / or" is a description of the association between associated objects, which means that there can be three relationships, for example, A and / or B, which can represent: A exists alone, A and B exist together, and B exists alone. In addition, the character " / " in the present application generally represents an "or" relationship between the front and rear associated objects.

[0286] It should also be understood that the term "includes" (also "including", "comprises" and / or "comprising") when used in the present specification specifies the presence of stated features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0287] It also should be understood that the terms “if’ and “when” can be interpreted to mean “upon” or “in response to a determination” or “in response to a detection.” Similarly, the phrase “if determined” or “if detected [a stated condition or event]” can be interpreted to mean “upon a determination” or “in response to a determination” or “upon a detection” or “in response to a detection” of [a stated condition or event], depending on the context.

[0288] It should be understood that a determination of B from A does not mean that B is determined only from A, but B can also be determined from A and / or other information.

[0289] It also should be understood that the description throughout the specification made in connection with the terms “one embodiment,” “an embodiment,” “a possible implementation,” and the like, mean that a particular feature, structure, or characteristic described in connection with these terms is included in at least one embodiment of the application. Therefore, appearances of the phrases “in one embodiment” or “in an embodiment,” “a possible implementation,” and the like, in various places throughout the specification are not necessarily referring to the same embodiment. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

Claims

1. An encoding method characterized by comprising: The method comprises: obtaining a training frame; scrambling the training frame based on a scrambler to obtain scrambled data, the scrambler being further configured to scramble a data frame; first encoding based on the scrambled data to obtain first encoded data.

2. The method of claim 1, wherein, The scrambling of the training frame based on the scrambler to obtain scrambled data comprises: obtaining first scrambler bits output by the scrambler, and scrambling the training frame based on the first scrambler bits to obtain scrambled data.

3. The method of claim 2, wherein, The scrambling of the training frame based on the first scrambler bits to obtain scrambled data comprises: scrambling the training frame based on the first scrambler bits and second scrambler bits to obtain scrambled data, the second scrambler bits being generated based on the first scrambler bits. The first encoding based on the scrambled data to obtain first encoded data comprises: first encoding the scrambled data to obtain first encoded data.

4. The method of claim 2, wherein, The first encoding based on the scrambled data to obtain first encoded data comprises: first encoding the scrambled data and second scrambler bits to obtain first encoded data, the second scrambler bits being generated based on the first scrambler bits.

5. The method according to any of claims 1 to 4, characterized in that, The training frame comprises a plurality of subframes, and a last subframe in the plurality of subframes comprises InfoField information, the InfoField information being used to interact information with a communication end, and the InfoField information not carrying an initial value of the scrambler.

6. The method of claim 5, wherein, The training frame comprises 16 subframes, each subframe having a length of 128 bits, and a boundary of the subframe corresponding to a boundary of a data frame.

7. The method of claim 5, wherein, The training frame comprises 8 subframes, each subframe having a length of 512 bits, and a boundary of the subframe corresponding to a boundary of a data frame.

8. The method according to any one of claims 1 to 7, characterized in that, After the first encoded data is obtained, the method further comprises: performing first pulse amplitude modulation (PAM) mapping on the first encoded data to obtain a training sequence.

9. The method of claim 8, wherein, The first PAM mapping is PAM2 mapping.

10. The method according to any one of claims 1 to 9, characterized in that, The method further comprises: scrambling a data frame based on the scrambler to obtain a scrambled data frame; second encoding the scrambled data frame to obtain second encoded data.

11. The method of claim 10, wherein, The scrambling of the data frame based on the scrambler to obtain the scrambled data frame comprises: scrambling the data frame based on first scrambler bits, second scrambler bits, and third scrambler bits to obtain the scrambled data frame, the second scrambler bits and the third scrambler bits being obtained based on the first scrambler bits.

12. The method according to claim 10 or 11, characterized in that, After the second encoded data is obtained, the method further comprises: performing second pulse amplitude modulation (PAM) mapping on the second encoded data to obtain a data sequence.

13. The method of claim 12, wherein, The second PAM is a non-integer multiple of the first PAM.

14. The method according to claim 12 or 13, characterized in that, The second PAM mapping is PAM3 mapping.

15. The method according to any of claims 10 to 14, characterized in that, The second encoding is implemented by an 8B6T encoder.

16. The method of any one of claims 1-15, wherein, The first encoding is implemented by one encoder, and the training sequence comprises an encoding result of the one encoder. Alternatively, the first encoding is implemented by a plurality of encoders, and the training sequence comprises encoding results of the plurality of encoders.

17. The method of claim 16, wherein, The one encoder is a 4B6B encoder, and the multiple encoders are 2B3B encoders.

18. The method of claim 1, wherein, The first encoding based on the scrambled data comprises: determining a transmission code group corresponding to the scrambled data according to the scrambled data; determining the first encoded data according to the transmission code group.

19. The method of claim 18, wherein, The determining the first encoded data according to the transmission code group specifically comprises: determining the first encoded data according to a result obtained by taking a complement of the transmission code group.

20. A decoding method, comprising: The method comprises: obtaining a signal sequence; performing first decoding based on the signal sequence to obtain a sequence to be descrambled; performing descrambling on scrambled data obtained by scrambling a training frame by using a scrambler to obtain the training frame, and the scrambler is further used for scrambling a data frame.

21. An encoding apparatus, comprising: The apparatus comprises one or more modules, and the encoding apparatus performs the encoding method of any one of claims 1-19 through the one or more modules.

22. An encoding device, comprising: The device comprises a processor configured to obtain a training frame, scramble the training frame based on a scrambler to obtain scrambled data, and the scrambler is further configured to scramble a data frame. performing first encoding based on the scrambled data to obtain first encoded data.

23. The apparatus of claim 22, wherein, The processor is configured to obtain first scrambler bits output by the scrambler, scramble the training frame based on the first scrambler bits to obtain scrambled data.

24. The apparatus of claim 23, wherein, The processor is configured to scramble the training frame based on the first scrambler bits and second scrambler bits to obtain scrambled data, generate the second scrambler bits based on the first scrambler bits, and perform first encoding on the scrambled data to obtain first encoded data.

25. The apparatus of claim 23, wherein, The processor is configured to perform first encoding on the scrambled data and second scrambler bits to obtain first encoded data, and the second scrambler bits are generated based on the first scrambler bits.

26. The apparatus of any of claims 22-25, wherein, The training frame comprises multiple subframes, the last subframe in the multiple subframes comprises information field (InfoField) information, the InfoField information is used for exchanging information with a communication end, and the InfoField information does not carry an initial value of the scrambler.

27. The apparatus of any of claims 22-26, wherein, The processor is further configured to perform first pulse amplitude modulation (PAM) mapping on the first encoded data to obtain a training sequence.

28. The apparatus of any of claims 22-27, wherein, The processor is further configured to scramble a data frame based on the scrambler to obtain a scrambled data frame, and perform second encoding on the scrambled data frame to obtain second encoded data.

29. The apparatus of claim 28, wherein, The processor is configured to scramble the data frame based on first scrambler bits, second scrambler bits, and third scrambler bits to obtain a scrambled data frame, and the second scrambler bits and the third scrambler bits are obtained based on the first scrambler bits.

30. The apparatus of claim 28 or 29, wherein, The processor is further configured to perform second pulse amplitude modulation (PAM) mapping on the second encoded data to obtain a data sequence.

31. The apparatus of claim 22, wherein, In the first encoding of the scrambled data by the processor to obtain the first encoded data, the processor is specifically configured to: determine a transmission code group corresponding to the scrambled data according to the scrambled data; The first encoded data is determined according to the transmission code group.

32. The apparatus of claim 31, wherein, In the step of determining the first encoded data according to the transmission code group, the processor is specifically configured to: The first encoded data is determined according to a result obtained by taking a complement of the transmission code group.

33. A processing system, comprising: The processing system comprises an encoding device and a decoding device, the encoding device is configured to perform the encoding method in any one of claims 1-19, and the decoding device is configured to perform the decoding method in claim 20.

34. A computer-readable storage medium, characterized in that, The computer readable storage medium stores at least one instruction, which is loaded and executed by the processor to implement the encoding method in any one of claims 1-19 or the decoding method in claim 20.

35. A chip, comprising: The chip comprises a processor, which is configured to run program instructions or codes, so that a device containing the chip performs the encoding method in any one of claims 1-19 or the decoding method in claim 20.

36. A computer program product, characterised in that, The computer program product comprises computer program / instructions, which are executed by the processor to make the computer perform the encoding method in any one of claims 1-19 or the decoding method in claim 20.

37. A decoding apparatus, comprising: The decoding device comprises one or more modules, and the decoding device performs the decoding method in claim 20 through the one or more modules.

38. A decoding device, comprising: The device comprises a processor, which is configured to acquire a signal sequence, perform first decoding based on the signal sequence to obtain a sequence to be descrambled, determine scrambled data obtained by scrambling a training frame by using a scrambler based on the sequence to be descrambled, and perform descrambling on the scrambled data to obtain the training frame, and the scrambler is further configured to scramble a data frame.

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