Protection control device, protection control system, and protection control method

Abstract

A protection control device according to the present invention comprises a communication unit, which transmits and receives information to and from a device group disposed in a power system, and performs protection control processing using the information, the protection control device further comprising a calculation unit that is connected to the communication unit, is capable of individually executing common processing and a plurality of tasks of protection control processing, shares the result of the common processing in at least two of the plurality of tasks of protection control processing, and is capable of executing each of the at least two tasks of protection control processing on the basis of the result of the common processing.

Description

Protection control device, protection control system, and protection control method

[0001] The present invention relates to a protection and control device, a protection and control system, and a protection and control method for facilities such as a substation.

[0002] A digital substation protection and control system conforming to the international standard IEC 61850 includes an intelligent electronic device (hereinafter referred to as an "IED (Intelligent Electrical Device)") and a merging unit (hereinafter referred to as an "MU (Merging Unit)"). FIG. 10 is a diagram showing the configuration of a typical digital substation protection and control system conforming to the international standard IEC 61850. As shown in FIG. 10, the protection and control system 300 includes a plurality of IEDs (IED301 to IED304) and a plurality of MUs (MU311 to MU314), and the plurality of IEDs and the plurality of MUs are connected via a process bus 320 (communication network).

[0003] Each IED has a protection function, a control function, and a monitoring function (constant monitoring) of the system including the device itself, and is arranged at the bay level by protection function unit or control function unit. The control target of each IED is a circuit breaker or a circuit unit connected to it. Each IED receives information such as the device status of other IEDs and MUs via the process bus 320, and uses this information to perform protection or control calculations and control operations such as interlocks and LED (Light Emitting Diode) displays (indicating whether there is an abnormality).

[0004] Each MU is arranged for each corresponding circuit and is located near a field device such as a circuit breaker. Each MU transmits information to the IED, such as current values ​​obtained from a current transformer (CT) and voltage values ​​obtained from a voltage transformer (VT). Each MU also outputs contacts to the circuit breaker based on trip commands and control commands received from the IED, controlling the opening and closing of the circuit breaker.

[0005] In addition, data (frames) are transmitted and received between the IED and the MU via digital communication in accordance with a communication protocol compliant with the international standard IEC 61850. Specifically, digital communication is performed using a protocol stack and format compliant with the SV (Sampled Value) and GOOSE (Generic Object Oriented Substation Event) methods defined in the international standard IEC 61850. Note that GOOSE allows data to be transmitted and received bidirectionally between the IED and the MU. Data communicated via SV includes, for example, analog information on current and voltage values ​​acquired by each MU and information obtained by A / D conversion of the analog information. Data communicated via GOOSE includes, for example, trip commands from the IED to the MU and digital and analog information from the MU to the IED.

[0006] Various techniques for detecting a grid fault in the above-mentioned digital substation protection and control system have been proposed (see, for example, Patent Document 1). Patent Document 1 discloses a technique for identifying a grid fault point based on information collected by a calculation unit of a protection and control terminal via a process bus, the information including grid information detected by other protection and control terminals.

[0007] JP 2023-89787 A

[0008] In a digital substation protection and control system conforming to the international standard IEC 6185, information must be exchanged between component devices via communications. Furthermore, in a digital substation protection and control system in which multiple IEDs are installed in a high-voltage substation or a low-level substation with many target circuits, costs may rise as the number of devices increases. One possible approach to addressing these issues is to adopt a centralized protection and control system (hereinafter referred to as "CPC (Centralized Protection and Control)") that aggregates multiple IEDs. A CPC aggregates the protection and control functions of multiple IEDs, enabling information aggregation and centralized management.

[0009] However, when the conventional technology disclosed in Patent Document 1 is applied within a CPC, continuous monitoring of the system is performed on an IED basis, i.e., on a protection and control processing functional unit basis. In this case, the same monitoring is performed by multiple protection and control processing functional units, which may lead to problems such as complicated information management and an increased processing load.

[0010] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a technology that simplifies information management and can suppress an increase in processing load in a protection control device having multiple protection control processing functions and a protection control system equipped with the same.

[0011] In order to solve the above problems, the protection and control device of the present invention is a protection and control device that includes a communication unit that transmits and receives information to and from a group of devices arranged in a power system, and performs protection and control processing using the information. The protection and control device of the present invention also includes a calculation unit that is connected to the communication unit, is capable of individually executing a common processing and multiple protection and control processing, shares a result of the common processing with at least two of the multiple protection and control processing, and is capable of executing each of the at least two protection and control processing based on the result of the common processing.

[0012] In order to solve the above problems, the protection and control system of the present invention includes a plurality of merging units, a protection and control device, and a network capable of communication between the merging units and the protection and control device. The protection and control device has a communication unit that transmits and receives information to at least one of the plurality of merging units, and a calculation unit connected to the communication unit. The calculation unit is capable of individually executing a common process and a plurality of protection and control processes, shares the result of the common process with at least two of the plurality of protection and control processes, and is capable of executing each of the at least two protection and control processes based on the result of the common process. The protection and control device is also capable of individually identifying margin units that communicate via the network, and when it detects loss or delay of information transmitted from a margin unit, it detects the abnormal margin unit based on identification information included in the information.

[0013] Furthermore, to solve the above problems, a protection control method of the present invention is a protection control method executed by the protection control device of the present invention, and includes a calculation unit separately executing a common process and multiple protection control processes. The protection control method of the present invention also includes a calculation unit sharing a result of the common process with at least two of the multiple protection control processes, and executing each of the at least two protection control processes based on the result of the common process.

[0014] According to the present invention having the above configuration, in a protection control device having a plurality of protection control processing functions and a protection control system including the same, information management is simplified and an increase in processing load can be suppressed.

[0015] FIG. 1 is a schematic configuration diagram of a protection and control system according to one embodiment of the present invention. FIG. 2 is a diagram showing the hardware configuration of a protection and control device according to one embodiment of the present invention. FIG. 3 is a functional block configuration diagram of an arithmetic processing unit of a protection and control device according to one embodiment of the present invention. FIG. 4 is a timing chart of various processes performed in the arithmetic processing unit of a protection and control device according to one embodiment of the present invention. FIG. 5 is a flowchart showing the procedure of monitoring and protection control processing performed in a first core of a protection and control device according to one embodiment of the present invention. FIG. 6 is a flowchart showing the procedure of monitoring and protection control processing performed in a second core of a protection and control device according to one embodiment of the present invention. FIG. 7 is a flowchart showing the procedure of external device abnormality detection processing performed in the first core of a protection and control device according to one embodiment of the present invention. FIG. 8 is a functional block configuration diagram of an arithmetic processing unit of a protection and control device according to a comparative example. FIG. 9 is a functional block configuration diagram of a protection and control device according to the comparative example. FIG. 10 is a schematic configuration diagram of a conventional digital substation protection and control system.

[0016] Hereinafter, a protection and control device, a protection and control system including the same, and a protection and control method according to one embodiment of the present invention will be specifically described with reference to the drawings.

[0017] [Configuration of Protection and Control System] Fig. 1 is a schematic configuration diagram of a protection and control system of this embodiment. For convenience of explanation, Fig. 1 shows only components related to monitoring and protection and control. The protection and control system 1 of this embodiment is a digital substation protection and control system that complies with the international standard IEC 6185, and performs protection and monitoring and control of the substation.

[0018] As shown in FIG. 1 , the protection and control system 1 includes a CPC 10 and multiple MUs (MUs 31 to 36). The CPC 10 and the multiple MUs are connected via a process bus 20 (communication network). Various data (frames) are transmitted and received between the CPC 10 and the multiple MUs via digital communication using a protocol stack and format conforming to the SV and GOOSE methods compliant with the international standard IEC 61850. Note that in this embodiment, an example is described in which the number of MUs to be protected and controlled by the protection and control system 1 is six. However, this is just one example, and the number of MUs may be less than six or seven or more depending on, for example, the size of the substation.

[0019] In the protection and control system 1 of this embodiment, the multiple IEDs in the configuration of the conventional protection and control system 300 shown in FIG. 10 are replaced with a CPC 10. Therefore, whereas the conventional system shown in FIG. 10 installs an IED per circuit (circuit breaker), in this embodiment, a CPC 10 equipped with the functions of multiple IEDs is installed for each of the multiple circuits. That is, the CPC 10 is a device that aggregates the functional units of multiple protection processes and control processes conventionally performed by multiple IEDs, and performs various processes (calculations) related to the protection and control and supervisory control of the substation based on analog information and device information received from multiple MUs (MU31 to MU36). Furthermore, since the protection and control system 1 of this embodiment is configured such that multiple IEDs are replaced with a CPC 10, the number of devices required to configure the protection and control system 1 can be reduced.

[0020] As in the past, each MU is arranged for each corresponding circuit and is located near a field device such as a circuit breaker. Each MU transmits information such as a current value obtained from a CT or a voltage value obtained from a VT to the CPC 10 via the process bus 20. Furthermore, each MU outputs a contact to the corresponding circuit breaker based on an operation command signal (e.g., a trip command, a control command, etc.) received from the CPC 10 via the process bus 20, thereby controlling the opening and closing of the circuit breaker.

[0021] [Configuration of Protection and Control Device] Fig. 2 is a hardware configuration diagram of the CPC 10 of this embodiment. For convenience of explanation, Fig. 2 shows only components related to monitoring and protection and control.

[0022] As shown in Figure 2, the CPC 10 includes an arithmetic processing unit 11 (arithmetic unit), an interrupt generation unit 12, a shared memory 13 (storage unit), a network interface (I / F) unit 14 (communication unit), and an LED 15 (alarm unit).

[0023] Within the CPC 10, the arithmetic processing unit 11 is electrically connected to an interrupt generation unit 12, a shared memory 13, a network interface unit 14, and an LED 15. The network interface unit 14 is also connected to an external device 30 (a group of devices arranged in a power system) including a plurality of MUs (MUs 31 to MUs 36) via a transmission path such as a process bus 20 (a communication network).

[0024] The arithmetic processing unit 11 is configured by a multi-core processor, and has a first core 51, a second core 52, a third core 53, and a timer unit 54.

[0025] The first core 51 executes the processing of the protection control function on software. The first core 51 also executes the processing of the monitoring function of the CPC 10 (its own device) and the external device 30 on software. The second core 52 executes the processing of the protection control function on software.

[0026] The third core 53 is connected to the network interface unit 14 and the LED 15, and executes, on software, a communication processing function conforming to the international standard IEC 61850 and a control function for turning the LED 15 on and off.

[0027] The timer unit 54 has three timers (not shown), one for each core, and each timer can be controlled by software. Each timer in the timer unit 54 is connected to a corresponding core and can output an interrupt signal (hereinafter referred to as a "timer interrupt signal") to that core after a set predetermined time has elapsed. In this embodiment, the first core 51 starts a protection control process based on the timer interrupt signal input from the corresponding timer, and the second core 52 starts a protection control process based on the timer interrupt signal from the corresponding timer.

[0028] Furthermore, the first core 51, the second core 52, and the third core 53 are all connected to the shared memory 13, and can exchange (write and call) information (data) via the shared memory 13. Hereinafter, the exchange of information (data) between the cores via the shared memory 13 will be referred to as "memory transfer." The various processing functions provided by each core will be described in detail later with reference to the drawings.

[0029] The interrupt generation unit 12 outputs an interrupt signal at a fixed cycle (hereinafter referred to as a "fixed-cycle interrupt signal") to the arithmetic processing unit 11. Each core in the arithmetic processing unit 11 is started based on the input of the fixed-cycle interrupt signal, and starts executing various processes related to the protection control function. That is, in this embodiment, the various processes related to the protection control function by the arithmetic processing unit 11 are repeatedly executed at a fixed cycle.

[0030] The shared memory 13 is configured with RAM (Random Access Memory) or the like, and is used as a work area when each core in the arithmetic processing unit 11 executes various processes. The shared memory 13 stores various information (e.g., monitoring information, etc., described below) exchanged (input / output) between processing function units (described below) in each core, as well as various information (e.g., flags, parameters, etc.) for controlling the exchange. Therefore, in this embodiment, the first core 51, the second core 52, and the third core 53 can each execute processes independently, but can share their calculation results with each other via the shared memory 13. For example, the calculation results and collected information of the first core 51 can be grasped by the processing operation of the second core 52.

[0031] The network interface unit 14 is configured, for example, by a network interface card (NIC), etc. The network interface unit 14 is an interface for connecting to an external device 30 including a plurality of MUs (MU31 to MU36) via the process bus 20, and for communicating with the external device 30 in a manner conforming to the international standard IEC 61850.

[0032] The LED 15 is a functional unit that displays the operating status (presence or absence of an abnormality) of the CPC 10. The LED 15 turns on / off in response to a control signal (on / off command) input from the third core 53 of the arithmetic processing unit 11.

[0033] [Functional Configuration of the Arithmetic Processing Unit] Fig. 3 is a functional block diagram of the arithmetic processing unit 11. For convenience of explanation, Fig. 3 only shows components related to monitoring and protection control. In addition, in this embodiment, as shown in Fig. 1, the number of MUs to be protected and controlled in the protection and control system 1 is six. Therefore, in this embodiment, an example will be described in which the CPC 10 (arithmetic processing unit 11) is equipped with six protection and control processing function units (first protection and control processing unit 61 to sixth protection and control processing unit 66 described below) corresponding to each MU.

[0034] 3, the first core 51 functionally includes a first protection control processing unit 61, a second protection control processing unit 62, a third protection control processing unit 63, and a common processing unit 71. The second core 52 functionally includes a fourth protection control processing unit 64, a fifth protection control processing unit 65, a sixth protection control processing unit 66, and a pre-processing unit 72. The third core 53 functionally includes an LED control processing unit 81 and a communication processing unit 82. The functions of each unit are realized by software.

[0035] The first protection control processing unit 61 in the first core 51 is a functional unit that controls and protects the system of MU 31 (see FIG. 1 ) and has a relay processing unit 61 a and a sequence processing unit 62 b. The second protection control processing unit 62 is a functional unit that controls and protects the system of MU 32 and has a relay processing unit 62 a and a sequence processing unit 62 b. The third protection control processing unit 63 is a functional unit that controls and protects the system of MU 33 and has a relay processing unit 63 a and a sequence processing unit 63 b.

[0036] The fourth protection control processing unit 64 in the second core 52 is a functional unit that controls and protects the system of the MU 34 (see FIG. 1 ) and has a relay processing unit 64 a and a sequence processing unit 64 b. The fifth protection control processing unit 65 is a functional unit that controls and protects the system of the MU 35 and has a relay processing unit 65 a and a sequence processing unit 65 b. The sixth protection control processing unit 66 is a functional unit that controls and protects the system of the MU 36 and has a relay processing unit 66 a and a sequence processing unit 66 b.

[0037] The relay processing unit and sequence processing unit of each protection control processing unit perform similar processing regardless of the type of protection control processing unit. Each relay processing unit references the voltage and current values ​​of the system of each MU collected by the common processing unit 71 via the communication processing unit 82 and stored in the shared memory 13, and performs various arithmetic processing to detect whether or not a system fault has occurred in the corresponding MU. For example, the relay processing unit 61a of the first protection control processing unit 61 performs arithmetic processing such as comparing the voltage and current values ​​of the system of MU 31 with threshold values.

[0038] Furthermore, each sequence processing unit performs calculations in accordance with sequence logic for realizing protection control functions such as output control of a trip command (trip command) based on the calculation results of the corresponding relay processing unit (detection results of the presence or absence of a system fault). Specifically, each sequence processing unit determines whether or not the output conditions for the trip command are met based on the calculation results of the corresponding relay processing unit. If the output conditions for the trip command are met, each sequence processing unit outputs a trip command to the corresponding MU to the process bus 20 via the communication processing unit 82 and the network interface unit 14. For example, the sequence processing unit 61b of the first protection control processing unit 61 controls the output of a trip command to a circuit breaker in the system of MU 31 based on the calculation results of the relay processing unit 61a.

[0039] The common processing unit 71 in the first core 51 includes a constant monitoring unit 71a and a sequence processing unit 71b.

[0040] The continuous monitoring unit 71a monitors the health of the CPC 10 (its own device) and the external device 30 (including MUs 31 to 36). As described above, in this embodiment, the first core 51 is started based on the input of a periodic interrupt signal, and therefore the monitoring process by the continuous monitoring unit 71a is also repeated at regular intervals.

[0041] The continuous monitoring unit 71a monitors whether the hardware of the CPC 10, such as the shared memory 13 and the network interface unit 14, and the software executed on the CPC 10, are operating normally. If the continuous monitoring unit 71a detects an abnormality in the CPC 10 (its own device), it outputs (transfers) that information to the sequence processing unit 71b.

[0042] Furthermore, the continuous monitoring unit 71a monitors whether the external device 30 is operating normally based on frames (data) received from each device included in the external device 30 via the communication processing unit 82. When the continuous monitoring unit 71a detects an abnormality in the external device 30, it outputs that information to the sequence processing unit 71b.

[0043] In the protection and control system 1 of this embodiment, as shown in FIGS. 1 and 2, the CPC 10 is connected via a process bus 20 to an external device 30 including multiple MUs (MUs 31 to 36) that transmit various analog data necessary for relay calculations to realize the protection and control function. Furthermore, various data from each MU or other device included in the external device 30 (hereinafter collectively referred to as "external devices") is set in frames conforming to the SV and GOOSE methods and transmitted to the CPC 10 via the process bus 20. Each frame transmitted from each external device contains information indicating the health of the external device, and the common processing unit 71 (continuous monitoring unit 71a) uses this information to detect abnormalities in the corresponding external device. Furthermore, each frame transmitted from each external device contains a predetermined (unique) identifier corresponding to the external device, and the common processing unit 71 (continuous monitoring unit 71a) uses the predetermined identifier to detect (identify) an external device experiencing frame loss or delay.

[0044] The sequence processing unit 71b executes sequence logic on software to realize the various processing functions executed by the common processing unit 71.

[0045] The sequence processing unit 71b outputs a command to turn on the LED 15 to the LED control processing unit 81 of the third core 53 based on the status information of the CPC 10 (detection information of an abnormality) input from the continuous monitoring unit 71a. The sequence processing unit 71b also outputs a command to transmit information on the abnormality status of the CPC 10 (abnormality in the device itself) to the network interface unit 14 via the communication processing unit 82 of the third core 53. Furthermore, the sequence processing unit 71b stores in the shared memory 13 determination conditions for the occurrence of an abnormality in the CPC 10 and determination conditions for the occurrence of an abnormality in the external device 30. These abnormality determination conditions (hereinafter referred to as "device abnormality determination conditions") are read by the sequence processing unit of each protection control processing unit and used as determination conditions for whether or not each protection control processing unit should execute a relay lock, which will be described later.

[0046] The preprocessing unit 72 in the second core 52 is a processing function unit (backup processing function unit) that executes processing other than the processing executed by the first protection control processing unit 61 to the sixth protection control processing unit 66 and the common processing unit 71, and that needs to be executed before the execution of processing by each protection control processing unit. For example, the preprocessing unit 72 executes digital filtering or the like on analog data received from the MUs (for example, analog information on current values / voltage values ​​acquired by each MU).

[0047] The LED control processing unit 81 in the third core 53 is connected to the LED 15 and controls the turning on / off of the LED 15 based on a control command (turn on / off command) for the LED 15 input from the common processing unit 71 in the first core 51.

[0048] The communication processing unit 82 in the third core 53 is connected to the network interface unit 14, and transmits and receives information (data) via the network interface unit 14 to and from the external device 30 (including multiple MUs) connected via the process bus 20. The communication processing unit 82 transmits, for example, information output from each protection control processing unit or the common processing unit 71 to the external device 30 (MU) using the GOOSE method. The communication processing unit 82 also outputs, for example, analog information of current values / voltage values ​​received from the external device 30 using the SV method, or analog information or bit information received using the GOOSE method, to each protection control processing unit and the common processing unit 71.

[0049] [Timing Chart of Processing Performed by Each Processing Function Unit of the Arithmetic Processing Unit] FIG. 4 is a timing chart of processing performed by each processing function unit of the arithmetic processing unit 11 of the CPC 10. As shown in FIG.

[0050] In this embodiment, a plurality of protection control processes, common processes, and pre-processing processes are shared, i.e., the processes are executed by dividing the cores, by the first core 51 and the second core 52 included in the arithmetic processing unit 11, and each core executes the process it is responsible for in a time-sharing manner. Also, in this embodiment, as described above, each time a periodic interrupt signal is input from the interrupt generating unit 12 to the arithmetic processing unit 11, the first core 51 and the second core 52 are activated and the protection control-related processes are started.

[0051] 4, when a fixed-period interrupt signal is input to the arithmetic processing unit 11, first, in the first core 51, the common processing unit 71 performs common processing, and in the second core 52, the preprocessing unit 72 starts preprocessing. At this time, the timers corresponding to the first core 51 and the second core 52 in the timer unit 54 (see FIG. 2) start timing operations.

[0052] Thereafter, in the first core 51, after the common processing by the common processing unit 71 is completed and upon input of a timer interrupt signal from the corresponding timer in the timer unit 54, the first protection control processing by the first protection control processing unit 61 is started. Meanwhile, in the second core 52, after the pre-processing by the pre-processing unit 72 is completed and upon input of a timer interrupt signal from the corresponding timer in the timer unit 54, the fourth protection control processing by the fourth protection control processing unit 64 is started.

[0053] 4, for the sake of simplicity, the example illustrates a state in which a timer interrupt signal is input immediately after the common processing and pre-processing are completed, and the first protection control processing and the fourth protection control processing are initiated. However, in reality, the time at which the common processing and pre-processing are completed differs from the time at which the timer interrupt signal is input. In this case, each core performs standby processing during the period from the time at which the common processing and pre-processing are completed until the time at which the timer interrupt signal is input.

[0054] Then, in the first core 51, after the first protection control processing is completed, the second protection control processing by the second protection control processing unit 62 and the third protection control processing by the third protection control processing unit 63 are performed consecutively in this order. That is, in the first core 51, the common processing, the first protection control processing, the second protection control processing, and the third protection control processing are performed in this order in a time-sharing manner.

[0055] On the other hand, in the second core 52, after the fourth protection control process is completed, the fifth protection control process by the fifth protection control processing unit 65 and the sixth protection control process by the sixth protection control processing unit 66 are performed consecutively in this order. That is, in the second core 52, the pre-processing, the fourth protection control process, the fifth protection control process, and the sixth protection control process are performed in this order in a time-sharing manner.

[0056] Thereafter, each processing function unit of the first core 51 and the second core 52 waits until the next fixed-period interrupt signal is input from the interrupt generation unit 12. Note that, in the example shown in Fig. 4, for the sake of simplicity, a mode is illustrated in which the next fixed-period interrupt signal is input immediately after the third protection control process and the sixth protection control process are completed. In reality, the time when the third protection control process and the sixth protection control process are completed differs from the time when the fixed-period interrupt signal is input. In such a case, each core performs standby processing during the period from the time when the third protection control process and the sixth protection control process are completed until the time when the next fixed-period interrupt signal is input.

[0057] [Flow of Various Processes Executed in the CPC] Next, the contents of various processes executed in the CPC 10 when a periodic interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11 will be specifically described.

[0058] (Monitoring and protection control processing executed by first core) First, the monitoring and protection control processing executed by the first core 51 will be described with reference to Fig. 5. Fig. 5 is a flowchart showing the procedure of the monitoring and protection control processing executed by the first core 51. The processing shown in Fig. 5 is executed on software by a CPU (not shown) of the arithmetic processing unit 11.

[0059] 5, the common processing by the common processing unit 71, the first protection control processing by the first protection control processing unit 61, the second protection control processing by the second protection control processing unit 62, and the third protection control processing by the third protection control processing unit 63, all of which are described in Fig. 4, are performed in this order. The processing shown in Fig. 5 is repeatedly executed (at a fixed cycle) every time a fixed-cycle interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11.

[0060] When a periodic interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11, the common processing unit 71 (constant monitoring unit 71a) first performs monitoring processing (S1). In this processing, the common processing unit 71 collects various status information of the CPC 10 (its own device) and the external device 30 (including multiple MUs 31 to 36) and monitors for the occurrence of abnormalities. The collected status information of the CPC 10 and the external device 30 is stored in the shared memory 13.

[0061] In the process of S1, the common processing unit 71 also performs an abnormality detection process for the external device 30. Specific details of this process will be described in detail with reference to FIG. 7 , which will be described later. Furthermore, in the process of S1, the common processing unit 71 starts a timer corresponding to the first core 51 in the timer unit 54. This starts timing a predetermined time until the start of the first protection control process (the output timing of the timer interrupt signal).

[0062] Next, the common processing unit 71 (sequence processing unit 71b) executes a specific sequence logic on software to determine whether the CPC 10 (protection and control device) is healthy (S2). In this process, the common processing unit 71 determines whether the status information of the CPC 10 (its own device) collected in the process of S1 satisfies the abnormality determination condition of the CPC 10. If the status information of the CPC 10 collected in the process of S1 satisfies the abnormality determination condition of the CPC 10, the determination result of S2 is NO, and if the status information of the CPC 10 does not satisfy the abnormality determination condition of the CPC 10, the determination result of S2 is YES.

[0063] In S2, if the common processing unit 71 determines that the CPC 10 (protection control device) is healthy (if S2 is determined as YES), the common processing unit 71 performs the process of S5 described below.

[0064] On the other hand, if the common processing unit 71 determines in S2 that the CPC 10 (protection and control device) is not healthy (if S2 returns a NO determination), the common processing unit 71 (sequence processing unit 71b) outputs an LED lighting command to the LED control processing unit 81 in the third core 53 (S3). This processing causes the LED control processing unit 81 to output a lighting control signal to the LED 15, causing the LED 15 to light up.

[0065] Next, the common processing unit 71 (sequence processing unit 71b) outputs a command to transmit the abnormality information (abnormality of the CPC 10) of the CPC 10 to the communication processing unit 82 in the third core 53 (S4). By this process, the abnormality information (abnormality of the CPC 10) of the CPC 10 is transmitted to the external device 30.

[0066] After processing S4, or if S2 is judged as YES, the common processing unit 71 (sequence processing unit 71b) writes the device abnormality judgment conditions (judgment conditions for the occurrence of an abnormality in the CPC 10 and the judgment conditions for the occurrence of an abnormality in the external device 30) to the shared memory 13 (S5).

[0067] Thereafter, the first core 51 performs a timer interrupt waiting process (S6), in which the first core 51 waits until a timer interrupt signal is input from a timer in the timer unit 54 that corresponds to the first core 51.

[0068] Then, when a timer interrupt signal is input from the timer corresponding to the first core 51, the first core 51 repeatedly executes the following processes of S7 to S10 while updating the control parameter k in the order of 1, 2, and 3. As a result, each protection control processing unit of the first core 51 performs protection control processing or relay locking for the system (circuit breaker) of the MU that is the object of protection control.

[0069] First, the kth protection control processing unit (sequence processing unit) in the first core 51 reads the device abnormality determination conditions from the shared memory 13 (S7).

[0070] Next, the kth protection control processing unit (sequence processing unit) determines whether or not an error has been detected during continuous monitoring (S8).

[0071] In the process of S8, the kth protection control processing unit executes a predetermined sequence logic in software based on the various status information of the CPC 10 and the external device 30 collected in the process of S1 and the device abnormality determination conditions read in the process of S7, and determines whether a relay lock condition is satisfied. The relay lock condition is a condition for determining whether to lock the protection control process (relay calculation) by the kth protection control processing unit (sequence processing unit). If the relay lock condition is satisfied, the determination result of S8 is a YES determination. If the relay lock condition is not satisfied, the determination result of S8 is a NO determination. In the relay lock, the kth protection control processing unit (sequence processing unit) does not perform relay calculation, but instead performs processing to stop the output of operation command signals, such as a trip command, to the system (circuit breaker) of the MU that is the protection control target.

[0072] In S8, if the kth protection control processing unit determines that no error was detected during continuous monitoring (if S8 is determined to be NO), the kth protection control processing unit (sequence processing unit) executes the kth protection control processing (relay calculation) (S9).

[0073] Specifically, in the process of S9, if the control parameter k is 1, the first protection control processing unit 61 (sequence processing unit 61b) performs the first protection control processing on the system of MU 31. If the control parameter k is 2, the second protection control processing unit 62 (sequence processing unit 62b) performs the second protection control processing on the system of MU 32. If the control parameter k is 3, the third protection control processing unit 63 (sequence processing unit 63b) performs the third protection control processing on the system of MU 33.

[0074] On the other hand, if in S8 the kth protection control processing unit determines that an error has been detected during continuous monitoring (if S8 is judged as YES), the kth protection control processing unit (sequence processing unit) executes a relay lock for the kth protection control process (S10).

[0075] Specifically, in the process of S10, if the control parameter k is 1, the first protection control processing unit 61 (sequence processing unit 61b) performs relay locking of the first protection control processing for the system of MU 31. If the control parameter k is 2, the second protection control processing unit 62 (sequence processing unit 62b) performs relay locking of the second protection control processing for the system of MU 32. Furthermore, if the control parameter k is 3, the third protection control processing unit 63 (sequence processing unit 63b) performs relay locking of the third protection control processing for the system of MU 33.

[0076] After processing S9 or S10, if the control parameter k is 1 or 2, the first core 51 adds 1 to the control parameter k and repeats the above-mentioned processing of S7 to S10, and if the control parameter k is 3, the first core 51 terminates the monitoring / protection control processing.

[0077] (Monitoring and protection control processing executed by second core) Next, the monitoring and protection control processing executed by the second core 52 will be described with reference to Fig. 6. Fig. 6 is a flowchart showing the procedure of the monitoring and protection control processing executed by the second core 52. The processing shown in Fig. 6 is executed on software by the CPU (not shown) of the calculation processing unit 11.

[0078] 6, the preprocessing by the preprocessing unit 72, the fourth protection control processing by the fourth protection control processing unit 64, the fifth protection control processing by the fifth protection control processing unit 65, and the sixth protection control processing by the sixth protection control processing unit 66, all of which are described in connection with FIG. 4, are performed in this order. The processing shown in FIG. 6 is repeatedly executed (at a fixed cycle) every time a periodic interrupt signal is input from the interrupt generating unit 12 to the arithmetic processing unit 11. Therefore, the start timing of the monitoring and protection control processing by the second core 52 shown in FIG. 6 is synchronized with that of the monitoring and protection control processing by the first core 51 shown in FIG. 5.

[0079] When a fixed-period interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11, the preprocessing unit 72 first performs preprocessing (S21). In this processing, the preprocessing unit 72 performs, for example, digital filtering on analog data received from the MUs (for example, analog information on current / voltage values ​​acquired by each MU).

[0080] Next, the second core 52 performs a timer interrupt waiting process (S22), in which the second core 52 waits until a timer interrupt signal is input from a timer in the timer unit 54 that corresponds to the second core 52.

[0081] Then, when a timer interrupt signal is input from the timer corresponding to the second core 52, the second core 52 repeatedly executes the following processes of S23 to S26 while updating the control parameter k in the order of 4, 5, and 6. As a result, each protection control processing unit of the second core 52 performs protection control processing or relay locking for the system (circuit breaker) of the MU that is the protection control target.

[0082] First, the kth protection control processing unit (sequence processing unit) in the second core 52 reads the device abnormality determination condition from the shared memory 13 (S23). Note that the device abnormality determination condition read in this process is the device abnormality determination condition written to the shared memory 13 in the process of S5 in the monitoring and protection control process (see FIG. 5 ) executed by the first core 51. That is, through this process, the kth protection control processing unit (sequence processing unit) in the second core 52 receives the device abnormality determination condition from the first core 51 by memory transfer via the shared memory 13.

[0083] Next, the kth protection control processing unit (sequence processing unit) determines whether an error has been detected in the continuous monitoring (S24). This determination process determines whether the relay lock condition is satisfied, similar to the determination process of S8 in the monitoring and protection control process (see FIG. 5) executed by the first core 51. If the relay lock condition is satisfied, the determination result of S24 is YES, and if the relay lock condition is not satisfied, the determination result of S24 is NO.

[0084] In S24, if the kth protection control processing unit determines that no error was detected during continuous monitoring (if S24 is determined to be NO), the kth protection control processing unit (sequence processing unit) executes the kth protection control processing (relay calculation) (S25).

[0085] Specifically, in the processing of S25, if the control parameter k is 4, the fourth protection control processing unit 64 (sequence processing unit 64b) performs the fourth protection control processing on the system of MU 34. If the control parameter k is 5, the fifth protection control processing unit 65 (sequence processing unit 65b) performs the fifth protection control processing on the system of MU 35. Furthermore, if the control parameter k is 6, the sixth protection control processing unit 66 (sequence processing unit 66b) performs the sixth protection control processing on the system of MU 36.

[0086] On the other hand, in S25, if the kth protection control processing unit determines that an error has been detected during continuous monitoring (if S25 is determined to be YES), the kth protection control processing unit (sequence processing unit) executes a relay lock for the kth protection control process (S26).

[0087] Specifically, in the processing of S26, if the control parameter k is 4, the fourth protection control processing unit 64 (sequence processing unit 64b) performs relay locking of the fourth protection control processing for the system of MU 34. If the control parameter k is 5, the fifth protection control processing unit 65 (sequence processing unit 65b) performs relay locking of the fifth protection control processing for the system of MU 35. Furthermore, if the control parameter k is 6, the sixth protection control processing unit 66 (sequence processing unit 66b) performs relay locking of the sixth protection control processing for the system of MU 36.

[0088] After processing S25 or S26, if the control parameter k is 4 or 5, the second core 52 adds 1 to the control parameter k and repeats the above-mentioned processing of S23 to S26, and if the control parameter k is 6, the second core 52 terminates the protection control processing.

[0089] (External Device Abnormality Detection Processing) Next, with reference to Fig. 7, an abnormality detection processing for the external device 30 (including MUs 31 to MUs 36) performed in the processing of S1 (constant monitoring processing) in the monitoring and protection control processing (see Fig. 5) by the first core 51 will be described. Fig. 7 is a flowchart showing the procedure of the abnormality detection processing for the external device 30 executed by the common processing unit 71 of the first core 51. The processing shown in Fig. 7 is executed on software by the CPU (not shown) of the arithmetic processing unit 11.

[0090] First, the common processing unit 71 (constant monitoring unit 71a) acquires frames (data) transmitted from each external device (including MU31 to MU36) included in the external device 30 (S31).

[0091] Next, the common processing unit 71 (constant monitoring unit 71 a) determines whether an abnormality has been detected in the external device 30 (S32). In this process, the common processing unit 71 determines, based on the frames (first information) from each external device acquired in the process of S31, whether there is an external device for which the information indicating health included in the frame indicates an abnormality, or whether there is an external device for which the disappearance or delay of a frame has been detected. If there is an external device for which the information indicating health included in the frame indicates an abnormality, or if there is an external device for which the disappearance or delay of a frame has been detected, the determination result in S32 is YES; otherwise, the determination result in S32 is NO.

[0092] In S32, if the common processing unit 71 determines that no abnormality has been detected in the external device 30 (if S32 is determined to be NO), the common processing unit 71 ends the abnormality detection process for the external device 30.

[0093] On the other hand, if the common processing unit 71 determines in S32 that an abnormality has been detected in the external device 30 (if S32 is a YES determination), the common processing unit 71 (constant monitoring unit 71 a) determines whether or not an abnormality has been detected in multiple external devices (S33). In this determination process, if there are multiple external devices for which the health-indicating information included in the frame indicates an abnormality and / or multiple external devices for which a frame has been lost or delayed, the determination result in S33 will be a YES determination, and otherwise the determination result in S33 will be a NO determination.

[0094] In S33, if the common processing unit 71 determines that no abnormality has been detected in multiple external devices (if S33 is judged as NO), the common processing unit 71 (constant monitoring unit 71a) performs the processing of S36 described below.

[0095] On the other hand, if the common processing unit 71 determines in S33 that abnormalities have been detected in multiple external devices (if S33 is a YES determination), the common processing unit 71 (continuous monitoring unit 71a) determines whether a communication abnormality has been detected in the CPC 10 (protection control device) (S34). This determination process is performed based on various status information (second information) of the CPC 10 (its own device) collected during the processing of S1 (constant monitoring process) in the monitoring and protection control process (see FIG. 5) by the first core 51. If the collected various status information of the CPC 10 includes status information indicating a communication abnormality in the connection (communication) port of the CPC 10 with the process bus 20, the determination result in S34 is a YES determination; otherwise, the determination result in S34 is a NO determination. Note that, for example, a state in which the communication port of the CPC 10 with the process bus 20 is linked down corresponds to a state in which a communication abnormality has occurred.

[0096] If the common processing unit 71 determines in S34 that a communication abnormality in the CPC 10 has been detected (YES in S34), the common processing unit 71 (constant monitoring unit 71a) determines that an abnormality has occurred in the process bus 20 (communication transmission path) (S35). After the processing of S35, the common processing unit 71 terminates the abnormality detection processing for the external device 30.

[0097] On the other hand, if the common processing unit 71 determines in S34 that a communication abnormality in the CPC 10 has not been detected (if the determination in S34 is NO), or if the determination in S33 is NO, the common processing unit 71 determines that the detected abnormality is an abnormality in the external device (S36). After processing in S36, the common processing unit 71 terminates the abnormality detection process for the external device 30.

[0098] [Comparative Example] Here, in order to clarify the various effects obtained by the protection and control system 1, CPC 10 (protection and control device), and protection and control method of the present embodiment described above, a configuration example (comparative example) of a protection and control device in which a CPC is configured by aggregating multiple IEDs will be described. Note that the configuration of the protection and control system of the comparative example is similar to the configuration of the protection and control system 1 of the present embodiment shown in Figure 1. Therefore, in the following description of the comparative example, components similar to the configuration of the protection and control system 1 of the present embodiment will be described with the same reference numerals.

[0099] Fig. 8 is a functional block diagram of a calculation processing unit 100 included in an IED applied in a protection and control system of a comparative example. As shown in Fig. 8, the calculation processing unit 100 of the comparative example functionally includes a protection and control processing unit 101, an LED control processing unit 102, and a communication processing unit 103. The protection and control processing unit 101 is functionally connected to the LED control processing unit 102 and the communication processing unit 103. The protection and control processing unit 101 also includes a relay processing unit 101a, a constant monitoring unit 101b, and a sequence processing unit 101c.

[0100] The relay processing unit 101a executes calculations for the protection control function on software. In an IED used for protecting power facilities, the relay processing unit 101a is equipped with calculation logic for realizing the protection function. The continuous monitoring unit 101b monitors abnormalities in the device itself and the health of external devices to be protected.

[0101] The sequence processing unit 101c acquires the calculation results from the relay processing unit 101a and the monitoring information from the constant monitoring unit 101b, and outputs predetermined operation commands to the LED control processing unit 102 and the communication processing unit 103, respectively, based on predetermined conditions.

[0102] For example, the sequence processing unit 101c can output an LED lighting command as an operation command to the LED control processing unit 102. Furthermore, for example, the sequence processing unit 101c can output information such as the abnormality determination result of its own device and the abnormality determination result of the system of the MU that is the target of protection control to the communication processing unit 103. Furthermore, for example, the sequence processing unit 101c can output a shutdown command (trip command) as an operation command to the system of the MU that is the target of protection control via the communication processing unit 103.

[0103] The LED control processing unit 102 controls the on / off operation of the LED 15 based on an operation command from the sequence processing unit 101c. The communication processing unit 103 outputs information such as the operation command from the sequence processing unit 101c to the process bus 20. The communication processing unit 103 also receives various types of status information (frames) from the external device 30 (see FIG. 2) via the process bus 20 in accordance with the SV or GOOSE method.

[0104] Fig. 9 is a functional block diagram of a CPC (comparative example) in which a plurality of IEDs (configuration of the arithmetic processing unit 100) shown in Fig. 8 are aggregated to form a CPC. Note that, in Fig. 9, for the sake of simplicity, the network interface unit 14 and the LED 15 included in the CPC 200 are not shown.

[0105] In the comparative example CPC200 (protection control device), as shown in Figure 9, the protection control processing units (first protection control processing unit 201 to sixth protection control processing unit 206) included in the calculation processing unit of each IED are each configured separately, and the LED control processing unit 210 and communication processing unit 211 included in the calculation processing unit of each IED are shared.

[0106] Although not shown in Fig. 9, in the comparative example, the number of MUs to be protected and controlled is six (MU31 to MU36), similar to the configuration shown in Fig. 1. The first protection control processing unit 201 to the sixth protection control processing unit 206 are functional units that protect and control the systems of MU31 to MU36, respectively, and each protection control processing unit has a relay processing unit, a constant monitoring unit, and a sequence processing unit.

[0107] [Various Effects] In the CPC 200 (protection control device) of the comparative example described above, a protection control processing unit is provided for each system of MUs that are the object of protection control, and each protection control processing unit individually performs continuous monitoring processing of its own device (CPC 200) and the external device 30. In other words, in the comparative example, each protection control processing unit performs the same continuous monitoring processing, resulting in unnecessary processing.

[0108] Furthermore, if the continuous monitoring process detects an abnormality in the device itself (CPC) and / or an external device, it is necessary to output information related to the abnormality determination (for example, the above-mentioned operation command) to the LED control processing unit and the communication processing unit to notify the occurrence of the abnormality. In this case, if the continuous monitoring process is performed separately for each protection control processing unit, as in the comparative example, abnormality determination results are obtained for each protection control processing unit. In this case, it is necessary to ensure consistency between the multiple abnormality determination results, which makes information management cumbersome.

[0109] In contrast, in the CPC 10 of this embodiment, as described above, a protection control processing unit is provided for each system of MUs (external devices) that are the protection control targets, but a continuous monitoring unit 71a that performs continuous monitoring processing in common for multiple protection control processing units is provided. Therefore, in this embodiment, it is possible to prevent the occurrence of unnecessary processing. Furthermore, with the above configuration of this embodiment, only one abnormality determination result is obtained, which eliminates the need to ensure consistency between multiple abnormality determination results as in the comparative example, and prevents information management in the CPC 10 from becoming complicated.

[0110] In other words, as in the CPC10 of this embodiment, by providing a protection control processing unit for each system of MUs (external devices) to be protected and controlled, and by providing a common processing unit 71 (constant monitoring unit 71a) that performs constant monitoring processing for multiple protection control processing units in common, information management is simplified and an increase in processing load can be suppressed.

[0111] Furthermore, as described above, the CPC 10 of this embodiment employs a multi-core processor to consolidate the protection and control functions of multiple IEDs. In this case, in order for the CPC 10 to execute protection and control processing for the external device 30, it is necessary for the multiple cores to share the continuous monitoring results obtained by the common processing unit 71 (e.g., status information of the CPC 10 itself and the external device 30, device abnormality conditions, etc.). In contrast, in this embodiment, the continuous monitoring results obtained by the common processing unit 71 are stored in the shared memory 13 (see FIG. 2 ), and the continuous monitoring results can be shared between the multiple cores by passing them over the shared memory 13.

[0112] Therefore, in this embodiment, even if continuous monitoring processing is not performed separately in the protection control processing function unit of each core, appropriate protection control processing or relay lock can be executed in each core by sharing continuous monitoring results between multiple cores by memory transfer via the shared memory 13. Furthermore, when a method of sharing continuous monitoring results by memory transfer via the shared memory 13 is adopted as in this embodiment, the sharing mode and information management of continuous monitoring results are also simplified.

[0113] Furthermore, in a multi-core processor, if an abnormality occurs in a specific core, the other cores are usually unable to recognize the abnormality. However, to prevent the risk of malfunction as a protection control device, it is necessary to lock functions associated with the core in which the abnormality occurred. In contrast, in this embodiment, the common processing unit 71 (constant monitoring unit 71a) provided in the first core 51 in the CPC 10 can also determine the health of the device itself (CPC 10) based on collected status information. Therefore, in this embodiment, if an abnormality occurs in a specific core, it can also determine whether to continue or stop processing in other cores. As a result, unnecessary responses can be prevented even in a CPC 10 (protection control device) employing a multi-core processor, enabling safe operation.

[0114] In the CPC 10 of this embodiment, as described above, the processing by the multiple protection and control processing units, the processing by the common processing unit (continuous monitoring processing), and the preprocessing by the preprocessing unit are shared between the first core 51 and the second core 52, i.e., the cores are divided and executed separately (see Figures 3 and 4). In this embodiment, each core periodically starts processing related to the protection and control processing. Furthermore, the first core 51 individually executes the common processing and multiple protection and control processing by time sharing, while the second core 52 individually executes the preprocessing and multiple protection and control processing by time sharing (see Figure 4). By adopting such a processing mode utilizing core division and time sharing, the corresponding core can be exclusively assigned to each protection and control processing during the execution of that protection and control processing. Therefore, in this embodiment, each protection and control processing, common processing (continuous monitoring processing), and preprocessing can be executed while reliably satisfying the design processing time requirements necessary for realizing a protection and control system. Furthermore, in this case, the CPC 10 can execute excellent software processing.

[0115] In this embodiment, in the monitoring and protection control processing of each core (see FIGS. 5 and 6 ), the protection control processing or the relay lock of the protection control processing is executed after the process of determining the continuous monitoring results (S8 in FIG. 5 and S24 in FIG. 6 : the process of determining whether an error is detected). In this case, the relay lock of the protection control processing can be executed based on the information on the device abnormality detected by the common processing unit 71. Note that if the order of the above processing is reversed, the relay lock in the event of a device abnormality will be delayed by one fixed cycle, which poses a risk of relay malfunction. Therefore, if the process of determining the continuous monitoring results is executed before the protection control processing or the relay lock of the protection control processing, as in this embodiment, the risk of relay malfunction can be reduced.

[0116] Furthermore, in this embodiment, as described above, the common processing unit 71 (continuous monitoring unit 71a) monitors the health of the device itself (CPC 10) and also monitors the status of the external device 30 via communication. The external device 30 abnormality detection process (see FIG. 7) executed by the common processing unit 71 can detect abnormalities in the process bus 20 by referencing the status of the communication port of the CPC 10 (the device itself) as well as abnormalities in the external device. In this way, abnormality detection is performed using not only the results of continuous monitoring of the external device 30 but also the results of continuous monitoring of the device itself (CPC 10), thereby improving the accuracy of estimating the faulty part. Note that abnormality detection may be performed using only either the results of continuous monitoring of the external device 30 or the results of continuous monitoring of the device itself (CPC 10).

[0117] [Various Modifications] The protection and control system 1, the protection and control device (CPC 10), and the protection and control method according to one embodiment of the present invention have been described above, but the present invention is not limited to the above embodiment. The configuration of the present invention can take on various other modified configurations as long as they do not deviate from the gist of the present invention described in the claims.

[0118] In the above embodiment, an example has been described in which one arithmetic processing unit 11 (CPC 10) is configured as a multi-core processor having three cores, but the present invention is not limited to this. The arithmetic processing unit 11 (CPC 10) may be configured as a multi-processor having four or more cores, or as a multi-core processor having two cores. Furthermore, the arithmetic processing unit 11 (CPC 10) may be configured as a multi-CPU instead of a multi-core processor.

[0119] In the above embodiment, an example has been described in which the results of the continuous monitoring process executed by the common processing unit 71 are shared among multiple protection control processing units (protection control processes), but the present invention is not limited to this. For example, the shared processes may include processes other than the continuous monitoring process, or the shared processes may be processes other than the continuous monitoring process. Any process can be used as a shared process as long as the results of the shared process can be shared by at least two protection control processing units (protection control processes). For example, the shared process may include filtering of analog data or displaying monitoring information on a display panel (not shown). Note that the former process is performed by the preprocessing unit 72, so in this case, the preprocessing can also be a common process.

[0120] In the above embodiment, an example has been described in which the results of the continuous monitoring process executed by the common processing unit 71 are shared among all of the protection control processes (first to sixth protection control processes) executed by the calculation processing unit 11 (CPC10), but the present invention is not limited to this. The results of the continuous monitoring process executed by the common processing unit 71 may be configured to be shared among, for example, at least two protection control processes.

[0121] In the above embodiment, an example has been described in which information is exchanged (transferred) between a plurality of protection control processing units by memory transfer via the shared memory 13, but the present invention is not limited to this. For example, information may be exchanged between a plurality of protection control processing units by communication between cores or interrupt operations between cores.

[0122] In the above embodiment, an example has been described in which the protection control process is started based on the input of a timer interrupt signal from a timer provided in each core, but the present invention is not limited to this. Any method can be adopted as long as it can start the protection control process at a predetermined timing after the common process or preprocessing.

[0123] The above-described embodiments provide detailed and specific descriptions of the device configuration to facilitate understanding of the present invention, and are not necessarily limited to devices that include all of the described components. The position, size, shape, and range of each component shown in the drawings may not represent the actual position, size, shape, and range in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the position, size, shape, and range disclosed in the drawings. Furthermore, some of the components of the above-described embodiments may be added, deleted, or replaced with other components. Furthermore, the illustrated control lines and information lines are those considered necessary for explanation, and do not necessarily represent all control lines and information lines in the actual product. In reality, it can be assumed that almost all components are interconnected.

[0124] In the above embodiment, the processing functions of the various functional blocks included in the arithmetic processing unit 11 (CPC 10) are implemented by software. However, the present invention is not limited to this. Some or all of these functional blocks may be configured by hardware. Furthermore, information such as programs, tables, and files that implement each function may be stored in a memory, a recording device such as a hard disk or SSD (Solid State Drive), or a recording medium such as an IC card, SD card, or DVD.

[0125] REFERENCE SIGNS LIST 1...protection and control system, 10...protection and control device (CPC), 11...arithmetic processing unit, 12...interrupt generation unit, 13...shared memory, 14...network interface unit, 15...LED, 20...process bus, 30...external device, 31 to 36...MU, 51...first core, 52...second core, 53...third core, 54...timer unit, 61...first protection and control processing unit, 62...second protection and control processing unit, 63...third protection and control processing unit, 64...fourth protection and control processing unit, 65...fifth protection and control processing unit, 66...sixth protection and control processing unit, 61a to 66a...relay processing unit, 61b to 66b...sequence processing unit, 71...common processing unit, 71a...constant monitoring unit, 71b...sequence processing unit, 72...preprocessing unit, 81...LED control processing unit, 82...communication processing unit

Claims

1. A protection and control device that has a communication unit that sends and receives information to and from a group of devices arranged in a power system and performs protection and control processing using said information, and that has a calculation unit that is connected to said communication unit and is capable of individually executing a common process and multiple protection and control processes, shares the result of said common process with at least two of said multiple protection and control processes, and is capable of executing each of said at least two protection and control processes based on the result of said common process.

2. A protection and control device according to claim 1, wherein the common processing includes monitoring processing of the operating status of devices included in the device group and / or the operating status of the protection and control device itself.

3. The protection and control device according to claim 2, wherein the calculation unit executes the common process before the plurality of protection and control processes.

4. A protection and control device as described in claim 1, further comprising a memory unit that stores the results of the common processing, wherein the at least two protection and control processes share the results of the common processing via the memory unit.

5. A protection control device as described in claim 2, wherein the calculation unit is capable of executing a process to stop output of an operation command signal based on the result of the monitoring process in each of the at least two protection control processes.

6. A protection control device as described in claim 2, further comprising an alarm unit that alarms information regarding the operating status of its own protection control device, wherein the calculation unit is capable of causing the alarm unit to alarm information regarding the occurrence of an abnormality in its own protection control device based on the results of the common processing.

7. The protection control device described in claim 2, wherein the calculation unit, in the common processing, acquires first information regarding the operating status of the devices included in the device group via the communication unit, and acquires second information regarding the operating status of its own protection control device, and is capable of detecting abnormalities in the devices included in the device group based on the first information and the second information, and is also capable of detecting abnormalities in the communication transmission path between the device group and the communication unit.

8. The protection and control device according to claim 1, wherein the calculation unit is configured as a multi-core processor, and the common processing and the plurality of protection and control processing are shared and executed by the plurality of cores included in the multi-core processor, and each of the plurality of cores executes the processing for which it is responsible in a time-sharing manner.

9. A protection control device as described in claim 1, wherein the common processing and the counting operation of a timer built into the calculation unit are started based on an interrupt signal input from the outside to the calculation unit at a constant period, and a predetermined protection control process among the multiple protection control processes is started based on an interrupt signal output from the timer.

10. A protection control system comprising: a plurality of merging units; a communication unit that transmits and receives information to at least one of the plurality of merging units; and a calculation unit that is connected to the communication unit and is capable of individually executing common processing and a plurality of protection control processes, shares the result of the common processing with at least two of the plurality of protection control processes, and is capable of executing each of the at least two protection control processes based on the result of the common processing; and a network that is capable of communication between the merging units and the protection control device, wherein the protection control device is capable of individually identifying margin units that communicate via the network, and when loss or delay of the information transmitted from the margin unit is detected, detects an abnormal margin unit based on identification information included in the information.

11. A protection control method executed by a protection control device having a communication unit that transmits and receives information to and from a group of devices arranged in a power system, and a calculation unit connected to the communication unit, the protection control method including: the calculation unit individually executing a common process and multiple protection control processes; and the calculation unit sharing the result of the common process with at least two of the multiple protection control processes, and executing each of the at least two protection control processes based on the result of the common process.

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