Display panel and display device

Abstract

The present application discloses a display panel and a display device. The display panel comprises an anode layer, a first light-emitting functional layer, an N-type charge generation layer, a light-emitting composite layer, and a cathode layer. The light-emitting composite layer comprises a plurality of stacked functional layers. The orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting composite layer on the cathode layer.

Description

Display panel and display device TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] An organic light emitting diode (OLED) display panel has the characteristics of low power consumption, fast response speed, wide viewing angle, etc., and has a wide application prospect.

[0003] At present, in order to improve the efficiency and service life of the organic light emitting diode display panel, a plurality of light emitting layers are stacked together through a charge generation layer. Compared with a display panel having a single-layer light emitting device, the light emitting efficiency and service life can be greatly improved.

[0004] However, the charge generation layer includes a stacked N-type charge generation layer and a P-type charge generation layer, and the N-type charge generation layer is formed by doping an N-type doping material in an electron transport material. When the cathode layer in the organic light emitting diode display panel contacts the doped part in the N-type charge generation layer, the cathode layer and the doped part in the N-type charge generation layer are easily short-circuited, thereby causing the light emitting unit between the cathode layer and the N-type charge generation layer to be short-circuited, and affecting the display effect of the display panel. SUMMARY

[0005] The embodiments of the present application provide a display panel and a display device, which can reduce the probability of short circuit between the N-type charge generation layer and the cathode layer, and improve the stability and display effect of the display panel.

[0006] The embodiments of the present application provide a display panel, which comprises:

[0007] an anode layer;

[0008] a first light emitting functional layer disposed on one side of the anode layer;

[0009] an N-type charge generation layer disposed on a side of the first light emitting functional layer away from the anode layer;

[0010] a light emitting composite layer disposed on a side of the N-type charge generation layer away from the first light emitting functional layer;

[0011] a cathode layer disposed on a side of the light emitting composite layer away from the N-type charge generation layer;

[0012] The light emitting composite layer comprises a plurality of functional layers stacked together, and the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage range of the orthographic projection of at least one functional layer in the light emitting composite layer on the cathode layer.

[0013] According to the above purpose of the present application, the display device provided by the embodiments of the present application comprises a display panel, wherein the display panel comprises:

[0014] an anode layer;

[0015] a first light-emitting functional layer arranged on one side of the anode layer;

[0016] an N-type charge generation layer arranged on a side of the first light-emitting functional layer away from the anode layer;

[0017] a light-emitting composite layer arranged on a side of the N-type charge generation layer away from the first light-emitting functional layer;

[0018] a cathode layer arranged on a side of the light-emitting composite layer away from the N-type charge generation layer;

[0019] wherein the light-emitting composite layer comprises a plurality of functional layers arranged in a stack, and a normal projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a normal projection of at least one of the functional layers in the light-emitting composite layer on the cathode layer. BRIEF DESCRIPTION OF DRAWINGS

[0020] The technical solutions and other beneficial effects of the present application will become apparent from the following detailed description of the specific embodiments of the present application, with reference to the accompanying drawings.

[0021] FIG. 1 is a structural schematic diagram of a display panel according to an embodiment;

[0022] FIG. 2 is a first structural schematic diagram of a display panel according to an embodiment of the present application;

[0023] FIG. 3 is a second structural schematic diagram of a display panel according to an embodiment of the present application;

[0024] FIG. 4 is a third structural schematic diagram of a display panel according to an embodiment of the present application;

[0025] FIG. 5 is a schematic diagram of a coverage range of a light-emitting composite layer in a display panel according to an embodiment of the present application;

[0026] FIG. 6 is a schematic diagram of another coverage range of a light-emitting composite layer in a display panel according to an embodiment of the present application;

[0027] FIG. 7 is a schematic diagram of a planar distribution structure of a display panel according to an embodiment of the present application;

[0028] FIG. 8 is a flowchart of a manufacturing method of a display panel according to an embodiment of the present application. Embodiments of the present application

[0029] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments of the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0030] The following disclosure provides many different embodiments, or examples, for implementing different structures of the present application. For the purpose of simplicity and clarity, the descriptions of the specific examples in the following are described. They are only examples and are not intended to limit the present application. Furthermore, the present application can repeatedly refer to the numbers and / or letters in different examples, and the repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but a person of ordinary skill in the art can realize the application of other processes and / or the use of other materials.

[0031] Please refer to FIG. 1, the display panel of the tandem structure generally comprises an anode 1, a first light emitting unit 2 disposed on the anode 1, an N-type charge generation layer 3 disposed on the first light emitting unit 2, a second light emitting unit 4 disposed on the N-type charge generation layer 3, and a cathode layer 5 disposed on the second light emitting unit 4; wherein, when the N-type charge generation layer 3 and the cathode layer 5 are in contact, especially when the N-type charge generation layer 3 is doped in contact, it is easy to cause the short circuit between the cathode layer 5 and the doped part in the N-type charge generation layer 3, and then the light emitting unit between the cathode layer 5 and the N-type charge generation layer 3 is short-circuited, that is, the second light emitting unit 4 is short-circuited, which directly reduces the starting voltage by about 50%, seriously affecting the stability and display uniformity of the display panel, for example, it is easy to appear the phenomenon of light leakage under L0 gray scale, and then affect the display effect of the display panel.

[0032] Please refer to FIG. 2, the present application provides a display panel, which comprises an anode layer 10, a first light emitting functional layer 20, an N-type charge generation layer 30, a light emitting composite layer 60 and a cathode layer 50.

[0033] Wherein, the first light emitting functional layer 20 is disposed on one side of the anode layer 10; the N-type charge generation layer 30 is disposed on the side of the first light emitting functional layer 20 away from the anode layer 10; the light emitting composite layer 60 is disposed on the side of the N-type charge generation layer 30 away from the first light emitting functional layer 20; and the cathode layer 50 is disposed on the side of the light emitting composite layer 60 away from the N-type charge generation layer 30.

[0034] Further, the light-emitting composite layer 60 comprises a plurality of functional layers arranged in a stack, and a positive projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed a coverage range of a positive projection of at least one of the functional layers in the light-emitting composite layer 60 on the cathode layer 50.

[0035] In the implementation process, the positive projection of the N-type charge generation layer 30 on the cathode layer 50 is arranged to not exceed the coverage range of the positive projection of at least one of the functional layers in the light-emitting composite layer 60 on the cathode layer 50, so as to reduce the probability of short circuit between the N-type charge generation layer 30 and the cathode layer 50, reduce the probability of short circuit of the light-emitting composite layer 60 between the cathode layer 50 and the N-type charge generation layer 30, improve the display uniformity and stability of the display panel, and improve the display effect of the display panel.

[0036] In an embodiment of the present application, the N-type charge generation layer is distributed with a doped material and an intrinsic material, and a distribution area of the doped material in the N-type charge generation layer is the same as a distribution area of the intrinsic material in the N-type charge generation layer.

[0037] In an embodiment of the present application, an edge of the N-type charge generation layer is inwardly recessed toward a side close to a center of the N-type charge generation layer relative to an edge of at least one of the functional layers in the light-emitting composite layer.

[0038] In an embodiment of the present application, a distance by which the edge of the N-type charge generation layer is inwardly recessed toward the side close to the center of the N-type charge generation layer relative to the edge of at least one of the functional layers in the light-emitting composite layer is greater than or equal to 30 microns.

[0039] In an embodiment of the present application, at least one of the functional layers in the light-emitting composite layer covers an upper surface of the N-type charge generation layer away from the first light-emitting functional layer and a plurality of side surfaces of the N-type charge generation layer connected to the upper surface.

[0040] In an embodiment of the present application, the plurality of functional layers comprises a P-type charge generation layer arranged between the N-type charge generation layer and the cathode layer and a second light-emitting functional layer arranged between the P-type charge generation layer and the cathode layer.

[0041] A positive projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a positive projection of the P-type charge generation layer on the cathode layer, and / or a positive projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a positive projection of the second light-emitting functional layer on the cathode layer.

[0042] In an embodiment of the present application, the first light-emitting functional layer comprises a first light-emitting layer and a first light-emitting auxiliary layer arranged in a stack, and the first light-emitting auxiliary layer comprises at least one of a first electron injection layer, a first electron transport layer, a first hole injection layer and a first hole transport layer;

[0043] The second light-emitting functional layer comprises a second light-emitting layer and a second light-emitting auxiliary layer arranged in a stack, and the second light-emitting auxiliary layer comprises at least one of a second electron injection layer, a second electron transport layer, a second hole injection layer and a second hole transport layer;

[0044] The N-type charge generation layer is arranged in a stack with the P-type charge generation layer and the second light-emitting auxiliary layer.

[0045] In an embodiment of the present application, at least one of the functional layers in the light-emitting recombination layer is arranged between the N-type charge generation layer and the cathode layer.

[0046] In an embodiment of the present application, the display panel comprises a display area and a non-display area adjacent to the display area, the non-display area comprises a binding area on one side of the display area, the display panel comprises a substrate and a VDD signal terminal arranged on the substrate and between the binding area and the display area, and the anode layer is electrically connected to the VDD signal terminal.

[0047] The N-type charge generation layer is arranged in a stack with the P-type charge generation layer and the second light-emitting auxiliary layer.

[0048] Specifically, in some embodiments, the display panel can comprise a substrate, a thin film transistor array layer arranged on the substrate, a light-emitting device layer arranged on a side of the thin film transistor array layer away from the substrate, and an encapsulation layer arranged on a side of the light-emitting device layer away from the thin film transistor array layer.

[0049] It should be noted that the light-emitting device layer comprises the anode layer 10, the first light-emitting functional layer 20, the N-type charge generation layer 30, the light-emitting recombination layer 60 and the cathode layer 50 as described in the above embodiments, wherein the anode layer 10 comprises a plurality of anodes, and each anode can be connected to a thin film transistor in the thin film transistor array layer; further, the encapsulation layer can cover a side of the cathode layer 50 away from the light-emitting recombination layer 60.

[0050] In some embodiments, the first light-emitting functional layer 20 comprises the first light-emitting layer 21 and a first light-emitting auxiliary layer which are stacked, and the first light-emitting auxiliary layer can comprise at least one of a first hole layer 22 and a first electron layer 23.

[0051] The light-emitting composite layer 60 comprises a plurality of functional layers which are stacked, and the plurality of functional layers can comprise a P-type charge generation layer 61 between the N-type charge generation layer 30 and the cathode layer 50, and a second light-emitting functional layer 40 between the P-type charge generation layer 61 and the cathode layer 50.

[0052] The second light-emitting functional layer 40 comprises a second light-emitting layer 41 and a second light-emitting auxiliary layer which are stacked, and the second light-emitting auxiliary layer can comprise at least one of a second hole layer 42 and a second electron layer 43.

[0053] In some embodiments, as shown in FIGS. 3 and 4, the first hole layer 22 can comprise a first hole injection layer 221 and a first hole transport layer 222, and the first electron layer 23 can comprise a first electron injection layer 231 and a first electron transport layer 232; the second hole layer 42 can comprise a second hole injection layer 421 and a second hole transport layer 422, and the second electron layer 43 can comprise a second electron injection layer 431 and a second electron transport layer 432.

[0054] As described above, the first light-emitting auxiliary layer can comprise at least one of the first hole injection layer 221, the first hole transport layer 222, the first electron injection layer 231 and the first electron transport layer 232; and the second light-emitting auxiliary layer can comprise at least one of the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431 and the second electron transport layer 432.

[0055] In some embodiments, as shown in FIG. 4, the first light-emitting functional layer 20 comprises the first hole injection layer 221, the first hole transport layer 222, the first light-emitting layer 21, the first electron injection layer 231 and the first electron transport layer 232 which are sequentially stacked on the anode layer 10; and the second light-emitting functional layer 40 comprises the second hole injection layer 421, the second hole transport layer 422, the second light-emitting layer 41, the second electron injection layer 431 and the second electron transport layer 432 which are sequentially stacked on the P-type charge generation layer 61.

[0056] In some embodiments, the P-type charge generation layer 61 is between the N-type charge generation layer 30 and the second hole injection layer 421; and the material of the P-type charge generation layer 61 comprises a hole transport material and a P-type doping material distributed in the hole transport material.

[0057] In some embodiments, the N-type charge generation layer 30 is distributed with intrinsic material and doped material; further, the intrinsic material includes electron transport material, and the doped material includes metal material, for example, the metal material can include at least one of Yb and Li. It should be noted that since the doped material is metal material, and the metal material has conductivity, when the N-type charge generation layer 30 is in contact with the cathode layer 50, it is easy to cause the cathode layer 50 and the N-type charge generation layer 30 to be short-circuited, thereby causing the second light-emitting functional layer 40 to be short-circuited, directly reducing the turn-on voltage by about 50%, seriously affecting the stability and display uniformity of the display panel, and further affecting the display effect of the display panel.

[0058] In some embodiments, the distribution area of the doped material in the N-type charge generation layer 30 is the same as the distribution area of the intrinsic material in the N-type charge generation layer 30, that is, the N-type charge generation layer 30 is formed by overall doping. Specifically, in the process, the same mask plate or mask plate with the same evaporation opening area can be used to evaporate the intrinsic material and the doped material, so that the evaporation areas of the intrinsic material and the doped material are the same, and the evaporation areas are overlapped.

[0059] As described above, in the embodiments of the present application, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting recombination layer 60 on the cathode layer 50, that is, the embodiments of the present application limit the boundary of the N-type charge generation layer 30 and the boundary of the light-emitting recombination layer 60, so that the boundary of the N-type charge generation layer 30 does not exceed the boundary of the light-emitting recombination layer 60, thereby effectively reducing the probability of short-circuiting between the N-type charge generation layer 30 and the cathode layer 50, reducing the probability of short-circuiting of the second light-emitting functional layer 40, improving the display uniformity of the display panel, improving the phenomenon of L0 gray scale light leakage, and improving the display effect and stability of the display panel.

[0060] It should be noted that since the light-emitting recombination layer 60 includes a plurality of functional layers, the boundary of the N-type charge generation layer 30 does not exceed the boundary of at least one functional layer in the light-emitting recombination layer 60, that is, it can block the N-type charge generation layer 30 and the cathode layer 50, effectively reducing the probability of short-circuiting between the N-type charge generation layer 30 and the cathode layer 50, reducing the probability of short-circuiting of the second light-emitting functional layer 40, improving the display uniformity of the display panel, improving the phenomenon of L0 gray scale light leakage, and improving the display effect and stability of the display panel.

[0061] In some embodiments, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of the P-type charge generation layer 61 on the cathode layer 50, and / or the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of the second light-emitting auxiliary layer on the cathode layer 50.

[0062] In some embodiments, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of the P-type charge generation layer 61 on the cathode layer 50, and / or the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of the second light-emitting auxiliary layer on the cathode layer 50.

[0063] In some embodiments, when the second light-emitting auxiliary layer comprises the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431, and the second electron transport layer 432, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of at least one of the orthographic projection of the P-type charge generation layer 61 on the cathode layer 50, the orthographic projection of the second hole injection layer 421 on the cathode layer 50, the orthographic projection of the second hole transport layer 422 on the cathode layer 50, the orthographic projection of the second electron injection layer 431 on the cathode layer 50, and the orthographic projection of the second electron transport layer 432 on the cathode layer 50.

[0064] Further, referring to FIG. 5, in some embodiments, the edge of the N-type charge generation layer 30 is inwardly recessed relative to the edge of at least one functional layer in the light-emitting recombination layer 60 toward the side close to the center of the N-type charge generation layer 30; thereby further reducing the probability of contact between the side surface of the N-type charge generation layer 30 and the cathode layer 50.

[0065] It can be understood that the edge of the N-type charge generation layer 30 can be inwardly recessed relative to the edge of at least one functional layer in the light-emitting recombination layer 60 toward the side close to the center of the N-type charge generation layer 30, which can all reduce the probability of contact between the side surface of the N-type charge generation layer 30 and the cathode layer 50.

[0066] In some embodiments, the edge of the N-type charge generation layer 30 can be inwardly recessed relative to at least one of the P-type charge generation layer 61 and the second light-emitting auxiliary layer in the cathode layer 50 toward the side close to the center of the N-type charge generation layer 30.

[0067] In some embodiments, when the second light-emitting auxiliary layer comprises the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431, and the second electron transport layer 432, the edge of the N-type charge generation layer 30 can be inwardly retracted toward the side close to the center of the N-type charge generation layer 30 relative to at least one of the P-type charge generation layer 61, the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431, and the second electron transport layer 432.

[0068] Further, in some embodiments, the distance L by which the edge of the N-type charge generation layer 30 is inwardly retracted toward the side close to the center of the N-type charge generation layer 30 relative to the edge of at least one functional layer in the light-emitting recombination layer 60 is greater than or equal to 30 microns, for example, the distance by which the edge of the N-type charge generation layer 30 is inwardly retracted can be 30 microns, 40 microns, 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns, 140 microns, or 150 microns.

[0069] In some embodiments, referring to FIG. 6, at least one functional layer in the light-emitting recombination layer 60 covers the upper surface 301 of the N-type charge generation layer 30 away from the first light-emitting functional layer 20 and the plurality of side surfaces 302 of the N-type charge generation layer 30 connected to the upper surface 301; that is, at least one functional layer in the light-emitting recombination layer 60 wraps the N-type charge generation layer 30.

[0070] In some embodiments, at least one functional layer in the light-emitting recombination layer 60 is arranged between the N-type charge generation layer 30 and the cathode layer 50, and at least one functional layer in the light-emitting recombination layer 60 is arranged between the N-type charge generation layer 30 and the cathode layer 50, thereby further reducing the probability of contact between the N-type charge generation layer 30 and the cathode layer 50.

[0071] In some embodiments, at least one of the P-type charge generation layer 61 and the second light-emitting auxiliary layer in the cathode layer 50 is arranged between the N-type charge generation layer 30 and the cathode layer 50.

[0072] In some embodiments, when the second light-emitting auxiliary layer comprises the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431, and the second electron transport layer 432, at least one of the P-type charge generation layer 61, the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431, and the second electron transport layer 432 is arranged between the N-type charge generation layer 30 and the cathode layer 50.

[0073] In some embodiments, please refer to FIG. 2 and FIG. 7, the display panel comprises a display area 101 and a non-display area 102 adjacent to the display area 101, the non-display area 102 comprises a binding area 1021 on one side of the display area 101, the display panel comprises a substrate and a VDD signal terminal 11 disposed on the substrate and located between the binding area 1021 and the display area 101, and the anode layer 10 is electrically connected with the VDD signal terminal 11.

[0074] The N-type charge generation layer 30 is arranged at a position spaced from the VDD signal terminal 11 on the substrate, that is, the coverage range of the N-type charge generation layer 30 does not extend to the position of the VDD signal terminal 11, so that the N-type charge generation layer 30 does not short with the anode layer 10.

[0075] Further, in some embodiments, the cathode layer 50 covers the display area 101 and extends out of the display area 101, the cathode layer 50 is connected with a VSS signal terminal (not shown in the figure) in the non-display area 102, wherein the VSS signal terminal can be distributed on the periphery of the display area 101 and can be located in at least other regions of the non-display area 102 except the side provided with the binding area 1021, and the N-type charge generation layer 30 also covers the display area 101 and extends into the non-display area 102, and on the periphery of the display area 101, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 is located in the coverage range of the orthographic projection of the light-emitting composite layer 60 on the cathode layer 50.

[0076] As described above, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 is arranged not to exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting composite layer 60 on the cathode layer 50, so that the probability of short circuit between the N-type charge generation layer 30 and the cathode layer 50 can be reduced, the probability of short circuit of the light-emitting composite layer 60 between the cathode layer 50 and the N-type charge generation layer 30 can be reduced, the display uniformity and stability of the display panel can be improved, and the display effect of the display panel can be improved.

[0077] In order to achieve the above-mentioned purposes, please refer to FIG. 2, FIG. 3, FIG. 4 and FIG. 8, the present application further provides a manufacturing method of a display panel, the manufacturing method of the display panel comprises:

[0078] S10, forming an anode layer 10.

[0079] S20. Forming a first light-emitting functional layer 20 on one side of the anode layer 10.

[0080] S30. Forming an N-type charge generation layer 30 on the side of the first light-emitting functional layer 20 away from the anode layer 10.

[0081] S40. Forming a light-emitting recombination layer 60 on the side of the N-type charge generation layer 30 away from the first light-emitting functional layer 20, the light-emitting recombination layer 60 comprising a plurality of functional layers arranged in a stack.

[0082] S50. Forming a cathode layer 50 on the side of the light-emitting recombination layer 60 away from the N-type charge generation layer 30, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 not exceeding the coverage of the orthographic projection of at least one of the functional layers of the light-emitting recombination layer 60 on the cathode layer 50.

[0083] Specifically, in step S10, a substrate is first provided, which can be a rigid substrate or a flexible substrate.

[0084] A thin-film transistor layer is formed on the substrate, the thin-film transistor layer comprising a plurality of thin-film transistors arranged in an array on the substrate, the thin-film transistors being part of a driving circuit of the display panel and being configured to control the on-off of signal transmission; the thin-film transistors comprising an active layer, a gate, a source and a drain.

[0085] A planarization layer is formed on the side of the thin-film transistor layer away from the substrate, and an anode layer 10 is formed on the side of the planarization layer away from the thin-film transistor layer, the anode layer 10 comprising a plurality of anodes patterned, each of the anodes being connected to the source or the drain of one of the thin-film transistors and transmitting signals to the anode through the control of the thin-film transistor.

[0086] In step S20, a pixel definition layer is formed on the planarization layer, the pixel definition layer comprising a plurality of pixel openings, each of the pixel openings corresponding to one of the anodes.

[0087] Next, a first light-emitting functional layer 20 is formed on the pixel definition layer, wherein the first light-emitting functional layer 20 comprises a first light-emitting layer 21 and a first light-emitting auxiliary layer formed on the pixel definition layer; further, the first light-emitting functional layer 20 can comprise a first hole layer 22, the first light-emitting layer 21 and a first electron layer 23 formed on the pixel definition layer in sequence; the first hole layer 22 and the first electron layer 23 continuously cover the side of the pixel definition layer away from the planar layer and the plurality of pixel openings, and the first light-emitting layer 21 can comprise a plurality of first light-emitting parts arranged in the plurality of pixel openings, one first light-emitting part corresponding to one pixel opening and located between the first hole layer 22 and the first electron layer 23.

[0088] In some embodiments, the first hole layer 22 can comprise a first hole injection layer 221 and a first hole transport layer 222, and the first electron layer 23 can comprise a first electron injection layer 231 and a first electron transport layer 232.

[0089] In step S30, an intrinsic material and a doped material are evaporated on the side of the first light-emitting functional layer 20 away from the anode layer 10 by using a first mask plate to form the N-type charge generation layer 30.

[0090] It can be understood that the evaporation opening areas of the intrinsic material and the doped material are the same, so the distribution areas of the doped material in the N-type charge generation layer 30 and the intrinsic material in the N-type charge generation layer 30 are the same.

[0091] In some embodiments, the intrinsic material comprises an electron transport material, and the doped material comprises a metal material, for example, the metal material can comprise at least one of Yb and Li.

[0092] In step S40, at least one second mask plate can be used to form the light-emitting recombination layer 60 on the side of the N-type charge generation layer 30 away from the first light-emitting functional layer 20.

[0093] Wherein, a P-type charge generation layer 61 is formed on the side of the N-type charge generation layer 30 away from the first light-emitting functional layer 20, and the material of the P-type charge generation layer 61 comprises a hole transport material and a P-type doped material distributed in the hole transport material.

[0094] A second light-emitting functional layer 40 is formed on the side of the P-type charge generation layer 61 away from the N-type charge generation layer 30, wherein the second light-emitting functional layer 40 comprises a second light-emitting layer 41 and a second light-emitting auxiliary layer formed on the side of the P-type charge generation layer 61 away from the N-type charge generation layer 30; further, the second light-emitting functional layer 40 can comprise a second hole layer 42, the second light-emitting layer 41 and a second electron layer 43 formed on the P-type charge generation layer 61 in sequence; the second hole layer 42 and the second electron layer 43 continuously cover the side of the P-type charge generation layer 61 away from the N-type charge generation layer 30, and the second light-emitting layer 21 can comprise a plurality of second light-emitting parts arranged in a plurality of pixel openings, one second light-emitting part corresponding to one pixel opening and located between the second hole layer 42 and the second electron layer 43.

[0095] In some embodiments, the second hole layer 42 can comprise a second hole injection layer 421 and a second hole transport layer 422, and the second electron layer 43 can comprise a second electron injection layer 431 and a second electron transport layer 432.

[0096] It should be noted that the P-type charge generation layer 61, the second hole layer 42 and the second electron layer 43 can be formed by evaporation using at least one second mask plate, that is, any one or more of the P-type charge generation layer 61, the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431 and the second electron transport layer 432 can be formed by evaporation using the second mask plate with the same evaporation opening area or the second mask plate with different evaporation opening areas.

[0097] In some embodiments, when the number of the second mask plates is one, the evaporation opening area of the second mask plate is greater than or equal to the evaporation opening area of the first mask plate.

[0098] In some embodiments, when the number of the second mask plates is multiple, the evaporation opening areas of the second mask plates are the same or different, and the evaporation opening area of at least one second mask plate is greater than or equal to the evaporation opening area of the first mask plate.

[0099] As described above, by controlling the evaporation opening areas of the second mask plates and the evaporation opening area of the first mask plate, the boundary of at least one functional layer in the light-emitting composite layer 60 is greater than or equal to the boundary of the N-type charge generation layer 30, so that the boundary of the N-type charge generation layer 30 does not exceed the boundary of at least one functional layer in the light-emitting composite layer 60.

[0100] In step S50, a cathode layer 50 is formed on a side of the light-emitting composite layer 60 away from the N-type charge generation layer 30, and a projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed a coverage range of a projection of at least one functional layer in the light-emitting composite layer 60 on the cathode layer 50.

[0101] The N-type charge generation layer 30 and the cathode layer 50 are separated by at least one functional layer in the light-emitting composite layer 60.

[0102] In summary, the embodiments of the present application set the projection of the N-type charge generation layer 30 on the cathode layer 50 to not exceed the coverage range of the projection of at least one functional layer in the light-emitting composite layer 60 on the cathode layer 50, thereby reducing the probability of shorting between the N-type charge generation layer 30 and the cathode layer 50, reducing the probability of shorting of the light-emitting composite layer 60 between the cathode layer 50 and the N-type charge generation layer 30, improving the display uniformity and stability of the display panel, and improving the display effect of the display panel.

[0103] In addition, the embodiments of the present application also provide a display device, which includes the display panel described in the above embodiments or the display panel manufactured by the manufacturing method of the display panel described in the above embodiments.

[0104] It can be understood that, since the display device includes the display panel described in the above embodiments, the display device has the same beneficial effects as the display panel described in the above embodiments, which will not be described here.

[0105] In the above embodiments, the description of each embodiment focuses on different aspects, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0106] The display panel and the display device provided by the embodiments of the present application are described in detail above, and specific examples are applied to describe the principles and implementation manners of the present application. The above description of the embodiments is only used to help understand the technical solutions and core ideas of the present application; those skilled in the art should understand that the technical solutions recorded in the above embodiments can be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, comprising: an anode layer; a first light-emitting functional layer disposed on one side of the anode layer; an N-type charge generation layer disposed on a side of the first light-emitting functional layer away from the anode layer; a light-emitting recombination layer disposed on a side of the N-type charge generation layer away from the first light-emitting functional layer; a cathode layer disposed on a side of the light-emitting recombination layer away from the N-type charge generation layer; wherein the light-emitting recombination layer comprises a plurality of functional layers stacked together, and a projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a projection of at least one of the functional layers in the light-emitting recombination layer on the cathode layer.

2. The display panel of claim 1, wherein, The N-type charge generation layer comprises a dopant material and an intrinsic material, and a distribution area of the dopant material in the N-type charge generation layer is the same as a distribution area of the intrinsic material in the N-type charge generation layer.

3. The display panel of claim 1 or 2, wherein, An edge of the N-type charge generation layer is inwardly recessed relative to an edge of at least one of the functional layers in the light-emitting recombination layer towards a side close to a center of the N-type charge generation layer.

4. The display panel of claim 3, wherein, A distance by which the edge of the N-type charge generation layer is inwardly recessed relative to the edge of at least one of the functional layers in the light-emitting recombination layer towards the side close to the center of the N-type charge generation layer is greater than or equal to 30 microns.

5. The display panel of claim 3, wherein, At least one of the functional layers in the light-emitting recombination layer covers an upper surface of the N-type charge generation layer away from the first light-emitting functional layer and a plurality of side surfaces of the N-type charge generation layer connected to the upper surface.

6. The display panel of claim 1 or 2, wherein, The plurality of functional layers comprises a P-type charge generation layer disposed between the N-type charge generation layer and the cathode layer and a second light-emitting functional layer disposed between the P-type charge generation layer and the cathode layer. A projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a projection of the P-type charge generation layer on the cathode layer, and / or a projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a projection of the second light-emitting functional layer on the cathode layer.

7. The display panel of claim 6, wherein, The first light-emitting functional layer comprises a first light-emitting layer and a first light-emitting auxiliary layer stacked together, and the first light-emitting auxiliary layer comprises at least one of a first electron injection layer, a first electron transport layer, a first hole injection layer and a first hole transport layer. The second light-emitting functional layer comprises a second light-emitting layer and a second light-emitting auxiliary layer stacked together, and the second light-emitting auxiliary layer comprises at least one of a second electron injection layer, a second electron transport layer, a second hole injection layer and a second hole transport layer. A projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a projection of the P-type charge generation layer on the cathode layer, and / or a projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a projection of the second light-emitting auxiliary layer on the cathode layer.

8. The display panel of claim 2, wherein, The intrinsic material comprises an electron transport material, and the dopant material comprises a metal material.

9. The display panel of claim 1, wherein, At least one of the functional layers in the light-emitting recombination layer is disposed between the N-type charge generation layer and the cathode layer.

10. The display panel of claim 1, wherein, The display panel comprises a display area and a non-display area adjacent to the display area, the non-display area comprises a binding area on one side of the display area, the display panel comprises a substrate and a VDD signal end arranged on the substrate and located between the binding area and the display area, and the anode layer is electrically connected with the VDD signal end. The orthographic projection of the N-type charge generation layer on the substrate is spaced apart from the orthographic projection of the VDD signal end on the substrate.

11. A display device, comprising a display panel, the display panel comprising: an anode layer; a first light-emitting functional layer arranged on one side of the anode layer; an N-type charge generation layer arranged on one side of the first light-emitting functional layer away from the anode layer; a light-emitting recombination layer arranged on one side of the N-type charge generation layer away from the first light-emitting functional layer; a cathode layer arranged on one side of the light-emitting recombination layer away from the N-type charge generation layer; The light-emitting recombination layer comprises a plurality of functional layers arranged in layers, and the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting recombination layer on the cathode layer.

12. The display device of claim 11, wherein, The N-type charge generation layer is distributed with a doped material and an intrinsic material, and the distribution area of the doped material in the N-type charge generation layer is the same as the distribution area of the intrinsic material in the N-type charge generation layer.

13. The display device according to claim 11 or 12, wherein, The edge of the N-type charge generation layer is inwardly recessed relative to the edge of at least one functional layer in the light-emitting recombination layer towards the side close to the center of the N-type charge generation layer.

14. The display device of claim 13, wherein, The distance by which the edge of the N-type charge generation layer is inwardly recessed relative to the edge of at least one functional layer in the light-emitting recombination layer towards the side close to the center of the N-type charge generation layer is greater than or equal to 30 microns.

15. The display device of claim 13, wherein, At least one functional layer in the light-emitting recombination layer covers the upper surface of the N-type charge generation layer away from the first light-emitting functional layer and a plurality of side surfaces of the N-type charge generation layer connected to the upper surface.

16. The display device of claim 11 or 12, wherein, The plurality of functional layers comprise a P-type charge generation layer arranged between the N-type charge generation layer and the cathode layer and a second light-emitting functional layer arranged between the P-type charge generation layer and the cathode layer; The orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage range of the orthographic projection of the P-type charge generation layer on the cathode layer, and / or the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage range of the orthographic projection of the second light-emitting functional layer on the cathode layer.

17. The display device of claim 16, wherein, The first light-emitting functional layer comprises a first light-emitting layer and a first light-emitting auxiliary layer arranged in layers, and the first light-emitting auxiliary layer comprises at least one of a first electron injection layer, a first electron transport layer, a first hole injection layer and a first hole transport layer; The second light-emitting functional layer comprises a second light-emitting layer and a second light-emitting auxiliary layer arranged in layers, and the second light-emitting auxiliary layer comprises at least one of a second electron injection layer, a second electron transport layer, a second hole injection layer and a second hole transport layer; A positive projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a positive projection of the P-type charge generation layer on the cathode layer, and / or a positive projection of the N-type charge generation layer on the cathode layer does not exceed a coverage range of a positive projection of the second light-emitting auxiliary layer on the cathode layer.

18. The display device of claim 12, wherein, The intrinsic material comprises an electron transport material, and the doped material comprises a metal material.

19. The display device of claim 11, wherein, The N-type charge generation layer and the cathode layer are spaced apart by at least one functional layer in the light-emitting recombination layer.

20. The display device of claim 11, wherein, The display panel comprises a display area and a non-display area adjacent to the display area, the non-display area comprises a binding area on one side of the display area, the display panel comprises a substrate and a VDD signal end arranged on the substrate and located between the binding area and the display area, and the anode layer is electrically connected with the VDD signal end. A positive projection of the N-type charge generation layer on the substrate is spaced apart from a positive projection of the VDD signal end on the substrate.

Images