Information processing method and apparatus

Abstract

An information processing method and apparatus. A first LDPC base graph used for encoding or decoding is selected from an LDPC base graph set that matches a first condition. What matches the first condition is an LDPC base graph set, rather than a single LDPC base graph. In this way, under the first condition, more flexible selection of an LDPC base graph is possible, and base graph selection under multiple device capabilities can be supported, facilitating selection of base graphs that better match device capabilities and / or application scenarios.

Description

Information processing method and apparatus

[0001] The present application claims priority to the Chinese Patent Application No. 202411328785.5, filed on September 23, 2024, and entitled "Information processing method and apparatus", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present application relates to the field of communication, and more particularly, to an information processing method and apparatus. BACKGROUND

[0003] In the field of channel coding, low-density parity check (LDPC) code is one of the most mature and widely used coding schemes. LDPC code is a channel coding scheme very close to the Shannon line, with good performance and low complexity. LDPC code has been adopted by the 3rd generation partnership project (3GPP) as a scheme for data channel coding.

[0004] Different devices can have different device capabilities. In the future, different device capabilities can be further enriched and distinguished, and different LDPC base graphs can be designed for different device capabilities in a scenario. The current base graph selection method of LDPC code cannot adapt to this situation. SUMMARY

[0005] Embodiments of the present application provide an information processing method and apparatus to provide a base graph selection method to better match the capabilities of devices and application scenarios.

[0006] In a first aspect, embodiments of the present application provide an information processing method. The method can be applied to a coding side, such as a coding device, a module (such as a circuit, a chip or a chip system (such as a modem chip, also known as a baseband chip, or a system on chip (SoC) chip or system in package (SIP) chip containing a modem core), or a logical node, a logical module or software capable of implementing all or part of the coding device. The coding device can be a terminal or a network device.

[0007] Taking the case where the method is applied to a coding device, in the method, the coding device obtains an information bit sequence; encodes the information bit sequence according to a first LDPC base graph to obtain a codeword sequence, wherein the first LDPC base graph is selected from a set of LDPC base graphs matching a first condition.

[0008] In the above method, the first LDPC base graph used for encoding is selected from a set of LDPC base graphs matching the first condition. The set of LDPC base graphs, instead of one LDPC base graph, matching the first condition allows more flexible selection of LDPC base graph under the first condition, which helps better match the capability of the device and the application scenario.

[0009] In a second aspect, embodiments of the present disclosure provide an information processing method, which can be applied to a decoding side, such as a decoding device, a module (such as a circuit, a chip or a chip system (such as a modem chip, also known as a baseband chip, or a SoC chip or a SIP chip containing a modem core) in the decoding device, or a logic node, a logic module or software capable of implementing all or part of the decoding device. The decoding device can be a network device or a terminal.

[0010] Taking the case where the method is applied to a decoding device, in the method, the decoding device obtains a symbol sequence; and decodes the symbol sequence according to a first LDPC base graph to obtain an information bit sequence, wherein the first LDPC base graph is selected from a set of LDPC base graphs matching a first condition.

[0011] In the above method, the first LDPC base graph used for decoding is selected from a set of LDPC base graphs matching the first condition. The set of LDPC base graphs, instead of one LDPC base graph, matching the first condition allows more flexible selection of LDPC base graph under the first condition, which helps better match the capability of the device and the application scenario. The application scenario can also be referred to as a use scenario or a communication scenario, etc.

[0012] In combination with any of the above aspects, in a possible implementation, the first condition corresponds to a low-power device or a non-low-power device, or the first condition corresponds to a high-throughput device or a non-high-throughput device, or the first condition corresponds to a low-power scenario or a non-low-power scenario, or the first condition corresponds to a high-throughput scenario or a non-high-throughput scenario.

[0013] That is, the first condition is used to distinguish low power consumption devices and non-low power consumption devices, or the first condition is used to distinguish high throughput devices and non-high throughput devices, or the first condition is used to distinguish low power consumption scenarios and non-low power consumption scenarios, or the first condition is used to distinguish high throughput scenarios and non-high throughput scenarios. In this way, for low power consumption devices or low power consumption scenarios, a base graph for encoding or decoding can be selected from a set of LDPC base graphs suitable for low power consumption devices or low power consumption scenarios, for non-low power consumption devices or non-low power consumption scenarios, a base graph for encoding or decoding can be selected from a set of LDPC base graphs suitable for non-low power consumption devices or non-low power consumption scenarios, for high throughput devices or high throughput scenarios, a base graph for encoding or decoding can be selected from a set of LDPC base graphs suitable for high throughput devices or high throughput scenarios, and for non-high throughput devices or non-high throughput scenarios, a base graph for encoding or decoding can be selected from a set of LDPC base graphs suitable for non-high throughput devices or non-high throughput scenarios, which helps to select a suitable base graph for encoding or decoding.

[0014] In combination with any one of the above aspects or any implementation, in another possible implementation, the first condition includes at least one of the following conditions: the type of the device is a first type; the capability of the device is a first capability; the decoding mode of the device is a first decoding mode; the power consumption mode of the device is a first power consumption mode; the identification of the device is a first identification; the decoding complexity of the device is a first decoding complexity; the complexity of the receiver of the device is a first complexity; the application scenario is a first application scenario; the value of the first parameter is within a first range; or, the value of the second parameter is a first value.

[0015] The first parameter is different, and its corresponding first range can be different.

[0016] That is, different device types, different device capabilities, different decoding modes, different power consumption modes, different devices, different decoding complexities, different application scenarios, different receiver complexities, different values of the first parameter, or different values of the second parameter, can correspond to different sets of LDPC base graphs, which helps to select a base graph matching the device capability for encoding or decoding.

[0017] In combination with any one of the above aspects or any implementation, in another possible implementation, the first parameter includes at least one of the following parameters: a buffer status report index, a buffer size level, a number of maximum code block groups in each transport block, a transport block size, a number of code blocks contained in a transport block, a modulation and coding strategy index, or a code rate.

[0018] In a possible implementation of any of the above aspects or implementations, the set of LDPC base graphs includes a plurality of LDPC base graphs, the plurality of LDPC base graphs includes the first LDPC base graph, and the plurality of LDPC base graphs have at least one of the following characteristics: the plurality of LDPC base graphs support different maximum decoding parallelism; the plurality of LDPC base graphs support different maximum lifting values; the plurality of LDPC base graphs have different numbers of columns; the plurality of LDPC base graphs have different numbers of rows; the plurality of LDPC base graphs have different minimum decoding thresholds; the plurality of LDPC base graphs require different numbers of iterations for decoding convergence; the plurality of LDPC base graphs support different maximum code rates, and the plurality of LDPC base graphs support a maximum code rate greater than the first code rate; the plurality of LDPC base graphs support different minimum code rates, and the plurality of LDPC base graphs support a minimum code rate greater than the second code rate; in a case where a modulation order is greater than a first order and / or a modulation and coding scheme index is greater than a first index, the plurality of LDPC base graphs have better decoding performance than a base graph of a new radio (NR) LDPC code; the plurality of LDPC base graphs are extracted from the base graph of the NR LDPC code; or the plurality of LDPC base graphs are obtained by adding rows and / or columns to the base graph of the NR LDPC code.

[0019] Based on the above implementation, the plurality of LDPC base graphs can correspond to different device capabilities, and the encoding device or the decoding device can select a base graph that matches a device capability and / or an application scenario.

[0020] In a possible implementation of any of the above aspects or implementations, the first code rate is 0.9258 or 0.95, and / or the second code rate is 2 / 3 or 1 / 3.

[0021] In a possible implementation of any of the above aspects or implementations, the method further includes: selecting the first LDPC base graph from the set of LDPC base graphs according to a second condition. The second condition can be used to distinguish different device capabilities.

[0022] In other words, the encoding device or the decoding device can select an LDPC base graph that matches a capability of a current device and / or an application scenario from the set of LDPC base graphs.

[0023] In a possible implementation of any of the above aspects or implementations, the method further includes: determining a rate matching manner according to the second condition, the rate matching including at least one of puncturing, shortening, or repetition.

[0024] Based on the above implementation, the encoding device or the decoding device can select a rate matching manner that matches a capability of a current device and / or an application scenario.

[0025] In a possible implementation of any of the above aspects or implementations, in a possible implementation, the method further includes: determining an interleaving manner according to the second condition.

[0026] Based on the above implementation, the encoding device or the decoding device can select an interleaving manner that matches the capability of the current device and / or the application scenario. For example, in a high-throughput scenario, the encoding device or the decoding device can not use an interleaver.

[0027] In a possible implementation of any of the above aspects or implementations, the second condition includes at least one of the following conditions: a code rate is in a second range; a payload size is in a third range; the capability of the device is a first capability; or, a value of the second parameter is a first value.

[0028] The capability of the device is different, and the supported code rate, the supported payload size, and the value of the corresponding second parameter are also different. Therefore, the encoding device or the decoding device can select the first LDPC base graph from the set of LDPC base graphs according to at least one of the code rate, the payload size, and the value of the second parameter, which helps to select a base graph that matches the capability of the device and / or the application scenario for encoding or decoding. In addition, the encoding device or the decoding device can select an LDPC base graph from the set of LDPC base graphs according to the code rate and the payload size and determine a rate matching manner, which can improve the decoding performance. For example, for a scenario with a low number of iterations, the decoding performance of a base graph with a large column weight without puncturing is better, and for a scenario with a high number of iterations, the decoding performance of a base graph with a large column weight with puncturing of two columns is better.

[0029] In a possible implementation of any of the above aspects or implementations, the second parameter is a higher-layer parameter, and is used to indicate whether shaping modulation is used.

[0030] In the future, an LDPC base graph can be designed separately for shaping modulation. Based on the above implementation, when the second parameter indicates that shaping modulation is used, the encoding device and / or the decoding device can select an LDPC base graph that supports shaping modulation, a rate matching manner, and an interleaving manner according to the second parameter. This manner can support LDPC codes using shaping modulation, and the performance of the LDPC codes is better.

[0031] In a third aspect, an embodiment of the present application provides a communication apparatus, which has the functions of implementing the above-mentioned first aspect or any of its designs, for example, the communication apparatus includes a module or unit or means corresponding to the operations involved in the above-mentioned first aspect or any of its designs, which can be implemented by software, or by hardware, or by a combination of software and hardware.

[0032] In a fourth aspect, embodiments of the present application provide a communication apparatus. The communication apparatus can implement the functions of the second aspect or any of its possible designs. For example, the communication apparatus can include modules or units or means corresponding to the operations of the second aspect or any of its possible designs. These modules or units or means can be implemented by software or by hardware, or by a combination of software and hardware.

[0033] In a fifth aspect, embodiments of the present application provide a communication apparatus. The communication apparatus includes an interface circuit and one or more processors. The one or more processors are coupled to a memory. The memory is configured to store part or all of the necessary computer programs or instructions for implementing the functions of the first aspect or any of its possible designs. The one or more processors can execute the computer programs or instructions, which, when executed, cause the communication apparatus to implement the method of the first aspect or any of its possible designs. The interface circuit is configured to implement the communication function within the communication apparatus and / or the communication function of the communication apparatus with other apparatuses or components.

[0034] In a possible design, the processor is configured to communicate with other apparatuses or components via the interface circuit.

[0035] In a possible design, the communication apparatus can further include the memory.

[0036] The communication apparatus can be a terminal, a communication module in a terminal, or a chip responsible for the communication function in a terminal, such as a modem chip or a SoC or SIP chip including a modem module.

[0037] The communication apparatus can also be a network device, a module (e.g., a circuit, a chip, or a chip system) in a network device, or a logic node, a logic module, or software that can implement all or part of a network device.

[0038] In a sixth aspect, embodiments of the present application provide a communication apparatus. The communication apparatus includes an interface circuit and one or more processors. The one or more processors are coupled to a memory. The memory is configured to store part or all of the necessary computer programs or instructions for implementing the functions of the second aspect or any of its possible designs. The one or more processors can execute the computer programs or instructions, which, when executed, cause the communication apparatus to implement the method of the second aspect or any of its possible designs. The interface circuit is configured to implement the communication function within the communication apparatus and / or the communication function of the communication apparatus with other apparatuses or components.

[0039] In a possible design, the processor is configured to communicate with other apparatuses or components via the interface circuit.

[0040] In a possible design, the communication apparatus can further include the memory.

[0041] The communication apparatus can be a terminal, a communication module in the terminal, or a chip responsible for a communication function in the terminal, such as a modem chip or a SoC or SIP chip including a modem module.

[0042] The communication apparatus can also be a network device, a module (for example, a circuit, a chip, or a chip system) in the network device, or a logic node, a logic module, or software capable of implementing all or part of the network device.

[0043] In a seventh aspect, an embodiment of the present application provides a communication system, including at least one of the encoding device or the decoding device.

[0044] In an eighth aspect, an embodiment of the present application provides a computer readable storage medium, which stores computer readable instructions, and when a computer reads and executes the computer readable instructions, the computer executes the method in any aspect or any design thereof.

[0045] In a ninth aspect, an embodiment of the present application provides a computer program product, when a computer reads and executes the computer program product, the computer executes the method in any aspect or any design thereof.

[0046] In a tenth aspect, an embodiment of the present application provides a computer program, when the computer program runs on a computer, the method provided in any aspect or any possible design thereof is executed. BRIEF DESCRIPTION OF DRAWINGS

[0047] FIG. 1 is a schematic diagram of a network architecture to which embodiments of the present application are applicable.

[0048] FIG. 2 is a schematic diagram of an information transmission process to which embodiments of the present application are applicable.

[0049] FIG. 3 is a Tanner graph of a check matrix H.

[0050] FIG. 4 is a schematic flowchart of an information processing method 400 provided by the present application.

[0051] FIG. 5 is a schematic diagram of one structure of a short buffer status report (BSR) and a short truncated BSR medium access control (MAC) control element (CE).

[0052] FIG. 6 is a schematic diagram of one structure of an apparatus provided by an embodiment of the present application.

[0053] FIG. 7 is another structural schematic diagram of an apparatus provided by an embodiment of the present application.

[0054] FIG. 8 is a schematic diagram of a chip system provided by an embodiment of the present application. DETAILED DESCRIPTION

[0055] In order to understand the embodiments of the present application, the following points are explained before the embodiments of the present application are introduced.

[0056] "Indicative of" or "indicate" can include both direct indication and indirect indication, or "indicative of" or "indicate" can explicitly and / or implicitly indicate. The first, second, and the like various numerical designations are only for the convenience of description and do not limit the scope of the embodiments of the present application, for example, to distinguish different messages, different information, and the like. "Predefined" can be achieved by pre-storing corresponding codes, tables or other means for indicating related information in the device, and the specific implementation manner is not limited in the present application. The "protocol" referred to can refer to a standard protocol in the communication field, for example, can include a long term evolution (LTE) protocol, an NR protocol, and a related protocol applied in a future communication system, and the present application is not limited thereto. The words "example", "for example", "exemplary", "as an example", and the like are used to indicate an example, illustration, or description. Any embodiment or design scheme described as "example" in the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. The terms "include", "contain", "have", and their variants mean "including but not limited to", unless otherwise specifically emphasized. "At least one" refers to one or more, and "multiple" refers to two or more. "At most one" refers to one or 0. "And / or", which describes the association relationship of the associated objects, means that there can be three relationships, for example, R and / or U can mean that R exists alone, R and U exist together, and U exists alone, where R and U can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after it. "At least one of the following" or the like means any combination of these items, including any combination of single item or multiple items. For example, at least one of a, b, and c can mean a, or b, or c, or a and b, or a and c, or b and c, or a, b, and c. Where a, b, and c can be single or multiple. The description related to the sending of messages, information or data from network element S to network element T, and the receiving of messages, information or data from network element S by network element T, aims to indicate which network element the messages, information or data are sent to, and does not limit whether they are directly sent or indirectly sent via other network elements. "When", "in the case of", "if", and the like all refer to the objective situation in which the device will make corresponding processing, and are not limited to time, and do not require the device to have a judgment action when implemented, nor mean that there are other limitations.

[0057] In addition, the network architecture and service scenarios described in the embodiments of the present application are for more clearly illustrating the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that, with the evolution of network architecture and the emergence of new service scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0058] The communication system to which the embodiments of the present application can be applied will be described below.

[0059] The embodiments of the present application can be applied to various communication systems, including but not limited to: a 5th generation (5G) system or a NR system, an LTE system, a long term evolution-advanced (LTE-A) system, an LTE frequency division duplex (FDD) system, an LTE time division duplex (TDD) system, etc. It can also be applied to future communication systems. In addition, it can also be applied to device to device (D2D) communication, vehicle-to-everything (V2X) communication, machine to machine (M2M) communication, machine type communication (MTC), an internet of things (IoT) communication system, a narrow band-internet of things (NB-IoT) system, or other communication systems. In addition, it can also be extended to similar wireless communication systems, such as wireless-fidelity (WiFi), worldwide interoperability for microwave access (WIMAX), and 3rd generation partnership project (3GPP) related communication systems, etc., without limitation.

[0060] The communication system to which the embodiments of the present application can be applied can include one or more transmitting end devices and one or more receiving end devices. Alternatively, one of the transmitting end device and the receiving end device can be a terminal, and the other can be a network device. Alternatively, the transmitting end device and the receiving end device can both be terminals. Alternatively, the transmitting end device and the receiving end device can both be network devices.

[0061] In this application, the transmitting end device can be understood as a data or information transmitting end device, and can also be referred to as an encoding device. The receiving end device can be understood as a data or information receiving end device, and can also be referred to as a decoding device. The scheme of this application is described below using the encoding device and the decoding device.

[0062] Exemplarily, FIG. 1 shows a schematic diagram of a network architecture to which the embodiments of the present application can be applied.

[0063] FIG. 1 shows a possible, non-limiting system schematic diagram. As shown in FIG. 1, the communication system 10 includes a radio access network (RAN) 100 and a core network (CN) 200. The RAN 100 includes at least one RAN node (such as 110a and 110b in FIG. 1, collectively referred to as 110) and at least one terminal (such as 120a-120j in FIG. 1, collectively referred to as 120). Other RAN nodes, such as wireless relay devices and / or wireless backhaul devices (not shown in FIG. 1), etc., can also be included in the RAN 100. The terminal 120 is connected to the RAN node 110 in a wireless manner. The RAN node 110 is connected to the core network 200 in a wireless or wired manner. The core network device in the core network 200 and the RAN node 110 in the RAN 100 can be different physical devices respectively, or can be the same physical device integrated with the logical functions of the core network and the logical functions of the radio access network.

[0064] The RAN 100 can be a 3rd generation partnership project (3GPP) related cellular system, such as a 4G, 5G mobile communication system, or a future-oriented evolution system. The RAN 100 can also be an open radio access network (O-RAN or ORAN), a cloud radio access network (CRAN), or a wireless fidelity (WiFi) system. The RAN 100 can also be a communication system in which two or more of the above systems are integrated.

[0065] The RAN node 110, which can also be referred to as an access network device, a RAN entity, or an access node, etc., forms part of the communication system, and is configured to facilitate the wireless access by the terminals. The RAN nodes 110 in the communication system 10 can be of the same type or can be of different types. In some scenarios, the roles of the RAN node 110 and the terminal 120 are relative, e.g., the network element 120i in Figure 1 can be a helicopter or a drone, which can be configured to move as a mobile base station, and for a terminal 120j accessing the RAN 100 via the network element 120i, the network element 120i is a base station; but for the base station 110a, the network element 120i is a terminal. The RAN nodes 110 and the terminals 120 are sometimes referred to as communication devices, e.g., the network elements 110a and 110b in Figure 1 can be understood as communication devices with base station functionalities, and the network elements 120a-120j can be understood as communication devices with terminal functionalities.

[0066] In a possible scenario, the RAN node can be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next generation NodeB (gNB), a base station in a future mobile communication system, or an access node in a WiFi system, etc. The RAN node can be a macro base station (e.g., 110a in Figure 1), a micro base station or an indoor station (e.g., 110b in Figure 1), a relay node or a donor node, or a wireless controller in a CRAN scenario. Optionally, the RAN node can also be a server, a wearable device, a vehicle or a vehicle-mounted device, etc. For example, the access network device in vehicle to everything (V2X) technology can be a road side unit (RSU). All or part of the functions of the RAN node in this application can also be implemented by software functions running on hardware, or by virtualized functions instantiated on a platform (e.g., a cloud platform). The RAN node can also be provided with a communication module, circuit or chip for performing corresponding communication functions, and program instructions for performing corresponding communication functions. The RAN node in this application can also be a logical node, a logical module or software that can implement all or part of the functions of the RAN node.

[0067] In another possible scenario, a terminal is assisted by multiple RAN nodes to implement wireless access, and different RAN nodes respectively implement part of functions of a base station. For example, a RAN node can be a central unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), or a radio unit (RU), etc. The CU and the DU can be separately arranged, or can be included in the same network element, for example, in a baseband unit (BBU). The RU can be included in a radio frequency device or a radio frequency unit, for example, included in a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH).

[0068] In different systems, the CU (or CU-CP and CU-UP), DU or RU can also have different names, but those skilled in the art can understand their meanings. For example, in an ORAN system, the CU can also be referred to as an O-CU (open CU), the DU can also be referred to as an O-DU, the CU-CP can also be referred to as an O-CU-CP, the CU-UP can also be referred to as an O-CU-UP, and the RU can also be referred to as an O-RU. For the convenience of description, the CU, CU-CP, CU-UP, DU and RU are taken as examples for description in this application. Any one of the CU (or CU-CP, CU-UP), DU and RU in this application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module.

[0069] In the embodiments of this application, the access network device can also be referred to simply as a network device.

[0070] A terminal can be a device or module with corresponding communication functions and can access the above-mentioned communication system. The terminal can also be referred to as a terminal device, user equipment (UE), mobile station, mobile terminal, etc. The terminal can be widely used in various scenarios, such as D2D, V2X, MTC, IoT, virtual reality, augmented reality, industrial control, autonomous driving, remote medical treatment, smart power grid, smart furniture, smart office, smart wear, smart transportation, smart city, etc. The terminal can be a mobile phone, tablet computer, computer with wireless transceiver function, wearable device, vehicle, unmanned aerial vehicle, helicopter, airplane, ship, robot, mechanical arm, smart home device, transport vehicle with wireless communication function, communication module, etc. Embodiments of the present application do not limit the device form of the terminal. The terminal usually has a communication module, circuit or chip for performing corresponding communication functions. The terminal also has program instructions configured to perform corresponding communication functions.

[0071] Unless otherwise specified, the apparatus for implementing the functions of the terminal or network device in the present application can refer to the terminal or network device itself, or can refer to an apparatus capable of supporting the terminal or network device to implement the functions, such as a chip system or chip, specifically, a SoC or modem. The apparatus can be installed in the terminal or network device. In embodiments of the present application, the chip system can be composed of a chip, or can include a chip and other discrete devices.

[0072] It should also be noted that some embodiments in this paper take the 5G system as an example to introduce specific scheme details. It can be understood that when the scheme is used in other communication systems, such as the LTE system, or future communication systems, the messages, channels or information in the scheme can be replaced by other messages, channels or information in the communication system that can realize the corresponding functions, and the present application does not limit this.

[0073] FIG. 2 is a schematic diagram of an information transmission process applicable to embodiments of the present application. As shown in FIG. 2, information is sent by a source, processed by source encoding, channel encoding, modulation, air interface transmission, demodulation, channel decoding, source recovery, etc., and reaches a sink to complete the transmission of information from the source to the sink. Among them, the processing shown in the upper layer of FIG. 2 (including source encoding, channel encoding and modulation, etc.) is performed on the encoding side, and the processing shown in the lower layer (including demodulation, channel decoding, source recovery, etc.) is performed on the decoding side.

[0074] Embodiments of the present application can be implemented in the form of hardware, such as by a special-purpose chip or a programmable chip, or in the form of software executed by a processor, and mainly relate to channel encoding and channel decoding shown in FIG. 2. It should be noted that embodiments of the present application can be used for channel decoding, and the decoding manner of embodiments of the present application is a general decoding means, which is effective for any encoding scheme, so embodiments of the present application do not limit the channel encoding scheme.

[0075] In addition, embodiments of the present application can be applied to various application scenarios, such as a high-throughput scenario, a high-reliability scenario, a low-latency scenario, a high-reliability low-latency scenario, or a low-power consumption scenario. Among them, the high-throughput scenario may, for example, be an enhanced mobile broadband (eMBB) scenario, an extended-reality (XR) scenario, a cloud game (CG) scenario, or an augmented reality (AR) scenario, etc., the high-reliability low-latency scenario may, for example, be an ultra reliable low latency communication (URLLC) scenario or a hyper reliable low latency communication (HRLLC) scenario, etc., and the low-power consumption scenario may, for example, be an M2M scenario, an MTC scenario, a massive MTC (mMTC) scenario, an IoT scenario, a narrow band internet of things (NB-IoT) scenario, an advanced internet of things (A-IoT) scenario, a low power wide area (LPWA) scenario, etc. In order to facilitate understanding of embodiments of the present application, several concepts or terms related to embodiments of the present application are briefly described. The concepts or terms described below are described based on the concepts or terms defined in the protocol, but do not mean that embodiments of the present application can only be applied to the existing system, and the concepts or terms related to embodiments of the present application can be applied to future systems. Moreover, the specific names of the concepts or terms (such as concepts or terms related to functional descriptions) can be adjusted as the future system develops.

[0076] 1. LDPC code

[0077] An LDPC code is a kind of linear block code, and its check matrix has a sparse characteristic. The proportion of non-zero elements in the check matrix of the LDPC code is extremely small, or in other words, the row weight and the column weight of the check matrix are very small numbers compared with the code length of the LDPC. For an LDPC code with a number of information bits K and a code length N, the dimension of the check matrix H is (N-K) x N, and the corresponding code word c can be defined by the check matrix H as follows: c = {c | Hc T = 0, c ∈ {0, 1} N}.

[0078] In the check matrix H, each row corresponds to a check equation of the LDPC code, and the N-K check equations correspond to N-K check nodes of the LDPC code; each column corresponds to a code element of the LDPC code, and the N code elements correspond to N variable nodes of the LDPC code. The non-zero element h i,j in the check matrix H indicates that the i-th check node is connected to the j-th variable node. The number of non-zero elements in each row of the check matrix is the degree of the check node, and the number of non-zero elements in each column is the degree of the variable node. If the degrees of all the check nodes are equal and the degrees of all the variable nodes are equal, the LDPC code corresponding to the matrix is a regular code, otherwise it is an irregular code. Exemplarily, a check matrix H of a regular LDPC code with a code length of 10 and a code rate of 1 / 2 can be as follows:

[0079] In the check matrix H, each row corresponds to a check equation of the LDPC code, and the N-K check equations correspond to N-K check nodes of the LDPC code; each column corresponds to a code element of the LDPC code, and the N code elements correspond to N variable nodes of the LDPC code. The non-zero element h i,j in the check matrix H indicates that the i-th check node is connected to the j-th variable node. The number of non-zero elements in each row of the check matrix is the degree of the check node, and the number of non-zero elements in each column is the degree of the variable node. If the degrees of all the check nodes are equal and the degrees of all the variable nodes are equal, the LDPC code corresponding to the matrix is a regular code, otherwise it is an irregular code. Exemplarily, a check matrix H of a regular LDPC code with a code length of 10 and a code rate of 1 / 2 can be as follows:

[0080] The LDPC code can be represented by a graph model, and common graph models include Tanner graph, factor graph and tree graph, etc., and the Tanner graph is more concise and intuitive. The Tanner graph of the check matrix H described above can be as shown in FIG. 3, and the degree in FIG. 3 corresponds to the definition of the degree in the check matrix H described above, and the degree of a node can be defined as the number of edges connected thereto.

[0081] 2. Base graph (BG)

[0082] A quasi-cyclic low density parity check (QC-LDPC) code is a kind of structured LDPC code. Due to the unique structure of the check matrix, a simple feedback shift register can be used for encoding, thereby reducing the encoding complexity of the LDPC code.

[0083] The BG model of the QC-LDPC code is BG = (X, Y, F), where X corresponds to a variable, Y corresponds to a check equation, and F is a connection relationship. The lifting size Z cThe QC expansion of H results in a Tanner graph, which is a bipartite graph G = (V, C, E), where V is the set of variable nodes, C is the set of check nodes, and E is the set of edges between variable nodes and check nodes, corresponding to the check matrix H c |X|, the number of rows of the check matrix M = |C| = Z c |Y|, the number of non-zero elements of the check matrix |E| = Z c |F|, and Z c may also be referred to as lifting size, expansion factor, lifting factor, expansion value, expansion coefficient, or lifting dimension, etc. c may also be denoted as Z.

[0084] The BG can also be expressed in a matrix form, denoted as H BG In the case of a long code length, the check matrix H of the LDPC code is very large, and thus H is usually expressed in a block form: the complete check matrix H is regarded as being generated by a plurality of Z c ×Z c submatrices. Specifically, the complete check matrix H can be represented by a base matrix H BG Each element in H BG corresponds to a Z c ×Z c submatrix, and each submatrix can be represented by a number of cyclic shifts. Thus, the storage space required by the complete check matrix H is greatly reduced.

[0085] Based on the base matrix H BG and Z c , the base matrix H BG can be lifted to a complete check matrix for encoding or decoding. The lifting process is to lift the elements in H BG to a Z c ×Z c matrix, where a zero element is lifted to a Z c ×Z c zero matrix, and a non-zero element is lifted to a matrix that is a unit matrix cyclically shifted to the right by P i,j , where P i,j is the shifting value (SV) corresponding to the i-th row and the j-th column. Taking -1, 0, 1, 2, and 3 as examples, the results of the cyclic shift are as follows:

[0086] Optionally, the zero elements in the base matrix H BG may be represented in other forms in addition to "-1", such as using "-" or a null value to represent a zero matrix.

[0087] The current data channel supports information bits ranging from 1 to 8448, and the standard describes two check matrices: BG1 and BG2, wherein BG1 supports encoding for a maximum of K cb = 8448 information bits, and BG2 supports encoding for a maximum of K cb = 3840 information bits. In the current LDPC code, a base graph is selected for encoding according to the size A of the payload (excluding cyclic redundancy check (CRC) bits) and the code rate R. Specifically, if A ≤ 292, or A ≤ 3824 and R ≤ 2 / 3, or R ≤ 1 / 4, BG2 is selected as the base graph for LDPC encoding; otherwise, BG1 is selected as the base graph for LDPC encoding.

[0088] 3. Rate matching

[0089] Rate matching is used to align the number of coded bits with the number of resources actually available for transmission, or in other words, rate matching is used to match the number of coded bits to the carrying capacity of a physical channel, so as to achieve the bit rate required by the transmission format when channel mapping. Rate matching can perform puncturing, shortening, repetition, and the like on the coded bits.

[0090] The above describes related terms related to embodiments of the present application, which will not be explained below.

[0091] Different device capabilities can affect the encoding method (such as the base graph selection method) and / or the rate matching method. Taking a UE as an example, in the NR standard, according to the size of the buffer that the receiving end device can support, it is determined whether the LDPC code adopts a buffer-limited rate matching method, for example, if the rateMatching field in the PUSCH-ServingCellConfig in the high layer parameter is configured as limited buffer RM (limitedBufferRM), then I LBRM = 1, thereby affecting the bit selection method when the LDPC code is rate matched. If I LBRM = 1, the size of the circular buffer is min(N, N ref ), otherwise the size of the circular buffer is N, wherein N and N ref are lengths determined according to the LDPC base graph and the code rate, and the like.

[0092] In the future, the capability of different devices will be further enriched and distinguished, and the difference of device capability will not only be reflected in the cache capability. In the future, different LDPC base graphs can be designed for different device capabilities in a scenario. The current base graph selection method and / or rate matching method of the LDPC code cannot adapt to this case.

[0093] To solve the above problems, the present application provides an information processing method and device to select a base graph to better match the capability of a device and an application scenario.

[0094] The method embodiment of the present application will be described below in combination with the accompanying drawings.

[0095] FIG. 4 is a schematic flowchart of an information processing method 400 provided by the present application.

[0096] The method 400 can be performed by an encoding device and a decoding device. Unless otherwise specified, the "encoding device" or "decoding device" can refer to the encoding device or decoding device itself, or can refer to a device (such as a circuit, a chip, or a chip system (such as a modem chip, or a SoC chip or SIP chip containing a modem core)) capable of supporting the encoding device or decoding device to realize its functions. For the convenience of description, the encoding device and decoding device are used to describe below. The encoding device can be a terminal or a network device. The decoding device can be a network device or a terminal.

[0097] The method 400 can include at least part of the following contents.

[0098] Step 401, the encoding device acquires an information bit sequence.

[0099] That is, if the encoding device needs to communicate with the decoding device, i.e., the encoding device needs to send a signal to the decoding device, the encoding device needs to first acquire the information bit sequence corresponding to the signal to be sent to the decoding device.

[0100] The encoding device acquiring the information bit sequence can refer to that the encoding device source encodes the source symbol to generate the information bit sequence. The encoding device acquiring the information bit sequence can also refer to that the encoding device receives the information bit sequence from other communication devices.

[0101] Step 402, the encoding device encodes the information bit sequence according to a first LDPC base graph to obtain a codeword sequence.

[0102] The first LDPC base graph is selected from a set of LDPC base graphs matched with a first condition.

[0103] Step 403, the encoding device sends the symbol sequence to the decoding device. Correspondingly, the decoding device receives the symbol sequence from the encoding device.

[0104] The symbol sequence is obtained based on the codeword sequence in step 402. For example, the symbol sequence can be a sequence obtained by rate matching and modulating the codeword sequence. For example, the encoding device rate matches the codeword sequence, then modulates the rate matched sequence to obtain the symbol sequence, and then maps the modulated symbol sequence to physical resources for transmission.

[0105] It should be understood that the symbol sequence sent by the encoding device and the symbol sequence received by the decoding device can be different due to the introduction of channel noise signals in the transmission process of the symbol sequence.

[0106] In step 404, the decoding device decodes the symbol sequence according to the first LDPC base graph to obtain the information bit sequence.

[0107] The first LDPC base graph is selected from the LDPC base graph set matching the first condition.

[0108] In the method 400, the first LDPC base graph used by the encoding or decoding is selected from the LDPC base graph set matching the first condition. First, the LDPC base graph set is the LDPC base graph set matching the first condition, so the LDPC base graph set can be a subset of the LDPC base graph universe. Different first conditions can match different LDPC base graph sets. For example, if the first condition is used to distinguish between low-power devices and non-low-power devices, different LDPC base graph sets can be used for the two types of devices. For example, if the first condition is used to distinguish between high-throughput devices and non-high-throughput devices, different LDPC base graph sets can be used for the two types of devices. For example, if the first condition is used to indicate an application scenario, different LDPC base graph sets can be used for different application scenarios. Second, the first condition matches the LDPC base graph set, not a single LDPC base graph. This allows more flexible selection of LDPC base graphs under the first condition. For example, the first condition matches a high-throughput application scenario. Based on the method 400, the high-throughput scenario can correspond to an LDPC base graph set, not a single LDPC base graph. Different base graphs in the LDPC base graph set can correspond to different device capabilities, so the device capabilities and application scenarios can be better matched.

[0109] In some implementations, the first condition is used to distinguish between different application scenarios. In this case, the LDPC base graph set matching the first condition can be understood as: the LDPC base graphs in the LDPC base graph set are suitable for the application scenario corresponding to the first condition, or the LDPC base graphs in the LDPC base graph set can achieve better decoding performance under the application scenario corresponding to the first condition.

[0110] As an example, the first condition is used to distinguish a low power consumption scenario and a non-low power consumption scenario. Illustratively, the low power consumption scenario can be a M2M scenario, a MTC scenario, a mMTC scenario, an IoT scenario, a NB-IoT scenario, an A-IoT scenario, or a LPWA scenario, etc.

[0111] As another example, the first condition is used to distinguish a high throughput scenario and a non-high throughput scenario. Illustratively, the high throughput scenario can be an eMBB scenario, an XR scenario, a CG scenario, or an AR scenario, etc.

[0112] In some implementations, the first condition is used to distinguish different device types. In this case, the set of LDPC base graphs that match the first condition can be understood as: the LDPC base graphs in the set of LDPC base graphs are suitable for the device type corresponding to the first condition, or the LDPC base graphs in the set of LDPC base graphs can achieve better decoding performance under the device type corresponding to the first condition.

[0113] As an example, the first condition is used to distinguish a low power consumption device and a non-low power consumption device. The low power consumption device can refer to a device with long battery life, low power consumption, and low cost. For example, the low power consumption device can include at least one of the following devices: a LPWA device, a NB-IoT device, an A-IoT device, or a reduced capability (RedCap) device.

[0114] As another example, the first condition is used to distinguish a high throughput device and a non-high throughput device. For example, the high throughput device can include a device that supports shaped modulation and / or a device that does not support shaped modulation.

[0115] In some implementations, the first condition can include at least one of the following conditions:

[0116] 1. The type of the device is a first type.

[0117] 2. The capability of the device is a first capability.

[0118] The capability of the device can also be replaced by a terminal capability, a UE capability, or a device capability. Illustratively, the capability of the device can be determined by at least one of the following information supported by the device: a number of decoding iterations of the device, a maximum number of information columns, a set of supported basis graph indices, a maximum clock frequency, a maximum number of antennas, a receiver complexity, a peak data rate, a maximum modulation and coding scheme (MCS) index, a maximum number of iterations, a maximum rank indication, a minimum processing timeline, a maximum number of blind decodes, a maximum code length, a minimum code rate, a maximum number of code blocks, a maximum lifting value, a maximum transport block size, or a maximum set of precoding matrix indicators (PMIs). The number of decoding iterations of the device can be a number of decoding iterations employed, supported, or expected by the device, such as a maximum number of decoding iterations employed, supported, or expected by the device.

[0119] 3. The decoding mode of the device is a first decoding mode.

[0120] 4. The power consumption mode of the device is a first power consumption mode.

[0121] 5. The identity of the device is a first identity.

[0122] 6. The decoding complexity of the device is a first decoding complexity.

[0123] 7. The complexity of the receiver of the device is a first complexity.

[0124] 8. The application scenario is a first application scenario.

[0125] 9. The value of the first parameter is in a first range.

[0126] In some implementations, the first parameter can be a higher layer parameter. Illustratively, the first parameter can include at least one of the following parameters:

[0127] 1) a buffer status report (BSR) index

[0128] In some implementations, the BSR index can be carried in a medium access control (MAC) control element (CE). Each BSR index corresponds to a buffer size (BS) value range, and different BS value ranges represent different BS levels.

[0129] As an example, the BSR index can be carried in a short BSR and a short truncated MAC CE.

[0130] FIG. 5 is a structure diagram of a short BSR and a short truncated BSR MAC CE. The MAC CE includes a 3-bit logical channel group identity (LCG ID) field and a 5-bit BS field.

[0131] Table 1 shows BS level (buffer size levels (in bytes) for 5-bit buffer size field) corresponding to the 5-bit BS field, where the BS value is in bytes. As an example, a first range corresponding to the BSR index can be greater than or equal to a first BSR index threshold. Embodiments of the present disclosure do not limit the specific value of the first BSR index threshold, for example, the first BSR index threshold can be 15, 21, 28, or 31, etc.

[0132] Table 1 Buffer size levels (in bytes) for 5-bit buffer size field

[0133] As another example, the BSR index can be carried in a long BSR and a long truncated MAC CE. The MAC CE includes an 8-bit BS field. Table 2 shows BS level (buffer size levels (in bytes) for 8-bit buffer size field) corresponding to the 8-bit BS field, where the BS value is in bytes. As an example, a first range corresponding to the BSR index can be greater than or equal to a second BSR index threshold. Embodiments of the present disclosure do not limit the specific value of the second BSR index threshold, for example, the second BSR index threshold can be 52, 146, 154, or 228, etc.

[0134] Table 2 Buffer size levels (in bytes) for 8-bit buffer size field

[0135] 2) buffer size level (BS level),

[0136] The BS level can correspond to the BS value. The BS level can be indicated by the BSR index.

[0137] As an example, for short BSR and short truncated MAC CE, the first range corresponding to the BS level can be: greater than or equal to a first BS value threshold. Embodiments of the present application do not limit the specific value of the first BS value threshold, for example, the first BS value threshold can be 1038 bytes, 7587 bytes, 77284 bytes or 150000 bytes, that is, 8034 bits, 60696 bits, 618272 bits or 1200000 bits. It should be noted that the BS value corresponding to the first BS value threshold can be the same as the first BS threshold, or can be different, which is not limited.

[0138] As another example, for long BSR and long truncated MAC CE, the first range corresponding to the BS level can be: greater than or equal to a second BS value threshold. Embodiments of the present application do not limit the specific value of the second BS value threshold, for example, the second BS value threshold can be 264 bytes, 97221 bytes, 150992 bytes or 15854280 bytes, that is, 2112 bits, 777768 bits, 1207936 bits or 126834240 bits. It should be noted that the BS value corresponding to the second BS value threshold can be the same as the second BS threshold, or can be different, which is not limited.

[0139] 3) The number of maximum code block groups (CBGs) in each transport block (TB)

[0140] Exemplarily, the first range corresponding to the number of maximum CBGs in each TB can be: greater than or equal to a CBG threshold. Embodiments of the present application do not limit the specific value of the CBG threshold, for example, the CBG threshold can be 6, 12, etc.

[0141] Exemplarily, the number of maximum CBGs in each TB can be carried in PUSCH-CodeBlockGroupTransmission or PDSCH-CodeBlockGroupTransmission.

[0142] For example, the number of maximum CBGs in each TB can be carried in the maxCodeBlockGroupPerTransportBlock field in PUSCH-CodeBlockGroupTransmission or PDSCH-CodeBlockGroupTransmission.

[0143] In some other implementations, the first parameter can be a parameter in the DCI. Exemplarily, the first parameter can include at least one of the following parameters:

[0144] 1) transport block size (TBS)

[0145] Exemplarily, the first range corresponding to the TBS can be greater than or equal to a TBS threshold. Embodiments of the present application do not limit the specific value of the TBS threshold, for example, the TBS threshold can be 126700, wherein:

[0146] 1267200 = 33 (number of information columns) * 384 (maximum lifting value) * 100 (high-throughput code block quantity threshold);

[0147] 1267200 = 22 (number of information columns) * 384 (maximum lifting value) * 150 (high-throughput code block quantity threshold).

[0148] It should be noted that the TBS threshold can or can not correspond to the BS value threshold, which is not limited.

[0149] 2) number of code blocks contained in the TB

[0150] Exemplarily, the first range corresponding to the number of code blocks can be greater than or equal to a code block quantity threshold. Embodiments of the present application do not limit the specific value of the code block quantity threshold, for example, the code block quantity threshold can be 100 (which can be applicable to a base graph of 33 information columns) or 150 (which can be applicable to a base graph of 22 information columns).

[0151] It should be noted that the code block quantity threshold can or can not correspond to the TBS value threshold, which is not limited.

[0152] 3) MCS index

[0153] Exemplarily, the first range corresponding to the MCS index can be greater than or equal to an MCS index threshold. Embodiments of the present application do not limit the specific value of the MCS index threshold, for example, the MCS index threshold can be 5, 20, 31, etc.

[0154] 4) code rate

[0155] The code rate can refer to the encoding code rate. Exemplarily, the first range corresponding to the code rate can be greater than or equal to a code rate threshold. Embodiments of the present application do not limit the specific value of the code rate threshold, for example, the code rate threshold can be 0.9167, etc.

[0156] 10. The second parameter has a first value.

[0157] In some implementations, the second parameter can be used to indicate whether shaping is used.

[0158] For example, the second parameter occupies 1 bit, when the bit takes value 1 (i.e. the first value is 1), it indicates that shaping is used, in this case, the encoding device or the decoding device sets a shaping related variable or indicator I shape = 1, so that the first LDPC base graph is selected from the set of LDPC base graphs that support shaping; when the bit takes value 0 (i.e. the first value is 0), it indicates that shaping is not used, in this case, the encoding device or the decoding device sets a shaping related variable or indicator I shape = 0, so that the first LDPC base graph is selected from the set of LDPC base graphs that do not support shaping.

[0159] For another example, the second parameter takes a non-empty value (i.e. the first value is a non-empty value), the non-empty value indicates that shaping is used, in this case, the encoding device or the decoding device sets a shaping related variable or indicator I shape = 1, so that the first LDPC base graph is selected from the set of LDPC base graphs that support shaping; the second parameter takes an empty value (i.e. the first value is an empty value), the empty value indicates that shaping is not used, in this case, the encoding device or the decoding device sets a shaping related variable or indicator I shape = 0, so that the first LDPC base graph is selected from the set of LDPC base graphs that do not support shaping.

[0160] The second parameter can be a high layer parameter or a parameter in DCI, which is not limited.

[0161] Exemplarily, the second parameter can be indicated by UE capability information elements in radio resource control (RRC) signaling.

[0162] For example, the second parameter is carried in a FeatureSets field in the UE capability information elements.

[0163] For another example, in view of the current indication of the maximum modulation order that can be supported by the supportedModulationOrderDL field or the supportedModulationOrderUL field in the UE capability information element, in the future, shaping modulation can be introduced to obtain higher spectral efficiency, therefore, a supportedShapingModulationOrderDL field can be added in the UE capability information element to indicate whether shaping is used in downlink, and / or a supportedShapingModulationOrderUL field can be added in the UE capability information element to indicate whether shaping is used in uplink. For example, the supportedShapingModulationOrderDL field and / or the supportedShapingModulationOrderUL field can be carried in the FeatureSets field, such as featureSetDownlink::supportedShapingModulationOrderDL, or featureSetUplink::supportedShapingModulationOrderUL, or featureSetDownlinkPerCC::supportedShapingModulationOrderDL, or featureSetUplinkPerCC::supportedShapingModulationOrderUL. It should be understood that the parameter names herein are for example only, and are only intended to help those skilled in the art understand the embodiments of the present application, and are not intended to limit the embodiments of the present application to the example parameter names.

[0164] As can be seen from the above, different device types, different device capabilities, different coding modes, different power consumption modes, different devices, different coding complexities, different application scenarios, different receiver complexities, different values of the first parameter, or different values of the second parameter, can correspond to different LDPC base graph sets. The LDPC base graph set in step 402 and step 405 can be an LDPC base graph set corresponding to a first type of device, a first capability of device, a device using a first coding mode, a device using a first power consumption mode, a device identified as a first identifier, a device supporting a first coding complexity, a first application scenario, a device using a first complexity of receiver, when the value of the first parameter is in a first range, or when the value of the second parameter is a first value. It should be noted that the first parameter is different, and the corresponding first range can be different.

[0165] It should be noted that the method 400 can be applicable to all application scenarios or all device types, and different application scenarios or device types correspond to different LDPC base graph sets. Alternatively, the method 400 can be applicable only to a specific application scenario or a specific device type, and other application scenarios or device types can use a conventional base graph selection method. For example, the method 400 can be applicable only to a high throughput scenario, when the values of the above-mentioned parameters indicate that the application scenario is a high throughput scenario, the encoding device and / or the decoding device select a first LDPC base graph from an LDPC base graph set matching the first condition, and when the values of the above-mentioned parameters indicate that the application scenario is a non-high throughput scenario, the encoding device and / or the decoding device select an LDPC base graph using a conventional base graph selection method.

[0166] In some implementations, the LDPC base graph set includes one or more LDPC base graphs, and the one or more LDPC base graphs include the first LDPC base graph described above.

[0167] In one design, when the LDPC base graph set includes multiple LDPC base graphs, the multiple LDPC base graphs correspond to the same application scenario, i.e., different application scenarios can correspond to different LDPC base graph sets. For example, the LDPC base graph set in an eMBB scenario can be BG set 1 = {BG1, BG2, …}, the LDPC base graph set in a high throughput scenario can be BG set 2 = {BG1, BG2, …}, BG set 2 = {BG1, BG1’, …}, or BG set 2 = {BG1}, and the LDPC base graph set in an HRLLC scenario can be BG set 3 = {BG2, BG2’, …}, or BG set 3 = {BG2}.

[0168] In one design, when the set of LDPC base graphs includes multiple LDPC base graphs, the multiple LDPC base graphs correspond to different device capabilities.

[0169] In one design, when the set of LDPC base graphs includes multiple LDPC base graphs, the multiple LDPC base graphs have at least one of the following features:

[0170] 1) The multiple LDPC base graphs support different maximum decoding parallelism. In one design, if the multiple LDPC base graphs are numbered, the maximum decoding parallelism supported by the multiple LDPC base graphs increases or decreases as the number increases.

[0171] 2) The multiple LDPC base graphs support different maximum lifting values. In one design, if the multiple LDPC base graphs are numbered, the maximum lifting values supported by the multiple LDPC base graphs increase or decrease as the number increases.

[0172] 3) The multiple LDPC base graphs have different numbers of columns. In one design, if the multiple LDPC base graphs are numbered, the number of columns of the multiple LDPC base graphs increases or decreases as the number increases.

[0173] 4) The multiple LDPC base graphs have different numbers of rows. In one design, if the multiple LDPC base graphs are numbered, the number of rows of the multiple LDPC base graphs increases or decreases as the number increases.

[0174] 5) The multiple LDPC base graphs have different decoding thresholds. In one design, the decoding thresholds of the multiple LDPC base graphs increase as the number of decoding iterations increases, i.e., the decoding thresholds of the multiple LDPC base graphs all get worse as the number of iterations increases. In one design, the decoding thresholds of the multiple LDPC base graphs decrease as the number of decoding iterations decreases, i.e., the decoding thresholds of the multiple LDPC base graphs all get better as the number of iterations decreases. In one design, if the multiple LDPC base graphs are numbered, the decoding thresholds of the multiple LDPC base graphs increase or decrease as the number increases.

[0175] 6) The multiple LDPC base graphs have different numbers of iterations needed for decoding convergence. In one design, if the multiple LDPC base graphs are numbered, the number of iterations needed for decoding convergence of the multiple LDPC base graphs increases or decreases as the number increases.

[0176] 7) The highest code rates supported by the plurality of LDPC base graphs are different and the highest code rates supported by the plurality of LDPC base graphs are greater than the first code rate. That is, the highest code rates supported by the plurality of LDPC base graphs are all above a certain code rate, but the highest code rates supported by the plurality of LDPC base graphs are different. Exemplarily, the first code rate is the highest code rate supported by NR BG1 or NR BG2. Exemplarily, the first code rate is 0.9258 or 0.95. In one design, if the plurality of LDPC base graphs are numbered, the highest code rates supported by the plurality of LDPC base graphs are in descending order or in ascending order as the number increases.

[0177] 8) The lowest code rates supported by the plurality of LDPC base graphs are different and the lowest code rates supported by the plurality of LDPC base graphs are greater than the second code rate. That is, the lowest code rates supported by the plurality of LDPC base graphs are all above a certain code rate, but the lowest code rates supported by the plurality of LDPC base graphs are different. Exemplarily, the second code rate is the lowest code rate supported by NR BG1 or NR BG2. Exemplarily, the first code rate is 2 / 3 or 1 / 3. In one design, if the plurality of LDPC base graphs are numbered, the lowest code rates supported by the plurality of LDPC base graphs are in descending order or in ascending order as the number increases.

[0178] 9) The decoding performance of the plurality of LDPC base graphs is better than that of a base graph (such as BG1 or BG2) of the NR LDPC code in the case where the modulation order is greater than a first order and / or the MCS index is greater than a first index. That is, after being greater than a certain modulation order and / or a certain MCS index, the decoding performance of the plurality of LDPC base graphs is better than that of a base graph of the NR LDPC code. In one design, if the plurality of LDPC base graphs are numbered, the decoding performance of the plurality of LDPC base graphs is in descending order or in ascending order as the number increases.

[0179] 10) The plurality of LDPC base graphs are extracted from a base graph (such as BG1 or BG2) of the NR LDPC code. In one design, if the plurality of LDPC base graphs are numbered, the sizes of the plurality of LDPC base graphs are in descending order or in ascending order as the number increases.

[0180] 11) The plurality of LDPC base graphs are obtained by adding rows and / or columns to a base graph (such as BG1 or BG2) of the NR LDPC code. In one design, if the plurality of LDPC base graphs are numbered, the sizes of the plurality of LDPC base graphs are in descending order or in ascending order as the number increases.

[0181] In some implementations, the plurality of LDPC base graphs in the LDPC base graph set have a nesting property, that is, the plurality of LDPC base graphs in the LDPC base graph set all have a certain property, but the property of different LDPC base graphs is different.

[0182] For example, the decoding parallelism of each of the plurality of LDPC base graphs in the set of LDPC base graphs is greater than 5, but the decoding parallelism of some of the LDPC base graphs is 6, the decoding parallelism of some of the LDPC base graphs is 7, and the decoding parallelism of some of the LDPC base graphs is 10.

[0183] For another example, the maximum code rate supported by each of the plurality of LDPC base graphs in the set of LDPC base graphs is greater than 0.9167, but the maximum code rate supported by some of the LDPC base graphs is 0.9200, the maximum code rate supported by some of the LDPC base graphs is 0.9785, and the maximum code rate supported by some of the LDPC base graphs is 0.9321.

[0184] In some implementations, the method 400 can further include that the encoding device and / or the decoding device determine the set of LDPC base graphs matching the first condition according to a first condition. For example, the first condition is that the value of the second parameter is a first value, where the first value indicates that shaping is used, the encoding device and / or the decoding device obtain the LDPC base graphs supporting shaping from the stored plurality of LDPC base graphs, and form the set of LDPC base graphs, i.e., the set of LDPC base graphs described above. For example, the first condition is that the device is an IoT terminal, the encoding device and / or the decoding device obtain the LDPC base graphs supporting IoT communication from the stored plurality of LDPC base graphs, and form the set of LDPC base graphs, i.e., the set of LDPC base graphs described above.

[0185] For example, one example of determining the set of LDPC base graphs matching the first condition according to the first condition is as follows:

[0186] if the first condition is satisfied

[0187] determine BGset = {BG1, BG1’, BG1”, BG1”’, …}

[0188] end

[0189] where BGset corresponds to the set of LDPC base graphs described above.

[0190] In some implementations, the method 400 further includes that the encoding device and / or the decoding device select a first LDPC base graph from the set of LDPC base graphs according to a second condition. Wherein the second condition corresponds to different device capabilities. In other words, the encoding device or the decoding device can select an LDPC base graph from the set of LDPC base graphs that meets the capability of the current device.

[0191] In some implementations, the second condition comprises at least one of the following conditions: the code rate is in a second range, the payload size is in a third range, the capability of the device is a first capability, or the value of the second parameter is a first value.

[0192] As an example, the capability of the device is different, which can support different code rates, thus the encoding device or the decoding device can select the first LDPC base graph from the set of LDPC base graphs according to the code rate, in which case the second condition can be a code rate range. Illustratively, the code rate range can be represented using a code rate threshold value, for example, the second condition can be: code rate > code rate threshold.

[0193] Illustratively, one example of selecting the first LDPC base graph from the set of LDPC base graphs according to the second condition is shown as follows:

[0194] wherein R is the code rate, R1, R2 and R3 are code rate thresholds. When the second condition is R > R1 (i.e. the second range is R > R1), BG1 is selected from the set {BG1, BG1’, BG1’’}, i.e. the first LDPC base graph is BG1; when the second condition is R > R2 (i.e. the second range is R > R2), BG1’ is selected from the set {BG1, BG1’, BG1’’}, i.e. the first LDPC base graph is BG1’; when the second condition is R > R3 (i.e. the second range is R > R3), BG1’’ is selected from the set {BG1, BG1’, BG1’’}, i.e. the first LDPC base graph is BG1’’.

[0195] As another example, the encoding device or the decoding device can select the first LDPC base graph from the set of LDPC base graphs according to the code rate and the payload size, in which case the second condition can be a payload size range and / or a code rate range. Illustratively, the payload size range can be represented using a payload size threshold, and the code rate range can be represented using a code rate threshold value, for example, the second condition can be: code rate ≤ code rate threshold, for another example, the second condition can be: payload size ≤ payload size threshold, for another example, the second condition can be: payload size ≤ payload size threshold and code rate ≤ code rate threshold.

[0196] Illustratively, one example of selecting the first LDPC base graph from the set of LDPC base graphs according to the second condition is shown as follows:

[0197] For the initial transmission of a transport block with a code rate of R and subsequent retransmissions of that transport block, each code block of the transport block is encoded based on an LDPC basemap selected from BGset. Specifically, if the higher-layer parameter BGsetID = x, x = {1,2,3} is configured, LDPC BG2 from BGset x is selected if A ≤ 292 (i.e., the third range is A ≤ 292), or if A ≤ 3824 and R ≤ 0.67 (i.e., the third range is A ≤ 3824 and the second range is R ≤ 0.67), or if R ≤ 0.25 (i.e., the second range is R ≤ 0.25); otherwise, LDPC BG1 from BGset x is selected, where A is the payload size.

[0198] (For initial transmission of a transport block with coding rate R indicated by the MCS index according to Clause 5.1.3.1in[6,TS 38.214] and subsequent re-transmission of the same transport block, each code block of the transport block is encoded with LDPC base graph selected from the BG set according to the following:

[0199] If the higher layer parameter BGsetIdx=x is configured,x={1,2,3}:

[0200] -if A≤292,or if A≤3824and R≤0.67or if R≤0.25,LDPC base graph 2from the BG set x is used;

[0201] -otherwise,LDPC base graph 1from the BG set x is used,

[0202] where A is the payload size in Clause 7.2.1.

[0203] endif)

[0204] In this example, a condition of selecting from a given BG subset (instead of the full set) is added in the if else condition, which is a minor change to the standard.

[0205] As another example, the encoding device or the decoding device can select the first LDPC base graph from the set of LDPC base graphs according to a value of a second parameter, in which case the second condition can be the value of the second parameter. The description of the second parameter can refer to the foregoing and will not be described in detail.

[0206] Taking the second parameter as the high-level parameter supportedShapingModulationOrderDL or supportedShapingModulationOrderUL as an example, if supportedShapingModulationOrderDL or supportedShapingModulationOrderUL is not empty, the encoding device and / or the decoding device are set to the shaping modulation variable I Shape = 1; otherwise, the shaping modulation variable I Shape = 0. The value of the shaping modulation variable I Shape is different, and the encoding chain is also different.

[0207] Exemplarily, one example of selecting the first LDPC base graph from the set of LDPC base graphs according to the second condition is as follows:

[0208] if I Shape == 1

[0209] Select a BG supporting shaping modulation from the set of BGs as the LDPC base graph;

[0210] end

[0211] wherein I Shape is the shaping modulation variable. When the value of the second parameter is a non-empty value, I Shape is equal to 1, and the encoding device and / or the decoding device select a BG supporting shaping modulation from the set of BGs as the LDPC base graph.

[0212] In some implementations, the method 400 can further include that the encoding device and / or the decoding device determine a rate matching manner according to a second condition, and the description of the second condition can refer to the foregoing and will not be described in detail. Exemplarily, the rate matching includes at least one of puncturing, shortening, or repetition.

[0213] Taking the second condition as the code rate range as an example, one example of selecting the first LDPC base graph from the set of LDPC base graphs and determining the puncturing manner according to the second condition is as follows:

[0214] wherein R is a code rate, R1, R2 and R3 are code rate thresholds, I Punc is an identifier of puncturing manner, I Punc = 0 means no puncturing for large column weight, I Punc = 1 means puncturing 1 column for large column weight, I Punc = 2 means puncturing 2 columns for large column weight. When the second condition is R > R1, the encoding device and / or the decoding device selects BG1 from the set {BG1, BG1', BG1"} and determines that the number of punctured columns is 2; when the second condition is R > R2, the encoding device and / or the decoding device selects BG1' from the set {BG1, BG1', BG1"} and determines that the number of punctured columns is 1; when the second condition is R > R3, the encoding device and / or the decoding device selects BG1" from the set {BG1, BG1', BG1"} and determines that the number of punctured columns is 0. The maximum number of iterations required for the base graph in the set of LDPC base graphs satisfying the first condition to converge can be different, and the base graph designed for low iteration number has better performance without puncturing for large column weight, while the base graph designed for high iteration number has better performance with puncturing 2 columns for large column weight.

[0215] Taking the value of the second condition as an example, one example of selecting the first LDPC base graph from the set of LDPC base graphs according to the second condition and determining the puncturing manner is shown as follows:

[0216] if I Shape == 1;

[0217] I Punc = 2; BGi == BG1'

[0218] else I Punc = 1; BGi == BG1

[0219] wherein I Shape is an identifier of shaped modulation, I Shape = 1 indicates using shaped modulation, I Shape = 0 indicates not using shaped modulation, I Punc is an identifier of puncturing manner, I Punc = 0 means no puncturing for large column weight, I Punc = 1 means puncturing 1 column for large column weight, I Punc = 2 means puncturing 2 columns for large column weight. When I Shape is 1, the encoding device and / or the decoding device selects BG1' supporting shaped modulation from the set {BG1, BG1', BG1"} and determines that the number of punctured columns is 2; otherwise, the encoding device and / or the decoding device selects BG1 from the set {BG1, BG1', BG1"} and determines that the number of punctured columns is 1.

[0220] In some implementations, the method 400 can further include determining, by the encoding device and / or the decoding device, the interleaving manner (or bit interleaver) according to the second condition.

[0221] Taking the value of the second condition as an example, one example of determining the interleaving manner according to the second condition is shown as follows:

[0222] The bit sequence e0,e1,e2,...,e E-1 is interleaved to bit sequence f0,f1,f2,...,f E-1 , according to the following, where the value of Q Shape is the identification of the shaping modulation, I Shape = 1 indicates that the shaping modulation is used, I Shape = 0 indicates that the shaping modulation is not used, Q m is the modulation order: where W(i) is the i-th value of the sequence W, if I Shape = 0 and Q m = 6, then W = [0 1 2 3 4 5], if I Shape = 0 and Q m = 8, then W = [0 1 2 3 4 5 6 7], if I Shape = 0 and Q m = 10, then W = [0 1 2 3 4 5 6 7 8 9], if I Shape = 1 and Q m = 6, then W = [2 3 0 1 4 5] (shape 1 bit), if I Shape = 1 and Q m = 8, then W = [4 5 0 1 2 3 6 7] (shape 2 bits) or [2 3 0 1 4 5 6 7] (shape 1 bit), if I Shape = 1 and Q m = 10, then W = [6 7 0 1 2 3 4 5 8 9] (shape 3 bits), [4 5 0 1 2 3 6 7 8 9] (shape 2 bits) or [2 3 0 1 4 5 6 7 8 9] (shape 1 bit).

[0223] (The bit sequence e0,e1,e2,...,e E-1 is interleaved to bit sequence f0,f1,f2,...,f E-1 ,according to the following, where the value of Qm is the modulation order:

[0224] Another example of determining the interleaving manner according to the second condition is shown as follows, taking the value of the second condition as an example:

[0225] The bit sequence e0,e1,e2,...,e E-1 is interleaved to bit sequence f0,f1,f2,...,f E-1 , according to the following, where the value of Q Shape is the modulation order: if I Shape = 1, then Shape = 0, then m Shape Shape where W(i) is the i-th value of sequence W, if Q m = 6, then W = [2 3 0 1 4 5], if Q m = 8, then W = [4 5 0 1 2 3 6 7] or [2 3 0 1 4 5 6 7], if Q m = 10, then W = [6 7 0 1 2 3 4 5 8 9], [4 5 0 1 2 3 6 7 8 9] or [2 3 0 1 4 5 6 7 8 9].

[0226] (The bit sequence e0,e1,e2,...,e E-1 is interleaved to bit sequence f0,f1,f2,...,f E-1 , according to the following, where the value of Q m is the modulation order.W(i)is the i-th value of sequence W,and W(i)is dependent on Qm and the number of shaped bit:

[0227] ​​​​In some embodiments of the present application, the encoding device and / or the decoding device can further directly select the LDPC base graph according to the second parameter, the second parameter being used to indicate whether to use the shaped modulation, and the description of the second parameter can refer to the above, and will not be described in detail. For example, the LDPC base graph is designed separately for the shaped modulation, and when the second parameter indicates to use the shaped modulation, the encoding device and / or the decoding device can select the LDPC base graph as the first LDPC base graph according to the second parameter, for encoding and / or decoding.

[0228] The method embodiments provided by the present application are described in detail above in combination with FIG. 1 to FIG. 5, and the device embodiments of the present application will be described below in combination with FIG. 6 to FIG. 8.

[0229] It can be understood that, in order to implement the functions in the above embodiments, the devices in FIG. 6 to FIG. 8 include the hardware structure and / or software module for performing the respective functions. These devices can be used to implement the functions of the encoding device or the decoding device in the above method embodiments, and thus can also achieve the beneficial effects possessed by the above method embodiments. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of the examples described in the embodiments disclosed in the present application, the present application can be realized in the form of hardware or a combination of hardware and computer software. Whether a certain function is implemented in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0230] FIG. 6 is a structural schematic diagram of a possible device according to an embodiment of the present application.

[0231] The embodiments of the present application can divide the functional units of the encoding device or the decoding device according to the above method examples, for example, each functional unit can be divided according to each function, or two or more functions can be integrated in one unit, and each function can be realized in the form of hardware or in the form of a software functional module. It should be noted that the division shown in FIG. 6 is illustrative, and is only a logical functional division, and another division mode can be used in actual implementation.

[0232] As shown in FIG. 6, the device 10 includes a transceiver unit 11 and a processing unit 12.

[0233] When the apparatus 10 is configured to implement the functions of the encoding device in the method embodiments described above, the transceiver unit 11 is configured to perform the transceiving steps of the encoding device, such as step 403, and the processing unit 12 is configured to perform the processing steps 401 and 402 of the encoding device. When the apparatus 10 is configured to implement the functions of the decoding device in the method embodiments described above, the transceiver unit 11 is configured to perform the transceiving steps of the decoding device, such as step 403, and the processing unit 12 is configured to perform the processing steps of the decoding device, such as step 404.

[0234] Optionally, the apparatus 10 further comprises a storage unit 13 configured to store instructions and / or data.

[0235] For more details of the transceiver unit 11 and the processing unit 12 described above, please refer to the descriptions in the method embodiments described above, which will not be repeated here.

[0236] FIG. 7 is another structural schematic diagram of a possible apparatus provided by the embodiments of the present application. As shown in FIG. 7, the apparatus 20 comprises a processor 21. The processor 21 is coupled with a memory 23 configured to store instructions. When the apparatus 20 is configured to implement the methods described above, the processor 21 is configured to execute the instructions in the memory 23 to implement the functions of the processing unit 12 described above.

[0237] Optionally, the apparatus 20 further comprises the memory 23.

[0238] Optionally, the apparatus 20 further comprises an interface circuit 22. The interface circuit can be referred to as a communication interface. The processor 21 and the interface circuit 22 are coupled with each other. It can be understood that the interface circuit 22 can be a transceiver or an input / output interface. When the apparatus 20 is configured to implement the methods described above, the processor 21 is configured to execute the instructions to implement the functions of the processing unit 12 described above, and the interface circuit 22 is configured to implement the functions of the transceiver unit 11 described above.

[0239] Optionally, the apparatus 20 can be an encoding device or a decoding device, and correspondingly, the interface circuit can be a transceiver.

[0240] Optionally, the apparatus 20 can be a chip applied to an encoding device or a decoding device, and correspondingly, the interface circuit can be an input / output interface.

[0241] Exemplarily, when the apparatus 20 is a chip applied to an encoding device or a decoding device, the chip implements the functions of the encoding device or the decoding device in the method embodiments described above. The chip receives information from other modules (such as a radio frequency module or an antenna) in the encoding device or the decoding device, and the information is sent by other devices to the encoding device or the decoding device; or the chip sends information to other modules (such as a radio frequency module or an antenna) in the encoding device or the decoding device, and the information is sent by the encoding device or the decoding device to other devices.

[0242] FIG. 8 is a schematic diagram of a chip system according to an embodiment of the present application. The chip system 30 (or also referred to as a processing system) includes a logic circuit 31 and an input / output interface 32.

[0243] The logic circuit 31 can be a processing circuit in the chip system 30. The logic circuit 31 can be coupled to a storage unit, and invoke instructions in the storage unit, so that the chip system 30 can implement the methods and functions of the embodiments of the present application. The input / output interface 32 can be an input / output circuit in the chip system 30, and output processed information of the chip system 30, or input data or signaling information to be processed into the chip system 30 for processing.

[0244] As an option, the chip system 30 can further include a storage unit.

[0245] As an option, the chip system 30 is configured to implement operations performed by the encoding device or the decoding device in the above various method embodiments.

[0246] For example, the logic circuit 31 is configured to implement processing-related operations performed by the encoding device or the decoding device in the above method embodiments; and the input / output interface 32 is configured to implement sending and / or receiving-related operations performed by the encoding device or the decoding device in the above method embodiments.

[0247] The present application further provides a communication apparatus, including a processing circuit and a storage unit. The storage unit is configured to store computer programs or instructions and / or data. The processing circuit is configured to execute the computer programs or instructions stored in the storage unit, or read the data stored in the storage unit, to implement the methods in the above various method embodiments. Optionally, the processing circuit is one or more. Optionally, the communication apparatus includes the storage unit. Optionally, the storage unit is one or more. Optionally, the storage unit is integrated with the processing circuit, or is separately arranged.

[0248] The present application further provides a chip, including a processing circuit and a storage unit. The storage unit is configured to store computer programs or instructions. The processing circuit is configured to execute the computer programs or instructions stored in the storage unit, to implement the methods performed by the encoding device or the decoding device in the above various method embodiments. The storage unit can be located in the chip, or can be independent of the chip, and located outside the chip, which is not limited herein.

[0249] The present application further provides a computer readable storage medium, which stores computer instructions for implementing the methods performed by the encoding device or the decoding device in the above various method embodiments.

[0250] The application further provides a computer program product comprising instructions which, when executed by a computer, implement the method performed by the encoding device or the decoding device in any of the method embodiments.

[0251] The application further provides a computer program which, when executed by a computer, implements the method performed by the encoding device or the decoding device in any of the method embodiments.

[0252] The application further provides a communication system comprising at least one of the encoding device or the decoding device in any of the embodiments.

[0253] The explanations and advantages of the related content in any of the apparatuses provided above can refer to the corresponding method embodiments provided above, and will not be repeated here.

[0254] It can be understood that the processing circuit in the embodiments of the application can be a processor or a circuit in the processor for performing processing operations, which can include one or a combination of a central processing unit (CPU), a digital signal processor (DSP), a microprocessor unit (MPU), a microcontroller unit (MCU), a graphics processing unit (GPU), a field programmable gate array (FPGA), an artificial intelligence processor (AI processor), or a neural processing unit (NPU).

[0255] The above-mentioned memory can include one or more of the following storage media: random access memory (RAM), static RAM (SRAM), dynamic RAM (DRAM), phase-change memory (PCM), resistive RAM (ReRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FRAM), cache, register, read-only memory (ROM), flash memory, erasable programmable ROM (EPROM), hard disk, etc. In one example, computer program instructions for implementing the above-described embodiments can be stored on a non-volatile memory, such as at least part of the above-mentioned memory 23 or storage unit (e.g., one or more of ROM, flash memory, EPROM, or hard disk).

[0256] The method steps in the embodiments of the present application can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, which can be stored in a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an erasable programmable read-only memory, an electrically erasable programmable read-only memory, a register, a hard disk, a mobile hard disk, a compact disc read-only memory (CD-ROM), or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor, so that the processor can read information from, and write information to, the storage medium. Of course, the storage medium can also be part of the processor. The processor and the storage medium can be located in an application specific integrated circuit (ASIC). In addition, the ASIC can be located in a coding device or a decoding device. Of course, the processor and the storage medium can also exist as discrete components in the coding device or the decoding device.

[0257] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer programs or instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are performed. The computer can be a general purpose computer, a special purpose computer, a computer network, a network device, a user equipment or other programmable apparatus. The computer programs or instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the computer programs or instructions can be transferred from one website site, computer, server or data center to another website site, computer, server or data center through wired or wireless manner. The computer readable storage medium can be any available medium accessible by a computer or a data storage device such as a server, data center and the like integrated with one or more available media. The available media can be a magnetic medium, such as a floppy disk, a hard disk, a magnetic tape; an optical medium, such as a digital video disc; and a semiconductor medium, such as a solid state disk.

[0258] In various embodiments of the present application, the terms and / or descriptions of different embodiments are consistent and can be referred to each other if there is no special description and logical conflict. The technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0259] Unless otherwise defined, all technical and scientific terms used in the embodiments of the present application have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used in the present application are only for the purpose of describing the specific embodiments and are not intended to limit the scope of the present application. It should be understood that the above is for illustration only, and the examples above are only to help those skilled in the art to understand the embodiments of the present application, and are not intended to limit the embodiments of the present application to the specific values or specific scenarios shown. Those skilled in the art can obviously make various equivalent modifications or changes according to the examples given above, and such modifications and changes also fall within the scope of the embodiments of the present application.

Claims

1. An information processing method characterized by comprising: The method comprises: obtaining an information bit sequence; encoding the information bit sequence according to a first LDPC base graph to obtain a codeword sequence, wherein the first LDPC base graph is selected from an LDPC base graph set matching a first condition.

2. The method of claim 1, wherein the first condition corresponds to a low-power device or a non-low-power device; or the first condition corresponds to a high-throughput device or a non-high-throughput device; or the first condition corresponds to a low-power scenario or a non-low-power scenario; or the first condition corresponds to a high-throughput scenario or a non-high-throughput scenario.

3. The method of claim 2, wherein, The first condition comprises at least one of the following conditions: a type of the device is a first type; a capability of the device is a first capability; a decoding mode of the device is a first decoding mode; a power consumption mode of the device is a first power consumption mode; an identity of the device is a first identity; a decoding complexity of the device is a first decoding complexity; a complexity of a receiver of the device is a first complexity; an application scenario is a first application scenario; a value of a first parameter is within a first range; a value of a second parameter is a first value.

4. The method of claim 3, wherein, The first parameter comprises at least one of the following parameters: a buffer status report index; a buffer size level; a maximum number of code block groups in each transport block; a transport block size; a number of code blocks contained in a transport block; a modulation and coding strategy index; a code rate.

5. The method of any one of claims 1 to 4, wherein the LDPC base graph set comprises a plurality of LDPC base graphs, the plurality of LDPC base graphs comprises the first LDPC base graph, and the plurality of LDPC base graphs has at least one of the following characteristics: maximum decoding parallelisms supported by the plurality of LDPC base graphs are different; maximum lifting values supported by the plurality of LDPC base graphs are different; numbers of columns of the plurality of LDPC base graphs are different; numbers of rows of the plurality of LDPC base graphs are different; minimum decoding thresholds of the plurality of LDPC base graphs are different; iteration numbers required for decoding convergence of the plurality of LDPC base graphs are different; maximum code rates supported by the plurality of LDPC base graphs are different, and the maximum code rates supported by the plurality of LDPC base graphs are greater than a first code rate; minimum code rates supported by the plurality of LDPC base graphs are different, and the minimum code rates supported by the plurality of LDPC base graphs are greater than a second code rate; in a case where a modulation order is greater than a first order and / or a modulation and coding strategy index is greater than a first index, decoding performance of the plurality of LDPC base graphs is better than that of a base graph of a new radio (NR) LDPC code; the plurality of LDPC base graphs are extracted from the base graph of the NR LDPC code; the plurality of LDPC base graphs are obtained by adding rows and / or columns to the base graph of the NR LDPC code.

6. The method of claim 5, wherein the first code rate is 0.9258 or 0.95; and / or the second code rate is 2 / 3 or 1 / 3.

7. The method according to any one of claims 1 to 6, characterized in that, The method further comprises: selecting the first LDPC base graph from the LDPC base graph set according to a second condition.

8. The method of claim 7, wherein, The method further comprises: According to the second condition, a rate matching manner is determined, the rate matching comprising at least one of puncturing, shortening or repetition.

9. The method according to claim 7 or 8, characterized in that, The method further comprises: According to the second condition, an interleaving manner is determined.

10. The method according to any one of claims 7 to 9, characterized in that, The second condition comprises at least one of the following conditions: a code rate is in a second range; a payload size is in a third range; a capability of the device is a first capability; a value of the second parameter is a first value.

11. The method of claim 3, 4, or 10, wherein, The second parameter is a higher layer parameter and is used to indicate whether shaping modulation is used.

12. An information processing method characterized by comprising: The method comprises: obtaining a symbol sequence; decoding the symbol sequence according to a first LDPC base graph to obtain an information bit sequence, wherein the first LDPC base graph is selected from a set of LDPC base graphs matched with a first condition.

13. The method of claim 12, wherein: the first condition corresponds to a low power consumption device or a non-low power consumption device; or the first condition corresponds to a high throughput device or a non-high throughput device; or the first condition corresponds to a low power consumption scenario or a non-low power consumption scenario; or the first condition corresponds to a high throughput scenario or a non-high throughput scenario.

14. The method of claim 13, wherein, The first condition comprises at least one of the following conditions: a type of the device is a first type; a capability of the device is a first capability; a decoding mode of the device is a first decoding mode; a power consumption mode of the device is a first power consumption mode; an identity of the device is a first identity; a decoding complexity of the device is a first decoding complexity; a complexity of a receiver of the device is a first complexity; an application scenario is a first application scenario; a value of the first parameter is in a first range; a value of the second parameter is a first value.

15. The method of claim 14, wherein, The first parameter comprises at least one of the following parameters: a buffer status report index; a buffer size level; a maximum number of code block groups in each transport block; a transport block size; a number of code blocks contained in a transport block; a modulation and coding strategy index; a code rate.

16. The method of any one of claims 12 to 15, wherein: the set of LDPC base graphs comprises a plurality of LDPC base graphs, the plurality of LDPC base graphs comprising the first LDPC base graph, and the plurality of LDPC base graphs having at least one of the following characteristics: the plurality of LDPC base graphs support different maximum decoding parallelisms; the plurality of LDPC base graphs support different maximum lifting values; the plurality of LDPC base graphs have different numbers of columns; the plurality of LDPC base graphs have different numbers of rows; the plurality of LDPC base graphs have different minimum decoding thresholds; the plurality of LDPC base graphs require different numbers of iterations for decoding convergence; the plurality of LDPC base graphs support different maximum code rates, and the plurality of LDPC base graphs support a maximum code rate greater than a first code rate; the plurality of LDPC base graphs support different minimum code rates, and the plurality of LDPC base graphs support a minimum code rate greater than a second code rate; in a case where a modulation order is greater than a first order and / or a modulation and coding strategy index is greater than a first index, the plurality of LDPC base graphs have better decoding performance than a base graph of a new radio, NR, LDPC code; the plurality of LDPC base graphs are extracted from a base graph of the NR LDPC code. The plurality of LDPC base graphs are obtained by adding rows and / or columns to a base graph of an NR LDPC code.

17. The method of claim 16, wherein, the first code rate is 0.9258 or 0.95; and / or, the second code rate is 2 / 3 or 1 / 3.

18. The method according to any one of claims 12 to 17, characterized in that, The method further comprises: selecting the first LDPC base graph from the set of LDPC base graphs according to a second condition.

19. The method of claim 18, wherein, The method further comprises: determining a rate matching manner according to the second condition, the rate matching comprising at least one of puncturing, shortening or repetition.

20. The method of claim 18 or 19, wherein, The method further comprises: determining an interleaving manner according to the second condition.

21. The method of any one of claims 18-20, wherein, The second condition comprises at least one of the following conditions: a code rate is within a second range; a payload size is within a third range; a capability of a device is a first capability; a value of a second parameter is a first value.

22. The method of claim 14, 15, or 21, wherein, The second parameter is a higher layer parameter and is used to indicate whether to use shaping modulation.

23. A communications device, characterized by A module or unit for performing the method of any of claims 1-22.

24. A communications device, characterized by A processor and an interface circuit for receiving signals from other communication devices outside the communication device and transmitting signals to the processor or sending signals from the processor to other communication devices outside the communication device, the processor being used to implement the method of any of claims 1-22 through a logic circuit or an execution code instruction.

25. The communication apparatus according to claim 24, wherein, The communication device is a chip or a chip system.

26. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions, when the computer program or instructions are executed by a communication device, the method of any of claims 1-22 is implemented.

27. A computer program product, characterised in that, A computer program is included, when the computer program is run, the method of any of claims 1-22 is implemented.

28. A communication system, characterized by A computer program product is included, and the computer program product comprises a computer readable medium having stored thereon computer executable instructions that, when executed by a processor of a computer system, cause the computer system to perform the method of any of claims 1-22. A computer program product is included, and the computer program product comprises a computer readable medium having stored thereon computer executable instructions that, when executed by a processor of a computer system, cause the computer system to perform the method of any of claims 1-22. A computer program product is included, and the computer program product comprises a computer readable medium having stored thereon computer executable instructions that, when executed by a processor of a computer system, cause the computer system to perform the method of any of claims 1-22. A computer program product is included, and the computer program product comprises a computer readable medium having stored thereon computer executable instructions that, when executed by a processor of a computer system, cause the computer system to perform the method of any of claims 1-22.

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