Digital control circuit and method of LED drivers to eliminate flickering

Abstract

The proposed device and method are configured to use an LED driver to remove the low frequency flicker of the applied DC voltage to the LED load and adjusting the average LED load current over a short time period, such as a single duty cycle period. The LED driver comprises a pulse width modulation flicker removal circuit (PWM FRC), a controller and a Power Factor Corrector (PFC) circuit. The PFC circuit is connected in parallel with an AC grid source and converts the AC power to DC power which is supplied to the PWM FRC. The PWM FRC comprises a current sensing device and a switch, the switch can be modulated to control a duty cycle of the LED load. The controller modulates the duty cycle, through gating signals communicated to the switch, to regulate the average LED current to remove low frequency ripples.

Description

DIGITAL CONTROL CIRCUIT AND METHOD OF LED DRIVERS TO ELIMINATE FLICKERINGCROSS-REFERENCE

[0001] This application is a non-provisional of, and claims all benefit, including priority to, US Application No. 63 / 699,145, filed September 25, 2024, and entitled “Digital Control Circuit and Method of LED Drivers to Eliminate Flickering”. The contents of which are herein incorporated by reference in its entirety.FIELD

[0002] Embodiments of the present disclosure relate to the field of power electronic circuits, and more specifically, embodiments relate to devices, systems and methods for improved LED current load switching.INTRODUCTION

[0003] The output voltage of a single-stage AC to DC converter contains double line frequency AC ripple (100Hz or 120Hz). This ripple may result in flicker for an LED driver. Low frequency flickering can harm the human eye leading to health issues and reduces performance quality of the LED.SUMMARY

[0004] An LED load cannot be directly connected to an AC power grid as the nominal voltage level (usually 24VDC or 48VDC) of the LED load is much lower than the nominal voltage level of the AC grid (usually 110VAC or 220VAC). Further, the AC voltage from the AC grid alternates with a frequency typically ranging between 50 to 60Hz. The frequency of the AC grid will cause the LED load current to be zero during the negative half line cycle of the AC voltage, because the diode does not conduct in the reverse voltage. As a result, the LED load will be ON for a half cycle and OFF for the other half cycle, and as the line frequency is very low, it will cause severe low frequency flickering. An AC-to-DC adaptor, known as an LED driver may be used to convert the AC grid voltage to the appropriate voltage for the LED load. However, the converted DC voltage may still contain elements of the AC grid voltage, specifically, low frequency ripple which may impact the performance and- 1 -CAN_DMS: \1008239681safety of the LED load. Therefore, a device and method to control the ripple amplitude of the LED voltage (VLED) to eliminate the low frequency flickering is desired.

[0005] The proposed device and method are used to remove the low frequency flicker of the applied DC voltage to the LED load and adjusting the average LED load current over a short time period, such as a single switching period (for example, within micro seconds). The proposed device and method implement a pulse width modulation flicker removal circuit (PWM FRC) which reduces the low frequency ripple in the lumen output of the LED load. The PWM FRC is implemented within an LED driver which further comprises a Power Factor Corrector (PFC) circuit, the PFC circuit contains a plurality of switches and acts as an AC- DC converter. The PFC circuit is connected in parallel with the AC grid source and converts the AC voltage into a DC voltage which is fed into the PWM FRC. The conversion from AC to DC power by the PFC circuit does not completely remove all of the AC elements from the power source, which causes the DC voltage which flows to the LED load to contain low frequency ripple.

[0006] The PWM FRC contains one or more switches and one or more current sensing devices and is controlled by a digital or analog controller. The controller contains a current sensor which measures an LED instant current from the current sensing device, the LED instant current being averaged by the controller in order to generate an average LED load current. The controller is also configured to generate an output gating signal to the one or more switches in order to modulate a duty cycle of the LED load to remove low frequency ripple in the LED load current. When the instant DC voltage reaches its maximum fluctuation voltage value, the duty cycle may be reduced compared to the duty cycle when the instant DC voltage reaches its minimum fluctuation voltage value.

[0007] In this disclosure, the duty cycle is defined as a ratio of the duration of the ON-time of the switch over the duration of the switching period.

[0008] In some embodiments, the controller modulates the duty cycle by adjusting the duration of the ON-state of the switch while the switching period remains constant. In another embodiment, the controller modulates the duty cycle by adjusting the switching period while the duration of the ON-state or OFF-state remains constant.- 2 -CAN_DMS: \1008239681

[0009] The controller is configured to control the duty cycle of the PWM FRC switch with the objective of regulating the average LED load current at each switching period to be equal to the nominal (or desired) current of the LED load. As mentioned, the DC voltage supplied by the PFC circuit contains low frequency ripples which, while maintaining a constant average voltage, result in fluctuations in the instant current supplied to the LED load. Therefore, when the instant DC voltage is higher than the nominal LED voltage, the controller can reduce the duty cycle to achieve a desired LED load current, however, when the instant DC voltage is below the nominal LED voltage, the duty cycle can be fully saturated (i.e. 100%) but there may still be a dip in the instant LED current below the nominal LED current. However, relying solely on modulating the duty cycle to reduce the low frequency ripple in the current supplied to the LED load may significantly reduce the low frequency ripple. In some embodiments, the modulation of the duty cycle may be combined with duty cycle compensation which may further reduce the low frequency ripple in the current supplied to the LED load.

[0010] The minimum value of the DC voltage should be slightly (-0.5V) higher than the LED nominal voltage, as when the instant DC voltage is below the nominal LED voltage, the duty cycle can be fully saturated (i.e. 100%) but there may still be a dip in the instant LED current below the nominal LED current. This dip in the current causes low frequency flicker. Therefore, in order to prevent this duty cycle saturation and the current dip, the minimum DC voltage should be higher than the LED nominal voltage. Further, the minimum value of the DC voltage should only exceed the LED nominal voltage by 0%-10%, otherwise, when the DC voltage reaches its peak, the difference between the DC voltage and the LED nominal voltage may cause severe overvoltage / overcurrent issues to the LED load.

[0011] Duty cycle compensation reduces the peak-to-peak value of the duty cycle, as compared to the uncompensated duty cycle. The controller may be configured to implement duty cycle compensation through modulation of the at least one switch or through modulation of the reference current of the LED load. Duty cycle compensation may be implemented by either reducing the maximum duty cycle (i.e. when the instant DC voltage is at a minimum), or increasing the minimum duty cycle (i.e. when the instant DC voltage is at a maximum). The compensated duty cycle is adjusted to produce a ripple in the average- 3 -CAN_DMS: \1008239681LED current which is in antiphase with the small lumen ripple that may be present from the dip in the instant LED current below the nominal LED current.

[0012] The proposed device and method for the reduction of low frequency ripple in lumen may be particularly important during start up, as it may provide a gradual transitions to the desired brightness and protect against overvoltage / overcurrent. For example, the controller may be configured to initiate start-up of the LED load by initially turning the at least one switch to the ON-state and then gradually increasing the input voltage from the PFC circuit until the minimum fluctuating voltage value of the input voltage is above a nominal voltage of the LED load. Either simultaneously with the gradual increase of the input voltage, or once the input voltage has stabilized, the controller may also be configured to determine the average LED current by averaging a plurality of instant LED current values, received from the current sensor, over the duration of one cycle of the DC voltage.

[0013] In some embodiments, the determined average LED current is set by the controller as the nominal LED current for the LED load. In a further embodiment, the controller may gradually increase the DC voltage supplied by the PFC circuit until the minimum DC voltage value is equal to the nominal LED load voltage. In another embodiment, the controller may gradually increase the DC voltage supplied by the PFC circuit until the maximum duty cycle value is within the range of 95%-99%.

[0014] Structural components include, but are not limited to a control circuit comprising a connection to an AC grid source, an LED driver circuit and an LED load. The LED driver circuit containing a PFC circuit coupled in parallel with the AC grid connection and converting the AC grid voltage into a DC voltage, a PWM FRC connected in series with the PFC circuit and having at least one current sensing device and at least one switch connected in series. The PWM FRC is connected in series with the LED load and supplies DC power, which it receives from the PFC circuit, to the LED load. A controller is electrically coupled to the PWM FRC through two nodes, the first node is a voltage sensor located at the current sensing device and provides an instant current value for the controller, the second node is a gating control at the at least one switch and provides a gating signal for the at least one switch.- 4 -CAN_DMS: \1008239681

[0015] In some embodiments, the controller may be a digital controller which is communicatively coupled to a second digital controller. The second digital controller may contain an AC current and voltage sensor coupled to the AC grid connection, and a DC voltage sensor coupled to the PWM FRC. The second digital controller is configured to output gating signals to a plurality of switches within the PFC to control the DC voltage supplied to the PWM FRC.

[0016] In some embodiments, the controller may be an analog controller which contains a low pass filter, a current compensator, a current integrator and a pulse generator. The low pass filter is coupled to the voltage sensor, and generates an averaged LED load current by averaging a measured load current of the LED load from the voltage sensor. The current compensator is coupled to the output of the low pass filter, and generates an LED current control signal based on a comparison of a desired reference current with the averaged LED load current. The current integrator is coupled to the output of the voltage sensor, and generates an current waveform based on the integral of the measured load current of the LED load. The pulse generator is coupled to the output of the current integrator and current compensator, and generates a gate signal for the at least one switch based on a comparison of the current waveform generated by the current integrator and the LED current control signal generated by the current compensator.

[0017] The system and method are configured to interoperate for a wide range of LED specifications and use cases. The proposed system and method can be used for an LED rated at or below the rated power and voltage of the LED driver. The system and method can improve the performance and safety of a single LED, and can also be implemented in residential and industrial settings where a plurality of LEDs are strung together into a chain.DESCRIPTION OF THE FIGURES

[0018] In the figures, embodiments are illustrated by way of example. It is to be expressly understood that the description and figures are only for the purpose of illustration and as an aid to understanding.

[0019] Embodiments will now be described, by way of example only, with reference to the attached figures, wherein in the figures:- 5 -CAN_DMS: \1008239681

[0020] FIG. 1A is a circuit topology of a Light Emitting Diode (LED) symbol and its equivalent electrical circuit.

[0021] FIG. 1B is a circuit topology of LEDs connected in series and parallel to make LED strings, strips and / or light bulbs.

[0022] FIG. 2 is a schematic diagram of an LED driver operating as an interface between an AC grid and an LED load.

[0023] FIG. 3 is a circuit topology of an example LED driver having a PFC stage.

[0024] FIG. 4 is a waveform diagram of the LED driver having a PFC stage for the desired lac(t) in respect of Vac(t).

[0025] FIG. 5 is a circuit topology of an example LED driver having PFC and FRC stages.

[0026] FIG. 6A is a circuit topology of an example LED driver having PFC and FRC stages, the FRC stage being a flyback converter.

[0027] FIG. 6B is a circuit topology of an example LED driver having PFC and FRC stages, the FRC stage being an LLC resonant converter.

[0028] FIG. 7 is a waveform diagram of the input voltage, current and power waveforms, VDC and LED voltage, and current for the LED driver having PFC and FRC stages.

[0029] FIG. 8 is a circuit topology of an example LED driver having a PFC stage and PWM FRC stage.

[0030] FIG. 9 is a circuit topology of an example LED driver having an LLC single-stage PFC and PWM FRC stage.

[0031] FIG. 10A is a waveform diagram of a LED current and lumen where the current is pure DC (D=100%) which is equal to the average DC value.- 6 -CAN_DMS: \1008239681

[0032] FIG. 10B is a waveform diagram of a current and lumen in an LED load where the LED instant current is raised to 1.25*li_ED_avg, but the duty cycle is decreased to 80% to give the same average current.

[0033] FIG. 10C is a waveform diagram of a current and lumen in an LED load where the LED instant current is increased to 2*li_ED_avg, but the duty cycle is decreased to 50% to give the same average current.

[0034] FIG. 10D is a waveform diagram of a current and lumen in an LED load where the peak current is 3*lLED_avgand the duty cycle is set to 67% to give the same average current.

[0035] FIG. 10E is a waveform diagram of a current and lumen in an LED load with an arbitrary current waveform with an appropriate duty cycle to retain the average current

[0036] FIG. 11 A is a waveform diagram of an actual voltage waveform, VDc(t), of a single- stage PFC, the pulse pattern generated for the PWM FRC switch (VDrive), and the resultant instant and average current of an LED load.

[0037] FIG. 11 B is a generated pulse diagram under a constant frequency control regime of the PWM FRC stage within an LED driver (VDrive), and the resultant instantaneous and average LED current.

[0038] FIG. 11 C is a generated pulse diagram under a constant on-time regime of the PWM FRC stage within an LED driver (VDrive), and the resultant instantaneous and average LED current.

[0039] FIG. 12 is a circuit topology of an analog control for the PWM FRC.

[0040] FIG. 13 is a waveform diagram for an analog control circuit in a first condition (Voc(t) is at its maximum value); second condition (Voc(t) is at its average value); and third condition (Voc(t) is at its minimum value).

[0041] FIG. 14A is a circuit topology of a proposed digital control section of a PWM FRC stage, for variable TON.- 7 -CAN_DMS: \1008239681

[0042] FIG. 14B is an ideal and actual waveform diagram of an LED load current with time stamps for tasks executed by a secondary MCU within a PWM FRO Digital Controller, for variable TON.

[0043] FIG. 15A is a circuit topology of a proposed digital control section of a PWM FRC stage for constant TON and variable TOFF.

[0044] FIG. 15B is an ideal and actual waveform diagram of an LED load with time stamps for tasks executed by a secondary MCU within a PWM FRC Digital Controller.

[0045] FIG. 16 is a detailed circuit topology of a proposed digital control section of an LLC PFC stage and PWM FRC stage for constant TON and variable TOFF.

[0046] FIG. 17A is a waveform diagram of a load current, DC line voltage and gate voltage when an LED driver sets D=100%.

[0047] FIG. 17B is a waveform diagram of a DC link voltage, and instantaneous and average LED current, when the drive sets D=10%.

[0048] FIG. 18A is a waveform diagram of a load current, DC link voltage and gate voltage when a DC link average voltage is equal to the LED load nominal voltage.

[0049] FIG. 18B is a waveform diagram of a load current, DC link voltage and gate voltage when a DC link average voltage is slightly higher than a LED load nominal voltage, but its minimum is still lower than an LED load nominal voltage.

[0050] FIG. 18C is a waveform diagram of a load current, DC link voltage and gate voltage when a DC link voltage is always higher than a LED load nominal voltage.

[0051] FIG. 19A is a waveform diagram of an LLC PFC output voltage, pulse pattern of a switch, duty cycle value, LED load current and LED lumen average value under an uncompensated duty cycle.

[0052] FIG. 19B is a control block schematic for compensating a duty cycle value.- 8 -CAN_DMS: \1008239681

[0053] FIG. 19C is a waveform diagram of a duty cycle value, LED load current and LED lumen average value under a compensated duty cycle.

[0054] FIG. 19D is a waveform diagram of a DC link voltage, gate voltage, and duty cycle value under a first, second and third compensation scheme.

[0055] FIG. 20A is a waveform diagram of an LLC PFC output voltage, duty cycle value, LED load current and LED lumen average value with no duty cycle compensation .

[0056] FIG. 20B is a waveform diagram of an LLC PFC output voltage, compensated and uncompensated duty cycle values, LED load current and LED lumen average value where the minimum duty cycle is kept fixed and the maximum duty cycle is reduced by 10%.

[0057] FIG. 20C is a waveform diagram of an LLC PFC output voltage, compensated and uncompensated duty cycle values, LED load current and LED lumen average value where the minimum duty cycle is increased by 5% and the maximum duty cycle is reduced by 5%, and the average duty cycle is kept constant.

[0058] FIG. 20D is a waveform diagram of an LLC PFC output voltage, compensated and uncompensated duty cycle, LED load current and LED lumen average value where the minimum duty cycle is increased by 10% and the maximum duty cycle is kept fixed, according to some embodiments.

[0059] FIG. 21A is a waveform diagram of a DC link voltage, gate pulse and LED current when the duty cycle is set such that the minimum DC line voltage is slightly higher than the nominal LED voltage.

[0060] FIG. 21 B is a waveform diagram of a DC link voltage for two different LED load currents (ILEDI and ILED2), where ILEDI >ILED2 but the average voltage for both cases are kept same.

[0061] FIG. 21 C is a waveform diagram of a DC link voltage for two different LED load currents (ILEDI and ILED2), where ILEDI >ILED2 but the minimum voltage for both cases are kept same.- 9 -CAN_DMS: \1008239681

[0062] FIG. 22A is a waveform diagram of an LLC PFC output voltage, reference current value, duty cycle value, LED current average value over a switching cycle, and LED lumen average value over a switching cycle during start-up of an LED driver using solution #1 , where primary MCU and secondary MCU are communicating.

[0063] FIG. 22B is a waveform diagram of an LLC PFC output voltage, reference current value, duty cycle value, LED current average value over a switching cycle, and LED lumen average value over a switching cycle during start-up of an LED driver using solution #1 , where primary MCU and secondary MCU are not communicating.

[0064] FIG. 22C is a waveform diagram of an LLC PFC output voltage, reference current value, duty cycle value, LED current average value over a switching cycle, and LED lumen average value over a switching cycle during start-up of an LED driver using solution #2, where primary MCU and secondary MCU are communicating

[0065] FIG. 22D is a waveform diagram of an LLC PFC output voltage, reference current value, duty cycle value, LED current average value over a switching cycle, and LED lumen average value over a switching cycle during start-up of an LED driver using solution #2, where primary MCU and secondary MCU are not communicating.

[0066] FIG. 23A is a graphical representation and component diagram of a duty cycle compensation applied to an analog implementation of the PWM FRC, according to some embodiments.

[0067] FIG. 23B is a circuit diagram with a duty cycle compensator incorporated into the analog implementation of the PWM FRC, according to some embodiments.

[0068] FIG. 23C is a graphical representation of a uncompensated waveform of the analog PWM FRC implementation, according to some embodiments.

[0069] FIG. 23D is a graphical representation of a compensated waveform of the analog PWM FRC implementation, according to some embodiments.

[0070] FIG. 24 is a schematic diagram of a computing device, exemplary of an embodiment.- 10 -CAN_DMS: \1008239681DETAILED DESCRIPTION

[0071] An LED load can not be directly connected to an AC power grid as the nominal voltage level (usually 24VDC or 48VDC) of the LED load is much lower than the nominal voltage level of the AC grid (usually 110VAC or 220VAC). Further, the AC voltage from the AC grid alternates with a frequency typically ranging between 50 to 60Hz. The frequency of the AC grid will also cause the LED load current to be zero during the negative half line cycle of the AC voltage, because the diode does not conduct in the reverse voltage. As a result, the LED load will be ON for a half cycle and OFF for the other half cycle, and as the line frequency is very low, it will cause severe low frequency flickering. An AC-to-DC adaptor, known as an LED driver may be used to convert the AC grid voltage to the appropriate voltage for the LED load. However, the converted DC voltage may still contain elements of the AC grid voltage, specifically, low frequency ripple which may impact the performance and safety of the LED load. The proposed device and method are used to remove the low frequency flicker of the DC input voltage by sensing and adjusting the average LED load current over a short time period, such as a single duty cycle period.

[0072] The circuit diagram 100A in FIG. 1A shows a Light Emitting Diode (LED) 102 and its equivalent electrical circuit 104. The positive and negative terminals are called Anode and Cathode, respectively. Also, the forward resistance and voltage of an LED here are named Rf and Vf, respectively. There is an ideal diode that blocks the reverse current. Basically, the LED is a diode with a higher forward voltage.

[0073] When a positive voltage, greater than Vf, is applied across an LED (Ved>Vf), a current (lted) will run through Anode to Cathode as shown in Equation 1: lied = (Vied ~ Vf) / Rf (1)

[0074] According to Equation 1, when Vied increases, lted will also increase, and vice versa. Moreover, it is noted that the amount of light emitted from an LED is almost directly proportional to lted. Consequently, when the voltage across the LED increases, the LED’s brightness increases as well and when the voltage decreases, the LED’s brightness decreases accordingly.- 11 -CAN_DMS: \1008239681

[0075] In this application, Lumen (LM) is used as the unit of measurement for brightness of a light source. A lumen represents the total amount of light emitted in all directions by a light source.

[0076] In order to get more LM out of the LEDs, several LEDs (LED11, LED 12, ...) are usually connected in series and parallel to make LED strings, strips, light bulbs, and the like, as shown in the circuit 100B of FIG. 1B. All of these LED light sources in FIG. 1B are LED loads. In this case, the same LEDs are used in order to achieve the same current through each LED.

[0077] In FIG. 1B, “n” discrete LEDs are connected in series to make a branch, and “m” branches are connected in parallel to make an LED load. In each branch, an external resistor Rext may be used to limit the LED current. Therefore, the LED load voltage (VLED) and current (ILED) are related as shown in Equation 2:1LED= mlled= m(VLED- nVf) / (nRf+ Rext) (2)

[0078] In order to turn ON the LED load 202, additional components may be required to operate as an intermediary between the LED load 202 and the grid 206. The LED loads’ 202 nominal voltage level (usually 24VDC or 48VDC) is much lower than the nominal voltage level of the AC grid 206 (usually 110VAC or 220VAC) and the grid’s voltage also alternates with 50 / 60Hz frequency. So, if the LED load 202 is directly coupled to the grid 206, the LED load 202 current will be zero during the negative half line cycle, because the diode does not conduct in the reverse voltage. As a result, the LED load 202 will be ON for a half cycle and OFF for the other half cycle, and since the line frequency is very low, it will cause severe low frequency flickering. Therefore, an AC-to-DC adaptor, known as an LED driver 204 is needed to convert the AC grid voltage to the appropriate voltage for the LED load 202.

[0079] FIG. 2 shows a schematic diagram 200 of the LED driver 204 operating as an interface between the AC grid 206 and the LED load 202. The LED driver 202 acts as an interface between the AC grid 206 and LED load 202 to provide the proper voltage for the LED load 202. Another important duty of the LED driver 204 is to maintain the power factor at the AC grid 206 side within the standard limits. In other words, the LED driver 204 should- 12 -CAN_DMS: \1008239681also operate as a Power Factor Corrector (PFC). Different types of LED drivers 204 may be used, and the proposed options are discussed below.

[0080] FIG. 3 shows a circuit topology 300 of a single stage LED driver 304 having a PFC stage. In FIG. 3, the LED driver 304 consists of an input filter 308, a diode bridge rectifier 310, and a boost converter 312 which operates as a PFC. Other types of converters, such as LLC resonant converter, can be utilized instead of the boost converter.

[0081] FIG. 4 illustrates the waveforms for the desired lac(t) in respect of Vac(t) for the single stage LED driver 304 shown in FIG. 3. In this condition, the input power (Pin(t)) will be a double line frequency (2x50Hz or 2x60Hz) sinusoidal waveform with a DC offset of lmVm / 2 and peak value of lmVm, where lmand Vmare peak input current and input voltage. This sinusoidal power input causes voltage ripple at the output of the PFC (VDc). The voltage ripple peak to peak amplitude is shown in FIG. 4 as VDC_RIP. According to Equations 1 and 2, the voltage ripple causes current ripple through the LED load 302. Consequently, the current ripple leads to lumen ripples in double line frequency which is called flickering. Low frequency flickering is harmful to the human eye which can lead to health issues, and can result in reduced performance. Therefore, the ripple amplitude of VLED should be controlled to eliminate the low frequency flickering which may be present in LED driver circuits.

[0082] This voltage ripple amplitude is inversely related to the output capacitor value (CDC) in the LED driver. Therefore, the voltage ripple could be reduced by increasing the output capacitance. Since the voltage ripple frequency is low, a very large capacitor may be required for CDC to completely remove this voltage ripple, which may result in increased costs and manufacturing complexity. Therefore, in a proposed solution, flicker elimination is achieved through the use of a Flicker Removal Circuit (FRC) as a second stage to the PFC.

[0083] FIG. 5 shows a circuit topology 500 of a proposed LED driver 502 having PFC 508 and FRC 510 stages. Using a DC-to-DC converter 512, the FRC 510 may be added as a second stage to the LED driver 504. Accordingly, the LED driver 504 has a PFC 508 and a FRC 510 stage as depicted in FIG. 5. Many different converters can be utilized in the first (as a PFC) and the second (as an FRC) stages such as Flyback converter, Quasi-Resonant Flyback converter, isolated Boost converter, etc. FIGS. 6A and 6B show example circuits- 13 -CAN_DMS: \1008239681600A and 600B where flyback 510A and LLC resonant 51 OB converters are used for the FRC stage. Usually, flyback converters 51 OA are used for low power applications (up to 100-150W), and LLC resonant converters 510B are used for higher power ratings, such as 150W and above.

[0084] The input voltage, current, and power waveforms along with VDC and LED voltage and current for the two stage driver is shown in FIG. 7. In the two stage driver, the boost converter along with the input filter and diode bridge rectifier still operate as a PFC. The inherent voltage ripple of the PFC may still exist. Thus, the second converter in the FRC stage may finely regulate VLED without any voltage ripple for the LED load to eliminate the flicker.

[0085] The circuit diagram 800 of a proposed Pulse Width Modulation Flicker Removal Circuit (PWM FRC) in a LED driver is shown in FIG. 8. The PWM FRC 810 consists of a switch (Si) and a current sensing resistor (RSh) which are connected in series with the LED load 801 .

[0086] The PWM FRC 810 uses a minimum number of components which significantly improves efficiency and lowers costs and the size of the driver.

[0087] PWM FRC Operation Principles

[0088] The LLC resonant converter is used in the PFC stage 908 as an illustration. Other types of converters can be used for the PFC stage 908. The detailed circuit diagram 900 of a proposed LED driver 904 including LLC single-stage PFC 908 and PWM FRC 910 is presented in FIG. 9. The PWM FRC 910 has at least one switch (Si) connected in series with least one current sensing device which, in some embodiments, can be a resistor (RSh). A controller 912 may be coupled to the PWM FRC 910 at two nodes. The first node point is at the current sensing device and is coupled to a voltage sensor housed within the controller 912. The second node point is at the gate of the switch Si and is coupled to an output of the controller 912 which communicates a gating signal to the switch Si to transition the switch between an ON-state and an OFF-state. In some embodiments, the gating signal can be- 14 -CAN_DMS: \1008239681generated by a pulse generator. In another embodiment, the gating signal can be generated by a switch driver.

[0089] As explained earlier, the LED current directly controls the lumen. Hence, the current and lumen waveforms of the LED load 902 are almost the same. FIGs. 10A-10E show different examples of the current and lumen waveforms 1000A-1000E in an LED load 902. In FIG. 10A, the current is pure DC (D=100%) which is equal to its average current value. FIG. 10B shows that the LED instant current is raised to 1.25*li_ED_avg. So, in order to keep the same average current, the duty cycle is changed to 80%. In FIG. 10C, the LED instant current is increased to 2*lLED_avg. As a result, the duty cycle is reduced to 50% to maintain the same average current. FIG. 10D shows the condition for a sawtooth waveform, where the peak current is 3*lLED_avgand the duty cycle is set to 67% to give the same average current. FIG. 10E shows an arbitrary current waveform with an appropriate duty cycle to retain the average current. In all these five examples, since the average current through the LED load is the same, the average lumen emitted from the LED load is also the same. Consequently, as long as the average current is constant, the average LED lumen is constant, although there is a very small non-linearity relationship between current and lumen in LED loads that will be discussed in detail later. This small non-linear relationship does not affect the flicker removal performance at this stage.

[0090] It is noted that in the cases of non-DC current, as seen in FIGs. 10B to 10E, the frequency of the LED current should be higher than 5kHz (Ts<200usec) to avoid low frequency flickering and comply with standard guidelines. In practical design, it is desirable to use a frequency higher than 15-20kHz (Ts = 50-67usec) to avoid audible noise. The switching frequency may also be different at each switching cycle but as long as the average LED current over each switching frequency is the same, the LED will generate the same lumen.

[0091] Considering the proposed LED driver 904 including LLC single-stage PFC 908 and PWM FRC 910 shown in FIG. 9, when VDc is exactly equal to the LED load nominal voltage, the controller 912 keeps Si on (D=100%) and a constant current flows through the load, as seen in the waveform diagram 1000A of FIG. 10A. When VDc increases and makes the LED instant current, for example, 1.25*lLED_avg, the controller 912 reduces the duty cycle of switch- 15 -CAN_DMS: \1008239681Si to 80% in order to keep the average current constant, as seen in the waveform diagram of FIG. 10B. As VDC increases further making the LED instant current 2*li_ED_avg, in the same way, the controller 912 adjusts the duty cycle of switch Si to 50% as seen in the waveform diagram of FIG. 10C. This is the primary function of the PWM Flicker Removal Circuit 910 (FRC), to regulate the average LED load current to a certain and constant value.

[0092] FIG. 11A shows the actual voltage waveform 1100A, VDc(t), of a single-stage AC to DC converter with power factor correction, as shown in the LLC PFC 908 shown in FIG. 9. As discussed earlier, VDc(t) contains a low frequency ripple (100Hz or 120Hz). FIG. 11A also shows how the PWM FRC controller adjusts the duty cycle of Si to achieve a constant average LED current in each switching cycle. FIG. 11A illustrates one cycle ripple of the DC link voltage (VDc(t)), the generated gate pulse for Si (Vorive), the instant current (li_Eo(t)) and the average current (li_ED_avg) for the LED load.

[0093] Here, the controller senses the load current (lsens) by measuring the voltage across RSh and generates Vorive with a high frequency (such as 20kHz) gate signal to keep the average current constant in each switching cycle.

[0094] One switching period is Ts and the ON time duration is Ton. So, the duty cycle (D) is defined as:

[0095] According to FIG. 11 A and Equation 3, when VDC rises, the instantaneous LED current increases as well, so the controller reduces the duty cycle to keep the average current li_ED_avg constant. Similarly, when DC drops, ILED ) decreases, thus the controller extends the duty cycle. Therefore, the duty cycle can be also defined as:

[0096] An example for three adjacent switching cycles 1100B is shown in FIG. 11 B. Here, the switching frequency (inverse of the switching period) is assumed to be constant (Tsis the same across all three switching cycles), and the ON time (TON) is changed to adjust the duty- 16 -CAN_DMS: \1008239681cycle and control the average current. Accordingly, to have the same average current at every switching cycle, the instantaneous LED current (LEDI , ILED2, ILEDS, etc.) should be measured, and the corresponding TON be calculated as Equation 5, which is a combination of Equations 3 and 4:

[0097] Another example for the average current regulation for three adjacent switching cycles 1100C is shown in FIG. 11C where instead of the switching frequency (or switching period Ts) being constant, the ON time is kept constant, and the switching frequency is variable. This proposed method is called constant on-time control. In this case, the switching frequency can be calculated using Equation 6:

[0098] The other example of the average current regulation at every switching cycle is constant OFF-time control. In this method, The OFF-time is kept constant and the MCU changes On-time (or switching period) to achieve the desired duty cycle and control the current. Equations 6.1 and 6.2 shows how ON-time and switching period can be calculated in this method, using li_ED_avgand ILED:

[0099] Where TOFF is the off time of the switch. The off-time and on-time form the switching period as: TS=TON+TOFF.

[0100] These three control methods have the same performance, but there are some practical differences. The advantage of constant on-time control over constant frequency and constant off-time controls is that it requires less processing time from the controller as the instantaneous LED current may be readily available from the current sensing device. Considering Equations 5 and 6, calculating the ON time (TON) in constant switchingCAN_DMS: \1008239681frequency control involves dividing by the instantaneous LED current (LED) as seen in Equation 5, which is measured using an Analogue to Digital Conversion (ADC). When dividing by the LED to determine the On time, the division may need to be performed by the controller for every switching cycle.

[0101] In contrast, for constant on-time control, the switching period (Ts) calculation involves dividing by the desired LED average current (li_ED_avg which is equal to the reference current), as seen in Equation 6, which is a fixed value. When dividing by li_ED_avg, the division only needs to be done once, as long as l ED_avg and TON remain unchanged. The same challenge is true for the constant off-time control. Therefore, constant on-time control may significantly reduce the controllers calculation time.

[0102] As shown in FIG. 11 A, when the instantaneous VDc(t) is in a higher state, such as close to VDc_Max, the duty cycle of switch Si is smaller than when Voc(t) is in a lower state, such as close to VDc_Min. In operation, the actual duty cycle variation in three consecutive switching cycles is much less than what are shown in FIGs. 11 B and 11C. These figures are just illustrations to present the control philosophy.

[0103] The control principle in a PWM FRO is different from a Converter FRC. In a Converter FRC, the output voltage may be in the form of pure DC in order to avoid flickering. However, in PWM FRC, the average current is being controlled in very short time durations (Ts), so there may be a high frequency ripple in current and voltage present in the output. Although this high frequency current ripple causes high frequency lumen ripple, it would not be visible to the human eye and therefore does not cause any disturbance or concern for a user. Moreover, the brightness may be constant, and compliant with consumer and health standards.

[0104] The control methods in FIGs. 11 B and 11 C may be implemented as either analog or digital.

[0105] ANALOG IMPLEMENTATION OF PWM FRC

[0106] FIG. 12 shows a detailed circuit diagram 1200 of an analog control circuit 1202 for the PWM FRC 1204. In circuit diagram 1200, the measured load current (lsens) goes through- 18 -CAN_DMS: \1008239681a low pass filter 1206 operating as an averaging filter, the resulting output is the average LED load current (li_ED_avg). The li_ED_avgis compared with the desired average current (lref) and compensated in the current compensator circuit to generate LED current control (li_ED_cont). In operation, an OpAmp may be used to increase the voltage level of the sensed current.

[0107] In addition, lsensis fed to the current integrator 1212 circuit to generate li_EDjnt. The current integrator 1212 contains a capacitor which is charged by a dependent current source. The amount of charging current is related to lsens. As the capacitor charges, its voltage ramps up. This voltage becomes zero when Q’ sends a pulse and shorts the switch across the capacitor. Therefore, as the LED load current lsensmay be a square wave, the resettable integrator may generate li_ED_int as a sawtooth waveform. While the signal (li_EDjnt) is a voltage waveform, its value controls the LED load current. Due to the switch across the capacitor shorting, the integral value resets at the end of each switching cycle.

[0108] In the pulse generator 1210 circuit, the sawtooth waveform of l EDjnt is compared with the DC value of li_ED_cont. To perform the comparison, lLEDjnt and li_ED_cont are applied to the positive and negative pins of a comparator, respectively. When the voltage on the positive pin is higher than the voltage on the negative pin (li_EDjnt > li_ED_cont) the comparator generates a high output. When the voltage on the positive pin is lower than the voltage on the negative pin (lLEDjnt < liED cont) the comparator generates a low output. In this way, the comparator generates a PWM pulse for the switch (Si). The switching frequency is fixed and determined by the clock pulse generator.

[0109] FIG. 13 shows the waveform diagram 1300 for the analog control circuit 1200 under three different conditions, the conditions are defined as follows:Condition D1 : Voc(t) is at its maximum value.Condition D2: VDc(t) is at its average value.Condition D3: Voc(t) is at its minimum value.

[0110] In FIG. 13, one cycle of the DC link voltage (VDc(t)) is depicted (100Hz or 120Hz). The waveforms are not in scale and FIG. 13 is just an illustration.- 19 -CAN_DMS: \1008239681

[0111] As an example, when Voc(t) is in Condition D1 (i.e. the voltage value is close to the peak value) at point to (at the beginning of a switching period), the Vorive is set to high, and the switch Si is ON. So, the LED load current is ILEDI . The current integrator circuit 1212 in the controller starts to integrate the current and li_EDjnt rises with a slope, which depends on the instantaneous voltage value of Vdc(t). li_EDjnt rises faster when the VdC(t) value is higher. liEDjnt rises slower when the Vdc(t) value is lower. When li_EDjnt reaches li_ED_cont (at ti), the Vorive resets and switch Si enters the OFF state. Si remains in the OFF state for the rest of the switching period (until t2).

[0112] The same procedure is true for Condition D2, when the voltage value of Vdc(t) is close to its average value, and for Condition D3, when the voltage value of Vdc(t) is close to its minimum value. It can be observed from a comparison of Conditions D1 , D2 and D3 that when the LED instant current is high, l EDjnt will reach li_ED_cont quicker, so the corresponding duty cycle (i.e. Ton) would be smaller, and vice versa. In other words, the larger VDC_RIP, the larger variation in duty cycle. With the proposed control method of Condition D2 and D3, it is also noted that the duty cycle of S1 is larger when the Vdc(t) value is lower, and the duty cycle of Si is smaller when the Vdc(t) value is higher. By implementing the duty cycle controls of Conditions D1 , D2 and D3 over the course of a complete cycle of oc(t), a constant average current through LED may be achieved

[0113] However, the analog implementation of the PWM FRC may require accurate sensor components as errors in the average LED current may cause inaccurate calculation of the average current if the component tolerance is larger than 1% to 5%. In order to implement the analog controller, a dedicated integrated circuit may be required to achieve a reduction in low frequency flicker.

[0114] DIGITAL IMPLEMENTATION OF PWM FRC

[0115] FIG. 14A shows a detailed circuit diagram of a digital control circuit 1400A for constant switching frequency control of the PWM FRC 1402. The LLC PFC stage 1404 is the same as discussed earlier, but in FIG. 14A the detailed control components for both LLC PFC 1404 and PWM FRC 1402 stages are shown, and as can be seen, both stages have a dedicated Micro-controller Unit (MCU). Solely for the sake of distinguishing the two MCUs,- 20 -CAN_DMS: \1008239681the MCU for the LLC PFC is named “Primary MCU”, also denoted as MCU1, and the MCU for the PWM FRC is called “Secondary MCU”, also denoted as MCU2. In practical implementation, other digital controllers, such as DSP (Digital Signal Processor), or FPGA (Field Programmable Gate Array) can also be used.

[0116] The secondary MCU (MCU2) is configured to implement the LED average current sensing and control. It also communicates with the primary side MCU (MCU1) to minimize the peak LED current and to optimize the performance, as discussed later. FIG. 14B shows detailed timing for the different tasks of MCU2. FIG. 14B shows the ideal and actual current waveform 1400B of the LED load. In the ideal case, the LED current li_ED_ideai is assumed to be a square wave, but in the real world implementation, there may be an inevitable rise time for the LED current li_ED_Actuai, depending on the parasitic inductance of the LED load and wires. So, the ADC 1406 measurement starts at ti, sometime after to when Si turns on, to make sure that the LED current ILED has reached its steady state. The ADC 1406 data becomes ready at t2, at which point MCU2 retrieves the data and finishes the duty cycle calculation at to. The duty cycle is calculated by Equation 7:

[0117] where the instant measured current at t=ti (li_EDjnst) is divided by the reference current (lref). It is noted that lref is the required LED DC current value to generate the desired lumen when a DC current flows through it. Then MCU2 calculates the ON time using Equation 8:TON= DTS= D / Fs(8)

[0118] Where Fsis the switching frequency, and it is equal to Fs=1 / Ts. When the new TON is ready, MCU2 can update the duty cycle value in the current switching cycle or in advance of the proceeding cycles.

[0119] In the digital implementation, MCU2 can automatically determine the connected LED load nominal current and set the reference current (lref) accordingly (the method for this will be discussed later). However, in the analog implementation, the reference current may- 21 -CAN_DMS: \1008239681be set either by an additional input or set internally. This is because unlike the digital implementation, the analog circuit may be unable to determine the desired reference current automatically.

[0120] If an additional input is used in the analog control implementation to set the reference current value, the digital implementation may require fewer inputs.

[0121] If the reference current in the analog circuit is set internally (as shown in FIG. 12), the driver may only operate correctly with a specific LED load. For instance, if the reference current is internally fixed at 10A (lref=10A) while the LED's nominal current is 15A (higher than reference current), the driver may be only able to provide 10A, resulting in reduced brightness. Conversely, if the LED's nominal current is 5A (lower than reference current), the driver may be unable to reach the 10A reference current. In this case, the switch's duty cycle will saturate at its maximum value (often at 100%), preventing effective low-frequency flicker removal.

[0122] Consequently, the digital implementation may have an advantage over the analog implementation as the digital implementation may only require one input, the actual LED current, and produce one output, the duty cycle of switch Si. While the analog implementation may require two inputs (the actual LED current and the reference current, lref, as shown in FIG. 12) and produce one output, the duty cycle of switch Si.

[0123] The digital control implementation described in FIG. 14B is based on a constant switching frequency control method, where the switching period (inverse of switching frequency) is constant, and the duty cycle is controlled by the ON time of the switch (TON). AS mentioned above, with a constant switching frequency control method, MCU2 may need to do a division operation in each switching period.

[0124] In some embodiments, a constant On Time control may be implemented for the digital control of the PWM FRO 1402, where TON is constant and the duty cycle is adjusted by the off time Toffof the switch, which is equivalent to adjusting the switching period Tsunder the constant On Time control method, the Tswould equal Ton+ TOff. In this- 22 -CAN_DMS: \1008239681specification, the term “Ts calculation” and “TOff calculation” are used interchangeably, as they are equivalent for constant Toncontrol.

[0125] FIG. 15A shows a detailed circuit diagram of a digital control circuit 1500A for constant ON Time control of the PWM FRC 1502. A primary difference between the constant ON time control method and the constant switching frequency control method of FIG. 15B is that MCU2 calculates TOFF instead of TON. The detailed timing diagram 1500B for the MCLI2 tasks in this method are shown in FIG. 15B. The timing and the tasks are the same as the one in FIG. 14B, except here TOFF is being calculated instead of TON- Therefore, duty cycle is achieved by Equation 7, which means that Tsis calculated using Equation 9:Ts = TOFF+ TON= TON / D (9)

[0126] When implementing the constant on-time control, the TOff (off time) can be calculated immediately after the Ton. Therefore, the control action can be implemented within the current (present) switching period. In other words, based on the LED current information obtained at time ti , the required Tontime can be calculated by time ts. The off-time (TOfr), from time t4to t5, can be implemented from t4to ts, which is in the same switching period. Therefore, the control delay is minimized.

[0127] This digital control may be capable of achieving high precision and minimal errors due to noise, drift, or component aging that are uncommon in digital control implementation. Within digital implementation, the average LED current accuracy may be solely determined by the ADC 1506 inside the MCU, such as a 12-bit ADC. The digital implementation may also be easily programmed and reprogrammed to change the control strategy, allowing for greater flexibility in adjusting the controller's behavior without changing hardware components.

[0128] IMPLEMENTATION OF DIGITAL PWM FRC

[0129] The steps of implementing a digital average LED current control can be summarized as follows:- 23 -CAN_DMS: \1008239681

[0130] Step #1 : LED load nominal current determination: In this step the driver identifies the nominal current of the connected LED load to the driver and sets lref accordingly.

[0131] Step #2: Flicker-free operation: After “Step #1”, the driver enters the normal operation, meaning that it makes the average LED load current equal to lref in order to completely remove flickering.

[0132] Step #3: Minimum overvoltage / overcurrent for LED load: In this step the driver optimizes Voc(t) in a way that imposes minimum overvoltage and overcurrent to the LED load.

[0133] STEP #1 - LED LOAD NOMINAL CURRENT DETERMINATION

[0134] The driver will be designed for specific voltage and power ratings. For instance, in this example, the driver is considered to have a 200W output power and 24VDC output voltage. In turn, the LED loads connected to this driver have to be compatible with these specifications. Meaning that the LED load’s nominal voltage must be 24VDC with power rating up to 200W. Therefore, the nominal voltage of the LED load is fixed, but the power is not certain, because the user can connect any amount of LED load power up to the driver’s nominal power.

[0135] For example, in an LED driver rated at 200W / 24VDC driver, the nominal (or maximum) current rating is 200 / 24=8.33A. If the user connects a 150W LED load to this driver, the nominal current rating will be 150 / 24=6.25A, which is much lower than the maximum current of 8.33A. Consequently, MCU2 will need to determine the nominal current of the LED that is connected to the driver. The rated nominal LED load current is used by the MCU2 as the lref, where lref is the target or desired current that should be fed to the LED load. MCU2 sets its target to make the LED load current equal to lref and begins adjusting the duty cycle with the objective of having the LED load current equal to lref.

[0136] FIG. 16 shows a detailed control diagram 1600 for the LLC PFC 1604 and PWM FRC 1602 stages where the primary and secondary MCUs can communicate to regulate VDc and LED properly. The procedure for determining the nominal LED load current will be described for two types of “Fixed” and “Dimmable” LED loads.- 24 -CAN_DMS: \1008239681

[0137] FIXED LED LOAD - In this type of LED load, the brightness is constant, and it is equal to its nominal power / voltage rating, such as regular LED lightings in which the user just turns between the ON and OFF state. When the LED load is in the ON state, it consumes the nominal power and the driver must provide the LED load with the nominal current. Two proposed methods for identifying the nominal current are proposed.

[0138] SOLUTION 1 FOR LED NOMINAL CURRENT DETERMINATION - When the driver turns to the ON state, MCU1 in the LLC PFC sets Voc(t) at the nominal voltage (VDc_nom), for example 24V. As explained before, this voltage will have some ripples (VDC_RIP) as shown in FIG. 17A. After the VDc(t) has been set, the PWM FRC sets the duty cycle at 100%, meaning that Si is always in the ON state. In this condition, the average voltage applied to the LED load is equal to nominal voltage VDc_nom, therefore, the average load current is equal to the connected LED load nominal current li_ED_nom. By measuring the LED current at several points at least during one cycle of VDc(t) (over 100Hz or 120 Hz) and calculating the average value, MCU2 can determine li_ED_nom. In some embodiments, multiple points are measured to ensure the accuracy of the average current measurement. In some embodiments, a minimum of 20 points will produce an accurate measurement. To minimize the error, the current can be measured during multiple Voc(t) cycles. When li_ED_nom is identified, MCU2 sets lref=lLED_nom and MCU1 gradually increases Voc(t). The procedure for increasing Voc(t) will be explained in Steps #2 and #3.

[0139] SOLUTION 2 FOR LED NOMINAL CURRENT DETERMINATION - Similar to as disclosed in Solution #1 , when the driver turns to the ON state, the LLC PFC 1604 is configured to set Voc(t) at the nominal voltage (Voc_nom), for example 24V. As explained before, this voltage will have some ripples (VRIP) as shown in FIG. 17B. After the Voc(t) has been set, the PWM FRC 1604 is configured to set the duty cycle at a very low value (i.e. D=10%), and measures ILED when the switch is ON. The current measurement points are also shown in FIG. 17B. The average value of the measured I LED points over one cycle of Voc(t) gives the nominal current of the connected LED load (LED_nom). In some embodiments, the current measurements occur over multiple VDc(t) cycles. Since at D=10%, the power is almost 10% of nominal power, VDC_RIP will be very small, so the measured current points are very close to the nominal value which reduces the error. Since this operation happens at the- 25 -CAN_DMS: \1008239681starting stage when the LED driver is powered up, the switching frequency of this 10% duty cycle pulse can be adjusted so that the LED current will reach a steady state. In other words, the switching frequency at 10% duty cycle can be lower than the switching frequency under normal operation when the LED driver delivers the normal output at 100% duty cycle.

[0140] The zoomed in current waveform 1700B of the LED load is shown in FIG. 17B. It shows the actual current waveform which has some rise time. Therefore, it should be noted that after Si is ON, MCU2 may wait for a pre-determined duration of time until the current settles, then measures the current. In FIG. 17B, Si turns ON at to, and the current reaches the steady state at ti , which allows the MCU2 to measure the current at t2.

[0141] It is noted that this settling time (Tsettie= ti-to) depends on the stray inductance of the LED load which is directly related to the length of the wires. However, it is noted that the settling time will not be more than 100 microseconds. So, TON is set to 100us, and since D=10%, the frequency at the start-up time becomes Fs=1 / Ts=D / ToN=1kHz. The values mentioned here (such as TON, D, FS, etc.) are just an example and in practice they may vary.

[0142] DIMMABLE LED LOAD - A dimmable LED load provides the user with the ability to change the lighting brightness arbitrarily from 0 to 100% of the full brightness. In this case, the LED nominal current detection procedure is the same as Fixed LED loads. In some embodiments, “Solution #2” may be preferred over “Solution #1” for a dimmable LED load because in “Solution #1” the LED load may be at full brightness when the LED load is turned ON. Therefore, under Solution #1 , if the user wants to set the light, for example, at 50% of its brightness upon start-up, the LED load will be at 100% brightness upon start-up and then the MCU2 will reduce the luminance from 100% to the user defined brightness value. Therefore, this momentary point in time (at start up) at full brightness may not be comfortable for the user.

[0143] However, under “Solution #2”, the LED load may be turned ON at, for example, 10% of its brightness. Then after nominal current determination, MCU2 increases lref to the user’s pre-defined brightness value. In this condition, the LED brightness will gradually (for example over the course of 0.1 to 2 seconds) be increased to the desired brightness.- 26 -CAN_DMS: \1008239681Moreover, during normal operation, the user can change lref using a knob, volume, remote control, etc. and adjust the brightness as desired.

[0144] STEP #2 - FLICKET-FREE OPERATION

[0145] MINIMUM REQUIRED VDc(t) - During Step #1 , VDc(t) is equal to the LED load nominal voltage and the duty cycle of Si is 100%. When MCU2 determines the LED load nominal current, the PWM FRO tries to regulate the average current at each switching cycle to equal the reference current (lLED_avg=lref). Therefore, whenever Voc(t) is higher than Vi_ED_nom, it generates the proper duty cycle for Si, but when VDc(t) drops below VDc_nom, the voltage across the LED load will not be enough to make the LED load average current equal to the nominal current at each switching cycle. Accordingly, when VDc(t)<VLED_nom, MCU2 fully extends the duty cycle, and it saturates at 100%. During the duty cycle saturation, the current drops in phase with VDc(t). FIG. 18A shows a waveform diagram 1800A which highlights the current ripple generated when the VDc(t)<Vi_ED_nom. This current dip which occurs at low frequency (100Hz or 120Hz) may cause sever flickering. FIG. 18B shows a waveform diagram 1800B in which the average value of Voc(t) is slightly higher than Vi_ED_nom, however, there are still some intervals in which Voc(t) falls below Vi_ED_nom and the duty cycle saturates. In order to completely eliminate this duty cycle saturation, Voc(t) may need to always be more than VLED_ nom (i.e. VDC_min> V|_ED_nom) ■

[0146] Consequently, after step #1 , as shown in the waveform diagram 1800C of FIG.18C, Voc(t) should be increased until the duty cycle for Si is no longer saturated at any point in the sinusoidal waveform of Voc(t). The optimum value for Voc(t) will be discussed below.

[0147] DUTY CYCLE COMPENSATION

[0148] As was explained above, the PWM FRC 1402 shown in FIG. 14A with the proposed digital implementation regulates the LED load's average current during each switching cycle. However, there may be inevitable measurement errors, component tolerances, and a non-linear relation between LED current and lumen, which can cause low-- 27 -CAN_DMS: \1008239681frequency flickering with a very small amplitude. This flickering may be small, but the proposed compensation method may be capable of completely eliminating it.

[0149] Due to the mentioned error, it is noted that the LED lumen slightly oscillates in antiphase with Voc(t). This means that when the voltage is high, the average lumen is slightly lower than the average value, and vice versa. FIG. 19A shows a waveform diagram 1900A of the ripple which may occur in the LED lumen output as a result of the error sources mentioned above. In FIG. 19A, the following waveforms are shown:The LLC PFC output voltage (VDc(t)) - the average DC voltage is also indicated in this graph as VDc_avg. The maximum and minimum values are indicated as VDC_MAX and VDc_min, respectively. And the peak-to-peak ripple value is shown as VDC_RIP.The pulse pattern of switch Si , indicated as “Drive”.The duty cycle value (D(t)) - the duty cycle saturation level is shown in this graph as 100%, as well as maximum and minimum values as DMAX and Dmin, respectively.The LED load current - the instantaneous current is lLEo(t), and the average value over a switching cycle is li_ED_avg, which is set equal to the reference current (lref).The LED lumen average value - the actual average lumen over a switching cycle (also known as uncompensated average lumen) is LMLED_uncomP_avg, and the desired average lumen (also known as compensated average lumen) is indicated as LM LED_comp_avg-

[0150] In order to eliminate the small lumen ripple (small flicker) seen in LM LED_uncomP_avg, the proposed duty cycle PWM FRC control may be improved further by applying compensation on the duty cycle (D(t)) value. As is shown in FIG. 19A, when the duty cycle (D(t)) is near its minimum, the actual LED average lumen (LMi_ED_uncomP_avg) falls below the desired average value (LMLED_avg), and as the duty cycle (D(t)) value approaches its maximum, the actual average lumen (LMi_ED_uncomP_avg) exceeds the desired level (LMi_ED_avg). Therefore, to eliminate the small oscillations in the actual average lumen (LMLED_uncomP_avg) , the duty cycle should be increased slightly when its value is near its minimum value, or when- 28 -CAN_DMS: \1008239681the LED voltage is close to its maximum value (LED current is close to its maximum value). On the other hand, the duty cycle should be decreased slightly when its value is near its maximum value, or when the LED voltage is close to its minimum value (LED current is close to its minimum value). Two compensation approaches may be used to achieve the above objective. FIG. 19B shows block diagrams 1900B highlighting the steps for compensation to remove the small lumen ripple of the LED load. The first approach is to apply compensation directly to the duty cycle, as shown in Figure 19B (i.e. case 3). The second method is to apply compensation to the reference current (lref), as shown in FIG. 19B (i.e. case 2). As shown in FIG. 19B, the compensation can be applied directly to either the duty cycle (D(t)) or to the reference current (lref). Since the duty cycle (D(t)) controls the LED load current (ILED), compensating the duty cycle (D(t)) or the reference current (lref) will lead to the same result. However, it may be desirable for the compensation to be applied to the duty cycle (D(t)) value in certain situations as discussed below. In some embodiments, when the compensation is applied to lref, the duty cycle D(t) is compensated automatically.

[0151] FIG. 19C shows a waveform diagram 1900C of the compensation being applied to the duty cycle D(t) and the resulting impacts on LED load current li_ED(t) and LED average lumen output LMi_ED_avg. In FIG. 19C, the following waveforms are presented:Duty cycle value: The maximum, minimum and saturation levels are indicated as DMAX, Dmin and “100%”. The uncompensated duty cycle is D(t), and the compensated duty cycle is DCOmP(t).LED current: The instantaneous LED current is ILED ), the average LED current without compensation is lLED_ucomP_avgand the average LED current with compensation is lLED_comP_avg.LED average lumen value: The actual average lumen value without compensation is LM LED_uncomp_avg, and the average lumen value with compensation is LM LED_comp_avg-

[0152] According to FIG. 19C, the compensated duty cycle Dcomp(t) has less peak-to-peak value in comparison with the uncompensated duty cycle D(t). Therefore, during the first half cycle of the duty cycle D(t) (when the actual VDc(t) value is higher than the average value, or- 29 -CAN_DMS: \1008239681the instantaneous LED current is higher than the average value), MCLI2 slightly increases the duty cycle to increase the actual average LED current li_ED_avg(t), and in the second half cycle (when the actual VDC(t) value is lower than the average value, or the instantaneous LED current is lower than the average value), MCU2 reduces the duty cycle to lower the actual average LED current li_ED_avg. As a result, the actual average LED lumen (LMLED_comP_avg) becomes flat.

[0153] In some embodiments, depending on the characteristics of the LED, the amount of duty cycle compensation will vary. The variation of the duty cycle can be from 2% to 20%. For example, for the uncompensated condition, the duty cycle variation can be from 70% to 95% and assuming 10% compensation is required, the compensated duty cycle variation will be 77% to 85.5%. In the above case, 77% is obtained by a 10% increase of 70% and 85.5% is obtained by a 10% reduction of 95%. In some embodiments, the relation between the compensated and uncompensated duty cycle can be linear or non-linear (polynomial, quadratic, etc.).

[0154] It should be mentioned that these waveforms are just for illustration purposes, so Voc(t) and D(t) are not necessarily sinusoidal and do not have the same shape, however, this compensation method works on any periodic waveforms.

[0155] FIG. 19D shows a waveform diagram 1900D which contains three proposed schemes for achieving duty cycle compensation.

[0156] Compensation Option #1 : Dmin is kept the same and DMAX is decreased to a lower value (DMAx_comp). The amount of reduction in maximum duty cycle depends on the LED load characteristics. Approximately, DMAx_comPcan be up to 20% lower than DMAX.

[0157] Compensation Option #2: DMAX is kept the same and Dmin is increased to a higher value (Dmin_comP). The amount of growth in the minimum duty cycle depends on the LED load characteristics. Approximately, Dmin_comPcan be up to 20% higher than Dmin.

[0158] Compensation Option #3: Dmin is increased and DMAX is decreased simultaneously but the difference constant remains roughly 20%, as seen in the two previous options. In this- 30 -CAN_DMS: \1008239681condition, the duty cycle waveform can fall anywhere from “Compensation Method #1” and “Compensation Method #2”.

[0159] FIG. 20A shows a waveform diagram 2000A of an uncompensated LED load to assist in clarifying the compensation methods. FIG. 20A shows:LLC PFC output voltage (Voc(t)). Here the minimum voltage (Voc_min) is 24.5V and the maximum (DC_MAX) is 28.5V. The average value (Voc_avg) is 26.5V.Duty cycle value. The minimum and maximum duty cycle value are assumed to be 70% and 95%, respectively. Also, the average duty cycle value is DaVg=82.5%.LED current: The instantaneous LED current is ILED ), the average current without compensation is assumed to be lLED_ucomP_avg=8A, which is equal to the reference current (lref).LED average lumen value: The actual average lumen value without compensation is LMLED_uncomp_avg, and the reference lumen value with compensation (LMi_ED_ref_avg) is depicted to show the desired value. Here it is shown that when VDc is maximum (28.5V), the corresponding lumen is 5% lower than the desired value (LMLED_28.5v_avg=95%LMLED_comp_avg) , and when the VDC is minimum (24.5V) the corresponding lumen is assumed to be 5% higher than the desired value (LM|_ED_24.5V_avg=105%LM LED_comp_avg) ■

[0160] In this example, the uncompensated LED current li_ED_ucomp_avgis assumed to be completely flat without any ripple, and the lumen ripple is only caused by the non-linear relation between LED current and lumen. However, in practice, there may be a very small ripple on this current as well. In that case, even if it has a negative effect on the LED lumen, the proposed compensation method can still remove the small flicker (lumen ripple).

[0161] FIG. 20B shows compensated waveforms 2000B which, when compared against waveforms 2000A in FIG. 20A, show how the proposed compensation method reduces the lumen ripple seen in waveform 2000A. In FIG. 20B, Compensation Option #1 is applied to the duty cycle. Meaning that the minimum duty cycle is kept fixed at 70%, but the maximum- 31 -CAN_DMS: \1008239681duty cycle is reduced almost by 10%, from 95% to 85%. In this condition, the average duty cycle value drops to 77.5%. Since the average duty cycle has decreased, the average value of the compensated LED current (lLED_com_avg) over one cycle of Voc(t) becomes lower than the reference current.

[0162] The compensated LED average current contains a small ripple (100Hz or 120Hz ripple) in antiphase with the lumen ripple which causes the average lumen (LMLED_comP_avg) to become completely flat. However, since the compensated LED current li_ED_com_avg is lower than the reference LED current lref, the compensated average lumen (LMLED_comP_avg) is slightly lower than the desired lumen value (LMLED_ref_avg). In some embodiments, the compensated average lumen (LMLED_comP_avg) is 1%-10% smaller than the desired lumen value (LM|-ED_ref_avg) .

[0163] At this moment, as discussed above (see discussion on FIGs. 16-17B), since the actual average current (li_ED com_avg) is lower than the reference current, MCU2 makes liED com avg equal to lref. To do so, MCU2 makes the average compensated duty cycle value equal to the uncompensated one (DComP_avg=Davg=82.5%). Therefore, in FIG. 20B, MCU2 increases the whole duty cycle by 5% to make its average value Davgequal to 82.5%. In this condition, the compensated average current (li_ED_com_avg) has a DC value equal to lref. As a result, the compensated average lumen becomes equal to the desired value (i.e. LMi_ED_ref_avg =LM LED_comp_avg) ■

[0164] The final compensated and regulated waveforms 2000C are shown in FIG. 20C. In FIG. 20C, the final duty cycle is fluctuating between 75% to 90%. The peak-to-peak value is reduced by 10% but the average value is kept constant at 82.5%. The average LED current has gained a small ripple in phase with Voc(t). Accordingly, the small ripple in lumen is cancelled out and becomes completely flat.

[0165] FIG. 20D shows a waveform diagram 2000D where the duty cycle has been compensated using Compensation Option #2, as described above. In FIG. 20D, the maximum duty cycle is kept at 95%, but the minimum duty cycle is increased by 10% and has reached 80% (increased from 70%). As a result, the average duty cycle is raised to 87.5%. Similar to Compensation Option #1 , the LED average current contains ripple in- 32 -CAN_DMS: \1008239681antiphase with the lumen ripple and cancels out the lumen ripple. Since the average duty cycle is increased, the average current is also elevated. Therefore, MCLI2 tries to regulate the average current at lref. Accordingly, it shifts down the whole duty cycle by 5% and makes the average duty cycle 82.5%. In this condition, the waveforms 2000D after compensation and regulation will be the same as 2000C in FIG. 20C.

[0166] In some embodiments, Compensation Option #3, as described above, may be applied to the waveform 2000A in order to reduce the lumen ripple. For example, maximum duty cycle can be decreased by 3%, and at the same time minimum duty cycle can be increased by 7% (the total peak-to-peak reduction should be 10%). Using Compensation Option #3, after MCU2 has regulated the reference current lref and eliminated the low frequency flickering in the LED average lumen LMLED_comP_avg, the final result will be the same as FIG. 20C.

[0167] All three compensation methods discussed above may be equally effective, and lead to the same final condition (i.e. removal of lumen ripple). In operation, the amount of duty cycle compensation depends on the LED load characteristics and may vary up to 20%. Further, in some embodiments, the relation between the compensated and uncompensated duty cycle can be linear or non-linear (polynomial, quadratic, etc.). Therefore, as discussed below, the driver may be required to optimally regulate Voc(t) to minimize the overvoltage / overcurrent for the LED load.

[0168] STEP 3: MINIMUM OVERVOLTAGE / OVERCURRENT FOR LED LOAD

[0169] SET MAXIMUM DUTY CYCLE

[0170] If the nominal voltage is applied to the LED load (VDc(t)=Vi_ED_nom) without any ripple, the PWM FRC controller may set D=100% to make the LED current equal to its nominal value. However, if the VDc(t) drops below Vi_ED_nom, the average LED current cannot reach the nominal value Vi_ED_nom. Consequently, to make the LED average current equal to the nominal current during every switching cycle, it may be desirable for VDc(t) to be higher than Vi_ED_nom. Vi_ED_nom is the DC voltage value applied to the LED load to produce the desired lumen.- 33 -CAN_DMS: \1008239681

[0171] In other words, it may be desirable for Voc_min to be more than Vi_ED_nom as discussed in FIGs. 18A-18C. Voc_min and VDC_MAX are defined in Equations 10 and 11. Here, it is assumed the VDC_RIP is sinusoidal:

[0172] Voc min=^DC_avg ~ 0.5 * VDC_RIP(10)

[0173] VDC_MAX=^DC_avg + 0-5 * VDC RIp (11)

[0174] However, Voc_min should not be far above Vi_ED_nom, as in that condition, VDC_MAX may cause large overvoltage / overcurrent to the LED load. Therefore, the maximum duty cycle in the MCLI2 should be as close to 100% (such as 97%) as possible. In other words, Voc min should be as close to Vi_ED_nom as possible. For example, Voc_min may be 1% to 10% higher than Vi_ED_nom, as shown in FIG. 21A. Accordingly, the instantaneous LED current will remain close to the LED nominal current, and when Voc(t) reaches its peak (Vocjviax), the LED voltage and current difference from the nominal values may not pose overvoltage / overcurrent risks.

[0175] MAINTAINING MINIMUM OVERVOLTAGE I OVERCURRENT AT LOW POWER LED LOADS

[0176] As explained above when discussing FIGs. 3 and 4, the output voltage ripple of the PFC stage (VDC_RIP) depends on the load current ILED^), which is the LED current. When the LED current lLEo(t) increases, the low frequency ripple voltage of the PFC circuit, VDC_RIP increases, and vice versa. Accordingly, when the LED current decreases, there may be two options for LLC PFC output voltage (VDc(t)) to change.

[0177] Option 1 : Keep the VDc_avgconstant - In this method, the average output DC voltage (VDc_avg) is maintained constant under different LED load current levels. Therefore, if the LED load current decreases, the ripple voltage, VDC_RIP decreases, and Voc_min increases and VDC MAX decreases, respectively (FIG. 21 B). In FIG. 21 B, Curve 1 shows the low- frequency voltage ripple, VDC_HPI , corresponding to a first LED current, ILEDI , and Curve 2 shows the low-frequency voltage ripple, VDC_HP2, corresponding to a second LED current, ILED2. Here, it is assumed that ILED2 is lower than ILEDI , SO VDC_HP2 is smaller than VDC_HPI . Therefore, Voc_min2 is higher than Voc_mini, as:- 34 -CAN_DMS: \1008239681

[0178] VDC minl— VDC avg— 0.5 * VDC_RIP1(12)

[0179] VDC min2— Vnc_avg 0'3 * VDC RIP2(13)

[0180] IREDI > ILED2 VDC_RIP1 > ^DC_RIP2 ^DC_minl < ^DC_min2 (14)

[0181] Option 2: Keep the VDc_min constant - As discussed earlier, it is desirable to keep Voc_min as close to Vi_ED_nom as possible in order to reduce the peak LED current when switch Si is turned ON. Therefore, in this method, when the LED current reduces, the minimum voltage (Voc_min) is kept constant and the average output voltage of the single-stage AC to DC converter, VDc_avgis reduced accordingly. In this condition, the minimum output voltage Voc_min will remain very close to the nominal LED voltage, Vi_ED_nom, such that Voc_min remains at 1% to 10% above VLED_nom, under different LED current levels.

[0182] Consequently, as depicted in FIG. 21 C, when the LED load declines, the single stage LLC PFC will preserve the Voc_min constant instead of Voc_avg. In this case, the LED voltage / current is kept close to the nominal values. Moreover, comparing FIGs. 21 B and 21 C reveals that in the latter one, Voc_max drops even further and significantly lowers the overvoltage / overcurrent on the LED load during the peak DC voltage.

[0183] VDCavgl=^DC_min + 0.5 * VDC RIP1(15)

[0184] Vpc_avp2=^DC_min + 0.5 * VDC_RIP2(16)

[0185] VDC RIP1> VDC RIP2-> Voc_avgl > ^DC_avg2 (17)

[0186] VDCMAXI=^DC_min + ^DC_RIP1 (13)

[0187] VDC MAX2 — ^DC_min + ^DC_RIP2 (19)

[0188] VDC RIP1> VDC RIp2 VDC_MAXI » VDC_MAX2 (20)

[0189] Both overvoltage / overcurrent control options described above can remove the flicker of the LED load. A noted difference is that option 1 (constant Voc_avgmethod) may notCAN_DMS: \1008239681require adjustment of the average output voltage of the single stage PFC output voltage and therefore, no communication is needed from secondary side to primary side.

[0190] Option 2 (constant Voc_min method) may need to adjust the average output voltage of the single stage PFC output voltage oc_avgbased on the actual LED current levels. In this case, the MCLI2 at the secondary side may need to communicate with MCLI1 at the primary side, as shown in FIG. 16. In some embodiments, communication between the MCLI1 and MCLI2 involves the MCLI2 transfering the instantaneous output voltage value, Voc(t), from MCLI2 to MCLI1 , and MCLI1 calculates the average value VDc_avgbased on Equation 12 and 13 above. MCU 1 may be configured to then set the VDc_min to 1% to 10% above VDc_nom. In another embodiment, the MCLI2 determines the VDc_avgthat will produce VDc_min to be 1% to 10% higher than VDc_min without communication with MCLI1.

[0191] START-UP PROCESS OF THE LED DRIVER

[0192] In order to start-up the driver using solution #1 explained above when discussing FIG. 17A and 17B, the three steps explained in the previous sections should be followed consecutively. This start-up process is shown in FIGs. 22A and 22B. FIGs. 22A and 22B show:LLC PFC output voltage (Voc(t)). The nominal DC voltage is also indicated in this graph asDc_nom.Reference current value (lref). The nominal LED current is indicated in this graph as ll-ED nom.Duty cycle value (D(t)). The duty cycle saturation level is shown in this graph as 100%, the maximum allowed duty cycle is DMAX.LED current average value over a switching cycle (li_ED_avg). The nominal LED current is indicated in this graph as li_ED_nom.LED lumen average value over a switching cycle (LMavg). The nominal LED lumen (full brightness) is indicated in this graph as LMnOm.- 36 -CAN_DMS: \1008239681

[0193] At To, the driver is turned ON and Step #1 begins. MCLI1 regulates the average value of Voc(t) at the nominal voltage (VDc_nom). At this time, it is not important how much voltage ripple is present. According to Solution #1 for nominal current determination, at this step, the duty cycle for Si is 100% and the average LED current is equal to its nominal value. From Toto Ti, MCLI2 measures the LED current and calculates the average value of the LED current, which is the nominal current of the connected LED load.

[0194] At Ti, Step #2 and Step #3 start together. At this moment, MCU2 sets lref equal to liED nom which was obtained in Step #1. As explained before, in this step, VDc(t) should be increased to avoid duty cycle saturation and the LED driver will be able to completely remove the flicker. This can be done in two ways:

[0195] Method #A1- Since VDc(t) at Ti is not high enough, the duty cycle is higher than its limit (DMAX). This duty cycle is being generated by MCU2, and MCU1 is regulating Voc(t). Therefore, MCU2 communicates to MCU1 to gradually increase VDc(t). This voltage increase will continue until the maximum duty cycle of Si , generated by MCU2, becomes equal to its maximum limit (DMAX), which happens at T2, as shown in FIG. 22A. Step #2 and Step #3 are carried out almost simultaneously between Ti and T2. As the driver increases Voc(t) to eliminate flicker (Step #2), it also regulates Voc(t) until t=T2 at an optimum value to minimize overvoltage and overcurrent (Step #3). At t = T2, when Voc(t) is at its minimum value, the maximum duty cycle reaches the designed value, such as 97%. After T2, the driver operates normally as explained when discussing FIG. 11A-11C.

[0196] Method #A2- After Ti, MCU1 regulates Voc(t) so that VDc_min=VDc_nom / DMAx. For example, if VDc_nom=24V, and DMAX=97%, the minimum Voc(t) will be VDc_min=24.5V. Therefore, MCU1 may be configured to instantly (within a very short transition time) increases VDc(t) to make it equal to the Voc_min (24.5V in this example). It should be noted that DMAX and oc_nom are preset in the MCU1 , because they are design parameters and are fixed numbers. So, there is no need for any communication between the MCUs, and MCU1 can regulate VDc(t) without the delay time caused by communicating with the MCU2, as illustrated in FIG. 22B. In this method, Step #2 and Step #3 are carried out almost simultaneously at Ti. As the driver increases oc(t) quickly to eliminate flicker (Step #2), it- 37 -CAN_DMS: \1008239681also regulates Voc(t) at the same time to minimize overvoltage and overcurrent (Step #3). After Ti, the driver operates normally as explained when discussing FIG. 11A-11C.

[0197] The difference between Method #A1 and #A2 is that in Method #A2, the driver may reach the normal operation point very fast (with a very short transition time) and eliminates the low frequency flickering after Ti. However, Method #A2 happens without any feedback from MCU2. Therefore, due to unavoidable measurement error or components tolerance, the final Voc(t) value may have a small deviation from the optimum value (the value that was discussed under Step #3). In contrast, in Method #A1 , although there might be a slight flickering during Ti and T2, the duration may be very short, and the communication between the two MCUs may provide precise regulation of VDc(t) at its optimum value. In practical implementation, the time interval from Toto T2 is several line cycles, such as 2 to 10 line cycles, or about 100ms to 500ms.

[0198] START-UP PROCESS WITH SOLUTION #2 FOR THE NOMINAL CURRENT DETECTION

[0199] In order to start-up the driver using the solution #2 for LED nominal current determination, Steps #1-3 explained previously should be followed consecutively. This startup process is shown in FIGS. 22C and 22D, which shows:LLC PFC output voltage (Voc(t)). The nominal DC voltage is indicated in this graph as VDc_ nom-Reference current value (lref). The nominal LED current is indicated in this graph as l l-ED nom.Duty cycle value (D(t)). The duty cycle saturation level is shown in this graph as 100%, as well as the maximum allowed duty cycle as DMAX, and 10% value during To to Ti.LED current average value over a switching cycle (li_ED_avg). The nominal LED current is indicated in this graph as li_ED_nom, and 10% of the nominal LED current is indicated aS 1 0% l |_ED nom-- 38 -CAN_DMS: \1008239681LED lumen average value over a switching cycle (LMavg). The nominal LED lumen (full brightness) is indicated in this graph as LMnOm, and 10% of the full brightness is indicated as 10%LMnOm.

[0200] At To, the driver is turned ON and Step #1 begins. MCU1 regulates the average value of Voc(t) at the nominal voltage (VDc_nom). At this time, the amount of low frequency ripple is not a relevant factor. According to Solution #2, at this stage, the duty cycle for Si is 10% and the average LED current is equal to 10% of its nominal value. From t = To to t = Ti, MCU2 is configured to monitor the LED current when Si is ON and determine the average value of the LED current, which is the nominal current of the connected LED load. The MCU2 finishes determining the average value of the LED current at Ti.

[0201] At t=Ti, MCU2 gradually increases lref until it reaches li_ED_nom at T2. During this time Voc(t) is kept constant, as a result, when the LED current is close to its nominal value, the duty cycle D(t) saturates at 100%, because VDc(t) is below the nominal voltage.

[0202] At t=T2, Step #2 and Step #3 start together. At this moment, lref is already equal to lLED_nom. In this step, MCU1 increases Voc(t) so the LED driver will be able to completely remove the flicker. This can be done in two ways as below:

[0203] Method #B1- Since Voc(t) at T2is not high enough, the duty cycle is higher than its maximum limit, therefore, MCU2 communicates to MCU1 to increase Voc(t). This voltage increase will continue until the maximum duty cycle of Si, generated by MCU2, becomes equal to its maximum limit (DMAX), which happens at T3, as shown in FIG. 22C. Step #2 and Step #3 are carried out almost simultaneously between T2and T3. As the driver increases Voc(t) to eliminate flicker (Step #2), it also regulates Voc(t) until t = T3 in order to minimize overvoltage and overcurrent (Step #3). At t = T3, the max duty cycle when Voc(t) is at its minimum value reaches the target value, such as 97%. After T3, the driver operates normally as explained when discussing FIG. 11A-11C.

[0204] Method #B2 - After T2, MCU1 can regulate VDc(t) so that VDc_min=VDc_nom / DMAx- For example, if VDc_nom=24V, and DMAX=97%, the minimum Voc(t) will be VDc_min=24.5V. Therefore, MCU1 instantly (within a short transition time) increases VDc(t) to set it equal to- 39 -CAN_DMS: \1008239681the final value (24.5V in this example). It should be noted that DMAX and Voc_nom are preset in the MCLI1, because they are design parameters and are fixed numbers. Therefore, there is no need for communication between the MCUs, and MCLI1 can regulate Voc(t) without the delay time caused by communicating with the MCLI2, as illustrated in FIG. 22D. In this method, Step #2 and Step #3 are carried out almost simultaneously at T2. As the LED driver increases VDc(t) within a short period of time to eliminate flicker (Step #2), it also regulates oc(t) at the same time to minimize overvoltage and overcurrent (Step #3). After T2, the driver operates normally as explained when discussing FIG. 11A-11C.

[0205] Under Method #B2, the driver may reach the normal operation point faster than under Method #B1. Method #B2 may also eliminate the low frequency flickering after T2. Under Method #B1 , the communication and feedback between the two MCUs may result in highly precise regulation of VDc(t) at its optimum value. In practical implementation, the time interval from Toto T3 is several line cycles, such as 2 to 10 line cycles, or about 100ms to 500ms.

[0206] START-UP PROCESS FOR DIMMABLE LED LOADS

[0207] For fixed LED loads, both start-up processes discussed above can be used. The difference is that when solution #1 for LED nominal current determination is used, the LED load will turn ON at full brightness, while when solution #2 for LED nominal current determination is used, the LED is gradually turned on to full brightness.

[0208] For the dimmable LED load, “start-up process with solution #2” may be preferable because the driver gradually increases the reference current from a low value to the nominal current. During the start-up period, the LED driver will determine the nominal LED current. For example, if the LED driver is designed for 200W at 24V, the max LED current is 200W I 24V = 8.33A. This LED driver can be connected to any LED load that is below 200W or 8.33A. For example, when the LED driver is connected to a 24V and 200W LED load, the nominal LED current is 200W I 24V = 8.33A. When the LED driver is connected to an LED load with 24V, 150W load, the nominal LED current is 150W / 24V = 6.25A.- 40 -CAN_DMS: \1008239681

[0209] The dimming of LED current is based on the nominal LED current. When the nominal LED current is 8.33A, a command for 50% dimming would result in 50% of the nominal LED current being required, which is 8.33A x 0.50 = 4.2A. In other words, if a 50% dimming signal is received, the LED driver should produce an average LED current of 4.2A.

[0210] However, for a 24V 150W LED load, the nominal load current is 150W I 24V = 6.25A. In this case, a command for 50% dimming would result in 50% of the nominal LED current being required, which is 6.25A x 0.5 = 3.1 A. In other words, if a 50% dimming signal is received, the LED driver should produce an average LED current of 3.1 A.

[0211] Therefore, it may be advantageous for the LED driver to determine the nominal LED current for a particular LED load as taught by the two start up methods above.

[0212] In a dimmable LED load, the user can set a preset value (e.g., 50%), so the LED driver ramps up the reference current to the preset value (i.e., 50% of li_ED_nom) at T2. However, in “start-up process with solution #1”, the LED load turns on at full brightness, and then the driver dims the light to the preset value. This abrupt change may not be comfortable for the user's eyes.

[0213] It should be noted that for any type of start-up solutions and LED nominal current detections proposed in this file, the duty cycle compensation as well as constant ON-time (constant TON), constant OFF-time (constant TOFF), and constant switching period control (constant Ts) can be applied.

[0214] DUTY CYCLE COM PENSATIN IN ANALOG IMPLEMENTATION

[0215] The duty cycle compensation can also be applied to the analog version of the PWM FRC 2302. In this way, as discussed in FIGs. 20A to 20D, a small ripple should be added to the LED reference current or control current (lref or li_ED_cont in FIG. 12) to make the lumen flat. In the following example, the compensation on the LED control current (li_ED_cont) will be discussed. Applying the compensation on lref will have the same result. The principle for compensation in an analog implementation is the same as discussed under the digital implementation. Specifically, under both digital and analog implementation, the duty cycle should be manipulated in a way that increases the average current when VDc(t) is higher- 41 -CAN_DMS: \1008239681than its average value and decreases the average current when Voc(t) is lower than its average value. When implementing the compensation within the analog system, LED control current signal (li_ED_cont) should be adjusted. To apply the compensation, the average LED current should be increased as Voc(t) reaches its peak and be decreased as Voc(t) drops. Therefore, li_ED_cont should be adjusted accordingly and the added ripple in li_ED_cont for compensation should be in phase with VDc(t).

[0216] In order to implement this compensation in an analog circuit, Voc(t) should be scaled down to match the range of the LED control current, and then the AC element of the voltage supplied by the PFC circuit 2304 (scaled down VR|P) should be extracted from the signal and added to the LED control current. An example of duty cycle compensation using an analog circuit is shown in FIG. 23A. In this figure one cycle of VDc(t) is depicted. The average (VDc_avg), the maximum (VDC_MAX) , the minimum (Voc_min), and the ripple ( RIP) values are indicated on the waveform.

[0217] The input voltage is scaled down by the scale down circuit 1206 using two resistors (Rsampiei and RSampie2), the scaled down input voltage results in Vi(t). As shown in Equation 21, this signal is equal to:

[0218] In other words, Voc(t) is scaled down Ki times, where the Ki is shown in Equation 22:

[0219] From Equation 22 it can be concluded that Ki is always less than unity (Ki< 1), so this part of the circuit always scales down VDc(t). When, Voc(t) is scaled down, its average value (VDc_avg) and ripple value (VRIP) are scaled down as well. So, according to Equation 23:- 42 -CAN_DMS: \1008239681

[0220] Next, Vi(t) is exposed to a high-pass filter to extract the AC portion within the voltage. This high-pass filter 1208 is composed of an RC filter including Cf er and Rfuter, and an operational amplifier (op-amp) which is being fed by a positive and negative voltage supply, +VCC and -VCC, respectively. After Vi(t) passes the high-pass filter 1208, it generates V2(t). The filter eliminates the DC part and only passes the AC component. Therefore, as shown in Equation 24, V2(t) is:

[0221] V2(t) is then added to a reference signal (here it is Vref). The adder circuit 1210 is an op-amp circuit, composed of an op-amp and four resistors, Raddi, Radd2, Radd3, and Radd4. The gain of this circuit is K2 and the output signal is V3(t) which is obtained using Equation 25:

[0222] According to Equation 25, the gain of each input signal to the adder circuit 1210 (Vref and V2(t)) are dependent on the value of these resistors. In this example, the desired gain is unity (K2=1) so that the two signals are added. In order to have a gain of 1 , all resistors may be the same (Raddi= Radd2= Radd3= Radd4) so that V3(t) can therefore be defined according to Equation 26:^(0 =Vref + ^2(0 (26)

[0223] Considering Equations 24 and 26, the output signal V3(t) can be defined according to Equation 27:

[0224] Based on Equation 27, the amount of compensation can be changed by adjusting Ki. Also, Ki can be adjusted, for example, by changing Rsampie2, based on Equation 22. That is why this resistor is shown with a variable resistor symbol in FIG. 23A.- 43 -CAN_DMS: \1008239681

[0225] In conclusion, it can be seen from Equation 27 that the resultant signal is the reference signal (which in FIG. 12 is the LED control current signal, li_ED_cont) to which a scaled down DC voltage ripple (KIVRIP) is added.

[0226] FIG. 23B shows the duty cycle compensator circuit added into the analog implementation of the PWM FRC. In FIG. 23B, li_ED_cont is diverted to the compensation circuit. The output of the compensator circuit is li_ED_cont_comp, which is the compensated LED control current.

[0227] FIG. 23C and 23D show the uncompensated and compensated waveforms, respectively. FIG. 23C shows:LLC PFC output voltage (VDc(t)). Here the minimum voltage (Voc_min), the maximum (VDC_MAX), and the average voltage (Voc_avg) are indicated.The LED control current signal (li_ED_cont) which is not compensated yet, and the integral current signal (li_ED_int(t)).LED current: The instantaneous LED current is ILED ), the average current without compensation is lLED_ucomP_avg.Uncompensated LED average lumen (LMLED_uncomP_avg) .

[0228] Similar to the waveform diagrams 1900A in FIG. 19A, which was for the digital implementation, the average LED current is flat but the lumen average value has some small ripple. To remove these small ripples in the lumen, the duty cycle of reference current can be compensated. The compensated waveforms for the analog implementation are shown in FIG. 23D, which includes:LLC PFC output voltage (Voc(t)). Here the minimum voltage (Voc_min), the maximum (VDC_MAX), and the average voltage (Voc_avg) are indicated.The compensated and uncompensated LED control current signals, li_ED cont_comPand liED cont, respectively. Also, the integral current signal (li_EDjnt(t)) in the compensated mode.- 44 -CAN_DMS: \1008239681LED current: The instantaneous LED current is ILED ), the average current with and without compensation are lLED_omP_avg. and lLED_ucomP_avg, respectively.Compensated and Uncompensated LED average lumen LMi_ED comP_avgand LMLED_uncomP_avg, respectively.

[0229] According to FIG. 23D, since li_ED_cont_comPoscillates in phase with Voc(t), it automatically increases the duty cycle when VDc(t) is high and decreases the duty cycle when Voc(t) is low. This variation in the duty cycle causes the average current to rise and fall correspondingly. As a result, the actual average LED current, as seen in FIG. 23D, increases in the first half cycle and decreases in the second half cycle, ultimately flattening the average lumen value, as illustrated by LMLED_comP_avg.

[0230] FIG. 24 is a schematic diagram of computing device 2400, exemplary of an embodiment. As depicted, computing device 2400 includes at least one processor 2402, memory 2404, at least one I / O interface 2406, and at least one network interface 2408.

[0231] Each processor 2402 may be, for example, a microprocessor or microcontroller, a digital signal processing (DSP) processor, an integrated circuit, a field programmable gate array (FPGA), a reconfigurable processor, a programmable read-only memory (PROM), or combinations thereof.

[0232] Memory 2404 may include a combination of computer memory that is located either internally or externally such as, for example, random-access memory (RAM), readonly memory (ROM), compact disc read-only memory (CDROM), electro-optical memory, magneto-optical memory, erasable programmable read-only memory (EPROM), and electrically-erasable programmable read-only memory (EEPROM), Ferroelectric RAM (FRAM) or the like.

[0233] Each I / O interface 2406 enables computing device 2400 to interconnect with one or more input devices, such as a keyboard, mouse, camera, touch screen and a microphone, or with one or more output devices such as a display screen and a speaker.- 45 -CAN_DMS: \1008239681

[0234] Each network interface 2408 enables computing device 2400 to communicate with other components, to exchange data with other components, to access and connect to network resources, to serve applications, and perform other computing applications by connecting to a network (or multiple networks) capable of carrying data including the Internet, Ethernet, plain old telephone service (POTS) line, public switch telephone network (PSTN), integrated services digital network (ISDN), digital subscriber line (DSL), coaxial cable, fiber optics, satellite, mobile, wireless (e.g. Wi-Fi, WiMAX), SS7 signaling network, fixed line, local area network, wide area network, and others, including combinations of these.

[0235] In operation, the proposed device and method may be implemented in both commercial and residential / private environments. The proposed device and method would be especially applicable to environments where individuals are exposed to artificial light for long periods of time, such as office spaces and industrial facilities, where the low frequency flicker may irate or damage the eyes.

[0236] The proposed device can be retrofitted onto existing LED systems as the circuity components (switch, current sensing device) are simple to integrate into a pre-existing circuit.

[0237] The digital controller may be valuable in commercial LED production as a reliable and low cost option for LED manufacturers to improve the quality and safety of their LED products. The digital controller provides a low cost solution to controlling low frequency ripple, and can be made from readily available materials. Especially when compared to other options, such as a large output capacitor, the digital controller is significantly cheaper and easier to retrofit into an existing product. Further, the digital controller provides greater flexibility as it can be reprogrammed after it has been installed, allowing a user to adjust the control scheme without having to replace hardware components. The digital controller will also not suffer from component degradation or tolerance decay as the digital components implemented within the digital controller will retain their reliability for the life-cycle of the LED which it controls.- 46 -CAN_DMS: \1008239681

[0238] The term “connected” or "coupled to" may include both direct coupling (in which two elements that are coupled to each other contact each other) and indirect coupling (in which at least one additional element is located between the two elements).

[0239] Although the embodiments have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the scope. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification.

[0240] As one of ordinary skill in the art will readily appreciate from the disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized. Accordingly, the appended embodiments are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.

[0241] As can be understood, the examples described above and illustrated are intended to be exemplary only.CAN_DMS: \1008239681

Claims

WHAT IS CLAIMED IS:

1. A circuit for controlling an average LED load current to reduce a low frequency flicker of a light emitting diode (LED), the circuit comprising: an AC grid connection including an AC voltage source; an LED driver circuit comprising: a power factor corrector (PFC) circuit electrically coupled in parallel with the grid connection, the PFC circuit converts the AC voltage source from the AC grid connection into an output DC voltage containing some AC low frequency ripple; a pulse width modulation flicker removal circuit (PWM FRC) coupled to the output of the PFC circuit, the PWM FRC including at least one switch and at least one current sensing device, the at least one switch operating a duty cycle which represents the duration of time the at least one switch spends in an ON-state in proportion to a switching period; an LED load connected in series with the PWM FRC and outputting a lumen value based on the average LED load current supplied by the PWM FRC; and a first controller circuit including a voltage sensor coupled to the at least one current sensing device configured to retrieve the LED instant current value of the LED load from the at least one current sensing device and a controller unit configured to generate gating signals for the at least one switch to modulate the duty cycle based on the LED instant current of the LED load to maintain the constant average LED load current and reduce the impact of the low frequency ripple on the lumen value of the LED load.

2. The circuit of claim 1, wherein the controller modulates the duty cycle value of the at least one switch by controlling the duration of the switching period of the at least one switch, and a duration of time that the at least one switch is in the ON-state or an Off- state is kept constant.

3. The circuit of claim 2, wherein the duration of the switching period is determined by the first controller unit of the controller using the equation Ts= 'LEDT0N, when the^LED-avg duration of the ON-state is constant, and T = - — - TnFF, when the duration of LED ~ LE D-avg- 48 -CAN_DMS: \1008239681the OFF-state is constant, where lLEDis the instantaneous LED current, ILED-aVg is the LED average current, Tsis the switching period duration, and TOFF and TON are the OFF-state and ON-state durations.

4. The circuit of claim 1, wherein the controller modulates the duty cycle value of the at least one switch by controlling a duration of time that the at least one switch is in an ON state, and a switching period of the at least one switch is kept constant.

5. The circuit of claim 4, wherein the duration of the ON-state is determined by the first controller unit of the controller using the equation TON — Ts — T0FF—LED av3Ts, where!LEDILEDis the instantaneous LED current, ILED-avgis the LED average current, Tsis the switching period duration, and TOFF and TON are the OFF-state and ON-state durations.

6. The circuit of claim 5, wherein the duration of the OFF-state of the at least one switch is determined during the preceding ON-state duration, such that the OFF-state duration for a switching period is determined while the at least one switch is in the ON-state of the same switching period.

7. The circuit of claim 6, wherein the controller is an analog controller housing: a low pass filter coupled to the voltage sensor, the low pass filter generates an averaged LED load current by averaging a measured load current of the LED load from the voltage sensor; a current compensator coupled to the output of the low pass filter, the current compensator generates an LED current control signal based on a comparison of a desired reference current with the averaged LED load current; a current integrator coupled to the output of the voltage sensor, the current integrator generates a current waveform based on the integral of the measured load current of the LED load; and a pulse generator coupled to the output of the current integrator and current compensator, which generates a gate signal for the at least one switch based on a comparison of the current waveform generated by the current integrator and the LED current control signal generated by the current compensator.

8. The circuit of claim 6, wherein the controller is a digital controller containing:- 49 -CAN_DMS: \1008239681a second controller unit, communicatively coupled to the first controller unit, including a first voltage sensor measuring the AC voltage from the grid connection, a first current sensor measuring the AC current from the grid connection, and a second voltage sensor measuring an instant output voltage of the PFC circuit, the second controller unit generates gating signals for a plurality of switches which controls the DC voltage provided by the PFC circuit.

9. The circuit of claim 8, further comprising an analogue to digital converter (ADC) housed within the first controller unit, the ADC receiving, after a pre-determined time has passed from the at least one switch entering the ON-state, the LED instant current values of the switching period from the voltage sensor, and generating, prior to completion of the switching period, the average LED load current for the current switching period based on an averaging of the LED instant current values.

10. The circuit of claim 9, wherein the DC voltage of the PFC circuit is reduced so that a minimum DC voltage provided to the PWM FRC is above a nominal LED voltage of the LED load .

11. The circuit of claim 10, wherein the duty cycle value has a maximum value above 95% and the minimum DC voltage is 0% to 5% above the nominal LED voltage.

12. The circuit of claim 9, wherein in response to the first controller unit sensing a change in the desired reference LED current based on a dimming signal input indicating a desired brightness, the first controller unit adjusts the duty cycle value of the at least one switch to achieve an average LED load current equal to the desired reference LED current.

13. The circuit of claim 1 , wherein the controller, when modulating the duty cycle value of the at least one switch, compensates the duty cycle value, by adjusting a minimum, a maximum and / or an average duty cycle value, to generate a compensated duty cycle value free of lumen ripple, the minimum, maximum and average duty cycle value correspond to the maximum, minimum and average LED instant current measured by the controller.

14. The circuit of claim 13, wherein the compensated duty cycle value is generated by the controller by reducing the maximum duty cycle value while the minimum duty cycle value remains unchanged.- 50 -CAN_DMS: \100823968115. The circuit of claim 13, wherein the compensated duty cycle value is generated by the controller by increasing the minimum duty cycle value while the maximum duty cycle value remains unchanged.

16. The circuit of claim 13, wherein the compensated duty cycle value is generated by increasing the minimum duty cycle value and decreasing the maximum duty cycle value.

17. The circuit of claim 13, wherein the compensated duty cycle value is linearly related to the uncompensated duty cycle value.

18. The circuit of claim 13, wherein the compensated duty cycle value is non-linearly related to the uncompensated duty cycle value.

19. The circuit of claim 1, wherein the PFC circuit is a flyback converter.

20. The circuit of claim 1, wherein the PFC circuit is an LLC resonant converter.

21. A method for controlling an average light emitting diode (LED) load current to reduce a low frequency flicker of an LED using a control circuit, the control circuit including an AC grid connection and an LED driver connected in series with the LED load, wherein the LED driver contains a power factor corrector (PFC) circuit and a pulse width modulation (PWM) flicker removal circuit (FRC), the method comprising: generating a DC voltage, using the PFC circuit electrically coupled in parallel with the AC grid connection, by converting the AC voltage source from the AC grid connection into an output DC voltage containing some AC low frequency ripple; sensing, using a voltage sensor coupled to at least one current sensing device within the PWM FRC, an LED instant current of the LED load from the DC voltage being supplied to the LED load; retrieving, using a controller coupled to the voltage sensor, the LED instant current value of the LED load from the at least one current sensing device; and generating gating signals, using the controller, for the at least one switch to modulate the duty cycle based on the LED instant current of the LED load to maintain the constant average LED load current and reduce the impact of the low frequency ripple on the lumen value of the LED load.

22. The method of claim 21, further comprising, modulating, using the controller, the duty cycle value of the at least one switch by controlling the duration of the switching period- 51 -CAN_DMS: \1008239681of the at least one switch, and a duration of time that the at least one switch is in the ON-state or an OFF-state is kept constant.

23. The method of claim 22, further comprising, determining, using the controller, the duration of the switching period using the equation Ts= 'LEDT0N, when the duration^LED-avg of the ON-state is constant, and T = - —- T0FF, when the duration of the OFF-^LED ~^LED — avg state is constant, where ILEDis the instantaneous LED current, ILED-aVg is the LED average current, Tsis the switching period duration, and TOFF and TON are the OFF- state and ON-state durations.

24. The method of claim 21, further comprising, modulating, using the controller, the duty cycle value of the at least one switch by controlling a duration of time that the at least one switch is in an ON state, and a switching period of the at least one switch is kept constant.

25. The method of claim 24, further comprising determining, using the controller, the duration of the ON-state using the equation T0N= TS- T0FF=,LED-av^ Ts. where ILEDis ED the instantaneous LED current, ILED-avgis the LED average current, Tsis the switching period duration, and TOFF and TON are the OFF-state and ON-state durations.

26. The method of claim 25, wherein the duration of the OFF-state of the at least one switch is determined during the preceding ON-state duration, such that the OFF-state duration for a switching period is determined while the at least one switch is in the ON- state of the same switching period.

27. The method of claim 26, wherein the controller is an analog controller containing: a low pass filter coupled to the voltage sensor, the low pass filter generates an averaged LED load current by averaging a measured load current of the LED load from the voltage sensor; a current compensator coupled to the output of the low pass filter, the current compensator generates an LED current control signal based on a comparison of a desired reference current with the averaged LED load current;- 52 -CAN_DMS: \1008239681a current integrator coupled to the output of the voltage sensor, the current integrator generates a current waveform based on the integral of the measured load current of the LED load; and a pulse generator coupled to the output of the current integrator and current compensator, which generates a gate signal for the at least one switch based on a comparison of the current waveform generated by the current integrator and the LED current control signal generated by the current compensator.

28. The method of claim 26, wherein the controller is a digital controller containing: a second controller unit, communicatively coupled to the first controller unit, including a first voltage sensor measuring the AC voltage from the grid connection, a first current sensor measuring the AC current from the grid connection, and a second voltage sensor measuring an instant output voltage of the PFC circuit, the second controller unit generates gating signals for a plurality of switches which controls the DC voltage provided by the PFC circuit.

29. The method of claim 28, further comprising receiving, using an analogue to digital converter (ADC) housed within the first controller unit, after a pre-determined time has passed from the at least one switch entering the ON-state, the LED instant current values of the switching period from the voltage sensor, and generating, prior to completion of the switching period, the average LED load current for the current switching period based on an averaging of the LED instant current values.

30. The method of claim 29, wherein the DC voltage of the PFC circuit is reduced so that a minimum DC voltage provided to the PWM FRC is above a nominal voltage for the LED load.

31. The method of claim 30, wherein the duty cycle value has a maximum value above 95% and the minimum DC voltage is 0% to 5% above the nominal LED voltage.

32. The method of claim 29, wherein in response to the first controller unit sensing a change in the desired reference LED current based on a dimming signal input indicating a desired brightness, the first controller unit adjusts the duty cycle value of the at least one switch to achieve an average LED load current equal to the desired reference LED current.- 53 -CAN_DMS: \100823968133. The method of claim 29, wherein the controller, when modulating the duty cycle value of the at least one switch, compensates the duty cycle value, by adjusting a minimum, a maximum and / or an average duty cycle value, to generate a compensated duty cycle value free of lumen ripple, the minimum, maximum and average duty cycle value correspond to the maximum, minimum and average LED instant current measured by the controller.

34. The method of claim 33, wherein the compensated duty cycle value is generated by the controller by reducing the maximum duty cycle value while the minimum duty cycle value remains unchanged.

35. The method of claim 33, wherein the compensated duty cycle value is generated by the controller by increasing the minimum duty cycle value while the maximum duty cycle value remains unchanged.

36. The method of claim 33, wherein the compensated duty cycle value is generated by increasing the minimum duty cycle value and decreasing the maximum duty cycle value.

37. The method of claim 33, wherein the compensated duty cycle value is linearly related to the uncompensated duty cycle value.

38. The method of claim 33, wherein the compensated duty cycle value is non-linearly related to the uncompensated duty cycle value.

39. The method of claim 21, wherein the PFC circuit is a flyback converter.

40. The method of claim 21, wherein the PFC circuit is an LLC resonant converter.

41. A non-transitory machine readable medium storing machine readable instructions, which when executed by a processor, cause the processor to perform a method of controlling an average light emitting diode (LED) load current to reduce a low frequency flicker of an LED load according to any one of claims 21-40.

42. A light emitting diode (LED) driver for controlling a variable power LED load at start-up, the LED driver connected in series between a power factor correction (PFC) circuit and the LED load, the LED driver comprising: a pulse width modulation flicker removal circuit (PWM FRC) including at least one switch and at least one current sensing device, the PWM FRC is electrically coupled in series with the LED load and PFC, the at least one switch operating a duty cycle which represents the duration of time the at least one switch spends in an ON-state as- 54 -CAN_DMS: \1008239681compared to an OFF-state, the PFC circuit providing a DC output voltage to the PWM FRC which contains a low frequency ripple such that the DC output voltage fluctuates between a minimum and maximum DC output voltage value; a first controller including a voltage sensor coupled to the at least one current sensing device for sensing an instant LED load current, and including a first controller unit electrically coupled to the at least one switch of the PWM FRC to control the duty cycle value; a second controller coupled to the PFC circuit, the second controller including a first voltage sensor and first current sensor both electrically coupled to an AC grid source and a second voltage sensor electrically coupled to the PWM FRC, the second controller housing a second controller unit which is communicatively coupled to the first controller unit, the second controller unit controlling a plurality of switches within the PFC circuit; and wherein at the time of start-up of the LED load, which occurs when the LED transitions to an ON-state, the second controller unit signals the plurality of switches to set an output voltage within the PFC circuit to a nominal LED voltage of the LED load; and wherein, after a pre-determined duration of time after start-up, the second controller unit signals the plurality of switches to increase the output voltage until the minimum output voltage value is above the nominal LED voltage.

43. The LED driver of claim 42, wherein the first controller unit retrieves a plurality of LED load current measurements within the PWM FRC using the voltage sensor to generate an average LED load current which is used in modulating the duty cycle of the at least one switch.

44. The LED driver of claim 43, wherein at the time of start-up, the duty cycle value of the at least one switch is set to 100% by the first controller unit so that the average voltage applied to the LED load is the same as a desired nominal LED load voltage.

45. The LED driver of claim 44, wherein the first controller unit retrieves a plurality of measurements, using the voltage sensor, of the LED load current within the PWM FRC, and averages the plurality of measured LED load currents to generate an average LED load current.- 55 -CAN_DMS: \100823968146. The LED driver of claim 43, wherein at the time of start-up, the duty cycle value of the at least one switch is set to a range of 1% - 20% by the first controller unit.

47. The LED driver of claim 46, wherein the first controller unit retrieves a plurality of measurements, using the voltage sensor, of the LED load current within the PWM FRC, and averages the plurality of measured LED load currents to generate an average LED load current.

48. The LED driver of claim 45, wherein, upon generating the average LED load current, the first controller generates a signal to the second controller, and in response to the signal, the second controller increases the output voltage of the PFC circuit until the minimum output voltage value of the output voltage is higher than the desired nominal LED load voltage.

49. The LED driver of claim 45, wherein, upon generating the average LED load current, the second controller, based on a preset maximum duty cycle and desired nominal LED voltage, increases the output voltage of the PFC circuit until the minimum output voltage value of the output voltage is higher than the desired nominal LED load voltage.

50. The LED driver of claim 47, wherein, upon generating the average LED load current, the second controller holds the output voltage constant and the first controller sets the average LED load current to equal a nominal LED load current determined by a user.

51. The LED driver of claim 50, wherein upon the average LED load current matching the nominal LED load current, the first controller generates a signal to the second controller, and in response to the signal, the second controller increases the output voltage of the PFC circuit until the minimum output voltage value of the output voltage is equal to the desired nominal LED load voltage.

52. The LED driver of claim 49, wherein, upon the average LED load current matching the nominal LED load current, the second controller, based on a preset maximum duty cycle and the desired nominal LED voltage, increases the output voltage of the PFC circuit until the minimum output voltage value of the output voltage is higher than the desired nominal LED load voltage.

53. The LED driver of claim 51 , wherein in response to a reduction in the nominal LED load current, the second controller modulates the plurality of switches to lower the output- 56 -CAN_DMS: \1008239681voltage by reducing the maximum output voltage value of the output voltage, and maintaining the minimum voltage value higher than the desired nominal LED load voltage.

54. A method for controlling a variable power light emitting diode (LED) load at start-up using a control circuit, the circuit containing an LED driver connected in series between a power factor correction (PFC) circuit and the LED load, the PFC circuit providing a DC output voltage to the PWM FRC which contains a low frequency ripple such that the DC output voltage fluctuates between a minimum and maximum DC output voltage value, the LED driver housing a pulse width modulation (PWM) flicker removal circuit (FRC) including at least one switch and at least one current sensing device, the PWM FRC is electrically coupled in series with the LED load and the PFC, the method comprising: sensing, using a first voltage sensor and a first current sensor of a second controller unit, an instantaneous AC current and voltage from an AC grid source connected in series with the PFC circuit; sensing, using a second voltage sensor of the second controller unit, an instantaneous DC voltage of the PWM FRC; generating gate signals to start-up the LED load, using the second controller unit, for a plurality of switches within the PFC circuit to generate an output voltage within the PFC circuit, the gate signals being adjusted based on feedback received from first voltage sensor, first current sensor and second voltage sensor of the second controller unit; sensing, using a voltage sensor of a first controller unit coupled to the at least one current sensing device of the PWM FRC, an instantaneous LED load current measurement over a period of time beginning after a pre-determined duration of time has elapsed since start-up to when the at least one switch enters an OFF-state; and generating, based on the instantaneous LED load current measurements, a nominal LED load current for modulating a duty cycle of the at least one switch.

55. The LED driver of claim 54, further comprising retrieving, using the first controller unit, a plurality of LED load current measurements within the PWM FRC using the voltage- 57 -CAN_DMS: \1008239681sensor to generate an average LED load current which is used in modulating the duty cycle of the at least one switch.

56. The method of claim 55, wherein at the point of start-up, the duty cycle value of the at least one switch is set to 100% by the first controller unit so that the voltage applied to the LED load is the same as the desired nominal LED voltage.

57. The method of claim 56, wherein the first controller unit retrieves a plurality of measurements, using the voltage sensor, of the nominal LED load current within the PWM FRC, and averages the plurality of measured nominal LED load currents to generate an average nominal LED load current.

58. The method of claim 55, wherein at the point of start-up, the duty cycle value of the at least one switch is set to a range of 1% - 20% by the first controller unit so that the voltage applied to the LED load is the same as the desired nominal LED voltage.

59. The method of claim 58, wherein the first controller unit retrieves a plurality of measurements, using the voltage sensor, of the nominal LED load current within the PWM FRC, and averages the plurality of measured nominal LED load currents to generate an average nominal LED load current.

60. The method of claim 57, wherein, upon generating the average LED load current, the first controller generates a signal to the second controller, and in response to the signal, the second controller increases the output voltage of the PFC circuit until a minimum output voltage value of the output voltage is equal to the desired nominal LED load voltage.

61. The method of claim 57, wherein, upon generating the average LED load current, the second controller, based on a preset maximum duty cycle and desired nominal LED voltage, increases the output voltage of the PFC circuit until a minimum output voltage value of the output voltage is equal to the desired nominal LED load voltage.

62. The method of claim 59, wherein, upon generating the average LED load current, the second controller holds the output voltage constant and the first controller sets the average LED load current to equal a nominal LED load current determined by a user.

63. The method of claim 62, wherein upon the average LED load current matching the nominal LED load current, the first controller generates a signal to the second- 58 -CAN_DMS: \1008239681controller, and in response to the signal, the second controller increases the output voltage of the PFC circuit until a minimum output voltage value of the output voltage is equal to the desired nominal LED load voltage.

64. The method of claim 62, wherein, upon the average LED load current matching the nominal LED load current, the second controller, based on a preset maximum duty cycle and the desired nominal LED voltage, increases the output voltage of the PFC circuit until a minimum output voltage value of the output voltage is equal to the desired nominal LED load voltage.

65. The method of claim 64, wherein in response to a reduction in the nominal LED load current, the second controller modulates the plurality of switches to lower the output voltage by reducing the maximum output voltage value of the output voltage, and maintaining the minimum voltage value equal to the desired nominal LED load voltage.

66. A non-transitory machine readable medium storing machine readable instructions, which when executed by a processor, cause the processor to perform a method of controlling a variable power light emitting diode (LED) load at start-up according to any one of claims 54-65.- 59 -CAN_DMS: \1008239681

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