Light-emitting diode and light-emitting device
By introducing a first spacer layer into the light-emitting diode and adjusting its thickness-to-current density ratio, the recombination emission position of electrons and holes in the active region is optimized, thus solving the problem of limited luminous efficiency under high current density and achieving higher luminous efficiency.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-09-30
- Publication Date
- 2026-04-02
AI Technical Summary
The external quantum efficiency of light-emitting diodes decreases at high current densities, which limits their luminous efficiency and prevents further improvement.
By introducing a first spacer layer into a light-emitting diode and adjusting the ratio of its thickness to current density, the recombination emission position of electrons and holes in the active region is optimized, making full use of the active region area. The thickness of the spacer layer can be designed with different current densities and chip sizes.
Improving the luminous efficiency of light-emitting diodes (LEDs) and achieving higher external quantum efficiency under different current densities and chip sizes.
Smart Images

Figure CN2025125962_02042026_PF_FP_ABST
Abstract
Description
Light emitting diode and light emitting device TECHNICAL FIELD
[0001] The present application relates to the field of semiconductor manufacturing, and in particular to a light emitting diode and a light emitting device. BACKGROUND
[0002] Light emitting diodes (LEDs) are considered as one of the most potential light sources due to their high luminous intensity, high efficiency, small size, long service life, and other advantages. In recent years, LEDs have been widely used in daily life.
[0003] At the current stage, LEDs still face many technical challenges, one of which is the efficiency droop effect. Specifically, when the LED is operated in a low current density range, it corresponds to a peak value of external quantum efficiency (EQE). However, as the current density of the LED continues to rise, the external quantum efficiency will decrease, which is the efficiency droop effect of the LED.
[0004] Generally, in order to make the LED achieve high-brightness light emission, the current density of the LED is usually in a high current density operating range. Due to the above-mentioned efficiency droop effect, the external quantum efficiency of the LED in the high current density operating range is limited, and the light emitting efficiency of the LED cannot be further improved. TECHNICAL SOLUTION
[0005] In order to improve the light emitting efficiency of the LED, the present application proposes a light emitting diode and a light emitting device, the light emitting diode comprising: a semiconductor epitaxial stack having opposite first and second surfaces, containing a first type semiconductor layer, an active layer and a second type semiconductor layer stacked in sequence from the first surface to the second surface direction; the active layer contains n periods of quantum well structures, each period of quantum well structure includes a well layer and a barrier layer deposited in sequence; characterized in that: a first spacer layer is contained between the first type semiconductor layer and the active layer, the ratio of the thickness (nm) of the first spacer layer to the current density (A / cm 2 ) of the LED is between 0-10.
[0006] In some optional embodiments, the ratio of the thickness (nm) of the first spacer layer to the current density (A / cm 2 ) of the LED is between 0-5.
[0007] In some optional embodiments, the thickness of the first spacer layer is 0-120 nm.
[0008] In some alternative embodiments, the current density of the light emitting diode is greater than 10 A / cm 2 When the current density of the light emitting diode is less than or equal to 10 A / cm
[0009] In some alternative embodiments, the current density of the light emitting diode is greater than 10 A / cm 2 When the current density of the light emitting diode is less than or equal to 10 A / cm
[0010] In some alternative embodiments, the material of the first spacer layer is Al a Ga 1-a InP, wherein a ranges from 0.2 to 1.
[0011] In some alternative embodiments, the first spacer layer is n-type doped, and the doping concentration is less than 2E17 / cm 3 .
[0012] In some alternative embodiments, the length of at least one side of the light emitting diode is greater than 100 μm.
[0013] In some alternative embodiments, the length of at least one side of the light emitting diode is less than or equal to 100 μm.
[0014] In some alternative embodiments, the light emitting diode further comprises a second spacer layer, which is located between the active layer and the second type semiconductor layer.
[0015] In some alternative embodiments, the material of the second spacer layer is Al b Ga 1-b InP, wherein b ranges from 0.2 to 1.
[0016] In some alternative embodiments, the number of periods n of the active layer ranges from 1 to 100.
[0017] In some alternative embodiments, the thickness of the well layer ranges from 2 to 25 nm; and the thickness of the barrier layer ranges from 2 to 25 nm.
[0018] In some alternative embodiments, the light emitting diode further comprises a first electrode and a second electrode, which respectively form an electrical connection with the first type semiconductor layer and the second type semiconductor layer.
[0019] In some alternative embodiments, the material of the active layer is AlGaInP-based material composition.
[0020] The application further provides a light emitting diode, comprising: a semiconductor epitaxial stack having opposite first and second surfaces, and comprising a first type semiconductor layer, an active layer and a second type semiconductor layer stacked in sequence from the first surface to the second surface; the active layer comprises n periods of quantum well structures, each period of quantum well structure comprises a well layer and a barrier layer deposited in sequence; a first spacer layer is comprised between the first type semiconductor layer and the active layer; wherein the light emitting diode has a first side, a second side, a third side and a fourth side surrounding in sequence, wherein the first side is parallel to the third side, the second side is parallel to the fourth side, the length of the first side is greater than or equal to the length of the second side, the size of the second side is greater than or equal to 100 μm, and the thickness of the first spacer layer is 50-120 nm; or the size of the second side is less than 100 μm, and the thickness of the first spacer layer is 0-50 nm.
[0021] In some optional embodiments, the material of the first spacer layer is Al a Ga 1-a InP, wherein a ranges from 0.2 to 1.
[0022] In some optional embodiments, the first spacer layer is n-type doped, and the doping concentration is less than 2E17 / cm 3 .
[0023] In some optional embodiments, the light emitting diode further comprises a first electrode and a second electrode, which are electrically connected to the first type semiconductor layer and the second type semiconductor layer, respectively.
[0024] In some optional embodiments, the material of the active layer is AlGaInP-based material composition.
[0025] The application further provides a light emitting device, comprising a driving unit and a light emitting diode, wherein the driving unit is electrically connected to the light emitting diode, and the light emitting diode has opposite first and second surfaces, and comprises a first type semiconductor layer, an active layer and a second type semiconductor layer stacked in sequence from the first surface to the second surface; the active layer comprises n periods of quantum well structures, each period of quantum well structure comprises a well layer and a barrier layer deposited in sequence; characterized in that: a first spacer layer is comprised between the first type semiconductor layer and the active layer, and the ratio of the thickness (nm) of the first spacer layer to the current density (A / cm 2 ) of the light emitting diode is between 0 and 10.
[0026] In some optional embodiments, a first spacer layer is comprised between the first type semiconductor layer and the active layer, and the ratio of the thickness (nm) of the first spacer layer to the current density (A / cm 2 ) of the light emitting diode is between 0 and 5.
[0027] In some alternative embodiments, the current density of the light emitting diode is greater than 10A / cm 2 , and the thickness of the first spacer layer is 50-120nm.
[0028] In some alternative embodiments, the current density of the light emitting diode is less than or equal to 10A / cm 2 , and the thickness of the first spacer layer is 0-50nm.
[0029] In some alternative embodiments, the material of the first spacer layer is Al a Ga 1-a InP, and the range of a is 0.2-1.
[0030] In some alternative embodiments, the first spacer layer is n-type doped, and the doping concentration is 2E17 / cm 3 .
[0031] In some alternative embodiments, the material of the active layer is AlGaInP-based material composition.
[0032] In the light emitting diode and light emitting device of the embodiments of the present application, the thickness of the first barrier layer in the light emitting diode can be designed according to the different working ranges of the current density of the light emitting diode or the chip size, so as to realize more ideal external quantum efficiency of the light emitting diode, and further improve the light emitting efficiency of the light emitting device. The light emitting diode in the light emitting device can have ideal light emitting efficiency under different operating ranges of the current density.
[0033] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent to those skilled in the art from the description, or can be learned by practice of the present application. The objects and other advantages of the present application can be achieved and obtained by means of the structures particularly pointed out in the description, the claims and the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS
[0034] The accompanying drawings are included to provide a further understanding of the present application, and constitute a part of the specification, illustrate embodiments of the present application and explain the present application, and do not constitute a limitation of the present application. In addition, the data in the drawings is a description summary, and is not drawn to scale.
[0035] Fig. 1 is a schematic diagram of the epitaxial structure mentioned in the embodiment 1 of the present application.
[0036] Fig. 2 is a schematic diagram of the structure of the light emitting diode mentioned in the embodiment 1 of the present application.
[0037] Figs. 3-4 are schematic diagrams of the structure in the process of preparing the light emitting diode mentioned in the embodiment 2 of the present application.
[0038] Figure 5 is a schematic diagram of the structure of a light emitting diode mentioned in Embodiment 3 of the present application.
[0039] Figure 6 is a schematic diagram of the structure of a light emitting diode mentioned in Embodiment 4 of the present application.
[0040] Figure 7 is a schematic diagram of the structure of a micro light emitting element mentioned in Embodiment 4 of the present application.
[0041] Figures 8 to 14 are schematic diagrams of the structure of a micro light emitting element during the manufacturing process mentioned in Embodiment 5 of the present application.
[0042] Figure 15 is a schematic diagram of the structure of a light emitting device mentioned in Embodiment 6 of the present application.
[0043] Reference signs: growth substrate: 100; buffer layer: 101; etching stop layer: 102; first ohmic contact layer: 103; first current spreading layer: 104; first cover layer: 105; first spacer layer: 106; active layer: 107; second spacer layer: 108; second cover layer: 109; second current spreading layer: 110; second ohmic contact layer: 111; substrate: 200; bonding layer: 201; mirror layer: 202; ohmic contact metal layer: 202a; dielectric material layer: 202b; first electrode: 203; ohmic contact part of the first electrode: 203a; ohmic contact part of the second electrode: 204a; second electrode: 204; pad electrode of the first electrode: 203b; pad electrode of the second electrode: 204b; bonding glue: 205; first mesa: S1; second mesa: S2; insulating protective layer: 207; horizontal part of the insulating protective layer: 2071; sacrificial layer: 208; pedestal: 250; bridge arm: 240. DETAILED DESCRIPTION
[0044] In order to make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application. EMBODIMENT
[0045] The present embodiment provides a light emitting diode, which adjusts the thickness of the first spacer layer according to the current density at which the light emitting diode works or the size of the light emitting diode, so as to realize the light emitting efficiency of the light emitting diode.
[0046] Figure 1 is a schematic diagram of a light emitting diode epitaxial structure according to a preferred embodiment, which comprises a growth substrate 100, and a semiconductor epitaxial stack comprising a first current spreading layer 104, a first cover layer 105, a first spacer layer 106, an active layer 107, a second spacer layer 108, a second cover layer 109, a second current spreading layer 110 and a second ohmic contact layer 111, which are sequentially stacked on the growth substrate 100.
[0047] Specifically, referring to Figure 1, the material of the growth substrate 100 includes, but is not limited to, GaAs, and other materials such as GaP, InP, etc. can also be used. In this embodiment, the GaAs growth substrate 100 is taken as an example. Optionally, a buffer layer 101, an etching stop layer 102 and a first ohmic contact layer 103 are sequentially arranged between the growth substrate 100 and the first current spreading layer 104; since the lattice quality of the buffer layer 101 is better than that of the growth substrate 100, growing the buffer layer 101 on the growth substrate 100 is beneficial to eliminate the influence of the lattice defects of the growth substrate 100 on the semiconductor epitaxial stack; the etching stop layer 102 is used as a stop layer for chemical etching in a later step, and in some optional embodiments, the etching stop layer 102 is an n-type etching stop layer, and the material is n-GaInP. In order to facilitate the subsequent removal of the growth substrate 100, the thickness thereof is controlled to be within 500 nm, and more preferably within 200 nm. In some optional embodiments, the first ohmic contact layer 103 is a GaAs material, the thickness thereof ranges from 10 nm to 100 nm, and the doping concentration thereof is 1E+18 / cm 3 3 to achieve better ohmic contact results.
[0048] The semiconductor epitaxial stack can be formed on the growth substrate 100 by physical vapor deposition (PVD), chemical vapor deposition (CVD), epitaxial growth (Epitaxy Growth Technology) and atomic layer deposition (ALD) and the like. The semiconductor epitaxial stack is a semiconductor material capable of providing conventional radiation such as ultraviolet, blue, green, yellow, red, infrared light and the like, and specifically can be a material of 200-950 nm, such as a common nitride, specifically a gallium nitride-based semiconductor epitaxial stack, which is commonly doped with elements such as aluminum and indium, and mainly provides radiation in the 200-550 nm band; or a common aluminum gallium indium phosphorus-based or aluminum gallium arsenide-based semiconductor epitaxial stack, which mainly provides radiation in the 550-950 nm band.
[0049] The semiconductor epitaxial stack has opposite first and second surfaces, and comprises a first type semiconductor layer, an active layer, and a second type semiconductor layer stacked in sequence from the first surface to the second surface. The first type semiconductor layer and the second type semiconductor layer can be respectively doped with n-type or p-type dopants to provide electrons or holes. The n-type semiconductor layer can be doped with n-type dopants such as Si, Ge, or Sn, and the p-type semiconductor layer can be doped with p-type dopants such as Mg, Zn, Ca, Sr, C, or Ba. When the first type semiconductor layer is an n-type semiconductor, the second type semiconductor layer is a p-type semiconductor layer; when the first type semiconductor layer is a p-type semiconductor layer, the second type semiconductor layer is an n-type semiconductor layer. The first type semiconductor layer, the active layer, and the second conductive type semiconductor layer can be made of materials such as aluminum gallium indium nitride, gallium nitride, aluminum gallium nitride, aluminum indium phosphide, aluminum gallium indium phosphide, or gallium arsenide or aluminum gallium arsenide. In this embodiment, the first type semiconductor layer is preferably an n-type semiconductor layer.
[0050] The first type semiconductor layer and the second type semiconductor layer respectively include first and second cladding layers 105 and 109 that provide electrons or holes for the active layer 107, such as aluminum gallium indium phosphide or aluminum indium phosphide or aluminum gallium arsenide. More preferably, when the active layer 107 is made of aluminum gallium indium phosphide, aluminum indium phosphide is used as the first and second cladding layers 105 and 109 to provide electrons and holes. In order to improve the uniformity of current spreading, the first type semiconductor layer and the second type semiconductor layer further include first and second current spreading layers 104 and 110. Since the hole mobility is smaller than the electron mobility, electrons and holes tend to recombine and emit light in the active region near the P-type cladding layer, resulting in a waste of active area and a reduction in the internal quantum efficiency of the light emitting chip. In order to adjust the position of the recombination of electrons and holes in the active region (MQW) of the light emitting diode and make full use of the active area, a first spacing layer 106 is provided between the first cladding layer 105 and the active layer 107, and a second spacing layer 108 is provided between the second cladding layer 109 and the active layer 107.
[0051] The first current spreading layer 104 functions to spread the current, and its spreading ability is related to its thickness. In this embodiment, the preferred material is Al y1 Ga 1-y1 InP, with a thickness of 2500-4000 nm, and an n-type doping concentration of 2E17-4E18 / cm 3 , preferably 4E17-2E18 / cm 3 . The n-type doping is commonly Si doping, and other elements can also be used as equivalent substitutes.
[0052] The first spacing layer 106 is located between the first cladding layer 105 and the active layer 107, and the preferred material is Ala1 Ga 1-a1 InP, thickness of the first spacer layer 106 is preferably 120 nm or less, Al component content a1 is in the range of 0.2 ~ 1; in the embodiment, the first spacer layer 106 is preferably n-type doped, and the doping concentration is less than 2E17 / cm 3 .
[0053] The first spacer layer 106 plays a role of limiting carrier injection into the active layer 107. By adjusting the thickness of the first spacer layer according to different current densities of the light emitting diode, the position of the electron and hole recombination and light emission in the active region (MQW) of the light emitting diode can be adjusted, and the area of the active region can be fully utilized, so as to achieve the purpose of improving the light emitting efficiency of the light emitting diode. Therefore, in the embodiment, the ratio of the thickness (nm) of the first spacer layer 106 to the current density (A / cm 3 ) of the light emitting diode is in the range of 0 ~ 10; preferably, the ratio of the thickness (nm) of the first spacer layer 106 to the current density (A / cm 3 ) of the light emitting diode is in the range of 0 ~ 5. In the low current density condition, for example, the current density is less than 10 A / cm 3 , preferably, the ratio of the thickness (nm) of the first spacer layer 106 to the current density (A / cm 3 ) of the light emitting diode is in the range of 0 ~ 3, preferably in the range of 0 ~ 2; in the medium-high current density condition, for example, the current density is greater than 10 A / cm 3 , preferably, the ratio of the thickness (nm) of the first spacer layer 106 to the current density (A / cm 3 ) of the light emitting diode is in the range of 0 ~ 10, more preferably in the range of 1 ~ 5; or 1.5 ~ 8, which can effectively adjust the position of the electron and hole recombination and light emission in the active region (MQW) of the light emitting diode, fully utilize the area of the active region, and thus achieve the purpose of improving the light emitting efficiency of the light emitting diode.
[0054] In some optional embodiments, the current density of the light emitting diode using the epitaxial structure of the embodiment is greater than 10 A / cm 3 , the thickness of the first spacer layer 106 is preferably 50 ~ 120 nm; and the length of at least one side of the light emitting diode is greater than 100 μm.
[0055] In some optional embodiments, the current density of the light emitting diode using the epitaxial structure of the embodiment is less than or equal to 10 A / cm 3 , the thickness of the first spacer layer 106 is preferably 0 ~ 50 nm; and preferably, the length of at least one side of the light emitting diode is less than or equal to 100 μm.
[0056] The first interval layer thickness can be adjusted according to the size of the chip, the light emitting diode has a first side, a second side, a third side and a fourth side which are sequentially surrounded, wherein the first side is parallel to the third side, the second side is parallel to the fourth side, the length of the first side is greater than or equal to the length of the second side, the size of the second side is greater than or equal to 100 μm, and the thickness of the first interval layer is 50-120 nm; or the size of the second side is less than 100 μm, and the thickness of the first interval layer is 0-50 nm. The thickness of the first interval layer can be adjusted according to the size of the chip, so as to effectively control the position of the electron and hole in the active region (MQW) of the light emitting diode, fully utilize the active region area, and thus improve the light emitting efficiency of the light emitting diode.
[0057] The first covering layer 105 provides electrons for the active layer, and the preferred material is AlInP, and the thickness is 300-1500 nm; the common n-type doping is Si doping, and other element equivalent doping is not excluded.
[0058] The active layer 107 provides a light radiation area for the electron and hole combination, and different materials can be selected according to different light emitting wavelengths. The active layer 107 can be a single quantum well or a periodic structure of multiple quantum wells. In the embodiment, the active layer 107 is a quantum well structure with n periods, each quantum well structure comprises a well layer and a barrier layer which are sequentially deposited, wherein the barrier layer has a larger band gap than the well layer. The composition ratio of the semiconductor material in the active layer 107 is adjusted to radiate light with a target wavelength. The active layer 107 is a material layer for providing electroluminescence radiation, such as aluminum gallium indium phosphorus or aluminum gallium arsenide, and more preferably aluminum gallium indium phosphorus, which is a single quantum well or a multiple quantum well. In the embodiment, the preferred semiconductor epitaxial stack is composed of AlGaInP-based materials, and the active layer radiates light with a wavelength of 550-750 nm.
[0059] In the embodiment, the number n of periods of the quantum well structure is 2-100. The well layer is composed of Al x Ga 1-x InP materials; the barrier layer is composed of Al y Ga 1-y InP materials, wherein 0≤x≤y≤1. The thickness of the well layer is 2-25 nm, and preferably 8-20 nm; the thickness of the barrier layer is 2-25 nm, and preferably 10-20 nm. The Al content y of the barrier layer ranges from 0.3 to 0.85.
[0060] The second interval layer 108 is located on the active layer 107, and the material of the second interval layer 108 is preferably Al b2 Ga 1-b2InP, thickness of the second spacer layer 108 is preferably 300 nm or less, Al component content b1 of the second spacer layer 108 ranges from 0.3 to 1, preferably Al component content b1 ranges from greater than 0.5 to 1 or less; the doping concentration is less than 2E17 / cm 3 .
[0061] The second type semiconductor layer comprises a second cover layer 109, a second current spreading layer 110 and a second ohmic contact layer 111; wherein the second cover layer 109 provides holes for the active layer 107, preferably the material is AlInP, and the thickness is 300-1500 nm; the p-type doping is commonly Mg doping, and other element equivalent alternative doping is not excluded.
[0062] The second current spreading layer 110 plays a role of current spreading, and its spreading capacity is related to the thickness, so in the embodiment, the thickness can be selected according to the specific device size, and the preferable thickness is controlled to be 300 nm or more and 12000 nm or less. In the embodiment, the preferable thickness of the second current spreading layer 110 is 500-10000 nm. In the embodiment, the preferable material is GaP, and the p-type doping concentration is 6E17-2E18 / cm 3 , and the p-type doping is commonly magnesium doping or carbon doping, and other element equivalent alternative doping is not excluded.
[0063] The second ohmic contact layer 111 forms ohmic contact with the second electrode 204, and the preferable material is GaP, and the doping concentration is 1E19 / cm 3 , and more preferably 5E19 / cm 3 , so as to achieve better ohmic contact. The thickness of the second ohmic contact layer 111 is preferably 40 nm or more and 150 nm or less. In the embodiment, the thickness of the second ohmic contact layer 110 is preferably 60 nm.
[0064] FIG. 2 shows a schematic diagram of a light emitting diode, which adopts the epitaxial structure shown in FIG. 1, and the current density of the light emitting diode is greater than 10 A / cm 3 , and the size of the light emitting diode is preferably greater than 100 μm, that is, the length of at least one side of the light emitting tube is greater than 100 μm, and preferably greater than 300 μm or more. The light emitting diode is mainly applied to the fields of outdoor display screen, plant lighting, stage lamp, etc. In the embodiment, the thickness of the first spacer layer is 50-120 nm, and preferably 60 nm or more and 100 nm or less, which can effectively control the position of the electron and hole of the light emitting diode in the active region (MQW) to combine and emit light, fully utilize the active region area, and thus achieve the purpose of improving the light emitting efficiency of the light emitting diode.
[0065] The light emitting diode comprises a substrate 200, the semiconductor epitaxial stack is bonded to the substrate 200 through a bonding layer 201, the semiconductor epitaxial stack comprises a second ohmic contact layer 111, a second current spreading layer 110, a second cover layer 109, a second spacer layer 108, an active layer 107, a first spacer layer 106, a first cover 105, a first current spreading layer 104 and a first ohmic contact layer 103 which are sequentially stacked on the substrate 200.
[0066] The substrate 200 is a conductive substrate, which can be a silicon, silicon carbide or metal substrate, and the metal substrate is preferably a copper, tungsten or molybdenum substrate. In order to support the semiconductor epitaxial stack with sufficient mechanical strength, the thickness of the substrate 200 is preferably greater than 50 μm. In addition, in order to facilitate the mechanical processing of the substrate 200 after bonding to the semiconductor epitaxial stack, the thickness of the substrate 200 is preferably less than 300 μm. In the present embodiment, the substrate 200 is preferably a silicon substrate.
[0067] A first electrode 203 is provided on the first ohmic contact layer 103, and an ohmic contact is formed between the first electrode 203 and the first ohmic contact layer 103 to realize current flow. The first ohmic contact layer 103 only retains a portion vertically below the first electrode 203. The first current spreading layer 104 includes two portions in the horizontal direction, i.e., a portion P3 below the first electrode 203, and a portion P4 not below the first electrode 203 which is exposed to define a light emitting surface. The light emitting surface of the first current spreading layer 104 can be formed around the first electrode 203. In some alternative embodiments, the light emitting surface can be further formed into a patterned surface or a roughened surface through an etching process, wherein the patterned surface can be a surface with a pattern obtained by etching. The roughened surface can have a regular surface structure or an arbitrary irregular surface micro-nano structure, and the roughened surface or the patterned surface substantially allows light from the light emitting layer to escape more easily, thereby improving light emitting efficiency. Preferably, the light emitting surface is a roughened surface, and the height difference (or the difference in height) of the surface structure formed by roughening is less than 1 μm, and is preferably 10-300 nm.
[0068] The first current spreading layer 104 includes a second surface of the portion P1 below the first electrode 203, which is protected by the first electrode 203 and is not roughened. The horizontal height of the roughened surface of the first current spreading layer 104 is substantially lower than the horizontal height of the second surface (interface) below the first electrode 203 due to the roughening process.
[0069] Specifically, as shown in FIG. 2, in the embodiment, the first current spreading layer 104 includes a portion P1 under the first electrode 203 and a portion P2 not under the first electrode 203, the first current spreading layer 104 has a first thickness t1 in the portion P1 under the electrode, and the first current spreading layer 104 not covered by the first electrode has a second thickness t2. Preferably, the first thickness t1 is 1.5-2.5 microns, and the second thickness t2 is 0.5-1.5 microns. The thickness t1 of the portion P1 is greater than the thickness t2 of the portion P2. Preferably, the second thickness t2 is at least 0.3 microns less than the first thickness t1.
[0070] A mirror layer 202 can be arranged between the semiconductor epitaxial stack and the substrate 200, the mirror layer 202 includes a P-type ohmic contact metal layer 202a and a dielectric material layer 202b, which cooperate to form an ohmic contact with the second ohmic contact layer 110 on one hand, and to reflect the light beam emitted by the active layer 106 to the light emitting surface of the first current spreading layer 104 or the sidewall of the semiconductor epitaxial stack for light emission on the other hand.
[0071] The light emitting diode further includes a second electrode 204. In some embodiments, the second electrode 204 is arranged on the back surface of the substrate 200. Alternatively, the second electrode 204 is arranged on the substrate 200 on the same side as the semiconductor epitaxial stack.
[0072] The first electrode 203 and the second electrode 204 include a transparent conductive material and / or a metal material. The transparent conductive material includes a transparent conductive layer such as ITO or IZO, and the metal material includes at least one of GeAuNi, AuGe, AuZn, Au, Al, Pt, and Ti. Embodiment
[0073] FIGS. 3-4 show schematic diagrams of the manufacturing process of the light emitting diode according to the embodiment 1, and the manufacturing method of the light emitting diode according to the embodiment will be described in detail below in combination with the schematic diagrams.
[0074] First, referring to FIG. 1, an epitaxial structure is provided, which specifically includes the following steps: providing a growth substrate 100, epitaxially growing a semiconductor epitaxial stack on the growth substrate 100 by epitaxial growth process such as MOCVD, the semiconductor epitaxial stack includes a buffer layer 101 and an etching stop layer 102 successively stacked on the surface of the growth substrate 100, used to remove the epitaxial growth substrate 100, and then growing a structure including a first ohmic contact layer 103, a first current spreading layer 104, a first cover layer 105, a first spacer layer 106, an active layer 107, a second spacer layer 108, a second cover layer 109, a second current spreading layer 110, and a second ohmic contact layer 111.
[0075] Then, the semiconductor epitaxial stack is transferred to the substrate 200, and the growth substrate 100 is removed, to obtain a structure as shown in Fig. 3, which specifically comprises the following steps: a mirror layer 202 is made on the second ohmic contact layer 111, which comprises an ohmic contact metal layer 202a and a dielectric material layer 202b, which cooperate to form an ohmic contact with the second ohmic contact layer 111 on one hand, and to reflect light emitted by the active layer downwards on the other hand; a substrate 200 is provided, a metal bonding layer 201 is provided on the substrate 200, the substrate 201 is bonded to the mirror layer 202, and the growth substrate 100 is removed, which can be removed by a wet etching process when the growth substrate 100 is gallium arsenide, until the first ohmic contact layer 103 is exposed.
[0076] Then, as shown in Fig. 4, a first electrode 203 is formed on the first ohmic contact layer 103, which forms a good ohmic contact with the first ohmic contact layer 103, and a second electrode 204 is formed on the back side of the substrate 200, so that a conduction current can pass between the first electrode 203 and the second electrode 204 and the semiconductor epitaxial stack. The substrate 200 has a certain thickness, which can support all the layers thereon.
[0077] Then, a mask is formed to cover the first electrode 203, and the first ohmic contact layer 103 around the first electrode 203 is exposed; an etching process is performed to etch and remove the first ohmic contact layer 103 around the first electrode 203, so that the ohmic contact layer 103 not located under the first electrode 109 is completely removed, and the first current spreading layer 104 is exposed, and then the first current spreading layer 104 is etched to form a patterned or roughened surface, to obtain a structure as shown in Fig. 2. The removal process of the ohmic contact layer and the roughening process of the first current spreading layer 104 can be a wet etching process in one step or multiple steps, and the wet etching solution can be an acidic solution such as hydrochloric acid, sulfuric acid or hydrofluoric acid or citric acid, or any other preferred chemical reagent.
[0078] Finally, the unitized invisible light emitting diode is obtained by etching, cleaving or other processes according to the size requirements.
[0079] The light emitting diode prepared by the method in the embodiment is mainly applied to the fields of outdoor display screens, plant lighting, stage lights, etc., and has a current density greater than 10 A / cm 3 The thickness of the first spacing layer is 50 nm to 120 nm, preferably more than 60 nm and less than 100 nm, which can effectively control the position of the electron and hole recombination in the active region (MQW) of the light emitting diode, fully utilize the area of the active region, and improve the light emitting efficiency of the light emitting diode. Embodiment
[0080] Figure 5 shows a schematic diagram of a light emitting diode in another embodiment, which employs the epitaxial structure shown in Figure 1, and the current density of the light emitting diode in this embodiment is less than or equal to 10 A / cm 3 , preferably greater than 5 A / cm 3 , and is mainly applied to TVs and panels. The size of the light emitting diode in this embodiment is preferably less than 100 μm and greater than 50 μm, i.e., the length of at least one side of the light emitting diode is greater than 50 μm and less than 100 μm. The thickness of the first spacer layer of the light emitting diode in this embodiment is 0-50 nm, preferably greater than 10 nm, and more preferably greater than 20 nm and less than 45 nm, which can effectively control the position of the recombination of electrons and holes in the active region (MQW) of the light emitting diode in this current density range, fully utilize the active region area, and improve the light emitting efficiency of the light emitting diode.
[0081] The light emitting diode is a flip-chip light emitting diode. As shown in Figure 5, the light emitting diode comprises a substrate 200, which is a transparent substrate, and is preferably a sapphire substrate in this embodiment. The semiconductor epitaxial stack is bonded to the substrate 200 through a bonding layer 201, which is a transparent bonding layer. The semiconductor epitaxial stack comprises a first mesa S1 and a second mesa S2, and the second mesa S2 is formed by a recessed second-type semiconductor layer. The first electrode 203 and the second electrode 204 comprise ohmic contact portions 203a and 204a and pad electrodes 203b and 204b, and the ohmic contact portions 203a and 204a are formed on the first mesa S1 and the second mesa S2, respectively, and form ohmic contacts with the first-type semiconductor layer and the second-type semiconductor layer. The second current spreading layer 110 has a roughened structure on the surface, which facilitates the bonding of the bonding layer 201 to the surface of the semiconductor epitaxial stack, so as to realize the bonding of the semiconductor epitaxial stack to the transparent substrate.
[0082] The current density of the light emitting diode in this embodiment is less than or equal to 10 A / cm 3 , and the thickness of the first spacer layer of the light emitting diode is preferably 0-50 nm, preferably less than 20 nm and less than 45 nm, which effectively controls the position of the recombination of electrons and holes in the active region (MQW) of the light emitting diode in this current density range, fully utilizes the active region area, improves the light emitting efficiency of the light emitting diode, and realizes a higher light emitting efficiency of the light emitting diode in this current density operating range. Embodiment
[0083] Figure 6 shows a schematic diagram of a light emitting diode in another embodiment, which employs the epitaxial structure shown in Figure 1. The light emitting diode in this embodiment is a micro light emitting diode, and the current density of the micro light emitting diode is less than 10 A / cm 3More preferably, the current density is less than 5 A / cm 3 The micro-LED is mainly applied to TV, panel, vehicle display, wear, etc. The size of the micro-LED is preferably less than or equal to 50 μm, that is, the length of at least one side of the micro-LED is less than or equal to 50 μm. In the embodiment, the thickness of the first spacing layer of the light-emitting diode is 0-50 nm, preferably 0-20 nm, and more preferably 0-10 nm, so as to realize higher light-emitting efficiency of the micro-LED under the condition of small current density.
[0084] The micro-LED comprises: a semiconductor epitaxial stack comprising a first type semiconductor layer, a second type semiconductor layer and an active layer 107 between the first type semiconductor layer and the second type semiconductor layer; a first mesa S1 composed of the first type semiconductor layer exposed by the semiconductor epitaxial stack, a second mesa S2 composed of the second type semiconductor layer; a first electrode 203 formed on the first mesa S1 and electrically connected with the first type semiconductor layer; and a second electrode 204 formed on the second mesa S2 and electrically connected with the second type semiconductor layer.
[0085] In the embodiment, the first type semiconductor layer comprises a first current spreading layer 104, a first cover layer 105 and a first spacing layer 106; the first current spreading layer 104 plays a role of current spreading, and its spreading capacity is related to the thickness; and the preferred material is Al x1 Ga 1-x1 InP, and the n-type doping concentration is 2E18-5E18 / cm 3 . Al x1 Ga 1-x1 InP, and X1 is 0.3-0.7, which can ensure the light transmittance of the n-type current spreading layer. The n-type current spreading layer 104 is in ohmic contact with the first electrode 203 to form an electrical connection; and the side of the first current spreading layer 104 away from the active layer provides a light-emitting surface. The first cover layer 105 provides electrons for the MQW, and the preferred material is AlInP with a thickness of 200-1200 nm; the n-type doping is commonly Si doping, and other element equivalent doping is not excluded. The first spacing layer 106 is between the first cover layer 105 and the active layer 107, and the preferred material is Al a1 Ga 1-a1 InP, and the thickness of the first spacing layer 106 is preferably 0-50 nm, and more preferably 0-20 nm. The Al component content a1 is 0.2-1; and the doping concentration is less than 21E17 / cm 3 .
[0086] The second type semiconductor layer comprises a second spacer layer 108, a second cover layer 109, a second current spreading layer 110 and a second ohmic contact layer 111; the second spacer layer 108 is located between the active layer 107 and the second cover layer 109, and the material of the second spacer layer 109 is preferably Al b2 Ga 1-b2 InP. The thickness of the second spacer layer 108 is preferably less than 300 nm, the Al component content b1 of the second spacer layer 107 ranges from 0.3 to 1; and the doping concentration is less than 2E17 / cm 3 .
[0087] The second cover layer 109 provides holes for the active layer, and the preferred material is AlInP, and the thickness is 200-1200 nm; the common P-type doping is Mg doping, and other element equivalent doping is not excluded.
[0088] The second current spreading layer 110 plays a role of current spreading, and its spreading capacity is related to the thickness, so in the embodiment, the thickness can be selected according to the specific device size, and the preferred thickness is controlled to be more than 200 nm and less than 1500 nm. In the embodiment, the thickness of the second current spreading layer 110 is preferably 300-1000 nm. In the embodiment, the preferred material is GaP, the P-type doping concentration is 9E17-4E18 / cm 3 , and the common P-type doping is C doping, and other element equivalent doping is not excluded.
[0089] The second ohmic contact layer 111 is covered on the second current spreading layer 110, and the preferred material is Gap, the thickness is 30-100 nm, and the doping concentration is 5E18-5E19 / cm 3 , and the preferred doping concentration is 9E18 / cm 3 , and can form a good ohmic contact with the second electrode 204. The second ohmic contact layer 111 is in ohmic contact with the second electrode 204, and forms an electrical connection.
[0090] The active layer 107 is a multi-quantum well, and the material is Al x Ga 1-x InP / Al y Ga 1-y InP(0≤x≤y≤1). The period number of the quantum well structure in the embodiment is 2-20, preferably 2-15, the thickness of the well layer is 3-7 nm, and the thickness of the barrier layer is 4-8 nm.
[0091] The conductive metal of the first electrode 203 in contact with the first type semiconductor layer can be selected from gold, platinum, silver or the like, or a transparent conductive oxide, specifically ITO, ZnO or the like; more preferably, the first electrode 203 can be a multi-layer material, such as an alloy material including at least one of gold germanium nickel, gold beryllium, gold germanium, gold zinc or the like; more preferably, the first electrode 203 can further include a reflective metal, such as gold or silver, which reflects the light radiated from the current spreading layer 104 and penetrating through the first type semiconductor layer to the semiconductor epitaxial stack and emits the light from the light emitting side.
[0092] The second electrode 204 is in contact with the second ohmic contact layer 111 of the second type semiconductor layer to form a good ohmic contact; preferably, the material of the second electrode 204 in contact with the second ohmic contact layer 111 can be a conductive metal, such as gold, platinum or silver or the like; more preferably, the second electrode 204 can include a multi-layer material, such as an alloy material including at least one of gold germanium nickel, gold beryllium, gold germanium, gold zinc or the like. More preferably, to improve the ohmic contact effect of the second electrode 206 on one side of the second ohmic contact layer 111, at least one metal capable of diffusing to one side of the second ohmic contact layer 111 can be included to improve the ohmic contact resistance; to facilitate diffusion, a fusion temperature of at least 300°C can be selected. The diffusing metal can be a metal capable of directly contacting one side of the second ohmic contact layer 111, such as gold, platinum or silver or the like.
[0093] To improve the reliability of the micro-LED, an insulating protective layer 207 (not shown in the figure) is provided on the first mesa S1, the second mesa S2 and the sidewall of the micro-LED; the insulating protective layer is a single-layer or multi-layer structure formed by at least one of SiO2, SiN x , Al2O3, Ti3O5. In some optional embodiments, the insulating protective layer 207 is a Bragg reflection layer structure, for example, the insulating protective layer 207 is formed by alternately stacking Ti3O5 and SiO2. In the present embodiment, the material of the insulating protective layer 207 can be SiNx or SiO2, and the thickness is at least 1 μm.
[0094] In the present embodiment, the first electrode 203 and the second electrode 204 are located on the opposite side of the light emitting side; the first electrode 203 and the second electrode 204 can be in contact with the external electrical connector through the opposite side of the light emitting side to form an inverted structure. Therefore, the first electrode 203 and the second electrode 204 include ohmic contact portions 203a and 203a and pad electrodes 203b and 203b; the pad electrodes 203b and 203b can be at least one layer of gold, aluminum or silver or the like to realize die bonding of the first electrode 203 and the second electrode 204. The first electrode 203 and the second electrode 204 can be equal in height or not equal in height; in the thickness direction, the pad metal layers of the first electrode and the second electrode do not overlap.
[0095] Figure 7 is a schematic diagram of a micro light emitting element formed using the micro light emitting diode of the present embodiment, the micro light emitting element further comprising a base frame 250 supporting the micro light emitting diode, the base frame 250 being located at the underside of the micro light emitting diode, and a bridge arm 240 connecting the micro light emitting diode and the base frame 250; the base frame 250 comprising a substrate 200 and a bonding layer 201, the material of the bonding layer 201 being BCB glue, silicon glue, UV glue or resin in the present embodiment, and the material of the bridge arm 240 comprising a dielectric, a metal or a semiconductor material, in some embodiments, the horizontal portion 2071 of the insulating protective layer 207 can be used as the bridge arm 240, bridging the bonding layer 201 and connecting the micro light emitting diode and the base frame 250.
[0096] The micro light emitting diode is separated from the base frame 250 by printing a printing mold, the material of the printing mold being PDMS, silicon glue, pyrolytic glue or UV glue. In some cases, the micro light emitting diode and the base frame have a sacrificial layer 208 therebetween, and at least in some cases, the removal efficiency of the sacrificial layer 208 is higher than that of the micro light emitting diode, the specific cases including chemical decomposition or physical decomposition, such as UV decomposition, etching removal or impact removal, etc. Embodiment
[0097] Figures 8-14 show schematic diagrams of the manufacturing process of the micro light emitting diode according to the present embodiment 4, and the manufacturing method of the micro light emitting diode of the present embodiment will be described in detail below in combination with the schematic diagrams.
[0098] First, as shown in Figure 8, an epitaxial structure is provided, which specifically comprises the following steps: providing a growth substrate 100, epitaxially growing a semiconductor epitaxial stack on the growth substrate 100 by epitaxial growth process such as MOCVD, the semiconductor epitaxial stack comprising a buffer layer 101 and an etching stop layer 102 successively laminated on the surface of the growth substrate 100, for removing the epitaxial growth substrate 100, and then growing a first current spreading layer 104, a first cover layer 105, a first spacer layer 106, an active layer 107, a second spacer layer 108, a second cover layer 109, a second current spreading layer 110 and a second ohmic contact layer 111.
[0099] Then, referring to Figure 9, a part of the semiconductor epitaxial stack is removed by dry etching to form a first mesa S1 and a second mesa S2, the first mesa S1 being composed of the first type semiconductor layer exposed by the recess of the semiconductor epitaxial stack, and the second mesa S2 being composed of the second type semiconductor layer; a side wall is formed at the outer edge of the semiconductor epitaxial stack, between the first mesa S1 and the second mesa S2.
[0100] Next, referring to Fig. 10, a first electrode 203 and a second electrode 204 are formed on the first mesa S1 and the second mesa S2, respectively; wherein the first electrode 203 and the second electrode 204 comprise an ohmic contact portion 203a and 204a, an insulating protective layer 207 is formed on the ohmic contact portion, and a pad electrode 203b and 204b is formed on the insulating protective layer 207 and contacts the ohmic contact portion 203a and 204a, respectively. The material of the ohmic contact portion 203a and 204a can be, for example, Au / AuZn / Au. In this step, the ohmic contact portion 203a and 204a can be fused to form a good ohmic contact with the semiconductor epitaxial layer. The insulating protective layer 207 is preferably made of SiNx or SiO2, and has a thickness of 1 μm or more. In other alternative embodiments, the insulating protective layer 207 can be made of a Bragg reflector structure formed by alternately stacking two materials with different refractive indices.
[0101] Next, referring to Fig. 11, a sacrificial layer 208 is formed on the surface of the micro light emitting diode; preferably, the thickness of the sacrificial layer 208 on the sidewall is 1 μm or more, and the material of the sacrificial layer 208 can be an oxide, a nitride, or a material that can be selectively removed with respect to other layers.
[0102] Next, referring to Fig. 12, a bonding glue, such as BCB glue, is bonded on the sacrificial layer 208 of the micro light emitting diode to form a bonding layer 201.
[0103] Next, referring to Fig. 13, the wafer of the distributed micro light emitting diode is bonded to a substrate 200.
[0104] Next, referring to Fig. 14, the growth substrate 100 is peeled off, and the buffer layer 101 and the etching stop layer 102 are removed.
[0105] Next, by masking and etching, the first type semiconductor layer at the edge of the micro light emitting diode is removed, and the etching is stopped on the insulating protective layer 207 to form an independent core particle, facilitating the subsequent separation of the core particle, and obtaining the micro light emitting diode as shown in Fig. 8.
[0106] Finally, the formed micro light emitting diode is separated from the substrate 210 by transfer printing and imprinted onto a packaging substrate. (not shown in the figure) Embodiment
[0107] The embodiment provides a light emitting device 300, which comprises a driving unit and a light emitting diode, and the driving unit is electrically connected to the light emitting diode. Referring to Fig. 15, the light emitting device 300 comprises a plurality of arrayed light emitting diodes as in any of the preceding embodiments, and a part of the light emitting diode 1 is shown in an enlarged and schematic manner in Fig. 15.
[0108] In the light emitting diode and the light emitting device, the thickness of the first barrier layer in the light emitting diode can be designed according to different working ranges of current density or chip size, so that the external quantum efficiency of the light emitting diode is more ideal, and the light emitting efficiency of the light emitting device is further improved. The light emitting diode in the light emitting device can have ideal light emitting efficiency under different operating ranges of current density.
[0109] It should be noted that the above embodiments are only used to illustrate the present application, but not used to limit the present application. Those skilled in the art can make various modifications and changes to the present application without departing from the spirit and scope of the present application. Therefore, all equivalent technical solutions belong to the scope of the present application, and the patent protection scope of the present application should be defined by the scope of claims.
Claims
1. A light emitting diode, comprising: a semiconductor epitaxial stack having opposite first and second surfaces, and comprising a first type semiconductor layer, an active layer and a second type semiconductor layer stacked in sequence from the first surface to the second surface; the active layer comprising n periods of quantum well structures, each period of quantum well structure comprising a well layer and a barrier layer deposited in sequence; Characterized in that: the first type semiconductor layer and the active layer contain a first interval layer, the ratio of the thickness (nm) of the first interval layer to the current density (A / cm 2 ) of the light emitting diode is between 0~10.
2. The light emitting diode of claim 1, wherein: The thickness (nm) of the first spacer layer and the current density (A / cm²) of the light-emitting diode 2 The ratio of ) is between 0 and 5.
3. The light emitting diode of claim 1, wherein: the first spacer layer has a thickness of 0-120 nm.
4. The light emitting diode of claim 1, wherein: The current density of the light emitting diode is greater than 10 A / cm 2 When the first interval layer is 50-120 nm thick.
5. The light emitting diode of claim 1, wherein: The current density of the light emitting diode is less than or equal to 10 A / cm 2 When the first interval layer is present, the thickness of the first interval layer is 0-50 nm.
6. The light emitting diode of claim 1, wherein: The material of the first spacer layer is Al a Ga 1-a InP, wherein a ranges from 0.2 to 1.
7. The light emitting diode of claim 1, wherein: The first spacer layer is n-type doped with a doping concentration less than 2E17 / cm 3 .
8. The light emitting diode of claim 4, wherein, the length of at least one side of the light emitting diode is greater than 100 μm.
9. The light emitting diode of claim 5, wherein: the length of at least one side of the light emitting diode is less than or equal to 100 μm.
10. The light emitting diode of claim 1, wherein: the light emitting diode further comprises a second spacer layer between the active layer and the second type semiconductor layer.
11. The light emitting diode of claim 10, wherein: The material of the second spacer layer is Al b Ga 1-b InP, wherein b ranges from 0.2 to 1.
12. The light emitting diode of claim 1, wherein: the number n of periods of the active layer is 2-100.
13. The light emitting diode of claim 1, wherein: the thickness of the well layer is 2-25 nm; the thickness of the barrier layer is 2-25 nm.
14. The light emitting diode of claim 1, wherein: the light emitting diode further comprises a first electrode and a second electrode electrically connected to the first type semiconductor layer and the second type semiconductor layer, respectively.
15. The light emitting diode of claim 1, wherein: the active layer is composed of AlGaInP-based materials.
16. A light emitting diode, characterized by the light emitting diode comprises: a semiconductor epitaxial stack having opposite first and second surfaces, and comprising a first type semiconductor layer, an active layer and a second type semiconductor layer stacked in sequence from the first surface to the second surface; the active layer comprising n periods of quantum well structures, each period of quantum well structure comprising a well layer and a barrier layer deposited in sequence; a first spacer layer between the first type semiconductor layer and the active layer; wherein the light emitting diode has a first side, a second side, a third side and a fourth side surrounding in sequence, wherein the first side is parallel to the third side, and the second side is parallel to the fourth side, the length of the first side is greater than or equal to the length of the second side, the size of the second side is greater than or equal to 100 μm, the thickness of the first spacer layer is 50-120 nm, or the size of the second side is less than 100 μm, and the thickness of the first spacer layer is 0-50 nm.
17. The light emitting diode of claim 16, wherein: The material of the first spacer layer is Al a Ga 1-a InP, wherein a ranges from 0.2 to 1.
18. The light emitting diode of claim 16, wherein: The first spacer layer is n-type doped with a doping concentration less than 2E17 / cm 3 .
19. The light emitting diode of claim 16, wherein: the light emitting diode further comprises a first electrode and a second electrode electrically connected to the first type semiconductor layer and the second type semiconductor layer, respectively.
20. The light emitting diode of claim 16, wherein: the active layer is composed of AlGaInP-based materials. 21.A light emitting device, comprising a driving unit and a light emitting diode, the driving unit being electrically connected to the light emitting diode, the light emitting diode having opposite first and second surfaces, and comprising a first type semiconductor layer, an active layer and a second type semiconductor layer stacked in sequence from the first surface to the second surface; the active layer comprising n periods of quantum well structures, each period of quantum well structure comprising a well layer and a barrier layer deposited in sequence. characterized in that The first type semiconductor layer and the active layer comprise a first spacer layer, a ratio of a thickness (nm) of the first spacer layer to a current density (A / cm 2 ) of the light emitting diode is between 0 and 10.
22. The light emitting device of claim 21, wherein: The thickness (nm) of the first spacer layer and the current density (A / cm²) of the light-emitting diode 2 The ratio of ) is between 0 and 5.
23. The light emitting device of claim 21, wherein: The current density of the light emitting diode is greater than 10 A / cm 2 When the first interval layer is 50-120 nm thick.
24. The light emitting device of claim 21, wherein: The current density of the light emitting diode is less than or equal to 10 A / cm 2 The thickness of the first spacer layer is 0-50 nm.
25. The light emitting device of claim 21, wherein: The material of the first spacer layer is Al a Ga 1-a InP, and a ranges from 0.2 to 1.
26. The light emitting device of claim 21, wherein: The first spacer layer is n-type doped with a doping concentration of 2E17 / cm 3 Below.
27. The light emitting device of claim 21, wherein: the active layer is composed of AlGaInP-based materials.
Citation Information
Patent Citations
Light emitting diode and light emitting device
CN115148869A
Light emitting diode and light emitting device
CN115548187A
Light emitting diode and light emitting device
CN117542936A
Light emitting diode and light emitting device
CN119421570A
Semiconductor light emitting device
US9018618B1
Cited By
Semiconductor light-emitting element and light-emitting device thereof
US20240222588A1